1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these are unique; no other rtx-object will be equal to any
93 rtx global_rtl[GR_MAX];
95 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
96 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
97 record a copy of const[012]_rtx. */
99 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
108 /* All references to the following fixed hard registers go through
109 these unique rtl objects. On machines where the frame-pointer and
110 arg-pointer are the same register, they use the same unique object.
112 After register allocation, other rtl objects which used to be pseudo-regs
113 may be clobbered to refer to the frame-pointer register.
114 But references that were originally to the frame-pointer can be
115 distinguished from the others because they contain frame_pointer_rtx.
117 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
118 tricky: until register elimination has taken place hard_frame_pointer_rtx
119 should be used if it is being set, and frame_pointer_rtx otherwise. After
120 register elimination hard_frame_pointer_rtx should always be used.
121 On machines where the two registers are same (most) then these are the
124 In an inline procedure, the stack and frame pointer rtxs may not be
125 used for anything else. */
126 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
127 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
128 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
147 htab_t const_int_htab;
149 /* A hash table storing memory attribute structures. */
150 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
151 htab_t mem_attrs_htab;
153 /* A hash table storing all CONST_DOUBLEs. */
154 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
155 htab_t const_double_htab;
157 #define first_insn (cfun->emit->x_first_insn)
158 #define last_insn (cfun->emit->x_last_insn)
159 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
160 #define last_linenum (cfun->emit->x_last_linenum)
161 #define last_filename (cfun->emit->x_last_filename)
162 #define first_label_num (cfun->emit->x_first_label_num)
164 static rtx make_jump_insn_raw PARAMS ((rtx));
165 static rtx make_call_insn_raw PARAMS ((rtx));
166 static rtx find_line_note PARAMS ((rtx));
167 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
169 static void unshare_all_rtl_1 PARAMS ((rtx));
170 static void unshare_all_decls PARAMS ((tree));
171 static void reset_used_decls PARAMS ((tree));
172 static void mark_label_nuses PARAMS ((rtx));
173 static hashval_t const_int_htab_hash PARAMS ((const void *));
174 static int const_int_htab_eq PARAMS ((const void *,
176 static hashval_t const_double_htab_hash PARAMS ((const void *));
177 static int const_double_htab_eq PARAMS ((const void *,
179 static rtx lookup_const_double PARAMS ((rtx));
180 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
181 static int mem_attrs_htab_eq PARAMS ((const void *,
183 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
186 static tree component_ref_for_mem_expr PARAMS ((tree));
187 static rtx gen_const_vector_0 PARAMS ((enum machine_mode));
189 /* Probability of the conditional branch currently proceeded by try_split.
190 Set to -1 otherwise. */
191 int split_branch_probability = -1;
193 /* Returns a hash code for X (which is a really a CONST_INT). */
196 const_int_htab_hash (x)
199 return (hashval_t) INTVAL ((struct rtx_def *) x);
202 /* Returns non-zero if the value represented by X (which is really a
203 CONST_INT) is the same as that given by Y (which is really a
207 const_int_htab_eq (x, y)
211 return (INTVAL ((rtx) x) == *((const HOST_WIDE_INT *) y));
214 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
216 const_double_htab_hash (x)
223 for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
224 h ^= XWINT (value, i);
228 /* Returns non-zero if the value represented by X (really a ...)
229 is the same as that represented by Y (really a ...) */
231 const_double_htab_eq (x, y)
235 rtx a = (rtx)x, b = (rtx)y;
238 if (GET_MODE (a) != GET_MODE (b))
240 for (i = 0; i < sizeof(CONST_DOUBLE_FORMAT)-1; i++)
241 if (XWINT (a, i) != XWINT (b, i))
247 /* Returns a hash code for X (which is a really a mem_attrs *). */
250 mem_attrs_htab_hash (x)
253 mem_attrs *p = (mem_attrs *) x;
255 return (p->alias ^ (p->align * 1000)
256 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
257 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
261 /* Returns non-zero if the value represented by X (which is really a
262 mem_attrs *) is the same as that given by Y (which is also really a
266 mem_attrs_htab_eq (x, y)
270 mem_attrs *p = (mem_attrs *) x;
271 mem_attrs *q = (mem_attrs *) y;
273 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
274 && p->size == q->size && p->align == q->align);
277 /* Allocate a new mem_attrs structure and insert it into the hash table if
278 one identical to it is not already in the table. We are doing this for
282 get_mem_attrs (alias, expr, offset, size, align, mode)
288 enum machine_mode mode;
293 /* If everything is the default, we can just return zero. */
294 if (alias == 0 && expr == 0 && offset == 0
296 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
297 && (align == BITS_PER_UNIT
299 && mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
304 attrs.offset = offset;
308 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
311 *slot = ggc_alloc (sizeof (mem_attrs));
312 memcpy (*slot, &attrs, sizeof (mem_attrs));
318 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
319 don't attempt to share with the various global pieces of rtl (such as
320 frame_pointer_rtx). */
323 gen_raw_REG (mode, regno)
324 enum machine_mode mode;
327 rtx x = gen_rtx_raw_REG (mode, regno);
328 ORIGINAL_REGNO (x) = regno;
332 /* There are some RTL codes that require special attention; the generation
333 functions do the raw handling. If you add to this list, modify
334 special_rtx in gengenrtl.c as well. */
337 gen_rtx_CONST_INT (mode, arg)
338 enum machine_mode mode ATTRIBUTE_UNUSED;
343 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
344 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
346 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
347 if (const_true_rtx && arg == STORE_FLAG_VALUE)
348 return const_true_rtx;
351 /* Look up the CONST_INT in the hash table. */
352 slot = htab_find_slot_with_hash (const_int_htab, &arg,
353 (hashval_t) arg, INSERT);
355 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
361 gen_int_mode (c, mode)
363 enum machine_mode mode;
365 return GEN_INT (trunc_int_for_mode (c, mode));
368 /* CONST_DOUBLEs might be created from pairs of integers, or from
369 REAL_VALUE_TYPEs. Also, their length is known only at run time,
370 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
372 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
373 hash table. If so, return its counterpart; otherwise add it
374 to the hash table and return it. */
376 lookup_const_double (real)
379 void **slot = htab_find_slot (const_double_htab, real, INSERT);
386 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
387 VALUE in mode MODE. */
389 const_double_from_real_value (value, mode)
390 REAL_VALUE_TYPE value;
391 enum machine_mode mode;
393 rtx real = rtx_alloc (CONST_DOUBLE);
394 PUT_MODE (real, mode);
396 memcpy (&CONST_DOUBLE_LOW (real), &value, sizeof (REAL_VALUE_TYPE));
398 return lookup_const_double (real);
401 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
402 of ints: I0 is the low-order word and I1 is the high-order word.
403 Do not use this routine for non-integer modes; convert to
404 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
407 immed_double_const (i0, i1, mode)
408 HOST_WIDE_INT i0, i1;
409 enum machine_mode mode;
414 if (mode != VOIDmode)
417 if (GET_MODE_CLASS (mode) != MODE_INT
418 && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT)
421 /* We clear out all bits that don't belong in MODE, unless they and
422 our sign bit are all one. So we get either a reasonable negative
423 value or a reasonable unsigned value for this mode. */
424 width = GET_MODE_BITSIZE (mode);
425 if (width < HOST_BITS_PER_WIDE_INT
426 && ((i0 & ((HOST_WIDE_INT) (-1) << (width - 1)))
427 != ((HOST_WIDE_INT) (-1) << (width - 1))))
428 i0 &= ((HOST_WIDE_INT) 1 << width) - 1, i1 = 0;
429 else if (width == HOST_BITS_PER_WIDE_INT
430 && ! (i1 == ~0 && i0 < 0))
432 else if (width > 2 * HOST_BITS_PER_WIDE_INT)
433 /* We cannot represent this value as a constant. */
436 /* If this would be an entire word for the target, but is not for
437 the host, then sign-extend on the host so that the number will
438 look the same way on the host that it would on the target.
440 For example, when building a 64 bit alpha hosted 32 bit sparc
441 targeted compiler, then we want the 32 bit unsigned value -1 to be
442 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
443 The latter confuses the sparc backend. */
445 if (width < HOST_BITS_PER_WIDE_INT
446 && (i0 & ((HOST_WIDE_INT) 1 << (width - 1))))
447 i0 |= ((HOST_WIDE_INT) (-1) << width);
449 /* If MODE fits within HOST_BITS_PER_WIDE_INT, always use a
452 ??? Strictly speaking, this is wrong if we create a CONST_INT for
453 a large unsigned constant with the size of MODE being
454 HOST_BITS_PER_WIDE_INT and later try to interpret that constant
455 in a wider mode. In that case we will mis-interpret it as a
458 Unfortunately, the only alternative is to make a CONST_DOUBLE for
459 any constant in any mode if it is an unsigned constant larger
460 than the maximum signed integer in an int on the host. However,
461 doing this will break everyone that always expects to see a
462 CONST_INT for SImode and smaller.
464 We have always been making CONST_INTs in this case, so nothing
465 new is being broken. */
467 if (width <= HOST_BITS_PER_WIDE_INT)
468 i1 = (i0 < 0) ? ~(HOST_WIDE_INT) 0 : 0;
471 /* If this integer fits in one word, return a CONST_INT. */
472 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
475 /* We use VOIDmode for integers. */
476 value = rtx_alloc (CONST_DOUBLE);
477 PUT_MODE (value, VOIDmode);
479 CONST_DOUBLE_LOW (value) = i0;
480 CONST_DOUBLE_HIGH (value) = i1;
482 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
483 XWINT (value, i) = 0;
485 return lookup_const_double (value);
489 gen_rtx_REG (mode, regno)
490 enum machine_mode mode;
493 /* In case the MD file explicitly references the frame pointer, have
494 all such references point to the same frame pointer. This is
495 used during frame pointer elimination to distinguish the explicit
496 references to these registers from pseudos that happened to be
499 If we have eliminated the frame pointer or arg pointer, we will
500 be using it as a normal register, for example as a spill
501 register. In such cases, we might be accessing it in a mode that
502 is not Pmode and therefore cannot use the pre-allocated rtx.
504 Also don't do this when we are making new REGs in reload, since
505 we don't want to get confused with the real pointers. */
507 if (mode == Pmode && !reload_in_progress)
509 if (regno == FRAME_POINTER_REGNUM)
510 return frame_pointer_rtx;
511 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
512 if (regno == HARD_FRAME_POINTER_REGNUM)
513 return hard_frame_pointer_rtx;
515 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
516 if (regno == ARG_POINTER_REGNUM)
517 return arg_pointer_rtx;
519 #ifdef RETURN_ADDRESS_POINTER_REGNUM
520 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
521 return return_address_pointer_rtx;
523 if (regno == PIC_OFFSET_TABLE_REGNUM
524 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
525 return pic_offset_table_rtx;
526 if (regno == STACK_POINTER_REGNUM)
527 return stack_pointer_rtx;
530 return gen_raw_REG (mode, regno);
534 gen_rtx_MEM (mode, addr)
535 enum machine_mode mode;
538 rtx rt = gen_rtx_raw_MEM (mode, addr);
540 /* This field is not cleared by the mere allocation of the rtx, so
548 gen_rtx_SUBREG (mode, reg, offset)
549 enum machine_mode mode;
553 /* This is the most common failure type.
554 Catch it early so we can see who does it. */
555 if ((offset % GET_MODE_SIZE (mode)) != 0)
558 /* This check isn't usable right now because combine will
559 throw arbitrary crap like a CALL into a SUBREG in
560 gen_lowpart_for_combine so we must just eat it. */
562 /* Check for this too. */
563 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
566 return gen_rtx_raw_SUBREG (mode, reg, offset);
569 /* Generate a SUBREG representing the least-significant part of REG if MODE
570 is smaller than mode of REG, otherwise paradoxical SUBREG. */
573 gen_lowpart_SUBREG (mode, reg)
574 enum machine_mode mode;
577 enum machine_mode inmode;
579 inmode = GET_MODE (reg);
580 if (inmode == VOIDmode)
582 return gen_rtx_SUBREG (mode, reg,
583 subreg_lowpart_offset (mode, inmode));
586 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
588 ** This routine generates an RTX of the size specified by
589 ** <code>, which is an RTX code. The RTX structure is initialized
590 ** from the arguments <element1> through <elementn>, which are
591 ** interpreted according to the specific RTX type's format. The
592 ** special machine mode associated with the rtx (if any) is specified
595 ** gen_rtx can be invoked in a way which resembles the lisp-like
596 ** rtx it will generate. For example, the following rtx structure:
598 ** (plus:QI (mem:QI (reg:SI 1))
599 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
601 ** ...would be generated by the following C code:
603 ** gen_rtx (PLUS, QImode,
604 ** gen_rtx (MEM, QImode,
605 ** gen_rtx (REG, SImode, 1)),
606 ** gen_rtx (MEM, QImode,
607 ** gen_rtx (PLUS, SImode,
608 ** gen_rtx (REG, SImode, 2),
609 ** gen_rtx (REG, SImode, 3)))),
614 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
616 int i; /* Array indices... */
617 const char *fmt; /* Current rtx's format... */
618 rtx rt_val; /* RTX to return to caller... */
621 VA_FIXEDARG (p, enum rtx_code, code);
622 VA_FIXEDARG (p, enum machine_mode, mode);
627 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
632 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
633 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
635 rt_val = immed_double_const (arg0, arg1, mode);
640 rt_val = gen_rtx_REG (mode, va_arg (p, int));
644 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
648 rt_val = rtx_alloc (code); /* Allocate the storage space. */
649 rt_val->mode = mode; /* Store the machine mode... */
651 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
652 for (i = 0; i < GET_RTX_LENGTH (code); i++)
656 case '0': /* Unused field. */
659 case 'i': /* An integer? */
660 XINT (rt_val, i) = va_arg (p, int);
663 case 'w': /* A wide integer? */
664 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
667 case 's': /* A string? */
668 XSTR (rt_val, i) = va_arg (p, char *);
671 case 'e': /* An expression? */
672 case 'u': /* An insn? Same except when printing. */
673 XEXP (rt_val, i) = va_arg (p, rtx);
676 case 'E': /* An RTX vector? */
677 XVEC (rt_val, i) = va_arg (p, rtvec);
680 case 'b': /* A bitmap? */
681 XBITMAP (rt_val, i) = va_arg (p, bitmap);
684 case 't': /* A tree? */
685 XTREE (rt_val, i) = va_arg (p, tree);
699 /* gen_rtvec (n, [rt1, ..., rtn])
701 ** This routine creates an rtvec and stores within it the
702 ** pointers to rtx's which are its arguments.
707 gen_rtvec VPARAMS ((int n, ...))
713 VA_FIXEDARG (p, int, n);
716 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
718 vector = (rtx *) alloca (n * sizeof (rtx));
720 for (i = 0; i < n; i++)
721 vector[i] = va_arg (p, rtx);
723 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
727 return gen_rtvec_v (save_n, vector);
731 gen_rtvec_v (n, argp)
739 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
741 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
743 for (i = 0; i < n; i++)
744 rt_val->elem[i] = *argp++;
749 /* Generate a REG rtx for a new pseudo register of mode MODE.
750 This pseudo is assigned the next sequential register number. */
754 enum machine_mode mode;
756 struct function *f = cfun;
759 /* Don't let anything called after initial flow analysis create new
764 if (generating_concat_p
765 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
766 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
768 /* For complex modes, don't make a single pseudo.
769 Instead, make a CONCAT of two pseudos.
770 This allows noncontiguous allocation of the real and imaginary parts,
771 which makes much better code. Besides, allocating DCmode
772 pseudos overstrains reload on some machines like the 386. */
773 rtx realpart, imagpart;
774 int size = GET_MODE_UNIT_SIZE (mode);
775 enum machine_mode partmode
776 = mode_for_size (size * BITS_PER_UNIT,
777 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
778 ? MODE_FLOAT : MODE_INT),
781 realpart = gen_reg_rtx (partmode);
782 imagpart = gen_reg_rtx (partmode);
783 return gen_rtx_CONCAT (mode, realpart, imagpart);
786 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
787 enough to have an element for this pseudo reg number. */
789 if (reg_rtx_no == f->emit->regno_pointer_align_length)
791 int old_size = f->emit->regno_pointer_align_length;
796 new = ggc_realloc (f->emit->regno_pointer_align, old_size * 2);
797 memset (new + old_size, 0, old_size);
798 f->emit->regno_pointer_align = (unsigned char *) new;
800 new1 = (rtx *) ggc_realloc (f->emit->x_regno_reg_rtx,
801 old_size * 2 * sizeof (rtx));
802 memset (new1 + old_size, 0, old_size * sizeof (rtx));
803 regno_reg_rtx = new1;
805 new2 = (tree *) ggc_realloc (f->emit->regno_decl,
806 old_size * 2 * sizeof (tree));
807 memset (new2 + old_size, 0, old_size * sizeof (tree));
808 f->emit->regno_decl = new2;
810 f->emit->regno_pointer_align_length = old_size * 2;
813 val = gen_raw_REG (mode, reg_rtx_no);
814 regno_reg_rtx[reg_rtx_no++] = val;
818 /* Identify REG (which may be a CONCAT) as a user register. */
824 if (GET_CODE (reg) == CONCAT)
826 REG_USERVAR_P (XEXP (reg, 0)) = 1;
827 REG_USERVAR_P (XEXP (reg, 1)) = 1;
829 else if (GET_CODE (reg) == REG)
830 REG_USERVAR_P (reg) = 1;
835 /* Identify REG as a probable pointer register and show its alignment
836 as ALIGN, if nonzero. */
839 mark_reg_pointer (reg, align)
843 if (! REG_POINTER (reg))
845 REG_POINTER (reg) = 1;
848 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
850 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
851 /* We can no-longer be sure just how aligned this pointer is */
852 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
855 /* Return 1 plus largest pseudo reg number used in the current function. */
863 /* Return 1 + the largest label number used so far in the current function. */
868 if (last_label_num && label_num == base_label_num)
869 return last_label_num;
873 /* Return first label number used in this function (if any were used). */
876 get_first_label_num ()
878 return first_label_num;
881 /* Return the final regno of X, which is a SUBREG of a hard
884 subreg_hard_regno (x, check_mode)
888 enum machine_mode mode = GET_MODE (x);
889 unsigned int byte_offset, base_regno, final_regno;
890 rtx reg = SUBREG_REG (x);
892 /* This is where we attempt to catch illegal subregs
893 created by the compiler. */
894 if (GET_CODE (x) != SUBREG
895 || GET_CODE (reg) != REG)
897 base_regno = REGNO (reg);
898 if (base_regno >= FIRST_PSEUDO_REGISTER)
900 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
903 /* Catch non-congruent offsets too. */
904 byte_offset = SUBREG_BYTE (x);
905 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
908 final_regno = subreg_regno (x);
913 /* Return a value representing some low-order bits of X, where the number
914 of low-order bits is given by MODE. Note that no conversion is done
915 between floating-point and fixed-point values, rather, the bit
916 representation is returned.
918 This function handles the cases in common between gen_lowpart, below,
919 and two variants in cse.c and combine.c. These are the cases that can
920 be safely handled at all points in the compilation.
922 If this is not a case we can handle, return 0. */
925 gen_lowpart_common (mode, x)
926 enum machine_mode mode;
929 int msize = GET_MODE_SIZE (mode);
930 int xsize = GET_MODE_SIZE (GET_MODE (x));
933 if (GET_MODE (x) == mode)
936 /* MODE must occupy no more words than the mode of X. */
937 if (GET_MODE (x) != VOIDmode
938 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
939 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
942 offset = subreg_lowpart_offset (mode, GET_MODE (x));
944 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
945 && (GET_MODE_CLASS (mode) == MODE_INT
946 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
948 /* If we are getting the low-order part of something that has been
949 sign- or zero-extended, we can either just use the object being
950 extended or make a narrower extension. If we want an even smaller
951 piece than the size of the object being extended, call ourselves
954 This case is used mostly by combine and cse. */
956 if (GET_MODE (XEXP (x, 0)) == mode)
958 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
959 return gen_lowpart_common (mode, XEXP (x, 0));
960 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
961 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
963 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
964 || GET_CODE (x) == CONCAT)
965 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
966 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
967 from the low-order part of the constant. */
968 else if ((GET_MODE_CLASS (mode) == MODE_INT
969 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
970 && GET_MODE (x) == VOIDmode
971 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
973 /* If MODE is twice the host word size, X is already the desired
974 representation. Otherwise, if MODE is wider than a word, we can't
975 do this. If MODE is exactly a word, return just one CONST_INT. */
977 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
979 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
981 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
982 return (GET_CODE (x) == CONST_INT ? x
983 : GEN_INT (CONST_DOUBLE_LOW (x)));
986 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
987 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
988 : CONST_DOUBLE_LOW (x));
990 /* Sign extend to HOST_WIDE_INT. */
991 val = trunc_int_for_mode (val, mode);
993 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
998 /* The floating-point emulator can handle all conversions between
999 FP and integer operands. This simplifies reload because it
1000 doesn't have to deal with constructs like (subreg:DI
1001 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
1002 /* Single-precision floats are always 32-bits and double-precision
1003 floats are always 64-bits. */
1005 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1006 && GET_MODE_BITSIZE (mode) == 32
1007 && GET_CODE (x) == CONST_INT)
1013 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
1014 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1016 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1017 && GET_MODE_BITSIZE (mode) == 64
1018 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
1019 && GET_MODE (x) == VOIDmode)
1023 HOST_WIDE_INT low, high;
1025 if (GET_CODE (x) == CONST_INT)
1028 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1032 low = CONST_DOUBLE_LOW (x);
1033 high = CONST_DOUBLE_HIGH (x);
1036 #if HOST_BITS_PER_WIDE_INT == 32
1037 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1039 if (WORDS_BIG_ENDIAN)
1040 i[0] = high, i[1] = low;
1042 i[0] = low, i[1] = high;
1047 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1048 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1050 else if ((GET_MODE_CLASS (mode) == MODE_INT
1051 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1052 && GET_CODE (x) == CONST_DOUBLE
1053 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1056 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1057 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1059 /* Convert 'r' into an array of four 32-bit words in target word
1061 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1062 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1065 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1068 i[3 - 3 * endian] = 0;
1071 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1072 i[2 - 2 * endian] = 0;
1073 i[3 - 2 * endian] = 0;
1076 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1077 i[3 - 3 * endian] = 0;
1080 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1085 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1087 #if HOST_BITS_PER_WIDE_INT == 32
1088 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1090 if (HOST_BITS_PER_WIDE_INT != 64)
1093 return immed_double_const ((((unsigned long) i[3 * endian])
1094 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1095 (((unsigned long) i[2 - endian])
1096 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1101 /* Otherwise, we can't do this. */
1105 /* Return the real part (which has mode MODE) of a complex value X.
1106 This always comes at the low address in memory. */
1109 gen_realpart (mode, x)
1110 enum machine_mode mode;
1113 if (WORDS_BIG_ENDIAN
1114 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1116 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1118 ("can't access real part of complex value in hard register");
1119 else if (WORDS_BIG_ENDIAN)
1120 return gen_highpart (mode, x);
1122 return gen_lowpart (mode, x);
1125 /* Return the imaginary part (which has mode MODE) of a complex value X.
1126 This always comes at the high address in memory. */
1129 gen_imagpart (mode, x)
1130 enum machine_mode mode;
1133 if (WORDS_BIG_ENDIAN)
1134 return gen_lowpart (mode, x);
1135 else if (! WORDS_BIG_ENDIAN
1136 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1138 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1140 ("can't access imaginary part of complex value in hard register");
1142 return gen_highpart (mode, x);
1145 /* Return 1 iff X, assumed to be a SUBREG,
1146 refers to the real part of the complex value in its containing reg.
1147 Complex values are always stored with the real part in the first word,
1148 regardless of WORDS_BIG_ENDIAN. */
1151 subreg_realpart_p (x)
1154 if (GET_CODE (x) != SUBREG)
1157 return ((unsigned int) SUBREG_BYTE (x)
1158 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1161 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1162 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1163 least-significant part of X.
1164 MODE specifies how big a part of X to return;
1165 it usually should not be larger than a word.
1166 If X is a MEM whose address is a QUEUED, the value may be so also. */
1169 gen_lowpart (mode, x)
1170 enum machine_mode mode;
1173 rtx result = gen_lowpart_common (mode, x);
1177 else if (GET_CODE (x) == REG)
1179 /* Must be a hard reg that's not valid in MODE. */
1180 result = gen_lowpart_common (mode, copy_to_reg (x));
1185 else if (GET_CODE (x) == MEM)
1187 /* The only additional case we can do is MEM. */
1189 if (WORDS_BIG_ENDIAN)
1190 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1191 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1193 if (BYTES_BIG_ENDIAN)
1194 /* Adjust the address so that the address-after-the-data
1196 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1197 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1199 return adjust_address (x, mode, offset);
1201 else if (GET_CODE (x) == ADDRESSOF)
1202 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1207 /* Like `gen_lowpart', but refer to the most significant part.
1208 This is used to access the imaginary part of a complex number. */
1211 gen_highpart (mode, x)
1212 enum machine_mode mode;
1215 unsigned int msize = GET_MODE_SIZE (mode);
1218 /* This case loses if X is a subreg. To catch bugs early,
1219 complain if an invalid MODE is used even in other cases. */
1220 if (msize > UNITS_PER_WORD
1221 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1224 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1225 subreg_highpart_offset (mode, GET_MODE (x)));
1227 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1228 the target if we have a MEM. gen_highpart must return a valid operand,
1229 emitting code if necessary to do so. */
1230 if (result != NULL_RTX && GET_CODE (result) == MEM)
1231 result = validize_mem (result);
1238 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1239 be VOIDmode constant. */
1241 gen_highpart_mode (outermode, innermode, exp)
1242 enum machine_mode outermode, innermode;
1245 if (GET_MODE (exp) != VOIDmode)
1247 if (GET_MODE (exp) != innermode)
1249 return gen_highpart (outermode, exp);
1251 return simplify_gen_subreg (outermode, exp, innermode,
1252 subreg_highpart_offset (outermode, innermode));
1255 /* Return offset in bytes to get OUTERMODE low part
1256 of the value in mode INNERMODE stored in memory in target format. */
1259 subreg_lowpart_offset (outermode, innermode)
1260 enum machine_mode outermode, innermode;
1262 unsigned int offset = 0;
1263 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1267 if (WORDS_BIG_ENDIAN)
1268 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1269 if (BYTES_BIG_ENDIAN)
1270 offset += difference % UNITS_PER_WORD;
1276 /* Return offset in bytes to get OUTERMODE high part
1277 of the value in mode INNERMODE stored in memory in target format. */
1279 subreg_highpart_offset (outermode, innermode)
1280 enum machine_mode outermode, innermode;
1282 unsigned int offset = 0;
1283 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1285 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1290 if (! WORDS_BIG_ENDIAN)
1291 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1292 if (! BYTES_BIG_ENDIAN)
1293 offset += difference % UNITS_PER_WORD;
1299 /* Return 1 iff X, assumed to be a SUBREG,
1300 refers to the least significant part of its containing reg.
1301 If X is not a SUBREG, always return 1 (it is its own low part!). */
1304 subreg_lowpart_p (x)
1307 if (GET_CODE (x) != SUBREG)
1309 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1312 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1313 == SUBREG_BYTE (x));
1317 /* Helper routine for all the constant cases of operand_subword.
1318 Some places invoke this directly. */
1321 constant_subword (op, offset, mode)
1324 enum machine_mode mode;
1326 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1329 /* If OP is already an integer word, return it. */
1330 if (GET_MODE_CLASS (mode) == MODE_INT
1331 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1334 /* The output is some bits, the width of the target machine's word.
1335 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1337 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1338 && GET_MODE_CLASS (mode) == MODE_FLOAT
1339 && GET_MODE_BITSIZE (mode) == 64
1340 && GET_CODE (op) == CONST_DOUBLE)
1345 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1346 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1348 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1349 which the words are written depends on the word endianness.
1350 ??? This is a potential portability problem and should
1351 be fixed at some point.
1353 We must exercise caution with the sign bit. By definition there
1354 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1355 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1356 So we explicitly mask and sign-extend as necessary. */
1357 if (BITS_PER_WORD == 32)
1360 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1361 return GEN_INT (val);
1363 #if HOST_BITS_PER_WIDE_INT >= 64
1364 else if (BITS_PER_WORD >= 64 && offset == 0)
1366 val = k[! WORDS_BIG_ENDIAN];
1367 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1368 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1369 return GEN_INT (val);
1372 else if (BITS_PER_WORD == 16)
1374 val = k[offset >> 1];
1375 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1377 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1378 return GEN_INT (val);
1383 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1384 && GET_MODE_CLASS (mode) == MODE_FLOAT
1385 && GET_MODE_BITSIZE (mode) > 64
1386 && GET_CODE (op) == CONST_DOUBLE)
1391 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1392 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1394 if (BITS_PER_WORD == 32)
1397 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1398 return GEN_INT (val);
1400 #if HOST_BITS_PER_WIDE_INT >= 64
1401 else if (BITS_PER_WORD >= 64 && offset <= 1)
1403 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1404 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1405 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1406 return GEN_INT (val);
1413 /* Single word float is a little harder, since single- and double-word
1414 values often do not have the same high-order bits. We have already
1415 verified that we want the only defined word of the single-word value. */
1416 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1417 && GET_MODE_BITSIZE (mode) == 32
1418 && GET_CODE (op) == CONST_DOUBLE)
1423 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1424 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1426 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1428 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1430 if (BITS_PER_WORD == 16)
1432 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1434 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1437 return GEN_INT (val);
1440 /* The only remaining cases that we can handle are integers.
1441 Convert to proper endianness now since these cases need it.
1442 At this point, offset == 0 means the low-order word.
1444 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1445 in general. However, if OP is (const_int 0), we can just return
1448 if (op == const0_rtx)
1451 if (GET_MODE_CLASS (mode) != MODE_INT
1452 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1453 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1456 if (WORDS_BIG_ENDIAN)
1457 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1459 /* Find out which word on the host machine this value is in and get
1460 it from the constant. */
1461 val = (offset / size_ratio == 0
1462 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1463 : (GET_CODE (op) == CONST_INT
1464 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1466 /* Get the value we want into the low bits of val. */
1467 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1468 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1470 val = trunc_int_for_mode (val, word_mode);
1472 return GEN_INT (val);
1475 /* Return subword OFFSET of operand OP.
1476 The word number, OFFSET, is interpreted as the word number starting
1477 at the low-order address. OFFSET 0 is the low-order word if not
1478 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1480 If we cannot extract the required word, we return zero. Otherwise,
1481 an rtx corresponding to the requested word will be returned.
1483 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1484 reload has completed, a valid address will always be returned. After
1485 reload, if a valid address cannot be returned, we return zero.
1487 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1488 it is the responsibility of the caller.
1490 MODE is the mode of OP in case it is a CONST_INT.
1492 ??? This is still rather broken for some cases. The problem for the
1493 moment is that all callers of this thing provide no 'goal mode' to
1494 tell us to work with. This exists because all callers were written
1495 in a word based SUBREG world.
1496 Now use of this function can be deprecated by simplify_subreg in most
1501 operand_subword (op, offset, validate_address, mode)
1503 unsigned int offset;
1504 int validate_address;
1505 enum machine_mode mode;
1507 if (mode == VOIDmode)
1508 mode = GET_MODE (op);
1510 if (mode == VOIDmode)
1513 /* If OP is narrower than a word, fail. */
1515 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1518 /* If we want a word outside OP, return zero. */
1520 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1523 /* Form a new MEM at the requested address. */
1524 if (GET_CODE (op) == MEM)
1526 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1528 if (! validate_address)
1531 else if (reload_completed)
1533 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1537 return replace_equiv_address (new, XEXP (new, 0));
1540 /* Rest can be handled by simplify_subreg. */
1541 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1544 /* Similar to `operand_subword', but never return 0. If we can't extract
1545 the required subword, put OP into a register and try again. If that fails,
1546 abort. We always validate the address in this case.
1548 MODE is the mode of OP, in case it is CONST_INT. */
1551 operand_subword_force (op, offset, mode)
1553 unsigned int offset;
1554 enum machine_mode mode;
1556 rtx result = operand_subword (op, offset, 1, mode);
1561 if (mode != BLKmode && mode != VOIDmode)
1563 /* If this is a register which can not be accessed by words, copy it
1564 to a pseudo register. */
1565 if (GET_CODE (op) == REG)
1566 op = copy_to_reg (op);
1568 op = force_reg (mode, op);
1571 result = operand_subword (op, offset, 1, mode);
1578 /* Given a compare instruction, swap the operands.
1579 A test instruction is changed into a compare of 0 against the operand. */
1582 reverse_comparison (insn)
1585 rtx body = PATTERN (insn);
1588 if (GET_CODE (body) == SET)
1589 comp = SET_SRC (body);
1591 comp = SET_SRC (XVECEXP (body, 0, 0));
1593 if (GET_CODE (comp) == COMPARE)
1595 rtx op0 = XEXP (comp, 0);
1596 rtx op1 = XEXP (comp, 1);
1597 XEXP (comp, 0) = op1;
1598 XEXP (comp, 1) = op0;
1602 rtx new = gen_rtx_COMPARE (VOIDmode,
1603 CONST0_RTX (GET_MODE (comp)), comp);
1604 if (GET_CODE (body) == SET)
1605 SET_SRC (body) = new;
1607 SET_SRC (XVECEXP (body, 0, 0)) = new;
1611 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1612 or (2) a component ref of something variable. Represent the later with
1613 a NULL expression. */
1616 component_ref_for_mem_expr (ref)
1619 tree inner = TREE_OPERAND (ref, 0);
1621 if (TREE_CODE (inner) == COMPONENT_REF)
1622 inner = component_ref_for_mem_expr (inner);
1625 tree placeholder_ptr = 0;
1627 /* Now remove any conversions: they don't change what the underlying
1628 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1629 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1630 || TREE_CODE (inner) == NON_LVALUE_EXPR
1631 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1632 || TREE_CODE (inner) == SAVE_EXPR
1633 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1634 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1635 inner = find_placeholder (inner, &placeholder_ptr);
1637 inner = TREE_OPERAND (inner, 0);
1639 if (! DECL_P (inner))
1643 if (inner == TREE_OPERAND (ref, 0))
1646 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1647 TREE_OPERAND (ref, 1));
1650 /* Given REF, a MEM, and T, either the type of X or the expression
1651 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1652 if we are making a new object of this type. */
1655 set_mem_attributes (ref, t, objectp)
1660 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1661 tree expr = MEM_EXPR (ref);
1662 rtx offset = MEM_OFFSET (ref);
1663 rtx size = MEM_SIZE (ref);
1664 unsigned int align = MEM_ALIGN (ref);
1667 /* It can happen that type_for_mode was given a mode for which there
1668 is no language-level type. In which case it returns NULL, which
1673 type = TYPE_P (t) ? t : TREE_TYPE (t);
1675 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1676 wrong answer, as it assumes that DECL_RTL already has the right alias
1677 info. Callers should not set DECL_RTL until after the call to
1678 set_mem_attributes. */
1679 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1682 /* Get the alias set from the expression or type (perhaps using a
1683 front-end routine) and use it. */
1684 alias = get_alias_set (t);
1686 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1687 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1688 RTX_UNCHANGING_P (ref)
1689 |= ((lang_hooks.honor_readonly
1690 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1691 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1693 /* If we are making an object of this type, or if this is a DECL, we know
1694 that it is a scalar if the type is not an aggregate. */
1695 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1696 MEM_SCALAR_P (ref) = 1;
1698 /* We can set the alignment from the type if we are making an object,
1699 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1700 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1701 align = MAX (align, TYPE_ALIGN (type));
1703 /* If the size is known, we can set that. */
1704 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1705 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1707 /* If T is not a type, we may be able to deduce some more information about
1711 maybe_set_unchanging (ref, t);
1712 if (TREE_THIS_VOLATILE (t))
1713 MEM_VOLATILE_P (ref) = 1;
1715 /* Now remove any conversions: they don't change what the underlying
1716 object is. Likewise for SAVE_EXPR. */
1717 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1718 || TREE_CODE (t) == NON_LVALUE_EXPR
1719 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1720 || TREE_CODE (t) == SAVE_EXPR)
1721 t = TREE_OPERAND (t, 0);
1723 /* If this expression can't be addressed (e.g., it contains a reference
1724 to a non-addressable field), show we don't change its alias set. */
1725 if (! can_address_p (t))
1726 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1728 /* If this is a decl, set the attributes of the MEM from it. */
1732 offset = const0_rtx;
1733 size = (DECL_SIZE_UNIT (t)
1734 && host_integerp (DECL_SIZE_UNIT (t), 1)
1735 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1736 align = DECL_ALIGN (t);
1739 /* If this is a constant, we know the alignment. */
1740 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1742 align = TYPE_ALIGN (type);
1743 #ifdef CONSTANT_ALIGNMENT
1744 align = CONSTANT_ALIGNMENT (t, align);
1748 /* If this is a field reference and not a bit-field, record it. */
1749 /* ??? There is some information that can be gleened from bit-fields,
1750 such as the word offset in the structure that might be modified.
1751 But skip it for now. */
1752 else if (TREE_CODE (t) == COMPONENT_REF
1753 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1755 expr = component_ref_for_mem_expr (t);
1756 offset = const0_rtx;
1757 /* ??? Any reason the field size would be different than
1758 the size we got from the type? */
1761 /* If this is an array reference, look for an outer field reference. */
1762 else if (TREE_CODE (t) == ARRAY_REF)
1764 tree off_tree = size_zero_node;
1769 = fold (build (PLUS_EXPR, sizetype,
1770 fold (build (MULT_EXPR, sizetype,
1771 TREE_OPERAND (t, 1),
1772 TYPE_SIZE_UNIT (TREE_TYPE (t)))),
1774 t = TREE_OPERAND (t, 0);
1776 while (TREE_CODE (t) == ARRAY_REF);
1778 if (TREE_CODE (t) == COMPONENT_REF)
1780 expr = component_ref_for_mem_expr (t);
1781 if (host_integerp (off_tree, 1))
1782 offset = GEN_INT (tree_low_cst (off_tree, 1));
1783 /* ??? Any reason the field size would be different than
1784 the size we got from the type? */
1789 /* Now set the attributes we computed above. */
1791 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1793 /* If this is already known to be a scalar or aggregate, we are done. */
1794 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1797 /* If it is a reference into an aggregate, this is part of an aggregate.
1798 Otherwise we don't know. */
1799 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1800 || TREE_CODE (t) == ARRAY_RANGE_REF
1801 || TREE_CODE (t) == BIT_FIELD_REF)
1802 MEM_IN_STRUCT_P (ref) = 1;
1805 /* Set the alias set of MEM to SET. */
1808 set_mem_alias_set (mem, set)
1812 #ifdef ENABLE_CHECKING
1813 /* If the new and old alias sets don't conflict, something is wrong. */
1814 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1818 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1819 MEM_SIZE (mem), MEM_ALIGN (mem),
1823 /* Set the alignment of MEM to ALIGN bits. */
1826 set_mem_align (mem, align)
1830 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1831 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1835 /* Set the expr for MEM to EXPR. */
1838 set_mem_expr (mem, expr)
1843 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1844 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1847 /* Set the offset of MEM to OFFSET. */
1850 set_mem_offset (mem, offset)
1853 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1854 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1858 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1859 and its address changed to ADDR. (VOIDmode means don't change the mode.
1860 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1861 returned memory location is required to be valid. The memory
1862 attributes are not changed. */
1865 change_address_1 (memref, mode, addr, validate)
1867 enum machine_mode mode;
1873 if (GET_CODE (memref) != MEM)
1875 if (mode == VOIDmode)
1876 mode = GET_MODE (memref);
1878 addr = XEXP (memref, 0);
1882 if (reload_in_progress || reload_completed)
1884 if (! memory_address_p (mode, addr))
1888 addr = memory_address (mode, addr);
1891 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1894 new = gen_rtx_MEM (mode, addr);
1895 MEM_COPY_ATTRIBUTES (new, memref);
1899 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1900 way we are changing MEMREF, so we only preserve the alias set. */
1903 change_address (memref, mode, addr)
1905 enum machine_mode mode;
1908 rtx new = change_address_1 (memref, mode, addr, 1);
1909 enum machine_mode mmode = GET_MODE (new);
1912 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1913 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1914 (mmode == BLKmode ? BITS_PER_UNIT
1915 : GET_MODE_ALIGNMENT (mmode)),
1921 /* Return a memory reference like MEMREF, but with its mode changed
1922 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1923 nonzero, the memory address is forced to be valid.
1924 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1925 and caller is responsible for adjusting MEMREF base register. */
1928 adjust_address_1 (memref, mode, offset, validate, adjust)
1930 enum machine_mode mode;
1931 HOST_WIDE_INT offset;
1932 int validate, adjust;
1934 rtx addr = XEXP (memref, 0);
1936 rtx memoffset = MEM_OFFSET (memref);
1938 unsigned int memalign = MEM_ALIGN (memref);
1940 /* ??? Prefer to create garbage instead of creating shared rtl.
1941 This may happen even if offset is non-zero -- consider
1942 (plus (plus reg reg) const_int) -- so do this always. */
1943 addr = copy_rtx (addr);
1947 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1948 object, we can merge it into the LO_SUM. */
1949 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1951 && (unsigned HOST_WIDE_INT) offset
1952 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1953 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1954 plus_constant (XEXP (addr, 1), offset));
1956 addr = plus_constant (addr, offset);
1959 new = change_address_1 (memref, mode, addr, validate);
1961 /* Compute the new values of the memory attributes due to this adjustment.
1962 We add the offsets and update the alignment. */
1964 memoffset = GEN_INT (offset + INTVAL (memoffset));
1966 /* Compute the new alignment by taking the MIN of the alignment and the
1967 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1972 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
1974 /* We can compute the size in a number of ways. */
1975 if (GET_MODE (new) != BLKmode)
1976 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1977 else if (MEM_SIZE (memref))
1978 size = plus_constant (MEM_SIZE (memref), -offset);
1980 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
1981 memoffset, size, memalign, GET_MODE (new));
1983 /* At some point, we should validate that this offset is within the object,
1984 if all the appropriate values are known. */
1988 /* Return a memory reference like MEMREF, but with its mode changed
1989 to MODE and its address changed to ADDR, which is assumed to be
1990 MEMREF offseted by OFFSET bytes. If VALIDATE is
1991 nonzero, the memory address is forced to be valid. */
1994 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
1996 enum machine_mode mode;
1998 HOST_WIDE_INT offset;
2001 memref = change_address_1 (memref, VOIDmode, addr, validate);
2002 return adjust_address_1 (memref, mode, offset, validate, 0);
2005 /* Return a memory reference like MEMREF, but whose address is changed by
2006 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2007 known to be in OFFSET (possibly 1). */
2010 offset_address (memref, offset, pow2)
2015 rtx new, addr = XEXP (memref, 0);
2017 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2019 /* At this point we don't know _why_ the address is invalid. It
2020 could have secondary memory refereces, multiplies or anything.
2022 However, if we did go and rearrange things, we can wind up not
2023 being able to recognize the magic around pic_offset_table_rtx.
2024 This stuff is fragile, and is yet another example of why it is
2025 bad to expose PIC machinery too early. */
2026 if (! memory_address_p (GET_MODE (memref), new)
2027 && GET_CODE (addr) == PLUS
2028 && XEXP (addr, 0) == pic_offset_table_rtx)
2030 addr = force_reg (GET_MODE (addr), addr);
2031 new = simplify_gen_binary (PLUS, Pmode, addr, offset);
2034 update_temp_slot_address (XEXP (memref, 0), new);
2035 new = change_address_1 (memref, VOIDmode, new, 1);
2037 /* Update the alignment to reflect the offset. Reset the offset, which
2040 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2041 MIN (MEM_ALIGN (memref),
2042 (unsigned HOST_WIDE_INT) pow2 * BITS_PER_UNIT),
2047 /* Return a memory reference like MEMREF, but with its address changed to
2048 ADDR. The caller is asserting that the actual piece of memory pointed
2049 to is the same, just the form of the address is being changed, such as
2050 by putting something into a register. */
2053 replace_equiv_address (memref, addr)
2057 /* change_address_1 copies the memory attribute structure without change
2058 and that's exactly what we want here. */
2059 update_temp_slot_address (XEXP (memref, 0), addr);
2060 return change_address_1 (memref, VOIDmode, addr, 1);
2063 /* Likewise, but the reference is not required to be valid. */
2066 replace_equiv_address_nv (memref, addr)
2070 return change_address_1 (memref, VOIDmode, addr, 0);
2073 /* Return a memory reference like MEMREF, but with its mode widened to
2074 MODE and offset by OFFSET. This would be used by targets that e.g.
2075 cannot issue QImode memory operations and have to use SImode memory
2076 operations plus masking logic. */
2079 widen_memory_access (memref, mode, offset)
2081 enum machine_mode mode;
2082 HOST_WIDE_INT offset;
2084 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2085 tree expr = MEM_EXPR (new);
2086 rtx memoffset = MEM_OFFSET (new);
2087 unsigned int size = GET_MODE_SIZE (mode);
2089 /* If we don't know what offset we were at within the expression, then
2090 we can't know if we've overstepped the bounds. */
2096 if (TREE_CODE (expr) == COMPONENT_REF)
2098 tree field = TREE_OPERAND (expr, 1);
2100 if (! DECL_SIZE_UNIT (field))
2106 /* Is the field at least as large as the access? If so, ok,
2107 otherwise strip back to the containing structure. */
2108 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2109 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2110 && INTVAL (memoffset) >= 0)
2113 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2119 expr = TREE_OPERAND (expr, 0);
2120 memoffset = (GEN_INT (INTVAL (memoffset)
2121 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2122 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2125 /* Similarly for the decl. */
2126 else if (DECL_P (expr)
2127 && DECL_SIZE_UNIT (expr)
2128 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2129 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2130 && (! memoffset || INTVAL (memoffset) >= 0))
2134 /* The widened memory access overflows the expression, which means
2135 that it could alias another expression. Zap it. */
2142 memoffset = NULL_RTX;
2144 /* The widened memory may alias other stuff, so zap the alias set. */
2145 /* ??? Maybe use get_alias_set on any remaining expression. */
2147 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2148 MEM_ALIGN (new), mode);
2153 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2160 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2161 NULL, label_num++, NULL, NULL);
2163 LABEL_NUSES (label) = 0;
2164 LABEL_ALTERNATE_NAME (label) = NULL;
2168 /* For procedure integration. */
2170 /* Install new pointers to the first and last insns in the chain.
2171 Also, set cur_insn_uid to one higher than the last in use.
2172 Used for an inline-procedure after copying the insn chain. */
2175 set_new_first_and_last_insn (first, last)
2184 for (insn = first; insn; insn = NEXT_INSN (insn))
2185 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2190 /* Set the range of label numbers found in the current function.
2191 This is used when belatedly compiling an inline function. */
2194 set_new_first_and_last_label_num (first, last)
2197 base_label_num = label_num;
2198 first_label_num = first;
2199 last_label_num = last;
2202 /* Set the last label number found in the current function.
2203 This is used when belatedly compiling an inline function. */
2206 set_new_last_label_num (last)
2209 base_label_num = label_num;
2210 last_label_num = last;
2213 /* Restore all variables describing the current status from the structure *P.
2214 This is used after a nested function. */
2217 restore_emit_status (p)
2218 struct function *p ATTRIBUTE_UNUSED;
2223 /* Go through all the RTL insn bodies and copy any invalid shared
2224 structure. This routine should only be called once. */
2227 unshare_all_rtl (fndecl, insn)
2233 /* Make sure that virtual parameters are not shared. */
2234 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2235 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2237 /* Make sure that virtual stack slots are not shared. */
2238 unshare_all_decls (DECL_INITIAL (fndecl));
2240 /* Unshare just about everything else. */
2241 unshare_all_rtl_1 (insn);
2243 /* Make sure the addresses of stack slots found outside the insn chain
2244 (such as, in DECL_RTL of a variable) are not shared
2245 with the insn chain.
2247 This special care is necessary when the stack slot MEM does not
2248 actually appear in the insn chain. If it does appear, its address
2249 is unshared from all else at that point. */
2250 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2253 /* Go through all the RTL insn bodies and copy any invalid shared
2254 structure, again. This is a fairly expensive thing to do so it
2255 should be done sparingly. */
2258 unshare_all_rtl_again (insn)
2264 for (p = insn; p; p = NEXT_INSN (p))
2267 reset_used_flags (PATTERN (p));
2268 reset_used_flags (REG_NOTES (p));
2269 reset_used_flags (LOG_LINKS (p));
2272 /* Make sure that virtual stack slots are not shared. */
2273 reset_used_decls (DECL_INITIAL (cfun->decl));
2275 /* Make sure that virtual parameters are not shared. */
2276 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2277 reset_used_flags (DECL_RTL (decl));
2279 reset_used_flags (stack_slot_list);
2281 unshare_all_rtl (cfun->decl, insn);
2284 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2285 Assumes the mark bits are cleared at entry. */
2288 unshare_all_rtl_1 (insn)
2291 for (; insn; insn = NEXT_INSN (insn))
2294 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2295 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2296 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2300 /* Go through all virtual stack slots of a function and copy any
2301 shared structure. */
2303 unshare_all_decls (blk)
2308 /* Copy shared decls. */
2309 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2310 if (DECL_RTL_SET_P (t))
2311 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2313 /* Now process sub-blocks. */
2314 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2315 unshare_all_decls (t);
2318 /* Go through all virtual stack slots of a function and mark them as
2321 reset_used_decls (blk)
2327 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2328 if (DECL_RTL_SET_P (t))
2329 reset_used_flags (DECL_RTL (t));
2331 /* Now process sub-blocks. */
2332 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2333 reset_used_decls (t);
2336 /* Similar to `copy_rtx' except that if MAY_SHARE is present, it is
2337 placed in the result directly, rather than being copied. MAY_SHARE is
2338 either a MEM of an EXPR_LIST of MEMs. */
2341 copy_most_rtx (orig, may_share)
2348 const char *format_ptr;
2350 if (orig == may_share
2351 || (GET_CODE (may_share) == EXPR_LIST
2352 && in_expr_list_p (may_share, orig)))
2355 code = GET_CODE (orig);
2373 copy = rtx_alloc (code);
2374 PUT_MODE (copy, GET_MODE (orig));
2375 RTX_FLAG (copy, in_struct) = RTX_FLAG (orig, in_struct);
2376 RTX_FLAG (copy, volatil) = RTX_FLAG (orig, volatil);
2377 RTX_FLAG (copy, unchanging) = RTX_FLAG (orig, unchanging);
2378 RTX_FLAG (copy, integrated) = RTX_FLAG (orig, integrated);
2379 RTX_FLAG (copy, frame_related) = RTX_FLAG (orig, frame_related);
2381 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
2383 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
2385 switch (*format_ptr++)
2388 XEXP (copy, i) = XEXP (orig, i);
2389 if (XEXP (orig, i) != NULL && XEXP (orig, i) != may_share)
2390 XEXP (copy, i) = copy_most_rtx (XEXP (orig, i), may_share);
2394 XEXP (copy, i) = XEXP (orig, i);
2399 XVEC (copy, i) = XVEC (orig, i);
2400 if (XVEC (orig, i) != NULL)
2402 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
2403 for (j = 0; j < XVECLEN (copy, i); j++)
2404 XVECEXP (copy, i, j)
2405 = copy_most_rtx (XVECEXP (orig, i, j), may_share);
2410 XWINT (copy, i) = XWINT (orig, i);
2415 XINT (copy, i) = XINT (orig, i);
2419 XTREE (copy, i) = XTREE (orig, i);
2424 XSTR (copy, i) = XSTR (orig, i);
2428 /* Copy this through the wide int field; that's safest. */
2429 X0WINT (copy, i) = X0WINT (orig, i);
2439 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2440 Recursively does the same for subexpressions. */
2443 copy_rtx_if_shared (orig)
2449 const char *format_ptr;
2455 code = GET_CODE (x);
2457 /* These types may be freely shared. */
2471 /* SCRATCH must be shared because they represent distinct values. */
2475 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2476 a LABEL_REF, it isn't sharable. */
2477 if (GET_CODE (XEXP (x, 0)) == PLUS
2478 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2479 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2488 /* The chain of insns is not being copied. */
2492 /* A MEM is allowed to be shared if its address is constant.
2494 We used to allow sharing of MEMs which referenced
2495 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2496 that can lose. instantiate_virtual_regs will not unshare
2497 the MEMs, and combine may change the structure of the address
2498 because it looks safe and profitable in one context, but
2499 in some other context it creates unrecognizable RTL. */
2500 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2509 /* This rtx may not be shared. If it has already been seen,
2510 replace it with a copy of itself. */
2512 if (RTX_FLAG (x, used))
2516 copy = rtx_alloc (code);
2518 (sizeof (*copy) - sizeof (copy->fld)
2519 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2523 RTX_FLAG (x, used) = 1;
2525 /* Now scan the subexpressions recursively.
2526 We can store any replaced subexpressions directly into X
2527 since we know X is not shared! Any vectors in X
2528 must be copied if X was copied. */
2530 format_ptr = GET_RTX_FORMAT (code);
2532 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2534 switch (*format_ptr++)
2537 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2541 if (XVEC (x, i) != NULL)
2544 int len = XVECLEN (x, i);
2546 if (copied && len > 0)
2547 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2548 for (j = 0; j < len; j++)
2549 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2557 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2558 to look for shared sub-parts. */
2561 reset_used_flags (x)
2566 const char *format_ptr;
2571 code = GET_CODE (x);
2573 /* These types may be freely shared so we needn't do any resetting
2595 /* The chain of insns is not being copied. */
2602 RTX_FLAG (x, used) = 0;
2604 format_ptr = GET_RTX_FORMAT (code);
2605 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2607 switch (*format_ptr++)
2610 reset_used_flags (XEXP (x, i));
2614 for (j = 0; j < XVECLEN (x, i); j++)
2615 reset_used_flags (XVECEXP (x, i, j));
2621 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2622 Return X or the rtx for the pseudo reg the value of X was copied into.
2623 OTHER must be valid as a SET_DEST. */
2626 make_safe_from (x, other)
2630 switch (GET_CODE (other))
2633 other = SUBREG_REG (other);
2635 case STRICT_LOW_PART:
2638 other = XEXP (other, 0);
2644 if ((GET_CODE (other) == MEM
2646 && GET_CODE (x) != REG
2647 && GET_CODE (x) != SUBREG)
2648 || (GET_CODE (other) == REG
2649 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2650 || reg_mentioned_p (other, x))))
2652 rtx temp = gen_reg_rtx (GET_MODE (x));
2653 emit_move_insn (temp, x);
2659 /* Emission of insns (adding them to the doubly-linked list). */
2661 /* Return the first insn of the current sequence or current function. */
2669 /* Specify a new insn as the first in the chain. */
2672 set_first_insn (insn)
2675 if (PREV_INSN (insn) != 0)
2680 /* Return the last insn emitted in current sequence or current function. */
2688 /* Specify a new insn as the last in the chain. */
2691 set_last_insn (insn)
2694 if (NEXT_INSN (insn) != 0)
2699 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2702 get_last_insn_anywhere ()
2704 struct sequence_stack *stack;
2707 for (stack = seq_stack; stack; stack = stack->next)
2708 if (stack->last != 0)
2713 /* Return the first nonnote insn emitted in current sequence or current
2714 function. This routine looks inside SEQUENCEs. */
2717 get_first_nonnote_insn ()
2719 rtx insn = first_insn;
2723 insn = next_insn (insn);
2724 if (insn == 0 || GET_CODE (insn) != NOTE)
2731 /* Return the last nonnote insn emitted in current sequence or current
2732 function. This routine looks inside SEQUENCEs. */
2735 get_last_nonnote_insn ()
2737 rtx insn = last_insn;
2741 insn = previous_insn (insn);
2742 if (insn == 0 || GET_CODE (insn) != NOTE)
2749 /* Return a number larger than any instruction's uid in this function. */
2754 return cur_insn_uid;
2757 /* Renumber instructions so that no instruction UIDs are wasted. */
2760 renumber_insns (stream)
2765 /* If we're not supposed to renumber instructions, don't. */
2766 if (!flag_renumber_insns)
2769 /* If there aren't that many instructions, then it's not really
2770 worth renumbering them. */
2771 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2776 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2779 fprintf (stream, "Renumbering insn %d to %d\n",
2780 INSN_UID (insn), cur_insn_uid);
2781 INSN_UID (insn) = cur_insn_uid++;
2785 /* Return the next insn. If it is a SEQUENCE, return the first insn
2794 insn = NEXT_INSN (insn);
2795 if (insn && GET_CODE (insn) == INSN
2796 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2797 insn = XVECEXP (PATTERN (insn), 0, 0);
2803 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2807 previous_insn (insn)
2812 insn = PREV_INSN (insn);
2813 if (insn && GET_CODE (insn) == INSN
2814 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2815 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2821 /* Return the next insn after INSN that is not a NOTE. This routine does not
2822 look inside SEQUENCEs. */
2825 next_nonnote_insn (insn)
2830 insn = NEXT_INSN (insn);
2831 if (insn == 0 || GET_CODE (insn) != NOTE)
2838 /* Return the previous insn before INSN that is not a NOTE. This routine does
2839 not look inside SEQUENCEs. */
2842 prev_nonnote_insn (insn)
2847 insn = PREV_INSN (insn);
2848 if (insn == 0 || GET_CODE (insn) != NOTE)
2855 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2856 or 0, if there is none. This routine does not look inside
2860 next_real_insn (insn)
2865 insn = NEXT_INSN (insn);
2866 if (insn == 0 || GET_CODE (insn) == INSN
2867 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2874 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2875 or 0, if there is none. This routine does not look inside
2879 prev_real_insn (insn)
2884 insn = PREV_INSN (insn);
2885 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2886 || GET_CODE (insn) == JUMP_INSN)
2893 /* Find the next insn after INSN that really does something. This routine
2894 does not look inside SEQUENCEs. Until reload has completed, this is the
2895 same as next_real_insn. */
2898 active_insn_p (insn)
2901 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2902 || (GET_CODE (insn) == INSN
2903 && (! reload_completed
2904 || (GET_CODE (PATTERN (insn)) != USE
2905 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2909 next_active_insn (insn)
2914 insn = NEXT_INSN (insn);
2915 if (insn == 0 || active_insn_p (insn))
2922 /* Find the last insn before INSN that really does something. This routine
2923 does not look inside SEQUENCEs. Until reload has completed, this is the
2924 same as prev_real_insn. */
2927 prev_active_insn (insn)
2932 insn = PREV_INSN (insn);
2933 if (insn == 0 || active_insn_p (insn))
2940 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2948 insn = NEXT_INSN (insn);
2949 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2956 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2964 insn = PREV_INSN (insn);
2965 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2973 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2974 and REG_CC_USER notes so we can find it. */
2977 link_cc0_insns (insn)
2980 rtx user = next_nonnote_insn (insn);
2982 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2983 user = XVECEXP (PATTERN (user), 0, 0);
2985 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2987 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2990 /* Return the next insn that uses CC0 after INSN, which is assumed to
2991 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2992 applied to the result of this function should yield INSN).
2994 Normally, this is simply the next insn. However, if a REG_CC_USER note
2995 is present, it contains the insn that uses CC0.
2997 Return 0 if we can't find the insn. */
3000 next_cc0_user (insn)
3003 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3006 return XEXP (note, 0);
3008 insn = next_nonnote_insn (insn);
3009 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
3010 insn = XVECEXP (PATTERN (insn), 0, 0);
3012 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3018 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3019 note, it is the previous insn. */
3022 prev_cc0_setter (insn)
3025 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3028 return XEXP (note, 0);
3030 insn = prev_nonnote_insn (insn);
3031 if (! sets_cc0_p (PATTERN (insn)))
3038 /* Increment the label uses for all labels present in rtx. */
3041 mark_label_nuses (x)
3048 code = GET_CODE (x);
3049 if (code == LABEL_REF)
3050 LABEL_NUSES (XEXP (x, 0))++;
3052 fmt = GET_RTX_FORMAT (code);
3053 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3056 mark_label_nuses (XEXP (x, i));
3057 else if (fmt[i] == 'E')
3058 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3059 mark_label_nuses (XVECEXP (x, i, j));
3064 /* Try splitting insns that can be split for better scheduling.
3065 PAT is the pattern which might split.
3066 TRIAL is the insn providing PAT.
3067 LAST is non-zero if we should return the last insn of the sequence produced.
3069 If this routine succeeds in splitting, it returns the first or last
3070 replacement insn depending on the value of LAST. Otherwise, it
3071 returns TRIAL. If the insn to be returned can be split, it will be. */
3074 try_split (pat, trial, last)
3078 rtx before = PREV_INSN (trial);
3079 rtx after = NEXT_INSN (trial);
3080 int has_barrier = 0;
3085 if (any_condjump_p (trial)
3086 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3087 split_branch_probability = INTVAL (XEXP (note, 0));
3088 probability = split_branch_probability;
3090 seq = split_insns (pat, trial);
3092 split_branch_probability = -1;
3094 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3095 We may need to handle this specially. */
3096 if (after && GET_CODE (after) == BARRIER)
3099 after = NEXT_INSN (after);
3104 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
3105 The latter case will normally arise only when being done so that
3106 it, in turn, will be split (SFmode on the 29k is an example). */
3107 if (GET_CODE (seq) == SEQUENCE)
3111 /* Avoid infinite loop if any insn of the result matches
3112 the original pattern. */
3113 for (i = 0; i < XVECLEN (seq, 0); i++)
3114 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
3115 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
3119 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3120 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
3122 rtx insn = XVECEXP (seq, 0, i);
3123 mark_jump_label (PATTERN (insn),
3124 XVECEXP (seq, 0, i), 0);
3126 if (probability != -1
3127 && any_condjump_p (insn)
3128 && !find_reg_note (insn, REG_BR_PROB, 0))
3130 /* We can preserve the REG_BR_PROB notes only if exactly
3131 one jump is created, otherwise the machine description
3132 is responsible for this step using
3133 split_branch_probability variable. */
3137 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3138 GEN_INT (probability),
3143 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3144 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3145 if (GET_CODE (trial) == CALL_INSN)
3146 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3147 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
3148 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
3149 = CALL_INSN_FUNCTION_USAGE (trial);
3151 /* Copy notes, particularly those related to the CFG. */
3152 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3154 switch (REG_NOTE_KIND (note))
3157 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3159 rtx insn = XVECEXP (seq, 0, i);
3160 if (GET_CODE (insn) == CALL_INSN
3161 || (flag_non_call_exceptions
3162 && may_trap_p (PATTERN (insn))))
3164 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3172 case REG_ALWAYS_RETURN:
3173 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3175 rtx insn = XVECEXP (seq, 0, i);
3176 if (GET_CODE (insn) == CALL_INSN)
3178 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3184 case REG_NON_LOCAL_GOTO:
3185 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3187 rtx insn = XVECEXP (seq, 0, i);
3188 if (GET_CODE (insn) == JUMP_INSN)
3190 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3201 /* If there are LABELS inside the split insns increment the
3202 usage count so we don't delete the label. */
3203 if (GET_CODE (trial) == INSN)
3204 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3205 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
3206 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
3208 tem = emit_insn_after_scope (seq, trial, INSN_SCOPE (trial));
3210 delete_insn (trial);
3212 emit_barrier_after (tem);
3214 /* Recursively call try_split for each new insn created; by the
3215 time control returns here that insn will be fully split, so
3216 set LAST and continue from the insn after the one returned.
3217 We can't use next_active_insn here since AFTER may be a note.
3218 Ignore deleted insns, which can be occur if not optimizing. */
3219 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3220 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3221 tem = try_split (PATTERN (tem), tem, 1);
3223 /* Avoid infinite loop if the result matches the original pattern. */
3224 else if (rtx_equal_p (seq, pat))
3228 PATTERN (trial) = seq;
3229 INSN_CODE (trial) = -1;
3230 try_split (seq, trial, last);
3233 /* Return either the first or the last insn, depending on which was
3236 ? (after ? PREV_INSN (after) : last_insn)
3237 : NEXT_INSN (before);
3243 /* Make and return an INSN rtx, initializing all its slots.
3244 Store PATTERN in the pattern slots. */
3247 make_insn_raw (pattern)
3252 insn = rtx_alloc (INSN);
3254 INSN_UID (insn) = cur_insn_uid++;
3255 PATTERN (insn) = pattern;
3256 INSN_CODE (insn) = -1;
3257 LOG_LINKS (insn) = NULL;
3258 REG_NOTES (insn) = NULL;
3259 INSN_SCOPE (insn) = NULL;
3260 BLOCK_FOR_INSN (insn) = NULL;
3262 #ifdef ENABLE_RTL_CHECKING
3265 && (returnjump_p (insn)
3266 || (GET_CODE (insn) == SET
3267 && SET_DEST (insn) == pc_rtx)))
3269 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3277 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
3280 make_jump_insn_raw (pattern)
3285 insn = rtx_alloc (JUMP_INSN);
3286 INSN_UID (insn) = cur_insn_uid++;
3288 PATTERN (insn) = pattern;
3289 INSN_CODE (insn) = -1;
3290 LOG_LINKS (insn) = NULL;
3291 REG_NOTES (insn) = NULL;
3292 JUMP_LABEL (insn) = NULL;
3293 INSN_SCOPE (insn) = NULL;
3294 BLOCK_FOR_INSN (insn) = NULL;
3299 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
3302 make_call_insn_raw (pattern)
3307 insn = rtx_alloc (CALL_INSN);
3308 INSN_UID (insn) = cur_insn_uid++;
3310 PATTERN (insn) = pattern;
3311 INSN_CODE (insn) = -1;
3312 LOG_LINKS (insn) = NULL;
3313 REG_NOTES (insn) = NULL;
3314 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3315 INSN_SCOPE (insn) = NULL;
3316 BLOCK_FOR_INSN (insn) = NULL;
3321 /* Add INSN to the end of the doubly-linked list.
3322 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3328 PREV_INSN (insn) = last_insn;
3329 NEXT_INSN (insn) = 0;
3331 if (NULL != last_insn)
3332 NEXT_INSN (last_insn) = insn;
3334 if (NULL == first_insn)
3340 /* Add INSN into the doubly-linked list after insn AFTER. This and
3341 the next should be the only functions called to insert an insn once
3342 delay slots have been filled since only they know how to update a
3346 add_insn_after (insn, after)
3349 rtx next = NEXT_INSN (after);
3352 if (optimize && INSN_DELETED_P (after))
3355 NEXT_INSN (insn) = next;
3356 PREV_INSN (insn) = after;
3360 PREV_INSN (next) = insn;
3361 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3362 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3364 else if (last_insn == after)
3368 struct sequence_stack *stack = seq_stack;
3369 /* Scan all pending sequences too. */
3370 for (; stack; stack = stack->next)
3371 if (after == stack->last)
3381 if (GET_CODE (after) != BARRIER
3382 && GET_CODE (insn) != BARRIER
3383 && (bb = BLOCK_FOR_INSN (after)))
3385 set_block_for_insn (insn, bb);
3387 bb->flags |= BB_DIRTY;
3388 /* Should not happen as first in the BB is always
3389 either NOTE or LABEL. */
3390 if (bb->end == after
3391 /* Avoid clobbering of structure when creating new BB. */
3392 && GET_CODE (insn) != BARRIER
3393 && (GET_CODE (insn) != NOTE
3394 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3398 NEXT_INSN (after) = insn;
3399 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3401 rtx sequence = PATTERN (after);
3402 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3406 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3407 the previous should be the only functions called to insert an insn once
3408 delay slots have been filled since only they know how to update a
3412 add_insn_before (insn, before)
3415 rtx prev = PREV_INSN (before);
3418 if (optimize && INSN_DELETED_P (before))
3421 PREV_INSN (insn) = prev;
3422 NEXT_INSN (insn) = before;
3426 NEXT_INSN (prev) = insn;
3427 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3429 rtx sequence = PATTERN (prev);
3430 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3433 else if (first_insn == before)
3437 struct sequence_stack *stack = seq_stack;
3438 /* Scan all pending sequences too. */
3439 for (; stack; stack = stack->next)
3440 if (before == stack->first)
3442 stack->first = insn;
3450 if (GET_CODE (before) != BARRIER
3451 && GET_CODE (insn) != BARRIER
3452 && (bb = BLOCK_FOR_INSN (before)))
3454 set_block_for_insn (insn, bb);
3456 bb->flags |= BB_DIRTY;
3457 /* Should not happen as first in the BB is always
3458 either NOTE or LABEl. */
3459 if (bb->head == insn
3460 /* Avoid clobbering of structure when creating new BB. */
3461 && GET_CODE (insn) != BARRIER
3462 && (GET_CODE (insn) != NOTE
3463 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3467 PREV_INSN (before) = insn;
3468 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3469 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3472 /* Remove an insn from its doubly-linked list. This function knows how
3473 to handle sequences. */
3478 rtx next = NEXT_INSN (insn);
3479 rtx prev = PREV_INSN (insn);
3484 NEXT_INSN (prev) = next;
3485 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3487 rtx sequence = PATTERN (prev);
3488 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3491 else if (first_insn == insn)
3495 struct sequence_stack *stack = seq_stack;
3496 /* Scan all pending sequences too. */
3497 for (; stack; stack = stack->next)
3498 if (insn == stack->first)
3500 stack->first = next;
3510 PREV_INSN (next) = prev;
3511 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3512 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3514 else if (last_insn == insn)
3518 struct sequence_stack *stack = seq_stack;
3519 /* Scan all pending sequences too. */
3520 for (; stack; stack = stack->next)
3521 if (insn == stack->last)
3530 if (GET_CODE (insn) != BARRIER
3531 && (bb = BLOCK_FOR_INSN (insn)))
3534 bb->flags |= BB_DIRTY;
3535 if (bb->head == insn)
3537 /* Never ever delete the basic block note without deleting whole
3539 if (GET_CODE (insn) == NOTE)
3543 if (bb->end == insn)
3548 /* Delete all insns made since FROM.
3549 FROM becomes the new last instruction. */
3552 delete_insns_since (from)
3558 NEXT_INSN (from) = 0;
3562 /* This function is deprecated, please use sequences instead.
3564 Move a consecutive bunch of insns to a different place in the chain.
3565 The insns to be moved are those between FROM and TO.
3566 They are moved to a new position after the insn AFTER.
3567 AFTER must not be FROM or TO or any insn in between.
3569 This function does not know about SEQUENCEs and hence should not be
3570 called after delay-slot filling has been done. */
3573 reorder_insns_nobb (from, to, after)
3574 rtx from, to, after;
3576 /* Splice this bunch out of where it is now. */
3577 if (PREV_INSN (from))
3578 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3580 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3581 if (last_insn == to)
3582 last_insn = PREV_INSN (from);
3583 if (first_insn == from)
3584 first_insn = NEXT_INSN (to);
3586 /* Make the new neighbors point to it and it to them. */
3587 if (NEXT_INSN (after))
3588 PREV_INSN (NEXT_INSN (after)) = to;
3590 NEXT_INSN (to) = NEXT_INSN (after);
3591 PREV_INSN (from) = after;
3592 NEXT_INSN (after) = from;
3593 if (after == last_insn)
3597 /* Same as function above, but take care to update BB boundaries. */
3599 reorder_insns (from, to, after)
3600 rtx from, to, after;
3602 rtx prev = PREV_INSN (from);
3603 basic_block bb, bb2;
3605 reorder_insns_nobb (from, to, after);
3607 if (GET_CODE (after) != BARRIER
3608 && (bb = BLOCK_FOR_INSN (after)))
3611 bb->flags |= BB_DIRTY;
3613 if (GET_CODE (from) != BARRIER
3614 && (bb2 = BLOCK_FOR_INSN (from)))
3618 bb2->flags |= BB_DIRTY;
3621 if (bb->end == after)
3624 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3625 set_block_for_insn (x, bb);
3629 /* Return the line note insn preceding INSN. */
3632 find_line_note (insn)
3635 if (no_line_numbers)
3638 for (; insn; insn = PREV_INSN (insn))
3639 if (GET_CODE (insn) == NOTE
3640 && NOTE_LINE_NUMBER (insn) >= 0)
3646 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3647 of the moved insns when debugging. This may insert a note between AFTER
3648 and FROM, and another one after TO. */
3651 reorder_insns_with_line_notes (from, to, after)
3652 rtx from, to, after;
3654 rtx from_line = find_line_note (from);
3655 rtx after_line = find_line_note (after);
3657 reorder_insns (from, to, after);
3659 if (from_line == after_line)
3663 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3664 NOTE_LINE_NUMBER (from_line),
3667 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3668 NOTE_LINE_NUMBER (after_line),
3672 /* Remove unnecessary notes from the instruction stream. */
3675 remove_unnecessary_notes ()
3677 rtx block_stack = NULL_RTX;
3678 rtx eh_stack = NULL_RTX;
3683 /* We must not remove the first instruction in the function because
3684 the compiler depends on the first instruction being a note. */
3685 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3687 /* Remember what's next. */
3688 next = NEXT_INSN (insn);
3690 /* We're only interested in notes. */
3691 if (GET_CODE (insn) != NOTE)
3694 switch (NOTE_LINE_NUMBER (insn))
3696 case NOTE_INSN_DELETED:
3697 case NOTE_INSN_LOOP_END_TOP_COND:
3701 case NOTE_INSN_EH_REGION_BEG:
3702 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3705 case NOTE_INSN_EH_REGION_END:
3706 /* Too many end notes. */
3707 if (eh_stack == NULL_RTX)
3709 /* Mismatched nesting. */
3710 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3713 eh_stack = XEXP (eh_stack, 1);
3714 free_INSN_LIST_node (tmp);
3717 case NOTE_INSN_BLOCK_BEG:
3718 /* By now, all notes indicating lexical blocks should have
3719 NOTE_BLOCK filled in. */
3720 if (NOTE_BLOCK (insn) == NULL_TREE)
3722 block_stack = alloc_INSN_LIST (insn, block_stack);
3725 case NOTE_INSN_BLOCK_END:
3726 /* Too many end notes. */
3727 if (block_stack == NULL_RTX)
3729 /* Mismatched nesting. */
3730 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3733 block_stack = XEXP (block_stack, 1);
3734 free_INSN_LIST_node (tmp);
3736 /* Scan back to see if there are any non-note instructions
3737 between INSN and the beginning of this block. If not,
3738 then there is no PC range in the generated code that will
3739 actually be in this block, so there's no point in
3740 remembering the existence of the block. */
3741 for (tmp = PREV_INSN (insn); tmp; tmp = PREV_INSN (tmp))
3743 /* This block contains a real instruction. Note that we
3744 don't include labels; if the only thing in the block
3745 is a label, then there are still no PC values that
3746 lie within the block. */
3750 /* We're only interested in NOTEs. */
3751 if (GET_CODE (tmp) != NOTE)
3754 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3756 /* We just verified that this BLOCK matches us with
3757 the block_stack check above. Never delete the
3758 BLOCK for the outermost scope of the function; we
3759 can refer to names from that scope even if the
3760 block notes are messed up. */
3761 if (! is_body_block (NOTE_BLOCK (insn))
3762 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3769 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3770 /* There's a nested block. We need to leave the
3771 current block in place since otherwise the debugger
3772 wouldn't be able to show symbols from our block in
3773 the nested block. */
3779 /* Too many begin notes. */
3780 if (block_stack || eh_stack)
3785 /* Emit an insn of given code and pattern
3786 at a specified place within the doubly-linked list. */
3788 /* Make an instruction with body PATTERN
3789 and output it before the instruction BEFORE. */
3792 emit_insn_before (pattern, before)
3793 rtx pattern, before;
3797 if (GET_CODE (pattern) == SEQUENCE)
3801 for (i = 0; i < XVECLEN (pattern, 0); i++)
3803 insn = XVECEXP (pattern, 0, i);
3804 add_insn_before (insn, before);
3809 insn = make_insn_raw (pattern);
3810 add_insn_before (insn, before);
3816 /* Make an instruction with body PATTERN and code JUMP_INSN
3817 and output it before the instruction BEFORE. */
3820 emit_jump_insn_before (pattern, before)
3821 rtx pattern, before;
3825 if (GET_CODE (pattern) == SEQUENCE)
3826 insn = emit_insn_before (pattern, before);
3829 insn = make_jump_insn_raw (pattern);
3830 add_insn_before (insn, before);
3836 /* Make an instruction with body PATTERN and code CALL_INSN
3837 and output it before the instruction BEFORE. */
3840 emit_call_insn_before (pattern, before)
3841 rtx pattern, before;
3845 if (GET_CODE (pattern) == SEQUENCE)
3846 insn = emit_insn_before (pattern, before);
3849 insn = make_call_insn_raw (pattern);
3850 add_insn_before (insn, before);
3851 PUT_CODE (insn, CALL_INSN);
3857 /* Make an instruction with body PATTERN and code CALL_INSN
3858 and output it before the instruction BEFORE. */
3861 emit_call_insn_after (pattern, before)
3862 rtx pattern, before;
3866 if (GET_CODE (pattern) == SEQUENCE)
3867 insn = emit_insn_after (pattern, before);
3870 insn = make_call_insn_raw (pattern);
3871 add_insn_after (insn, before);
3872 PUT_CODE (insn, CALL_INSN);
3878 /* Make an insn of code BARRIER
3879 and output it before the insn BEFORE. */
3882 emit_barrier_before (before)
3885 rtx insn = rtx_alloc (BARRIER);
3887 INSN_UID (insn) = cur_insn_uid++;
3889 add_insn_before (insn, before);
3893 /* Emit the label LABEL before the insn BEFORE. */
3896 emit_label_before (label, before)
3899 /* This can be called twice for the same label as a result of the
3900 confusion that follows a syntax error! So make it harmless. */
3901 if (INSN_UID (label) == 0)
3903 INSN_UID (label) = cur_insn_uid++;
3904 add_insn_before (label, before);
3910 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3913 emit_note_before (subtype, before)
3917 rtx note = rtx_alloc (NOTE);
3918 INSN_UID (note) = cur_insn_uid++;
3919 NOTE_SOURCE_FILE (note) = 0;
3920 NOTE_LINE_NUMBER (note) = subtype;
3921 BLOCK_FOR_INSN (note) = NULL;
3923 add_insn_before (note, before);
3927 /* Make an insn of code INSN with body PATTERN
3928 and output it after the insn AFTER. */
3931 emit_insn_after (pattern, after)
3936 if (GET_CODE (pattern) == SEQUENCE)
3940 for (i = 0; i < XVECLEN (pattern, 0); i++)
3942 insn = XVECEXP (pattern, 0, i);
3943 add_insn_after (insn, after);
3949 insn = make_insn_raw (pattern);
3950 add_insn_after (insn, after);
3956 /* Similar to emit_insn_after, except that line notes are to be inserted so
3957 as to act as if this insn were at FROM. */
3960 emit_insn_after_with_line_notes (pattern, after, from)
3961 rtx pattern, after, from;
3963 rtx from_line = find_line_note (from);
3964 rtx after_line = find_line_note (after);
3965 rtx insn = emit_insn_after (pattern, after);
3968 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3969 NOTE_LINE_NUMBER (from_line),
3973 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3974 NOTE_LINE_NUMBER (after_line),
3978 /* Make an insn of code JUMP_INSN with body PATTERN
3979 and output it after the insn AFTER. */
3982 emit_jump_insn_after (pattern, after)
3987 if (GET_CODE (pattern) == SEQUENCE)
3988 insn = emit_insn_after (pattern, after);
3991 insn = make_jump_insn_raw (pattern);
3992 add_insn_after (insn, after);
3998 /* Make an insn of code BARRIER
3999 and output it after the insn AFTER. */
4002 emit_barrier_after (after)
4005 rtx insn = rtx_alloc (BARRIER);
4007 INSN_UID (insn) = cur_insn_uid++;
4009 add_insn_after (insn, after);
4013 /* Emit the label LABEL after the insn AFTER. */
4016 emit_label_after (label, after)
4019 /* This can be called twice for the same label
4020 as a result of the confusion that follows a syntax error!
4021 So make it harmless. */
4022 if (INSN_UID (label) == 0)
4024 INSN_UID (label) = cur_insn_uid++;
4025 add_insn_after (label, after);
4031 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4034 emit_note_after (subtype, after)
4038 rtx note = rtx_alloc (NOTE);
4039 INSN_UID (note) = cur_insn_uid++;
4040 NOTE_SOURCE_FILE (note) = 0;
4041 NOTE_LINE_NUMBER (note) = subtype;
4042 BLOCK_FOR_INSN (note) = NULL;
4043 add_insn_after (note, after);
4047 /* Emit a line note for FILE and LINE after the insn AFTER. */
4050 emit_line_note_after (file, line, after)
4057 if (no_line_numbers && line > 0)
4063 note = rtx_alloc (NOTE);
4064 INSN_UID (note) = cur_insn_uid++;
4065 NOTE_SOURCE_FILE (note) = file;
4066 NOTE_LINE_NUMBER (note) = line;
4067 BLOCK_FOR_INSN (note) = NULL;
4068 add_insn_after (note, after);
4072 /* Like emit_insn_after, but set INSN_SCOPE according to SCOPE. */
4074 emit_insn_after_scope (pattern, after, scope)
4078 rtx last = emit_insn_after (pattern, after);
4079 for (after = NEXT_INSN (after); after != last; after = NEXT_INSN (after))
4080 INSN_SCOPE (after) = scope;
4084 /* Like emit_insns_after, but set INSN_SCOPE according to SCOPE. */
4086 emit_insns_after_scope (pattern, after, scope)
4090 rtx last = emit_insns_after (pattern, after);
4091 for (after = NEXT_INSN (after); after != last; after = NEXT_INSN (after))
4092 INSN_SCOPE (after) = scope;
4096 /* Like emit_jump_insn_after, but set INSN_SCOPE according to SCOPE. */
4098 emit_jump_insn_after_scope (pattern, after, scope)
4102 rtx last = emit_jump_insn_after (pattern, after);
4103 for (after = NEXT_INSN (after); after != last; after = NEXT_INSN (after))
4104 INSN_SCOPE (after) = scope;
4108 /* Like emit_call_insn_after, but set INSN_SCOPE according to SCOPE. */
4110 emit_call_insn_after_scope (pattern, after, scope)
4114 rtx last = emit_call_insn_after (pattern, after);
4115 for (after = NEXT_INSN (after); after != last; after = NEXT_INSN (after))
4116 INSN_SCOPE (after) = scope;
4120 /* Like emit_insn_before, but set INSN_SCOPE according to SCOPE. */
4122 emit_insn_before_scope (pattern, before, scope)
4123 rtx pattern, before;
4126 rtx first = PREV_INSN (before);
4127 rtx last = emit_insn_before (pattern, before);
4129 for (first = NEXT_INSN (first); first != last; first = NEXT_INSN (first))
4130 INSN_SCOPE (first) = scope;
4134 /* Like emit_insns_before, but set INSN_SCOPE according to SCOPE. */
4136 emit_insns_before_scope (pattern, before, scope)
4137 rtx pattern, before;
4140 rtx first = PREV_INSN (before);
4141 rtx last = emit_insns_before (pattern, before);
4143 for (first = NEXT_INSN (first); first != last; first = NEXT_INSN (first))
4144 INSN_SCOPE (first) = scope;
4148 /* Make an insn of code INSN with pattern PATTERN
4149 and add it to the end of the doubly-linked list.
4150 If PATTERN is a SEQUENCE, take the elements of it
4151 and emit an insn for each element.
4153 Returns the last insn emitted. */
4159 rtx insn = last_insn;
4161 if (GET_CODE (pattern) == SEQUENCE)
4165 for (i = 0; i < XVECLEN (pattern, 0); i++)
4167 insn = XVECEXP (pattern, 0, i);
4173 insn = make_insn_raw (pattern);
4180 /* Emit the insns in a chain starting with INSN.
4181 Return the last insn emitted. */
4191 rtx next = NEXT_INSN (insn);
4200 /* Emit the insns in a chain starting with INSN and place them in front of
4201 the insn BEFORE. Return the last insn emitted. */
4204 emit_insns_before (insn, before)
4212 rtx next = NEXT_INSN (insn);
4213 add_insn_before (insn, before);
4221 /* Emit the insns in a chain starting with FIRST and place them in back of
4222 the insn AFTER. Return the last insn emitted. */
4225 emit_insns_after (first, after)
4239 if (GET_CODE (after) != BARRIER
4240 && (bb = BLOCK_FOR_INSN (after)))
4242 bb->flags |= BB_DIRTY;
4243 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4244 if (GET_CODE (last) != BARRIER)
4245 set_block_for_insn (last, bb);
4246 if (GET_CODE (last) != BARRIER)
4247 set_block_for_insn (last, bb);
4248 if (bb->end == after)
4252 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4255 after_after = NEXT_INSN (after);
4257 NEXT_INSN (after) = first;
4258 PREV_INSN (first) = after;
4259 NEXT_INSN (last) = after_after;
4261 PREV_INSN (after_after) = last;
4263 if (after == last_insn)
4268 /* Make an insn of code JUMP_INSN with pattern PATTERN
4269 and add it to the end of the doubly-linked list. */
4272 emit_jump_insn (pattern)
4275 if (GET_CODE (pattern) == SEQUENCE)
4276 return emit_insn (pattern);
4279 rtx insn = make_jump_insn_raw (pattern);
4285 /* Make an insn of code CALL_INSN with pattern PATTERN
4286 and add it to the end of the doubly-linked list. */
4289 emit_call_insn (pattern)
4292 if (GET_CODE (pattern) == SEQUENCE)
4293 return emit_insn (pattern);
4296 rtx insn = make_call_insn_raw (pattern);
4298 PUT_CODE (insn, CALL_INSN);
4303 /* Add the label LABEL to the end of the doubly-linked list. */
4309 /* This can be called twice for the same label
4310 as a result of the confusion that follows a syntax error!
4311 So make it harmless. */
4312 if (INSN_UID (label) == 0)
4314 INSN_UID (label) = cur_insn_uid++;
4320 /* Make an insn of code BARRIER
4321 and add it to the end of the doubly-linked list. */
4326 rtx barrier = rtx_alloc (BARRIER);
4327 INSN_UID (barrier) = cur_insn_uid++;
4332 /* Make an insn of code NOTE
4333 with data-fields specified by FILE and LINE
4334 and add it to the end of the doubly-linked list,
4335 but only if line-numbers are desired for debugging info. */
4338 emit_line_note (file, line)
4342 set_file_and_line_for_stmt (file, line);
4345 if (no_line_numbers)
4349 return emit_note (file, line);
4352 /* Make an insn of code NOTE
4353 with data-fields specified by FILE and LINE
4354 and add it to the end of the doubly-linked list.
4355 If it is a line-number NOTE, omit it if it matches the previous one. */
4358 emit_note (file, line)
4366 if (file && last_filename && !strcmp (file, last_filename)
4367 && line == last_linenum)
4369 last_filename = file;
4370 last_linenum = line;
4373 if (no_line_numbers && line > 0)
4379 note = rtx_alloc (NOTE);
4380 INSN_UID (note) = cur_insn_uid++;
4381 NOTE_SOURCE_FILE (note) = file;
4382 NOTE_LINE_NUMBER (note) = line;
4383 BLOCK_FOR_INSN (note) = NULL;
4388 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4391 emit_line_note_force (file, line)
4396 return emit_line_note (file, line);
4399 /* Cause next statement to emit a line note even if the line number
4400 has not changed. This is used at the beginning of a function. */
4403 force_next_line_note ()
4408 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4409 note of this type already exists, remove it first. */
4412 set_unique_reg_note (insn, kind, datum)
4417 rtx note = find_reg_note (insn, kind, NULL_RTX);
4423 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4424 has multiple sets (some callers assume single_set
4425 means the insn only has one set, when in fact it
4426 means the insn only has one * useful * set). */
4427 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4434 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4435 It serves no useful purpose and breaks eliminate_regs. */
4436 if (GET_CODE (datum) == ASM_OPERANDS)
4446 XEXP (note, 0) = datum;
4450 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4451 return REG_NOTES (insn);
4454 /* Return an indication of which type of insn should have X as a body.
4455 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4461 if (GET_CODE (x) == CODE_LABEL)
4463 if (GET_CODE (x) == CALL)
4465 if (GET_CODE (x) == RETURN)
4467 if (GET_CODE (x) == SET)
4469 if (SET_DEST (x) == pc_rtx)
4471 else if (GET_CODE (SET_SRC (x)) == CALL)
4476 if (GET_CODE (x) == PARALLEL)
4479 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4480 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4482 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4483 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4485 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4486 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4492 /* Emit the rtl pattern X as an appropriate kind of insn.
4493 If X is a label, it is simply added into the insn chain. */
4499 enum rtx_code code = classify_insn (x);
4501 if (code == CODE_LABEL)
4502 return emit_label (x);
4503 else if (code == INSN)
4504 return emit_insn (x);
4505 else if (code == JUMP_INSN)
4507 rtx insn = emit_jump_insn (x);
4508 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4509 return emit_barrier ();
4512 else if (code == CALL_INSN)
4513 return emit_call_insn (x);
4518 /* Space for free sequence stack entries. */
4519 static GTY ((deletable (""))) struct sequence_stack *free_sequence_stack;
4521 /* Begin emitting insns to a sequence which can be packaged in an
4522 RTL_EXPR. If this sequence will contain something that might cause
4523 the compiler to pop arguments to function calls (because those
4524 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4525 details), use do_pending_stack_adjust before calling this function.
4526 That will ensure that the deferred pops are not accidentally
4527 emitted in the middle of this sequence. */
4532 struct sequence_stack *tem;
4534 if (free_sequence_stack != NULL)
4536 tem = free_sequence_stack;
4537 free_sequence_stack = tem->next;
4540 tem = (struct sequence_stack *) ggc_alloc (sizeof (struct sequence_stack));
4542 tem->next = seq_stack;
4543 tem->first = first_insn;
4544 tem->last = last_insn;
4545 tem->sequence_rtl_expr = seq_rtl_expr;
4553 /* Similarly, but indicate that this sequence will be placed in T, an
4554 RTL_EXPR. See the documentation for start_sequence for more
4555 information about how to use this function. */
4558 start_sequence_for_rtl_expr (t)
4566 /* Set up the insn chain starting with FIRST as the current sequence,
4567 saving the previously current one. See the documentation for
4568 start_sequence for more information about how to use this function. */
4571 push_to_sequence (first)
4578 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4584 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4587 push_to_full_sequence (first, last)
4593 /* We really should have the end of the insn chain here. */
4594 if (last && NEXT_INSN (last))
4598 /* Set up the outer-level insn chain
4599 as the current sequence, saving the previously current one. */
4602 push_topmost_sequence ()
4604 struct sequence_stack *stack, *top = NULL;
4608 for (stack = seq_stack; stack; stack = stack->next)
4611 first_insn = top->first;
4612 last_insn = top->last;
4613 seq_rtl_expr = top->sequence_rtl_expr;
4616 /* After emitting to the outer-level insn chain, update the outer-level
4617 insn chain, and restore the previous saved state. */
4620 pop_topmost_sequence ()
4622 struct sequence_stack *stack, *top = NULL;
4624 for (stack = seq_stack; stack; stack = stack->next)
4627 top->first = first_insn;
4628 top->last = last_insn;
4629 /* ??? Why don't we save seq_rtl_expr here? */
4634 /* After emitting to a sequence, restore previous saved state.
4636 To get the contents of the sequence just made, you must call
4637 `gen_sequence' *before* calling here.
4639 If the compiler might have deferred popping arguments while
4640 generating this sequence, and this sequence will not be immediately
4641 inserted into the instruction stream, use do_pending_stack_adjust
4642 before calling gen_sequence. That will ensure that the deferred
4643 pops are inserted into this sequence, and not into some random
4644 location in the instruction stream. See INHIBIT_DEFER_POP for more
4645 information about deferred popping of arguments. */
4650 struct sequence_stack *tem = seq_stack;
4652 first_insn = tem->first;
4653 last_insn = tem->last;
4654 seq_rtl_expr = tem->sequence_rtl_expr;
4655 seq_stack = tem->next;
4657 memset (tem, 0, sizeof (*tem));
4658 tem->next = free_sequence_stack;
4659 free_sequence_stack = tem;
4662 /* This works like end_sequence, but records the old sequence in FIRST
4666 end_full_sequence (first, last)
4669 *first = first_insn;
4674 /* Return 1 if currently emitting into a sequence. */
4679 return seq_stack != 0;
4682 /* Generate a SEQUENCE rtx containing the insns already emitted
4683 to the current sequence.
4685 This is how the gen_... function from a DEFINE_EXPAND
4686 constructs the SEQUENCE that it returns. */
4696 /* Count the insns in the chain. */
4698 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4701 /* If only one insn, return it rather than a SEQUENCE.
4702 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4703 the case of an empty list.)
4704 We only return the pattern of an insn if its code is INSN and it
4705 has no notes. This ensures that no information gets lost. */
4707 && GET_CODE (first_insn) == INSN
4708 && ! RTX_FRAME_RELATED_P (first_insn)
4709 /* Don't throw away any reg notes. */
4710 && REG_NOTES (first_insn) == 0)
4711 return PATTERN (first_insn);
4713 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4715 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4716 XVECEXP (result, 0, i) = tem;
4721 /* Put the various virtual registers into REGNO_REG_RTX. */
4724 init_virtual_regs (es)
4725 struct emit_status *es;
4727 rtx *ptr = es->x_regno_reg_rtx;
4728 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4729 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4730 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4731 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4732 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4736 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4737 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4738 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4739 static int copy_insn_n_scratches;
4741 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4742 copied an ASM_OPERANDS.
4743 In that case, it is the original input-operand vector. */
4744 static rtvec orig_asm_operands_vector;
4746 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4747 copied an ASM_OPERANDS.
4748 In that case, it is the copied input-operand vector. */
4749 static rtvec copy_asm_operands_vector;
4751 /* Likewise for the constraints vector. */
4752 static rtvec orig_asm_constraints_vector;
4753 static rtvec copy_asm_constraints_vector;
4755 /* Recursively create a new copy of an rtx for copy_insn.
4756 This function differs from copy_rtx in that it handles SCRATCHes and
4757 ASM_OPERANDs properly.
4758 Normally, this function is not used directly; use copy_insn as front end.
4759 However, you could first copy an insn pattern with copy_insn and then use
4760 this function afterwards to properly copy any REG_NOTEs containing
4770 const char *format_ptr;
4772 code = GET_CODE (orig);
4789 for (i = 0; i < copy_insn_n_scratches; i++)
4790 if (copy_insn_scratch_in[i] == orig)
4791 return copy_insn_scratch_out[i];
4795 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4796 a LABEL_REF, it isn't sharable. */
4797 if (GET_CODE (XEXP (orig, 0)) == PLUS
4798 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4799 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4803 /* A MEM with a constant address is not sharable. The problem is that
4804 the constant address may need to be reloaded. If the mem is shared,
4805 then reloading one copy of this mem will cause all copies to appear
4806 to have been reloaded. */
4812 copy = rtx_alloc (code);
4814 /* Copy the various flags, and other information. We assume that
4815 all fields need copying, and then clear the fields that should
4816 not be copied. That is the sensible default behavior, and forces
4817 us to explicitly document why we are *not* copying a flag. */
4818 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4820 /* We do not copy the USED flag, which is used as a mark bit during
4821 walks over the RTL. */
4822 RTX_FLAG (copy, used) = 0;
4824 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4825 if (GET_RTX_CLASS (code) == 'i')
4827 RTX_FLAG (copy, jump) = 0;
4828 RTX_FLAG (copy, call) = 0;
4829 RTX_FLAG (copy, frame_related) = 0;
4832 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4834 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4836 copy->fld[i] = orig->fld[i];
4837 switch (*format_ptr++)
4840 if (XEXP (orig, i) != NULL)
4841 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4846 if (XVEC (orig, i) == orig_asm_constraints_vector)
4847 XVEC (copy, i) = copy_asm_constraints_vector;
4848 else if (XVEC (orig, i) == orig_asm_operands_vector)
4849 XVEC (copy, i) = copy_asm_operands_vector;
4850 else if (XVEC (orig, i) != NULL)
4852 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4853 for (j = 0; j < XVECLEN (copy, i); j++)
4854 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4865 /* These are left unchanged. */
4873 if (code == SCRATCH)
4875 i = copy_insn_n_scratches++;
4876 if (i >= MAX_RECOG_OPERANDS)
4878 copy_insn_scratch_in[i] = orig;
4879 copy_insn_scratch_out[i] = copy;
4881 else if (code == ASM_OPERANDS)
4883 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4884 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4885 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4886 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4892 /* Create a new copy of an rtx.
4893 This function differs from copy_rtx in that it handles SCRATCHes and
4894 ASM_OPERANDs properly.
4895 INSN doesn't really have to be a full INSN; it could be just the
4901 copy_insn_n_scratches = 0;
4902 orig_asm_operands_vector = 0;
4903 orig_asm_constraints_vector = 0;
4904 copy_asm_operands_vector = 0;
4905 copy_asm_constraints_vector = 0;
4906 return copy_insn_1 (insn);
4909 /* Initialize data structures and variables in this file
4910 before generating rtl for each function. */
4915 struct function *f = cfun;
4918 f->emit = (struct emit_status *) ggc_alloc (sizeof (struct emit_status));
4921 seq_rtl_expr = NULL;
4923 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4926 first_label_num = label_num;
4930 /* Init the tables that describe all the pseudo regs. */
4932 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4934 f->emit->regno_pointer_align
4935 = (unsigned char *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
4936 * sizeof (unsigned char));
4939 = (rtx *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
4943 = (tree *) ggc_alloc_cleared (f->emit->regno_pointer_align_length
4946 /* Put copies of all the hard registers into regno_reg_rtx. */
4947 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
4948 regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
4950 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4951 init_virtual_regs (f->emit);
4954 /* Indicate that the virtual registers and stack locations are
4956 REG_POINTER (stack_pointer_rtx) = 1;
4957 REG_POINTER (frame_pointer_rtx) = 1;
4958 REG_POINTER (hard_frame_pointer_rtx) = 1;
4959 REG_POINTER (arg_pointer_rtx) = 1;
4961 REG_POINTER (virtual_incoming_args_rtx) = 1;
4962 REG_POINTER (virtual_stack_vars_rtx) = 1;
4963 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4964 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4965 REG_POINTER (virtual_cfa_rtx) = 1;
4967 #ifdef STACK_BOUNDARY
4968 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4969 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4970 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4971 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4973 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4974 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4975 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4976 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4977 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4980 #ifdef INIT_EXPANDERS
4985 /* Generate the constant 0. */
4988 gen_const_vector_0 (mode)
4989 enum machine_mode mode;
4994 enum machine_mode inner;
4996 units = GET_MODE_NUNITS (mode);
4997 inner = GET_MODE_INNER (mode);
4999 v = rtvec_alloc (units);
5001 /* We need to call this function after we to set CONST0_RTX first. */
5002 if (!CONST0_RTX (inner))
5005 for (i = 0; i < units; ++i)
5006 RTVEC_ELT (v, i) = CONST0_RTX (inner);
5008 tem = gen_rtx_CONST_VECTOR (mode, v);
5012 /* Create some permanent unique rtl objects shared between all functions.
5013 LINE_NUMBERS is nonzero if line numbers are to be generated. */
5016 init_emit_once (line_numbers)
5020 enum machine_mode mode;
5021 enum machine_mode double_mode;
5023 /* Initialize the CONST_INT, CONST_DOUBLE, and memory attribute hash
5025 const_int_htab = htab_create (37, const_int_htab_hash,
5026 const_int_htab_eq, NULL);
5028 const_double_htab = htab_create (37, const_double_htab_hash,
5029 const_double_htab_eq, NULL);
5031 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
5032 mem_attrs_htab_eq, NULL);
5034 no_line_numbers = ! line_numbers;
5036 /* Compute the word and byte modes. */
5038 byte_mode = VOIDmode;
5039 word_mode = VOIDmode;
5040 double_mode = VOIDmode;
5042 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5043 mode = GET_MODE_WIDER_MODE (mode))
5045 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5046 && byte_mode == VOIDmode)
5049 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5050 && word_mode == VOIDmode)
5054 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5055 mode = GET_MODE_WIDER_MODE (mode))
5057 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5058 && double_mode == VOIDmode)
5062 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5064 /* Assign register numbers to the globally defined register rtx.
5065 This must be done at runtime because the register number field
5066 is in a union and some compilers can't initialize unions. */
5068 pc_rtx = gen_rtx (PC, VOIDmode);
5069 cc0_rtx = gen_rtx (CC0, VOIDmode);
5070 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5071 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5072 if (hard_frame_pointer_rtx == 0)
5073 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
5074 HARD_FRAME_POINTER_REGNUM);
5075 if (arg_pointer_rtx == 0)
5076 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5077 virtual_incoming_args_rtx =
5078 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5079 virtual_stack_vars_rtx =
5080 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5081 virtual_stack_dynamic_rtx =
5082 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5083 virtual_outgoing_args_rtx =
5084 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5085 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5087 #ifdef INIT_EXPANDERS
5088 /* This is to initialize {init|mark|free}_machine_status before the first
5089 call to push_function_context_to. This is needed by the Chill front
5090 end which calls push_function_context_to before the first call to
5091 init_function_start. */
5095 /* Create the unique rtx's for certain rtx codes and operand values. */
5097 /* Don't use gen_rtx here since gen_rtx in this case
5098 tries to use these variables. */
5099 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5100 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5101 gen_rtx_raw_CONST_INT (VOIDmode, i);
5103 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5104 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5105 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5107 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5109 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5110 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5111 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5112 REAL_VALUE_FROM_INT (dconstm1, -1, -1, double_mode);
5114 for (i = 0; i <= 2; i++)
5116 REAL_VALUE_TYPE *r =
5117 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5119 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
5120 mode = GET_MODE_WIDER_MODE (mode))
5121 const_tiny_rtx[i][(int) mode] =
5122 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5124 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5126 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
5127 mode = GET_MODE_WIDER_MODE (mode))
5128 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5130 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5132 mode = GET_MODE_WIDER_MODE (mode))
5133 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5136 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5138 mode = GET_MODE_WIDER_MODE (mode))
5139 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5141 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5143 mode = GET_MODE_WIDER_MODE (mode))
5144 const_tiny_rtx[0][(int) mode] = gen_const_vector_0 (mode);
5146 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5147 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5148 const_tiny_rtx[0][i] = const0_rtx;
5150 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5151 if (STORE_FLAG_VALUE == 1)
5152 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5154 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5155 return_address_pointer_rtx
5156 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5160 struct_value_rtx = STRUCT_VALUE;
5162 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
5165 #ifdef STRUCT_VALUE_INCOMING
5166 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
5168 #ifdef STRUCT_VALUE_INCOMING_REGNUM
5169 struct_value_incoming_rtx
5170 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
5172 struct_value_incoming_rtx = struct_value_rtx;
5176 #ifdef STATIC_CHAIN_REGNUM
5177 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
5179 #ifdef STATIC_CHAIN_INCOMING_REGNUM
5180 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
5181 static_chain_incoming_rtx
5182 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
5185 static_chain_incoming_rtx = static_chain_rtx;
5189 static_chain_rtx = STATIC_CHAIN;
5191 #ifdef STATIC_CHAIN_INCOMING
5192 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
5194 static_chain_incoming_rtx = static_chain_rtx;
5198 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5199 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5202 /* Query and clear/ restore no_line_numbers. This is used by the
5203 switch / case handling in stmt.c to give proper line numbers in
5204 warnings about unreachable code. */
5207 force_line_numbers ()
5209 int old = no_line_numbers;
5211 no_line_numbers = 0;
5213 force_next_line_note ();
5218 restore_line_number_status (old_value)
5221 no_line_numbers = old_value;
5224 /* Produce exact duplicate of insn INSN after AFTER.
5225 Care updating of libcall regions if present. */
5228 emit_copy_of_insn_after (insn, after)
5232 rtx note1, note2, link;
5234 switch (GET_CODE (insn))
5237 new = emit_insn_after (copy_insn (PATTERN (insn)), after);
5241 new = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5245 new = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5246 if (CALL_INSN_FUNCTION_USAGE (insn))
5247 CALL_INSN_FUNCTION_USAGE (new)
5248 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5249 SIBLING_CALL_P (new) = SIBLING_CALL_P (insn);
5250 CONST_OR_PURE_CALL_P (new) = CONST_OR_PURE_CALL_P (insn);
5257 /* Update LABEL_NUSES. */
5258 mark_jump_label (PATTERN (new), new, 0);
5260 INSN_SCOPE (new) = INSN_SCOPE (insn);
5262 /* Copy all REG_NOTES except REG_LABEL since mark_jump_label will
5264 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5265 if (REG_NOTE_KIND (link) != REG_LABEL)
5267 if (GET_CODE (link) == EXPR_LIST)
5269 = copy_insn_1 (gen_rtx_EXPR_LIST (REG_NOTE_KIND (link),
5274 = copy_insn_1 (gen_rtx_INSN_LIST (REG_NOTE_KIND (link),
5279 /* Fix the libcall sequences. */
5280 if ((note1 = find_reg_note (new, REG_RETVAL, NULL_RTX)) != NULL)
5283 while ((note2 = find_reg_note (p, REG_LIBCALL, NULL_RTX)) == NULL)
5285 XEXP (note1, 0) = p;
5286 XEXP (note2, 0) = new;
5291 #include "gt-emit-rtl.h"