1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl[GR_MAX];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab;
147 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
148 shortly thrown away. We use two mechanisms to prevent this waste:
150 For sizes up to 5 elements, we keep a SEQUENCE and its associated
151 rtvec for use by gen_sequence. One entry for each size is
152 sufficient because most cases are calls to gen_sequence followed by
153 immediately emitting the SEQUENCE. Reuse is safe since emitting a
154 sequence is destructive on the insn in it anyway and hence can't be
157 We do not bother to save this cached data over nested function calls.
158 Instead, we just reinitialize them. */
160 #define SEQUENCE_RESULT_SIZE 5
162 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
164 /* During RTL generation, we also keep a list of free INSN rtl codes. */
165 static rtx free_insn;
167 #define first_insn (cfun->emit->x_first_insn)
168 #define last_insn (cfun->emit->x_last_insn)
169 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
170 #define last_linenum (cfun->emit->x_last_linenum)
171 #define last_filename (cfun->emit->x_last_filename)
172 #define first_label_num (cfun->emit->x_first_label_num)
174 /* This is where the pointer to the obstack being used for RTL is stored. */
175 extern struct obstack *rtl_obstack;
177 static rtx make_jump_insn_raw PARAMS ((rtx));
178 static rtx make_call_insn_raw PARAMS ((rtx));
179 static rtx find_line_note PARAMS ((rtx));
180 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
181 static void unshare_all_rtl_1 PARAMS ((rtx));
182 static void unshare_all_decls PARAMS ((tree));
183 static void reset_used_decls PARAMS ((tree));
184 static hashval_t const_int_htab_hash PARAMS ((const void *));
185 static int const_int_htab_eq PARAMS ((const void *,
187 static int rtx_htab_mark_1 PARAMS ((void **, void *));
188 static void rtx_htab_mark PARAMS ((void *));
191 /* Returns a hash code for X (which is a really a CONST_INT). */
194 const_int_htab_hash (x)
197 return (hashval_t) INTVAL ((const struct rtx_def *) x);
200 /* Returns non-zero if the value represented by X (which is really a
201 CONST_INT) is the same as that given by Y (which is really a
205 const_int_htab_eq (x, y)
209 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
212 /* Mark the hash-table element X (which is really a pointer to an
216 rtx_htab_mark_1 (x, data)
218 void *data ATTRIBUTE_UNUSED;
224 /* Mark all the elements of HTAB (which is really an htab_t full of
231 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
234 /* There are some RTL codes that require special attention; the generation
235 functions do the raw handling. If you add to this list, modify
236 special_rtx in gengenrtl.c as well. */
239 gen_rtx_CONST_INT (mode, arg)
240 enum machine_mode mode ATTRIBUTE_UNUSED;
245 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
246 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
248 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
249 if (const_true_rtx && arg == STORE_FLAG_VALUE)
250 return const_true_rtx;
253 /* Look up the CONST_INT in the hash table. */
254 slot = htab_find_slot_with_hash (const_int_htab, &arg,
255 (hashval_t) arg, INSERT);
260 push_obstacks_nochange ();
261 end_temporary_allocation ();
262 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
266 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
272 /* CONST_DOUBLEs needs special handling because their length is known
276 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
277 enum machine_mode mode;
279 HOST_WIDE_INT arg1, arg2;
281 rtx r = rtx_alloc (CONST_DOUBLE);
286 X0EXP (r, 1) = NULL_RTX;
290 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
297 gen_rtx_REG (mode, regno)
298 enum machine_mode mode;
301 /* In case the MD file explicitly references the frame pointer, have
302 all such references point to the same frame pointer. This is
303 used during frame pointer elimination to distinguish the explicit
304 references to these registers from pseudos that happened to be
307 If we have eliminated the frame pointer or arg pointer, we will
308 be using it as a normal register, for example as a spill
309 register. In such cases, we might be accessing it in a mode that
310 is not Pmode and therefore cannot use the pre-allocated rtx.
312 Also don't do this when we are making new REGs in reload, since
313 we don't want to get confused with the real pointers. */
315 if (mode == Pmode && !reload_in_progress)
317 if (regno == FRAME_POINTER_REGNUM)
318 return frame_pointer_rtx;
319 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
320 if (regno == HARD_FRAME_POINTER_REGNUM)
321 return hard_frame_pointer_rtx;
323 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
324 if (regno == ARG_POINTER_REGNUM)
325 return arg_pointer_rtx;
327 #ifdef RETURN_ADDRESS_POINTER_REGNUM
328 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
329 return return_address_pointer_rtx;
331 if (regno == STACK_POINTER_REGNUM)
332 return stack_pointer_rtx;
335 return gen_rtx_raw_REG (mode, regno);
339 gen_rtx_MEM (mode, addr)
340 enum machine_mode mode;
343 rtx rt = gen_rtx_raw_MEM (mode, addr);
345 /* This field is not cleared by the mere allocation of the rtx, so
347 MEM_ALIAS_SET (rt) = 0;
352 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
354 ** This routine generates an RTX of the size specified by
355 ** <code>, which is an RTX code. The RTX structure is initialized
356 ** from the arguments <element1> through <elementn>, which are
357 ** interpreted according to the specific RTX type's format. The
358 ** special machine mode associated with the rtx (if any) is specified
361 ** gen_rtx can be invoked in a way which resembles the lisp-like
362 ** rtx it will generate. For example, the following rtx structure:
364 ** (plus:QI (mem:QI (reg:SI 1))
365 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
367 ** ...would be generated by the following C code:
369 ** gen_rtx (PLUS, QImode,
370 ** gen_rtx (MEM, QImode,
371 ** gen_rtx (REG, SImode, 1)),
372 ** gen_rtx (MEM, QImode,
373 ** gen_rtx (PLUS, SImode,
374 ** gen_rtx (REG, SImode, 2),
375 ** gen_rtx (REG, SImode, 3)))),
380 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
382 #ifndef ANSI_PROTOTYPES
384 enum machine_mode mode;
387 register int i; /* Array indices... */
388 register const char *fmt; /* Current rtx's format... */
389 register rtx rt_val; /* RTX to return to caller... */
393 #ifndef ANSI_PROTOTYPES
394 code = va_arg (p, enum rtx_code);
395 mode = va_arg (p, enum machine_mode);
401 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
406 rtx arg0 = va_arg (p, rtx);
407 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
408 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
409 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
414 rt_val = gen_rtx_REG (mode, va_arg (p, int));
418 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
422 rt_val = rtx_alloc (code); /* Allocate the storage space. */
423 rt_val->mode = mode; /* Store the machine mode... */
425 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
426 for (i = 0; i < GET_RTX_LENGTH (code); i++)
430 case '0': /* Unused field. */
433 case 'i': /* An integer? */
434 XINT (rt_val, i) = va_arg (p, int);
437 case 'w': /* A wide integer? */
438 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
441 case 's': /* A string? */
442 XSTR (rt_val, i) = va_arg (p, char *);
445 case 'e': /* An expression? */
446 case 'u': /* An insn? Same except when printing. */
447 XEXP (rt_val, i) = va_arg (p, rtx);
450 case 'E': /* An RTX vector? */
451 XVEC (rt_val, i) = va_arg (p, rtvec);
454 case 'b': /* A bitmap? */
455 XBITMAP (rt_val, i) = va_arg (p, bitmap);
458 case 't': /* A tree? */
459 XTREE (rt_val, i) = va_arg (p, tree);
473 /* gen_rtvec (n, [rt1, ..., rtn])
475 ** This routine creates an rtvec and stores within it the
476 ** pointers to rtx's which are its arguments.
481 gen_rtvec VPARAMS ((int n, ...))
483 #ifndef ANSI_PROTOTYPES
492 #ifndef ANSI_PROTOTYPES
497 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
499 vector = (rtx *) alloca (n * sizeof (rtx));
501 for (i = 0; i < n; i++)
502 vector[i] = va_arg (p, rtx);
505 return gen_rtvec_v (n, vector);
509 gen_rtvec_v (n, argp)
514 register rtvec rt_val;
517 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
519 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
521 for (i = 0; i < n; i++)
522 rt_val->elem[i] = *argp++;
528 /* Generate a REG rtx for a new pseudo register of mode MODE.
529 This pseudo is assigned the next sequential register number. */
533 enum machine_mode mode;
535 struct function *f = cfun;
538 /* Don't let anything called after initial flow analysis create new
543 if (generating_concat_p
544 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
545 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
547 /* For complex modes, don't make a single pseudo.
548 Instead, make a CONCAT of two pseudos.
549 This allows noncontiguous allocation of the real and imaginary parts,
550 which makes much better code. Besides, allocating DCmode
551 pseudos overstrains reload on some machines like the 386. */
552 rtx realpart, imagpart;
553 int size = GET_MODE_UNIT_SIZE (mode);
554 enum machine_mode partmode
555 = mode_for_size (size * BITS_PER_UNIT,
556 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
557 ? MODE_FLOAT : MODE_INT),
560 realpart = gen_reg_rtx (partmode);
561 imagpart = gen_reg_rtx (partmode);
562 return gen_rtx_CONCAT (mode, realpart, imagpart);
565 /* Make sure regno_pointer_flag and regno_reg_rtx are large
566 enough to have an element for this pseudo reg number. */
568 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
570 int old_size = f->emit->regno_pointer_flag_length;
573 new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
574 memset (new + old_size, 0, old_size);
575 f->emit->regno_pointer_flag = new;
577 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
578 memset (new + old_size, 0, old_size);
579 f->emit->regno_pointer_align = (unsigned char *) new;
581 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
582 old_size * 2 * sizeof (rtx));
583 memset (new1 + old_size, 0, old_size * sizeof (rtx));
584 regno_reg_rtx = new1;
586 f->emit->regno_pointer_flag_length = old_size * 2;
589 val = gen_rtx_raw_REG (mode, reg_rtx_no);
590 regno_reg_rtx[reg_rtx_no++] = val;
594 /* Identify REG (which may be a CONCAT) as a user register. */
600 if (GET_CODE (reg) == CONCAT)
602 REG_USERVAR_P (XEXP (reg, 0)) = 1;
603 REG_USERVAR_P (XEXP (reg, 1)) = 1;
605 else if (GET_CODE (reg) == REG)
606 REG_USERVAR_P (reg) = 1;
611 /* Identify REG as a probable pointer register and show its alignment
612 as ALIGN, if nonzero. */
615 mark_reg_pointer (reg, align)
619 if (! REGNO_POINTER_FLAG (REGNO (reg)))
621 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
624 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
626 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
627 /* We can no-longer be sure just how aligned this pointer is */
628 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
631 /* Return 1 plus largest pseudo reg number used in the current function. */
639 /* Return 1 + the largest label number used so far in the current function. */
644 if (last_label_num && label_num == base_label_num)
645 return last_label_num;
649 /* Return first label number used in this function (if any were used). */
652 get_first_label_num ()
654 return first_label_num;
657 /* Return a value representing some low-order bits of X, where the number
658 of low-order bits is given by MODE. Note that no conversion is done
659 between floating-point and fixed-point values, rather, the bit
660 representation is returned.
662 This function handles the cases in common between gen_lowpart, below,
663 and two variants in cse.c and combine.c. These are the cases that can
664 be safely handled at all points in the compilation.
666 If this is not a case we can handle, return 0. */
669 gen_lowpart_common (mode, x)
670 enum machine_mode mode;
675 if (GET_MODE (x) == mode)
678 /* MODE must occupy no more words than the mode of X. */
679 if (GET_MODE (x) != VOIDmode
680 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
681 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
685 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
686 word = ((GET_MODE_SIZE (GET_MODE (x))
687 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
690 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
691 && (GET_MODE_CLASS (mode) == MODE_INT
692 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
694 /* If we are getting the low-order part of something that has been
695 sign- or zero-extended, we can either just use the object being
696 extended or make a narrower extension. If we want an even smaller
697 piece than the size of the object being extended, call ourselves
700 This case is used mostly by combine and cse. */
702 if (GET_MODE (XEXP (x, 0)) == mode)
704 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
705 return gen_lowpart_common (mode, XEXP (x, 0));
706 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
707 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
709 else if (GET_CODE (x) == SUBREG
710 && (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
711 || GET_MODE_SIZE (mode) <= UNITS_PER_WORD
712 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
713 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
715 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
716 else if (GET_CODE (x) == REG)
718 /* Let the backend decide how many registers to skip. This is needed
719 in particular for Sparc64 where fp regs are smaller than a word. */
720 /* ??? Note that subregs are now ambiguous, in that those against
721 pseudos are sized by the Word Size, while those against hard
722 regs are sized by the underlying register size. Better would be
723 to always interpret the subreg offset parameter as bytes or bits. */
725 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
726 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
727 - HARD_REGNO_NREGS (REGNO (x), mode));
729 /* If the register is not valid for MODE, return 0. If we don't
730 do this, there is no way to fix up the resulting REG later.
731 But we do do this if the current REG is not valid for its
732 mode. This latter is a kludge, but is required due to the
733 way that parameters are passed on some machines, most
735 if (REGNO (x) < FIRST_PSEUDO_REGISTER
736 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
737 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
739 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
740 /* integrate.c can't handle parts of a return value register. */
741 && (! REG_FUNCTION_VALUE_P (x)
742 || ! rtx_equal_function_value_matters)
743 #ifdef CLASS_CANNOT_CHANGE_MODE
744 && ! (CLASS_CANNOT_CHANGE_MODE_P (mode, GET_MODE (x))
745 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
746 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
747 && (TEST_HARD_REG_BIT
748 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
751 /* We want to keep the stack, frame, and arg pointers
753 && x != frame_pointer_rtx
754 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
755 && x != arg_pointer_rtx
757 && x != stack_pointer_rtx)
758 return gen_rtx_REG (mode, REGNO (x) + word);
760 return gen_rtx_SUBREG (mode, x, word);
762 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
763 from the low-order part of the constant. */
764 else if ((GET_MODE_CLASS (mode) == MODE_INT
765 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
766 && GET_MODE (x) == VOIDmode
767 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
769 /* If MODE is twice the host word size, X is already the desired
770 representation. Otherwise, if MODE is wider than a word, we can't
771 do this. If MODE is exactly a word, return just one CONST_INT. */
773 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
775 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
777 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
778 return (GET_CODE (x) == CONST_INT ? x
779 : GEN_INT (CONST_DOUBLE_LOW (x)));
782 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
783 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
784 : CONST_DOUBLE_LOW (x));
786 /* Sign extend to HOST_WIDE_INT. */
787 val = trunc_int_for_mode (val, mode);
789 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
794 #ifndef REAL_ARITHMETIC
795 /* If X is an integral constant but we want it in floating-point, it
796 must be the case that we have a union of an integer and a floating-point
797 value. If the machine-parameters allow it, simulate that union here
798 and return the result. The two-word and single-word cases are
801 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
802 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
803 || flag_pretend_float)
804 && GET_MODE_CLASS (mode) == MODE_FLOAT
805 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
806 && GET_CODE (x) == CONST_INT
807 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
809 union {HOST_WIDE_INT i; float d; } u;
812 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
814 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
815 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
816 || flag_pretend_float)
817 && GET_MODE_CLASS (mode) == MODE_FLOAT
818 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
819 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
820 && GET_MODE (x) == VOIDmode
821 && (sizeof (double) * HOST_BITS_PER_CHAR
822 == 2 * HOST_BITS_PER_WIDE_INT))
824 union {HOST_WIDE_INT i[2]; double d; } u;
825 HOST_WIDE_INT low, high;
827 if (GET_CODE (x) == CONST_INT)
828 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
830 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
832 #ifdef HOST_WORDS_BIG_ENDIAN
833 u.i[0] = high, u.i[1] = low;
835 u.i[0] = low, u.i[1] = high;
838 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
841 /* Similarly, if this is converting a floating-point value into a
842 single-word integer. Only do this is the host and target parameters are
845 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
846 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
847 || flag_pretend_float)
848 && (GET_MODE_CLASS (mode) == MODE_INT
849 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
850 && GET_CODE (x) == CONST_DOUBLE
851 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
852 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
853 return operand_subword (x, word, 0, GET_MODE (x));
855 /* Similarly, if this is converting a floating-point value into a
856 two-word integer, we can do this one word at a time and make an
857 integer. Only do this is the host and target parameters are
860 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
861 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
862 || flag_pretend_float)
863 && (GET_MODE_CLASS (mode) == MODE_INT
864 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
865 && GET_CODE (x) == CONST_DOUBLE
866 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
867 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
870 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
872 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
874 if (lowpart && GET_CODE (lowpart) == CONST_INT
875 && highpart && GET_CODE (highpart) == CONST_INT)
876 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
878 #else /* ifndef REAL_ARITHMETIC */
880 /* When we have a FP emulator, we can handle all conversions between
881 FP and integer operands. This simplifies reload because it
882 doesn't have to deal with constructs like (subreg:DI
883 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
885 else if (mode == SFmode
886 && GET_CODE (x) == CONST_INT)
892 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
893 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
895 else if (mode == DFmode
896 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
897 && GET_MODE (x) == VOIDmode)
901 HOST_WIDE_INT low, high;
903 if (GET_CODE (x) == CONST_INT)
906 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
910 low = CONST_DOUBLE_LOW (x);
911 high = CONST_DOUBLE_HIGH (x);
914 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
916 if (WORDS_BIG_ENDIAN)
917 i[0] = high, i[1] = low;
919 i[0] = low, i[1] = high;
921 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
922 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
924 else if ((GET_MODE_CLASS (mode) == MODE_INT
925 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
926 && GET_CODE (x) == CONST_DOUBLE
927 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
930 long i[4]; /* Only the low 32 bits of each 'long' are used. */
931 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
933 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
934 switch (GET_MODE (x))
937 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
941 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
943 #if LONG_DOUBLE_TYPE_SIZE == 96
948 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
954 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
956 #if HOST_BITS_PER_WIDE_INT == 32
957 return immed_double_const (i[endian], i[1 - endian], mode);
962 if (HOST_BITS_PER_WIDE_INT != 64)
965 for (c = 0; c < 4; c++)
968 return immed_double_const (i[endian * 3]
969 | (((HOST_WIDE_INT) i[1 + endian]) << 32),
971 | (((HOST_WIDE_INT) i[3 - endian * 3])
977 #endif /* ifndef REAL_ARITHMETIC */
979 /* Otherwise, we can't do this. */
983 /* Return the real part (which has mode MODE) of a complex value X.
984 This always comes at the low address in memory. */
987 gen_realpart (mode, x)
988 enum machine_mode mode;
991 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
993 else if (WORDS_BIG_ENDIAN
994 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
996 && REGNO (x) < FIRST_PSEUDO_REGISTER)
997 fatal ("Unable to access real part of complex value in a hard register on this target");
998 else if (WORDS_BIG_ENDIAN)
999 return gen_highpart (mode, x);
1001 return gen_lowpart (mode, x);
1004 /* Return the imaginary part (which has mode MODE) of a complex value X.
1005 This always comes at the high address in memory. */
1008 gen_imagpart (mode, x)
1009 enum machine_mode mode;
1012 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
1014 else if (WORDS_BIG_ENDIAN)
1015 return gen_lowpart (mode, x);
1016 else if (!WORDS_BIG_ENDIAN
1017 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1019 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1020 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
1022 return gen_highpart (mode, x);
1025 /* Return 1 iff X, assumed to be a SUBREG,
1026 refers to the real part of the complex value in its containing reg.
1027 Complex values are always stored with the real part in the first word,
1028 regardless of WORDS_BIG_ENDIAN. */
1031 subreg_realpart_p (x)
1034 if (GET_CODE (x) != SUBREG)
1037 return ((unsigned int) SUBREG_WORD (x) * UNITS_PER_WORD
1038 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1041 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1042 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1043 least-significant part of X.
1044 MODE specifies how big a part of X to return;
1045 it usually should not be larger than a word.
1046 If X is a MEM whose address is a QUEUED, the value may be so also. */
1049 gen_lowpart (mode, x)
1050 enum machine_mode mode;
1053 rtx result = gen_lowpart_common (mode, x);
1057 else if (GET_CODE (x) == REG)
1059 /* Must be a hard reg that's not valid in MODE. */
1060 result = gen_lowpart_common (mode, copy_to_reg (x));
1065 else if (GET_CODE (x) == MEM)
1067 /* The only additional case we can do is MEM. */
1068 register int offset = 0;
1069 if (WORDS_BIG_ENDIAN)
1070 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1071 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1073 if (BYTES_BIG_ENDIAN)
1074 /* Adjust the address so that the address-after-the-data
1076 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1077 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1079 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1081 else if (GET_CODE (x) == ADDRESSOF)
1082 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1087 /* Like `gen_lowpart', but refer to the most significant part.
1088 This is used to access the imaginary part of a complex number. */
1091 gen_highpart (mode, x)
1092 enum machine_mode mode;
1095 /* This case loses if X is a subreg. To catch bugs early,
1096 complain if an invalid MODE is used even in other cases. */
1097 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1098 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1100 if (GET_CODE (x) == CONST_DOUBLE
1101 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1102 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1105 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1106 else if (GET_CODE (x) == CONST_INT)
1108 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1110 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1112 else if (GET_CODE (x) == MEM)
1114 register int offset = 0;
1115 if (! WORDS_BIG_ENDIAN)
1116 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1117 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1119 if (! BYTES_BIG_ENDIAN
1120 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1121 offset -= (GET_MODE_SIZE (mode)
1122 - MIN (UNITS_PER_WORD,
1123 GET_MODE_SIZE (GET_MODE (x))));
1125 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1127 else if (GET_CODE (x) == SUBREG)
1129 /* The only time this should occur is when we are looking at a
1130 multi-word item with a SUBREG whose mode is the same as that of the
1131 item. It isn't clear what we would do if it wasn't. */
1132 if (SUBREG_WORD (x) != 0)
1134 return gen_highpart (mode, SUBREG_REG (x));
1136 else if (GET_CODE (x) == REG)
1140 /* Let the backend decide how many registers to skip. This is needed
1141 in particular for sparc64 where fp regs are smaller than a word. */
1142 /* ??? Note that subregs are now ambiguous, in that those against
1143 pseudos are sized by the word size, while those against hard
1144 regs are sized by the underlying register size. Better would be
1145 to always interpret the subreg offset parameter as bytes or bits. */
1147 if (WORDS_BIG_ENDIAN)
1149 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1150 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1151 - HARD_REGNO_NREGS (REGNO (x), mode));
1153 word = ((GET_MODE_SIZE (GET_MODE (x))
1154 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1157 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1158 /* integrate.c can't handle parts of a return value register. */
1159 && (! REG_FUNCTION_VALUE_P (x)
1160 || ! rtx_equal_function_value_matters)
1161 /* We want to keep the stack, frame, and arg pointers special. */
1162 && x != frame_pointer_rtx
1163 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1164 && x != arg_pointer_rtx
1166 && x != stack_pointer_rtx)
1167 return gen_rtx_REG (mode, REGNO (x) + word);
1169 return gen_rtx_SUBREG (mode, x, word);
1175 /* Return 1 iff X, assumed to be a SUBREG,
1176 refers to the least significant part of its containing reg.
1177 If X is not a SUBREG, always return 1 (it is its own low part!). */
1180 subreg_lowpart_p (x)
1183 if (GET_CODE (x) != SUBREG)
1185 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1188 if (WORDS_BIG_ENDIAN
1189 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1190 return (SUBREG_WORD (x)
1191 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1192 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1195 return SUBREG_WORD (x) == 0;
1198 /* Return subword I of operand OP.
1199 The word number, I, is interpreted as the word number starting at the
1200 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1201 otherwise it is the high-order word.
1203 If we cannot extract the required word, we return zero. Otherwise, an
1204 rtx corresponding to the requested word will be returned.
1206 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1207 reload has completed, a valid address will always be returned. After
1208 reload, if a valid address cannot be returned, we return zero.
1210 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1211 it is the responsibility of the caller.
1213 MODE is the mode of OP in case it is a CONST_INT. */
1216 operand_subword (op, i, validate_address, mode)
1219 int validate_address;
1220 enum machine_mode mode;
1223 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1225 if (mode == VOIDmode)
1226 mode = GET_MODE (op);
1228 if (mode == VOIDmode)
1231 /* If OP is narrower than a word, fail. */
1233 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1236 /* If we want a word outside OP, return zero. */
1238 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1241 /* If OP is already an integer word, return it. */
1242 if (GET_MODE_CLASS (mode) == MODE_INT
1243 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1246 /* If OP is a REG or SUBREG, we can handle it very simply. */
1247 if (GET_CODE (op) == REG)
1249 /* ??? There is a potential problem with this code. It does not
1250 properly handle extractions of a subword from a hard register
1251 that is larger than word_mode. Presumably the check for
1252 HARD_REGNO_MODE_OK catches these most of these cases. */
1254 /* If OP is a hard register, but OP + I is not a hard register,
1255 then extracting a subword is impossible.
1257 For example, consider if OP is the last hard register and it is
1258 larger than word_mode. If we wanted word N (for N > 0) because a
1259 part of that hard register was known to contain a useful value,
1260 then OP + I would refer to a pseudo, not the hard register we
1262 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1263 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1266 /* If the register is not valid for MODE, return 0. Note we
1267 have to check both OP and OP + I since they may refer to
1268 different parts of the register file.
1270 Consider if OP refers to the last 96bit FP register and we want
1271 subword 3 because that subword is known to contain a value we
1273 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1274 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1275 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1277 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1278 || (REG_FUNCTION_VALUE_P (op)
1279 && rtx_equal_function_value_matters)
1280 /* We want to keep the stack, frame, and arg pointers
1282 || op == frame_pointer_rtx
1283 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1284 || op == arg_pointer_rtx
1286 || op == stack_pointer_rtx)
1287 return gen_rtx_SUBREG (word_mode, op, i);
1289 return gen_rtx_REG (word_mode, REGNO (op) + i);
1291 else if (GET_CODE (op) == SUBREG)
1292 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1293 else if (GET_CODE (op) == CONCAT)
1295 unsigned int partwords
1296 = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1299 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1300 return operand_subword (XEXP (op, 1), i - partwords,
1301 validate_address, mode);
1304 /* Form a new MEM at the requested address. */
1305 if (GET_CODE (op) == MEM)
1307 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1310 if (validate_address)
1312 if (reload_completed)
1314 if (! strict_memory_address_p (word_mode, addr))
1318 addr = memory_address (word_mode, addr);
1321 new = gen_rtx_MEM (word_mode, addr);
1322 MEM_COPY_ATTRIBUTES (new, op);
1326 /* The only remaining cases are when OP is a constant. If the host and
1327 target floating formats are the same, handling two-word floating
1328 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1329 are defined as returning one or two 32 bit values, respectively,
1330 and not values of BITS_PER_WORD bits. */
1331 #ifdef REAL_ARITHMETIC
1332 /* The output is some bits, the width of the target machine's word.
1333 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1335 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1336 && GET_MODE_CLASS (mode) == MODE_FLOAT
1337 && GET_MODE_BITSIZE (mode) == 64
1338 && GET_CODE (op) == CONST_DOUBLE)
1343 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1344 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1346 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1347 which the words are written depends on the word endianness.
1348 ??? This is a potential portability problem and should
1349 be fixed at some point.
1351 We must excercise caution with the sign bit. By definition there
1352 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1353 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1354 So we explicitly mask and sign-extend as necessary. */
1355 if (BITS_PER_WORD == 32)
1358 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1359 return GEN_INT (val);
1361 #if HOST_BITS_PER_WIDE_INT >= 64
1362 else if (BITS_PER_WORD >= 64 && i == 0)
1364 val = k[! WORDS_BIG_ENDIAN];
1365 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1366 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1367 return GEN_INT (val);
1370 else if (BITS_PER_WORD == 16)
1373 if ((i & 1) == !WORDS_BIG_ENDIAN)
1376 return GEN_INT (val);
1381 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1382 && GET_MODE_CLASS (mode) == MODE_FLOAT
1383 && GET_MODE_BITSIZE (mode) > 64
1384 && GET_CODE (op) == CONST_DOUBLE)
1389 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1390 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1392 if (BITS_PER_WORD == 32)
1395 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1396 return GEN_INT (val);
1398 #if HOST_BITS_PER_WIDE_INT >= 64
1399 else if (BITS_PER_WORD >= 64 && i <= 1)
1401 val = k[i*2 + ! WORDS_BIG_ENDIAN];
1402 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1403 val |= (HOST_WIDE_INT) k[i*2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1404 return GEN_INT (val);
1410 #else /* no REAL_ARITHMETIC */
1411 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1412 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1413 || flag_pretend_float)
1414 && GET_MODE_CLASS (mode) == MODE_FLOAT
1415 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1416 && GET_CODE (op) == CONST_DOUBLE)
1418 /* The constant is stored in the host's word-ordering,
1419 but we want to access it in the target's word-ordering. Some
1420 compilers don't like a conditional inside macro args, so we have two
1421 copies of the return. */
1422 #ifdef HOST_WORDS_BIG_ENDIAN
1423 return GEN_INT (i == WORDS_BIG_ENDIAN
1424 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1426 return GEN_INT (i != WORDS_BIG_ENDIAN
1427 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1430 #endif /* no REAL_ARITHMETIC */
1432 /* Single word float is a little harder, since single- and double-word
1433 values often do not have the same high-order bits. We have already
1434 verified that we want the only defined word of the single-word value. */
1435 #ifdef REAL_ARITHMETIC
1436 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1437 && GET_MODE_BITSIZE (mode) == 32
1438 && GET_CODE (op) == CONST_DOUBLE)
1443 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1444 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1446 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1448 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1450 if (BITS_PER_WORD == 16)
1452 if ((i & 1) == !WORDS_BIG_ENDIAN)
1457 return GEN_INT (val);
1460 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1461 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1462 || flag_pretend_float)
1463 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1464 && GET_MODE_CLASS (mode) == MODE_FLOAT
1465 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1466 && GET_CODE (op) == CONST_DOUBLE)
1469 union {float f; HOST_WIDE_INT i; } u;
1471 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1474 return GEN_INT (u.i);
1476 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1477 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1478 || flag_pretend_float)
1479 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1480 && GET_MODE_CLASS (mode) == MODE_FLOAT
1481 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1482 && GET_CODE (op) == CONST_DOUBLE)
1485 union {double d; HOST_WIDE_INT i; } u;
1487 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1490 return GEN_INT (u.i);
1492 #endif /* no REAL_ARITHMETIC */
1494 /* The only remaining cases that we can handle are integers.
1495 Convert to proper endianness now since these cases need it.
1496 At this point, i == 0 means the low-order word.
1498 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1499 in general. However, if OP is (const_int 0), we can just return
1502 if (op == const0_rtx)
1505 if (GET_MODE_CLASS (mode) != MODE_INT
1506 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1507 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1510 if (WORDS_BIG_ENDIAN)
1511 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1513 /* Find out which word on the host machine this value is in and get
1514 it from the constant. */
1515 val = (i / size_ratio == 0
1516 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1517 : (GET_CODE (op) == CONST_INT
1518 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1520 /* Get the value we want into the low bits of val. */
1521 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1522 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1524 val = trunc_int_for_mode (val, word_mode);
1526 return GEN_INT (val);
1529 /* Similar to `operand_subword', but never return 0. If we can't extract
1530 the required subword, put OP into a register and try again. If that fails,
1531 abort. We always validate the address in this case. It is not valid
1532 to call this function after reload; it is mostly meant for RTL
1535 MODE is the mode of OP, in case it is CONST_INT. */
1538 operand_subword_force (op, i, mode)
1541 enum machine_mode mode;
1543 rtx result = operand_subword (op, i, 1, mode);
1548 if (mode != BLKmode && mode != VOIDmode)
1550 /* If this is a register which can not be accessed by words, copy it
1551 to a pseudo register. */
1552 if (GET_CODE (op) == REG)
1553 op = copy_to_reg (op);
1555 op = force_reg (mode, op);
1558 result = operand_subword (op, i, 1, mode);
1565 /* Given a compare instruction, swap the operands.
1566 A test instruction is changed into a compare of 0 against the operand. */
1569 reverse_comparison (insn)
1572 rtx body = PATTERN (insn);
1575 if (GET_CODE (body) == SET)
1576 comp = SET_SRC (body);
1578 comp = SET_SRC (XVECEXP (body, 0, 0));
1580 if (GET_CODE (comp) == COMPARE)
1582 rtx op0 = XEXP (comp, 0);
1583 rtx op1 = XEXP (comp, 1);
1584 XEXP (comp, 0) = op1;
1585 XEXP (comp, 1) = op0;
1589 rtx new = gen_rtx_COMPARE (VOIDmode,
1590 CONST0_RTX (GET_MODE (comp)), comp);
1591 if (GET_CODE (body) == SET)
1592 SET_SRC (body) = new;
1594 SET_SRC (XVECEXP (body, 0, 0)) = new;
1598 /* Return a memory reference like MEMREF, but with its mode changed
1599 to MODE and its address changed to ADDR.
1600 (VOIDmode means don't change the mode.
1601 NULL for ADDR means don't change the address.) */
1604 change_address (memref, mode, addr)
1606 enum machine_mode mode;
1611 if (GET_CODE (memref) != MEM)
1613 if (mode == VOIDmode)
1614 mode = GET_MODE (memref);
1616 addr = XEXP (memref, 0);
1618 /* If reload is in progress or has completed, ADDR must be valid.
1619 Otherwise, we can call memory_address to make it valid. */
1620 if (reload_completed || reload_in_progress)
1622 if (! memory_address_p (mode, addr))
1626 addr = memory_address (mode, addr);
1628 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1631 new = gen_rtx_MEM (mode, addr);
1632 MEM_COPY_ATTRIBUTES (new, memref);
1636 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1643 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1644 NULL_RTX, label_num++, NULL_PTR, NULL_PTR);
1646 LABEL_NUSES (label) = 0;
1647 LABEL_ALTERNATE_NAME (label) = NULL;
1651 /* For procedure integration. */
1653 /* Install new pointers to the first and last insns in the chain.
1654 Also, set cur_insn_uid to one higher than the last in use.
1655 Used for an inline-procedure after copying the insn chain. */
1658 set_new_first_and_last_insn (first, last)
1667 for (insn = first; insn; insn = NEXT_INSN (insn))
1668 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1673 /* Set the range of label numbers found in the current function.
1674 This is used when belatedly compiling an inline function. */
1677 set_new_first_and_last_label_num (first, last)
1680 base_label_num = label_num;
1681 first_label_num = first;
1682 last_label_num = last;
1685 /* Set the last label number found in the current function.
1686 This is used when belatedly compiling an inline function. */
1689 set_new_last_label_num (last)
1692 base_label_num = label_num;
1693 last_label_num = last;
1696 /* Restore all variables describing the current status from the structure *P.
1697 This is used after a nested function. */
1700 restore_emit_status (p)
1701 struct function *p ATTRIBUTE_UNUSED;
1704 clear_emit_caches ();
1707 /* Clear out all parts of the state in F that can safely be discarded
1708 after the function has been compiled, to let garbage collection
1709 reclaim the memory. */
1712 free_emit_status (f)
1715 free (f->emit->x_regno_reg_rtx);
1716 free (f->emit->regno_pointer_flag);
1717 free (f->emit->regno_pointer_align);
1722 /* Go through all the RTL insn bodies and copy any invalid shared
1723 structure. This routine should only be called once. */
1726 unshare_all_rtl (fndecl, insn)
1732 /* Make sure that virtual parameters are not shared. */
1733 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1734 DECL_RTL (decl) = copy_rtx_if_shared (DECL_RTL (decl));
1736 /* Make sure that virtual stack slots are not shared. */
1737 unshare_all_decls (DECL_INITIAL (fndecl));
1739 /* Unshare just about everything else. */
1740 unshare_all_rtl_1 (insn);
1742 /* Make sure the addresses of stack slots found outside the insn chain
1743 (such as, in DECL_RTL of a variable) are not shared
1744 with the insn chain.
1746 This special care is necessary when the stack slot MEM does not
1747 actually appear in the insn chain. If it does appear, its address
1748 is unshared from all else at that point. */
1749 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1752 /* Go through all the RTL insn bodies and copy any invalid shared
1753 structure, again. This is a fairly expensive thing to do so it
1754 should be done sparingly. */
1757 unshare_all_rtl_again (insn)
1763 for (p = insn; p; p = NEXT_INSN (p))
1766 reset_used_flags (PATTERN (p));
1767 reset_used_flags (REG_NOTES (p));
1768 reset_used_flags (LOG_LINKS (p));
1771 /* Make sure that virtual stack slots are not shared. */
1772 reset_used_decls (DECL_INITIAL (cfun->decl));
1774 /* Make sure that virtual parameters are not shared. */
1775 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1776 reset_used_flags (DECL_RTL (decl));
1778 reset_used_flags (stack_slot_list);
1780 unshare_all_rtl (cfun->decl, insn);
1783 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1784 Assumes the mark bits are cleared at entry. */
1787 unshare_all_rtl_1 (insn)
1790 for (; insn; insn = NEXT_INSN (insn))
1793 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1794 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1795 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1799 /* Go through all virtual stack slots of a function and copy any
1800 shared structure. */
1802 unshare_all_decls (blk)
1807 /* Copy shared decls. */
1808 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1809 DECL_RTL (t) = copy_rtx_if_shared (DECL_RTL (t));
1811 /* Now process sub-blocks. */
1812 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1813 unshare_all_decls (t);
1816 /* Go through all virtual stack slots of a function and mark them as
1819 reset_used_decls (blk)
1825 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1826 reset_used_flags (DECL_RTL (t));
1828 /* Now process sub-blocks. */
1829 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1830 reset_used_decls (t);
1833 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1834 Recursively does the same for subexpressions. */
1837 copy_rtx_if_shared (orig)
1840 register rtx x = orig;
1842 register enum rtx_code code;
1843 register const char *format_ptr;
1849 code = GET_CODE (x);
1851 /* These types may be freely shared. */
1864 /* SCRATCH must be shared because they represent distinct values. */
1868 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1869 a LABEL_REF, it isn't sharable. */
1870 if (GET_CODE (XEXP (x, 0)) == PLUS
1871 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1872 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1881 /* The chain of insns is not being copied. */
1885 /* A MEM is allowed to be shared if its address is constant.
1887 We used to allow sharing of MEMs which referenced
1888 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1889 that can lose. instantiate_virtual_regs will not unshare
1890 the MEMs, and combine may change the structure of the address
1891 because it looks safe and profitable in one context, but
1892 in some other context it creates unrecognizable RTL. */
1893 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1902 /* This rtx may not be shared. If it has already been seen,
1903 replace it with a copy of itself. */
1909 copy = rtx_alloc (code);
1910 bcopy ((char *) x, (char *) copy,
1911 (sizeof (*copy) - sizeof (copy->fld)
1912 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1918 /* Now scan the subexpressions recursively.
1919 We can store any replaced subexpressions directly into X
1920 since we know X is not shared! Any vectors in X
1921 must be copied if X was copied. */
1923 format_ptr = GET_RTX_FORMAT (code);
1925 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1927 switch (*format_ptr++)
1930 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1934 if (XVEC (x, i) != NULL)
1937 int len = XVECLEN (x, i);
1939 if (copied && len > 0)
1940 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1941 for (j = 0; j < len; j++)
1942 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1950 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1951 to look for shared sub-parts. */
1954 reset_used_flags (x)
1958 register enum rtx_code code;
1959 register const char *format_ptr;
1964 code = GET_CODE (x);
1966 /* These types may be freely shared so we needn't do any resetting
1987 /* The chain of insns is not being copied. */
1996 format_ptr = GET_RTX_FORMAT (code);
1997 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1999 switch (*format_ptr++)
2002 reset_used_flags (XEXP (x, i));
2006 for (j = 0; j < XVECLEN (x, i); j++)
2007 reset_used_flags (XVECEXP (x, i, j));
2013 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2014 Return X or the rtx for the pseudo reg the value of X was copied into.
2015 OTHER must be valid as a SET_DEST. */
2018 make_safe_from (x, other)
2022 switch (GET_CODE (other))
2025 other = SUBREG_REG (other);
2027 case STRICT_LOW_PART:
2030 other = XEXP (other, 0);
2036 if ((GET_CODE (other) == MEM
2038 && GET_CODE (x) != REG
2039 && GET_CODE (x) != SUBREG)
2040 || (GET_CODE (other) == REG
2041 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2042 || reg_mentioned_p (other, x))))
2044 rtx temp = gen_reg_rtx (GET_MODE (x));
2045 emit_move_insn (temp, x);
2051 /* Emission of insns (adding them to the doubly-linked list). */
2053 /* Return the first insn of the current sequence or current function. */
2061 /* Return the last insn emitted in current sequence or current function. */
2069 /* Specify a new insn as the last in the chain. */
2072 set_last_insn (insn)
2075 if (NEXT_INSN (insn) != 0)
2080 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2083 get_last_insn_anywhere ()
2085 struct sequence_stack *stack;
2088 for (stack = seq_stack; stack; stack = stack->next)
2089 if (stack->last != 0)
2094 /* Return a number larger than any instruction's uid in this function. */
2099 return cur_insn_uid;
2102 /* Renumber instructions so that no instruction UIDs are wasted. */
2105 renumber_insns (stream)
2110 /* If we're not supposed to renumber instructions, don't. */
2111 if (!flag_renumber_insns)
2114 /* If there aren't that many instructions, then it's not really
2115 worth renumbering them. */
2116 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2121 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2124 fprintf (stream, "Renumbering insn %d to %d\n",
2125 INSN_UID (insn), cur_insn_uid);
2126 INSN_UID (insn) = cur_insn_uid++;
2130 /* Return the next insn. If it is a SEQUENCE, return the first insn
2139 insn = NEXT_INSN (insn);
2140 if (insn && GET_CODE (insn) == INSN
2141 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2142 insn = XVECEXP (PATTERN (insn), 0, 0);
2148 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2152 previous_insn (insn)
2157 insn = PREV_INSN (insn);
2158 if (insn && GET_CODE (insn) == INSN
2159 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2160 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2166 /* Return the next insn after INSN that is not a NOTE. This routine does not
2167 look inside SEQUENCEs. */
2170 next_nonnote_insn (insn)
2175 insn = NEXT_INSN (insn);
2176 if (insn == 0 || GET_CODE (insn) != NOTE)
2183 /* Return the previous insn before INSN that is not a NOTE. This routine does
2184 not look inside SEQUENCEs. */
2187 prev_nonnote_insn (insn)
2192 insn = PREV_INSN (insn);
2193 if (insn == 0 || GET_CODE (insn) != NOTE)
2200 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2201 or 0, if there is none. This routine does not look inside
2205 next_real_insn (insn)
2210 insn = NEXT_INSN (insn);
2211 if (insn == 0 || GET_CODE (insn) == INSN
2212 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2219 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2220 or 0, if there is none. This routine does not look inside
2224 prev_real_insn (insn)
2229 insn = PREV_INSN (insn);
2230 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2231 || GET_CODE (insn) == JUMP_INSN)
2238 /* Find the next insn after INSN that really does something. This routine
2239 does not look inside SEQUENCEs. Until reload has completed, this is the
2240 same as next_real_insn. */
2243 active_insn_p (insn)
2246 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2247 || (GET_CODE (insn) == INSN
2248 && (! reload_completed
2249 || (GET_CODE (PATTERN (insn)) != USE
2250 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2254 next_active_insn (insn)
2259 insn = NEXT_INSN (insn);
2260 if (insn == 0 || active_insn_p (insn))
2267 /* Find the last insn before INSN that really does something. This routine
2268 does not look inside SEQUENCEs. Until reload has completed, this is the
2269 same as prev_real_insn. */
2272 prev_active_insn (insn)
2277 insn = PREV_INSN (insn);
2278 if (insn == 0 || active_insn_p (insn))
2285 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2293 insn = NEXT_INSN (insn);
2294 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2301 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2309 insn = PREV_INSN (insn);
2310 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2318 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2319 and REG_CC_USER notes so we can find it. */
2322 link_cc0_insns (insn)
2325 rtx user = next_nonnote_insn (insn);
2327 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2328 user = XVECEXP (PATTERN (user), 0, 0);
2330 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2332 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2335 /* Return the next insn that uses CC0 after INSN, which is assumed to
2336 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2337 applied to the result of this function should yield INSN).
2339 Normally, this is simply the next insn. However, if a REG_CC_USER note
2340 is present, it contains the insn that uses CC0.
2342 Return 0 if we can't find the insn. */
2345 next_cc0_user (insn)
2348 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2351 return XEXP (note, 0);
2353 insn = next_nonnote_insn (insn);
2354 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2355 insn = XVECEXP (PATTERN (insn), 0, 0);
2357 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2363 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2364 note, it is the previous insn. */
2367 prev_cc0_setter (insn)
2370 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2373 return XEXP (note, 0);
2375 insn = prev_nonnote_insn (insn);
2376 if (! sets_cc0_p (PATTERN (insn)))
2383 /* Try splitting insns that can be split for better scheduling.
2384 PAT is the pattern which might split.
2385 TRIAL is the insn providing PAT.
2386 LAST is non-zero if we should return the last insn of the sequence produced.
2388 If this routine succeeds in splitting, it returns the first or last
2389 replacement insn depending on the value of LAST. Otherwise, it
2390 returns TRIAL. If the insn to be returned can be split, it will be. */
2393 try_split (pat, trial, last)
2397 rtx before = PREV_INSN (trial);
2398 rtx after = NEXT_INSN (trial);
2399 rtx seq = split_insns (pat, trial);
2400 int has_barrier = 0;
2403 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2404 We may need to handle this specially. */
2405 if (after && GET_CODE (after) == BARRIER)
2408 after = NEXT_INSN (after);
2413 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2414 The latter case will normally arise only when being done so that
2415 it, in turn, will be split (SFmode on the 29k is an example). */
2416 if (GET_CODE (seq) == SEQUENCE)
2420 /* Avoid infinite loop if any insn of the result matches
2421 the original pattern. */
2422 for (i = 0; i < XVECLEN (seq, 0); i++)
2423 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2424 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2427 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2428 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2429 increment the usage count so we don't delete the label. */
2431 if (GET_CODE (trial) == JUMP_INSN)
2432 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2433 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2435 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2437 if (JUMP_LABEL (trial))
2438 LABEL_NUSES (JUMP_LABEL (trial))++;
2441 tem = emit_insn_after (seq, before);
2443 delete_insn (trial);
2445 emit_barrier_after (tem);
2447 /* Recursively call try_split for each new insn created; by the
2448 time control returns here that insn will be fully split, so
2449 set LAST and continue from the insn after the one returned.
2450 We can't use next_active_insn here since AFTER may be a note.
2451 Ignore deleted insns, which can be occur if not optimizing. */
2452 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2453 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2454 tem = try_split (PATTERN (tem), tem, 1);
2456 /* Avoid infinite loop if the result matches the original pattern. */
2457 else if (rtx_equal_p (seq, pat))
2461 PATTERN (trial) = seq;
2462 INSN_CODE (trial) = -1;
2463 try_split (seq, trial, last);
2466 /* Return either the first or the last insn, depending on which was
2469 ? (after ? prev_active_insn (after) : last_insn)
2470 : next_active_insn (before);
2476 /* Make and return an INSN rtx, initializing all its slots.
2477 Store PATTERN in the pattern slots. */
2480 make_insn_raw (pattern)
2485 /* If in RTL generation phase, see if FREE_INSN can be used. */
2486 if (!ggc_p && free_insn != 0 && rtx_equal_function_value_matters)
2489 free_insn = NEXT_INSN (free_insn);
2490 PUT_CODE (insn, INSN);
2493 insn = rtx_alloc (INSN);
2495 INSN_UID (insn) = cur_insn_uid++;
2496 PATTERN (insn) = pattern;
2497 INSN_CODE (insn) = -1;
2498 LOG_LINKS (insn) = NULL;
2499 REG_NOTES (insn) = NULL;
2501 #ifdef ENABLE_RTL_CHECKING
2504 && (returnjump_p (insn)
2505 || (GET_CODE (insn) == SET
2506 && SET_DEST (insn) == pc_rtx)))
2508 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2516 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2519 make_jump_insn_raw (pattern)
2524 insn = rtx_alloc (JUMP_INSN);
2525 INSN_UID (insn) = cur_insn_uid++;
2527 PATTERN (insn) = pattern;
2528 INSN_CODE (insn) = -1;
2529 LOG_LINKS (insn) = NULL;
2530 REG_NOTES (insn) = NULL;
2531 JUMP_LABEL (insn) = NULL;
2536 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2539 make_call_insn_raw (pattern)
2544 insn = rtx_alloc (CALL_INSN);
2545 INSN_UID (insn) = cur_insn_uid++;
2547 PATTERN (insn) = pattern;
2548 INSN_CODE (insn) = -1;
2549 LOG_LINKS (insn) = NULL;
2550 REG_NOTES (insn) = NULL;
2551 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2556 /* Add INSN to the end of the doubly-linked list.
2557 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2563 PREV_INSN (insn) = last_insn;
2564 NEXT_INSN (insn) = 0;
2566 if (NULL != last_insn)
2567 NEXT_INSN (last_insn) = insn;
2569 if (NULL == first_insn)
2575 /* Add INSN into the doubly-linked list after insn AFTER. This and
2576 the next should be the only functions called to insert an insn once
2577 delay slots have been filled since only they know how to update a
2581 add_insn_after (insn, after)
2584 rtx next = NEXT_INSN (after);
2586 if (optimize && INSN_DELETED_P (after))
2589 NEXT_INSN (insn) = next;
2590 PREV_INSN (insn) = after;
2594 PREV_INSN (next) = insn;
2595 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2596 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2598 else if (last_insn == after)
2602 struct sequence_stack *stack = seq_stack;
2603 /* Scan all pending sequences too. */
2604 for (; stack; stack = stack->next)
2605 if (after == stack->last)
2615 NEXT_INSN (after) = insn;
2616 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2618 rtx sequence = PATTERN (after);
2619 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2623 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2624 the previous should be the only functions called to insert an insn once
2625 delay slots have been filled since only they know how to update a
2629 add_insn_before (insn, before)
2632 rtx prev = PREV_INSN (before);
2634 if (optimize && INSN_DELETED_P (before))
2637 PREV_INSN (insn) = prev;
2638 NEXT_INSN (insn) = before;
2642 NEXT_INSN (prev) = insn;
2643 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2645 rtx sequence = PATTERN (prev);
2646 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2649 else if (first_insn == before)
2653 struct sequence_stack *stack = seq_stack;
2654 /* Scan all pending sequences too. */
2655 for (; stack; stack = stack->next)
2656 if (before == stack->first)
2658 stack->first = insn;
2666 PREV_INSN (before) = insn;
2667 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2668 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2671 /* Remove an insn from its doubly-linked list. This function knows how
2672 to handle sequences. */
2677 rtx next = NEXT_INSN (insn);
2678 rtx prev = PREV_INSN (insn);
2681 NEXT_INSN (prev) = next;
2682 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2684 rtx sequence = PATTERN (prev);
2685 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2688 else if (first_insn == insn)
2692 struct sequence_stack *stack = seq_stack;
2693 /* Scan all pending sequences too. */
2694 for (; stack; stack = stack->next)
2695 if (insn == stack->first)
2697 stack->first = next;
2707 PREV_INSN (next) = prev;
2708 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2709 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2711 else if (last_insn == insn)
2715 struct sequence_stack *stack = seq_stack;
2716 /* Scan all pending sequences too. */
2717 for (; stack; stack = stack->next)
2718 if (insn == stack->last)
2729 /* Delete all insns made since FROM.
2730 FROM becomes the new last instruction. */
2733 delete_insns_since (from)
2739 NEXT_INSN (from) = 0;
2743 /* This function is deprecated, please use sequences instead.
2745 Move a consecutive bunch of insns to a different place in the chain.
2746 The insns to be moved are those between FROM and TO.
2747 They are moved to a new position after the insn AFTER.
2748 AFTER must not be FROM or TO or any insn in between.
2750 This function does not know about SEQUENCEs and hence should not be
2751 called after delay-slot filling has been done. */
2754 reorder_insns (from, to, after)
2755 rtx from, to, after;
2757 /* Splice this bunch out of where it is now. */
2758 if (PREV_INSN (from))
2759 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2761 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2762 if (last_insn == to)
2763 last_insn = PREV_INSN (from);
2764 if (first_insn == from)
2765 first_insn = NEXT_INSN (to);
2767 /* Make the new neighbors point to it and it to them. */
2768 if (NEXT_INSN (after))
2769 PREV_INSN (NEXT_INSN (after)) = to;
2771 NEXT_INSN (to) = NEXT_INSN (after);
2772 PREV_INSN (from) = after;
2773 NEXT_INSN (after) = from;
2774 if (after == last_insn)
2778 /* Return the line note insn preceding INSN. */
2781 find_line_note (insn)
2784 if (no_line_numbers)
2787 for (; insn; insn = PREV_INSN (insn))
2788 if (GET_CODE (insn) == NOTE
2789 && NOTE_LINE_NUMBER (insn) >= 0)
2795 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2796 of the moved insns when debugging. This may insert a note between AFTER
2797 and FROM, and another one after TO. */
2800 reorder_insns_with_line_notes (from, to, after)
2801 rtx from, to, after;
2803 rtx from_line = find_line_note (from);
2804 rtx after_line = find_line_note (after);
2806 reorder_insns (from, to, after);
2808 if (from_line == after_line)
2812 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2813 NOTE_LINE_NUMBER (from_line),
2816 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2817 NOTE_LINE_NUMBER (after_line),
2821 /* Remove unnecessary notes from the instruction stream. */
2824 remove_unnecessary_notes ()
2829 /* We must not remove the first instruction in the function because
2830 the compiler depends on the first instruction being a note. */
2831 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2833 /* Remember what's next. */
2834 next = NEXT_INSN (insn);
2836 /* We're only interested in notes. */
2837 if (GET_CODE (insn) != NOTE)
2840 /* By now, all notes indicating lexical blocks should have
2841 NOTE_BLOCK filled in. */
2842 if ((NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2843 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2844 && NOTE_BLOCK (insn) == NULL_TREE)
2847 /* Remove NOTE_INSN_DELETED notes. */
2848 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
2850 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2852 /* Scan back to see if there are any non-note instructions
2853 between INSN and the beginning of this block. If not,
2854 then there is no PC range in the generated code that will
2855 actually be in this block, so there's no point in
2856 remembering the existence of the block. */
2859 for (prev = PREV_INSN (insn); prev; prev = PREV_INSN (prev))
2861 /* This block contains a real instruction. Note that we
2862 don't include labels; if the only thing in the block
2863 is a label, then there are still no PC values that
2864 lie within the block. */
2868 /* We're only interested in NOTEs. */
2869 if (GET_CODE (prev) != NOTE)
2872 if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_BEG)
2874 /* If the BLOCKs referred to by these notes don't
2875 match, then something is wrong with our BLOCK
2876 nesting structure. */
2877 if (NOTE_BLOCK (prev) != NOTE_BLOCK (insn))
2880 if (debug_ignore_block (NOTE_BLOCK (insn)))
2887 else if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_END)
2888 /* There's a nested block. We need to leave the
2889 current block in place since otherwise the debugger
2890 wouldn't be able to show symbols from our block in
2891 the nested block. */
2899 /* Emit an insn of given code and pattern
2900 at a specified place within the doubly-linked list. */
2902 /* Make an instruction with body PATTERN
2903 and output it before the instruction BEFORE. */
2906 emit_insn_before (pattern, before)
2907 register rtx pattern, before;
2909 register rtx insn = before;
2911 if (GET_CODE (pattern) == SEQUENCE)
2915 for (i = 0; i < XVECLEN (pattern, 0); i++)
2917 insn = XVECEXP (pattern, 0, i);
2918 add_insn_before (insn, before);
2920 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2921 sequence_result[XVECLEN (pattern, 0)] = pattern;
2925 insn = make_insn_raw (pattern);
2926 add_insn_before (insn, before);
2932 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2935 emit_block_insn_before (pattern, before, block)
2936 rtx pattern, before;
2939 rtx prev = PREV_INSN (before);
2940 rtx r = emit_insn_before (pattern, before);
2941 if (block && block->head == before)
2942 block->head = NEXT_INSN (prev);
2946 /* Make an instruction with body PATTERN and code JUMP_INSN
2947 and output it before the instruction BEFORE. */
2950 emit_jump_insn_before (pattern, before)
2951 register rtx pattern, before;
2955 if (GET_CODE (pattern) == SEQUENCE)
2956 insn = emit_insn_before (pattern, before);
2959 insn = make_jump_insn_raw (pattern);
2960 add_insn_before (insn, before);
2966 /* Make an instruction with body PATTERN and code CALL_INSN
2967 and output it before the instruction BEFORE. */
2970 emit_call_insn_before (pattern, before)
2971 register rtx pattern, before;
2975 if (GET_CODE (pattern) == SEQUENCE)
2976 insn = emit_insn_before (pattern, before);
2979 insn = make_call_insn_raw (pattern);
2980 add_insn_before (insn, before);
2981 PUT_CODE (insn, CALL_INSN);
2987 /* Make an insn of code BARRIER
2988 and output it before the insn BEFORE. */
2991 emit_barrier_before (before)
2992 register rtx before;
2994 register rtx insn = rtx_alloc (BARRIER);
2996 INSN_UID (insn) = cur_insn_uid++;
2998 add_insn_before (insn, before);
3002 /* Emit the label LABEL before the insn BEFORE. */
3005 emit_label_before (label, before)
3008 /* This can be called twice for the same label as a result of the
3009 confusion that follows a syntax error! So make it harmless. */
3010 if (INSN_UID (label) == 0)
3012 INSN_UID (label) = cur_insn_uid++;
3013 add_insn_before (label, before);
3019 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3022 emit_note_before (subtype, before)
3026 register rtx note = rtx_alloc (NOTE);
3027 INSN_UID (note) = cur_insn_uid++;
3028 NOTE_SOURCE_FILE (note) = 0;
3029 NOTE_LINE_NUMBER (note) = subtype;
3031 add_insn_before (note, before);
3035 /* Make an insn of code INSN with body PATTERN
3036 and output it after the insn AFTER. */
3039 emit_insn_after (pattern, after)
3040 register rtx pattern, after;
3042 register rtx insn = after;
3044 if (GET_CODE (pattern) == SEQUENCE)
3048 for (i = 0; i < XVECLEN (pattern, 0); i++)
3050 insn = XVECEXP (pattern, 0, i);
3051 add_insn_after (insn, after);
3054 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
3055 sequence_result[XVECLEN (pattern, 0)] = pattern;
3059 insn = make_insn_raw (pattern);
3060 add_insn_after (insn, after);
3066 /* Similar to emit_insn_after, except that line notes are to be inserted so
3067 as to act as if this insn were at FROM. */
3070 emit_insn_after_with_line_notes (pattern, after, from)
3071 rtx pattern, after, from;
3073 rtx from_line = find_line_note (from);
3074 rtx after_line = find_line_note (after);
3075 rtx insn = emit_insn_after (pattern, after);
3078 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3079 NOTE_LINE_NUMBER (from_line),
3083 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3084 NOTE_LINE_NUMBER (after_line),
3088 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3091 emit_block_insn_after (pattern, after, block)
3095 rtx r = emit_insn_after (pattern, after);
3096 if (block && block->end == after)
3101 /* Make an insn of code JUMP_INSN with body PATTERN
3102 and output it after the insn AFTER. */
3105 emit_jump_insn_after (pattern, after)
3106 register rtx pattern, after;
3110 if (GET_CODE (pattern) == SEQUENCE)
3111 insn = emit_insn_after (pattern, after);
3114 insn = make_jump_insn_raw (pattern);
3115 add_insn_after (insn, after);
3121 /* Make an insn of code BARRIER
3122 and output it after the insn AFTER. */
3125 emit_barrier_after (after)
3128 register rtx insn = rtx_alloc (BARRIER);
3130 INSN_UID (insn) = cur_insn_uid++;
3132 add_insn_after (insn, after);
3136 /* Emit the label LABEL after the insn AFTER. */
3139 emit_label_after (label, after)
3142 /* This can be called twice for the same label
3143 as a result of the confusion that follows a syntax error!
3144 So make it harmless. */
3145 if (INSN_UID (label) == 0)
3147 INSN_UID (label) = cur_insn_uid++;
3148 add_insn_after (label, after);
3154 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3157 emit_note_after (subtype, after)
3161 register rtx note = rtx_alloc (NOTE);
3162 INSN_UID (note) = cur_insn_uid++;
3163 NOTE_SOURCE_FILE (note) = 0;
3164 NOTE_LINE_NUMBER (note) = subtype;
3165 add_insn_after (note, after);
3169 /* Emit a line note for FILE and LINE after the insn AFTER. */
3172 emit_line_note_after (file, line, after)
3179 if (no_line_numbers && line > 0)
3185 note = rtx_alloc (NOTE);
3186 INSN_UID (note) = cur_insn_uid++;
3187 NOTE_SOURCE_FILE (note) = file;
3188 NOTE_LINE_NUMBER (note) = line;
3189 add_insn_after (note, after);
3193 /* Make an insn of code INSN with pattern PATTERN
3194 and add it to the end of the doubly-linked list.
3195 If PATTERN is a SEQUENCE, take the elements of it
3196 and emit an insn for each element.
3198 Returns the last insn emitted. */
3204 rtx insn = last_insn;
3206 if (GET_CODE (pattern) == SEQUENCE)
3210 for (i = 0; i < XVECLEN (pattern, 0); i++)
3212 insn = XVECEXP (pattern, 0, i);
3215 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
3216 sequence_result[XVECLEN (pattern, 0)] = pattern;
3220 insn = make_insn_raw (pattern);
3227 /* Emit the insns in a chain starting with INSN.
3228 Return the last insn emitted. */
3238 rtx next = NEXT_INSN (insn);
3247 /* Emit the insns in a chain starting with INSN and place them in front of
3248 the insn BEFORE. Return the last insn emitted. */
3251 emit_insns_before (insn, before)
3259 rtx next = NEXT_INSN (insn);
3260 add_insn_before (insn, before);
3268 /* Emit the insns in a chain starting with FIRST and place them in back of
3269 the insn AFTER. Return the last insn emitted. */
3272 emit_insns_after (first, after)
3277 register rtx after_after;
3285 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3288 after_after = NEXT_INSN (after);
3290 NEXT_INSN (after) = first;
3291 PREV_INSN (first) = after;
3292 NEXT_INSN (last) = after_after;
3294 PREV_INSN (after_after) = last;
3296 if (after == last_insn)
3301 /* Make an insn of code JUMP_INSN with pattern PATTERN
3302 and add it to the end of the doubly-linked list. */
3305 emit_jump_insn (pattern)
3308 if (GET_CODE (pattern) == SEQUENCE)
3309 return emit_insn (pattern);
3312 register rtx insn = make_jump_insn_raw (pattern);
3318 /* Make an insn of code CALL_INSN with pattern PATTERN
3319 and add it to the end of the doubly-linked list. */
3322 emit_call_insn (pattern)
3325 if (GET_CODE (pattern) == SEQUENCE)
3326 return emit_insn (pattern);
3329 register rtx insn = make_call_insn_raw (pattern);
3331 PUT_CODE (insn, CALL_INSN);
3336 /* Add the label LABEL to the end of the doubly-linked list. */
3342 /* This can be called twice for the same label
3343 as a result of the confusion that follows a syntax error!
3344 So make it harmless. */
3345 if (INSN_UID (label) == 0)
3347 INSN_UID (label) = cur_insn_uid++;
3353 /* Make an insn of code BARRIER
3354 and add it to the end of the doubly-linked list. */
3359 register rtx barrier = rtx_alloc (BARRIER);
3360 INSN_UID (barrier) = cur_insn_uid++;
3365 /* Make an insn of code NOTE
3366 with data-fields specified by FILE and LINE
3367 and add it to the end of the doubly-linked list,
3368 but only if line-numbers are desired for debugging info. */
3371 emit_line_note (file, line)
3375 set_file_and_line_for_stmt (file, line);
3378 if (no_line_numbers)
3382 return emit_note (file, line);
3385 /* Make an insn of code NOTE
3386 with data-fields specified by FILE and LINE
3387 and add it to the end of the doubly-linked list.
3388 If it is a line-number NOTE, omit it if it matches the previous one. */
3391 emit_note (file, line)
3399 if (file && last_filename && !strcmp (file, last_filename)
3400 && line == last_linenum)
3402 last_filename = file;
3403 last_linenum = line;
3406 if (no_line_numbers && line > 0)
3412 note = rtx_alloc (NOTE);
3413 INSN_UID (note) = cur_insn_uid++;
3414 NOTE_SOURCE_FILE (note) = file;
3415 NOTE_LINE_NUMBER (note) = line;
3420 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3423 emit_line_note_force (file, line)
3428 return emit_line_note (file, line);
3431 /* Cause next statement to emit a line note even if the line number
3432 has not changed. This is used at the beginning of a function. */
3435 force_next_line_note ()
3440 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3441 note of this type already exists, remove it first. */
3444 set_unique_reg_note (insn, kind, datum)
3449 rtx note = find_reg_note (insn, kind, NULL_RTX);
3451 /* First remove the note if there already is one. */
3453 remove_note (insn, note);
3455 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3458 /* Return an indication of which type of insn should have X as a body.
3459 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3465 if (GET_CODE (x) == CODE_LABEL)
3467 if (GET_CODE (x) == CALL)
3469 if (GET_CODE (x) == RETURN)
3471 if (GET_CODE (x) == SET)
3473 if (SET_DEST (x) == pc_rtx)
3475 else if (GET_CODE (SET_SRC (x)) == CALL)
3480 if (GET_CODE (x) == PARALLEL)
3483 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3484 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3486 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3487 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3489 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3490 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3496 /* Emit the rtl pattern X as an appropriate kind of insn.
3497 If X is a label, it is simply added into the insn chain. */
3503 enum rtx_code code = classify_insn (x);
3505 if (code == CODE_LABEL)
3506 return emit_label (x);
3507 else if (code == INSN)
3508 return emit_insn (x);
3509 else if (code == JUMP_INSN)
3511 register rtx insn = emit_jump_insn (x);
3512 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3513 return emit_barrier ();
3516 else if (code == CALL_INSN)
3517 return emit_call_insn (x);
3522 /* Begin emitting insns to a sequence which can be packaged in an
3523 RTL_EXPR. If this sequence will contain something that might cause
3524 the compiler to pop arguments to function calls (because those
3525 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3526 details), use do_pending_stack_adjust before calling this function.
3527 That will ensure that the deferred pops are not accidentally
3528 emitted in the middle of this sequence. */
3533 struct sequence_stack *tem;
3535 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3537 tem->next = seq_stack;
3538 tem->first = first_insn;
3539 tem->last = last_insn;
3540 tem->sequence_rtl_expr = seq_rtl_expr;
3548 /* Similarly, but indicate that this sequence will be placed in T, an
3549 RTL_EXPR. See the documentation for start_sequence for more
3550 information about how to use this function. */
3553 start_sequence_for_rtl_expr (t)
3561 /* Set up the insn chain starting with FIRST as the current sequence,
3562 saving the previously current one. See the documentation for
3563 start_sequence for more information about how to use this function. */
3566 push_to_sequence (first)
3573 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3579 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3582 push_to_full_sequence (first, last)
3588 /* We really should have the end of the insn chain here. */
3589 if (last && NEXT_INSN (last))
3593 /* Set up the outer-level insn chain
3594 as the current sequence, saving the previously current one. */
3597 push_topmost_sequence ()
3599 struct sequence_stack *stack, *top = NULL;
3603 for (stack = seq_stack; stack; stack = stack->next)
3606 first_insn = top->first;
3607 last_insn = top->last;
3608 seq_rtl_expr = top->sequence_rtl_expr;
3611 /* After emitting to the outer-level insn chain, update the outer-level
3612 insn chain, and restore the previous saved state. */
3615 pop_topmost_sequence ()
3617 struct sequence_stack *stack, *top = NULL;
3619 for (stack = seq_stack; stack; stack = stack->next)
3622 top->first = first_insn;
3623 top->last = last_insn;
3624 /* ??? Why don't we save seq_rtl_expr here? */
3629 /* After emitting to a sequence, restore previous saved state.
3631 To get the contents of the sequence just made, you must call
3632 `gen_sequence' *before* calling here.
3634 If the compiler might have deferred popping arguments while
3635 generating this sequence, and this sequence will not be immediately
3636 inserted into the instruction stream, use do_pending_stack_adjust
3637 before calling gen_sequence. That will ensure that the deferred
3638 pops are inserted into this sequence, and not into some random
3639 location in the instruction stream. See INHIBIT_DEFER_POP for more
3640 information about deferred popping of arguments. */
3645 struct sequence_stack *tem = seq_stack;
3647 first_insn = tem->first;
3648 last_insn = tem->last;
3649 seq_rtl_expr = tem->sequence_rtl_expr;
3650 seq_stack = tem->next;
3655 /* This works like end_sequence, but records the old sequence in FIRST
3659 end_full_sequence (first, last)
3662 *first = first_insn;
3667 /* Return 1 if currently emitting into a sequence. */
3672 return seq_stack != 0;
3675 /* Generate a SEQUENCE rtx containing the insns already emitted
3676 to the current sequence.
3678 This is how the gen_... function from a DEFINE_EXPAND
3679 constructs the SEQUENCE that it returns. */
3689 /* Count the insns in the chain. */
3691 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3694 /* If only one insn, return it rather than a SEQUENCE.
3695 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3696 the case of an empty list.)
3697 We only return the pattern of an insn if its code is INSN and it
3698 has no notes. This ensures that no information gets lost. */
3700 && ! RTX_FRAME_RELATED_P (first_insn)
3701 && GET_CODE (first_insn) == INSN
3702 /* Don't throw away any reg notes. */
3703 && REG_NOTES (first_insn) == 0)
3707 NEXT_INSN (first_insn) = free_insn;
3708 free_insn = first_insn;
3710 return PATTERN (first_insn);
3713 /* Put them in a vector. See if we already have a SEQUENCE of the
3714 appropriate length around. */
3715 if (!ggc_p && len < SEQUENCE_RESULT_SIZE
3716 && (result = sequence_result[len]) != 0)
3717 sequence_result[len] = 0;
3720 /* Ensure that this rtl goes in saveable_obstack, since we may
3722 push_obstacks_nochange ();
3723 rtl_in_saveable_obstack ();
3724 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3728 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3729 XVECEXP (result, 0, i) = tem;
3734 /* Put the various virtual registers into REGNO_REG_RTX. */
3737 init_virtual_regs (es)
3738 struct emit_status *es;
3740 rtx *ptr = es->x_regno_reg_rtx;
3741 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3742 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3743 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3744 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3745 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3749 clear_emit_caches ()
3753 /* Clear the start_sequence/gen_sequence cache. */
3754 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3755 sequence_result[i] = 0;
3759 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3760 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3761 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3762 static int copy_insn_n_scratches;
3764 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3765 copied an ASM_OPERANDS.
3766 In that case, it is the original input-operand vector. */
3767 static rtvec orig_asm_operands_vector;
3769 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3770 copied an ASM_OPERANDS.
3771 In that case, it is the copied input-operand vector. */
3772 static rtvec copy_asm_operands_vector;
3774 /* Likewise for the constraints vector. */
3775 static rtvec orig_asm_constraints_vector;
3776 static rtvec copy_asm_constraints_vector;
3778 /* Recursively create a new copy of an rtx for copy_insn.
3779 This function differs from copy_rtx in that it handles SCRATCHes and
3780 ASM_OPERANDs properly.
3781 Normally, this function is not used directly; use copy_insn as front end.
3782 However, you could first copy an insn pattern with copy_insn and then use
3783 this function afterwards to properly copy any REG_NOTEs containing
3792 register RTX_CODE code;
3793 register const char *format_ptr;
3795 code = GET_CODE (orig);
3811 for (i = 0; i < copy_insn_n_scratches; i++)
3812 if (copy_insn_scratch_in[i] == orig)
3813 return copy_insn_scratch_out[i];
3817 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3818 a LABEL_REF, it isn't sharable. */
3819 if (GET_CODE (XEXP (orig, 0)) == PLUS
3820 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3821 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3825 /* A MEM with a constant address is not sharable. The problem is that
3826 the constant address may need to be reloaded. If the mem is shared,
3827 then reloading one copy of this mem will cause all copies to appear
3828 to have been reloaded. */
3834 copy = rtx_alloc (code);
3836 /* Copy the various flags, and other information. We assume that
3837 all fields need copying, and then clear the fields that should
3838 not be copied. That is the sensible default behavior, and forces
3839 us to explicitly document why we are *not* copying a flag. */
3840 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3842 /* We do not copy the USED flag, which is used as a mark bit during
3843 walks over the RTL. */
3846 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3847 if (GET_RTX_CLASS (code) == 'i')
3851 copy->frame_related = 0;
3854 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3856 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3858 copy->fld[i] = orig->fld[i];
3859 switch (*format_ptr++)
3862 if (XEXP (orig, i) != NULL)
3863 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3868 if (XVEC (orig, i) == orig_asm_constraints_vector)
3869 XVEC (copy, i) = copy_asm_constraints_vector;
3870 else if (XVEC (orig, i) == orig_asm_operands_vector)
3871 XVEC (copy, i) = copy_asm_operands_vector;
3872 else if (XVEC (orig, i) != NULL)
3874 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3875 for (j = 0; j < XVECLEN (copy, i); j++)
3876 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3882 bitmap new_bits = BITMAP_OBSTACK_ALLOC (rtl_obstack);
3883 bitmap_copy (new_bits, XBITMAP (orig, i));
3884 XBITMAP (copy, i) = new_bits;
3895 /* These are left unchanged. */
3903 if (code == SCRATCH)
3905 i = copy_insn_n_scratches++;
3906 if (i >= MAX_RECOG_OPERANDS)
3908 copy_insn_scratch_in[i] = orig;
3909 copy_insn_scratch_out[i] = copy;
3911 else if (code == ASM_OPERANDS)
3913 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
3914 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
3915 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
3916 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
3922 /* Create a new copy of an rtx.
3923 This function differs from copy_rtx in that it handles SCRATCHes and
3924 ASM_OPERANDs properly.
3925 INSN doesn't really have to be a full INSN; it could be just the
3931 copy_insn_n_scratches = 0;
3932 orig_asm_operands_vector = 0;
3933 orig_asm_constraints_vector = 0;
3934 copy_asm_operands_vector = 0;
3935 copy_asm_constraints_vector = 0;
3936 return copy_insn_1 (insn);
3939 /* Initialize data structures and variables in this file
3940 before generating rtl for each function. */
3945 struct function *f = cfun;
3947 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3950 seq_rtl_expr = NULL;
3952 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3955 first_label_num = label_num;
3959 clear_emit_caches ();
3961 /* Init the tables that describe all the pseudo regs. */
3963 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3965 f->emit->regno_pointer_flag
3966 = (char *) xcalloc (f->emit->regno_pointer_flag_length, sizeof (char));
3968 f->emit->regno_pointer_align
3969 = (unsigned char *) xcalloc (f->emit->regno_pointer_flag_length,
3970 sizeof (unsigned char));
3973 = (rtx *) xcalloc (f->emit->regno_pointer_flag_length * sizeof (rtx),
3976 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3977 init_virtual_regs (f->emit);
3979 /* Indicate that the virtual registers and stack locations are
3981 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3982 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3983 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3984 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3986 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3987 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3988 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3989 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3990 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3992 #ifdef STACK_BOUNDARY
3993 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
3994 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3995 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3996 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
3998 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
3999 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4000 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4001 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4002 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4005 #ifdef INIT_EXPANDERS
4010 /* Mark SS for GC. */
4013 mark_sequence_stack (ss)
4014 struct sequence_stack *ss;
4018 ggc_mark_rtx (ss->first);
4019 ggc_mark_tree (ss->sequence_rtl_expr);
4024 /* Mark ES for GC. */
4027 mark_emit_status (es)
4028 struct emit_status *es;
4036 for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
4040 mark_sequence_stack (es->sequence_stack);
4041 ggc_mark_tree (es->sequence_rtl_expr);
4042 ggc_mark_rtx (es->x_first_insn);
4045 /* Create some permanent unique rtl objects shared between all functions.
4046 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4049 init_emit_once (line_numbers)
4053 enum machine_mode mode;
4054 enum machine_mode double_mode;
4056 no_line_numbers = ! line_numbers;
4058 /* Compute the word and byte modes. */
4060 byte_mode = VOIDmode;
4061 word_mode = VOIDmode;
4062 double_mode = VOIDmode;
4064 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4065 mode = GET_MODE_WIDER_MODE (mode))
4067 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4068 && byte_mode == VOIDmode)
4071 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4072 && word_mode == VOIDmode)
4076 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4077 mode = GET_MODE_WIDER_MODE (mode))
4079 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4080 && double_mode == VOIDmode)
4084 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4086 /* Assign register numbers to the globally defined register rtx.
4087 This must be done at runtime because the register number field
4088 is in a union and some compilers can't initialize unions. */
4090 pc_rtx = gen_rtx (PC, VOIDmode);
4091 cc0_rtx = gen_rtx (CC0, VOIDmode);
4092 stack_pointer_rtx = gen_rtx_raw_REG (Pmode, STACK_POINTER_REGNUM);
4093 frame_pointer_rtx = gen_rtx_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4094 if (hard_frame_pointer_rtx == 0)
4095 hard_frame_pointer_rtx = gen_rtx_raw_REG (Pmode,
4096 HARD_FRAME_POINTER_REGNUM);
4097 if (arg_pointer_rtx == 0)
4098 arg_pointer_rtx = gen_rtx_raw_REG (Pmode, ARG_POINTER_REGNUM);
4099 virtual_incoming_args_rtx =
4100 gen_rtx_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4101 virtual_stack_vars_rtx =
4102 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4103 virtual_stack_dynamic_rtx =
4104 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4105 virtual_outgoing_args_rtx =
4106 gen_rtx_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4107 virtual_cfa_rtx = gen_rtx_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4109 /* These rtx must be roots if GC is enabled. */
4111 ggc_add_rtx_root (global_rtl, GR_MAX);
4113 #ifdef INIT_EXPANDERS
4114 /* This is to initialize save_machine_status and restore_machine_status before
4115 the first call to push_function_context_to. This is needed by the Chill
4116 front end which calls push_function_context_to before the first cal to
4117 init_function_start. */
4121 /* Create the unique rtx's for certain rtx codes and operand values. */
4123 /* Don't use gen_rtx here since gen_rtx in this case
4124 tries to use these variables. */
4125 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4126 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4127 gen_rtx_raw_CONST_INT (VOIDmode, i);
4129 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4131 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4132 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4133 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4135 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4137 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4138 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4139 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4140 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4142 for (i = 0; i <= 2; i++)
4144 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4145 mode = GET_MODE_WIDER_MODE (mode))
4147 rtx tem = rtx_alloc (CONST_DOUBLE);
4148 union real_extract u;
4150 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
4151 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4153 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
4154 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4155 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4156 PUT_MODE (tem, mode);
4158 const_tiny_rtx[i][(int) mode] = tem;
4161 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4163 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4164 mode = GET_MODE_WIDER_MODE (mode))
4165 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4167 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4169 mode = GET_MODE_WIDER_MODE (mode))
4170 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4173 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
4174 if (GET_MODE_CLASS (mode) == MODE_CC)
4175 const_tiny_rtx[0][(int) mode] = const0_rtx;
4177 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4178 if (STORE_FLAG_VALUE == 1)
4179 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4181 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4182 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4183 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4184 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4185 ggc_add_rtx_root (&const_true_rtx, 1);
4187 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4188 return_address_pointer_rtx
4189 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4193 struct_value_rtx = STRUCT_VALUE;
4195 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4198 #ifdef STRUCT_VALUE_INCOMING
4199 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4201 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4202 struct_value_incoming_rtx
4203 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4205 struct_value_incoming_rtx = struct_value_rtx;
4209 #ifdef STATIC_CHAIN_REGNUM
4210 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4212 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4213 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4214 static_chain_incoming_rtx
4215 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4218 static_chain_incoming_rtx = static_chain_rtx;
4222 static_chain_rtx = STATIC_CHAIN;
4224 #ifdef STATIC_CHAIN_INCOMING
4225 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4227 static_chain_incoming_rtx = static_chain_rtx;
4231 #ifdef PIC_OFFSET_TABLE_REGNUM
4232 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4235 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4236 ggc_add_rtx_root (&struct_value_rtx, 1);
4237 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4238 ggc_add_rtx_root (&static_chain_rtx, 1);
4239 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4240 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4242 /* Initialize the CONST_INT hash table. */
4243 const_int_htab = htab_create (37, const_int_htab_hash,
4244 const_int_htab_eq, NULL);
4245 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4249 /* Query and clear/ restore no_line_numbers. This is used by the
4250 switch / case handling in stmt.c to give proper line numbers in
4251 warnings about unreachable code. */
4254 force_line_numbers ()
4256 int old = no_line_numbers;
4258 no_line_numbers = 0;
4260 force_next_line_note ();
4265 restore_line_number_status (old_value)
4268 no_line_numbers = old_value;