1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these except perhaps the floating-point CONST_DOUBLEs
91 are unique; no other rtx-object will be equal to any of these. */
93 rtx global_rtl[GR_MAX];
95 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
96 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
97 record a copy of const[012]_rtx. */
99 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
108 /* All references to the following fixed hard registers go through
109 these unique rtl objects. On machines where the frame-pointer and
110 arg-pointer are the same register, they use the same unique object.
112 After register allocation, other rtl objects which used to be pseudo-regs
113 may be clobbered to refer to the frame-pointer register.
114 But references that were originally to the frame-pointer can be
115 distinguished from the others because they contain frame_pointer_rtx.
117 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
118 tricky: until register elimination has taken place hard_frame_pointer_rtx
119 should be used if it is being set, and frame_pointer_rtx otherwise. After
120 register elimination hard_frame_pointer_rtx should always be used.
121 On machines where the two registers are same (most) then these are the
124 In an inline procedure, the stack and frame pointer rtxs may not be
125 used for anything else. */
126 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
127 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
128 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static htab_t const_int_htab;
148 /* A hash table storing memory attribute structures. */
149 static htab_t mem_attrs_htab;
151 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
152 shortly thrown away. We use two mechanisms to prevent this waste:
154 For sizes up to 5 elements, we keep a SEQUENCE and its associated
155 rtvec for use by gen_sequence. One entry for each size is
156 sufficient because most cases are calls to gen_sequence followed by
157 immediately emitting the SEQUENCE. Reuse is safe since emitting a
158 sequence is destructive on the insn in it anyway and hence can't be
161 We do not bother to save this cached data over nested function calls.
162 Instead, we just reinitialize them. */
164 #define SEQUENCE_RESULT_SIZE 5
166 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
168 /* During RTL generation, we also keep a list of free INSN rtl codes. */
169 static rtx free_insn;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_linenum (cfun->emit->x_last_linenum)
175 #define last_filename (cfun->emit->x_last_filename)
176 #define first_label_num (cfun->emit->x_first_label_num)
178 static rtx make_jump_insn_raw PARAMS ((rtx));
179 static rtx make_call_insn_raw PARAMS ((rtx));
180 static rtx find_line_note PARAMS ((rtx));
181 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
182 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
184 static void unshare_all_rtl_1 PARAMS ((rtx));
185 static void unshare_all_decls PARAMS ((tree));
186 static void reset_used_decls PARAMS ((tree));
187 static void mark_label_nuses PARAMS ((rtx));
188 static hashval_t const_int_htab_hash PARAMS ((const void *));
189 static int const_int_htab_eq PARAMS ((const void *,
191 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
192 static int mem_attrs_htab_eq PARAMS ((const void *,
194 static void mem_attrs_mark PARAMS ((const void *));
195 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
198 static tree component_ref_for_mem_expr PARAMS ((tree));
200 /* Probability of the conditional branch currently proceeded by try_split.
201 Set to -1 otherwise. */
202 int split_branch_probability = -1;
204 /* Returns a hash code for X (which is a really a CONST_INT). */
207 const_int_htab_hash (x)
210 return (hashval_t) INTVAL ((const struct rtx_def *) x);
213 /* Returns non-zero if the value represented by X (which is really a
214 CONST_INT) is the same as that given by Y (which is really a
218 const_int_htab_eq (x, y)
222 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
225 /* Returns a hash code for X (which is a really a mem_attrs *). */
228 mem_attrs_htab_hash (x)
231 mem_attrs *p = (mem_attrs *) x;
233 return (p->alias ^ (p->align * 1000)
234 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
235 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
239 /* Returns non-zero if the value represented by X (which is really a
240 mem_attrs *) is the same as that given by Y (which is also really a
244 mem_attrs_htab_eq (x, y)
248 mem_attrs *p = (mem_attrs *) x;
249 mem_attrs *q = (mem_attrs *) y;
251 return (p->alias == q->alias && p->expr == q->expr && p->offset == q->offset
252 && p->size == q->size && p->align == q->align);
255 /* This routine is called when we determine that we need a mem_attrs entry.
256 It marks the associated decl and RTL as being used, if present. */
262 mem_attrs *p = (mem_attrs *) x;
265 ggc_mark_tree (p->expr);
268 ggc_mark_rtx (p->offset);
271 ggc_mark_rtx (p->size);
274 /* Allocate a new mem_attrs structure and insert it into the hash table if
275 one identical to it is not already in the table. We are doing this for
279 get_mem_attrs (alias, expr, offset, size, align, mode)
285 enum machine_mode mode;
290 /* If everything is the default, we can just return zero. */
291 if (alias == 0 && expr == 0 && offset == 0
293 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
294 && (align == BITS_PER_UNIT
295 || (mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
300 attrs.offset = offset;
304 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
307 *slot = ggc_alloc (sizeof (mem_attrs));
308 memcpy (*slot, &attrs, sizeof (mem_attrs));
314 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
315 don't attempt to share with the various global pieces of rtl (such as
316 frame_pointer_rtx). */
319 gen_raw_REG (mode, regno)
320 enum machine_mode mode;
323 rtx x = gen_rtx_raw_REG (mode, regno);
324 ORIGINAL_REGNO (x) = regno;
328 /* There are some RTL codes that require special attention; the generation
329 functions do the raw handling. If you add to this list, modify
330 special_rtx in gengenrtl.c as well. */
333 gen_rtx_CONST_INT (mode, arg)
334 enum machine_mode mode ATTRIBUTE_UNUSED;
339 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
340 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
342 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
343 if (const_true_rtx && arg == STORE_FLAG_VALUE)
344 return const_true_rtx;
347 /* Look up the CONST_INT in the hash table. */
348 slot = htab_find_slot_with_hash (const_int_htab, &arg,
349 (hashval_t) arg, INSERT);
351 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
356 /* CONST_DOUBLEs needs special handling because their length is known
360 gen_rtx_CONST_DOUBLE (mode, arg0, arg1)
361 enum machine_mode mode;
362 HOST_WIDE_INT arg0, arg1;
364 rtx r = rtx_alloc (CONST_DOUBLE);
368 X0EXP (r, 0) = NULL_RTX;
372 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 2; --i)
379 gen_rtx_REG (mode, regno)
380 enum machine_mode mode;
383 /* In case the MD file explicitly references the frame pointer, have
384 all such references point to the same frame pointer. This is
385 used during frame pointer elimination to distinguish the explicit
386 references to these registers from pseudos that happened to be
389 If we have eliminated the frame pointer or arg pointer, we will
390 be using it as a normal register, for example as a spill
391 register. In such cases, we might be accessing it in a mode that
392 is not Pmode and therefore cannot use the pre-allocated rtx.
394 Also don't do this when we are making new REGs in reload, since
395 we don't want to get confused with the real pointers. */
397 if (mode == Pmode && !reload_in_progress)
399 if (regno == FRAME_POINTER_REGNUM)
400 return frame_pointer_rtx;
401 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
402 if (regno == HARD_FRAME_POINTER_REGNUM)
403 return hard_frame_pointer_rtx;
405 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
406 if (regno == ARG_POINTER_REGNUM)
407 return arg_pointer_rtx;
409 #ifdef RETURN_ADDRESS_POINTER_REGNUM
410 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
411 return return_address_pointer_rtx;
413 if (regno == STACK_POINTER_REGNUM)
414 return stack_pointer_rtx;
417 return gen_raw_REG (mode, regno);
421 gen_rtx_MEM (mode, addr)
422 enum machine_mode mode;
425 rtx rt = gen_rtx_raw_MEM (mode, addr);
427 /* This field is not cleared by the mere allocation of the rtx, so
435 gen_rtx_SUBREG (mode, reg, offset)
436 enum machine_mode mode;
440 /* This is the most common failure type.
441 Catch it early so we can see who does it. */
442 if ((offset % GET_MODE_SIZE (mode)) != 0)
445 /* This check isn't usable right now because combine will
446 throw arbitrary crap like a CALL into a SUBREG in
447 gen_lowpart_for_combine so we must just eat it. */
449 /* Check for this too. */
450 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
453 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
456 /* Generate a SUBREG representing the least-significant part of REG if MODE
457 is smaller than mode of REG, otherwise paradoxical SUBREG. */
460 gen_lowpart_SUBREG (mode, reg)
461 enum machine_mode mode;
464 enum machine_mode inmode;
466 inmode = GET_MODE (reg);
467 if (inmode == VOIDmode)
469 return gen_rtx_SUBREG (mode, reg,
470 subreg_lowpart_offset (mode, inmode));
473 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
475 ** This routine generates an RTX of the size specified by
476 ** <code>, which is an RTX code. The RTX structure is initialized
477 ** from the arguments <element1> through <elementn>, which are
478 ** interpreted according to the specific RTX type's format. The
479 ** special machine mode associated with the rtx (if any) is specified
482 ** gen_rtx can be invoked in a way which resembles the lisp-like
483 ** rtx it will generate. For example, the following rtx structure:
485 ** (plus:QI (mem:QI (reg:SI 1))
486 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
488 ** ...would be generated by the following C code:
490 ** gen_rtx (PLUS, QImode,
491 ** gen_rtx (MEM, QImode,
492 ** gen_rtx (REG, SImode, 1)),
493 ** gen_rtx (MEM, QImode,
494 ** gen_rtx (PLUS, SImode,
495 ** gen_rtx (REG, SImode, 2),
496 ** gen_rtx (REG, SImode, 3)))),
501 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
503 int i; /* Array indices... */
504 const char *fmt; /* Current rtx's format... */
505 rtx rt_val; /* RTX to return to caller... */
508 VA_FIXEDARG (p, enum rtx_code, code);
509 VA_FIXEDARG (p, enum machine_mode, mode);
514 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
519 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
520 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
522 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1);
527 rt_val = gen_rtx_REG (mode, va_arg (p, int));
531 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
535 rt_val = rtx_alloc (code); /* Allocate the storage space. */
536 rt_val->mode = mode; /* Store the machine mode... */
538 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
539 for (i = 0; i < GET_RTX_LENGTH (code); i++)
543 case '0': /* Unused field. */
546 case 'i': /* An integer? */
547 XINT (rt_val, i) = va_arg (p, int);
550 case 'w': /* A wide integer? */
551 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
554 case 's': /* A string? */
555 XSTR (rt_val, i) = va_arg (p, char *);
558 case 'e': /* An expression? */
559 case 'u': /* An insn? Same except when printing. */
560 XEXP (rt_val, i) = va_arg (p, rtx);
563 case 'E': /* An RTX vector? */
564 XVEC (rt_val, i) = va_arg (p, rtvec);
567 case 'b': /* A bitmap? */
568 XBITMAP (rt_val, i) = va_arg (p, bitmap);
571 case 't': /* A tree? */
572 XTREE (rt_val, i) = va_arg (p, tree);
586 /* gen_rtvec (n, [rt1, ..., rtn])
588 ** This routine creates an rtvec and stores within it the
589 ** pointers to rtx's which are its arguments.
594 gen_rtvec VPARAMS ((int n, ...))
600 VA_FIXEDARG (p, int, n);
603 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
605 vector = (rtx *) alloca (n * sizeof (rtx));
607 for (i = 0; i < n; i++)
608 vector[i] = va_arg (p, rtx);
610 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
614 return gen_rtvec_v (save_n, vector);
618 gen_rtvec_v (n, argp)
626 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
628 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
630 for (i = 0; i < n; i++)
631 rt_val->elem[i] = *argp++;
636 /* Generate a REG rtx for a new pseudo register of mode MODE.
637 This pseudo is assigned the next sequential register number. */
641 enum machine_mode mode;
643 struct function *f = cfun;
646 /* Don't let anything called after initial flow analysis create new
651 if (generating_concat_p
652 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
653 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
655 /* For complex modes, don't make a single pseudo.
656 Instead, make a CONCAT of two pseudos.
657 This allows noncontiguous allocation of the real and imaginary parts,
658 which makes much better code. Besides, allocating DCmode
659 pseudos overstrains reload on some machines like the 386. */
660 rtx realpart, imagpart;
661 int size = GET_MODE_UNIT_SIZE (mode);
662 enum machine_mode partmode
663 = mode_for_size (size * BITS_PER_UNIT,
664 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
665 ? MODE_FLOAT : MODE_INT),
668 realpart = gen_reg_rtx (partmode);
669 imagpart = gen_reg_rtx (partmode);
670 return gen_rtx_CONCAT (mode, realpart, imagpart);
673 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
674 enough to have an element for this pseudo reg number. */
676 if (reg_rtx_no == f->emit->regno_pointer_align_length)
678 int old_size = f->emit->regno_pointer_align_length;
683 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
684 memset (new + old_size, 0, old_size);
685 f->emit->regno_pointer_align = (unsigned char *) new;
687 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
688 old_size * 2 * sizeof (rtx));
689 memset (new1 + old_size, 0, old_size * sizeof (rtx));
690 regno_reg_rtx = new1;
692 new2 = (tree *) xrealloc (f->emit->regno_decl,
693 old_size * 2 * sizeof (tree));
694 memset (new2 + old_size, 0, old_size * sizeof (tree));
695 f->emit->regno_decl = new2;
697 f->emit->regno_pointer_align_length = old_size * 2;
700 val = gen_raw_REG (mode, reg_rtx_no);
701 regno_reg_rtx[reg_rtx_no++] = val;
705 /* Identify REG (which may be a CONCAT) as a user register. */
711 if (GET_CODE (reg) == CONCAT)
713 REG_USERVAR_P (XEXP (reg, 0)) = 1;
714 REG_USERVAR_P (XEXP (reg, 1)) = 1;
716 else if (GET_CODE (reg) == REG)
717 REG_USERVAR_P (reg) = 1;
722 /* Identify REG as a probable pointer register and show its alignment
723 as ALIGN, if nonzero. */
726 mark_reg_pointer (reg, align)
730 if (! REG_POINTER (reg))
732 REG_POINTER (reg) = 1;
735 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
737 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
738 /* We can no-longer be sure just how aligned this pointer is */
739 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
742 /* Return 1 plus largest pseudo reg number used in the current function. */
750 /* Return 1 + the largest label number used so far in the current function. */
755 if (last_label_num && label_num == base_label_num)
756 return last_label_num;
760 /* Return first label number used in this function (if any were used). */
763 get_first_label_num ()
765 return first_label_num;
768 /* Return the final regno of X, which is a SUBREG of a hard
771 subreg_hard_regno (x, check_mode)
775 enum machine_mode mode = GET_MODE (x);
776 unsigned int byte_offset, base_regno, final_regno;
777 rtx reg = SUBREG_REG (x);
779 /* This is where we attempt to catch illegal subregs
780 created by the compiler. */
781 if (GET_CODE (x) != SUBREG
782 || GET_CODE (reg) != REG)
784 base_regno = REGNO (reg);
785 if (base_regno >= FIRST_PSEUDO_REGISTER)
787 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
790 /* Catch non-congruent offsets too. */
791 byte_offset = SUBREG_BYTE (x);
792 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
795 final_regno = subreg_regno (x);
800 /* Return a value representing some low-order bits of X, where the number
801 of low-order bits is given by MODE. Note that no conversion is done
802 between floating-point and fixed-point values, rather, the bit
803 representation is returned.
805 This function handles the cases in common between gen_lowpart, below,
806 and two variants in cse.c and combine.c. These are the cases that can
807 be safely handled at all points in the compilation.
809 If this is not a case we can handle, return 0. */
812 gen_lowpart_common (mode, x)
813 enum machine_mode mode;
816 int msize = GET_MODE_SIZE (mode);
817 int xsize = GET_MODE_SIZE (GET_MODE (x));
820 if (GET_MODE (x) == mode)
823 /* MODE must occupy no more words than the mode of X. */
824 if (GET_MODE (x) != VOIDmode
825 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
826 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
829 offset = subreg_lowpart_offset (mode, GET_MODE (x));
831 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
832 && (GET_MODE_CLASS (mode) == MODE_INT
833 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
835 /* If we are getting the low-order part of something that has been
836 sign- or zero-extended, we can either just use the object being
837 extended or make a narrower extension. If we want an even smaller
838 piece than the size of the object being extended, call ourselves
841 This case is used mostly by combine and cse. */
843 if (GET_MODE (XEXP (x, 0)) == mode)
845 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
846 return gen_lowpart_common (mode, XEXP (x, 0));
847 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
848 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
850 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
851 || GET_CODE (x) == CONCAT)
852 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
853 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
854 from the low-order part of the constant. */
855 else if ((GET_MODE_CLASS (mode) == MODE_INT
856 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
857 && GET_MODE (x) == VOIDmode
858 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
860 /* If MODE is twice the host word size, X is already the desired
861 representation. Otherwise, if MODE is wider than a word, we can't
862 do this. If MODE is exactly a word, return just one CONST_INT. */
864 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
866 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
868 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
869 return (GET_CODE (x) == CONST_INT ? x
870 : GEN_INT (CONST_DOUBLE_LOW (x)));
873 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
874 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
875 : CONST_DOUBLE_LOW (x));
877 /* Sign extend to HOST_WIDE_INT. */
878 val = trunc_int_for_mode (val, mode);
880 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
885 #ifndef REAL_ARITHMETIC
886 /* If X is an integral constant but we want it in floating-point, it
887 must be the case that we have a union of an integer and a floating-point
888 value. If the machine-parameters allow it, simulate that union here
889 and return the result. The two-word and single-word cases are
892 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
893 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
894 || flag_pretend_float)
895 && GET_MODE_CLASS (mode) == MODE_FLOAT
896 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
897 && GET_CODE (x) == CONST_INT
898 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
900 union {HOST_WIDE_INT i; float d; } u;
903 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
905 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
906 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
907 || flag_pretend_float)
908 && GET_MODE_CLASS (mode) == MODE_FLOAT
909 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
910 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
911 && GET_MODE (x) == VOIDmode
912 && (sizeof (double) * HOST_BITS_PER_CHAR
913 == 2 * HOST_BITS_PER_WIDE_INT))
915 union {HOST_WIDE_INT i[2]; double d; } u;
916 HOST_WIDE_INT low, high;
918 if (GET_CODE (x) == CONST_INT)
919 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
921 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
923 #ifdef HOST_WORDS_BIG_ENDIAN
924 u.i[0] = high, u.i[1] = low;
926 u.i[0] = low, u.i[1] = high;
929 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
932 /* Similarly, if this is converting a floating-point value into a
933 single-word integer. Only do this is the host and target parameters are
936 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
937 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
938 || flag_pretend_float)
939 && (GET_MODE_CLASS (mode) == MODE_INT
940 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
941 && GET_CODE (x) == CONST_DOUBLE
942 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
943 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
944 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
946 /* Similarly, if this is converting a floating-point value into a
947 two-word integer, we can do this one word at a time and make an
948 integer. Only do this is the host and target parameters are
951 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
952 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
953 || flag_pretend_float)
954 && (GET_MODE_CLASS (mode) == MODE_INT
955 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
956 && GET_CODE (x) == CONST_DOUBLE
957 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
958 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
960 rtx lowpart, highpart;
962 lowpart = constant_subword (x,
963 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
965 highpart = constant_subword (x,
966 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
968 if (lowpart && GET_CODE (lowpart) == CONST_INT
969 && highpart && GET_CODE (highpart) == CONST_INT)
970 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
972 #else /* ifndef REAL_ARITHMETIC */
974 /* When we have a FP emulator, we can handle all conversions between
975 FP and integer operands. This simplifies reload because it
976 doesn't have to deal with constructs like (subreg:DI
977 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
978 /* Single-precision floats are always 32-bits and double-precision
979 floats are always 64-bits. */
981 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
982 && GET_MODE_BITSIZE (mode) == 32
983 && GET_CODE (x) == CONST_INT)
989 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
990 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
992 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
993 && GET_MODE_BITSIZE (mode) == 64
994 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
995 && GET_MODE (x) == VOIDmode)
999 HOST_WIDE_INT low, high;
1001 if (GET_CODE (x) == CONST_INT)
1004 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1008 low = CONST_DOUBLE_LOW (x);
1009 high = CONST_DOUBLE_HIGH (x);
1012 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1014 if (WORDS_BIG_ENDIAN)
1015 i[0] = high, i[1] = low;
1017 i[0] = low, i[1] = high;
1019 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1020 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1022 else if ((GET_MODE_CLASS (mode) == MODE_INT
1023 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1024 && GET_CODE (x) == CONST_DOUBLE
1025 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1028 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1029 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1031 /* Convert 'r' into an array of four 32-bit words in target word
1033 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1034 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1037 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1040 i[3 - 3 * endian] = 0;
1043 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1044 i[2 - 2 * endian] = 0;
1045 i[3 - 2 * endian] = 0;
1048 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1049 i[3 - 3 * endian] = 0;
1052 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1057 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1059 #if HOST_BITS_PER_WIDE_INT == 32
1060 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1062 if (HOST_BITS_PER_WIDE_INT != 64)
1065 return immed_double_const ((((unsigned long) i[3 * endian])
1066 | ((HOST_WIDE_INT) i[1 + endian] << 32)),
1067 (((unsigned long) i[2 - endian])
1068 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32)),
1072 #endif /* ifndef REAL_ARITHMETIC */
1074 /* Otherwise, we can't do this. */
1078 /* Return the real part (which has mode MODE) of a complex value X.
1079 This always comes at the low address in memory. */
1082 gen_realpart (mode, x)
1083 enum machine_mode mode;
1086 if (WORDS_BIG_ENDIAN
1087 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1089 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1091 ("can't access real part of complex value in hard register");
1092 else if (WORDS_BIG_ENDIAN)
1093 return gen_highpart (mode, x);
1095 return gen_lowpart (mode, x);
1098 /* Return the imaginary part (which has mode MODE) of a complex value X.
1099 This always comes at the high address in memory. */
1102 gen_imagpart (mode, x)
1103 enum machine_mode mode;
1106 if (WORDS_BIG_ENDIAN)
1107 return gen_lowpart (mode, x);
1108 else if (! WORDS_BIG_ENDIAN
1109 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1111 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1113 ("can't access imaginary part of complex value in hard register");
1115 return gen_highpart (mode, x);
1118 /* Return 1 iff X, assumed to be a SUBREG,
1119 refers to the real part of the complex value in its containing reg.
1120 Complex values are always stored with the real part in the first word,
1121 regardless of WORDS_BIG_ENDIAN. */
1124 subreg_realpart_p (x)
1127 if (GET_CODE (x) != SUBREG)
1130 return ((unsigned int) SUBREG_BYTE (x)
1131 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1134 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1135 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1136 least-significant part of X.
1137 MODE specifies how big a part of X to return;
1138 it usually should not be larger than a word.
1139 If X is a MEM whose address is a QUEUED, the value may be so also. */
1142 gen_lowpart (mode, x)
1143 enum machine_mode mode;
1146 rtx result = gen_lowpart_common (mode, x);
1150 else if (GET_CODE (x) == REG)
1152 /* Must be a hard reg that's not valid in MODE. */
1153 result = gen_lowpart_common (mode, copy_to_reg (x));
1158 else if (GET_CODE (x) == MEM)
1160 /* The only additional case we can do is MEM. */
1162 if (WORDS_BIG_ENDIAN)
1163 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1164 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1166 if (BYTES_BIG_ENDIAN)
1167 /* Adjust the address so that the address-after-the-data
1169 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1170 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1172 return adjust_address (x, mode, offset);
1174 else if (GET_CODE (x) == ADDRESSOF)
1175 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1180 /* Like `gen_lowpart', but refer to the most significant part.
1181 This is used to access the imaginary part of a complex number. */
1184 gen_highpart (mode, x)
1185 enum machine_mode mode;
1188 unsigned int msize = GET_MODE_SIZE (mode);
1191 /* This case loses if X is a subreg. To catch bugs early,
1192 complain if an invalid MODE is used even in other cases. */
1193 if (msize > UNITS_PER_WORD
1194 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1197 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1198 subreg_highpart_offset (mode, GET_MODE (x)));
1200 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1201 the target if we have a MEM. gen_highpart must return a valid operand,
1202 emitting code if necessary to do so. */
1203 if (GET_CODE (result) == MEM)
1204 result = validize_mem (result);
1211 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1212 be VOIDmode constant. */
1214 gen_highpart_mode (outermode, innermode, exp)
1215 enum machine_mode outermode, innermode;
1218 if (GET_MODE (exp) != VOIDmode)
1220 if (GET_MODE (exp) != innermode)
1222 return gen_highpart (outermode, exp);
1224 return simplify_gen_subreg (outermode, exp, innermode,
1225 subreg_highpart_offset (outermode, innermode));
1227 /* Return offset in bytes to get OUTERMODE low part
1228 of the value in mode INNERMODE stored in memory in target format. */
1231 subreg_lowpart_offset (outermode, innermode)
1232 enum machine_mode outermode, innermode;
1234 unsigned int offset = 0;
1235 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1239 if (WORDS_BIG_ENDIAN)
1240 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1241 if (BYTES_BIG_ENDIAN)
1242 offset += difference % UNITS_PER_WORD;
1248 /* Return offset in bytes to get OUTERMODE high part
1249 of the value in mode INNERMODE stored in memory in target format. */
1251 subreg_highpart_offset (outermode, innermode)
1252 enum machine_mode outermode, innermode;
1254 unsigned int offset = 0;
1255 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1257 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1262 if (! WORDS_BIG_ENDIAN)
1263 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1264 if (! BYTES_BIG_ENDIAN)
1265 offset += difference % UNITS_PER_WORD;
1271 /* Return 1 iff X, assumed to be a SUBREG,
1272 refers to the least significant part of its containing reg.
1273 If X is not a SUBREG, always return 1 (it is its own low part!). */
1276 subreg_lowpart_p (x)
1279 if (GET_CODE (x) != SUBREG)
1281 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1284 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1285 == SUBREG_BYTE (x));
1289 /* Helper routine for all the constant cases of operand_subword.
1290 Some places invoke this directly. */
1293 constant_subword (op, offset, mode)
1296 enum machine_mode mode;
1298 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1301 /* If OP is already an integer word, return it. */
1302 if (GET_MODE_CLASS (mode) == MODE_INT
1303 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1306 #ifdef REAL_ARITHMETIC
1307 /* The output is some bits, the width of the target machine's word.
1308 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1310 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1311 && GET_MODE_CLASS (mode) == MODE_FLOAT
1312 && GET_MODE_BITSIZE (mode) == 64
1313 && GET_CODE (op) == CONST_DOUBLE)
1318 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1319 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1321 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1322 which the words are written depends on the word endianness.
1323 ??? This is a potential portability problem and should
1324 be fixed at some point.
1326 We must exercise caution with the sign bit. By definition there
1327 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1328 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1329 So we explicitly mask and sign-extend as necessary. */
1330 if (BITS_PER_WORD == 32)
1333 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1334 return GEN_INT (val);
1336 #if HOST_BITS_PER_WIDE_INT >= 64
1337 else if (BITS_PER_WORD >= 64 && offset == 0)
1339 val = k[! WORDS_BIG_ENDIAN];
1340 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1341 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1342 return GEN_INT (val);
1345 else if (BITS_PER_WORD == 16)
1347 val = k[offset >> 1];
1348 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1350 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1351 return GEN_INT (val);
1356 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1357 && GET_MODE_CLASS (mode) == MODE_FLOAT
1358 && GET_MODE_BITSIZE (mode) > 64
1359 && GET_CODE (op) == CONST_DOUBLE)
1364 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1365 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1367 if (BITS_PER_WORD == 32)
1370 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1371 return GEN_INT (val);
1373 #if HOST_BITS_PER_WIDE_INT >= 64
1374 else if (BITS_PER_WORD >= 64 && offset <= 1)
1376 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1377 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1378 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1379 return GEN_INT (val);
1385 #else /* no REAL_ARITHMETIC */
1386 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1387 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1388 || flag_pretend_float)
1389 && GET_MODE_CLASS (mode) == MODE_FLOAT
1390 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1391 && GET_CODE (op) == CONST_DOUBLE)
1393 /* The constant is stored in the host's word-ordering,
1394 but we want to access it in the target's word-ordering. Some
1395 compilers don't like a conditional inside macro args, so we have two
1396 copies of the return. */
1397 #ifdef HOST_WORDS_BIG_ENDIAN
1398 return GEN_INT (offset == WORDS_BIG_ENDIAN
1399 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1401 return GEN_INT (offset != WORDS_BIG_ENDIAN
1402 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1405 #endif /* no REAL_ARITHMETIC */
1407 /* Single word float is a little harder, since single- and double-word
1408 values often do not have the same high-order bits. We have already
1409 verified that we want the only defined word of the single-word value. */
1410 #ifdef REAL_ARITHMETIC
1411 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1412 && GET_MODE_BITSIZE (mode) == 32
1413 && GET_CODE (op) == CONST_DOUBLE)
1418 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1419 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1421 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1423 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1425 if (BITS_PER_WORD == 16)
1427 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1429 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1432 return GEN_INT (val);
1435 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1436 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1437 || flag_pretend_float)
1438 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1439 && GET_MODE_CLASS (mode) == MODE_FLOAT
1440 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1441 && GET_CODE (op) == CONST_DOUBLE)
1444 union {float f; HOST_WIDE_INT i; } u;
1446 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1449 return GEN_INT (u.i);
1451 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1452 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1453 || flag_pretend_float)
1454 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1455 && GET_MODE_CLASS (mode) == MODE_FLOAT
1456 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1457 && GET_CODE (op) == CONST_DOUBLE)
1460 union {double d; HOST_WIDE_INT i; } u;
1462 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1465 return GEN_INT (u.i);
1467 #endif /* no REAL_ARITHMETIC */
1469 /* The only remaining cases that we can handle are integers.
1470 Convert to proper endianness now since these cases need it.
1471 At this point, offset == 0 means the low-order word.
1473 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1474 in general. However, if OP is (const_int 0), we can just return
1477 if (op == const0_rtx)
1480 if (GET_MODE_CLASS (mode) != MODE_INT
1481 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1482 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1485 if (WORDS_BIG_ENDIAN)
1486 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1488 /* Find out which word on the host machine this value is in and get
1489 it from the constant. */
1490 val = (offset / size_ratio == 0
1491 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1492 : (GET_CODE (op) == CONST_INT
1493 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1495 /* Get the value we want into the low bits of val. */
1496 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1497 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1499 val = trunc_int_for_mode (val, word_mode);
1501 return GEN_INT (val);
1504 /* Return subword OFFSET of operand OP.
1505 The word number, OFFSET, is interpreted as the word number starting
1506 at the low-order address. OFFSET 0 is the low-order word if not
1507 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1509 If we cannot extract the required word, we return zero. Otherwise,
1510 an rtx corresponding to the requested word will be returned.
1512 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1513 reload has completed, a valid address will always be returned. After
1514 reload, if a valid address cannot be returned, we return zero.
1516 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1517 it is the responsibility of the caller.
1519 MODE is the mode of OP in case it is a CONST_INT.
1521 ??? This is still rather broken for some cases. The problem for the
1522 moment is that all callers of this thing provide no 'goal mode' to
1523 tell us to work with. This exists because all callers were written
1524 in a word based SUBREG world.
1525 Now use of this function can be deprecated by simplify_subreg in most
1530 operand_subword (op, offset, validate_address, mode)
1532 unsigned int offset;
1533 int validate_address;
1534 enum machine_mode mode;
1536 if (mode == VOIDmode)
1537 mode = GET_MODE (op);
1539 if (mode == VOIDmode)
1542 /* If OP is narrower than a word, fail. */
1544 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1547 /* If we want a word outside OP, return zero. */
1549 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1552 /* Form a new MEM at the requested address. */
1553 if (GET_CODE (op) == MEM)
1555 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1557 if (! validate_address)
1560 else if (reload_completed)
1562 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1566 return replace_equiv_address (new, XEXP (new, 0));
1569 /* Rest can be handled by simplify_subreg. */
1570 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1573 /* Similar to `operand_subword', but never return 0. If we can't extract
1574 the required subword, put OP into a register and try again. If that fails,
1575 abort. We always validate the address in this case.
1577 MODE is the mode of OP, in case it is CONST_INT. */
1580 operand_subword_force (op, offset, mode)
1582 unsigned int offset;
1583 enum machine_mode mode;
1585 rtx result = operand_subword (op, offset, 1, mode);
1590 if (mode != BLKmode && mode != VOIDmode)
1592 /* If this is a register which can not be accessed by words, copy it
1593 to a pseudo register. */
1594 if (GET_CODE (op) == REG)
1595 op = copy_to_reg (op);
1597 op = force_reg (mode, op);
1600 result = operand_subword (op, offset, 1, mode);
1607 /* Given a compare instruction, swap the operands.
1608 A test instruction is changed into a compare of 0 against the operand. */
1611 reverse_comparison (insn)
1614 rtx body = PATTERN (insn);
1617 if (GET_CODE (body) == SET)
1618 comp = SET_SRC (body);
1620 comp = SET_SRC (XVECEXP (body, 0, 0));
1622 if (GET_CODE (comp) == COMPARE)
1624 rtx op0 = XEXP (comp, 0);
1625 rtx op1 = XEXP (comp, 1);
1626 XEXP (comp, 0) = op1;
1627 XEXP (comp, 1) = op0;
1631 rtx new = gen_rtx_COMPARE (VOIDmode,
1632 CONST0_RTX (GET_MODE (comp)), comp);
1633 if (GET_CODE (body) == SET)
1634 SET_SRC (body) = new;
1636 SET_SRC (XVECEXP (body, 0, 0)) = new;
1640 /* Within a MEM_EXPR, we care about either (1) a component ref of a decl,
1641 or (2) a component ref of something variable. Represent the later with
1642 a NULL expression. */
1645 component_ref_for_mem_expr (ref)
1648 tree inner = TREE_OPERAND (ref, 0);
1650 if (TREE_CODE (inner) == COMPONENT_REF)
1651 inner = component_ref_for_mem_expr (inner);
1654 tree placeholder_ptr = 0;
1656 /* Now remove any conversions: they don't change what the underlying
1657 object is. Likewise for SAVE_EXPR. Also handle PLACEHOLDER_EXPR. */
1658 while (TREE_CODE (inner) == NOP_EXPR || TREE_CODE (inner) == CONVERT_EXPR
1659 || TREE_CODE (inner) == NON_LVALUE_EXPR
1660 || TREE_CODE (inner) == VIEW_CONVERT_EXPR
1661 || TREE_CODE (inner) == SAVE_EXPR
1662 || TREE_CODE (inner) == PLACEHOLDER_EXPR)
1663 if (TREE_CODE (inner) == PLACEHOLDER_EXPR)
1664 inner = find_placeholder (inner, &placeholder_ptr);
1666 inner = TREE_OPERAND (inner, 0);
1668 if (! DECL_P (inner))
1672 if (inner == TREE_OPERAND (ref, 0))
1675 return build (COMPONENT_REF, TREE_TYPE (ref), inner,
1676 TREE_OPERAND (ref, 1));
1679 /* Given REF, a MEM, and T, either the type of X or the expression
1680 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1681 if we are making a new object of this type. */
1684 set_mem_attributes (ref, t, objectp)
1689 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1690 tree expr = MEM_EXPR (ref);
1691 rtx offset = MEM_OFFSET (ref);
1692 rtx size = MEM_SIZE (ref);
1693 unsigned int align = MEM_ALIGN (ref);
1696 /* It can happen that type_for_mode was given a mode for which there
1697 is no language-level type. In which case it returns NULL, which
1702 type = TYPE_P (t) ? t : TREE_TYPE (t);
1704 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1705 wrong answer, as it assumes that DECL_RTL already has the right alias
1706 info. Callers should not set DECL_RTL until after the call to
1707 set_mem_attributes. */
1708 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1711 /* Get the alias set from the expression or type (perhaps using a
1712 front-end routine) and use it. */
1713 alias = get_alias_set (t);
1715 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1716 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1717 RTX_UNCHANGING_P (ref)
1718 |= ((lang_hooks.honor_readonly
1719 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1720 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1722 /* If we are making an object of this type, or if this is a DECL, we know
1723 that it is a scalar if the type is not an aggregate. */
1724 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1725 MEM_SCALAR_P (ref) = 1;
1727 /* We can set the alignment from the type if we are making an object,
1728 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1729 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1730 align = MAX (align, TYPE_ALIGN (type));
1732 /* If the size is known, we can set that. */
1733 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1734 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1736 /* If T is not a type, we may be able to deduce some more information about
1740 maybe_set_unchanging (ref, t);
1741 if (TREE_THIS_VOLATILE (t))
1742 MEM_VOLATILE_P (ref) = 1;
1744 /* Now remove any conversions: they don't change what the underlying
1745 object is. Likewise for SAVE_EXPR. */
1746 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1747 || TREE_CODE (t) == NON_LVALUE_EXPR
1748 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1749 || TREE_CODE (t) == SAVE_EXPR)
1750 t = TREE_OPERAND (t, 0);
1752 /* If this expression can't be addressed (e.g., it contains a reference
1753 to a non-addressable field), show we don't change its alias set. */
1754 if (! can_address_p (t))
1755 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1757 /* If this is a decl, set the attributes of the MEM from it. */
1761 offset = const0_rtx;
1762 size = (DECL_SIZE_UNIT (t)
1763 && host_integerp (DECL_SIZE_UNIT (t), 1)
1764 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1765 align = DECL_ALIGN (t);
1768 /* If this is a constant, we know the alignment. */
1769 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1771 align = TYPE_ALIGN (type);
1772 #ifdef CONSTANT_ALIGNMENT
1773 align = CONSTANT_ALIGNMENT (t, align);
1777 /* If this is a field reference and not a bit-field, record it. */
1778 /* ??? There is some information that can be gleened from bit-fields,
1779 such as the word offset in the structure that might be modified.
1780 But skip it for now. */
1781 else if (TREE_CODE (t) == COMPONENT_REF
1782 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1784 expr = component_ref_for_mem_expr (t);
1785 offset = const0_rtx;
1786 /* ??? Any reason the field size would be different than
1787 the size we got from the type? */
1790 /* If this is an array reference, look for an outer field reference. */
1791 else if (TREE_CODE (t) == ARRAY_REF)
1793 tree off_tree = size_zero_node;
1798 = fold (build (PLUS_EXPR, sizetype,
1799 fold (build (MULT_EXPR, sizetype,
1800 TREE_OPERAND (t, 1),
1801 TYPE_SIZE_UNIT (TREE_TYPE (t)))),
1803 t = TREE_OPERAND (t, 0);
1805 while (TREE_CODE (t) == ARRAY_REF);
1807 if (TREE_CODE (t) == COMPONENT_REF)
1809 expr = component_ref_for_mem_expr (t);
1810 if (host_integerp (off_tree, 1))
1811 offset = GEN_INT (tree_low_cst (off_tree, 1));
1812 /* ??? Any reason the field size would be different than
1813 the size we got from the type? */
1818 /* Now set the attributes we computed above. */
1820 = get_mem_attrs (alias, expr, offset, size, align, GET_MODE (ref));
1822 /* If this is already known to be a scalar or aggregate, we are done. */
1823 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1826 /* If it is a reference into an aggregate, this is part of an aggregate.
1827 Otherwise we don't know. */
1828 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1829 || TREE_CODE (t) == ARRAY_RANGE_REF
1830 || TREE_CODE (t) == BIT_FIELD_REF)
1831 MEM_IN_STRUCT_P (ref) = 1;
1834 /* Set the alias set of MEM to SET. */
1837 set_mem_alias_set (mem, set)
1841 #ifdef ENABLE_CHECKING
1842 /* If the new and old alias sets don't conflict, something is wrong. */
1843 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1847 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1848 MEM_SIZE (mem), MEM_ALIGN (mem),
1852 /* Set the alignment of MEM to ALIGN bits. */
1855 set_mem_align (mem, align)
1859 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1860 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1864 /* Set the expr for MEM to EXPR. */
1867 set_mem_expr (mem, expr)
1872 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1873 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1876 /* Set the offset of MEM to OFFSET. */
1879 set_mem_offset (mem, offset)
1882 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1883 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1887 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1888 and its address changed to ADDR. (VOIDmode means don't change the mode.
1889 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1890 returned memory location is required to be valid. The memory
1891 attributes are not changed. */
1894 change_address_1 (memref, mode, addr, validate)
1896 enum machine_mode mode;
1902 if (GET_CODE (memref) != MEM)
1904 if (mode == VOIDmode)
1905 mode = GET_MODE (memref);
1907 addr = XEXP (memref, 0);
1911 if (reload_in_progress || reload_completed)
1913 if (! memory_address_p (mode, addr))
1917 addr = memory_address (mode, addr);
1920 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1923 new = gen_rtx_MEM (mode, addr);
1924 MEM_COPY_ATTRIBUTES (new, memref);
1928 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1929 way we are changing MEMREF, so we only preserve the alias set. */
1932 change_address (memref, mode, addr)
1934 enum machine_mode mode;
1937 rtx new = change_address_1 (memref, mode, addr, 1);
1938 enum machine_mode mmode = GET_MODE (new);
1941 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1942 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1943 (mmode == BLKmode ? BITS_PER_UNIT
1944 : GET_MODE_ALIGNMENT (mmode)),
1950 /* Return a memory reference like MEMREF, but with its mode changed
1951 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1952 nonzero, the memory address is forced to be valid.
1953 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1954 and caller is responsible for adjusting MEMREF base register. */
1957 adjust_address_1 (memref, mode, offset, validate, adjust)
1959 enum machine_mode mode;
1960 HOST_WIDE_INT offset;
1961 int validate, adjust;
1963 rtx addr = XEXP (memref, 0);
1965 rtx memoffset = MEM_OFFSET (memref);
1967 unsigned int memalign = MEM_ALIGN (memref);
1969 /* ??? Prefer to create garbage instead of creating shared rtl.
1970 This may happen even if offset is non-zero -- consider
1971 (plus (plus reg reg) const_int) -- so do this always. */
1972 addr = copy_rtx (addr);
1976 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1977 object, we can merge it into the LO_SUM. */
1978 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1980 && (unsigned HOST_WIDE_INT) offset
1981 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1982 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1983 plus_constant (XEXP (addr, 1), offset));
1985 addr = plus_constant (addr, offset);
1988 new = change_address_1 (memref, mode, addr, validate);
1990 /* Compute the new values of the memory attributes due to this adjustment.
1991 We add the offsets and update the alignment. */
1993 memoffset = GEN_INT (offset + INTVAL (memoffset));
1995 /* Compute the new alignment by taking the MIN of the alignment and the
1996 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1999 memalign = MIN (memalign, (offset & -offset) * BITS_PER_UNIT);
2001 /* We can compute the size in a number of ways. */
2002 if (GET_MODE (new) != BLKmode)
2003 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
2004 else if (MEM_SIZE (memref))
2005 size = plus_constant (MEM_SIZE (memref), -offset);
2007 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2008 memoffset, size, memalign, GET_MODE (new));
2010 /* At some point, we should validate that this offset is within the object,
2011 if all the appropriate values are known. */
2015 /* Return a memory reference like MEMREF, but with its mode changed
2016 to MODE and its address changed to ADDR, which is assumed to be
2017 MEMREF offseted by OFFSET bytes. If VALIDATE is
2018 nonzero, the memory address is forced to be valid. */
2021 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
2023 enum machine_mode mode;
2025 HOST_WIDE_INT offset;
2028 memref = change_address_1 (memref, VOIDmode, addr, validate);
2029 return adjust_address_1 (memref, mode, offset, validate, 0);
2032 /* Return a memory reference like MEMREF, but whose address is changed by
2033 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2034 known to be in OFFSET (possibly 1). */
2037 offset_address (memref, offset, pow2)
2042 rtx new = change_address_1 (memref, VOIDmode,
2043 gen_rtx_PLUS (Pmode, XEXP (memref, 0),
2044 force_reg (Pmode, offset)), 1);
2046 /* Update the alignment to reflect the offset. Reset the offset, which
2048 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2049 0, 0, MIN (MEM_ALIGN (memref),
2050 pow2 * BITS_PER_UNIT),
2055 /* Return a memory reference like MEMREF, but with its address changed to
2056 ADDR. The caller is asserting that the actual piece of memory pointed
2057 to is the same, just the form of the address is being changed, such as
2058 by putting something into a register. */
2061 replace_equiv_address (memref, addr)
2065 /* change_address_1 copies the memory attribute structure without change
2066 and that's exactly what we want here. */
2067 update_temp_slot_address (XEXP (memref, 0), addr);
2068 return change_address_1 (memref, VOIDmode, addr, 1);
2071 /* Likewise, but the reference is not required to be valid. */
2074 replace_equiv_address_nv (memref, addr)
2078 return change_address_1 (memref, VOIDmode, addr, 0);
2081 /* Return a memory reference like MEMREF, but with its mode widened to
2082 MODE and offset by OFFSET. This would be used by targets that e.g.
2083 cannot issue QImode memory operations and have to use SImode memory
2084 operations plus masking logic. */
2087 widen_memory_access (memref, mode, offset)
2089 enum machine_mode mode;
2090 HOST_WIDE_INT offset;
2092 rtx new = adjust_address_1 (memref, mode, offset, 1, 1);
2093 tree expr = MEM_EXPR (new);
2094 rtx memoffset = MEM_OFFSET (new);
2095 unsigned int size = GET_MODE_SIZE (mode);
2097 /* If we don't know what offset we were at within the expression, then
2098 we can't know if we've overstepped the bounds. */
2099 if (! memoffset && offset != 0)
2104 if (TREE_CODE (expr) == COMPONENT_REF)
2106 tree field = TREE_OPERAND (expr, 1);
2108 if (! DECL_SIZE_UNIT (field))
2114 /* Is the field at least as large as the access? If so, ok,
2115 otherwise strip back to the containing structure. */
2116 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2117 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2118 && INTVAL (memoffset) >= 0)
2121 if (! host_integerp (DECL_FIELD_OFFSET (field), 1))
2127 expr = TREE_OPERAND (expr, 0);
2128 memoffset = (GEN_INT (INTVAL (memoffset)
2129 + tree_low_cst (DECL_FIELD_OFFSET (field), 1)
2130 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2133 /* Similarly for the decl. */
2134 else if (DECL_P (expr)
2135 && DECL_SIZE_UNIT (expr)
2136 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2137 && (! memoffset || INTVAL (memoffset) >= 0))
2141 /* The widened memory access overflows the expression, which means
2142 that it could alias another expression. Zap it. */
2149 memoffset = NULL_RTX;
2151 /* The widened memory may alias other stuff, so zap the alias set. */
2152 /* ??? Maybe use get_alias_set on any remaining expression. */
2154 MEM_ATTRS (new) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2155 MEM_ALIGN (new), mode);
2160 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2167 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
2168 NULL_RTX, label_num++, NULL, NULL);
2170 LABEL_NUSES (label) = 0;
2171 LABEL_ALTERNATE_NAME (label) = NULL;
2175 /* For procedure integration. */
2177 /* Install new pointers to the first and last insns in the chain.
2178 Also, set cur_insn_uid to one higher than the last in use.
2179 Used for an inline-procedure after copying the insn chain. */
2182 set_new_first_and_last_insn (first, last)
2191 for (insn = first; insn; insn = NEXT_INSN (insn))
2192 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2197 /* Set the range of label numbers found in the current function.
2198 This is used when belatedly compiling an inline function. */
2201 set_new_first_and_last_label_num (first, last)
2204 base_label_num = label_num;
2205 first_label_num = first;
2206 last_label_num = last;
2209 /* Set the last label number found in the current function.
2210 This is used when belatedly compiling an inline function. */
2213 set_new_last_label_num (last)
2216 base_label_num = label_num;
2217 last_label_num = last;
2220 /* Restore all variables describing the current status from the structure *P.
2221 This is used after a nested function. */
2224 restore_emit_status (p)
2225 struct function *p ATTRIBUTE_UNUSED;
2228 clear_emit_caches ();
2231 /* Clear out all parts of the state in F that can safely be discarded
2232 after the function has been compiled, to let garbage collection
2233 reclaim the memory. */
2236 free_emit_status (f)
2239 free (f->emit->x_regno_reg_rtx);
2240 free (f->emit->regno_pointer_align);
2241 free (f->emit->regno_decl);
2246 /* Go through all the RTL insn bodies and copy any invalid shared
2247 structure. This routine should only be called once. */
2250 unshare_all_rtl (fndecl, insn)
2256 /* Make sure that virtual parameters are not shared. */
2257 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2258 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2260 /* Make sure that virtual stack slots are not shared. */
2261 unshare_all_decls (DECL_INITIAL (fndecl));
2263 /* Unshare just about everything else. */
2264 unshare_all_rtl_1 (insn);
2266 /* Make sure the addresses of stack slots found outside the insn chain
2267 (such as, in DECL_RTL of a variable) are not shared
2268 with the insn chain.
2270 This special care is necessary when the stack slot MEM does not
2271 actually appear in the insn chain. If it does appear, its address
2272 is unshared from all else at that point. */
2273 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2276 /* Go through all the RTL insn bodies and copy any invalid shared
2277 structure, again. This is a fairly expensive thing to do so it
2278 should be done sparingly. */
2281 unshare_all_rtl_again (insn)
2287 for (p = insn; p; p = NEXT_INSN (p))
2290 reset_used_flags (PATTERN (p));
2291 reset_used_flags (REG_NOTES (p));
2292 reset_used_flags (LOG_LINKS (p));
2295 /* Make sure that virtual stack slots are not shared. */
2296 reset_used_decls (DECL_INITIAL (cfun->decl));
2298 /* Make sure that virtual parameters are not shared. */
2299 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2300 reset_used_flags (DECL_RTL (decl));
2302 reset_used_flags (stack_slot_list);
2304 unshare_all_rtl (cfun->decl, insn);
2307 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2308 Assumes the mark bits are cleared at entry. */
2311 unshare_all_rtl_1 (insn)
2314 for (; insn; insn = NEXT_INSN (insn))
2317 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2318 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2319 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2323 /* Go through all virtual stack slots of a function and copy any
2324 shared structure. */
2326 unshare_all_decls (blk)
2331 /* Copy shared decls. */
2332 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2333 if (DECL_RTL_SET_P (t))
2334 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2336 /* Now process sub-blocks. */
2337 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2338 unshare_all_decls (t);
2341 /* Go through all virtual stack slots of a function and mark them as
2344 reset_used_decls (blk)
2350 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2351 if (DECL_RTL_SET_P (t))
2352 reset_used_flags (DECL_RTL (t));
2354 /* Now process sub-blocks. */
2355 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2356 reset_used_decls (t);
2359 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2360 Recursively does the same for subexpressions. */
2363 copy_rtx_if_shared (orig)
2369 const char *format_ptr;
2375 code = GET_CODE (x);
2377 /* These types may be freely shared. */
2390 /* SCRATCH must be shared because they represent distinct values. */
2394 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2395 a LABEL_REF, it isn't sharable. */
2396 if (GET_CODE (XEXP (x, 0)) == PLUS
2397 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2398 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2407 /* The chain of insns is not being copied. */
2411 /* A MEM is allowed to be shared if its address is constant.
2413 We used to allow sharing of MEMs which referenced
2414 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2415 that can lose. instantiate_virtual_regs will not unshare
2416 the MEMs, and combine may change the structure of the address
2417 because it looks safe and profitable in one context, but
2418 in some other context it creates unrecognizable RTL. */
2419 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2428 /* This rtx may not be shared. If it has already been seen,
2429 replace it with a copy of itself. */
2435 copy = rtx_alloc (code);
2437 (sizeof (*copy) - sizeof (copy->fld)
2438 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2444 /* Now scan the subexpressions recursively.
2445 We can store any replaced subexpressions directly into X
2446 since we know X is not shared! Any vectors in X
2447 must be copied if X was copied. */
2449 format_ptr = GET_RTX_FORMAT (code);
2451 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2453 switch (*format_ptr++)
2456 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2460 if (XVEC (x, i) != NULL)
2463 int len = XVECLEN (x, i);
2465 if (copied && len > 0)
2466 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2467 for (j = 0; j < len; j++)
2468 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2476 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2477 to look for shared sub-parts. */
2480 reset_used_flags (x)
2485 const char *format_ptr;
2490 code = GET_CODE (x);
2492 /* These types may be freely shared so we needn't do any resetting
2513 /* The chain of insns is not being copied. */
2522 format_ptr = GET_RTX_FORMAT (code);
2523 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2525 switch (*format_ptr++)
2528 reset_used_flags (XEXP (x, i));
2532 for (j = 0; j < XVECLEN (x, i); j++)
2533 reset_used_flags (XVECEXP (x, i, j));
2539 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2540 Return X or the rtx for the pseudo reg the value of X was copied into.
2541 OTHER must be valid as a SET_DEST. */
2544 make_safe_from (x, other)
2548 switch (GET_CODE (other))
2551 other = SUBREG_REG (other);
2553 case STRICT_LOW_PART:
2556 other = XEXP (other, 0);
2562 if ((GET_CODE (other) == MEM
2564 && GET_CODE (x) != REG
2565 && GET_CODE (x) != SUBREG)
2566 || (GET_CODE (other) == REG
2567 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2568 || reg_mentioned_p (other, x))))
2570 rtx temp = gen_reg_rtx (GET_MODE (x));
2571 emit_move_insn (temp, x);
2577 /* Emission of insns (adding them to the doubly-linked list). */
2579 /* Return the first insn of the current sequence or current function. */
2587 /* Return the last insn emitted in current sequence or current function. */
2595 /* Specify a new insn as the last in the chain. */
2598 set_last_insn (insn)
2601 if (NEXT_INSN (insn) != 0)
2606 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2609 get_last_insn_anywhere ()
2611 struct sequence_stack *stack;
2614 for (stack = seq_stack; stack; stack = stack->next)
2615 if (stack->last != 0)
2620 /* Return a number larger than any instruction's uid in this function. */
2625 return cur_insn_uid;
2628 /* Renumber instructions so that no instruction UIDs are wasted. */
2631 renumber_insns (stream)
2636 /* If we're not supposed to renumber instructions, don't. */
2637 if (!flag_renumber_insns)
2640 /* If there aren't that many instructions, then it's not really
2641 worth renumbering them. */
2642 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2647 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2650 fprintf (stream, "Renumbering insn %d to %d\n",
2651 INSN_UID (insn), cur_insn_uid);
2652 INSN_UID (insn) = cur_insn_uid++;
2656 /* Return the next insn. If it is a SEQUENCE, return the first insn
2665 insn = NEXT_INSN (insn);
2666 if (insn && GET_CODE (insn) == INSN
2667 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2668 insn = XVECEXP (PATTERN (insn), 0, 0);
2674 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2678 previous_insn (insn)
2683 insn = PREV_INSN (insn);
2684 if (insn && GET_CODE (insn) == INSN
2685 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2686 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2692 /* Return the next insn after INSN that is not a NOTE. This routine does not
2693 look inside SEQUENCEs. */
2696 next_nonnote_insn (insn)
2701 insn = NEXT_INSN (insn);
2702 if (insn == 0 || GET_CODE (insn) != NOTE)
2709 /* Return the previous insn before INSN that is not a NOTE. This routine does
2710 not look inside SEQUENCEs. */
2713 prev_nonnote_insn (insn)
2718 insn = PREV_INSN (insn);
2719 if (insn == 0 || GET_CODE (insn) != NOTE)
2726 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2727 or 0, if there is none. This routine does not look inside
2731 next_real_insn (insn)
2736 insn = NEXT_INSN (insn);
2737 if (insn == 0 || GET_CODE (insn) == INSN
2738 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2745 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2746 or 0, if there is none. This routine does not look inside
2750 prev_real_insn (insn)
2755 insn = PREV_INSN (insn);
2756 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2757 || GET_CODE (insn) == JUMP_INSN)
2764 /* Find the next insn after INSN that really does something. This routine
2765 does not look inside SEQUENCEs. Until reload has completed, this is the
2766 same as next_real_insn. */
2769 active_insn_p (insn)
2772 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2773 || (GET_CODE (insn) == INSN
2774 && (! reload_completed
2775 || (GET_CODE (PATTERN (insn)) != USE
2776 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2780 next_active_insn (insn)
2785 insn = NEXT_INSN (insn);
2786 if (insn == 0 || active_insn_p (insn))
2793 /* Find the last insn before INSN that really does something. This routine
2794 does not look inside SEQUENCEs. Until reload has completed, this is the
2795 same as prev_real_insn. */
2798 prev_active_insn (insn)
2803 insn = PREV_INSN (insn);
2804 if (insn == 0 || active_insn_p (insn))
2811 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2819 insn = NEXT_INSN (insn);
2820 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2827 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2835 insn = PREV_INSN (insn);
2836 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2844 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2845 and REG_CC_USER notes so we can find it. */
2848 link_cc0_insns (insn)
2851 rtx user = next_nonnote_insn (insn);
2853 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2854 user = XVECEXP (PATTERN (user), 0, 0);
2856 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2858 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2861 /* Return the next insn that uses CC0 after INSN, which is assumed to
2862 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2863 applied to the result of this function should yield INSN).
2865 Normally, this is simply the next insn. However, if a REG_CC_USER note
2866 is present, it contains the insn that uses CC0.
2868 Return 0 if we can't find the insn. */
2871 next_cc0_user (insn)
2874 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2877 return XEXP (note, 0);
2879 insn = next_nonnote_insn (insn);
2880 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2881 insn = XVECEXP (PATTERN (insn), 0, 0);
2883 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2889 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2890 note, it is the previous insn. */
2893 prev_cc0_setter (insn)
2896 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2899 return XEXP (note, 0);
2901 insn = prev_nonnote_insn (insn);
2902 if (! sets_cc0_p (PATTERN (insn)))
2909 /* Increment the label uses for all labels present in rtx. */
2919 code = GET_CODE (x);
2920 if (code == LABEL_REF)
2921 LABEL_NUSES (XEXP (x, 0))++;
2923 fmt = GET_RTX_FORMAT (code);
2924 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2927 mark_label_nuses (XEXP (x, i));
2928 else if (fmt[i] == 'E')
2929 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2930 mark_label_nuses (XVECEXP (x, i, j));
2935 /* Try splitting insns that can be split for better scheduling.
2936 PAT is the pattern which might split.
2937 TRIAL is the insn providing PAT.
2938 LAST is non-zero if we should return the last insn of the sequence produced.
2940 If this routine succeeds in splitting, it returns the first or last
2941 replacement insn depending on the value of LAST. Otherwise, it
2942 returns TRIAL. If the insn to be returned can be split, it will be. */
2945 try_split (pat, trial, last)
2949 rtx before = PREV_INSN (trial);
2950 rtx after = NEXT_INSN (trial);
2951 int has_barrier = 0;
2956 if (any_condjump_p (trial)
2957 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
2958 split_branch_probability = INTVAL (XEXP (note, 0));
2959 probability = split_branch_probability;
2961 seq = split_insns (pat, trial);
2963 split_branch_probability = -1;
2965 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2966 We may need to handle this specially. */
2967 if (after && GET_CODE (after) == BARRIER)
2970 after = NEXT_INSN (after);
2975 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2976 The latter case will normally arise only when being done so that
2977 it, in turn, will be split (SFmode on the 29k is an example). */
2978 if (GET_CODE (seq) == SEQUENCE)
2982 /* Avoid infinite loop if any insn of the result matches
2983 the original pattern. */
2984 for (i = 0; i < XVECLEN (seq, 0); i++)
2985 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2986 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2990 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2991 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2993 rtx insn = XVECEXP (seq, 0, i);
2994 mark_jump_label (PATTERN (insn),
2995 XVECEXP (seq, 0, i), 0);
2997 if (probability != -1
2998 && any_condjump_p (insn)
2999 && !find_reg_note (insn, REG_BR_PROB, 0))
3001 /* We can preserve the REG_BR_PROB notes only if exactly
3002 one jump is created, otherwise the machine description
3003 is responsible for this step using
3004 split_branch_probability variable. */
3008 = gen_rtx_EXPR_LIST (REG_BR_PROB,
3009 GEN_INT (probability),
3014 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3015 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3016 if (GET_CODE (trial) == CALL_INSN)
3017 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3018 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
3019 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
3020 = CALL_INSN_FUNCTION_USAGE (trial);
3022 /* Copy notes, particularly those related to the CFG. */
3023 for (note = REG_NOTES (trial); note ; note = XEXP (note, 1))
3025 switch (REG_NOTE_KIND (note))
3028 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3030 rtx insn = XVECEXP (seq, 0, i);
3031 if (GET_CODE (insn) == CALL_INSN
3032 || (flag_non_call_exceptions
3033 && may_trap_p (PATTERN (insn))))
3035 = gen_rtx_EXPR_LIST (REG_EH_REGION,
3043 case REG_ALWAYS_RETURN:
3044 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3046 rtx insn = XVECEXP (seq, 0, i);
3047 if (GET_CODE (insn) == CALL_INSN)
3049 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3055 case REG_NON_LOCAL_GOTO:
3056 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3058 rtx insn = XVECEXP (seq, 0, i);
3059 if (GET_CODE (insn) == JUMP_INSN)
3061 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
3072 /* If there are LABELS inside the split insns increment the
3073 usage count so we don't delete the label. */
3074 if (GET_CODE (trial) == INSN)
3075 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
3076 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
3077 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
3079 tem = emit_insn_after (seq, trial);
3081 delete_related_insns (trial);
3083 emit_barrier_after (tem);
3085 /* Recursively call try_split for each new insn created; by the
3086 time control returns here that insn will be fully split, so
3087 set LAST and continue from the insn after the one returned.
3088 We can't use next_active_insn here since AFTER may be a note.
3089 Ignore deleted insns, which can be occur if not optimizing. */
3090 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3091 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3092 tem = try_split (PATTERN (tem), tem, 1);
3094 /* Avoid infinite loop if the result matches the original pattern. */
3095 else if (rtx_equal_p (seq, pat))
3099 PATTERN (trial) = seq;
3100 INSN_CODE (trial) = -1;
3101 try_split (seq, trial, last);
3104 /* Return either the first or the last insn, depending on which was
3107 ? (after ? PREV_INSN (after) : last_insn)
3108 : NEXT_INSN (before);
3114 /* Make and return an INSN rtx, initializing all its slots.
3115 Store PATTERN in the pattern slots. */
3118 make_insn_raw (pattern)
3123 insn = rtx_alloc (INSN);
3125 INSN_UID (insn) = cur_insn_uid++;
3126 PATTERN (insn) = pattern;
3127 INSN_CODE (insn) = -1;
3128 LOG_LINKS (insn) = NULL;
3129 REG_NOTES (insn) = NULL;
3131 #ifdef ENABLE_RTL_CHECKING
3134 && (returnjump_p (insn)
3135 || (GET_CODE (insn) == SET
3136 && SET_DEST (insn) == pc_rtx)))
3138 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3146 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
3149 make_jump_insn_raw (pattern)
3154 insn = rtx_alloc (JUMP_INSN);
3155 INSN_UID (insn) = cur_insn_uid++;
3157 PATTERN (insn) = pattern;
3158 INSN_CODE (insn) = -1;
3159 LOG_LINKS (insn) = NULL;
3160 REG_NOTES (insn) = NULL;
3161 JUMP_LABEL (insn) = NULL;
3166 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
3169 make_call_insn_raw (pattern)
3174 insn = rtx_alloc (CALL_INSN);
3175 INSN_UID (insn) = cur_insn_uid++;
3177 PATTERN (insn) = pattern;
3178 INSN_CODE (insn) = -1;
3179 LOG_LINKS (insn) = NULL;
3180 REG_NOTES (insn) = NULL;
3181 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3186 /* Add INSN to the end of the doubly-linked list.
3187 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3193 PREV_INSN (insn) = last_insn;
3194 NEXT_INSN (insn) = 0;
3196 if (NULL != last_insn)
3197 NEXT_INSN (last_insn) = insn;
3199 if (NULL == first_insn)
3205 /* Add INSN into the doubly-linked list after insn AFTER. This and
3206 the next should be the only functions called to insert an insn once
3207 delay slots have been filled since only they know how to update a
3211 add_insn_after (insn, after)
3214 rtx next = NEXT_INSN (after);
3217 if (optimize && INSN_DELETED_P (after))
3220 NEXT_INSN (insn) = next;
3221 PREV_INSN (insn) = after;
3225 PREV_INSN (next) = insn;
3226 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3227 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3229 else if (last_insn == after)
3233 struct sequence_stack *stack = seq_stack;
3234 /* Scan all pending sequences too. */
3235 for (; stack; stack = stack->next)
3236 if (after == stack->last)
3246 if (basic_block_for_insn
3247 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3248 && (bb = BLOCK_FOR_INSN (after)))
3250 set_block_for_insn (insn, bb);
3251 /* Should not happen as first in the BB is always
3252 either NOTE or LABEL. */
3253 if (bb->end == after
3254 /* Avoid clobbering of structure when creating new BB. */
3255 && GET_CODE (insn) != BARRIER
3256 && (GET_CODE (insn) != NOTE
3257 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3261 NEXT_INSN (after) = insn;
3262 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3264 rtx sequence = PATTERN (after);
3265 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3269 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3270 the previous should be the only functions called to insert an insn once
3271 delay slots have been filled since only they know how to update a
3275 add_insn_before (insn, before)
3278 rtx prev = PREV_INSN (before);
3281 if (optimize && INSN_DELETED_P (before))
3284 PREV_INSN (insn) = prev;
3285 NEXT_INSN (insn) = before;
3289 NEXT_INSN (prev) = insn;
3290 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3292 rtx sequence = PATTERN (prev);
3293 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3296 else if (first_insn == before)
3300 struct sequence_stack *stack = seq_stack;
3301 /* Scan all pending sequences too. */
3302 for (; stack; stack = stack->next)
3303 if (before == stack->first)
3305 stack->first = insn;
3313 if (basic_block_for_insn
3314 && (unsigned int)INSN_UID (before) < basic_block_for_insn->num_elements
3315 && (bb = BLOCK_FOR_INSN (before)))
3317 set_block_for_insn (insn, bb);
3318 /* Should not happen as first in the BB is always
3319 either NOTE or LABEl. */
3320 if (bb->head == insn
3321 /* Avoid clobbering of structure when creating new BB. */
3322 && GET_CODE (insn) != BARRIER
3323 && (GET_CODE (insn) != NOTE
3324 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3328 PREV_INSN (before) = insn;
3329 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3330 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3333 /* Remove an insn from its doubly-linked list. This function knows how
3334 to handle sequences. */
3339 rtx next = NEXT_INSN (insn);
3340 rtx prev = PREV_INSN (insn);
3345 NEXT_INSN (prev) = next;
3346 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3348 rtx sequence = PATTERN (prev);
3349 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3352 else if (first_insn == insn)
3356 struct sequence_stack *stack = seq_stack;
3357 /* Scan all pending sequences too. */
3358 for (; stack; stack = stack->next)
3359 if (insn == stack->first)
3361 stack->first = next;
3371 PREV_INSN (next) = prev;
3372 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3373 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3375 else if (last_insn == insn)
3379 struct sequence_stack *stack = seq_stack;
3380 /* Scan all pending sequences too. */
3381 for (; stack; stack = stack->next)
3382 if (insn == stack->last)
3391 if (basic_block_for_insn
3392 && (unsigned int)INSN_UID (insn) < basic_block_for_insn->num_elements
3393 && (bb = BLOCK_FOR_INSN (insn)))
3395 if (bb->head == insn)
3397 /* Never ever delete the basic block note without deleting whole basic
3399 if (GET_CODE (insn) == NOTE)
3403 if (bb->end == insn)
3408 /* Delete all insns made since FROM.
3409 FROM becomes the new last instruction. */
3412 delete_insns_since (from)
3418 NEXT_INSN (from) = 0;
3422 /* This function is deprecated, please use sequences instead.
3424 Move a consecutive bunch of insns to a different place in the chain.
3425 The insns to be moved are those between FROM and TO.
3426 They are moved to a new position after the insn AFTER.
3427 AFTER must not be FROM or TO or any insn in between.
3429 This function does not know about SEQUENCEs and hence should not be
3430 called after delay-slot filling has been done. */
3433 reorder_insns_nobb (from, to, after)
3434 rtx from, to, after;
3436 /* Splice this bunch out of where it is now. */
3437 if (PREV_INSN (from))
3438 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3440 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3441 if (last_insn == to)
3442 last_insn = PREV_INSN (from);
3443 if (first_insn == from)
3444 first_insn = NEXT_INSN (to);
3446 /* Make the new neighbors point to it and it to them. */
3447 if (NEXT_INSN (after))
3448 PREV_INSN (NEXT_INSN (after)) = to;
3450 NEXT_INSN (to) = NEXT_INSN (after);
3451 PREV_INSN (from) = after;
3452 NEXT_INSN (after) = from;
3453 if (after == last_insn)
3457 /* Same as function above, but take care to update BB boundaries. */
3459 reorder_insns (from, to, after)
3460 rtx from, to, after;
3462 rtx prev = PREV_INSN (from);
3463 basic_block bb, bb2;
3465 reorder_insns_nobb (from, to, after);
3467 if (basic_block_for_insn
3468 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3469 && (bb = BLOCK_FOR_INSN (after)))
3473 if (basic_block_for_insn
3474 && (unsigned int)INSN_UID (from) < basic_block_for_insn->num_elements
3475 && (bb2 = BLOCK_FOR_INSN (from)))
3481 if (bb->end == after)
3484 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3485 set_block_for_insn (x, bb);
3489 /* Return the line note insn preceding INSN. */
3492 find_line_note (insn)
3495 if (no_line_numbers)
3498 for (; insn; insn = PREV_INSN (insn))
3499 if (GET_CODE (insn) == NOTE
3500 && NOTE_LINE_NUMBER (insn) >= 0)
3506 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3507 of the moved insns when debugging. This may insert a note between AFTER
3508 and FROM, and another one after TO. */
3511 reorder_insns_with_line_notes (from, to, after)
3512 rtx from, to, after;
3514 rtx from_line = find_line_note (from);
3515 rtx after_line = find_line_note (after);
3517 reorder_insns (from, to, after);
3519 if (from_line == after_line)
3523 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3524 NOTE_LINE_NUMBER (from_line),
3527 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3528 NOTE_LINE_NUMBER (after_line),
3532 /* Remove unnecessary notes from the instruction stream. */
3535 remove_unnecessary_notes ()
3537 rtx block_stack = NULL_RTX;
3538 rtx eh_stack = NULL_RTX;
3543 /* We must not remove the first instruction in the function because
3544 the compiler depends on the first instruction being a note. */
3545 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3547 /* Remember what's next. */
3548 next = NEXT_INSN (insn);
3550 /* We're only interested in notes. */
3551 if (GET_CODE (insn) != NOTE)
3554 switch (NOTE_LINE_NUMBER (insn))
3556 case NOTE_INSN_DELETED:
3560 case NOTE_INSN_EH_REGION_BEG:
3561 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3564 case NOTE_INSN_EH_REGION_END:
3565 /* Too many end notes. */
3566 if (eh_stack == NULL_RTX)
3568 /* Mismatched nesting. */
3569 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3572 eh_stack = XEXP (eh_stack, 1);
3573 free_INSN_LIST_node (tmp);
3576 case NOTE_INSN_BLOCK_BEG:
3577 /* By now, all notes indicating lexical blocks should have
3578 NOTE_BLOCK filled in. */
3579 if (NOTE_BLOCK (insn) == NULL_TREE)
3581 block_stack = alloc_INSN_LIST (insn, block_stack);
3584 case NOTE_INSN_BLOCK_END:
3585 /* Too many end notes. */
3586 if (block_stack == NULL_RTX)
3588 /* Mismatched nesting. */
3589 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3592 block_stack = XEXP (block_stack, 1);
3593 free_INSN_LIST_node (tmp);
3595 /* Scan back to see if there are any non-note instructions
3596 between INSN and the beginning of this block. If not,
3597 then there is no PC range in the generated code that will
3598 actually be in this block, so there's no point in
3599 remembering the existence of the block. */
3600 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3602 /* This block contains a real instruction. Note that we
3603 don't include labels; if the only thing in the block
3604 is a label, then there are still no PC values that
3605 lie within the block. */
3609 /* We're only interested in NOTEs. */
3610 if (GET_CODE (tmp) != NOTE)
3613 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3615 /* We just verified that this BLOCK matches us with
3616 the block_stack check above. Never delete the
3617 BLOCK for the outermost scope of the function; we
3618 can refer to names from that scope even if the
3619 block notes are messed up. */
3620 if (! is_body_block (NOTE_BLOCK (insn))
3621 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3628 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3629 /* There's a nested block. We need to leave the
3630 current block in place since otherwise the debugger
3631 wouldn't be able to show symbols from our block in
3632 the nested block. */
3638 /* Too many begin notes. */
3639 if (block_stack || eh_stack)
3644 /* Emit an insn of given code and pattern
3645 at a specified place within the doubly-linked list. */
3647 /* Make an instruction with body PATTERN
3648 and output it before the instruction BEFORE. */
3651 emit_insn_before (pattern, before)
3652 rtx pattern, before;
3656 if (GET_CODE (pattern) == SEQUENCE)
3660 for (i = 0; i < XVECLEN (pattern, 0); i++)
3662 insn = XVECEXP (pattern, 0, i);
3663 add_insn_before (insn, before);
3668 insn = make_insn_raw (pattern);
3669 add_insn_before (insn, before);
3675 /* Make an instruction with body PATTERN and code JUMP_INSN
3676 and output it before the instruction BEFORE. */
3679 emit_jump_insn_before (pattern, before)
3680 rtx pattern, before;
3684 if (GET_CODE (pattern) == SEQUENCE)
3685 insn = emit_insn_before (pattern, before);
3688 insn = make_jump_insn_raw (pattern);
3689 add_insn_before (insn, before);
3695 /* Make an instruction with body PATTERN and code CALL_INSN
3696 and output it before the instruction BEFORE. */
3699 emit_call_insn_before (pattern, before)
3700 rtx pattern, before;
3704 if (GET_CODE (pattern) == SEQUENCE)
3705 insn = emit_insn_before (pattern, before);
3708 insn = make_call_insn_raw (pattern);
3709 add_insn_before (insn, before);
3710 PUT_CODE (insn, CALL_INSN);
3716 /* Make an insn of code BARRIER
3717 and output it before the insn BEFORE. */
3720 emit_barrier_before (before)
3723 rtx insn = rtx_alloc (BARRIER);
3725 INSN_UID (insn) = cur_insn_uid++;
3727 add_insn_before (insn, before);
3731 /* Emit the label LABEL before the insn BEFORE. */
3734 emit_label_before (label, before)
3737 /* This can be called twice for the same label as a result of the
3738 confusion that follows a syntax error! So make it harmless. */
3739 if (INSN_UID (label) == 0)
3741 INSN_UID (label) = cur_insn_uid++;
3742 add_insn_before (label, before);
3748 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3751 emit_note_before (subtype, before)
3755 rtx note = rtx_alloc (NOTE);
3756 INSN_UID (note) = cur_insn_uid++;
3757 NOTE_SOURCE_FILE (note) = 0;
3758 NOTE_LINE_NUMBER (note) = subtype;
3760 add_insn_before (note, before);
3764 /* Make an insn of code INSN with body PATTERN
3765 and output it after the insn AFTER. */
3768 emit_insn_after (pattern, after)
3773 if (GET_CODE (pattern) == SEQUENCE)
3777 for (i = 0; i < XVECLEN (pattern, 0); i++)
3779 insn = XVECEXP (pattern, 0, i);
3780 add_insn_after (insn, after);
3786 insn = make_insn_raw (pattern);
3787 add_insn_after (insn, after);
3793 /* Similar to emit_insn_after, except that line notes are to be inserted so
3794 as to act as if this insn were at FROM. */
3797 emit_insn_after_with_line_notes (pattern, after, from)
3798 rtx pattern, after, from;
3800 rtx from_line = find_line_note (from);
3801 rtx after_line = find_line_note (after);
3802 rtx insn = emit_insn_after (pattern, after);
3805 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3806 NOTE_LINE_NUMBER (from_line),
3810 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3811 NOTE_LINE_NUMBER (after_line),
3815 /* Make an insn of code JUMP_INSN with body PATTERN
3816 and output it after the insn AFTER. */
3819 emit_jump_insn_after (pattern, after)
3824 if (GET_CODE (pattern) == SEQUENCE)
3825 insn = emit_insn_after (pattern, after);
3828 insn = make_jump_insn_raw (pattern);
3829 add_insn_after (insn, after);
3835 /* Make an insn of code BARRIER
3836 and output it after the insn AFTER. */
3839 emit_barrier_after (after)
3842 rtx insn = rtx_alloc (BARRIER);
3844 INSN_UID (insn) = cur_insn_uid++;
3846 add_insn_after (insn, after);
3850 /* Emit the label LABEL after the insn AFTER. */
3853 emit_label_after (label, after)
3856 /* This can be called twice for the same label
3857 as a result of the confusion that follows a syntax error!
3858 So make it harmless. */
3859 if (INSN_UID (label) == 0)
3861 INSN_UID (label) = cur_insn_uid++;
3862 add_insn_after (label, after);
3868 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3871 emit_note_after (subtype, after)
3875 rtx note = rtx_alloc (NOTE);
3876 INSN_UID (note) = cur_insn_uid++;
3877 NOTE_SOURCE_FILE (note) = 0;
3878 NOTE_LINE_NUMBER (note) = subtype;
3879 add_insn_after (note, after);
3883 /* Emit a line note for FILE and LINE after the insn AFTER. */
3886 emit_line_note_after (file, line, after)
3893 if (no_line_numbers && line > 0)
3899 note = rtx_alloc (NOTE);
3900 INSN_UID (note) = cur_insn_uid++;
3901 NOTE_SOURCE_FILE (note) = file;
3902 NOTE_LINE_NUMBER (note) = line;
3903 add_insn_after (note, after);
3907 /* Make an insn of code INSN with pattern PATTERN
3908 and add it to the end of the doubly-linked list.
3909 If PATTERN is a SEQUENCE, take the elements of it
3910 and emit an insn for each element.
3912 Returns the last insn emitted. */
3918 rtx insn = last_insn;
3920 if (GET_CODE (pattern) == SEQUENCE)
3924 for (i = 0; i < XVECLEN (pattern, 0); i++)
3926 insn = XVECEXP (pattern, 0, i);
3932 insn = make_insn_raw (pattern);
3939 /* Emit the insns in a chain starting with INSN.
3940 Return the last insn emitted. */
3950 rtx next = NEXT_INSN (insn);
3959 /* Emit the insns in a chain starting with INSN and place them in front of
3960 the insn BEFORE. Return the last insn emitted. */
3963 emit_insns_before (insn, before)
3971 rtx next = NEXT_INSN (insn);
3972 add_insn_before (insn, before);
3980 /* Emit the insns in a chain starting with FIRST and place them in back of
3981 the insn AFTER. Return the last insn emitted. */
3984 emit_insns_after (first, after)
3998 if (basic_block_for_insn
3999 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
4000 && (bb = BLOCK_FOR_INSN (after)))
4002 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4003 set_block_for_insn (last, bb);
4004 set_block_for_insn (last, bb);
4005 if (bb->end == after)
4009 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4012 after_after = NEXT_INSN (after);
4014 NEXT_INSN (after) = first;
4015 PREV_INSN (first) = after;
4016 NEXT_INSN (last) = after_after;
4018 PREV_INSN (after_after) = last;
4020 if (after == last_insn)
4025 /* Make an insn of code JUMP_INSN with pattern PATTERN
4026 and add it to the end of the doubly-linked list. */
4029 emit_jump_insn (pattern)
4032 if (GET_CODE (pattern) == SEQUENCE)
4033 return emit_insn (pattern);
4036 rtx insn = make_jump_insn_raw (pattern);
4042 /* Make an insn of code CALL_INSN with pattern PATTERN
4043 and add it to the end of the doubly-linked list. */
4046 emit_call_insn (pattern)
4049 if (GET_CODE (pattern) == SEQUENCE)
4050 return emit_insn (pattern);
4053 rtx insn = make_call_insn_raw (pattern);
4055 PUT_CODE (insn, CALL_INSN);
4060 /* Add the label LABEL to the end of the doubly-linked list. */
4066 /* This can be called twice for the same label
4067 as a result of the confusion that follows a syntax error!
4068 So make it harmless. */
4069 if (INSN_UID (label) == 0)
4071 INSN_UID (label) = cur_insn_uid++;
4077 /* Make an insn of code BARRIER
4078 and add it to the end of the doubly-linked list. */
4083 rtx barrier = rtx_alloc (BARRIER);
4084 INSN_UID (barrier) = cur_insn_uid++;
4089 /* Make an insn of code NOTE
4090 with data-fields specified by FILE and LINE
4091 and add it to the end of the doubly-linked list,
4092 but only if line-numbers are desired for debugging info. */
4095 emit_line_note (file, line)
4099 set_file_and_line_for_stmt (file, line);
4102 if (no_line_numbers)
4106 return emit_note (file, line);
4109 /* Make an insn of code NOTE
4110 with data-fields specified by FILE and LINE
4111 and add it to the end of the doubly-linked list.
4112 If it is a line-number NOTE, omit it if it matches the previous one. */
4115 emit_note (file, line)
4123 if (file && last_filename && !strcmp (file, last_filename)
4124 && line == last_linenum)
4126 last_filename = file;
4127 last_linenum = line;
4130 if (no_line_numbers && line > 0)
4136 note = rtx_alloc (NOTE);
4137 INSN_UID (note) = cur_insn_uid++;
4138 NOTE_SOURCE_FILE (note) = file;
4139 NOTE_LINE_NUMBER (note) = line;
4144 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
4147 emit_line_note_force (file, line)
4152 return emit_line_note (file, line);
4155 /* Cause next statement to emit a line note even if the line number
4156 has not changed. This is used at the beginning of a function. */
4159 force_next_line_note ()
4164 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4165 note of this type already exists, remove it first. */
4168 set_unique_reg_note (insn, kind, datum)
4173 rtx note = find_reg_note (insn, kind, NULL_RTX);
4179 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4180 has multiple sets (some callers assume single_set
4181 means the insn only has one set, when in fact it
4182 means the insn only has one * useful * set). */
4183 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4190 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4191 It serves no useful purpose and breaks eliminate_regs. */
4192 if (GET_CODE (datum) == ASM_OPERANDS)
4202 XEXP (note, 0) = datum;
4206 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4207 return REG_NOTES (insn);
4210 /* Return an indication of which type of insn should have X as a body.
4211 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4217 if (GET_CODE (x) == CODE_LABEL)
4219 if (GET_CODE (x) == CALL)
4221 if (GET_CODE (x) == RETURN)
4223 if (GET_CODE (x) == SET)
4225 if (SET_DEST (x) == pc_rtx)
4227 else if (GET_CODE (SET_SRC (x)) == CALL)
4232 if (GET_CODE (x) == PARALLEL)
4235 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4236 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4238 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4239 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4241 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4242 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4248 /* Emit the rtl pattern X as an appropriate kind of insn.
4249 If X is a label, it is simply added into the insn chain. */
4255 enum rtx_code code = classify_insn (x);
4257 if (code == CODE_LABEL)
4258 return emit_label (x);
4259 else if (code == INSN)
4260 return emit_insn (x);
4261 else if (code == JUMP_INSN)
4263 rtx insn = emit_jump_insn (x);
4264 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4265 return emit_barrier ();
4268 else if (code == CALL_INSN)
4269 return emit_call_insn (x);
4274 /* Begin emitting insns to a sequence which can be packaged in an
4275 RTL_EXPR. If this sequence will contain something that might cause
4276 the compiler to pop arguments to function calls (because those
4277 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4278 details), use do_pending_stack_adjust before calling this function.
4279 That will ensure that the deferred pops are not accidentally
4280 emitted in the middle of this sequence. */
4285 struct sequence_stack *tem;
4287 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
4289 tem->next = seq_stack;
4290 tem->first = first_insn;
4291 tem->last = last_insn;
4292 tem->sequence_rtl_expr = seq_rtl_expr;
4300 /* Similarly, but indicate that this sequence will be placed in T, an
4301 RTL_EXPR. See the documentation for start_sequence for more
4302 information about how to use this function. */
4305 start_sequence_for_rtl_expr (t)
4313 /* Set up the insn chain starting with FIRST as the current sequence,
4314 saving the previously current one. See the documentation for
4315 start_sequence for more information about how to use this function. */
4318 push_to_sequence (first)
4325 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4331 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4334 push_to_full_sequence (first, last)
4340 /* We really should have the end of the insn chain here. */
4341 if (last && NEXT_INSN (last))
4345 /* Set up the outer-level insn chain
4346 as the current sequence, saving the previously current one. */
4349 push_topmost_sequence ()
4351 struct sequence_stack *stack, *top = NULL;
4355 for (stack = seq_stack; stack; stack = stack->next)
4358 first_insn = top->first;
4359 last_insn = top->last;
4360 seq_rtl_expr = top->sequence_rtl_expr;
4363 /* After emitting to the outer-level insn chain, update the outer-level
4364 insn chain, and restore the previous saved state. */
4367 pop_topmost_sequence ()
4369 struct sequence_stack *stack, *top = NULL;
4371 for (stack = seq_stack; stack; stack = stack->next)
4374 top->first = first_insn;
4375 top->last = last_insn;
4376 /* ??? Why don't we save seq_rtl_expr here? */
4381 /* After emitting to a sequence, restore previous saved state.
4383 To get the contents of the sequence just made, you must call
4384 `gen_sequence' *before* calling here.
4386 If the compiler might have deferred popping arguments while
4387 generating this sequence, and this sequence will not be immediately
4388 inserted into the instruction stream, use do_pending_stack_adjust
4389 before calling gen_sequence. That will ensure that the deferred
4390 pops are inserted into this sequence, and not into some random
4391 location in the instruction stream. See INHIBIT_DEFER_POP for more
4392 information about deferred popping of arguments. */
4397 struct sequence_stack *tem = seq_stack;
4399 first_insn = tem->first;
4400 last_insn = tem->last;
4401 seq_rtl_expr = tem->sequence_rtl_expr;
4402 seq_stack = tem->next;
4407 /* This works like end_sequence, but records the old sequence in FIRST
4411 end_full_sequence (first, last)
4414 *first = first_insn;
4419 /* Return 1 if currently emitting into a sequence. */
4424 return seq_stack != 0;
4427 /* Generate a SEQUENCE rtx containing the insns already emitted
4428 to the current sequence.
4430 This is how the gen_... function from a DEFINE_EXPAND
4431 constructs the SEQUENCE that it returns. */
4441 /* Count the insns in the chain. */
4443 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4446 /* If only one insn, return it rather than a SEQUENCE.
4447 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4448 the case of an empty list.)
4449 We only return the pattern of an insn if its code is INSN and it
4450 has no notes. This ensures that no information gets lost. */
4452 && ! RTX_FRAME_RELATED_P (first_insn)
4453 && GET_CODE (first_insn) == INSN
4454 /* Don't throw away any reg notes. */
4455 && REG_NOTES (first_insn) == 0)
4456 return PATTERN (first_insn);
4458 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4460 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4461 XVECEXP (result, 0, i) = tem;
4466 /* Put the various virtual registers into REGNO_REG_RTX. */
4469 init_virtual_regs (es)
4470 struct emit_status *es;
4472 rtx *ptr = es->x_regno_reg_rtx;
4473 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4474 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4475 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4476 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4477 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4481 clear_emit_caches ()
4485 /* Clear the start_sequence/gen_sequence cache. */
4486 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
4487 sequence_result[i] = 0;
4491 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4492 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4493 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4494 static int copy_insn_n_scratches;
4496 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4497 copied an ASM_OPERANDS.
4498 In that case, it is the original input-operand vector. */
4499 static rtvec orig_asm_operands_vector;
4501 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4502 copied an ASM_OPERANDS.
4503 In that case, it is the copied input-operand vector. */
4504 static rtvec copy_asm_operands_vector;
4506 /* Likewise for the constraints vector. */
4507 static rtvec orig_asm_constraints_vector;
4508 static rtvec copy_asm_constraints_vector;
4510 /* Recursively create a new copy of an rtx for copy_insn.
4511 This function differs from copy_rtx in that it handles SCRATCHes and
4512 ASM_OPERANDs properly.
4513 Normally, this function is not used directly; use copy_insn as front end.
4514 However, you could first copy an insn pattern with copy_insn and then use
4515 this function afterwards to properly copy any REG_NOTEs containing
4525 const char *format_ptr;
4527 code = GET_CODE (orig);
4543 for (i = 0; i < copy_insn_n_scratches; i++)
4544 if (copy_insn_scratch_in[i] == orig)
4545 return copy_insn_scratch_out[i];
4549 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4550 a LABEL_REF, it isn't sharable. */
4551 if (GET_CODE (XEXP (orig, 0)) == PLUS
4552 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4553 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4557 /* A MEM with a constant address is not sharable. The problem is that
4558 the constant address may need to be reloaded. If the mem is shared,
4559 then reloading one copy of this mem will cause all copies to appear
4560 to have been reloaded. */
4566 copy = rtx_alloc (code);
4568 /* Copy the various flags, and other information. We assume that
4569 all fields need copying, and then clear the fields that should
4570 not be copied. That is the sensible default behavior, and forces
4571 us to explicitly document why we are *not* copying a flag. */
4572 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4574 /* We do not copy the USED flag, which is used as a mark bit during
4575 walks over the RTL. */
4578 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4579 if (GET_RTX_CLASS (code) == 'i')
4583 copy->frame_related = 0;
4586 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4588 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4590 copy->fld[i] = orig->fld[i];
4591 switch (*format_ptr++)
4594 if (XEXP (orig, i) != NULL)
4595 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4600 if (XVEC (orig, i) == orig_asm_constraints_vector)
4601 XVEC (copy, i) = copy_asm_constraints_vector;
4602 else if (XVEC (orig, i) == orig_asm_operands_vector)
4603 XVEC (copy, i) = copy_asm_operands_vector;
4604 else if (XVEC (orig, i) != NULL)
4606 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4607 for (j = 0; j < XVECLEN (copy, i); j++)
4608 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4619 /* These are left unchanged. */
4627 if (code == SCRATCH)
4629 i = copy_insn_n_scratches++;
4630 if (i >= MAX_RECOG_OPERANDS)
4632 copy_insn_scratch_in[i] = orig;
4633 copy_insn_scratch_out[i] = copy;
4635 else if (code == ASM_OPERANDS)
4637 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4638 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4639 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4640 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4646 /* Create a new copy of an rtx.
4647 This function differs from copy_rtx in that it handles SCRATCHes and
4648 ASM_OPERANDs properly.
4649 INSN doesn't really have to be a full INSN; it could be just the
4655 copy_insn_n_scratches = 0;
4656 orig_asm_operands_vector = 0;
4657 orig_asm_constraints_vector = 0;
4658 copy_asm_operands_vector = 0;
4659 copy_asm_constraints_vector = 0;
4660 return copy_insn_1 (insn);
4663 /* Initialize data structures and variables in this file
4664 before generating rtl for each function. */
4669 struct function *f = cfun;
4671 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4674 seq_rtl_expr = NULL;
4676 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4679 first_label_num = label_num;
4683 clear_emit_caches ();
4685 /* Init the tables that describe all the pseudo regs. */
4687 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4689 f->emit->regno_pointer_align
4690 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4691 sizeof (unsigned char));
4694 = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx));
4697 = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree));
4699 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4700 init_virtual_regs (f->emit);
4702 /* Indicate that the virtual registers and stack locations are
4704 REG_POINTER (stack_pointer_rtx) = 1;
4705 REG_POINTER (frame_pointer_rtx) = 1;
4706 REG_POINTER (hard_frame_pointer_rtx) = 1;
4707 REG_POINTER (arg_pointer_rtx) = 1;
4709 REG_POINTER (virtual_incoming_args_rtx) = 1;
4710 REG_POINTER (virtual_stack_vars_rtx) = 1;
4711 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4712 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4713 REG_POINTER (virtual_cfa_rtx) = 1;
4715 #ifdef STACK_BOUNDARY
4716 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4717 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4718 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4719 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4721 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4722 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4723 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4724 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4725 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4728 #ifdef INIT_EXPANDERS
4733 /* Mark SS for GC. */
4736 mark_sequence_stack (ss)
4737 struct sequence_stack *ss;
4741 ggc_mark_rtx (ss->first);
4742 ggc_mark_tree (ss->sequence_rtl_expr);
4747 /* Mark ES for GC. */
4750 mark_emit_status (es)
4751 struct emit_status *es;
4760 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx,
4762 i > 0; --i, ++r, ++t)
4768 mark_sequence_stack (es->sequence_stack);
4769 ggc_mark_tree (es->sequence_rtl_expr);
4770 ggc_mark_rtx (es->x_first_insn);
4773 /* Create some permanent unique rtl objects shared between all functions.
4774 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4777 init_emit_once (line_numbers)
4781 enum machine_mode mode;
4782 enum machine_mode double_mode;
4784 /* Initialize the CONST_INT and memory attribute hash tables. */
4785 const_int_htab = htab_create (37, const_int_htab_hash,
4786 const_int_htab_eq, NULL);
4787 ggc_add_deletable_htab (const_int_htab, 0, 0);
4789 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
4790 mem_attrs_htab_eq, NULL);
4791 ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark);
4793 no_line_numbers = ! line_numbers;
4795 /* Compute the word and byte modes. */
4797 byte_mode = VOIDmode;
4798 word_mode = VOIDmode;
4799 double_mode = VOIDmode;
4801 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4802 mode = GET_MODE_WIDER_MODE (mode))
4804 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4805 && byte_mode == VOIDmode)
4808 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4809 && word_mode == VOIDmode)
4813 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4814 mode = GET_MODE_WIDER_MODE (mode))
4816 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4817 && double_mode == VOIDmode)
4821 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4823 /* Assign register numbers to the globally defined register rtx.
4824 This must be done at runtime because the register number field
4825 is in a union and some compilers can't initialize unions. */
4827 pc_rtx = gen_rtx (PC, VOIDmode);
4828 cc0_rtx = gen_rtx (CC0, VOIDmode);
4829 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4830 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4831 if (hard_frame_pointer_rtx == 0)
4832 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4833 HARD_FRAME_POINTER_REGNUM);
4834 if (arg_pointer_rtx == 0)
4835 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4836 virtual_incoming_args_rtx =
4837 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4838 virtual_stack_vars_rtx =
4839 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4840 virtual_stack_dynamic_rtx =
4841 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4842 virtual_outgoing_args_rtx =
4843 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4844 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4846 /* These rtx must be roots if GC is enabled. */
4847 ggc_add_rtx_root (global_rtl, GR_MAX);
4849 #ifdef INIT_EXPANDERS
4850 /* This is to initialize {init|mark|free}_machine_status before the first
4851 call to push_function_context_to. This is needed by the Chill front
4852 end which calls push_function_context_to before the first call to
4853 init_function_start. */
4857 /* Create the unique rtx's for certain rtx codes and operand values. */
4859 /* Don't use gen_rtx here since gen_rtx in this case
4860 tries to use these variables. */
4861 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4862 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4863 gen_rtx_raw_CONST_INT (VOIDmode, i);
4864 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4866 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4867 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4868 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4870 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4872 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4873 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4874 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4875 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4877 for (i = 0; i <= 2; i++)
4879 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4880 mode = GET_MODE_WIDER_MODE (mode))
4882 rtx tem = rtx_alloc (CONST_DOUBLE);
4883 union real_extract u;
4885 /* Zero any holes in a structure. */
4886 memset ((char *) &u, 0, sizeof u);
4887 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4889 /* Avoid trailing garbage in the rtx. */
4890 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4891 CONST_DOUBLE_LOW (tem) = 0;
4892 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4893 CONST_DOUBLE_HIGH (tem) = 0;
4895 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4896 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4897 PUT_MODE (tem, mode);
4899 const_tiny_rtx[i][(int) mode] = tem;
4902 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4904 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4905 mode = GET_MODE_WIDER_MODE (mode))
4906 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4908 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4910 mode = GET_MODE_WIDER_MODE (mode))
4911 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4914 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4915 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4916 const_tiny_rtx[0][i] = const0_rtx;
4918 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4919 if (STORE_FLAG_VALUE == 1)
4920 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4922 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4923 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4924 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4925 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4926 ggc_add_rtx_root (&const_true_rtx, 1);
4928 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4929 return_address_pointer_rtx
4930 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4934 struct_value_rtx = STRUCT_VALUE;
4936 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4939 #ifdef STRUCT_VALUE_INCOMING
4940 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4942 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4943 struct_value_incoming_rtx
4944 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4946 struct_value_incoming_rtx = struct_value_rtx;
4950 #ifdef STATIC_CHAIN_REGNUM
4951 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4953 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4954 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4955 static_chain_incoming_rtx
4956 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4959 static_chain_incoming_rtx = static_chain_rtx;
4963 static_chain_rtx = STATIC_CHAIN;
4965 #ifdef STATIC_CHAIN_INCOMING
4966 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4968 static_chain_incoming_rtx = static_chain_rtx;
4972 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4973 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4975 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4976 ggc_add_rtx_root (&struct_value_rtx, 1);
4977 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4978 ggc_add_rtx_root (&static_chain_rtx, 1);
4979 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4980 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4983 /* Query and clear/ restore no_line_numbers. This is used by the
4984 switch / case handling in stmt.c to give proper line numbers in
4985 warnings about unreachable code. */
4988 force_line_numbers ()
4990 int old = no_line_numbers;
4992 no_line_numbers = 0;
4994 force_next_line_note ();
4999 restore_line_number_status (old_value)
5002 no_line_numbers = old_value;