1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 #include "langhooks.h"
60 /* Commonly used modes. */
62 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
63 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
64 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
65 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
68 /* This is *not* reset after each function. It gives each CODE_LABEL
69 in the entire compilation a unique label number. */
71 static int label_num = 1;
73 /* Highest label number in current function.
74 Zero means use the value of label_num instead.
75 This is nonzero only when belatedly compiling an inline function. */
77 static int last_label_num;
79 /* Value label_num had when set_new_first_and_last_label_number was called.
80 If label_num has not changed since then, last_label_num is valid. */
82 static int base_label_num;
84 /* Nonzero means do not generate NOTEs for source line numbers. */
86 static int no_line_numbers;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these except perhaps the floating-point CONST_DOUBLEs
91 are unique; no other rtx-object will be equal to any of these. */
93 rtx global_rtl[GR_MAX];
95 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
96 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
97 record a copy of const[012]_rtx. */
99 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
108 /* All references to the following fixed hard registers go through
109 these unique rtl objects. On machines where the frame-pointer and
110 arg-pointer are the same register, they use the same unique object.
112 After register allocation, other rtl objects which used to be pseudo-regs
113 may be clobbered to refer to the frame-pointer register.
114 But references that were originally to the frame-pointer can be
115 distinguished from the others because they contain frame_pointer_rtx.
117 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
118 tricky: until register elimination has taken place hard_frame_pointer_rtx
119 should be used if it is being set, and frame_pointer_rtx otherwise. After
120 register elimination hard_frame_pointer_rtx should always be used.
121 On machines where the two registers are same (most) then these are the
124 In an inline procedure, the stack and frame pointer rtxs may not be
125 used for anything else. */
126 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
127 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
128 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
129 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
130 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
132 /* This is used to implement __builtin_return_address for some machines.
133 See for instance the MIPS port. */
134 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
136 /* We make one copy of (const_int C) where C is in
137 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
138 to save space during the compilation and simplify comparisons of
141 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
143 /* A hash table storing CONST_INTs whose absolute value is greater
144 than MAX_SAVED_CONST_INT. */
146 static htab_t const_int_htab;
148 /* A hash table storing memory attribute structures. */
149 static htab_t mem_attrs_htab;
151 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
152 shortly thrown away. We use two mechanisms to prevent this waste:
154 For sizes up to 5 elements, we keep a SEQUENCE and its associated
155 rtvec for use by gen_sequence. One entry for each size is
156 sufficient because most cases are calls to gen_sequence followed by
157 immediately emitting the SEQUENCE. Reuse is safe since emitting a
158 sequence is destructive on the insn in it anyway and hence can't be
161 We do not bother to save this cached data over nested function calls.
162 Instead, we just reinitialize them. */
164 #define SEQUENCE_RESULT_SIZE 5
166 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
168 /* During RTL generation, we also keep a list of free INSN rtl codes. */
169 static rtx free_insn;
171 #define first_insn (cfun->emit->x_first_insn)
172 #define last_insn (cfun->emit->x_last_insn)
173 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
174 #define last_linenum (cfun->emit->x_last_linenum)
175 #define last_filename (cfun->emit->x_last_filename)
176 #define first_label_num (cfun->emit->x_first_label_num)
178 static rtx make_jump_insn_raw PARAMS ((rtx));
179 static rtx make_call_insn_raw PARAMS ((rtx));
180 static rtx find_line_note PARAMS ((rtx));
181 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
182 static rtx change_address_1 PARAMS ((rtx, enum machine_mode, rtx,
184 static void unshare_all_rtl_1 PARAMS ((rtx));
185 static void unshare_all_decls PARAMS ((tree));
186 static void reset_used_decls PARAMS ((tree));
187 static void mark_label_nuses PARAMS ((rtx));
188 static hashval_t const_int_htab_hash PARAMS ((const void *));
189 static int const_int_htab_eq PARAMS ((const void *,
191 static hashval_t mem_attrs_htab_hash PARAMS ((const void *));
192 static int mem_attrs_htab_eq PARAMS ((const void *,
194 static void mem_attrs_mark PARAMS ((const void *));
195 static mem_attrs *get_mem_attrs PARAMS ((HOST_WIDE_INT, tree, rtx,
199 /* Probability of the conditional branch currently proceeded by try_split.
200 Set to -1 otherwise. */
201 int split_branch_probability = -1;
203 /* Returns a hash code for X (which is a really a CONST_INT). */
206 const_int_htab_hash (x)
209 return (hashval_t) INTVAL ((const struct rtx_def *) x);
212 /* Returns non-zero if the value represented by X (which is really a
213 CONST_INT) is the same as that given by Y (which is really a
217 const_int_htab_eq (x, y)
221 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
224 /* Returns a hash code for X (which is a really a mem_attrs *). */
227 mem_attrs_htab_hash (x)
230 mem_attrs *p = (mem_attrs *) x;
232 return (p->alias ^ (p->align * 1000)
233 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
234 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
238 /* Returns non-zero if the value represented by X (which is really a
239 mem_attrs *) is the same as that given by Y (which is also really a
243 mem_attrs_htab_eq (x, y)
247 mem_attrs *p = (mem_attrs *) x;
248 mem_attrs *q = (mem_attrs *) y;
250 return (p->alias == q->alias && p->decl == q->decl && p->offset == q->offset
251 && p->size == q->size && p->align == q->align);
254 /* This routine is called when we determine that we need a mem_attrs entry.
255 It marks the associated decl and RTL as being used, if present. */
261 mem_attrs *p = (mem_attrs *) x;
264 ggc_mark_tree (p->decl);
267 ggc_mark_rtx (p->offset);
270 ggc_mark_rtx (p->size);
273 /* Allocate a new mem_attrs structure and insert it into the hash table if
274 one identical to it is not already in the table. We are doing this for
278 get_mem_attrs (alias, decl, offset, size, align, mode)
284 enum machine_mode mode;
289 /* If everything is the default, we can just return zero. */
290 if (alias == 0 && decl == 0 && offset == 0
292 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
293 && (align == BITS_PER_UNIT
294 || (mode != BLKmode && align == GET_MODE_ALIGNMENT (mode))))
299 attrs.offset = offset;
303 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
306 *slot = ggc_alloc (sizeof (mem_attrs));
307 memcpy (*slot, &attrs, sizeof (mem_attrs));
313 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
314 don't attempt to share with the various global pieces of rtl (such as
315 frame_pointer_rtx). */
318 gen_raw_REG (mode, regno)
319 enum machine_mode mode;
322 rtx x = gen_rtx_raw_REG (mode, regno);
323 ORIGINAL_REGNO (x) = regno;
327 /* There are some RTL codes that require special attention; the generation
328 functions do the raw handling. If you add to this list, modify
329 special_rtx in gengenrtl.c as well. */
332 gen_rtx_CONST_INT (mode, arg)
333 enum machine_mode mode ATTRIBUTE_UNUSED;
338 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
339 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
341 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
342 if (const_true_rtx && arg == STORE_FLAG_VALUE)
343 return const_true_rtx;
346 /* Look up the CONST_INT in the hash table. */
347 slot = htab_find_slot_with_hash (const_int_htab, &arg,
348 (hashval_t) arg, INSERT);
350 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
355 /* CONST_DOUBLEs needs special handling because their length is known
359 gen_rtx_CONST_DOUBLE (mode, arg0, arg1)
360 enum machine_mode mode;
361 HOST_WIDE_INT arg0, arg1;
363 rtx r = rtx_alloc (CONST_DOUBLE);
367 X0EXP (r, 0) = NULL_RTX;
371 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 2; --i)
378 gen_rtx_REG (mode, regno)
379 enum machine_mode mode;
382 /* In case the MD file explicitly references the frame pointer, have
383 all such references point to the same frame pointer. This is
384 used during frame pointer elimination to distinguish the explicit
385 references to these registers from pseudos that happened to be
388 If we have eliminated the frame pointer or arg pointer, we will
389 be using it as a normal register, for example as a spill
390 register. In such cases, we might be accessing it in a mode that
391 is not Pmode and therefore cannot use the pre-allocated rtx.
393 Also don't do this when we are making new REGs in reload, since
394 we don't want to get confused with the real pointers. */
396 if (mode == Pmode && !reload_in_progress)
398 if (regno == FRAME_POINTER_REGNUM)
399 return frame_pointer_rtx;
400 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
401 if (regno == HARD_FRAME_POINTER_REGNUM)
402 return hard_frame_pointer_rtx;
404 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
405 if (regno == ARG_POINTER_REGNUM)
406 return arg_pointer_rtx;
408 #ifdef RETURN_ADDRESS_POINTER_REGNUM
409 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
410 return return_address_pointer_rtx;
412 if (regno == STACK_POINTER_REGNUM)
413 return stack_pointer_rtx;
416 return gen_raw_REG (mode, regno);
420 gen_rtx_MEM (mode, addr)
421 enum machine_mode mode;
424 rtx rt = gen_rtx_raw_MEM (mode, addr);
426 /* This field is not cleared by the mere allocation of the rtx, so
434 gen_rtx_SUBREG (mode, reg, offset)
435 enum machine_mode mode;
439 /* This is the most common failure type.
440 Catch it early so we can see who does it. */
441 if ((offset % GET_MODE_SIZE (mode)) != 0)
444 /* This check isn't usable right now because combine will
445 throw arbitrary crap like a CALL into a SUBREG in
446 gen_lowpart_for_combine so we must just eat it. */
448 /* Check for this too. */
449 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
452 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
455 /* Generate a SUBREG representing the least-significant part of REG if MODE
456 is smaller than mode of REG, otherwise paradoxical SUBREG. */
459 gen_lowpart_SUBREG (mode, reg)
460 enum machine_mode mode;
463 enum machine_mode inmode;
465 inmode = GET_MODE (reg);
466 if (inmode == VOIDmode)
468 return gen_rtx_SUBREG (mode, reg,
469 subreg_lowpart_offset (mode, inmode));
472 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
474 ** This routine generates an RTX of the size specified by
475 ** <code>, which is an RTX code. The RTX structure is initialized
476 ** from the arguments <element1> through <elementn>, which are
477 ** interpreted according to the specific RTX type's format. The
478 ** special machine mode associated with the rtx (if any) is specified
481 ** gen_rtx can be invoked in a way which resembles the lisp-like
482 ** rtx it will generate. For example, the following rtx structure:
484 ** (plus:QI (mem:QI (reg:SI 1))
485 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
487 ** ...would be generated by the following C code:
489 ** gen_rtx (PLUS, QImode,
490 ** gen_rtx (MEM, QImode,
491 ** gen_rtx (REG, SImode, 1)),
492 ** gen_rtx (MEM, QImode,
493 ** gen_rtx (PLUS, SImode,
494 ** gen_rtx (REG, SImode, 2),
495 ** gen_rtx (REG, SImode, 3)))),
500 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
502 int i; /* Array indices... */
503 const char *fmt; /* Current rtx's format... */
504 rtx rt_val; /* RTX to return to caller... */
507 VA_FIXEDARG (p, enum rtx_code, code);
508 VA_FIXEDARG (p, enum machine_mode, mode);
513 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
518 HOST_WIDE_INT arg0 = va_arg (p, HOST_WIDE_INT);
519 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
521 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1);
526 rt_val = gen_rtx_REG (mode, va_arg (p, int));
530 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
534 rt_val = rtx_alloc (code); /* Allocate the storage space. */
535 rt_val->mode = mode; /* Store the machine mode... */
537 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
538 for (i = 0; i < GET_RTX_LENGTH (code); i++)
542 case '0': /* Unused field. */
545 case 'i': /* An integer? */
546 XINT (rt_val, i) = va_arg (p, int);
549 case 'w': /* A wide integer? */
550 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
553 case 's': /* A string? */
554 XSTR (rt_val, i) = va_arg (p, char *);
557 case 'e': /* An expression? */
558 case 'u': /* An insn? Same except when printing. */
559 XEXP (rt_val, i) = va_arg (p, rtx);
562 case 'E': /* An RTX vector? */
563 XVEC (rt_val, i) = va_arg (p, rtvec);
566 case 'b': /* A bitmap? */
567 XBITMAP (rt_val, i) = va_arg (p, bitmap);
570 case 't': /* A tree? */
571 XTREE (rt_val, i) = va_arg (p, tree);
585 /* gen_rtvec (n, [rt1, ..., rtn])
587 ** This routine creates an rtvec and stores within it the
588 ** pointers to rtx's which are its arguments.
593 gen_rtvec VPARAMS ((int n, ...))
599 VA_FIXEDARG (p, int, n);
602 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
604 vector = (rtx *) alloca (n * sizeof (rtx));
606 for (i = 0; i < n; i++)
607 vector[i] = va_arg (p, rtx);
609 /* The definition of VA_* in K&R C causes `n' to go out of scope. */
613 return gen_rtvec_v (save_n, vector);
617 gen_rtvec_v (n, argp)
625 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
627 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
629 for (i = 0; i < n; i++)
630 rt_val->elem[i] = *argp++;
635 /* Generate a REG rtx for a new pseudo register of mode MODE.
636 This pseudo is assigned the next sequential register number. */
640 enum machine_mode mode;
642 struct function *f = cfun;
645 /* Don't let anything called after initial flow analysis create new
650 if (generating_concat_p
651 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
652 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
654 /* For complex modes, don't make a single pseudo.
655 Instead, make a CONCAT of two pseudos.
656 This allows noncontiguous allocation of the real and imaginary parts,
657 which makes much better code. Besides, allocating DCmode
658 pseudos overstrains reload on some machines like the 386. */
659 rtx realpart, imagpart;
660 int size = GET_MODE_UNIT_SIZE (mode);
661 enum machine_mode partmode
662 = mode_for_size (size * BITS_PER_UNIT,
663 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
664 ? MODE_FLOAT : MODE_INT),
667 realpart = gen_reg_rtx (partmode);
668 imagpart = gen_reg_rtx (partmode);
669 return gen_rtx_CONCAT (mode, realpart, imagpart);
672 /* Make sure regno_pointer_align, regno_decl, and regno_reg_rtx are large
673 enough to have an element for this pseudo reg number. */
675 if (reg_rtx_no == f->emit->regno_pointer_align_length)
677 int old_size = f->emit->regno_pointer_align_length;
682 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
683 memset (new + old_size, 0, old_size);
684 f->emit->regno_pointer_align = (unsigned char *) new;
686 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
687 old_size * 2 * sizeof (rtx));
688 memset (new1 + old_size, 0, old_size * sizeof (rtx));
689 regno_reg_rtx = new1;
691 new2 = (tree *) xrealloc (f->emit->regno_decl,
692 old_size * 2 * sizeof (tree));
693 memset (new2 + old_size, 0, old_size * sizeof (tree));
694 f->emit->regno_decl = new2;
696 f->emit->regno_pointer_align_length = old_size * 2;
699 val = gen_raw_REG (mode, reg_rtx_no);
700 regno_reg_rtx[reg_rtx_no++] = val;
704 /* Identify REG (which may be a CONCAT) as a user register. */
710 if (GET_CODE (reg) == CONCAT)
712 REG_USERVAR_P (XEXP (reg, 0)) = 1;
713 REG_USERVAR_P (XEXP (reg, 1)) = 1;
715 else if (GET_CODE (reg) == REG)
716 REG_USERVAR_P (reg) = 1;
721 /* Identify REG as a probable pointer register and show its alignment
722 as ALIGN, if nonzero. */
725 mark_reg_pointer (reg, align)
729 if (! REG_POINTER (reg))
731 REG_POINTER (reg) = 1;
734 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
736 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
737 /* We can no-longer be sure just how aligned this pointer is */
738 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
741 /* Return 1 plus largest pseudo reg number used in the current function. */
749 /* Return 1 + the largest label number used so far in the current function. */
754 if (last_label_num && label_num == base_label_num)
755 return last_label_num;
759 /* Return first label number used in this function (if any were used). */
762 get_first_label_num ()
764 return first_label_num;
767 /* Return the final regno of X, which is a SUBREG of a hard
770 subreg_hard_regno (x, check_mode)
774 enum machine_mode mode = GET_MODE (x);
775 unsigned int byte_offset, base_regno, final_regno;
776 rtx reg = SUBREG_REG (x);
778 /* This is where we attempt to catch illegal subregs
779 created by the compiler. */
780 if (GET_CODE (x) != SUBREG
781 || GET_CODE (reg) != REG)
783 base_regno = REGNO (reg);
784 if (base_regno >= FIRST_PSEUDO_REGISTER)
786 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
789 /* Catch non-congruent offsets too. */
790 byte_offset = SUBREG_BYTE (x);
791 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
794 final_regno = subreg_regno (x);
799 /* Return a value representing some low-order bits of X, where the number
800 of low-order bits is given by MODE. Note that no conversion is done
801 between floating-point and fixed-point values, rather, the bit
802 representation is returned.
804 This function handles the cases in common between gen_lowpart, below,
805 and two variants in cse.c and combine.c. These are the cases that can
806 be safely handled at all points in the compilation.
808 If this is not a case we can handle, return 0. */
811 gen_lowpart_common (mode, x)
812 enum machine_mode mode;
815 int msize = GET_MODE_SIZE (mode);
816 int xsize = GET_MODE_SIZE (GET_MODE (x));
819 if (GET_MODE (x) == mode)
822 /* MODE must occupy no more words than the mode of X. */
823 if (GET_MODE (x) != VOIDmode
824 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
825 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
828 offset = subreg_lowpart_offset (mode, GET_MODE (x));
830 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
831 && (GET_MODE_CLASS (mode) == MODE_INT
832 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
834 /* If we are getting the low-order part of something that has been
835 sign- or zero-extended, we can either just use the object being
836 extended or make a narrower extension. If we want an even smaller
837 piece than the size of the object being extended, call ourselves
840 This case is used mostly by combine and cse. */
842 if (GET_MODE (XEXP (x, 0)) == mode)
844 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
845 return gen_lowpart_common (mode, XEXP (x, 0));
846 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
847 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
849 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
850 || GET_CODE (x) == CONCAT)
851 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
852 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
853 from the low-order part of the constant. */
854 else if ((GET_MODE_CLASS (mode) == MODE_INT
855 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
856 && GET_MODE (x) == VOIDmode
857 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
859 /* If MODE is twice the host word size, X is already the desired
860 representation. Otherwise, if MODE is wider than a word, we can't
861 do this. If MODE is exactly a word, return just one CONST_INT. */
863 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
865 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
867 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
868 return (GET_CODE (x) == CONST_INT ? x
869 : GEN_INT (CONST_DOUBLE_LOW (x)));
872 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
873 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
874 : CONST_DOUBLE_LOW (x));
876 /* Sign extend to HOST_WIDE_INT. */
877 val = trunc_int_for_mode (val, mode);
879 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
884 #ifndef REAL_ARITHMETIC
885 /* If X is an integral constant but we want it in floating-point, it
886 must be the case that we have a union of an integer and a floating-point
887 value. If the machine-parameters allow it, simulate that union here
888 and return the result. The two-word and single-word cases are
891 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
892 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
893 || flag_pretend_float)
894 && GET_MODE_CLASS (mode) == MODE_FLOAT
895 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
896 && GET_CODE (x) == CONST_INT
897 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
899 union {HOST_WIDE_INT i; float d; } u;
902 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
904 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
905 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
906 || flag_pretend_float)
907 && GET_MODE_CLASS (mode) == MODE_FLOAT
908 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
909 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
910 && GET_MODE (x) == VOIDmode
911 && (sizeof (double) * HOST_BITS_PER_CHAR
912 == 2 * HOST_BITS_PER_WIDE_INT))
914 union {HOST_WIDE_INT i[2]; double d; } u;
915 HOST_WIDE_INT low, high;
917 if (GET_CODE (x) == CONST_INT)
918 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
920 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
922 #ifdef HOST_WORDS_BIG_ENDIAN
923 u.i[0] = high, u.i[1] = low;
925 u.i[0] = low, u.i[1] = high;
928 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
931 /* Similarly, if this is converting a floating-point value into a
932 single-word integer. Only do this is the host and target parameters are
935 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
936 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
937 || flag_pretend_float)
938 && (GET_MODE_CLASS (mode) == MODE_INT
939 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
940 && GET_CODE (x) == CONST_DOUBLE
941 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
942 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
943 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
945 /* Similarly, if this is converting a floating-point value into a
946 two-word integer, we can do this one word at a time and make an
947 integer. Only do this is the host and target parameters are
950 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
951 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
952 || flag_pretend_float)
953 && (GET_MODE_CLASS (mode) == MODE_INT
954 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
955 && GET_CODE (x) == CONST_DOUBLE
956 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
957 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
959 rtx lowpart, highpart;
961 lowpart = constant_subword (x,
962 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
964 highpart = constant_subword (x,
965 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
967 if (lowpart && GET_CODE (lowpart) == CONST_INT
968 && highpart && GET_CODE (highpart) == CONST_INT)
969 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
971 #else /* ifndef REAL_ARITHMETIC */
973 /* When we have a FP emulator, we can handle all conversions between
974 FP and integer operands. This simplifies reload because it
975 doesn't have to deal with constructs like (subreg:DI
976 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
977 /* Single-precision floats are always 32-bits and double-precision
978 floats are always 64-bits. */
980 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
981 && GET_MODE_BITSIZE (mode) == 32
982 && GET_CODE (x) == CONST_INT)
988 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
989 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
991 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
992 && GET_MODE_BITSIZE (mode) == 64
993 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
994 && GET_MODE (x) == VOIDmode)
998 HOST_WIDE_INT low, high;
1000 if (GET_CODE (x) == CONST_INT)
1003 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
1007 low = CONST_DOUBLE_LOW (x);
1008 high = CONST_DOUBLE_HIGH (x);
1011 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
1013 if (WORDS_BIG_ENDIAN)
1014 i[0] = high, i[1] = low;
1016 i[0] = low, i[1] = high;
1018 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
1019 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
1021 else if ((GET_MODE_CLASS (mode) == MODE_INT
1022 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
1023 && GET_CODE (x) == CONST_DOUBLE
1024 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
1027 long i[4]; /* Only the low 32 bits of each 'long' are used. */
1028 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
1030 /* Convert 'r' into an array of four 32-bit words in target word
1032 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
1033 switch (GET_MODE_BITSIZE (GET_MODE (x)))
1036 REAL_VALUE_TO_TARGET_SINGLE (r, i[3 * endian]);
1039 i[3 - 3 * endian] = 0;
1042 REAL_VALUE_TO_TARGET_DOUBLE (r, i + 2 * endian);
1043 i[2 - 2 * endian] = 0;
1044 i[3 - 2 * endian] = 0;
1047 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
1048 i[3 - 3 * endian] = 0;
1051 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
1056 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
1058 #if HOST_BITS_PER_WIDE_INT == 32
1059 return immed_double_const (i[3 * endian], i[1 + endian], mode);
1061 if (HOST_BITS_PER_WIDE_INT != 64)
1064 return immed_double_const (i[3 * endian]
1065 | ((HOST_WIDE_INT) i[1 + endian] << 32),
1067 | ((HOST_WIDE_INT) i[3 - 3 * endian] << 32),
1071 #endif /* ifndef REAL_ARITHMETIC */
1073 /* Otherwise, we can't do this. */
1077 /* Return the real part (which has mode MODE) of a complex value X.
1078 This always comes at the low address in memory. */
1081 gen_realpart (mode, x)
1082 enum machine_mode mode;
1085 if (WORDS_BIG_ENDIAN
1086 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1088 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1090 ("Can't access real part of complex value in hard register");
1091 else if (WORDS_BIG_ENDIAN)
1092 return gen_highpart (mode, x);
1094 return gen_lowpart (mode, x);
1097 /* Return the imaginary part (which has mode MODE) of a complex value X.
1098 This always comes at the high address in memory. */
1101 gen_imagpart (mode, x)
1102 enum machine_mode mode;
1105 if (WORDS_BIG_ENDIAN)
1106 return gen_lowpart (mode, x);
1107 else if (! WORDS_BIG_ENDIAN
1108 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1110 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1112 ("can't access imaginary part of complex value in hard register");
1114 return gen_highpart (mode, x);
1117 /* Return 1 iff X, assumed to be a SUBREG,
1118 refers to the real part of the complex value in its containing reg.
1119 Complex values are always stored with the real part in the first word,
1120 regardless of WORDS_BIG_ENDIAN. */
1123 subreg_realpart_p (x)
1126 if (GET_CODE (x) != SUBREG)
1129 return ((unsigned int) SUBREG_BYTE (x)
1130 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1133 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1134 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1135 least-significant part of X.
1136 MODE specifies how big a part of X to return;
1137 it usually should not be larger than a word.
1138 If X is a MEM whose address is a QUEUED, the value may be so also. */
1141 gen_lowpart (mode, x)
1142 enum machine_mode mode;
1145 rtx result = gen_lowpart_common (mode, x);
1149 else if (GET_CODE (x) == REG)
1151 /* Must be a hard reg that's not valid in MODE. */
1152 result = gen_lowpart_common (mode, copy_to_reg (x));
1157 else if (GET_CODE (x) == MEM)
1159 /* The only additional case we can do is MEM. */
1161 if (WORDS_BIG_ENDIAN)
1162 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1163 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1165 if (BYTES_BIG_ENDIAN)
1166 /* Adjust the address so that the address-after-the-data
1168 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1169 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1171 return adjust_address (x, mode, offset);
1173 else if (GET_CODE (x) == ADDRESSOF)
1174 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1179 /* Like `gen_lowpart', but refer to the most significant part.
1180 This is used to access the imaginary part of a complex number. */
1183 gen_highpart (mode, x)
1184 enum machine_mode mode;
1187 unsigned int msize = GET_MODE_SIZE (mode);
1190 /* This case loses if X is a subreg. To catch bugs early,
1191 complain if an invalid MODE is used even in other cases. */
1192 if (msize > UNITS_PER_WORD
1193 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1196 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1197 subreg_highpart_offset (mode, GET_MODE (x)));
1199 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1200 the target if we have a MEM. gen_highpart must return a valid operand,
1201 emitting code if necessary to do so. */
1202 if (GET_CODE (result) == MEM)
1203 result = validize_mem (result);
1210 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1211 be VOIDmode constant. */
1213 gen_highpart_mode (outermode, innermode, exp)
1214 enum machine_mode outermode, innermode;
1217 if (GET_MODE (exp) != VOIDmode)
1219 if (GET_MODE (exp) != innermode)
1221 return gen_highpart (outermode, exp);
1223 return simplify_gen_subreg (outermode, exp, innermode,
1224 subreg_highpart_offset (outermode, innermode));
1226 /* Return offset in bytes to get OUTERMODE low part
1227 of the value in mode INNERMODE stored in memory in target format. */
1230 subreg_lowpart_offset (outermode, innermode)
1231 enum machine_mode outermode, innermode;
1233 unsigned int offset = 0;
1234 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1238 if (WORDS_BIG_ENDIAN)
1239 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1240 if (BYTES_BIG_ENDIAN)
1241 offset += difference % UNITS_PER_WORD;
1247 /* Return offset in bytes to get OUTERMODE high part
1248 of the value in mode INNERMODE stored in memory in target format. */
1250 subreg_highpart_offset (outermode, innermode)
1251 enum machine_mode outermode, innermode;
1253 unsigned int offset = 0;
1254 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1256 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1261 if (! WORDS_BIG_ENDIAN)
1262 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1263 if (! BYTES_BIG_ENDIAN)
1264 offset += difference % UNITS_PER_WORD;
1270 /* Return 1 iff X, assumed to be a SUBREG,
1271 refers to the least significant part of its containing reg.
1272 If X is not a SUBREG, always return 1 (it is its own low part!). */
1275 subreg_lowpart_p (x)
1278 if (GET_CODE (x) != SUBREG)
1280 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1283 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1284 == SUBREG_BYTE (x));
1288 /* Helper routine for all the constant cases of operand_subword.
1289 Some places invoke this directly. */
1292 constant_subword (op, offset, mode)
1295 enum machine_mode mode;
1297 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1300 /* If OP is already an integer word, return it. */
1301 if (GET_MODE_CLASS (mode) == MODE_INT
1302 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1305 #ifdef REAL_ARITHMETIC
1306 /* The output is some bits, the width of the target machine's word.
1307 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1309 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1310 && GET_MODE_CLASS (mode) == MODE_FLOAT
1311 && GET_MODE_BITSIZE (mode) == 64
1312 && GET_CODE (op) == CONST_DOUBLE)
1317 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1318 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1320 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1321 which the words are written depends on the word endianness.
1322 ??? This is a potential portability problem and should
1323 be fixed at some point.
1325 We must exercise caution with the sign bit. By definition there
1326 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1327 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1328 So we explicitly mask and sign-extend as necessary. */
1329 if (BITS_PER_WORD == 32)
1332 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1333 return GEN_INT (val);
1335 #if HOST_BITS_PER_WIDE_INT >= 64
1336 else if (BITS_PER_WORD >= 64 && offset == 0)
1338 val = k[! WORDS_BIG_ENDIAN];
1339 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1340 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1341 return GEN_INT (val);
1344 else if (BITS_PER_WORD == 16)
1346 val = k[offset >> 1];
1347 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1349 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1350 return GEN_INT (val);
1355 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1356 && GET_MODE_CLASS (mode) == MODE_FLOAT
1357 && GET_MODE_BITSIZE (mode) > 64
1358 && GET_CODE (op) == CONST_DOUBLE)
1363 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1364 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1366 if (BITS_PER_WORD == 32)
1369 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1370 return GEN_INT (val);
1372 #if HOST_BITS_PER_WIDE_INT >= 64
1373 else if (BITS_PER_WORD >= 64 && offset <= 1)
1375 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1376 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1377 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1378 return GEN_INT (val);
1384 #else /* no REAL_ARITHMETIC */
1385 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1386 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1387 || flag_pretend_float)
1388 && GET_MODE_CLASS (mode) == MODE_FLOAT
1389 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1390 && GET_CODE (op) == CONST_DOUBLE)
1392 /* The constant is stored in the host's word-ordering,
1393 but we want to access it in the target's word-ordering. Some
1394 compilers don't like a conditional inside macro args, so we have two
1395 copies of the return. */
1396 #ifdef HOST_WORDS_BIG_ENDIAN
1397 return GEN_INT (offset == WORDS_BIG_ENDIAN
1398 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1400 return GEN_INT (offset != WORDS_BIG_ENDIAN
1401 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1404 #endif /* no REAL_ARITHMETIC */
1406 /* Single word float is a little harder, since single- and double-word
1407 values often do not have the same high-order bits. We have already
1408 verified that we want the only defined word of the single-word value. */
1409 #ifdef REAL_ARITHMETIC
1410 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1411 && GET_MODE_BITSIZE (mode) == 32
1412 && GET_CODE (op) == CONST_DOUBLE)
1417 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1418 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1420 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1422 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1424 if (BITS_PER_WORD == 16)
1426 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1428 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1431 return GEN_INT (val);
1434 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1435 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1436 || flag_pretend_float)
1437 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1438 && GET_MODE_CLASS (mode) == MODE_FLOAT
1439 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1440 && GET_CODE (op) == CONST_DOUBLE)
1443 union {float f; HOST_WIDE_INT i; } u;
1445 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1448 return GEN_INT (u.i);
1450 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1451 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1452 || flag_pretend_float)
1453 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1454 && GET_MODE_CLASS (mode) == MODE_FLOAT
1455 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1456 && GET_CODE (op) == CONST_DOUBLE)
1459 union {double d; HOST_WIDE_INT i; } u;
1461 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1464 return GEN_INT (u.i);
1466 #endif /* no REAL_ARITHMETIC */
1468 /* The only remaining cases that we can handle are integers.
1469 Convert to proper endianness now since these cases need it.
1470 At this point, offset == 0 means the low-order word.
1472 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1473 in general. However, if OP is (const_int 0), we can just return
1476 if (op == const0_rtx)
1479 if (GET_MODE_CLASS (mode) != MODE_INT
1480 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1481 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1484 if (WORDS_BIG_ENDIAN)
1485 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1487 /* Find out which word on the host machine this value is in and get
1488 it from the constant. */
1489 val = (offset / size_ratio == 0
1490 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1491 : (GET_CODE (op) == CONST_INT
1492 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1494 /* Get the value we want into the low bits of val. */
1495 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1496 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1498 val = trunc_int_for_mode (val, word_mode);
1500 return GEN_INT (val);
1503 /* Return subword OFFSET of operand OP.
1504 The word number, OFFSET, is interpreted as the word number starting
1505 at the low-order address. OFFSET 0 is the low-order word if not
1506 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1508 If we cannot extract the required word, we return zero. Otherwise,
1509 an rtx corresponding to the requested word will be returned.
1511 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1512 reload has completed, a valid address will always be returned. After
1513 reload, if a valid address cannot be returned, we return zero.
1515 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1516 it is the responsibility of the caller.
1518 MODE is the mode of OP in case it is a CONST_INT.
1520 ??? This is still rather broken for some cases. The problem for the
1521 moment is that all callers of this thing provide no 'goal mode' to
1522 tell us to work with. This exists because all callers were written
1523 in a word based SUBREG world.
1524 Now use of this function can be deprecated by simplify_subreg in most
1529 operand_subword (op, offset, validate_address, mode)
1531 unsigned int offset;
1532 int validate_address;
1533 enum machine_mode mode;
1535 if (mode == VOIDmode)
1536 mode = GET_MODE (op);
1538 if (mode == VOIDmode)
1541 /* If OP is narrower than a word, fail. */
1543 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1546 /* If we want a word outside OP, return zero. */
1548 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1551 /* Form a new MEM at the requested address. */
1552 if (GET_CODE (op) == MEM)
1554 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1556 if (! validate_address)
1559 else if (reload_completed)
1561 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1565 return replace_equiv_address (new, XEXP (new, 0));
1568 /* Rest can be handled by simplify_subreg. */
1569 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1572 /* Similar to `operand_subword', but never return 0. If we can't extract
1573 the required subword, put OP into a register and try again. If that fails,
1574 abort. We always validate the address in this case.
1576 MODE is the mode of OP, in case it is CONST_INT. */
1579 operand_subword_force (op, offset, mode)
1581 unsigned int offset;
1582 enum machine_mode mode;
1584 rtx result = operand_subword (op, offset, 1, mode);
1589 if (mode != BLKmode && mode != VOIDmode)
1591 /* If this is a register which can not be accessed by words, copy it
1592 to a pseudo register. */
1593 if (GET_CODE (op) == REG)
1594 op = copy_to_reg (op);
1596 op = force_reg (mode, op);
1599 result = operand_subword (op, offset, 1, mode);
1606 /* Given a compare instruction, swap the operands.
1607 A test instruction is changed into a compare of 0 against the operand. */
1610 reverse_comparison (insn)
1613 rtx body = PATTERN (insn);
1616 if (GET_CODE (body) == SET)
1617 comp = SET_SRC (body);
1619 comp = SET_SRC (XVECEXP (body, 0, 0));
1621 if (GET_CODE (comp) == COMPARE)
1623 rtx op0 = XEXP (comp, 0);
1624 rtx op1 = XEXP (comp, 1);
1625 XEXP (comp, 0) = op1;
1626 XEXP (comp, 1) = op0;
1630 rtx new = gen_rtx_COMPARE (VOIDmode,
1631 CONST0_RTX (GET_MODE (comp)), comp);
1632 if (GET_CODE (body) == SET)
1633 SET_SRC (body) = new;
1635 SET_SRC (XVECEXP (body, 0, 0)) = new;
1640 /* Given REF, a MEM, and T, either the type of X or the expression
1641 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1642 if we are making a new object of this type. */
1645 set_mem_attributes (ref, t, objectp)
1650 HOST_WIDE_INT alias = MEM_ALIAS_SET (ref);
1651 tree decl = MEM_DECL (ref);
1652 rtx offset = MEM_OFFSET (ref);
1653 rtx size = MEM_SIZE (ref);
1654 unsigned int align = MEM_ALIGN (ref);
1657 /* It can happen that type_for_mode was given a mode for which there
1658 is no language-level type. In which case it returns NULL, which
1663 type = TYPE_P (t) ? t : TREE_TYPE (t);
1665 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1666 wrong answer, as it assumes that DECL_RTL already has the right alias
1667 info. Callers should not set DECL_RTL until after the call to
1668 set_mem_attributes. */
1669 if (DECL_P (t) && ref == DECL_RTL_IF_SET (t))
1672 /* Get the alias set from the expression or type (perhaps using a
1673 front-end routine) and use it. */
1674 alias = get_alias_set (t);
1676 MEM_VOLATILE_P (ref) = TYPE_VOLATILE (type);
1677 MEM_IN_STRUCT_P (ref) = AGGREGATE_TYPE_P (type);
1678 RTX_UNCHANGING_P (ref)
1679 |= ((lang_hooks.honor_readonly
1680 && (TYPE_READONLY (type) || TREE_READONLY (t)))
1681 || (! TYPE_P (t) && TREE_CONSTANT (t)));
1683 /* If we are making an object of this type, or if this is a DECL, we know
1684 that it is a scalar if the type is not an aggregate. */
1685 if ((objectp || DECL_P (t)) && ! AGGREGATE_TYPE_P (type))
1686 MEM_SCALAR_P (ref) = 1;
1688 /* We can set the alignment from the type if we are making an object,
1689 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1690 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1691 align = MAX (align, TYPE_ALIGN (type));
1693 /* If the size is known, we can set that. */
1694 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1695 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1697 /* If T is not a type, we may be able to deduce some more information about
1701 maybe_set_unchanging (ref, t);
1702 if (TREE_THIS_VOLATILE (t))
1703 MEM_VOLATILE_P (ref) = 1;
1705 /* Now remove any NOPs: they don't change what the underlying object is.
1706 Likewise for SAVE_EXPR. */
1707 while (TREE_CODE (t) == NOP_EXPR || TREE_CODE (t) == CONVERT_EXPR
1708 || TREE_CODE (t) == NON_LVALUE_EXPR || TREE_CODE (t) == SAVE_EXPR)
1709 t = TREE_OPERAND (t, 0);
1711 /* If this expression can't be addressed (e.g., it contains a reference
1712 to a non-addressable field), show we don't change its alias set. */
1713 if (! can_address_p (t))
1714 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1716 /* If this is a decl, set the attributes of the MEM from it. */
1720 offset = GEN_INT (0);
1721 size = (DECL_SIZE_UNIT (t)
1722 && host_integerp (DECL_SIZE_UNIT (t), 1)
1723 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1724 align = DECL_ALIGN (t);
1727 /* If this is a constant, we know the alignment. */
1728 else if (TREE_CODE_CLASS (TREE_CODE (t)) == 'c')
1730 align = TYPE_ALIGN (type);
1731 #ifdef CONSTANT_ALIGNMENT
1732 align = CONSTANT_ALIGNMENT (t, align);
1737 /* Now set the attributes we computed above. */
1739 = get_mem_attrs (alias, decl, offset, size, align, GET_MODE (ref));
1741 /* If this is already known to be a scalar or aggregate, we are done. */
1742 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1745 /* If it is a reference into an aggregate, this is part of an aggregate.
1746 Otherwise we don't know. */
1747 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1748 || TREE_CODE (t) == ARRAY_RANGE_REF
1749 || TREE_CODE (t) == BIT_FIELD_REF)
1750 MEM_IN_STRUCT_P (ref) = 1;
1753 /* Set the alias set of MEM to SET. */
1756 set_mem_alias_set (mem, set)
1760 #ifdef ENABLE_CHECKING
1761 /* If the new and old alias sets don't conflict, something is wrong. */
1762 if (!alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)))
1766 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_DECL (mem), MEM_OFFSET (mem),
1767 MEM_SIZE (mem), MEM_ALIGN (mem),
1771 /* Set the alignment of MEM to ALIGN bits. */
1774 set_mem_align (mem, align)
1778 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_DECL (mem),
1779 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1783 /* Set the decl for MEM to DECL. */
1786 set_mem_decl (mem, decl)
1791 = get_mem_attrs (MEM_ALIAS_SET (mem), decl, MEM_OFFSET (mem),
1792 MEM_SIZE (mem), MEM_ALIGN (mem), GET_MODE (mem));
1795 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1796 and its address changed to ADDR. (VOIDmode means don't change the mode.
1797 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1798 returned memory location is required to be valid. The memory
1799 attributes are not changed. */
1802 change_address_1 (memref, mode, addr, validate)
1804 enum machine_mode mode;
1810 if (GET_CODE (memref) != MEM)
1812 if (mode == VOIDmode)
1813 mode = GET_MODE (memref);
1815 addr = XEXP (memref, 0);
1819 if (reload_in_progress || reload_completed)
1821 if (! memory_address_p (mode, addr))
1825 addr = memory_address (mode, addr);
1828 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1831 new = gen_rtx_MEM (mode, addr);
1832 MEM_COPY_ATTRIBUTES (new, memref);
1836 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1837 way we are changing MEMREF, so we only preserve the alias set. */
1840 change_address (memref, mode, addr)
1842 enum machine_mode mode;
1845 rtx new = change_address_1 (memref, mode, addr, 1);
1846 enum machine_mode mmode = GET_MODE (new);
1849 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0,
1850 mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode)),
1851 (mmode == BLKmode ? BITS_PER_UNIT
1852 : GET_MODE_ALIGNMENT (mmode)),
1858 /* Return a memory reference like MEMREF, but with its mode changed
1859 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1860 nonzero, the memory address is forced to be valid.
1861 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1862 and caller is responsible for adjusting MEMREF base register. */
1865 adjust_address_1 (memref, mode, offset, validate, adjust)
1867 enum machine_mode mode;
1868 HOST_WIDE_INT offset;
1869 int validate, adjust;
1871 rtx addr = XEXP (memref, 0);
1873 rtx memoffset = MEM_OFFSET (memref);
1875 unsigned int memalign = MEM_ALIGN (memref);
1877 if (adjust == 0 || offset == 0)
1878 /* ??? Prefer to create garbage instead of creating shared rtl. */
1879 addr = copy_rtx (addr);
1880 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1881 object, we can merge it into the LO_SUM. */
1882 else if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1884 && (unsigned HOST_WIDE_INT) offset
1885 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1886 addr = gen_rtx_LO_SUM (Pmode, XEXP (addr, 0),
1887 plus_constant (XEXP (addr, 1), offset));
1889 addr = plus_constant (addr, offset);
1891 new = change_address_1 (memref, mode, addr, validate);
1893 /* Compute the new values of the memory attributes due to this adjustment.
1894 We add the offsets and update the alignment. */
1896 memoffset = GEN_INT (offset + INTVAL (memoffset));
1898 /* Compute the new alignment by taking the MIN of the alignment and the
1899 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
1902 memalign = MIN (memalign, (offset & -offset) * BITS_PER_UNIT);
1904 /* We can compute the size in a number of ways. */
1905 if (GET_MODE (new) != BLKmode)
1906 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new)));
1907 else if (MEM_SIZE (memref))
1908 size = plus_constant (MEM_SIZE (memref), -offset);
1910 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_DECL (memref),
1911 memoffset, size, memalign, GET_MODE (new));
1913 /* At some point, we should validate that this offset is within the object,
1914 if all the appropriate values are known. */
1918 /* Return a memory reference like MEMREF, but with its mode changed
1919 to MODE and its address changed to ADDR, which is assumed to be
1920 MEMREF offseted by OFFSET bytes. If VALIDATE is
1921 nonzero, the memory address is forced to be valid. */
1924 adjust_automodify_address_1 (memref, mode, addr, offset, validate)
1926 enum machine_mode mode;
1928 HOST_WIDE_INT offset;
1931 memref = change_address_1 (memref, VOIDmode, addr, validate);
1932 return adjust_address_1 (memref, mode, offset, validate, 0);
1935 /* Return a memory reference like MEMREF, but whose address is changed by
1936 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
1937 known to be in OFFSET (possibly 1). */
1940 offset_address (memref, offset, pow2)
1945 rtx new = change_address_1 (memref, VOIDmode,
1946 gen_rtx_PLUS (Pmode, XEXP (memref, 0),
1947 force_reg (Pmode, offset)), 1);
1949 /* Update the alignment to reflect the offset. Reset the offset, which
1951 MEM_ATTRS (new) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_DECL (memref),
1952 0, 0, MIN (MEM_ALIGN (memref),
1953 pow2 * BITS_PER_UNIT),
1958 /* Return a memory reference like MEMREF, but with its address changed to
1959 ADDR. The caller is asserting that the actual piece of memory pointed
1960 to is the same, just the form of the address is being changed, such as
1961 by putting something into a register. */
1964 replace_equiv_address (memref, addr)
1968 /* change_address_1 copies the memory attribute structure without change
1969 and that's exactly what we want here. */
1970 update_temp_slot_address (XEXP (memref, 0), addr);
1971 return change_address_1 (memref, VOIDmode, addr, 1);
1974 /* Likewise, but the reference is not required to be valid. */
1977 replace_equiv_address_nv (memref, addr)
1981 return change_address_1 (memref, VOIDmode, addr, 0);
1984 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1991 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1992 NULL_RTX, label_num++, NULL, NULL);
1994 LABEL_NUSES (label) = 0;
1995 LABEL_ALTERNATE_NAME (label) = NULL;
1999 /* For procedure integration. */
2001 /* Install new pointers to the first and last insns in the chain.
2002 Also, set cur_insn_uid to one higher than the last in use.
2003 Used for an inline-procedure after copying the insn chain. */
2006 set_new_first_and_last_insn (first, last)
2015 for (insn = first; insn; insn = NEXT_INSN (insn))
2016 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2021 /* Set the range of label numbers found in the current function.
2022 This is used when belatedly compiling an inline function. */
2025 set_new_first_and_last_label_num (first, last)
2028 base_label_num = label_num;
2029 first_label_num = first;
2030 last_label_num = last;
2033 /* Set the last label number found in the current function.
2034 This is used when belatedly compiling an inline function. */
2037 set_new_last_label_num (last)
2040 base_label_num = label_num;
2041 last_label_num = last;
2044 /* Restore all variables describing the current status from the structure *P.
2045 This is used after a nested function. */
2048 restore_emit_status (p)
2049 struct function *p ATTRIBUTE_UNUSED;
2052 clear_emit_caches ();
2055 /* Clear out all parts of the state in F that can safely be discarded
2056 after the function has been compiled, to let garbage collection
2057 reclaim the memory. */
2060 free_emit_status (f)
2063 free (f->emit->x_regno_reg_rtx);
2064 free (f->emit->regno_pointer_align);
2065 free (f->emit->regno_decl);
2070 /* Go through all the RTL insn bodies and copy any invalid shared
2071 structure. This routine should only be called once. */
2074 unshare_all_rtl (fndecl, insn)
2080 /* Make sure that virtual parameters are not shared. */
2081 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
2082 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
2084 /* Make sure that virtual stack slots are not shared. */
2085 unshare_all_decls (DECL_INITIAL (fndecl));
2087 /* Unshare just about everything else. */
2088 unshare_all_rtl_1 (insn);
2090 /* Make sure the addresses of stack slots found outside the insn chain
2091 (such as, in DECL_RTL of a variable) are not shared
2092 with the insn chain.
2094 This special care is necessary when the stack slot MEM does not
2095 actually appear in the insn chain. If it does appear, its address
2096 is unshared from all else at that point. */
2097 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2100 /* Go through all the RTL insn bodies and copy any invalid shared
2101 structure, again. This is a fairly expensive thing to do so it
2102 should be done sparingly. */
2105 unshare_all_rtl_again (insn)
2111 for (p = insn; p; p = NEXT_INSN (p))
2114 reset_used_flags (PATTERN (p));
2115 reset_used_flags (REG_NOTES (p));
2116 reset_used_flags (LOG_LINKS (p));
2119 /* Make sure that virtual stack slots are not shared. */
2120 reset_used_decls (DECL_INITIAL (cfun->decl));
2122 /* Make sure that virtual parameters are not shared. */
2123 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2124 reset_used_flags (DECL_RTL (decl));
2126 reset_used_flags (stack_slot_list);
2128 unshare_all_rtl (cfun->decl, insn);
2131 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2132 Assumes the mark bits are cleared at entry. */
2135 unshare_all_rtl_1 (insn)
2138 for (; insn; insn = NEXT_INSN (insn))
2141 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2142 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2143 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
2147 /* Go through all virtual stack slots of a function and copy any
2148 shared structure. */
2150 unshare_all_decls (blk)
2155 /* Copy shared decls. */
2156 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2157 if (DECL_RTL_SET_P (t))
2158 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
2160 /* Now process sub-blocks. */
2161 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2162 unshare_all_decls (t);
2165 /* Go through all virtual stack slots of a function and mark them as
2168 reset_used_decls (blk)
2174 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2175 if (DECL_RTL_SET_P (t))
2176 reset_used_flags (DECL_RTL (t));
2178 /* Now process sub-blocks. */
2179 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
2180 reset_used_decls (t);
2183 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2184 Recursively does the same for subexpressions. */
2187 copy_rtx_if_shared (orig)
2193 const char *format_ptr;
2199 code = GET_CODE (x);
2201 /* These types may be freely shared. */
2214 /* SCRATCH must be shared because they represent distinct values. */
2218 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
2219 a LABEL_REF, it isn't sharable. */
2220 if (GET_CODE (XEXP (x, 0)) == PLUS
2221 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
2222 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
2231 /* The chain of insns is not being copied. */
2235 /* A MEM is allowed to be shared if its address is constant.
2237 We used to allow sharing of MEMs which referenced
2238 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
2239 that can lose. instantiate_virtual_regs will not unshare
2240 the MEMs, and combine may change the structure of the address
2241 because it looks safe and profitable in one context, but
2242 in some other context it creates unrecognizable RTL. */
2243 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
2252 /* This rtx may not be shared. If it has already been seen,
2253 replace it with a copy of itself. */
2259 copy = rtx_alloc (code);
2261 (sizeof (*copy) - sizeof (copy->fld)
2262 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
2268 /* Now scan the subexpressions recursively.
2269 We can store any replaced subexpressions directly into X
2270 since we know X is not shared! Any vectors in X
2271 must be copied if X was copied. */
2273 format_ptr = GET_RTX_FORMAT (code);
2275 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2277 switch (*format_ptr++)
2280 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
2284 if (XVEC (x, i) != NULL)
2287 int len = XVECLEN (x, i);
2289 if (copied && len > 0)
2290 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2291 for (j = 0; j < len; j++)
2292 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2300 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2301 to look for shared sub-parts. */
2304 reset_used_flags (x)
2309 const char *format_ptr;
2314 code = GET_CODE (x);
2316 /* These types may be freely shared so we needn't do any resetting
2337 /* The chain of insns is not being copied. */
2346 format_ptr = GET_RTX_FORMAT (code);
2347 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2349 switch (*format_ptr++)
2352 reset_used_flags (XEXP (x, i));
2356 for (j = 0; j < XVECLEN (x, i); j++)
2357 reset_used_flags (XVECEXP (x, i, j));
2363 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2364 Return X or the rtx for the pseudo reg the value of X was copied into.
2365 OTHER must be valid as a SET_DEST. */
2368 make_safe_from (x, other)
2372 switch (GET_CODE (other))
2375 other = SUBREG_REG (other);
2377 case STRICT_LOW_PART:
2380 other = XEXP (other, 0);
2386 if ((GET_CODE (other) == MEM
2388 && GET_CODE (x) != REG
2389 && GET_CODE (x) != SUBREG)
2390 || (GET_CODE (other) == REG
2391 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2392 || reg_mentioned_p (other, x))))
2394 rtx temp = gen_reg_rtx (GET_MODE (x));
2395 emit_move_insn (temp, x);
2401 /* Emission of insns (adding them to the doubly-linked list). */
2403 /* Return the first insn of the current sequence or current function. */
2411 /* Return the last insn emitted in current sequence or current function. */
2419 /* Specify a new insn as the last in the chain. */
2422 set_last_insn (insn)
2425 if (NEXT_INSN (insn) != 0)
2430 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2433 get_last_insn_anywhere ()
2435 struct sequence_stack *stack;
2438 for (stack = seq_stack; stack; stack = stack->next)
2439 if (stack->last != 0)
2444 /* Return a number larger than any instruction's uid in this function. */
2449 return cur_insn_uid;
2452 /* Renumber instructions so that no instruction UIDs are wasted. */
2455 renumber_insns (stream)
2460 /* If we're not supposed to renumber instructions, don't. */
2461 if (!flag_renumber_insns)
2464 /* If there aren't that many instructions, then it's not really
2465 worth renumbering them. */
2466 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2471 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2474 fprintf (stream, "Renumbering insn %d to %d\n",
2475 INSN_UID (insn), cur_insn_uid);
2476 INSN_UID (insn) = cur_insn_uid++;
2480 /* Return the next insn. If it is a SEQUENCE, return the first insn
2489 insn = NEXT_INSN (insn);
2490 if (insn && GET_CODE (insn) == INSN
2491 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2492 insn = XVECEXP (PATTERN (insn), 0, 0);
2498 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2502 previous_insn (insn)
2507 insn = PREV_INSN (insn);
2508 if (insn && GET_CODE (insn) == INSN
2509 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2510 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2516 /* Return the next insn after INSN that is not a NOTE. This routine does not
2517 look inside SEQUENCEs. */
2520 next_nonnote_insn (insn)
2525 insn = NEXT_INSN (insn);
2526 if (insn == 0 || GET_CODE (insn) != NOTE)
2533 /* Return the previous insn before INSN that is not a NOTE. This routine does
2534 not look inside SEQUENCEs. */
2537 prev_nonnote_insn (insn)
2542 insn = PREV_INSN (insn);
2543 if (insn == 0 || GET_CODE (insn) != NOTE)
2550 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2551 or 0, if there is none. This routine does not look inside
2555 next_real_insn (insn)
2560 insn = NEXT_INSN (insn);
2561 if (insn == 0 || GET_CODE (insn) == INSN
2562 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2569 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2570 or 0, if there is none. This routine does not look inside
2574 prev_real_insn (insn)
2579 insn = PREV_INSN (insn);
2580 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2581 || GET_CODE (insn) == JUMP_INSN)
2588 /* Find the next insn after INSN that really does something. This routine
2589 does not look inside SEQUENCEs. Until reload has completed, this is the
2590 same as next_real_insn. */
2593 active_insn_p (insn)
2596 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2597 || (GET_CODE (insn) == INSN
2598 && (! reload_completed
2599 || (GET_CODE (PATTERN (insn)) != USE
2600 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2604 next_active_insn (insn)
2609 insn = NEXT_INSN (insn);
2610 if (insn == 0 || active_insn_p (insn))
2617 /* Find the last insn before INSN that really does something. This routine
2618 does not look inside SEQUENCEs. Until reload has completed, this is the
2619 same as prev_real_insn. */
2622 prev_active_insn (insn)
2627 insn = PREV_INSN (insn);
2628 if (insn == 0 || active_insn_p (insn))
2635 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2643 insn = NEXT_INSN (insn);
2644 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2651 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2659 insn = PREV_INSN (insn);
2660 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2668 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2669 and REG_CC_USER notes so we can find it. */
2672 link_cc0_insns (insn)
2675 rtx user = next_nonnote_insn (insn);
2677 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2678 user = XVECEXP (PATTERN (user), 0, 0);
2680 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2682 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2685 /* Return the next insn that uses CC0 after INSN, which is assumed to
2686 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2687 applied to the result of this function should yield INSN).
2689 Normally, this is simply the next insn. However, if a REG_CC_USER note
2690 is present, it contains the insn that uses CC0.
2692 Return 0 if we can't find the insn. */
2695 next_cc0_user (insn)
2698 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2701 return XEXP (note, 0);
2703 insn = next_nonnote_insn (insn);
2704 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2705 insn = XVECEXP (PATTERN (insn), 0, 0);
2707 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2713 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2714 note, it is the previous insn. */
2717 prev_cc0_setter (insn)
2720 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2723 return XEXP (note, 0);
2725 insn = prev_nonnote_insn (insn);
2726 if (! sets_cc0_p (PATTERN (insn)))
2733 /* Increment the label uses for all labels present in rtx. */
2743 code = GET_CODE (x);
2744 if (code == LABEL_REF)
2745 LABEL_NUSES (XEXP (x, 0))++;
2747 fmt = GET_RTX_FORMAT (code);
2748 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2751 mark_label_nuses (XEXP (x, i));
2752 else if (fmt[i] == 'E')
2753 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2754 mark_label_nuses (XVECEXP (x, i, j));
2759 /* Try splitting insns that can be split for better scheduling.
2760 PAT is the pattern which might split.
2761 TRIAL is the insn providing PAT.
2762 LAST is non-zero if we should return the last insn of the sequence produced.
2764 If this routine succeeds in splitting, it returns the first or last
2765 replacement insn depending on the value of LAST. Otherwise, it
2766 returns TRIAL. If the insn to be returned can be split, it will be. */
2769 try_split (pat, trial, last)
2773 rtx before = PREV_INSN (trial);
2774 rtx after = NEXT_INSN (trial);
2775 int has_barrier = 0;
2780 if (any_condjump_p (trial)
2781 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
2782 split_branch_probability = INTVAL (XEXP (note, 0));
2783 probability = split_branch_probability;
2785 seq = split_insns (pat, trial);
2787 split_branch_probability = -1;
2789 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2790 We may need to handle this specially. */
2791 if (after && GET_CODE (after) == BARRIER)
2794 after = NEXT_INSN (after);
2799 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2800 The latter case will normally arise only when being done so that
2801 it, in turn, will be split (SFmode on the 29k is an example). */
2802 if (GET_CODE (seq) == SEQUENCE)
2806 /* Avoid infinite loop if any insn of the result matches
2807 the original pattern. */
2808 for (i = 0; i < XVECLEN (seq, 0); i++)
2809 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2810 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2814 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2815 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2817 rtx insn = XVECEXP (seq, 0, i);
2818 mark_jump_label (PATTERN (insn),
2819 XVECEXP (seq, 0, i), 0);
2821 if (probability != -1
2822 && any_condjump_p (insn)
2823 && !find_reg_note (insn, REG_BR_PROB, 0))
2825 /* We can preserve the REG_BR_PROB notes only if exactly
2826 one jump is created, otherwise the machine description
2827 is responsible for this step using
2828 split_branch_probability variable. */
2832 = gen_rtx_EXPR_LIST (REG_BR_PROB,
2833 GEN_INT (probability),
2838 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2839 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2840 if (GET_CODE (trial) == CALL_INSN)
2841 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2842 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2843 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2844 = CALL_INSN_FUNCTION_USAGE (trial);
2846 /* Copy notes, particularly those related to the CFG. */
2847 for (note = REG_NOTES (trial); note ; note = XEXP (note, 1))
2849 switch (REG_NOTE_KIND (note))
2852 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2854 rtx insn = XVECEXP (seq, 0, i);
2855 if (GET_CODE (insn) == CALL_INSN
2856 || (flag_non_call_exceptions
2857 && may_trap_p (PATTERN (insn))))
2859 = gen_rtx_EXPR_LIST (REG_EH_REGION,
2867 case REG_ALWAYS_RETURN:
2868 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2870 rtx insn = XVECEXP (seq, 0, i);
2871 if (GET_CODE (insn) == CALL_INSN)
2873 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
2879 case REG_NON_LOCAL_GOTO:
2880 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2882 rtx insn = XVECEXP (seq, 0, i);
2883 if (GET_CODE (insn) == JUMP_INSN)
2885 = gen_rtx_EXPR_LIST (REG_NOTE_KIND (note),
2896 /* If there are LABELS inside the split insns increment the
2897 usage count so we don't delete the label. */
2898 if (GET_CODE (trial) == INSN)
2899 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2900 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2901 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2903 tem = emit_insn_after (seq, trial);
2905 delete_related_insns (trial);
2907 emit_barrier_after (tem);
2909 /* Recursively call try_split for each new insn created; by the
2910 time control returns here that insn will be fully split, so
2911 set LAST and continue from the insn after the one returned.
2912 We can't use next_active_insn here since AFTER may be a note.
2913 Ignore deleted insns, which can be occur if not optimizing. */
2914 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2915 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2916 tem = try_split (PATTERN (tem), tem, 1);
2918 /* Avoid infinite loop if the result matches the original pattern. */
2919 else if (rtx_equal_p (seq, pat))
2923 PATTERN (trial) = seq;
2924 INSN_CODE (trial) = -1;
2925 try_split (seq, trial, last);
2928 /* Return either the first or the last insn, depending on which was
2931 ? (after ? PREV_INSN (after) : last_insn)
2932 : NEXT_INSN (before);
2938 /* Make and return an INSN rtx, initializing all its slots.
2939 Store PATTERN in the pattern slots. */
2942 make_insn_raw (pattern)
2947 insn = rtx_alloc (INSN);
2949 INSN_UID (insn) = cur_insn_uid++;
2950 PATTERN (insn) = pattern;
2951 INSN_CODE (insn) = -1;
2952 LOG_LINKS (insn) = NULL;
2953 REG_NOTES (insn) = NULL;
2955 #ifdef ENABLE_RTL_CHECKING
2958 && (returnjump_p (insn)
2959 || (GET_CODE (insn) == SET
2960 && SET_DEST (insn) == pc_rtx)))
2962 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2970 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2973 make_jump_insn_raw (pattern)
2978 insn = rtx_alloc (JUMP_INSN);
2979 INSN_UID (insn) = cur_insn_uid++;
2981 PATTERN (insn) = pattern;
2982 INSN_CODE (insn) = -1;
2983 LOG_LINKS (insn) = NULL;
2984 REG_NOTES (insn) = NULL;
2985 JUMP_LABEL (insn) = NULL;
2990 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2993 make_call_insn_raw (pattern)
2998 insn = rtx_alloc (CALL_INSN);
2999 INSN_UID (insn) = cur_insn_uid++;
3001 PATTERN (insn) = pattern;
3002 INSN_CODE (insn) = -1;
3003 LOG_LINKS (insn) = NULL;
3004 REG_NOTES (insn) = NULL;
3005 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3010 /* Add INSN to the end of the doubly-linked list.
3011 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3017 PREV_INSN (insn) = last_insn;
3018 NEXT_INSN (insn) = 0;
3020 if (NULL != last_insn)
3021 NEXT_INSN (last_insn) = insn;
3023 if (NULL == first_insn)
3029 /* Add INSN into the doubly-linked list after insn AFTER. This and
3030 the next should be the only functions called to insert an insn once
3031 delay slots have been filled since only they know how to update a
3035 add_insn_after (insn, after)
3038 rtx next = NEXT_INSN (after);
3041 if (optimize && INSN_DELETED_P (after))
3044 NEXT_INSN (insn) = next;
3045 PREV_INSN (insn) = after;
3049 PREV_INSN (next) = insn;
3050 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3051 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3053 else if (last_insn == after)
3057 struct sequence_stack *stack = seq_stack;
3058 /* Scan all pending sequences too. */
3059 for (; stack; stack = stack->next)
3060 if (after == stack->last)
3070 if (basic_block_for_insn
3071 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3072 && (bb = BLOCK_FOR_INSN (after)))
3074 set_block_for_insn (insn, bb);
3075 /* Should not happen as first in the BB is always
3076 either NOTE or LABEL. */
3077 if (bb->end == after
3078 /* Avoid clobbering of structure when creating new BB. */
3079 && GET_CODE (insn) != BARRIER
3080 && (GET_CODE (insn) != NOTE
3081 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3085 NEXT_INSN (after) = insn;
3086 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
3088 rtx sequence = PATTERN (after);
3089 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3093 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3094 the previous should be the only functions called to insert an insn once
3095 delay slots have been filled since only they know how to update a
3099 add_insn_before (insn, before)
3102 rtx prev = PREV_INSN (before);
3105 if (optimize && INSN_DELETED_P (before))
3108 PREV_INSN (insn) = prev;
3109 NEXT_INSN (insn) = before;
3113 NEXT_INSN (prev) = insn;
3114 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3116 rtx sequence = PATTERN (prev);
3117 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3120 else if (first_insn == before)
3124 struct sequence_stack *stack = seq_stack;
3125 /* Scan all pending sequences too. */
3126 for (; stack; stack = stack->next)
3127 if (before == stack->first)
3129 stack->first = insn;
3137 if (basic_block_for_insn
3138 && (unsigned int)INSN_UID (before) < basic_block_for_insn->num_elements
3139 && (bb = BLOCK_FOR_INSN (before)))
3141 set_block_for_insn (insn, bb);
3142 /* Should not happen as first in the BB is always
3143 either NOTE or LABEl. */
3144 if (bb->head == insn
3145 /* Avoid clobbering of structure when creating new BB. */
3146 && GET_CODE (insn) != BARRIER
3147 && (GET_CODE (insn) != NOTE
3148 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_BASIC_BLOCK))
3152 PREV_INSN (before) = insn;
3153 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
3154 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3157 /* Remove an insn from its doubly-linked list. This function knows how
3158 to handle sequences. */
3163 rtx next = NEXT_INSN (insn);
3164 rtx prev = PREV_INSN (insn);
3169 NEXT_INSN (prev) = next;
3170 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
3172 rtx sequence = PATTERN (prev);
3173 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3176 else if (first_insn == insn)
3180 struct sequence_stack *stack = seq_stack;
3181 /* Scan all pending sequences too. */
3182 for (; stack; stack = stack->next)
3183 if (insn == stack->first)
3185 stack->first = next;
3195 PREV_INSN (next) = prev;
3196 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
3197 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3199 else if (last_insn == insn)
3203 struct sequence_stack *stack = seq_stack;
3204 /* Scan all pending sequences too. */
3205 for (; stack; stack = stack->next)
3206 if (insn == stack->last)
3215 if (basic_block_for_insn
3216 && (unsigned int)INSN_UID (insn) < basic_block_for_insn->num_elements
3217 && (bb = BLOCK_FOR_INSN (insn)))
3219 if (bb->head == insn)
3221 /* Never ever delete the basic block note without deleting whole basic
3223 if (GET_CODE (insn) == NOTE)
3227 if (bb->end == insn)
3232 /* Delete all insns made since FROM.
3233 FROM becomes the new last instruction. */
3236 delete_insns_since (from)
3242 NEXT_INSN (from) = 0;
3246 /* This function is deprecated, please use sequences instead.
3248 Move a consecutive bunch of insns to a different place in the chain.
3249 The insns to be moved are those between FROM and TO.
3250 They are moved to a new position after the insn AFTER.
3251 AFTER must not be FROM or TO or any insn in between.
3253 This function does not know about SEQUENCEs and hence should not be
3254 called after delay-slot filling has been done. */
3257 reorder_insns_nobb (from, to, after)
3258 rtx from, to, after;
3260 /* Splice this bunch out of where it is now. */
3261 if (PREV_INSN (from))
3262 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
3264 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
3265 if (last_insn == to)
3266 last_insn = PREV_INSN (from);
3267 if (first_insn == from)
3268 first_insn = NEXT_INSN (to);
3270 /* Make the new neighbors point to it and it to them. */
3271 if (NEXT_INSN (after))
3272 PREV_INSN (NEXT_INSN (after)) = to;
3274 NEXT_INSN (to) = NEXT_INSN (after);
3275 PREV_INSN (from) = after;
3276 NEXT_INSN (after) = from;
3277 if (after == last_insn)
3281 /* Same as function above, but take care to update BB boundaries. */
3283 reorder_insns (from, to, after)
3284 rtx from, to, after;
3286 rtx prev = PREV_INSN (from);
3287 basic_block bb, bb2;
3289 reorder_insns_nobb (from, to, after);
3291 if (basic_block_for_insn
3292 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3293 && (bb = BLOCK_FOR_INSN (after)))
3297 if (basic_block_for_insn
3298 && (unsigned int)INSN_UID (from) < basic_block_for_insn->num_elements
3299 && (bb2 = BLOCK_FOR_INSN (from)))
3305 if (bb->end == after)
3308 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
3309 set_block_for_insn (x, bb);
3313 /* Return the line note insn preceding INSN. */
3316 find_line_note (insn)
3319 if (no_line_numbers)
3322 for (; insn; insn = PREV_INSN (insn))
3323 if (GET_CODE (insn) == NOTE
3324 && NOTE_LINE_NUMBER (insn) >= 0)
3330 /* Like reorder_insns, but inserts line notes to preserve the line numbers
3331 of the moved insns when debugging. This may insert a note between AFTER
3332 and FROM, and another one after TO. */
3335 reorder_insns_with_line_notes (from, to, after)
3336 rtx from, to, after;
3338 rtx from_line = find_line_note (from);
3339 rtx after_line = find_line_note (after);
3341 reorder_insns (from, to, after);
3343 if (from_line == after_line)
3347 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3348 NOTE_LINE_NUMBER (from_line),
3351 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3352 NOTE_LINE_NUMBER (after_line),
3356 /* Remove unnecessary notes from the instruction stream. */
3359 remove_unnecessary_notes ()
3361 rtx block_stack = NULL_RTX;
3362 rtx eh_stack = NULL_RTX;
3367 /* We must not remove the first instruction in the function because
3368 the compiler depends on the first instruction being a note. */
3369 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
3371 /* Remember what's next. */
3372 next = NEXT_INSN (insn);
3374 /* We're only interested in notes. */
3375 if (GET_CODE (insn) != NOTE)
3378 switch (NOTE_LINE_NUMBER (insn))
3380 case NOTE_INSN_DELETED:
3384 case NOTE_INSN_EH_REGION_BEG:
3385 eh_stack = alloc_INSN_LIST (insn, eh_stack);
3388 case NOTE_INSN_EH_REGION_END:
3389 /* Too many end notes. */
3390 if (eh_stack == NULL_RTX)
3392 /* Mismatched nesting. */
3393 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
3396 eh_stack = XEXP (eh_stack, 1);
3397 free_INSN_LIST_node (tmp);
3400 case NOTE_INSN_BLOCK_BEG:
3401 /* By now, all notes indicating lexical blocks should have
3402 NOTE_BLOCK filled in. */
3403 if (NOTE_BLOCK (insn) == NULL_TREE)
3405 block_stack = alloc_INSN_LIST (insn, block_stack);
3408 case NOTE_INSN_BLOCK_END:
3409 /* Too many end notes. */
3410 if (block_stack == NULL_RTX)
3412 /* Mismatched nesting. */
3413 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3416 block_stack = XEXP (block_stack, 1);
3417 free_INSN_LIST_node (tmp);
3419 /* Scan back to see if there are any non-note instructions
3420 between INSN and the beginning of this block. If not,
3421 then there is no PC range in the generated code that will
3422 actually be in this block, so there's no point in
3423 remembering the existence of the block. */
3424 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3426 /* This block contains a real instruction. Note that we
3427 don't include labels; if the only thing in the block
3428 is a label, then there are still no PC values that
3429 lie within the block. */
3433 /* We're only interested in NOTEs. */
3434 if (GET_CODE (tmp) != NOTE)
3437 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3439 /* We just verified that this BLOCK matches us with
3440 the block_stack check above. Never delete the
3441 BLOCK for the outermost scope of the function; we
3442 can refer to names from that scope even if the
3443 block notes are messed up. */
3444 if (! is_body_block (NOTE_BLOCK (insn))
3445 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3452 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3453 /* There's a nested block. We need to leave the
3454 current block in place since otherwise the debugger
3455 wouldn't be able to show symbols from our block in
3456 the nested block. */
3462 /* Too many begin notes. */
3463 if (block_stack || eh_stack)
3468 /* Emit an insn of given code and pattern
3469 at a specified place within the doubly-linked list. */
3471 /* Make an instruction with body PATTERN
3472 and output it before the instruction BEFORE. */
3475 emit_insn_before (pattern, before)
3476 rtx pattern, before;
3480 if (GET_CODE (pattern) == SEQUENCE)
3484 for (i = 0; i < XVECLEN (pattern, 0); i++)
3486 insn = XVECEXP (pattern, 0, i);
3487 add_insn_before (insn, before);
3492 insn = make_insn_raw (pattern);
3493 add_insn_before (insn, before);
3499 /* Make an instruction with body PATTERN and code JUMP_INSN
3500 and output it before the instruction BEFORE. */
3503 emit_jump_insn_before (pattern, before)
3504 rtx pattern, before;
3508 if (GET_CODE (pattern) == SEQUENCE)
3509 insn = emit_insn_before (pattern, before);
3512 insn = make_jump_insn_raw (pattern);
3513 add_insn_before (insn, before);
3519 /* Make an instruction with body PATTERN and code CALL_INSN
3520 and output it before the instruction BEFORE. */
3523 emit_call_insn_before (pattern, before)
3524 rtx pattern, before;
3528 if (GET_CODE (pattern) == SEQUENCE)
3529 insn = emit_insn_before (pattern, before);
3532 insn = make_call_insn_raw (pattern);
3533 add_insn_before (insn, before);
3534 PUT_CODE (insn, CALL_INSN);
3540 /* Make an insn of code BARRIER
3541 and output it before the insn BEFORE. */
3544 emit_barrier_before (before)
3547 rtx insn = rtx_alloc (BARRIER);
3549 INSN_UID (insn) = cur_insn_uid++;
3551 add_insn_before (insn, before);
3555 /* Emit the label LABEL before the insn BEFORE. */
3558 emit_label_before (label, before)
3561 /* This can be called twice for the same label as a result of the
3562 confusion that follows a syntax error! So make it harmless. */
3563 if (INSN_UID (label) == 0)
3565 INSN_UID (label) = cur_insn_uid++;
3566 add_insn_before (label, before);
3572 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3575 emit_note_before (subtype, before)
3579 rtx note = rtx_alloc (NOTE);
3580 INSN_UID (note) = cur_insn_uid++;
3581 NOTE_SOURCE_FILE (note) = 0;
3582 NOTE_LINE_NUMBER (note) = subtype;
3584 add_insn_before (note, before);
3588 /* Make an insn of code INSN with body PATTERN
3589 and output it after the insn AFTER. */
3592 emit_insn_after (pattern, after)
3597 if (GET_CODE (pattern) == SEQUENCE)
3601 for (i = 0; i < XVECLEN (pattern, 0); i++)
3603 insn = XVECEXP (pattern, 0, i);
3604 add_insn_after (insn, after);
3610 insn = make_insn_raw (pattern);
3611 add_insn_after (insn, after);
3617 /* Similar to emit_insn_after, except that line notes are to be inserted so
3618 as to act as if this insn were at FROM. */
3621 emit_insn_after_with_line_notes (pattern, after, from)
3622 rtx pattern, after, from;
3624 rtx from_line = find_line_note (from);
3625 rtx after_line = find_line_note (after);
3626 rtx insn = emit_insn_after (pattern, after);
3629 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3630 NOTE_LINE_NUMBER (from_line),
3634 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3635 NOTE_LINE_NUMBER (after_line),
3639 /* Make an insn of code JUMP_INSN with body PATTERN
3640 and output it after the insn AFTER. */
3643 emit_jump_insn_after (pattern, after)
3648 if (GET_CODE (pattern) == SEQUENCE)
3649 insn = emit_insn_after (pattern, after);
3652 insn = make_jump_insn_raw (pattern);
3653 add_insn_after (insn, after);
3659 /* Make an insn of code BARRIER
3660 and output it after the insn AFTER. */
3663 emit_barrier_after (after)
3666 rtx insn = rtx_alloc (BARRIER);
3668 INSN_UID (insn) = cur_insn_uid++;
3670 add_insn_after (insn, after);
3674 /* Emit the label LABEL after the insn AFTER. */
3677 emit_label_after (label, after)
3680 /* This can be called twice for the same label
3681 as a result of the confusion that follows a syntax error!
3682 So make it harmless. */
3683 if (INSN_UID (label) == 0)
3685 INSN_UID (label) = cur_insn_uid++;
3686 add_insn_after (label, after);
3692 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3695 emit_note_after (subtype, after)
3699 rtx note = rtx_alloc (NOTE);
3700 INSN_UID (note) = cur_insn_uid++;
3701 NOTE_SOURCE_FILE (note) = 0;
3702 NOTE_LINE_NUMBER (note) = subtype;
3703 add_insn_after (note, after);
3707 /* Emit a line note for FILE and LINE after the insn AFTER. */
3710 emit_line_note_after (file, line, after)
3717 if (no_line_numbers && line > 0)
3723 note = rtx_alloc (NOTE);
3724 INSN_UID (note) = cur_insn_uid++;
3725 NOTE_SOURCE_FILE (note) = file;
3726 NOTE_LINE_NUMBER (note) = line;
3727 add_insn_after (note, after);
3731 /* Make an insn of code INSN with pattern PATTERN
3732 and add it to the end of the doubly-linked list.
3733 If PATTERN is a SEQUENCE, take the elements of it
3734 and emit an insn for each element.
3736 Returns the last insn emitted. */
3742 rtx insn = last_insn;
3744 if (GET_CODE (pattern) == SEQUENCE)
3748 for (i = 0; i < XVECLEN (pattern, 0); i++)
3750 insn = XVECEXP (pattern, 0, i);
3756 insn = make_insn_raw (pattern);
3763 /* Emit the insns in a chain starting with INSN.
3764 Return the last insn emitted. */
3774 rtx next = NEXT_INSN (insn);
3783 /* Emit the insns in a chain starting with INSN and place them in front of
3784 the insn BEFORE. Return the last insn emitted. */
3787 emit_insns_before (insn, before)
3795 rtx next = NEXT_INSN (insn);
3796 add_insn_before (insn, before);
3804 /* Emit the insns in a chain starting with FIRST and place them in back of
3805 the insn AFTER. Return the last insn emitted. */
3808 emit_insns_after (first, after)
3822 if (basic_block_for_insn
3823 && (unsigned int)INSN_UID (after) < basic_block_for_insn->num_elements
3824 && (bb = BLOCK_FOR_INSN (after)))
3826 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3827 set_block_for_insn (last, bb);
3828 set_block_for_insn (last, bb);
3829 if (bb->end == after)
3833 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3836 after_after = NEXT_INSN (after);
3838 NEXT_INSN (after) = first;
3839 PREV_INSN (first) = after;
3840 NEXT_INSN (last) = after_after;
3842 PREV_INSN (after_after) = last;
3844 if (after == last_insn)
3849 /* Make an insn of code JUMP_INSN with pattern PATTERN
3850 and add it to the end of the doubly-linked list. */
3853 emit_jump_insn (pattern)
3856 if (GET_CODE (pattern) == SEQUENCE)
3857 return emit_insn (pattern);
3860 rtx insn = make_jump_insn_raw (pattern);
3866 /* Make an insn of code CALL_INSN with pattern PATTERN
3867 and add it to the end of the doubly-linked list. */
3870 emit_call_insn (pattern)
3873 if (GET_CODE (pattern) == SEQUENCE)
3874 return emit_insn (pattern);
3877 rtx insn = make_call_insn_raw (pattern);
3879 PUT_CODE (insn, CALL_INSN);
3884 /* Add the label LABEL to the end of the doubly-linked list. */
3890 /* This can be called twice for the same label
3891 as a result of the confusion that follows a syntax error!
3892 So make it harmless. */
3893 if (INSN_UID (label) == 0)
3895 INSN_UID (label) = cur_insn_uid++;
3901 /* Make an insn of code BARRIER
3902 and add it to the end of the doubly-linked list. */
3907 rtx barrier = rtx_alloc (BARRIER);
3908 INSN_UID (barrier) = cur_insn_uid++;
3913 /* Make an insn of code NOTE
3914 with data-fields specified by FILE and LINE
3915 and add it to the end of the doubly-linked list,
3916 but only if line-numbers are desired for debugging info. */
3919 emit_line_note (file, line)
3923 set_file_and_line_for_stmt (file, line);
3926 if (no_line_numbers)
3930 return emit_note (file, line);
3933 /* Make an insn of code NOTE
3934 with data-fields specified by FILE and LINE
3935 and add it to the end of the doubly-linked list.
3936 If it is a line-number NOTE, omit it if it matches the previous one. */
3939 emit_note (file, line)
3947 if (file && last_filename && !strcmp (file, last_filename)
3948 && line == last_linenum)
3950 last_filename = file;
3951 last_linenum = line;
3954 if (no_line_numbers && line > 0)
3960 note = rtx_alloc (NOTE);
3961 INSN_UID (note) = cur_insn_uid++;
3962 NOTE_SOURCE_FILE (note) = file;
3963 NOTE_LINE_NUMBER (note) = line;
3968 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3971 emit_line_note_force (file, line)
3976 return emit_line_note (file, line);
3979 /* Cause next statement to emit a line note even if the line number
3980 has not changed. This is used at the beginning of a function. */
3983 force_next_line_note ()
3988 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3989 note of this type already exists, remove it first. */
3992 set_unique_reg_note (insn, kind, datum)
3997 rtx note = find_reg_note (insn, kind, NULL_RTX);
3999 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4000 It serves no useful purpose and breaks eliminate_regs. */
4001 if ((kind == REG_EQUAL || kind == REG_EQUIV)
4002 && GET_CODE (datum) == ASM_OPERANDS)
4007 XEXP (note, 0) = datum;
4011 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
4012 return REG_NOTES (insn);
4015 /* Return an indication of which type of insn should have X as a body.
4016 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4022 if (GET_CODE (x) == CODE_LABEL)
4024 if (GET_CODE (x) == CALL)
4026 if (GET_CODE (x) == RETURN)
4028 if (GET_CODE (x) == SET)
4030 if (SET_DEST (x) == pc_rtx)
4032 else if (GET_CODE (SET_SRC (x)) == CALL)
4037 if (GET_CODE (x) == PARALLEL)
4040 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4041 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4043 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4044 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4046 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4047 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
4053 /* Emit the rtl pattern X as an appropriate kind of insn.
4054 If X is a label, it is simply added into the insn chain. */
4060 enum rtx_code code = classify_insn (x);
4062 if (code == CODE_LABEL)
4063 return emit_label (x);
4064 else if (code == INSN)
4065 return emit_insn (x);
4066 else if (code == JUMP_INSN)
4068 rtx insn = emit_jump_insn (x);
4069 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
4070 return emit_barrier ();
4073 else if (code == CALL_INSN)
4074 return emit_call_insn (x);
4079 /* Begin emitting insns to a sequence which can be packaged in an
4080 RTL_EXPR. If this sequence will contain something that might cause
4081 the compiler to pop arguments to function calls (because those
4082 pops have previously been deferred; see INHIBIT_DEFER_POP for more
4083 details), use do_pending_stack_adjust before calling this function.
4084 That will ensure that the deferred pops are not accidentally
4085 emitted in the middle of this sequence. */
4090 struct sequence_stack *tem;
4092 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
4094 tem->next = seq_stack;
4095 tem->first = first_insn;
4096 tem->last = last_insn;
4097 tem->sequence_rtl_expr = seq_rtl_expr;
4105 /* Similarly, but indicate that this sequence will be placed in T, an
4106 RTL_EXPR. See the documentation for start_sequence for more
4107 information about how to use this function. */
4110 start_sequence_for_rtl_expr (t)
4118 /* Set up the insn chain starting with FIRST as the current sequence,
4119 saving the previously current one. See the documentation for
4120 start_sequence for more information about how to use this function. */
4123 push_to_sequence (first)
4130 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
4136 /* Set up the insn chain from a chain stort in FIRST to LAST. */
4139 push_to_full_sequence (first, last)
4145 /* We really should have the end of the insn chain here. */
4146 if (last && NEXT_INSN (last))
4150 /* Set up the outer-level insn chain
4151 as the current sequence, saving the previously current one. */
4154 push_topmost_sequence ()
4156 struct sequence_stack *stack, *top = NULL;
4160 for (stack = seq_stack; stack; stack = stack->next)
4163 first_insn = top->first;
4164 last_insn = top->last;
4165 seq_rtl_expr = top->sequence_rtl_expr;
4168 /* After emitting to the outer-level insn chain, update the outer-level
4169 insn chain, and restore the previous saved state. */
4172 pop_topmost_sequence ()
4174 struct sequence_stack *stack, *top = NULL;
4176 for (stack = seq_stack; stack; stack = stack->next)
4179 top->first = first_insn;
4180 top->last = last_insn;
4181 /* ??? Why don't we save seq_rtl_expr here? */
4186 /* After emitting to a sequence, restore previous saved state.
4188 To get the contents of the sequence just made, you must call
4189 `gen_sequence' *before* calling here.
4191 If the compiler might have deferred popping arguments while
4192 generating this sequence, and this sequence will not be immediately
4193 inserted into the instruction stream, use do_pending_stack_adjust
4194 before calling gen_sequence. That will ensure that the deferred
4195 pops are inserted into this sequence, and not into some random
4196 location in the instruction stream. See INHIBIT_DEFER_POP for more
4197 information about deferred popping of arguments. */
4202 struct sequence_stack *tem = seq_stack;
4204 first_insn = tem->first;
4205 last_insn = tem->last;
4206 seq_rtl_expr = tem->sequence_rtl_expr;
4207 seq_stack = tem->next;
4212 /* This works like end_sequence, but records the old sequence in FIRST
4216 end_full_sequence (first, last)
4219 *first = first_insn;
4224 /* Return 1 if currently emitting into a sequence. */
4229 return seq_stack != 0;
4232 /* Generate a SEQUENCE rtx containing the insns already emitted
4233 to the current sequence.
4235 This is how the gen_... function from a DEFINE_EXPAND
4236 constructs the SEQUENCE that it returns. */
4246 /* Count the insns in the chain. */
4248 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
4251 /* If only one insn, return it rather than a SEQUENCE.
4252 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
4253 the case of an empty list.)
4254 We only return the pattern of an insn if its code is INSN and it
4255 has no notes. This ensures that no information gets lost. */
4257 && ! RTX_FRAME_RELATED_P (first_insn)
4258 && GET_CODE (first_insn) == INSN
4259 /* Don't throw away any reg notes. */
4260 && REG_NOTES (first_insn) == 0)
4261 return PATTERN (first_insn);
4263 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
4265 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
4266 XVECEXP (result, 0, i) = tem;
4271 /* Put the various virtual registers into REGNO_REG_RTX. */
4274 init_virtual_regs (es)
4275 struct emit_status *es;
4277 rtx *ptr = es->x_regno_reg_rtx;
4278 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
4279 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
4280 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
4281 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
4282 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
4286 clear_emit_caches ()
4290 /* Clear the start_sequence/gen_sequence cache. */
4291 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
4292 sequence_result[i] = 0;
4296 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
4297 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
4298 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
4299 static int copy_insn_n_scratches;
4301 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4302 copied an ASM_OPERANDS.
4303 In that case, it is the original input-operand vector. */
4304 static rtvec orig_asm_operands_vector;
4306 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
4307 copied an ASM_OPERANDS.
4308 In that case, it is the copied input-operand vector. */
4309 static rtvec copy_asm_operands_vector;
4311 /* Likewise for the constraints vector. */
4312 static rtvec orig_asm_constraints_vector;
4313 static rtvec copy_asm_constraints_vector;
4315 /* Recursively create a new copy of an rtx for copy_insn.
4316 This function differs from copy_rtx in that it handles SCRATCHes and
4317 ASM_OPERANDs properly.
4318 Normally, this function is not used directly; use copy_insn as front end.
4319 However, you could first copy an insn pattern with copy_insn and then use
4320 this function afterwards to properly copy any REG_NOTEs containing
4330 const char *format_ptr;
4332 code = GET_CODE (orig);
4348 for (i = 0; i < copy_insn_n_scratches; i++)
4349 if (copy_insn_scratch_in[i] == orig)
4350 return copy_insn_scratch_out[i];
4354 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
4355 a LABEL_REF, it isn't sharable. */
4356 if (GET_CODE (XEXP (orig, 0)) == PLUS
4357 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
4358 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
4362 /* A MEM with a constant address is not sharable. The problem is that
4363 the constant address may need to be reloaded. If the mem is shared,
4364 then reloading one copy of this mem will cause all copies to appear
4365 to have been reloaded. */
4371 copy = rtx_alloc (code);
4373 /* Copy the various flags, and other information. We assume that
4374 all fields need copying, and then clear the fields that should
4375 not be copied. That is the sensible default behavior, and forces
4376 us to explicitly document why we are *not* copying a flag. */
4377 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
4379 /* We do not copy the USED flag, which is used as a mark bit during
4380 walks over the RTL. */
4383 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
4384 if (GET_RTX_CLASS (code) == 'i')
4388 copy->frame_related = 0;
4391 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
4393 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
4395 copy->fld[i] = orig->fld[i];
4396 switch (*format_ptr++)
4399 if (XEXP (orig, i) != NULL)
4400 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4405 if (XVEC (orig, i) == orig_asm_constraints_vector)
4406 XVEC (copy, i) = copy_asm_constraints_vector;
4407 else if (XVEC (orig, i) == orig_asm_operands_vector)
4408 XVEC (copy, i) = copy_asm_operands_vector;
4409 else if (XVEC (orig, i) != NULL)
4411 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4412 for (j = 0; j < XVECLEN (copy, i); j++)
4413 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4424 /* These are left unchanged. */
4432 if (code == SCRATCH)
4434 i = copy_insn_n_scratches++;
4435 if (i >= MAX_RECOG_OPERANDS)
4437 copy_insn_scratch_in[i] = orig;
4438 copy_insn_scratch_out[i] = copy;
4440 else if (code == ASM_OPERANDS)
4442 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4443 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4444 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4445 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4451 /* Create a new copy of an rtx.
4452 This function differs from copy_rtx in that it handles SCRATCHes and
4453 ASM_OPERANDs properly.
4454 INSN doesn't really have to be a full INSN; it could be just the
4460 copy_insn_n_scratches = 0;
4461 orig_asm_operands_vector = 0;
4462 orig_asm_constraints_vector = 0;
4463 copy_asm_operands_vector = 0;
4464 copy_asm_constraints_vector = 0;
4465 return copy_insn_1 (insn);
4468 /* Initialize data structures and variables in this file
4469 before generating rtl for each function. */
4474 struct function *f = cfun;
4476 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4479 seq_rtl_expr = NULL;
4481 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4484 first_label_num = label_num;
4488 clear_emit_caches ();
4490 /* Init the tables that describe all the pseudo regs. */
4492 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4494 f->emit->regno_pointer_align
4495 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4496 sizeof (unsigned char));
4499 = (rtx *) xcalloc (f->emit->regno_pointer_align_length, sizeof (rtx));
4502 = (tree *) xcalloc (f->emit->regno_pointer_align_length, sizeof (tree));
4504 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4505 init_virtual_regs (f->emit);
4507 /* Indicate that the virtual registers and stack locations are
4509 REG_POINTER (stack_pointer_rtx) = 1;
4510 REG_POINTER (frame_pointer_rtx) = 1;
4511 REG_POINTER (hard_frame_pointer_rtx) = 1;
4512 REG_POINTER (arg_pointer_rtx) = 1;
4514 REG_POINTER (virtual_incoming_args_rtx) = 1;
4515 REG_POINTER (virtual_stack_vars_rtx) = 1;
4516 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4517 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4518 REG_POINTER (virtual_cfa_rtx) = 1;
4520 #ifdef STACK_BOUNDARY
4521 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4522 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4523 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4524 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4526 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4527 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4528 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4529 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4530 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4533 #ifdef INIT_EXPANDERS
4538 /* Mark SS for GC. */
4541 mark_sequence_stack (ss)
4542 struct sequence_stack *ss;
4546 ggc_mark_rtx (ss->first);
4547 ggc_mark_tree (ss->sequence_rtl_expr);
4552 /* Mark ES for GC. */
4555 mark_emit_status (es)
4556 struct emit_status *es;
4565 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx,
4567 i > 0; --i, ++r, ++t)
4573 mark_sequence_stack (es->sequence_stack);
4574 ggc_mark_tree (es->sequence_rtl_expr);
4575 ggc_mark_rtx (es->x_first_insn);
4578 /* Create some permanent unique rtl objects shared between all functions.
4579 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4582 init_emit_once (line_numbers)
4586 enum machine_mode mode;
4587 enum machine_mode double_mode;
4589 /* Initialize the CONST_INT and memory attribute hash tables. */
4590 const_int_htab = htab_create (37, const_int_htab_hash,
4591 const_int_htab_eq, NULL);
4592 ggc_add_deletable_htab (const_int_htab, 0, 0);
4594 mem_attrs_htab = htab_create (37, mem_attrs_htab_hash,
4595 mem_attrs_htab_eq, NULL);
4596 ggc_add_deletable_htab (mem_attrs_htab, 0, mem_attrs_mark);
4598 no_line_numbers = ! line_numbers;
4600 /* Compute the word and byte modes. */
4602 byte_mode = VOIDmode;
4603 word_mode = VOIDmode;
4604 double_mode = VOIDmode;
4606 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4607 mode = GET_MODE_WIDER_MODE (mode))
4609 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4610 && byte_mode == VOIDmode)
4613 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4614 && word_mode == VOIDmode)
4618 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4619 mode = GET_MODE_WIDER_MODE (mode))
4621 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4622 && double_mode == VOIDmode)
4626 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4628 /* Assign register numbers to the globally defined register rtx.
4629 This must be done at runtime because the register number field
4630 is in a union and some compilers can't initialize unions. */
4632 pc_rtx = gen_rtx (PC, VOIDmode);
4633 cc0_rtx = gen_rtx (CC0, VOIDmode);
4634 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4635 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4636 if (hard_frame_pointer_rtx == 0)
4637 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4638 HARD_FRAME_POINTER_REGNUM);
4639 if (arg_pointer_rtx == 0)
4640 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4641 virtual_incoming_args_rtx =
4642 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4643 virtual_stack_vars_rtx =
4644 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4645 virtual_stack_dynamic_rtx =
4646 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4647 virtual_outgoing_args_rtx =
4648 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4649 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4651 /* These rtx must be roots if GC is enabled. */
4652 ggc_add_rtx_root (global_rtl, GR_MAX);
4654 #ifdef INIT_EXPANDERS
4655 /* This is to initialize {init|mark|free}_machine_status before the first
4656 call to push_function_context_to. This is needed by the Chill front
4657 end which calls push_function_context_to before the first call to
4658 init_function_start. */
4662 /* Create the unique rtx's for certain rtx codes and operand values. */
4664 /* Don't use gen_rtx here since gen_rtx in this case
4665 tries to use these variables. */
4666 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4667 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4668 gen_rtx_raw_CONST_INT (VOIDmode, i);
4669 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4671 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4672 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4673 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4675 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4677 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4678 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4679 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4680 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4682 for (i = 0; i <= 2; i++)
4684 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4685 mode = GET_MODE_WIDER_MODE (mode))
4687 rtx tem = rtx_alloc (CONST_DOUBLE);
4688 union real_extract u;
4690 /* Zero any holes in a structure. */
4691 memset ((char *) &u, 0, sizeof u);
4692 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4694 /* Avoid trailing garbage in the rtx. */
4695 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4696 CONST_DOUBLE_LOW (tem) = 0;
4697 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4698 CONST_DOUBLE_HIGH (tem) = 0;
4700 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4701 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4702 PUT_MODE (tem, mode);
4704 const_tiny_rtx[i][(int) mode] = tem;
4707 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4709 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4710 mode = GET_MODE_WIDER_MODE (mode))
4711 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4713 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4715 mode = GET_MODE_WIDER_MODE (mode))
4716 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4719 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4720 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4721 const_tiny_rtx[0][i] = const0_rtx;
4723 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4724 if (STORE_FLAG_VALUE == 1)
4725 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4727 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4728 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4729 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4730 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4731 ggc_add_rtx_root (&const_true_rtx, 1);
4733 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4734 return_address_pointer_rtx
4735 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4739 struct_value_rtx = STRUCT_VALUE;
4741 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4744 #ifdef STRUCT_VALUE_INCOMING
4745 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4747 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4748 struct_value_incoming_rtx
4749 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4751 struct_value_incoming_rtx = struct_value_rtx;
4755 #ifdef STATIC_CHAIN_REGNUM
4756 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4758 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4759 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4760 static_chain_incoming_rtx
4761 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4764 static_chain_incoming_rtx = static_chain_rtx;
4768 static_chain_rtx = STATIC_CHAIN;
4770 #ifdef STATIC_CHAIN_INCOMING
4771 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4773 static_chain_incoming_rtx = static_chain_rtx;
4777 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4778 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4780 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4781 ggc_add_rtx_root (&struct_value_rtx, 1);
4782 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4783 ggc_add_rtx_root (&static_chain_rtx, 1);
4784 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4785 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4788 /* Query and clear/ restore no_line_numbers. This is used by the
4789 switch / case handling in stmt.c to give proper line numbers in
4790 warnings about unreachable code. */
4793 force_line_numbers ()
4795 int old = no_line_numbers;
4797 no_line_numbers = 0;
4799 force_next_line_note ();
4804 restore_line_number_status (old_value)
4807 no_line_numbers = old_value;