1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* Middle-to-low level generation of rtx code and insns.
23 This file contains the functions `gen_rtx', `gen_reg_rtx'
24 and `gen_label_rtx' that are the usual ways of creating rtl
25 expressions for most purposes.
27 It also has the functions for creating insns and linking
28 them in the doubly-linked chain.
30 The patterns of the insns are created by machine-dependent
31 routines in insn-emit.c, which is generated automatically from
32 the machine description. These routines use `gen_rtx' to make
33 the individual rtx's of the pattern; what is machine dependent
34 is the kind of rtx's they make and what arguments they use. */
48 #include "insn-config.h"
54 #include "bc-opcode.h"
55 #include "bc-typecd.h"
63 #ifdef BCDEBUG_PRINT_CODE
66 #include "bc-opname.h"
73 /* Commonly used modes. */
75 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT */
76 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD */
78 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
79 After rtl generation, it is 1 plus the largest register number used. */
81 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
83 /* This is *not* reset after each function. It gives each CODE_LABEL
84 in the entire compilation a unique label number. */
86 static int label_num = 1;
88 /* Lowest label number in current function. */
90 static int first_label_num;
92 /* Highest label number in current function.
93 Zero means use the value of label_num instead.
94 This is nonzero only when belatedly compiling an inline function. */
96 static int last_label_num;
98 /* Value label_num had when set_new_first_and_last_label_number was called.
99 If label_num has not changed since then, last_label_num is valid. */
101 static int base_label_num;
103 /* Nonzero means do not generate NOTEs for source line numbers. */
105 static int no_line_numbers;
107 /* Commonly used rtx's, so that we only need space for one copy.
108 These are initialized once for the entire compilation.
109 All of these except perhaps the floating-point CONST_DOUBLEs
110 are unique; no other rtx-object will be equal to any of these. */
112 rtx pc_rtx; /* (PC) */
113 rtx cc0_rtx; /* (CC0) */
114 rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
115 rtx const0_rtx; /* (CONST_INT 0) */
116 rtx const1_rtx; /* (CONST_INT 1) */
117 rtx const2_rtx; /* (CONST_INT 2) */
118 rtx constm1_rtx; /* (CONST_INT -1) */
119 rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
121 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
122 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
123 record a copy of const[012]_rtx. */
125 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
127 REAL_VALUE_TYPE dconst0;
128 REAL_VALUE_TYPE dconst1;
129 REAL_VALUE_TYPE dconst2;
130 REAL_VALUE_TYPE dconstm1;
132 /* All references to the following fixed hard registers go through
133 these unique rtl objects. On machines where the frame-pointer and
134 arg-pointer are the same register, they use the same unique object.
136 After register allocation, other rtl objects which used to be pseudo-regs
137 may be clobbered to refer to the frame-pointer register.
138 But references that were originally to the frame-pointer can be
139 distinguished from the others because they contain frame_pointer_rtx.
141 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
142 tricky: until register elimination has taken place hard_frame_pointer_rtx
143 should be used if it is being set, and frame_pointer_rtx otherwise. After
144 register elimination hard_frame_pointer_rtx should always be used.
145 On machines where the two registers are same (most) then these are the
148 In an inline procedure, the stack and frame pointer rtxs may not be
149 used for anything else. */
150 rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
151 rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
152 rtx hard_frame_pointer_rtx; /* (REG:Pmode HARD_FRAME_POINTER_REGNUM) */
153 rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
154 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
155 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
156 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
157 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
158 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
160 rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
161 rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
162 rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
163 rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
165 /* We make one copy of (const_int C) where C is in
166 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
167 to save space during the compilation and simplify comparisons of
170 #define MAX_SAVED_CONST_INT 64
172 static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
174 /* The ends of the doubly-linked chain of rtl for the current function.
175 Both are reset to null at the start of rtl generation for the function.
177 start_sequence saves both of these on `sequence_stack' along with
178 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
180 static rtx first_insn = NULL;
181 static rtx last_insn = NULL;
183 /* RTL_EXPR within which the current sequence will be placed. Use to
184 prevent reuse of any temporaries within the sequence until after the
185 RTL_EXPR is emitted. */
187 tree sequence_rtl_expr = NULL;
189 /* INSN_UID for next insn emitted.
190 Reset to 1 for each function compiled. */
192 static int cur_insn_uid = 1;
194 /* Line number and source file of the last line-number NOTE emitted.
195 This is used to avoid generating duplicates. */
197 static int last_linenum = 0;
198 static char *last_filename = 0;
200 /* A vector indexed by pseudo reg number. The allocated length
201 of this vector is regno_pointer_flag_length. Since this
202 vector is needed during the expansion phase when the total
203 number of registers in the function is not yet known,
204 it is copied and made bigger when necessary. */
206 char *regno_pointer_flag;
207 int regno_pointer_flag_length;
209 /* Indexed by pseudo register number, gives the rtx for that pseudo.
210 Allocated in parallel with regno_pointer_flag. */
214 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
215 Each element describes one pending sequence.
216 The main insn-chain is saved in the last element of the chain,
217 unless the chain is empty. */
219 struct sequence_stack *sequence_stack;
221 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
222 shortly thrown away. We use two mechanisms to prevent this waste:
224 First, we keep a list of the expressions used to represent the sequence
225 stack in sequence_element_free_list.
227 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
228 rtvec for use by gen_sequence. One entry for each size is sufficient
229 because most cases are calls to gen_sequence followed by immediately
230 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
231 destructive on the insn in it anyway and hence can't be redone.
233 We do not bother to save this cached data over nested function calls.
234 Instead, we just reinitialize them. */
236 #define SEQUENCE_RESULT_SIZE 5
238 static struct sequence_stack *sequence_element_free_list;
239 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
241 extern int rtx_equal_function_value_matters;
243 /* Filename and line number of last line-number note,
244 whether we actually emitted it or not. */
245 extern char *emit_filename;
246 extern int emit_lineno;
248 rtx change_address ();
251 extern struct obstack *rtl_obstack;
253 extern int stack_depth;
254 extern int max_stack_depth;
256 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
258 ** This routine generates an RTX of the size specified by
259 ** <code>, which is an RTX code. The RTX structure is initialized
260 ** from the arguments <element1> through <elementn>, which are
261 ** interpreted according to the specific RTX type's format. The
262 ** special machine mode associated with the rtx (if any) is specified
265 ** gen_rtx can be invoked in a way which resembles the lisp-like
266 ** rtx it will generate. For example, the following rtx structure:
268 ** (plus:QI (mem:QI (reg:SI 1))
269 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
271 ** ...would be generated by the following C code:
273 ** gen_rtx (PLUS, QImode,
274 ** gen_rtx (MEM, QImode,
275 ** gen_rtx (REG, SImode, 1)),
276 ** gen_rtx (MEM, QImode,
277 ** gen_rtx (PLUS, SImode,
278 ** gen_rtx (REG, SImode, 2),
279 ** gen_rtx (REG, SImode, 3)))),
284 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
288 enum machine_mode mode;
291 register int i; /* Array indices... */
292 register char *fmt; /* Current rtx's format... */
293 register rtx rt_val; /* RTX to return to caller... */
298 code = va_arg (p, enum rtx_code);
299 mode = va_arg (p, enum machine_mode);
302 if (code == CONST_INT)
304 HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT);
306 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
307 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
309 if (const_true_rtx && arg == STORE_FLAG_VALUE)
310 return const_true_rtx;
312 rt_val = rtx_alloc (code);
313 INTVAL (rt_val) = arg;
315 else if (code == REG)
317 int regno = va_arg (p, int);
319 /* In case the MD file explicitly references the frame pointer, have
320 all such references point to the same frame pointer. This is used
321 during frame pointer elimination to distinguish the explicit
322 references to these registers from pseudos that happened to be
325 If we have eliminated the frame pointer or arg pointer, we will
326 be using it as a normal register, for example as a spill register.
327 In such cases, we might be accessing it in a mode that is not
328 Pmode and therefore cannot use the pre-allocated rtx.
330 Also don't do this when we are making new REGs in reload,
331 since we don't want to get confused with the real pointers. */
333 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode
334 && ! reload_in_progress)
335 return frame_pointer_rtx;
336 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
337 if (hard_frame_pointer_rtx && regno == HARD_FRAME_POINTER_REGNUM
338 && mode == Pmode && ! reload_in_progress)
339 return hard_frame_pointer_rtx;
341 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
342 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode
343 && ! reload_in_progress)
344 return arg_pointer_rtx;
346 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode
347 && ! reload_in_progress)
348 return stack_pointer_rtx;
351 rt_val = rtx_alloc (code);
353 REGNO (rt_val) = regno;
359 rt_val = rtx_alloc (code); /* Allocate the storage space. */
360 rt_val->mode = mode; /* Store the machine mode... */
362 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
363 for (i = 0; i < GET_RTX_LENGTH (code); i++)
367 case '0': /* Unused field. */
370 case 'i': /* An integer? */
371 XINT (rt_val, i) = va_arg (p, int);
374 case 'w': /* A wide integer? */
375 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
378 case 's': /* A string? */
379 XSTR (rt_val, i) = va_arg (p, char *);
382 case 'e': /* An expression? */
383 case 'u': /* An insn? Same except when printing. */
384 XEXP (rt_val, i) = va_arg (p, rtx);
387 case 'E': /* An RTX vector? */
388 XVEC (rt_val, i) = va_arg (p, rtvec);
397 return rt_val; /* Return the new RTX... */
400 /* gen_rtvec (n, [rt1, ..., rtn])
402 ** This routine creates an rtvec and stores within it the
403 ** pointers to rtx's which are its arguments.
408 gen_rtvec VPROTO((int n, ...))
424 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
426 vector = (rtx *) alloca (n * sizeof (rtx));
428 for (i = 0; i < n; i++)
429 vector[i] = va_arg (p, rtx);
432 return gen_rtvec_v (n, vector);
436 gen_rtvec_v (n, argp)
441 register rtvec rt_val;
444 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
446 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
448 for (i = 0; i < n; i++)
449 rt_val->elem[i].rtx = *argp++;
454 /* Generate a REG rtx for a new pseudo register of mode MODE.
455 This pseudo is assigned the next sequential register number. */
459 enum machine_mode mode;
463 /* Don't let anything called by or after reload create new registers
464 (actually, registers can't be created after flow, but this is a good
467 if (reload_in_progress || reload_completed)
470 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
471 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
473 /* For complex modes, don't make a single pseudo.
474 Instead, make a CONCAT of two pseudos.
475 This allows noncontiguous allocation of the real and imaginary parts,
476 which makes much better code. Besides, allocating DCmode
477 pseudos overstrains reload on some machines like the 386. */
478 rtx realpart, imagpart;
479 int size = GET_MODE_UNIT_SIZE (mode);
480 enum machine_mode partmode
481 = mode_for_size (size * BITS_PER_UNIT,
482 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
483 ? MODE_FLOAT : MODE_INT),
486 realpart = gen_reg_rtx (partmode);
487 imagpart = gen_reg_rtx (partmode);
488 return gen_rtx (CONCAT, mode, realpart, imagpart);
491 /* Make sure regno_pointer_flag and regno_reg_rtx are large
492 enough to have an element for this pseudo reg number. */
494 if (reg_rtx_no == regno_pointer_flag_length)
498 (char *) oballoc (regno_pointer_flag_length * 2);
499 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
500 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
501 regno_pointer_flag = new;
503 new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx));
504 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
505 bzero (&new1[regno_pointer_flag_length],
506 regno_pointer_flag_length * sizeof (rtx));
507 regno_reg_rtx = new1;
509 regno_pointer_flag_length *= 2;
512 val = gen_rtx (REG, mode, reg_rtx_no);
513 regno_reg_rtx[reg_rtx_no++] = val;
517 /* Identify REG as a probable pointer register. */
520 mark_reg_pointer (reg)
523 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
526 /* Return 1 plus largest pseudo reg number used in the current function. */
534 /* Return 1 + the largest label number used so far in the current function. */
539 if (last_label_num && label_num == base_label_num)
540 return last_label_num;
544 /* Return first label number used in this function (if any were used). */
547 get_first_label_num ()
549 return first_label_num;
552 /* Return a value representing some low-order bits of X, where the number
553 of low-order bits is given by MODE. Note that no conversion is done
554 between floating-point and fixed-point values, rather, the bit
555 representation is returned.
557 This function handles the cases in common between gen_lowpart, below,
558 and two variants in cse.c and combine.c. These are the cases that can
559 be safely handled at all points in the compilation.
561 If this is not a case we can handle, return 0. */
564 gen_lowpart_common (mode, x)
565 enum machine_mode mode;
570 if (GET_MODE (x) == mode)
573 /* MODE must occupy no more words than the mode of X. */
574 if (GET_MODE (x) != VOIDmode
575 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
576 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
580 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
581 word = ((GET_MODE_SIZE (GET_MODE (x))
582 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
585 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
586 && (GET_MODE_CLASS (mode) == MODE_INT
587 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
589 /* If we are getting the low-order part of something that has been
590 sign- or zero-extended, we can either just use the object being
591 extended or make a narrower extension. If we want an even smaller
592 piece than the size of the object being extended, call ourselves
595 This case is used mostly by combine and cse. */
597 if (GET_MODE (XEXP (x, 0)) == mode)
599 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
600 return gen_lowpart_common (mode, XEXP (x, 0));
601 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
602 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
604 else if (GET_CODE (x) == SUBREG
605 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
606 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
607 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
609 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x)));
610 else if (GET_CODE (x) == REG)
612 /* If the register is not valid for MODE, return 0. If we don't
613 do this, there is no way to fix up the resulting REG later.
614 But we do do this if the current REG is not valid for its
615 mode. This latter is a kludge, but is required due to the
616 way that parameters are passed on some machines, most
618 if (REGNO (x) < FIRST_PSEUDO_REGISTER
619 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
620 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
622 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
623 /* integrate.c can't handle parts of a return value register. */
624 && (! REG_FUNCTION_VALUE_P (x)
625 || ! rtx_equal_function_value_matters)
626 /* We want to keep the stack, frame, and arg pointers
628 && REGNO (x) != FRAME_POINTER_REGNUM
629 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
630 && REGNO (x) != ARG_POINTER_REGNUM
632 && REGNO (x) != STACK_POINTER_REGNUM)
633 return gen_rtx (REG, mode, REGNO (x) + word);
635 return gen_rtx (SUBREG, mode, x, word);
637 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
638 from the low-order part of the constant. */
639 else if ((GET_MODE_CLASS (mode) == MODE_INT
640 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
641 && GET_MODE (x) == VOIDmode
642 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
644 /* If MODE is twice the host word size, X is already the desired
645 representation. Otherwise, if MODE is wider than a word, we can't
646 do this. If MODE is exactly a word, return just one CONST_INT.
647 If MODE is smaller than a word, clear the bits that don't belong
648 in our mode, unless they and our sign bit are all one. So we get
649 either a reasonable negative value or a reasonable unsigned value
652 if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT)
654 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
656 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
657 return (GET_CODE (x) == CONST_INT ? x
658 : GEN_INT (CONST_DOUBLE_LOW (x)));
661 /* MODE must be narrower than HOST_BITS_PER_INT. */
662 int width = GET_MODE_BITSIZE (mode);
663 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
664 : CONST_DOUBLE_LOW (x));
666 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
667 != ((HOST_WIDE_INT) (-1) << (width - 1))))
668 val &= ((HOST_WIDE_INT) 1 << width) - 1;
670 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
675 /* If X is an integral constant but we want it in floating-point, it
676 must be the case that we have a union of an integer and a floating-point
677 value. If the machine-parameters allow it, simulate that union here
678 and return the result. The two-word and single-word cases are
681 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
682 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
683 || flag_pretend_float)
684 && GET_MODE_CLASS (mode) == MODE_FLOAT
685 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
686 && GET_CODE (x) == CONST_INT
687 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
688 #ifdef REAL_ARITHMETIC
694 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
695 return immed_real_const_1 (r, mode);
699 union {HOST_WIDE_INT i; float d; } u;
702 return immed_real_const_1 (u.d, mode);
705 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
706 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
707 || flag_pretend_float)
708 && GET_MODE_CLASS (mode) == MODE_FLOAT
709 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
710 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
711 && GET_MODE (x) == VOIDmode
712 && (sizeof (double) * HOST_BITS_PER_CHAR
713 == 2 * HOST_BITS_PER_WIDE_INT))
714 #ifdef REAL_ARITHMETIC
718 HOST_WIDE_INT low, high;
720 if (GET_CODE (x) == CONST_INT)
721 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
723 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
725 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
727 if (WORDS_BIG_ENDIAN)
728 i[0] = high, i[1] = low;
730 i[0] = low, i[1] = high;
732 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
733 return immed_real_const_1 (r, mode);
737 union {HOST_WIDE_INT i[2]; double d; } u;
738 HOST_WIDE_INT low, high;
740 if (GET_CODE (x) == CONST_INT)
741 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
743 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
745 #ifdef HOST_WORDS_BIG_ENDIAN
746 u.i[0] = high, u.i[1] = low;
748 u.i[0] = low, u.i[1] = high;
751 return immed_real_const_1 (u.d, mode);
754 /* Similarly, if this is converting a floating-point value into a
755 single-word integer. Only do this is the host and target parameters are
758 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
759 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
760 || flag_pretend_float)
761 && (GET_MODE_CLASS (mode) == MODE_INT
762 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
763 && GET_CODE (x) == CONST_DOUBLE
764 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
765 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
766 return operand_subword (x, 0, 0, GET_MODE (x));
768 /* Similarly, if this is converting a floating-point value into a
769 two-word integer, we can do this one word at a time and make an
770 integer. Only do this is the host and target parameters are
773 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
774 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
775 || flag_pretend_float)
776 && (GET_MODE_CLASS (mode) == MODE_INT
777 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
778 && GET_CODE (x) == CONST_DOUBLE
779 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
780 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
782 rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x));
783 rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
785 if (lowpart && GET_CODE (lowpart) == CONST_INT
786 && highpart && GET_CODE (highpart) == CONST_INT)
787 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
790 /* Otherwise, we can't do this. */
794 /* Return the real part (which has mode MODE) of a complex value X.
795 This always comes at the low address in memory. */
798 gen_realpart (mode, x)
799 enum machine_mode mode;
802 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
804 else if (WORDS_BIG_ENDIAN)
805 return gen_highpart (mode, x);
807 return gen_lowpart (mode, x);
810 /* Return the imaginary part (which has mode MODE) of a complex value X.
811 This always comes at the high address in memory. */
814 gen_imagpart (mode, x)
815 enum machine_mode mode;
818 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
820 else if (WORDS_BIG_ENDIAN)
821 return gen_lowpart (mode, x);
823 return gen_highpart (mode, x);
826 /* Return 1 iff X, assumed to be a SUBREG,
827 refers to the real part of the complex value in its containing reg.
828 Complex values are always stored with the real part in the first word,
829 regardless of WORDS_BIG_ENDIAN. */
832 subreg_realpart_p (x)
835 if (GET_CODE (x) != SUBREG)
838 return SUBREG_WORD (x) == 0;
841 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
842 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
843 least-significant part of X.
844 MODE specifies how big a part of X to return;
845 it usually should not be larger than a word.
846 If X is a MEM whose address is a QUEUED, the value may be so also. */
849 gen_lowpart (mode, x)
850 enum machine_mode mode;
853 rtx result = gen_lowpart_common (mode, x);
857 else if (GET_CODE (x) == MEM)
859 /* The only additional case we can do is MEM. */
860 register int offset = 0;
861 if (WORDS_BIG_ENDIAN)
862 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
863 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
865 if (BYTES_BIG_ENDIAN)
866 /* Adjust the address so that the address-after-the-data
868 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
869 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
871 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
877 /* Like `gen_lowpart', but refer to the most significant part.
878 This is used to access the imaginary part of a complex number. */
881 gen_highpart (mode, x)
882 enum machine_mode mode;
885 /* This case loses if X is a subreg. To catch bugs early,
886 complain if an invalid MODE is used even in other cases. */
887 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
888 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
890 if (GET_CODE (x) == CONST_DOUBLE
891 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
892 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
895 return gen_rtx (CONST_INT, VOIDmode,
896 CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
897 else if (GET_CODE (x) == CONST_INT)
899 else if (GET_CODE (x) == MEM)
901 register int offset = 0;
902 if (! WORDS_BIG_ENDIAN)
903 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
904 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
906 if (! BYTES_BIG_ENDIAN
907 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
908 offset -= (GET_MODE_SIZE (mode)
909 - MIN (UNITS_PER_WORD,
910 GET_MODE_SIZE (GET_MODE (x))));
912 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
914 else if (GET_CODE (x) == SUBREG)
916 /* The only time this should occur is when we are looking at a
917 multi-word item with a SUBREG whose mode is the same as that of the
918 item. It isn't clear what we would do if it wasn't. */
919 if (SUBREG_WORD (x) != 0)
921 return gen_highpart (mode, SUBREG_REG (x));
923 else if (GET_CODE (x) == REG)
927 if (! WORDS_BIG_ENDIAN
928 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
929 word = ((GET_MODE_SIZE (GET_MODE (x))
930 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
933 if (REGNO (x) < FIRST_PSEUDO_REGISTER
934 /* integrate.c can't handle parts of a return value register. */
935 && (! REG_FUNCTION_VALUE_P (x)
936 || ! rtx_equal_function_value_matters)
937 /* We want to keep the stack, frame, and arg pointers special. */
938 && REGNO (x) != FRAME_POINTER_REGNUM
939 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
940 && REGNO (x) != ARG_POINTER_REGNUM
942 && REGNO (x) != STACK_POINTER_REGNUM)
943 return gen_rtx (REG, mode, REGNO (x) + word);
945 return gen_rtx (SUBREG, mode, x, word);
951 /* Return 1 iff X, assumed to be a SUBREG,
952 refers to the least significant part of its containing reg.
953 If X is not a SUBREG, always return 1 (it is its own low part!). */
959 if (GET_CODE (x) != SUBREG)
963 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
964 return (SUBREG_WORD (x)
965 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
966 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
969 return SUBREG_WORD (x) == 0;
972 /* Return subword I of operand OP.
973 The word number, I, is interpreted as the word number starting at the
974 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
975 otherwise it is the high-order word.
977 If we cannot extract the required word, we return zero. Otherwise, an
978 rtx corresponding to the requested word will be returned.
980 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
981 reload has completed, a valid address will always be returned. After
982 reload, if a valid address cannot be returned, we return zero.
984 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
985 it is the responsibility of the caller.
987 MODE is the mode of OP in case it is a CONST_INT. */
990 operand_subword (op, i, validate_address, mode)
993 int validate_address;
994 enum machine_mode mode;
997 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
999 if (mode == VOIDmode)
1000 mode = GET_MODE (op);
1002 if (mode == VOIDmode)
1005 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1007 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1008 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1011 /* If OP is already an integer word, return it. */
1012 if (GET_MODE_CLASS (mode) == MODE_INT
1013 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1016 /* If OP is a REG or SUBREG, we can handle it very simply. */
1017 if (GET_CODE (op) == REG)
1019 /* If the register is not valid for MODE, return 0. If we don't
1020 do this, there is no way to fix up the resulting REG later. */
1021 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1022 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1024 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1025 || (REG_FUNCTION_VALUE_P (op)
1026 && rtx_equal_function_value_matters)
1027 /* We want to keep the stack, frame, and arg pointers
1029 || REGNO (op) == FRAME_POINTER_REGNUM
1030 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1031 || REGNO (op) == ARG_POINTER_REGNUM
1033 || REGNO (op) == STACK_POINTER_REGNUM)
1034 return gen_rtx (SUBREG, word_mode, op, i);
1036 return gen_rtx (REG, word_mode, REGNO (op) + i);
1038 else if (GET_CODE (op) == SUBREG)
1039 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1040 else if (GET_CODE (op) == CONCAT)
1042 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1044 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1045 return operand_subword (XEXP (op, 1), i - partwords,
1046 validate_address, mode);
1049 /* Form a new MEM at the requested address. */
1050 if (GET_CODE (op) == MEM)
1052 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1055 if (validate_address)
1057 if (reload_completed)
1059 if (! strict_memory_address_p (word_mode, addr))
1063 addr = memory_address (word_mode, addr);
1066 new = gen_rtx (MEM, word_mode, addr);
1068 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1069 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1070 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1075 /* The only remaining cases are when OP is a constant. If the host and
1076 target floating formats are the same, handling two-word floating
1077 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1078 are defined as returning 32 bit and 64-bit values, respectively,
1079 and not values of BITS_PER_WORD and 2 * BITS_PER_WORD bits. */
1080 #ifdef REAL_ARITHMETIC
1081 if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1082 && GET_MODE_CLASS (mode) == MODE_FLOAT
1083 && GET_MODE_BITSIZE (mode) == 64
1084 && GET_CODE (op) == CONST_DOUBLE)
1089 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1090 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1092 /* We handle 32-bit and 64-bit host words here. Note that the order in
1093 which the words are written depends on the word endianness.
1095 ??? This is a potential portability problem and should
1096 be fixed at some point. */
1097 if (HOST_BITS_PER_WIDE_INT == 32)
1098 return GEN_INT (k[i]);
1099 else if (HOST_BITS_PER_WIDE_INT == 64 && i == 0)
1100 return GEN_INT ((k[! WORDS_BIG_ENDIAN] << (HOST_BITS_PER_WIDE_INT / 2))
1101 | k[WORDS_BIG_ENDIAN]);
1105 #else /* no REAL_ARITHMETIC */
1106 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1107 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1108 || flag_pretend_float)
1109 && GET_MODE_CLASS (mode) == MODE_FLOAT
1110 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1111 && GET_CODE (op) == CONST_DOUBLE)
1113 /* The constant is stored in the host's word-ordering,
1114 but we want to access it in the target's word-ordering. Some
1115 compilers don't like a conditional inside macro args, so we have two
1116 copies of the return. */
1117 #ifdef HOST_WORDS_BIG_ENDIAN
1118 return GEN_INT (i == WORDS_BIG_ENDIAN
1119 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1121 return GEN_INT (i != WORDS_BIG_ENDIAN
1122 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1125 #endif /* no REAL_ARITHMETIC */
1127 /* Single word float is a little harder, since single- and double-word
1128 values often do not have the same high-order bits. We have already
1129 verified that we want the only defined word of the single-word value. */
1130 #ifdef REAL_ARITHMETIC
1131 if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1132 && GET_MODE_CLASS (mode) == MODE_FLOAT
1133 && GET_MODE_BITSIZE (mode) == 32
1134 && GET_CODE (op) == CONST_DOUBLE)
1139 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1140 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1144 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1145 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1146 || flag_pretend_float)
1147 && GET_MODE_CLASS (mode) == MODE_FLOAT
1148 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1149 && GET_CODE (op) == CONST_DOUBLE)
1152 union {float f; HOST_WIDE_INT i; } u;
1154 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1157 return GEN_INT (u.i);
1159 #endif /* no REAL_ARITHMETIC */
1161 /* The only remaining cases that we can handle are integers.
1162 Convert to proper endianness now since these cases need it.
1163 At this point, i == 0 means the low-order word.
1165 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1166 in general. However, if OP is (const_int 0), we can just return
1169 if (op == const0_rtx)
1172 if (GET_MODE_CLASS (mode) != MODE_INT
1173 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1174 || BITS_PER_WORD > HOST_BITS_PER_INT)
1177 if (WORDS_BIG_ENDIAN)
1178 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1180 /* Find out which word on the host machine this value is in and get
1181 it from the constant. */
1182 val = (i / size_ratio == 0
1183 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1184 : (GET_CODE (op) == CONST_INT
1185 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1187 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
1188 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1189 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
1190 & (((HOST_WIDE_INT) 1
1191 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
1193 return GEN_INT (val);
1196 /* Similar to `operand_subword', but never return 0. If we can't extract
1197 the required subword, put OP into a register and try again. If that fails,
1198 abort. We always validate the address in this case. It is not valid
1199 to call this function after reload; it is mostly meant for RTL
1202 MODE is the mode of OP, in case it is CONST_INT. */
1205 operand_subword_force (op, i, mode)
1208 enum machine_mode mode;
1210 rtx result = operand_subword (op, i, 1, mode);
1215 if (mode != BLKmode && mode != VOIDmode)
1216 op = force_reg (mode, op);
1218 result = operand_subword (op, i, 1, mode);
1225 /* Given a compare instruction, swap the operands.
1226 A test instruction is changed into a compare of 0 against the operand. */
1229 reverse_comparison (insn)
1232 rtx body = PATTERN (insn);
1235 if (GET_CODE (body) == SET)
1236 comp = SET_SRC (body);
1238 comp = SET_SRC (XVECEXP (body, 0, 0));
1240 if (GET_CODE (comp) == COMPARE)
1242 rtx op0 = XEXP (comp, 0);
1243 rtx op1 = XEXP (comp, 1);
1244 XEXP (comp, 0) = op1;
1245 XEXP (comp, 1) = op0;
1249 rtx new = gen_rtx (COMPARE, VOIDmode,
1250 CONST0_RTX (GET_MODE (comp)), comp);
1251 if (GET_CODE (body) == SET)
1252 SET_SRC (body) = new;
1254 SET_SRC (XVECEXP (body, 0, 0)) = new;
1258 /* Return a memory reference like MEMREF, but with its mode changed
1259 to MODE and its address changed to ADDR.
1260 (VOIDmode means don't change the mode.
1261 NULL for ADDR means don't change the address.) */
1264 change_address (memref, mode, addr)
1266 enum machine_mode mode;
1271 if (GET_CODE (memref) != MEM)
1273 if (mode == VOIDmode)
1274 mode = GET_MODE (memref);
1276 addr = XEXP (memref, 0);
1278 /* If reload is in progress or has completed, ADDR must be valid.
1279 Otherwise, we can call memory_address to make it valid. */
1280 if (reload_completed || reload_in_progress)
1282 if (! memory_address_p (mode, addr))
1286 addr = memory_address (mode, addr);
1288 new = gen_rtx (MEM, mode, addr);
1289 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1290 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1291 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1295 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1302 label = (output_bytecode
1303 ? gen_rtx (CODE_LABEL, VOIDmode, NULL, bc_get_bytecode_label ())
1304 : gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0, label_num++, NULL_PTR));
1306 LABEL_NUSES (label) = 0;
1310 /* For procedure integration. */
1312 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1313 from a permanent obstack when the opportunity arises. */
1316 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1317 last_labelno, max_parm_regnum, max_regnum, args_size,
1318 pops_args, stack_slots, function_flags,
1319 outgoing_args_size, original_arg_vector,
1320 original_decl_initial)
1321 rtx first_insn, first_parm_insn;
1322 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1326 int outgoing_args_size;
1327 rtvec original_arg_vector;
1328 rtx original_decl_initial;
1330 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
1331 cur_insn_uid++, NULL_RTX,
1332 first_insn, first_parm_insn,
1333 first_labelno, last_labelno,
1334 max_parm_regnum, max_regnum, args_size, pops_args,
1335 stack_slots, function_flags, outgoing_args_size,
1336 original_arg_vector, original_decl_initial);
1340 /* Install new pointers to the first and last insns in the chain.
1341 Used for an inline-procedure after copying the insn chain. */
1344 set_new_first_and_last_insn (first, last)
1351 /* Set the range of label numbers found in the current function.
1352 This is used when belatedly compiling an inline function. */
1355 set_new_first_and_last_label_num (first, last)
1358 base_label_num = label_num;
1359 first_label_num = first;
1360 last_label_num = last;
1363 /* Save all variables describing the current status into the structure *P.
1364 This is used before starting a nested function. */
1367 save_emit_status (p)
1370 p->reg_rtx_no = reg_rtx_no;
1371 p->first_label_num = first_label_num;
1372 p->first_insn = first_insn;
1373 p->last_insn = last_insn;
1374 p->sequence_rtl_expr = sequence_rtl_expr;
1375 p->sequence_stack = sequence_stack;
1376 p->cur_insn_uid = cur_insn_uid;
1377 p->last_linenum = last_linenum;
1378 p->last_filename = last_filename;
1379 p->regno_pointer_flag = regno_pointer_flag;
1380 p->regno_pointer_flag_length = regno_pointer_flag_length;
1381 p->regno_reg_rtx = regno_reg_rtx;
1384 /* Restore all variables describing the current status from the structure *P.
1385 This is used after a nested function. */
1388 restore_emit_status (p)
1393 reg_rtx_no = p->reg_rtx_no;
1394 first_label_num = p->first_label_num;
1396 first_insn = p->first_insn;
1397 last_insn = p->last_insn;
1398 sequence_rtl_expr = p->sequence_rtl_expr;
1399 sequence_stack = p->sequence_stack;
1400 cur_insn_uid = p->cur_insn_uid;
1401 last_linenum = p->last_linenum;
1402 last_filename = p->last_filename;
1403 regno_pointer_flag = p->regno_pointer_flag;
1404 regno_pointer_flag_length = p->regno_pointer_flag_length;
1405 regno_reg_rtx = p->regno_reg_rtx;
1407 /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */
1408 sequence_element_free_list = 0;
1409 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1410 sequence_result[i] = 0;
1413 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1414 It does not work to do this twice, because the mark bits set here
1415 are not cleared afterwards. */
1418 unshare_all_rtl (insn)
1421 for (; insn; insn = NEXT_INSN (insn))
1422 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1423 || GET_CODE (insn) == CALL_INSN)
1425 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1426 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1427 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1430 /* Make sure the addresses of stack slots found outside the insn chain
1431 (such as, in DECL_RTL of a variable) are not shared
1432 with the insn chain.
1434 This special care is necessary when the stack slot MEM does not
1435 actually appear in the insn chain. If it does appear, its address
1436 is unshared from all else at that point. */
1438 copy_rtx_if_shared (stack_slot_list);
1441 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1442 Recursively does the same for subexpressions. */
1445 copy_rtx_if_shared (orig)
1448 register rtx x = orig;
1450 register enum rtx_code code;
1451 register char *format_ptr;
1457 code = GET_CODE (x);
1459 /* These types may be freely shared. */
1472 /* SCRATCH must be shared because they represent distinct values. */
1476 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1477 a LABEL_REF, it isn't sharable. */
1478 if (GET_CODE (XEXP (x, 0)) == PLUS
1479 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1480 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1490 /* The chain of insns is not being copied. */
1494 /* A MEM is allowed to be shared if its address is constant
1495 or is a constant plus one of the special registers. */
1496 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1497 || XEXP (x, 0) == virtual_stack_vars_rtx
1498 || XEXP (x, 0) == virtual_incoming_args_rtx)
1501 if (GET_CODE (XEXP (x, 0)) == PLUS
1502 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1503 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1504 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1506 /* This MEM can appear in more than one place,
1507 but its address better not be shared with anything else. */
1509 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1515 /* This rtx may not be shared. If it has already been seen,
1516 replace it with a copy of itself. */
1522 copy = rtx_alloc (code);
1523 bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld)
1524 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1530 /* Now scan the subexpressions recursively.
1531 We can store any replaced subexpressions directly into X
1532 since we know X is not shared! Any vectors in X
1533 must be copied if X was copied. */
1535 format_ptr = GET_RTX_FORMAT (code);
1537 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1539 switch (*format_ptr++)
1542 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1546 if (XVEC (x, i) != NULL)
1549 int len = XVECLEN (x, i);
1551 if (copied && len > 0)
1552 XVEC (x, i) = gen_rtvec_v (len, &XVECEXP (x, i, 0));
1553 for (j = 0; j < len; j++)
1554 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1562 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1563 to look for shared sub-parts. */
1566 reset_used_flags (x)
1570 register enum rtx_code code;
1571 register char *format_ptr;
1577 code = GET_CODE (x);
1579 /* These types may be freely shared so we needn't do any reseting
1600 /* The chain of insns is not being copied. */
1606 format_ptr = GET_RTX_FORMAT (code);
1607 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1609 switch (*format_ptr++)
1612 reset_used_flags (XEXP (x, i));
1616 for (j = 0; j < XVECLEN (x, i); j++)
1617 reset_used_flags (XVECEXP (x, i, j));
1623 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1624 Return X or the rtx for the pseudo reg the value of X was copied into.
1625 OTHER must be valid as a SET_DEST. */
1628 make_safe_from (x, other)
1632 switch (GET_CODE (other))
1635 other = SUBREG_REG (other);
1637 case STRICT_LOW_PART:
1640 other = XEXP (other, 0);
1646 if ((GET_CODE (other) == MEM
1648 && GET_CODE (x) != REG
1649 && GET_CODE (x) != SUBREG)
1650 || (GET_CODE (other) == REG
1651 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1652 || reg_mentioned_p (other, x))))
1654 rtx temp = gen_reg_rtx (GET_MODE (x));
1655 emit_move_insn (temp, x);
1661 /* Emission of insns (adding them to the doubly-linked list). */
1663 /* Return the first insn of the current sequence or current function. */
1671 /* Return the last insn emitted in current sequence or current function. */
1679 /* Specify a new insn as the last in the chain. */
1682 set_last_insn (insn)
1685 if (NEXT_INSN (insn) != 0)
1690 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1693 get_last_insn_anywhere ()
1695 struct sequence_stack *stack;
1698 for (stack = sequence_stack; stack; stack = stack->next)
1699 if (stack->last != 0)
1704 /* Return a number larger than any instruction's uid in this function. */
1709 return cur_insn_uid;
1712 /* Return the next insn. If it is a SEQUENCE, return the first insn
1721 insn = NEXT_INSN (insn);
1722 if (insn && GET_CODE (insn) == INSN
1723 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1724 insn = XVECEXP (PATTERN (insn), 0, 0);
1730 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1734 previous_insn (insn)
1739 insn = PREV_INSN (insn);
1740 if (insn && GET_CODE (insn) == INSN
1741 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1742 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1748 /* Return the next insn after INSN that is not a NOTE. This routine does not
1749 look inside SEQUENCEs. */
1752 next_nonnote_insn (insn)
1757 insn = NEXT_INSN (insn);
1758 if (insn == 0 || GET_CODE (insn) != NOTE)
1765 /* Return the previous insn before INSN that is not a NOTE. This routine does
1766 not look inside SEQUENCEs. */
1769 prev_nonnote_insn (insn)
1774 insn = PREV_INSN (insn);
1775 if (insn == 0 || GET_CODE (insn) != NOTE)
1782 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1783 or 0, if there is none. This routine does not look inside
1787 next_real_insn (insn)
1792 insn = NEXT_INSN (insn);
1793 if (insn == 0 || GET_CODE (insn) == INSN
1794 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1801 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1802 or 0, if there is none. This routine does not look inside
1806 prev_real_insn (insn)
1811 insn = PREV_INSN (insn);
1812 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1813 || GET_CODE (insn) == JUMP_INSN)
1820 /* Find the next insn after INSN that really does something. This routine
1821 does not look inside SEQUENCEs. Until reload has completed, this is the
1822 same as next_real_insn. */
1825 next_active_insn (insn)
1830 insn = NEXT_INSN (insn);
1832 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1833 || (GET_CODE (insn) == INSN
1834 && (! reload_completed
1835 || (GET_CODE (PATTERN (insn)) != USE
1836 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1843 /* Find the last insn before INSN that really does something. This routine
1844 does not look inside SEQUENCEs. Until reload has completed, this is the
1845 same as prev_real_insn. */
1848 prev_active_insn (insn)
1853 insn = PREV_INSN (insn);
1855 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1856 || (GET_CODE (insn) == INSN
1857 && (! reload_completed
1858 || (GET_CODE (PATTERN (insn)) != USE
1859 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1866 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1874 insn = NEXT_INSN (insn);
1875 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1882 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1890 insn = PREV_INSN (insn);
1891 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1899 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
1900 and REG_CC_USER notes so we can find it. */
1903 link_cc0_insns (insn)
1906 rtx user = next_nonnote_insn (insn);
1908 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
1909 user = XVECEXP (PATTERN (user), 0, 0);
1911 REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn,
1913 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn));
1916 /* Return the next insn that uses CC0 after INSN, which is assumed to
1917 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
1918 applied to the result of this function should yield INSN).
1920 Normally, this is simply the next insn. However, if a REG_CC_USER note
1921 is present, it contains the insn that uses CC0.
1923 Return 0 if we can't find the insn. */
1926 next_cc0_user (insn)
1929 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
1932 return XEXP (note, 0);
1934 insn = next_nonnote_insn (insn);
1935 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
1936 insn = XVECEXP (PATTERN (insn), 0, 0);
1938 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1939 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
1945 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
1946 note, it is the previous insn. */
1949 prev_cc0_setter (insn)
1952 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1956 return XEXP (note, 0);
1958 insn = prev_nonnote_insn (insn);
1959 if (! sets_cc0_p (PATTERN (insn)))
1966 /* Try splitting insns that can be split for better scheduling.
1967 PAT is the pattern which might split.
1968 TRIAL is the insn providing PAT.
1969 BACKWARDS is non-zero if we are scanning insns from last to first.
1971 If this routine succeeds in splitting, it returns the first or last
1972 replacement insn depending on the value of BACKWARDS. Otherwise, it
1973 returns TRIAL. If the insn to be returned can be split, it will be. */
1976 try_split (pat, trial, backwards)
1980 rtx before = PREV_INSN (trial);
1981 rtx after = NEXT_INSN (trial);
1982 rtx seq = split_insns (pat, trial);
1983 int has_barrier = 0;
1986 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
1987 We may need to handle this specially. */
1988 if (after && GET_CODE (after) == BARRIER)
1991 after = NEXT_INSN (after);
1996 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
1997 The latter case will normally arise only when being done so that
1998 it, in turn, will be split (SFmode on the 29k is an example). */
1999 if (GET_CODE (seq) == SEQUENCE)
2001 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2002 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2003 increment the usage count so we don't delete the label. */
2006 if (GET_CODE (trial) == JUMP_INSN)
2007 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2008 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2010 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2012 if (JUMP_LABEL (trial))
2013 LABEL_NUSES (JUMP_LABEL (trial))++;
2016 tem = emit_insn_after (seq, before);
2018 delete_insn (trial);
2020 emit_barrier_after (tem);
2022 /* Avoid infinite loop if the result matches the original pattern. */
2023 else if (rtx_equal_p (seq, pat))
2027 PATTERN (trial) = seq;
2028 INSN_CODE (trial) = -1;
2031 /* Set TEM to the insn we should return. */
2032 tem = backwards ? prev_active_insn (after) : next_active_insn (before);
2033 return try_split (PATTERN (tem), tem, backwards);
2039 /* Make and return an INSN rtx, initializing all its slots.
2040 Store PATTERN in the pattern slots. */
2043 make_insn_raw (pattern)
2048 insn = rtx_alloc (INSN);
2049 INSN_UID (insn) = cur_insn_uid++;
2051 PATTERN (insn) = pattern;
2052 INSN_CODE (insn) = -1;
2053 LOG_LINKS (insn) = NULL;
2054 REG_NOTES (insn) = NULL;
2059 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2062 make_jump_insn_raw (pattern)
2067 insn = rtx_alloc (JUMP_INSN);
2068 INSN_UID (insn) = cur_insn_uid++;
2070 PATTERN (insn) = pattern;
2071 INSN_CODE (insn) = -1;
2072 LOG_LINKS (insn) = NULL;
2073 REG_NOTES (insn) = NULL;
2074 JUMP_LABEL (insn) = NULL;
2079 /* Add INSN to the end of the doubly-linked list.
2080 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2086 PREV_INSN (insn) = last_insn;
2087 NEXT_INSN (insn) = 0;
2089 if (NULL != last_insn)
2090 NEXT_INSN (last_insn) = insn;
2092 if (NULL == first_insn)
2098 /* Add INSN into the doubly-linked list after insn AFTER. This should be the
2099 only function called to insert an insn once delay slots have been filled
2100 since only it knows how to update a SEQUENCE. */
2103 add_insn_after (insn, after)
2106 rtx next = NEXT_INSN (after);
2108 NEXT_INSN (insn) = next;
2109 PREV_INSN (insn) = after;
2113 PREV_INSN (next) = insn;
2114 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2115 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2117 else if (last_insn == after)
2121 struct sequence_stack *stack = sequence_stack;
2122 /* Scan all pending sequences too. */
2123 for (; stack; stack = stack->next)
2124 if (after == stack->last)
2128 NEXT_INSN (after) = insn;
2129 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2131 rtx sequence = PATTERN (after);
2132 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2136 /* Delete all insns made since FROM.
2137 FROM becomes the new last instruction. */
2140 delete_insns_since (from)
2146 NEXT_INSN (from) = 0;
2150 /* Move a consecutive bunch of insns to a different place in the chain.
2151 The insns to be moved are those between FROM and TO.
2152 They are moved to a new position after the insn AFTER.
2153 AFTER must not be FROM or TO or any insn in between.
2155 This function does not know about SEQUENCEs and hence should not be
2156 called after delay-slot filling has been done. */
2159 reorder_insns (from, to, after)
2160 rtx from, to, after;
2162 /* Splice this bunch out of where it is now. */
2163 if (PREV_INSN (from))
2164 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2166 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2167 if (last_insn == to)
2168 last_insn = PREV_INSN (from);
2169 if (first_insn == from)
2170 first_insn = NEXT_INSN (to);
2172 /* Make the new neighbors point to it and it to them. */
2173 if (NEXT_INSN (after))
2174 PREV_INSN (NEXT_INSN (after)) = to;
2176 NEXT_INSN (to) = NEXT_INSN (after);
2177 PREV_INSN (from) = after;
2178 NEXT_INSN (after) = from;
2179 if (after == last_insn)
2183 /* Return the line note insn preceding INSN. */
2186 find_line_note (insn)
2189 if (no_line_numbers)
2192 for (; insn; insn = PREV_INSN (insn))
2193 if (GET_CODE (insn) == NOTE
2194 && NOTE_LINE_NUMBER (insn) >= 0)
2200 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2201 of the moved insns when debugging. This may insert a note between AFTER
2202 and FROM, and another one after TO. */
2205 reorder_insns_with_line_notes (from, to, after)
2206 rtx from, to, after;
2208 rtx from_line = find_line_note (from);
2209 rtx after_line = find_line_note (after);
2211 reorder_insns (from, to, after);
2213 if (from_line == after_line)
2217 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2218 NOTE_LINE_NUMBER (from_line),
2221 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2222 NOTE_LINE_NUMBER (after_line),
2226 /* Emit an insn of given code and pattern
2227 at a specified place within the doubly-linked list. */
2229 /* Make an instruction with body PATTERN
2230 and output it before the instruction BEFORE. */
2233 emit_insn_before (pattern, before)
2234 register rtx pattern, before;
2236 register rtx insn = before;
2238 if (GET_CODE (pattern) == SEQUENCE)
2242 for (i = 0; i < XVECLEN (pattern, 0); i++)
2244 insn = XVECEXP (pattern, 0, i);
2245 add_insn_after (insn, PREV_INSN (before));
2247 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2248 sequence_result[XVECLEN (pattern, 0)] = pattern;
2252 insn = make_insn_raw (pattern);
2253 add_insn_after (insn, PREV_INSN (before));
2259 /* Make an instruction with body PATTERN and code JUMP_INSN
2260 and output it before the instruction BEFORE. */
2263 emit_jump_insn_before (pattern, before)
2264 register rtx pattern, before;
2268 if (GET_CODE (pattern) == SEQUENCE)
2269 insn = emit_insn_before (pattern, before);
2272 insn = make_jump_insn_raw (pattern);
2273 add_insn_after (insn, PREV_INSN (before));
2279 /* Make an instruction with body PATTERN and code CALL_INSN
2280 and output it before the instruction BEFORE. */
2283 emit_call_insn_before (pattern, before)
2284 register rtx pattern, before;
2286 rtx insn = emit_insn_before (pattern, before);
2287 PUT_CODE (insn, CALL_INSN);
2291 /* Make an insn of code BARRIER
2292 and output it before the insn AFTER. */
2295 emit_barrier_before (before)
2296 register rtx before;
2298 register rtx insn = rtx_alloc (BARRIER);
2300 INSN_UID (insn) = cur_insn_uid++;
2302 add_insn_after (insn, PREV_INSN (before));
2306 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2309 emit_note_before (subtype, before)
2313 register rtx note = rtx_alloc (NOTE);
2314 INSN_UID (note) = cur_insn_uid++;
2315 NOTE_SOURCE_FILE (note) = 0;
2316 NOTE_LINE_NUMBER (note) = subtype;
2318 add_insn_after (note, PREV_INSN (before));
2322 /* Make an insn of code INSN with body PATTERN
2323 and output it after the insn AFTER. */
2326 emit_insn_after (pattern, after)
2327 register rtx pattern, after;
2329 register rtx insn = after;
2331 if (GET_CODE (pattern) == SEQUENCE)
2335 for (i = 0; i < XVECLEN (pattern, 0); i++)
2337 insn = XVECEXP (pattern, 0, i);
2338 add_insn_after (insn, after);
2341 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2342 sequence_result[XVECLEN (pattern, 0)] = pattern;
2346 insn = make_insn_raw (pattern);
2347 add_insn_after (insn, after);
2353 /* Similar to emit_insn_after, except that line notes are to be inserted so
2354 as to act as if this insn were at FROM. */
2357 emit_insn_after_with_line_notes (pattern, after, from)
2358 rtx pattern, after, from;
2360 rtx from_line = find_line_note (from);
2361 rtx after_line = find_line_note (after);
2362 rtx insn = emit_insn_after (pattern, after);
2365 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2366 NOTE_LINE_NUMBER (from_line),
2370 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2371 NOTE_LINE_NUMBER (after_line),
2375 /* Make an insn of code JUMP_INSN with body PATTERN
2376 and output it after the insn AFTER. */
2379 emit_jump_insn_after (pattern, after)
2380 register rtx pattern, after;
2384 if (GET_CODE (pattern) == SEQUENCE)
2385 insn = emit_insn_after (pattern, after);
2388 insn = make_jump_insn_raw (pattern);
2389 add_insn_after (insn, after);
2395 /* Make an insn of code BARRIER
2396 and output it after the insn AFTER. */
2399 emit_barrier_after (after)
2402 register rtx insn = rtx_alloc (BARRIER);
2404 INSN_UID (insn) = cur_insn_uid++;
2406 add_insn_after (insn, after);
2410 /* Emit the label LABEL after the insn AFTER. */
2413 emit_label_after (label, after)
2416 /* This can be called twice for the same label
2417 as a result of the confusion that follows a syntax error!
2418 So make it harmless. */
2419 if (INSN_UID (label) == 0)
2421 INSN_UID (label) = cur_insn_uid++;
2422 add_insn_after (label, after);
2428 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2431 emit_note_after (subtype, after)
2435 register rtx note = rtx_alloc (NOTE);
2436 INSN_UID (note) = cur_insn_uid++;
2437 NOTE_SOURCE_FILE (note) = 0;
2438 NOTE_LINE_NUMBER (note) = subtype;
2439 add_insn_after (note, after);
2443 /* Emit a line note for FILE and LINE after the insn AFTER. */
2446 emit_line_note_after (file, line, after)
2453 if (no_line_numbers && line > 0)
2459 note = rtx_alloc (NOTE);
2460 INSN_UID (note) = cur_insn_uid++;
2461 NOTE_SOURCE_FILE (note) = file;
2462 NOTE_LINE_NUMBER (note) = line;
2463 add_insn_after (note, after);
2467 /* Make an insn of code INSN with pattern PATTERN
2468 and add it to the end of the doubly-linked list.
2469 If PATTERN is a SEQUENCE, take the elements of it
2470 and emit an insn for each element.
2472 Returns the last insn emitted. */
2478 rtx insn = last_insn;
2480 if (GET_CODE (pattern) == SEQUENCE)
2484 for (i = 0; i < XVECLEN (pattern, 0); i++)
2486 insn = XVECEXP (pattern, 0, i);
2489 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2490 sequence_result[XVECLEN (pattern, 0)] = pattern;
2494 insn = make_insn_raw (pattern);
2501 /* Emit the insns in a chain starting with INSN.
2502 Return the last insn emitted. */
2512 rtx next = NEXT_INSN (insn);
2521 /* Emit the insns in a chain starting with INSN and place them in front of
2522 the insn BEFORE. Return the last insn emitted. */
2525 emit_insns_before (insn, before)
2533 rtx next = NEXT_INSN (insn);
2534 add_insn_after (insn, PREV_INSN (before));
2542 /* Emit the insns in a chain starting with FIRST and place them in back of
2543 the insn AFTER. Return the last insn emitted. */
2546 emit_insns_after (first, after)
2551 register rtx after_after;
2559 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2562 after_after = NEXT_INSN (after);
2564 NEXT_INSN (after) = first;
2565 PREV_INSN (first) = after;
2566 NEXT_INSN (last) = after_after;
2568 PREV_INSN (after_after) = last;
2570 if (after == last_insn)
2575 /* Make an insn of code JUMP_INSN with pattern PATTERN
2576 and add it to the end of the doubly-linked list. */
2579 emit_jump_insn (pattern)
2582 if (GET_CODE (pattern) == SEQUENCE)
2583 return emit_insn (pattern);
2586 register rtx insn = make_jump_insn_raw (pattern);
2592 /* Make an insn of code CALL_INSN with pattern PATTERN
2593 and add it to the end of the doubly-linked list. */
2596 emit_call_insn (pattern)
2599 if (GET_CODE (pattern) == SEQUENCE)
2600 return emit_insn (pattern);
2603 register rtx insn = make_insn_raw (pattern);
2605 PUT_CODE (insn, CALL_INSN);
2610 /* Add the label LABEL to the end of the doubly-linked list. */
2616 /* This can be called twice for the same label
2617 as a result of the confusion that follows a syntax error!
2618 So make it harmless. */
2619 if (INSN_UID (label) == 0)
2621 INSN_UID (label) = cur_insn_uid++;
2627 /* Make an insn of code BARRIER
2628 and add it to the end of the doubly-linked list. */
2633 register rtx barrier = rtx_alloc (BARRIER);
2634 INSN_UID (barrier) = cur_insn_uid++;
2639 /* Make an insn of code NOTE
2640 with data-fields specified by FILE and LINE
2641 and add it to the end of the doubly-linked list,
2642 but only if line-numbers are desired for debugging info. */
2645 emit_line_note (file, line)
2649 if (output_bytecode)
2651 /* FIXME: for now we do nothing, but eventually we will have to deal with
2652 debugging information. */
2656 emit_filename = file;
2660 if (no_line_numbers)
2664 return emit_note (file, line);
2667 /* Make an insn of code NOTE
2668 with data-fields specified by FILE and LINE
2669 and add it to the end of the doubly-linked list.
2670 If it is a line-number NOTE, omit it if it matches the previous one. */
2673 emit_note (file, line)
2681 if (file && last_filename && !strcmp (file, last_filename)
2682 && line == last_linenum)
2684 last_filename = file;
2685 last_linenum = line;
2688 if (no_line_numbers && line > 0)
2694 note = rtx_alloc (NOTE);
2695 INSN_UID (note) = cur_insn_uid++;
2696 NOTE_SOURCE_FILE (note) = file;
2697 NOTE_LINE_NUMBER (note) = line;
2702 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2705 emit_line_note_force (file, line)
2710 return emit_line_note (file, line);
2713 /* Cause next statement to emit a line note even if the line number
2714 has not changed. This is used at the beginning of a function. */
2717 force_next_line_note ()
2722 /* Return an indication of which type of insn should have X as a body.
2723 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2729 if (GET_CODE (x) == CODE_LABEL)
2731 if (GET_CODE (x) == CALL)
2733 if (GET_CODE (x) == RETURN)
2735 if (GET_CODE (x) == SET)
2737 if (SET_DEST (x) == pc_rtx)
2739 else if (GET_CODE (SET_SRC (x)) == CALL)
2744 if (GET_CODE (x) == PARALLEL)
2747 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
2748 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
2750 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2751 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
2753 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2754 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
2760 /* Emit the rtl pattern X as an appropriate kind of insn.
2761 If X is a label, it is simply added into the insn chain. */
2767 enum rtx_code code = classify_insn (x);
2769 if (code == CODE_LABEL)
2770 return emit_label (x);
2771 else if (code == INSN)
2772 return emit_insn (x);
2773 else if (code == JUMP_INSN)
2775 register rtx insn = emit_jump_insn (x);
2776 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
2777 return emit_barrier ();
2780 else if (code == CALL_INSN)
2781 return emit_call_insn (x);
2786 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2791 struct sequence_stack *tem;
2793 if (sequence_element_free_list)
2795 /* Reuse a previously-saved struct sequence_stack. */
2796 tem = sequence_element_free_list;
2797 sequence_element_free_list = tem->next;
2800 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
2802 tem->next = sequence_stack;
2803 tem->first = first_insn;
2804 tem->last = last_insn;
2805 tem->sequence_rtl_expr = sequence_rtl_expr;
2807 sequence_stack = tem;
2813 /* Similarly, but indicate that this sequence will be placed in
2817 start_sequence_for_rtl_expr (t)
2822 sequence_rtl_expr = t;
2825 /* Set up the insn chain starting with FIRST
2826 as the current sequence, saving the previously current one. */
2829 push_to_sequence (first)
2836 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
2842 /* Set up the outer-level insn chain
2843 as the current sequence, saving the previously current one. */
2846 push_topmost_sequence ()
2848 struct sequence_stack *stack, *top;
2852 for (stack = sequence_stack; stack; stack = stack->next)
2855 first_insn = top->first;
2856 last_insn = top->last;
2857 sequence_rtl_expr = top->sequence_rtl_expr;
2860 /* After emitting to the outer-level insn chain, update the outer-level
2861 insn chain, and restore the previous saved state. */
2864 pop_topmost_sequence ()
2866 struct sequence_stack *stack, *top;
2868 for (stack = sequence_stack; stack; stack = stack->next)
2871 top->first = first_insn;
2872 top->last = last_insn;
2873 /* ??? Why don't we save sequence_rtl_expr here? */
2878 /* After emitting to a sequence, restore previous saved state.
2880 To get the contents of the sequence just made,
2881 you must call `gen_sequence' *before* calling here. */
2886 struct sequence_stack *tem = sequence_stack;
2888 first_insn = tem->first;
2889 last_insn = tem->last;
2890 sequence_rtl_expr = tem->sequence_rtl_expr;
2891 sequence_stack = tem->next;
2893 tem->next = sequence_element_free_list;
2894 sequence_element_free_list = tem;
2897 /* Return 1 if currently emitting into a sequence. */
2902 return sequence_stack != 0;
2905 /* Generate a SEQUENCE rtx containing the insns already emitted
2906 to the current sequence.
2908 This is how the gen_... function from a DEFINE_EXPAND
2909 constructs the SEQUENCE that it returns. */
2920 /* Count the insns in the chain. */
2922 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
2925 /* If only one insn, return its pattern rather than a SEQUENCE.
2926 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
2927 the case of an empty list.) */
2929 && (GET_CODE (first_insn) == INSN
2930 || GET_CODE (first_insn) == JUMP_INSN
2931 || GET_CODE (first_insn) == CALL_INSN))
2932 return PATTERN (first_insn);
2934 /* Put them in a vector. See if we already have a SEQUENCE of the
2935 appropriate length around. */
2936 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
2937 sequence_result[len] = 0;
2940 /* Ensure that this rtl goes in saveable_obstack, since we may be
2942 push_obstacks_nochange ();
2943 rtl_in_saveable_obstack ();
2944 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
2948 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
2949 XVECEXP (result, 0, i) = tem;
2954 /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag
2955 according to the chain of insns starting with FIRST.
2957 Also set cur_insn_uid to exceed the largest uid in that chain.
2959 This is used when an inline function's rtl is saved
2960 and passed to rest_of_compilation later. */
2962 static void restore_reg_data_1 ();
2965 restore_reg_data (first)
2970 register int max_uid = 0;
2972 for (insn = first; insn; insn = NEXT_INSN (insn))
2974 if (INSN_UID (insn) >= max_uid)
2975 max_uid = INSN_UID (insn);
2977 switch (GET_CODE (insn))
2987 restore_reg_data_1 (PATTERN (insn));
2992 /* Don't duplicate the uids already in use. */
2993 cur_insn_uid = max_uid + 1;
2995 /* If any regs are missing, make them up.
2997 ??? word_mode is not necessarily the right mode. Most likely these REGs
2998 are never used. At some point this should be checked. */
3000 for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++)
3001 if (regno_reg_rtx[i] == 0)
3002 regno_reg_rtx[i] = gen_rtx (REG, word_mode, i);
3006 restore_reg_data_1 (orig)
3009 register rtx x = orig;
3011 register enum rtx_code code;
3012 register char *format_ptr;
3014 code = GET_CODE (x);
3029 if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
3031 /* Make sure regno_pointer_flag and regno_reg_rtx are large
3032 enough to have an element for this pseudo reg number. */
3033 if (REGNO (x) >= reg_rtx_no)
3035 reg_rtx_no = REGNO (x);
3037 if (reg_rtx_no >= regno_pointer_flag_length)
3039 int newlen = MAX (regno_pointer_flag_length * 2,
3042 char *new = (char *) oballoc (newlen);
3043 bzero (new, newlen);
3044 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
3046 new1 = (rtx *) oballoc (newlen * sizeof (rtx));
3047 bzero (new1, newlen * sizeof (rtx));
3048 bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx));
3050 regno_pointer_flag = new;
3051 regno_reg_rtx = new1;
3052 regno_pointer_flag_length = newlen;
3056 regno_reg_rtx[REGNO (x)] = x;
3061 if (GET_CODE (XEXP (x, 0)) == REG)
3062 mark_reg_pointer (XEXP (x, 0));
3063 restore_reg_data_1 (XEXP (x, 0));
3067 /* Now scan the subexpressions recursively. */
3069 format_ptr = GET_RTX_FORMAT (code);
3071 for (i = 0; i < GET_RTX_LENGTH (code); i++)
3073 switch (*format_ptr++)
3076 restore_reg_data_1 (XEXP (x, i));
3080 if (XVEC (x, i) != NULL)
3084 for (j = 0; j < XVECLEN (x, i); j++)
3085 restore_reg_data_1 (XVECEXP (x, i, j));
3092 /* Initialize data structures and variables in this file
3093 before generating rtl for each function. */
3102 sequence_rtl_expr = NULL;
3104 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3107 first_label_num = label_num;
3109 sequence_stack = NULL;
3111 /* Clear the start_sequence/gen_sequence cache. */
3112 sequence_element_free_list = 0;
3113 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3114 sequence_result[i] = 0;
3116 /* Init the tables that describe all the pseudo regs. */
3118 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3121 = (char *) oballoc (regno_pointer_flag_length);
3122 bzero (regno_pointer_flag, regno_pointer_flag_length);
3125 = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx));
3126 bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3128 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3129 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3130 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3131 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3132 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3134 /* Indicate that the virtual registers and stack locations are
3136 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3137 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3138 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3140 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3141 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3142 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3143 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3145 #ifdef INIT_EXPANDERS
3150 /* Create some permanent unique rtl objects shared between all functions.
3151 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3154 init_emit_once (line_numbers)
3158 enum machine_mode mode;
3160 no_line_numbers = ! line_numbers;
3162 sequence_stack = NULL;
3164 /* Compute the word and byte modes. */
3166 byte_mode = VOIDmode;
3167 word_mode = VOIDmode;
3169 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3170 mode = GET_MODE_WIDER_MODE (mode))
3172 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3173 && byte_mode == VOIDmode)
3176 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3177 && word_mode == VOIDmode)
3181 /* Create the unique rtx's for certain rtx codes and operand values. */
3183 pc_rtx = gen_rtx (PC, VOIDmode);
3184 cc0_rtx = gen_rtx (CC0, VOIDmode);
3186 /* Don't use gen_rtx here since gen_rtx in this case
3187 tries to use these variables. */
3188 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3190 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
3191 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3192 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3195 /* These four calls obtain some of the rtx expressions made above. */
3196 const0_rtx = GEN_INT (0);
3197 const1_rtx = GEN_INT (1);
3198 const2_rtx = GEN_INT (2);
3199 constm1_rtx = GEN_INT (-1);
3201 /* This will usually be one of the above constants, but may be a new rtx. */
3202 const_true_rtx = GEN_INT (STORE_FLAG_VALUE);
3204 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3205 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3206 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3207 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3209 for (i = 0; i <= 2; i++)
3211 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3212 mode = GET_MODE_WIDER_MODE (mode))
3214 rtx tem = rtx_alloc (CONST_DOUBLE);
3215 union real_extract u;
3217 bzero (&u, sizeof u); /* Zero any holes in a structure. */
3218 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3220 bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u);
3221 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3222 PUT_MODE (tem, mode);
3224 const_tiny_rtx[i][(int) mode] = tem;
3227 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3229 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3230 mode = GET_MODE_WIDER_MODE (mode))
3231 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3233 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3235 mode = GET_MODE_WIDER_MODE (mode))
3236 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3239 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3240 mode = GET_MODE_WIDER_MODE (mode))
3241 const_tiny_rtx[0][(int) mode] = const0_rtx;
3243 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
3244 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
3246 if (HARD_FRAME_POINTER_REGNUM == FRAME_POINTER_REGNUM)
3247 hard_frame_pointer_rtx = frame_pointer_rtx;
3249 hard_frame_pointer_rtx = gen_rtx (REG, Pmode, HARD_FRAME_POINTER_REGNUM);
3251 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3252 arg_pointer_rtx = frame_pointer_rtx;
3253 else if (HARD_FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3254 arg_pointer_rtx = hard_frame_pointer_rtx;
3255 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
3256 arg_pointer_rtx = stack_pointer_rtx;
3258 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
3260 /* Create the virtual registers. Do so here since the following objects
3261 might reference them. */
3263 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
3264 VIRTUAL_INCOMING_ARGS_REGNUM);
3265 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
3266 VIRTUAL_STACK_VARS_REGNUM);
3267 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
3268 VIRTUAL_STACK_DYNAMIC_REGNUM);
3269 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
3270 VIRTUAL_OUTGOING_ARGS_REGNUM);
3273 struct_value_rtx = STRUCT_VALUE;
3275 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
3278 #ifdef STRUCT_VALUE_INCOMING
3279 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3281 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3282 struct_value_incoming_rtx
3283 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3285 struct_value_incoming_rtx = struct_value_rtx;
3289 #ifdef STATIC_CHAIN_REGNUM
3290 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
3292 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3293 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3294 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3297 static_chain_incoming_rtx = static_chain_rtx;
3301 static_chain_rtx = STATIC_CHAIN;
3303 #ifdef STATIC_CHAIN_INCOMING
3304 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3306 static_chain_incoming_rtx = static_chain_rtx;
3310 #ifdef PIC_OFFSET_TABLE_REGNUM
3311 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);