1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
46 #include "hard-reg-set.h"
47 #include "insn-config.h"
53 /* Commonly used modes. */
55 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
56 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
57 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
58 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
61 /* This is *not* reset after each function. It gives each CODE_LABEL
62 in the entire compilation a unique label number. */
64 static int label_num = 1;
66 /* Highest label number in current function.
67 Zero means use the value of label_num instead.
68 This is nonzero only when belatedly compiling an inline function. */
70 static int last_label_num;
72 /* Value label_num had when set_new_first_and_last_label_number was called.
73 If label_num has not changed since then, last_label_num is valid. */
75 static int base_label_num;
77 /* Nonzero means do not generate NOTEs for source line numbers. */
79 static int no_line_numbers;
81 /* Commonly used rtx's, so that we only need space for one copy.
82 These are initialized once for the entire compilation.
83 All of these except perhaps the floating-point CONST_DOUBLEs
84 are unique; no other rtx-object will be equal to any of these. */
86 /* Avoid warnings by initializing the `fld' field. Since its a union,
87 bypass problems with KNR compilers by only doing so when __GNUC__. */
94 struct _global_rtl global_rtl =
96 {PC, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* pc_rtx */
97 {CC0, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* cc0_rtx */
98 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* stack_pointer_rtx */
99 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* frame_pointer_rtx */
100 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* hard_frame_pointer_rtx */
101 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* arg_pointer_rtx */
102 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_incoming_args_rtx */
103 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_vars_rtx */
104 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_dynamic_rtx */
105 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_outgoing_args_rtx */
106 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_cfa_rtx */
109 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
110 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
111 record a copy of const[012]_rtx. */
113 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
117 REAL_VALUE_TYPE dconst0;
118 REAL_VALUE_TYPE dconst1;
119 REAL_VALUE_TYPE dconst2;
120 REAL_VALUE_TYPE dconstm1;
122 /* All references to the following fixed hard registers go through
123 these unique rtl objects. On machines where the frame-pointer and
124 arg-pointer are the same register, they use the same unique object.
126 After register allocation, other rtl objects which used to be pseudo-regs
127 may be clobbered to refer to the frame-pointer register.
128 But references that were originally to the frame-pointer can be
129 distinguished from the others because they contain frame_pointer_rtx.
131 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
132 tricky: until register elimination has taken place hard_frame_pointer_rtx
133 should be used if it is being set, and frame_pointer_rtx otherwise. After
134 register elimination hard_frame_pointer_rtx should always be used.
135 On machines where the two registers are same (most) then these are the
138 In an inline procedure, the stack and frame pointer rtxs may not be
139 used for anything else. */
140 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
141 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
142 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
143 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
144 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
146 /* This is used to implement __builtin_return_address for some machines.
147 See for instance the MIPS port. */
148 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
150 /* We make one copy of (const_int C) where C is in
151 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
152 to save space during the compilation and simplify comparisons of
155 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
157 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
158 shortly thrown away. We use two mechanisms to prevent this waste:
160 First, we keep a list of the expressions used to represent the sequence
161 stack in sequence_element_free_list.
163 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
164 rtvec for use by gen_sequence. One entry for each size is sufficient
165 because most cases are calls to gen_sequence followed by immediately
166 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
167 destructive on the insn in it anyway and hence can't be redone.
169 We do not bother to save this cached data over nested function calls.
170 Instead, we just reinitialize them. */
172 #define SEQUENCE_RESULT_SIZE 5
174 static struct sequence_stack *sequence_element_free_list;
175 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
177 /* During RTL generation, we also keep a list of free INSN rtl codes. */
178 static rtx free_insn;
180 #define first_insn (current_function->emit->x_first_insn)
181 #define last_insn (current_function->emit->x_last_insn)
182 #define cur_insn_uid (current_function->emit->x_cur_insn_uid)
183 #define last_linenum (current_function->emit->x_last_linenum)
184 #define last_filename (current_function->emit->x_last_filename)
185 #define first_label_num (current_function->emit->x_first_label_num)
187 static rtx make_jump_insn_raw PROTO((rtx));
188 static rtx make_call_insn_raw PROTO((rtx));
189 static rtx find_line_note PROTO((rtx));
192 gen_rtx_CONST_INT (mode, arg)
193 enum machine_mode mode;
196 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
197 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
199 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
200 if (const_true_rtx && arg == STORE_FLAG_VALUE)
201 return const_true_rtx;
204 return gen_rtx_raw_CONST_INT (mode, arg);
207 /* CONST_DOUBLEs needs special handling because its length is known
210 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
211 enum machine_mode mode;
213 HOST_WIDE_INT arg1, arg2;
215 rtx r = rtx_alloc (CONST_DOUBLE);
220 X0EXP (r, 1) = NULL_RTX;
224 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
231 gen_rtx_REG (mode, regno)
232 enum machine_mode mode;
235 /* In case the MD file explicitly references the frame pointer, have
236 all such references point to the same frame pointer. This is
237 used during frame pointer elimination to distinguish the explicit
238 references to these registers from pseudos that happened to be
241 If we have eliminated the frame pointer or arg pointer, we will
242 be using it as a normal register, for example as a spill
243 register. In such cases, we might be accessing it in a mode that
244 is not Pmode and therefore cannot use the pre-allocated rtx.
246 Also don't do this when we are making new REGs in reload, since
247 we don't want to get confused with the real pointers. */
249 if (mode == Pmode && !reload_in_progress)
251 if (regno == FRAME_POINTER_REGNUM)
252 return frame_pointer_rtx;
253 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
254 if (regno == HARD_FRAME_POINTER_REGNUM)
255 return hard_frame_pointer_rtx;
257 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
258 if (regno == ARG_POINTER_REGNUM)
259 return arg_pointer_rtx;
261 #ifdef RETURN_ADDRESS_POINTER_REGNUM
262 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
263 return return_address_pointer_rtx;
265 if (regno == STACK_POINTER_REGNUM)
266 return stack_pointer_rtx;
269 return gen_rtx_raw_REG (mode, regno);
273 gen_rtx_MEM (mode, addr)
274 enum machine_mode mode;
277 rtx rt = gen_rtx_raw_MEM (mode, addr);
279 /* This field is not cleared by the mere allocation of the rtx, so
281 MEM_ALIAS_SET (rt) = 0;
286 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
288 ** This routine generates an RTX of the size specified by
289 ** <code>, which is an RTX code. The RTX structure is initialized
290 ** from the arguments <element1> through <elementn>, which are
291 ** interpreted according to the specific RTX type's format. The
292 ** special machine mode associated with the rtx (if any) is specified
295 ** gen_rtx can be invoked in a way which resembles the lisp-like
296 ** rtx it will generate. For example, the following rtx structure:
298 ** (plus:QI (mem:QI (reg:SI 1))
299 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
301 ** ...would be generated by the following C code:
303 ** gen_rtx (PLUS, QImode,
304 ** gen_rtx (MEM, QImode,
305 ** gen_rtx (REG, SImode, 1)),
306 ** gen_rtx (MEM, QImode,
307 ** gen_rtx (PLUS, SImode,
308 ** gen_rtx (REG, SImode, 2),
309 ** gen_rtx (REG, SImode, 3)))),
314 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
316 #ifndef ANSI_PROTOTYPES
318 enum machine_mode mode;
321 register int i; /* Array indices... */
322 register const char *fmt; /* Current rtx's format... */
323 register rtx rt_val; /* RTX to return to caller... */
327 #ifndef ANSI_PROTOTYPES
328 code = va_arg (p, enum rtx_code);
329 mode = va_arg (p, enum machine_mode);
335 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
340 rtx arg0 = va_arg (p, rtx);
341 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
342 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
343 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
348 rt_val = gen_rtx_REG (mode, va_arg (p, int));
352 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
356 rt_val = rtx_alloc (code); /* Allocate the storage space. */
357 rt_val->mode = mode; /* Store the machine mode... */
359 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
360 for (i = 0; i < GET_RTX_LENGTH (code); i++)
364 case '0': /* Unused field. */
367 case 'i': /* An integer? */
368 XINT (rt_val, i) = va_arg (p, int);
371 case 'w': /* A wide integer? */
372 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
375 case 's': /* A string? */
376 XSTR (rt_val, i) = va_arg (p, char *);
379 case 'e': /* An expression? */
380 case 'u': /* An insn? Same except when printing. */
381 XEXP (rt_val, i) = va_arg (p, rtx);
384 case 'E': /* An RTX vector? */
385 XVEC (rt_val, i) = va_arg (p, rtvec);
388 case 'b': /* A bitmap? */
389 XBITMAP (rt_val, i) = va_arg (p, bitmap);
392 case 't': /* A tree? */
393 XTREE (rt_val, i) = va_arg (p, tree);
407 /* gen_rtvec (n, [rt1, ..., rtn])
409 ** This routine creates an rtvec and stores within it the
410 ** pointers to rtx's which are its arguments.
415 gen_rtvec VPROTO((int n, ...))
417 #ifndef ANSI_PROTOTYPES
426 #ifndef ANSI_PROTOTYPES
431 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
433 vector = (rtx *) alloca (n * sizeof (rtx));
435 for (i = 0; i < n; i++)
436 vector[i] = va_arg (p, rtx);
439 return gen_rtvec_v (n, vector);
443 gen_rtvec_v (n, argp)
448 register rtvec rt_val;
451 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
453 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
455 for (i = 0; i < n; i++)
456 rt_val->elem[i] = *argp++;
462 /* Generate a REG rtx for a new pseudo register of mode MODE.
463 This pseudo is assigned the next sequential register number. */
467 enum machine_mode mode;
469 struct function *f = current_function;
472 /* Don't let anything called after initial flow analysis create new
477 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
478 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
480 /* For complex modes, don't make a single pseudo.
481 Instead, make a CONCAT of two pseudos.
482 This allows noncontiguous allocation of the real and imaginary parts,
483 which makes much better code. Besides, allocating DCmode
484 pseudos overstrains reload on some machines like the 386. */
485 rtx realpart, imagpart;
486 int size = GET_MODE_UNIT_SIZE (mode);
487 enum machine_mode partmode
488 = mode_for_size (size * BITS_PER_UNIT,
489 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
490 ? MODE_FLOAT : MODE_INT),
493 realpart = gen_reg_rtx (partmode);
494 imagpart = gen_reg_rtx (partmode);
495 return gen_rtx_CONCAT (mode, realpart, imagpart);
498 /* Make sure regno_pointer_flag and regno_reg_rtx are large
499 enough to have an element for this pseudo reg number. */
501 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
503 int old_size = f->emit->regno_pointer_flag_length;
506 new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
507 memset (new + old_size, 0, old_size);
508 f->emit->regno_pointer_flag = new;
510 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
511 memset (new + old_size, 0, old_size);
512 f->emit->regno_pointer_align = new;
514 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
515 old_size * 2 * sizeof (rtx));
516 memset (new1 + old_size, 0, old_size * sizeof (rtx));
517 regno_reg_rtx = new1;
519 f->emit->regno_pointer_flag_length = old_size * 2;
522 val = gen_rtx_raw_REG (mode, reg_rtx_no);
523 regno_reg_rtx[reg_rtx_no++] = val;
527 /* Identify REG (which may be a CONCAT) as a user register. */
533 if (GET_CODE (reg) == CONCAT)
535 REG_USERVAR_P (XEXP (reg, 0)) = 1;
536 REG_USERVAR_P (XEXP (reg, 1)) = 1;
538 else if (GET_CODE (reg) == REG)
539 REG_USERVAR_P (reg) = 1;
544 /* Identify REG as a probable pointer register and show its alignment
545 as ALIGN, if nonzero. */
548 mark_reg_pointer (reg, align)
552 if (! REGNO_POINTER_FLAG (REGNO (reg)))
554 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
557 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
559 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
560 /* We can no-longer be sure just how aligned this pointer is */
561 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
564 /* Return 1 plus largest pseudo reg number used in the current function. */
572 /* Return 1 + the largest label number used so far in the current function. */
577 if (last_label_num && label_num == base_label_num)
578 return last_label_num;
582 /* Return first label number used in this function (if any were used). */
585 get_first_label_num ()
587 return first_label_num;
590 /* Return a value representing some low-order bits of X, where the number
591 of low-order bits is given by MODE. Note that no conversion is done
592 between floating-point and fixed-point values, rather, the bit
593 representation is returned.
595 This function handles the cases in common between gen_lowpart, below,
596 and two variants in cse.c and combine.c. These are the cases that can
597 be safely handled at all points in the compilation.
599 If this is not a case we can handle, return 0. */
602 gen_lowpart_common (mode, x)
603 enum machine_mode mode;
608 if (GET_MODE (x) == mode)
611 /* MODE must occupy no more words than the mode of X. */
612 if (GET_MODE (x) != VOIDmode
613 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
614 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
618 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
619 word = ((GET_MODE_SIZE (GET_MODE (x))
620 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
623 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
624 && (GET_MODE_CLASS (mode) == MODE_INT
625 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
627 /* If we are getting the low-order part of something that has been
628 sign- or zero-extended, we can either just use the object being
629 extended or make a narrower extension. If we want an even smaller
630 piece than the size of the object being extended, call ourselves
633 This case is used mostly by combine and cse. */
635 if (GET_MODE (XEXP (x, 0)) == mode)
637 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
638 return gen_lowpart_common (mode, XEXP (x, 0));
639 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
640 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
642 else if (GET_CODE (x) == SUBREG
643 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
644 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
645 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
647 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
648 else if (GET_CODE (x) == REG)
650 /* Let the backend decide how many registers to skip. This is needed
651 in particular for Sparc64 where fp regs are smaller than a word. */
652 /* ??? Note that subregs are now ambiguous, in that those against
653 pseudos are sized by the Word Size, while those against hard
654 regs are sized by the underlying register size. Better would be
655 to always interpret the subreg offset parameter as bytes or bits. */
657 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
658 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
659 - HARD_REGNO_NREGS (REGNO (x), mode));
661 /* If the register is not valid for MODE, return 0. If we don't
662 do this, there is no way to fix up the resulting REG later.
663 But we do do this if the current REG is not valid for its
664 mode. This latter is a kludge, but is required due to the
665 way that parameters are passed on some machines, most
667 if (REGNO (x) < FIRST_PSEUDO_REGISTER
668 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
669 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
671 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
672 /* integrate.c can't handle parts of a return value register. */
673 && (! REG_FUNCTION_VALUE_P (x)
674 || ! rtx_equal_function_value_matters)
675 #ifdef CLASS_CANNOT_CHANGE_SIZE
676 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
677 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
678 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
679 && (TEST_HARD_REG_BIT
680 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
683 /* We want to keep the stack, frame, and arg pointers
685 && x != frame_pointer_rtx
686 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
687 && x != arg_pointer_rtx
689 && x != stack_pointer_rtx)
690 return gen_rtx_REG (mode, REGNO (x) + word);
692 return gen_rtx_SUBREG (mode, x, word);
694 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
695 from the low-order part of the constant. */
696 else if ((GET_MODE_CLASS (mode) == MODE_INT
697 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
698 && GET_MODE (x) == VOIDmode
699 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
701 /* If MODE is twice the host word size, X is already the desired
702 representation. Otherwise, if MODE is wider than a word, we can't
703 do this. If MODE is exactly a word, return just one CONST_INT.
704 If MODE is smaller than a word, clear the bits that don't belong
705 in our mode, unless they and our sign bit are all one. So we get
706 either a reasonable negative value or a reasonable unsigned value
709 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
711 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
713 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
714 return (GET_CODE (x) == CONST_INT ? x
715 : GEN_INT (CONST_DOUBLE_LOW (x)));
718 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
719 int width = GET_MODE_BITSIZE (mode);
720 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
721 : CONST_DOUBLE_LOW (x));
723 /* Sign extend to HOST_WIDE_INT. */
724 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
726 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
731 /* If X is an integral constant but we want it in floating-point, it
732 must be the case that we have a union of an integer and a floating-point
733 value. If the machine-parameters allow it, simulate that union here
734 and return the result. The two-word and single-word cases are
737 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
738 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
739 || flag_pretend_float)
740 && GET_MODE_CLASS (mode) == MODE_FLOAT
741 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
742 && GET_CODE (x) == CONST_INT
743 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
744 #ifdef REAL_ARITHMETIC
750 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
751 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
755 union {HOST_WIDE_INT i; float d; } u;
758 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
761 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
762 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
763 || flag_pretend_float)
764 && GET_MODE_CLASS (mode) == MODE_FLOAT
765 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
766 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
767 && GET_MODE (x) == VOIDmode
768 && (sizeof (double) * HOST_BITS_PER_CHAR
769 == 2 * HOST_BITS_PER_WIDE_INT))
770 #ifdef REAL_ARITHMETIC
774 HOST_WIDE_INT low, high;
776 if (GET_CODE (x) == CONST_INT)
777 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
779 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
781 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
783 if (WORDS_BIG_ENDIAN)
784 i[0] = high, i[1] = low;
786 i[0] = low, i[1] = high;
788 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
789 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
793 union {HOST_WIDE_INT i[2]; double d; } u;
794 HOST_WIDE_INT low, high;
796 if (GET_CODE (x) == CONST_INT)
797 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
799 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
801 #ifdef HOST_WORDS_BIG_ENDIAN
802 u.i[0] = high, u.i[1] = low;
804 u.i[0] = low, u.i[1] = high;
807 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
811 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
812 same as sizeof (double) or when sizeof (float) is larger than the
813 size of a word on the target machine. */
814 #ifdef REAL_ARITHMETIC
815 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
821 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
822 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
824 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
825 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
826 || flag_pretend_float)
827 && GET_MODE_CLASS (mode) == MODE_FLOAT
828 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
829 && GET_CODE (x) == CONST_INT
830 && (sizeof (double) * HOST_BITS_PER_CHAR
831 == HOST_BITS_PER_WIDE_INT))
837 r = REAL_VALUE_FROM_TARGET_DOUBLE (&i);
838 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
842 /* Similarly, if this is converting a floating-point value into a
843 single-word integer. Only do this is the host and target parameters are
846 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
847 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
848 || flag_pretend_float)
849 && (GET_MODE_CLASS (mode) == MODE_INT
850 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
851 && GET_CODE (x) == CONST_DOUBLE
852 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
853 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
854 return operand_subword (x, word, 0, GET_MODE (x));
856 /* Similarly, if this is converting a floating-point value into a
857 two-word integer, we can do this one word at a time and make an
858 integer. Only do this is the host and target parameters are
861 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
862 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
863 || flag_pretend_float)
864 && (GET_MODE_CLASS (mode) == MODE_INT
865 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
866 && GET_CODE (x) == CONST_DOUBLE
867 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
868 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
871 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
873 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
875 if (lowpart && GET_CODE (lowpart) == CONST_INT
876 && highpart && GET_CODE (highpart) == CONST_INT)
877 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
880 /* Otherwise, we can't do this. */
884 /* Return the real part (which has mode MODE) of a complex value X.
885 This always comes at the low address in memory. */
888 gen_realpart (mode, x)
889 enum machine_mode mode;
892 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
894 else if (WORDS_BIG_ENDIAN
895 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
897 && REGNO (x) < FIRST_PSEUDO_REGISTER)
898 fatal ("Unable to access real part of complex value in a hard register on this target");
899 else if (WORDS_BIG_ENDIAN)
900 return gen_highpart (mode, x);
902 return gen_lowpart (mode, x);
905 /* Return the imaginary part (which has mode MODE) of a complex value X.
906 This always comes at the high address in memory. */
909 gen_imagpart (mode, x)
910 enum machine_mode mode;
913 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
915 else if (WORDS_BIG_ENDIAN)
916 return gen_lowpart (mode, x);
917 else if (!WORDS_BIG_ENDIAN
918 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
920 && REGNO (x) < FIRST_PSEUDO_REGISTER)
921 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
923 return gen_highpart (mode, x);
926 /* Return 1 iff X, assumed to be a SUBREG,
927 refers to the real part of the complex value in its containing reg.
928 Complex values are always stored with the real part in the first word,
929 regardless of WORDS_BIG_ENDIAN. */
932 subreg_realpart_p (x)
935 if (GET_CODE (x) != SUBREG)
938 return SUBREG_WORD (x) * UNITS_PER_WORD < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x)));
941 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
942 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
943 least-significant part of X.
944 MODE specifies how big a part of X to return;
945 it usually should not be larger than a word.
946 If X is a MEM whose address is a QUEUED, the value may be so also. */
949 gen_lowpart (mode, x)
950 enum machine_mode mode;
953 rtx result = gen_lowpart_common (mode, x);
957 else if (GET_CODE (x) == REG)
959 /* Must be a hard reg that's not valid in MODE. */
960 result = gen_lowpart_common (mode, copy_to_reg (x));
965 else if (GET_CODE (x) == MEM)
967 /* The only additional case we can do is MEM. */
968 register int offset = 0;
969 if (WORDS_BIG_ENDIAN)
970 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
971 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
973 if (BYTES_BIG_ENDIAN)
974 /* Adjust the address so that the address-after-the-data
976 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
977 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
979 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
981 else if (GET_CODE (x) == ADDRESSOF)
982 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
987 /* Like `gen_lowpart', but refer to the most significant part.
988 This is used to access the imaginary part of a complex number. */
991 gen_highpart (mode, x)
992 enum machine_mode mode;
995 /* This case loses if X is a subreg. To catch bugs early,
996 complain if an invalid MODE is used even in other cases. */
997 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
998 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1000 if (GET_CODE (x) == CONST_DOUBLE
1001 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1002 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1005 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1006 else if (GET_CODE (x) == CONST_INT)
1008 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1010 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1012 else if (GET_CODE (x) == MEM)
1014 register int offset = 0;
1015 if (! WORDS_BIG_ENDIAN)
1016 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1017 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1019 if (! BYTES_BIG_ENDIAN
1020 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1021 offset -= (GET_MODE_SIZE (mode)
1022 - MIN (UNITS_PER_WORD,
1023 GET_MODE_SIZE (GET_MODE (x))));
1025 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1027 else if (GET_CODE (x) == SUBREG)
1029 /* The only time this should occur is when we are looking at a
1030 multi-word item with a SUBREG whose mode is the same as that of the
1031 item. It isn't clear what we would do if it wasn't. */
1032 if (SUBREG_WORD (x) != 0)
1034 return gen_highpart (mode, SUBREG_REG (x));
1036 else if (GET_CODE (x) == REG)
1040 /* Let the backend decide how many registers to skip. This is needed
1041 in particular for sparc64 where fp regs are smaller than a word. */
1042 /* ??? Note that subregs are now ambiguous, in that those against
1043 pseudos are sized by the word size, while those against hard
1044 regs are sized by the underlying register size. Better would be
1045 to always interpret the subreg offset parameter as bytes or bits. */
1047 if (WORDS_BIG_ENDIAN)
1049 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1050 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1051 - HARD_REGNO_NREGS (REGNO (x), mode));
1053 word = ((GET_MODE_SIZE (GET_MODE (x))
1054 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1057 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1058 /* integrate.c can't handle parts of a return value register. */
1059 && (! REG_FUNCTION_VALUE_P (x)
1060 || ! rtx_equal_function_value_matters)
1061 /* We want to keep the stack, frame, and arg pointers special. */
1062 && x != frame_pointer_rtx
1063 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1064 && x != arg_pointer_rtx
1066 && x != stack_pointer_rtx)
1067 return gen_rtx_REG (mode, REGNO (x) + word);
1069 return gen_rtx_SUBREG (mode, x, word);
1075 /* Return 1 iff X, assumed to be a SUBREG,
1076 refers to the least significant part of its containing reg.
1077 If X is not a SUBREG, always return 1 (it is its own low part!). */
1080 subreg_lowpart_p (x)
1083 if (GET_CODE (x) != SUBREG)
1085 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1088 if (WORDS_BIG_ENDIAN
1089 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1090 return (SUBREG_WORD (x)
1091 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1092 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1095 return SUBREG_WORD (x) == 0;
1098 /* Return subword I of operand OP.
1099 The word number, I, is interpreted as the word number starting at the
1100 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1101 otherwise it is the high-order word.
1103 If we cannot extract the required word, we return zero. Otherwise, an
1104 rtx corresponding to the requested word will be returned.
1106 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1107 reload has completed, a valid address will always be returned. After
1108 reload, if a valid address cannot be returned, we return zero.
1110 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1111 it is the responsibility of the caller.
1113 MODE is the mode of OP in case it is a CONST_INT. */
1116 operand_subword (op, i, validate_address, mode)
1119 int validate_address;
1120 enum machine_mode mode;
1123 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1125 if (mode == VOIDmode)
1126 mode = GET_MODE (op);
1128 if (mode == VOIDmode)
1131 /* If OP is narrower than a word, fail. */
1133 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1136 /* If we want a word outside OP, return zero. */
1138 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1141 /* If OP is already an integer word, return it. */
1142 if (GET_MODE_CLASS (mode) == MODE_INT
1143 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1146 /* If OP is a REG or SUBREG, we can handle it very simply. */
1147 if (GET_CODE (op) == REG)
1149 /* ??? There is a potential problem with this code. It does not
1150 properly handle extractions of a subword from a hard register
1151 that is larger than word_mode. Presumably the check for
1152 HARD_REGNO_MODE_OK catches these most of these cases. */
1154 /* If OP is a hard register, but OP + I is not a hard register,
1155 then extracting a subword is impossible.
1157 For example, consider if OP is the last hard register and it is
1158 larger than word_mode. If we wanted word N (for N > 0) because a
1159 part of that hard register was known to contain a useful value,
1160 then OP + I would refer to a pseudo, not the hard register we
1162 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1163 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1166 /* If the register is not valid for MODE, return 0. Note we
1167 have to check both OP and OP + I since they may refer to
1168 different parts of the register file.
1170 Consider if OP refers to the last 96bit FP register and we want
1171 subword 3 because that subword is known to contain a value we
1173 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1174 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1175 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1177 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1178 || (REG_FUNCTION_VALUE_P (op)
1179 && rtx_equal_function_value_matters)
1180 /* We want to keep the stack, frame, and arg pointers
1182 || op == frame_pointer_rtx
1183 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1184 || op == arg_pointer_rtx
1186 || op == stack_pointer_rtx)
1187 return gen_rtx_SUBREG (word_mode, op, i);
1189 return gen_rtx_REG (word_mode, REGNO (op) + i);
1191 else if (GET_CODE (op) == SUBREG)
1192 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1193 else if (GET_CODE (op) == CONCAT)
1195 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1197 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1198 return operand_subword (XEXP (op, 1), i - partwords,
1199 validate_address, mode);
1202 /* Form a new MEM at the requested address. */
1203 if (GET_CODE (op) == MEM)
1205 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1208 if (validate_address)
1210 if (reload_completed)
1212 if (! strict_memory_address_p (word_mode, addr))
1216 addr = memory_address (word_mode, addr);
1219 new = gen_rtx_MEM (word_mode, addr);
1221 MEM_COPY_ATTRIBUTES (new, op);
1222 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1223 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (op);
1228 /* The only remaining cases are when OP is a constant. If the host and
1229 target floating formats are the same, handling two-word floating
1230 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1231 are defined as returning one or two 32 bit values, respectively,
1232 and not values of BITS_PER_WORD bits. */
1233 #ifdef REAL_ARITHMETIC
1234 /* The output is some bits, the width of the target machine's word.
1235 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1237 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1238 && GET_MODE_CLASS (mode) == MODE_FLOAT
1239 && GET_MODE_BITSIZE (mode) == 64
1240 && GET_CODE (op) == CONST_DOUBLE)
1245 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1246 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1248 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1249 which the words are written depends on the word endianness.
1250 ??? This is a potential portability problem and should
1251 be fixed at some point.
1253 We must excercise caution with the sign bit. By definition there
1254 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1255 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1256 So we explicitly mask and sign-extend as necessary. */
1257 if (BITS_PER_WORD == 32)
1260 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1261 return GEN_INT (val);
1263 #if HOST_BITS_PER_WIDE_INT >= 64
1264 else if (BITS_PER_WORD >= 64 && i == 0)
1266 val = k[! WORDS_BIG_ENDIAN];
1267 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1268 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1269 return GEN_INT (val);
1272 else if (BITS_PER_WORD == 16)
1275 if ((i & 1) == !WORDS_BIG_ENDIAN)
1278 return GEN_INT (val);
1283 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1284 && GET_MODE_CLASS (mode) == MODE_FLOAT
1285 && GET_MODE_BITSIZE (mode) > 64
1286 && GET_CODE (op) == CONST_DOUBLE)
1291 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1292 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1294 if (BITS_PER_WORD == 32)
1297 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1298 return GEN_INT (val);
1303 #else /* no REAL_ARITHMETIC */
1304 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1305 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1306 || flag_pretend_float)
1307 && GET_MODE_CLASS (mode) == MODE_FLOAT
1308 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1309 && GET_CODE (op) == CONST_DOUBLE)
1311 /* The constant is stored in the host's word-ordering,
1312 but we want to access it in the target's word-ordering. Some
1313 compilers don't like a conditional inside macro args, so we have two
1314 copies of the return. */
1315 #ifdef HOST_WORDS_BIG_ENDIAN
1316 return GEN_INT (i == WORDS_BIG_ENDIAN
1317 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1319 return GEN_INT (i != WORDS_BIG_ENDIAN
1320 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1323 #endif /* no REAL_ARITHMETIC */
1325 /* Single word float is a little harder, since single- and double-word
1326 values often do not have the same high-order bits. We have already
1327 verified that we want the only defined word of the single-word value. */
1328 #ifdef REAL_ARITHMETIC
1329 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1330 && GET_MODE_BITSIZE (mode) == 32
1331 && GET_CODE (op) == CONST_DOUBLE)
1336 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1337 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1339 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1341 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1343 if (BITS_PER_WORD == 16)
1345 if ((i & 1) == !WORDS_BIG_ENDIAN)
1350 return GEN_INT (val);
1353 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1354 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1355 || flag_pretend_float)
1356 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1357 && GET_MODE_CLASS (mode) == MODE_FLOAT
1358 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1359 && GET_CODE (op) == CONST_DOUBLE)
1362 union {float f; HOST_WIDE_INT i; } u;
1364 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1367 return GEN_INT (u.i);
1369 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1370 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1371 || flag_pretend_float)
1372 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1373 && GET_MODE_CLASS (mode) == MODE_FLOAT
1374 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1375 && GET_CODE (op) == CONST_DOUBLE)
1378 union {double d; HOST_WIDE_INT i; } u;
1380 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1383 return GEN_INT (u.i);
1385 #endif /* no REAL_ARITHMETIC */
1387 /* The only remaining cases that we can handle are integers.
1388 Convert to proper endianness now since these cases need it.
1389 At this point, i == 0 means the low-order word.
1391 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1392 in general. However, if OP is (const_int 0), we can just return
1395 if (op == const0_rtx)
1398 if (GET_MODE_CLASS (mode) != MODE_INT
1399 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1400 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1403 if (WORDS_BIG_ENDIAN)
1404 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1406 /* Find out which word on the host machine this value is in and get
1407 it from the constant. */
1408 val = (i / size_ratio == 0
1409 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1410 : (GET_CODE (op) == CONST_INT
1411 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1413 /* Get the value we want into the low bits of val. */
1414 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1415 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1417 val = trunc_int_for_mode (val, word_mode);
1419 return GEN_INT (val);
1422 /* Similar to `operand_subword', but never return 0. If we can't extract
1423 the required subword, put OP into a register and try again. If that fails,
1424 abort. We always validate the address in this case. It is not valid
1425 to call this function after reload; it is mostly meant for RTL
1428 MODE is the mode of OP, in case it is CONST_INT. */
1431 operand_subword_force (op, i, mode)
1434 enum machine_mode mode;
1436 rtx result = operand_subword (op, i, 1, mode);
1441 if (mode != BLKmode && mode != VOIDmode)
1443 /* If this is a register which can not be accessed by words, copy it
1444 to a pseudo register. */
1445 if (GET_CODE (op) == REG)
1446 op = copy_to_reg (op);
1448 op = force_reg (mode, op);
1451 result = operand_subword (op, i, 1, mode);
1458 /* Given a compare instruction, swap the operands.
1459 A test instruction is changed into a compare of 0 against the operand. */
1462 reverse_comparison (insn)
1465 rtx body = PATTERN (insn);
1468 if (GET_CODE (body) == SET)
1469 comp = SET_SRC (body);
1471 comp = SET_SRC (XVECEXP (body, 0, 0));
1473 if (GET_CODE (comp) == COMPARE)
1475 rtx op0 = XEXP (comp, 0);
1476 rtx op1 = XEXP (comp, 1);
1477 XEXP (comp, 0) = op1;
1478 XEXP (comp, 1) = op0;
1482 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1483 if (GET_CODE (body) == SET)
1484 SET_SRC (body) = new;
1486 SET_SRC (XVECEXP (body, 0, 0)) = new;
1490 /* Return a memory reference like MEMREF, but with its mode changed
1491 to MODE and its address changed to ADDR.
1492 (VOIDmode means don't change the mode.
1493 NULL for ADDR means don't change the address.) */
1496 change_address (memref, mode, addr)
1498 enum machine_mode mode;
1503 if (GET_CODE (memref) != MEM)
1505 if (mode == VOIDmode)
1506 mode = GET_MODE (memref);
1508 addr = XEXP (memref, 0);
1510 /* If reload is in progress or has completed, ADDR must be valid.
1511 Otherwise, we can call memory_address to make it valid. */
1512 if (reload_completed || reload_in_progress)
1514 if (! memory_address_p (mode, addr))
1518 addr = memory_address (mode, addr);
1520 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1523 new = gen_rtx_MEM (mode, addr);
1524 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1525 MEM_COPY_ATTRIBUTES (new, memref);
1526 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (memref);
1530 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1537 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1538 NULL_RTX, label_num++, NULL_PTR);
1540 LABEL_NUSES (label) = 0;
1544 /* For procedure integration. */
1546 /* Install new pointers to the first and last insns in the chain.
1547 Also, set cur_insn_uid to one higher than the last in use.
1548 Used for an inline-procedure after copying the insn chain. */
1551 set_new_first_and_last_insn (first, last)
1560 for (insn = first; insn; insn = NEXT_INSN (insn))
1561 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1566 /* Set the range of label numbers found in the current function.
1567 This is used when belatedly compiling an inline function. */
1570 set_new_first_and_last_label_num (first, last)
1573 base_label_num = label_num;
1574 first_label_num = first;
1575 last_label_num = last;
1578 /* Set the last label number found in the current function.
1579 This is used when belatedly compiling an inline function. */
1582 set_new_last_label_num (last)
1585 base_label_num = label_num;
1586 last_label_num = last;
1589 /* Restore all variables describing the current status from the structure *P.
1590 This is used after a nested function. */
1593 restore_emit_status (p)
1597 clear_emit_caches ();
1600 /* Clear out all parts of our state in F that can safely be discarded
1601 after the function has been compiled, to let garbage collection
1602 reclaim the memory. */
1604 free_emit_status (f)
1607 free (f->emit->x_regno_reg_rtx);
1608 free (f->emit->regno_pointer_flag);
1609 free (f->emit->regno_pointer_align);
1610 f->emit->x_regno_reg_rtx = 0;
1613 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1614 It does not work to do this twice, because the mark bits set here
1615 are not cleared afterwards. */
1618 unshare_all_rtl (insn)
1621 for (; insn; insn = NEXT_INSN (insn))
1622 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1623 || GET_CODE (insn) == CALL_INSN)
1625 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1626 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1627 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1630 /* Make sure the addresses of stack slots found outside the insn chain
1631 (such as, in DECL_RTL of a variable) are not shared
1632 with the insn chain.
1634 This special care is necessary when the stack slot MEM does not
1635 actually appear in the insn chain. If it does appear, its address
1636 is unshared from all else at that point. */
1638 copy_rtx_if_shared (stack_slot_list);
1641 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1642 Recursively does the same for subexpressions. */
1645 copy_rtx_if_shared (orig)
1648 register rtx x = orig;
1650 register enum rtx_code code;
1651 register const char *format_ptr;
1657 code = GET_CODE (x);
1659 /* These types may be freely shared. */
1672 /* SCRATCH must be shared because they represent distinct values. */
1676 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1677 a LABEL_REF, it isn't sharable. */
1678 if (GET_CODE (XEXP (x, 0)) == PLUS
1679 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1680 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1689 /* The chain of insns is not being copied. */
1693 /* A MEM is allowed to be shared if its address is constant.
1695 We used to allow sharing of MEMs which referenced
1696 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1697 that can lose. instantiate_virtual_regs will not unshare
1698 the MEMs, and combine may change the structure of the address
1699 because it looks safe and profitable in one context, but
1700 in some other context it creates unrecognizable RTL. */
1701 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1710 /* This rtx may not be shared. If it has already been seen,
1711 replace it with a copy of itself. */
1717 copy = rtx_alloc (code);
1718 bcopy ((char *) x, (char *) copy,
1719 (sizeof (*copy) - sizeof (copy->fld)
1720 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1726 /* Now scan the subexpressions recursively.
1727 We can store any replaced subexpressions directly into X
1728 since we know X is not shared! Any vectors in X
1729 must be copied if X was copied. */
1731 format_ptr = GET_RTX_FORMAT (code);
1733 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1735 switch (*format_ptr++)
1738 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1742 if (XVEC (x, i) != NULL)
1745 int len = XVECLEN (x, i);
1747 if (copied && len > 0)
1748 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1749 for (j = 0; j < len; j++)
1750 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1758 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1759 to look for shared sub-parts. */
1762 reset_used_flags (x)
1766 register enum rtx_code code;
1767 register const char *format_ptr;
1772 code = GET_CODE (x);
1774 /* These types may be freely shared so we needn't do any resetting
1795 /* The chain of insns is not being copied. */
1804 format_ptr = GET_RTX_FORMAT (code);
1805 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1807 switch (*format_ptr++)
1810 reset_used_flags (XEXP (x, i));
1814 for (j = 0; j < XVECLEN (x, i); j++)
1815 reset_used_flags (XVECEXP (x, i, j));
1821 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1822 Return X or the rtx for the pseudo reg the value of X was copied into.
1823 OTHER must be valid as a SET_DEST. */
1826 make_safe_from (x, other)
1830 switch (GET_CODE (other))
1833 other = SUBREG_REG (other);
1835 case STRICT_LOW_PART:
1838 other = XEXP (other, 0);
1844 if ((GET_CODE (other) == MEM
1846 && GET_CODE (x) != REG
1847 && GET_CODE (x) != SUBREG)
1848 || (GET_CODE (other) == REG
1849 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1850 || reg_mentioned_p (other, x))))
1852 rtx temp = gen_reg_rtx (GET_MODE (x));
1853 emit_move_insn (temp, x);
1859 /* Emission of insns (adding them to the doubly-linked list). */
1861 /* Return the first insn of the current sequence or current function. */
1869 /* Return the last insn emitted in current sequence or current function. */
1877 /* Specify a new insn as the last in the chain. */
1880 set_last_insn (insn)
1883 if (NEXT_INSN (insn) != 0)
1888 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1891 get_last_insn_anywhere ()
1893 struct sequence_stack *stack;
1896 for (stack = seq_stack; stack; stack = stack->next)
1897 if (stack->last != 0)
1902 /* Return a number larger than any instruction's uid in this function. */
1907 return cur_insn_uid;
1910 /* Return the next insn. If it is a SEQUENCE, return the first insn
1919 insn = NEXT_INSN (insn);
1920 if (insn && GET_CODE (insn) == INSN
1921 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1922 insn = XVECEXP (PATTERN (insn), 0, 0);
1928 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1932 previous_insn (insn)
1937 insn = PREV_INSN (insn);
1938 if (insn && GET_CODE (insn) == INSN
1939 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1940 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1946 /* Return the next insn after INSN that is not a NOTE. This routine does not
1947 look inside SEQUENCEs. */
1950 next_nonnote_insn (insn)
1955 insn = NEXT_INSN (insn);
1956 if (insn == 0 || GET_CODE (insn) != NOTE)
1963 /* Return the previous insn before INSN that is not a NOTE. This routine does
1964 not look inside SEQUENCEs. */
1967 prev_nonnote_insn (insn)
1972 insn = PREV_INSN (insn);
1973 if (insn == 0 || GET_CODE (insn) != NOTE)
1980 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1981 or 0, if there is none. This routine does not look inside
1985 next_real_insn (insn)
1990 insn = NEXT_INSN (insn);
1991 if (insn == 0 || GET_CODE (insn) == INSN
1992 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1999 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2000 or 0, if there is none. This routine does not look inside
2004 prev_real_insn (insn)
2009 insn = PREV_INSN (insn);
2010 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2011 || GET_CODE (insn) == JUMP_INSN)
2018 /* Find the next insn after INSN that really does something. This routine
2019 does not look inside SEQUENCEs. Until reload has completed, this is the
2020 same as next_real_insn. */
2023 next_active_insn (insn)
2028 insn = NEXT_INSN (insn);
2030 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2031 || (GET_CODE (insn) == INSN
2032 && (! reload_completed
2033 || (GET_CODE (PATTERN (insn)) != USE
2034 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2041 /* Find the last insn before INSN that really does something. This routine
2042 does not look inside SEQUENCEs. Until reload has completed, this is the
2043 same as prev_real_insn. */
2046 prev_active_insn (insn)
2051 insn = PREV_INSN (insn);
2053 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2054 || (GET_CODE (insn) == INSN
2055 && (! reload_completed
2056 || (GET_CODE (PATTERN (insn)) != USE
2057 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2064 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2072 insn = NEXT_INSN (insn);
2073 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2080 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2088 insn = PREV_INSN (insn);
2089 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2097 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2098 and REG_CC_USER notes so we can find it. */
2101 link_cc0_insns (insn)
2104 rtx user = next_nonnote_insn (insn);
2106 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2107 user = XVECEXP (PATTERN (user), 0, 0);
2109 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2110 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2113 /* Return the next insn that uses CC0 after INSN, which is assumed to
2114 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2115 applied to the result of this function should yield INSN).
2117 Normally, this is simply the next insn. However, if a REG_CC_USER note
2118 is present, it contains the insn that uses CC0.
2120 Return 0 if we can't find the insn. */
2123 next_cc0_user (insn)
2126 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2129 return XEXP (note, 0);
2131 insn = next_nonnote_insn (insn);
2132 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2133 insn = XVECEXP (PATTERN (insn), 0, 0);
2135 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2136 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2142 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2143 note, it is the previous insn. */
2146 prev_cc0_setter (insn)
2149 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2152 return XEXP (note, 0);
2154 insn = prev_nonnote_insn (insn);
2155 if (! sets_cc0_p (PATTERN (insn)))
2162 /* Try splitting insns that can be split for better scheduling.
2163 PAT is the pattern which might split.
2164 TRIAL is the insn providing PAT.
2165 LAST is non-zero if we should return the last insn of the sequence produced.
2167 If this routine succeeds in splitting, it returns the first or last
2168 replacement insn depending on the value of LAST. Otherwise, it
2169 returns TRIAL. If the insn to be returned can be split, it will be. */
2172 try_split (pat, trial, last)
2176 rtx before = PREV_INSN (trial);
2177 rtx after = NEXT_INSN (trial);
2178 rtx seq = split_insns (pat, trial);
2179 int has_barrier = 0;
2182 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2183 We may need to handle this specially. */
2184 if (after && GET_CODE (after) == BARRIER)
2187 after = NEXT_INSN (after);
2192 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2193 The latter case will normally arise only when being done so that
2194 it, in turn, will be split (SFmode on the 29k is an example). */
2195 if (GET_CODE (seq) == SEQUENCE)
2197 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2198 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2199 increment the usage count so we don't delete the label. */
2202 if (GET_CODE (trial) == JUMP_INSN)
2203 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2204 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2206 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2208 if (JUMP_LABEL (trial))
2209 LABEL_NUSES (JUMP_LABEL (trial))++;
2212 tem = emit_insn_after (seq, before);
2214 delete_insn (trial);
2216 emit_barrier_after (tem);
2218 /* Recursively call try_split for each new insn created; by the
2219 time control returns here that insn will be fully split, so
2220 set LAST and continue from the insn after the one returned.
2221 We can't use next_active_insn here since AFTER may be a note.
2222 Ignore deleted insns, which can be occur if not optimizing. */
2223 for (tem = NEXT_INSN (before); tem != after;
2224 tem = NEXT_INSN (tem))
2225 if (! INSN_DELETED_P (tem)
2226 && GET_RTX_CLASS (GET_CODE (tem)) == 'i')
2227 tem = try_split (PATTERN (tem), tem, 1);
2229 /* Avoid infinite loop if the result matches the original pattern. */
2230 else if (rtx_equal_p (seq, pat))
2234 PATTERN (trial) = seq;
2235 INSN_CODE (trial) = -1;
2236 try_split (seq, trial, last);
2239 /* Return either the first or the last insn, depending on which was
2241 return last ? prev_active_insn (after) : next_active_insn (before);
2247 /* Make and return an INSN rtx, initializing all its slots.
2248 Store PATTERN in the pattern slots. */
2251 make_insn_raw (pattern)
2256 /* If in RTL generation phase, see if FREE_INSN can be used. */
2257 if (free_insn != 0 && rtx_equal_function_value_matters)
2260 free_insn = NEXT_INSN (free_insn);
2261 PUT_CODE (insn, INSN);
2264 insn = rtx_alloc (INSN);
2266 INSN_UID (insn) = cur_insn_uid++;
2267 PATTERN (insn) = pattern;
2268 INSN_CODE (insn) = -1;
2269 LOG_LINKS (insn) = NULL;
2270 REG_NOTES (insn) = NULL;
2275 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2278 make_jump_insn_raw (pattern)
2283 insn = rtx_alloc (JUMP_INSN);
2284 INSN_UID (insn) = cur_insn_uid++;
2286 PATTERN (insn) = pattern;
2287 INSN_CODE (insn) = -1;
2288 LOG_LINKS (insn) = NULL;
2289 REG_NOTES (insn) = NULL;
2290 JUMP_LABEL (insn) = NULL;
2295 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2298 make_call_insn_raw (pattern)
2303 insn = rtx_alloc (CALL_INSN);
2304 INSN_UID (insn) = cur_insn_uid++;
2306 PATTERN (insn) = pattern;
2307 INSN_CODE (insn) = -1;
2308 LOG_LINKS (insn) = NULL;
2309 REG_NOTES (insn) = NULL;
2310 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2315 /* Add INSN to the end of the doubly-linked list.
2316 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2322 PREV_INSN (insn) = last_insn;
2323 NEXT_INSN (insn) = 0;
2325 if (NULL != last_insn)
2326 NEXT_INSN (last_insn) = insn;
2328 if (NULL == first_insn)
2334 /* Add INSN into the doubly-linked list after insn AFTER. This and
2335 the next should be the only functions called to insert an insn once
2336 delay slots have been filled since only they know how to update a
2340 add_insn_after (insn, after)
2343 rtx next = NEXT_INSN (after);
2345 if (optimize && INSN_DELETED_P (after))
2348 NEXT_INSN (insn) = next;
2349 PREV_INSN (insn) = after;
2353 PREV_INSN (next) = insn;
2354 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2355 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2357 else if (last_insn == after)
2361 struct sequence_stack *stack = seq_stack;
2362 /* Scan all pending sequences too. */
2363 for (; stack; stack = stack->next)
2364 if (after == stack->last)
2374 NEXT_INSN (after) = insn;
2375 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2377 rtx sequence = PATTERN (after);
2378 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2382 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2383 the previous should be the only functions called to insert an insn once
2384 delay slots have been filled since only they know how to update a
2388 add_insn_before (insn, before)
2391 rtx prev = PREV_INSN (before);
2393 if (optimize && INSN_DELETED_P (before))
2396 PREV_INSN (insn) = prev;
2397 NEXT_INSN (insn) = before;
2401 NEXT_INSN (prev) = insn;
2402 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2404 rtx sequence = PATTERN (prev);
2405 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2408 else if (first_insn == before)
2412 struct sequence_stack *stack = seq_stack;
2413 /* Scan all pending sequences too. */
2414 for (; stack; stack = stack->next)
2415 if (before == stack->first)
2417 stack->first = insn;
2425 PREV_INSN (before) = insn;
2426 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2427 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2430 /* Remove an insn from its doubly-linked list. This function knows how
2431 to handle sequences. */
2436 rtx next = NEXT_INSN (insn);
2437 rtx prev = PREV_INSN (insn);
2440 NEXT_INSN (prev) = next;
2441 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2443 rtx sequence = PATTERN (prev);
2444 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2447 else if (first_insn == insn)
2451 struct sequence_stack *stack = seq_stack;
2452 /* Scan all pending sequences too. */
2453 for (; stack; stack = stack->next)
2454 if (insn == stack->first)
2456 stack->first = next;
2466 PREV_INSN (next) = prev;
2467 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2468 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2470 else if (last_insn == insn)
2474 struct sequence_stack *stack = seq_stack;
2475 /* Scan all pending sequences too. */
2476 for (; stack; stack = stack->next)
2477 if (insn == stack->last)
2488 /* Delete all insns made since FROM.
2489 FROM becomes the new last instruction. */
2492 delete_insns_since (from)
2498 NEXT_INSN (from) = 0;
2502 /* This function is deprecated, please use sequences instead.
2504 Move a consecutive bunch of insns to a different place in the chain.
2505 The insns to be moved are those between FROM and TO.
2506 They are moved to a new position after the insn AFTER.
2507 AFTER must not be FROM or TO or any insn in between.
2509 This function does not know about SEQUENCEs and hence should not be
2510 called after delay-slot filling has been done. */
2513 reorder_insns (from, to, after)
2514 rtx from, to, after;
2516 /* Splice this bunch out of where it is now. */
2517 if (PREV_INSN (from))
2518 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2520 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2521 if (last_insn == to)
2522 last_insn = PREV_INSN (from);
2523 if (first_insn == from)
2524 first_insn = NEXT_INSN (to);
2526 /* Make the new neighbors point to it and it to them. */
2527 if (NEXT_INSN (after))
2528 PREV_INSN (NEXT_INSN (after)) = to;
2530 NEXT_INSN (to) = NEXT_INSN (after);
2531 PREV_INSN (from) = after;
2532 NEXT_INSN (after) = from;
2533 if (after == last_insn)
2537 /* Return the line note insn preceding INSN. */
2540 find_line_note (insn)
2543 if (no_line_numbers)
2546 for (; insn; insn = PREV_INSN (insn))
2547 if (GET_CODE (insn) == NOTE
2548 && NOTE_LINE_NUMBER (insn) >= 0)
2554 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2555 of the moved insns when debugging. This may insert a note between AFTER
2556 and FROM, and another one after TO. */
2559 reorder_insns_with_line_notes (from, to, after)
2560 rtx from, to, after;
2562 rtx from_line = find_line_note (from);
2563 rtx after_line = find_line_note (after);
2565 reorder_insns (from, to, after);
2567 if (from_line == after_line)
2571 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2572 NOTE_LINE_NUMBER (from_line),
2575 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2576 NOTE_LINE_NUMBER (after_line),
2580 /* Emit an insn of given code and pattern
2581 at a specified place within the doubly-linked list. */
2583 /* Make an instruction with body PATTERN
2584 and output it before the instruction BEFORE. */
2587 emit_insn_before (pattern, before)
2588 register rtx pattern, before;
2590 register rtx insn = before;
2592 if (GET_CODE (pattern) == SEQUENCE)
2596 for (i = 0; i < XVECLEN (pattern, 0); i++)
2598 insn = XVECEXP (pattern, 0, i);
2599 add_insn_before (insn, before);
2601 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2602 sequence_result[XVECLEN (pattern, 0)] = pattern;
2606 insn = make_insn_raw (pattern);
2607 add_insn_before (insn, before);
2613 /* Make an instruction with body PATTERN and code JUMP_INSN
2614 and output it before the instruction BEFORE. */
2617 emit_jump_insn_before (pattern, before)
2618 register rtx pattern, before;
2622 if (GET_CODE (pattern) == SEQUENCE)
2623 insn = emit_insn_before (pattern, before);
2626 insn = make_jump_insn_raw (pattern);
2627 add_insn_before (insn, before);
2633 /* Make an instruction with body PATTERN and code CALL_INSN
2634 and output it before the instruction BEFORE. */
2637 emit_call_insn_before (pattern, before)
2638 register rtx pattern, before;
2642 if (GET_CODE (pattern) == SEQUENCE)
2643 insn = emit_insn_before (pattern, before);
2646 insn = make_call_insn_raw (pattern);
2647 add_insn_before (insn, before);
2648 PUT_CODE (insn, CALL_INSN);
2654 /* Make an insn of code BARRIER
2655 and output it before the insn BEFORE. */
2658 emit_barrier_before (before)
2659 register rtx before;
2661 register rtx insn = rtx_alloc (BARRIER);
2663 INSN_UID (insn) = cur_insn_uid++;
2665 add_insn_before (insn, before);
2669 /* Emit the label LABEL before the insn BEFORE. */
2672 emit_label_before (label, before)
2675 /* This can be called twice for the same label as a result of the
2676 confusion that follows a syntax error! So make it harmless. */
2677 if (INSN_UID (label) == 0)
2679 INSN_UID (label) = cur_insn_uid++;
2680 add_insn_before (label, before);
2686 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2689 emit_note_before (subtype, before)
2693 register rtx note = rtx_alloc (NOTE);
2694 INSN_UID (note) = cur_insn_uid++;
2695 NOTE_SOURCE_FILE (note) = 0;
2696 NOTE_LINE_NUMBER (note) = subtype;
2698 add_insn_before (note, before);
2702 /* Make an insn of code INSN with body PATTERN
2703 and output it after the insn AFTER. */
2706 emit_insn_after (pattern, after)
2707 register rtx pattern, after;
2709 register rtx insn = after;
2711 if (GET_CODE (pattern) == SEQUENCE)
2715 for (i = 0; i < XVECLEN (pattern, 0); i++)
2717 insn = XVECEXP (pattern, 0, i);
2718 add_insn_after (insn, after);
2721 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2722 sequence_result[XVECLEN (pattern, 0)] = pattern;
2726 insn = make_insn_raw (pattern);
2727 add_insn_after (insn, after);
2733 /* Similar to emit_insn_after, except that line notes are to be inserted so
2734 as to act as if this insn were at FROM. */
2737 emit_insn_after_with_line_notes (pattern, after, from)
2738 rtx pattern, after, from;
2740 rtx from_line = find_line_note (from);
2741 rtx after_line = find_line_note (after);
2742 rtx insn = emit_insn_after (pattern, after);
2745 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2746 NOTE_LINE_NUMBER (from_line),
2750 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2751 NOTE_LINE_NUMBER (after_line),
2755 /* Make an insn of code JUMP_INSN with body PATTERN
2756 and output it after the insn AFTER. */
2759 emit_jump_insn_after (pattern, after)
2760 register rtx pattern, after;
2764 if (GET_CODE (pattern) == SEQUENCE)
2765 insn = emit_insn_after (pattern, after);
2768 insn = make_jump_insn_raw (pattern);
2769 add_insn_after (insn, after);
2775 /* Make an insn of code BARRIER
2776 and output it after the insn AFTER. */
2779 emit_barrier_after (after)
2782 register rtx insn = rtx_alloc (BARRIER);
2784 INSN_UID (insn) = cur_insn_uid++;
2786 add_insn_after (insn, after);
2790 /* Emit the label LABEL after the insn AFTER. */
2793 emit_label_after (label, after)
2796 /* This can be called twice for the same label
2797 as a result of the confusion that follows a syntax error!
2798 So make it harmless. */
2799 if (INSN_UID (label) == 0)
2801 INSN_UID (label) = cur_insn_uid++;
2802 add_insn_after (label, after);
2808 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2811 emit_note_after (subtype, after)
2815 register rtx note = rtx_alloc (NOTE);
2816 INSN_UID (note) = cur_insn_uid++;
2817 NOTE_SOURCE_FILE (note) = 0;
2818 NOTE_LINE_NUMBER (note) = subtype;
2819 add_insn_after (note, after);
2823 /* Emit a line note for FILE and LINE after the insn AFTER. */
2826 emit_line_note_after (file, line, after)
2833 if (no_line_numbers && line > 0)
2839 note = rtx_alloc (NOTE);
2840 INSN_UID (note) = cur_insn_uid++;
2841 NOTE_SOURCE_FILE (note) = file;
2842 NOTE_LINE_NUMBER (note) = line;
2843 add_insn_after (note, after);
2847 /* Make an insn of code INSN with pattern PATTERN
2848 and add it to the end of the doubly-linked list.
2849 If PATTERN is a SEQUENCE, take the elements of it
2850 and emit an insn for each element.
2852 Returns the last insn emitted. */
2858 rtx insn = last_insn;
2860 if (GET_CODE (pattern) == SEQUENCE)
2864 for (i = 0; i < XVECLEN (pattern, 0); i++)
2866 insn = XVECEXP (pattern, 0, i);
2869 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2870 sequence_result[XVECLEN (pattern, 0)] = pattern;
2874 insn = make_insn_raw (pattern);
2881 /* Emit the insns in a chain starting with INSN.
2882 Return the last insn emitted. */
2892 rtx next = NEXT_INSN (insn);
2901 /* Emit the insns in a chain starting with INSN and place them in front of
2902 the insn BEFORE. Return the last insn emitted. */
2905 emit_insns_before (insn, before)
2913 rtx next = NEXT_INSN (insn);
2914 add_insn_before (insn, before);
2922 /* Emit the insns in a chain starting with FIRST and place them in back of
2923 the insn AFTER. Return the last insn emitted. */
2926 emit_insns_after (first, after)
2931 register rtx after_after;
2939 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2942 after_after = NEXT_INSN (after);
2944 NEXT_INSN (after) = first;
2945 PREV_INSN (first) = after;
2946 NEXT_INSN (last) = after_after;
2948 PREV_INSN (after_after) = last;
2950 if (after == last_insn)
2955 /* Make an insn of code JUMP_INSN with pattern PATTERN
2956 and add it to the end of the doubly-linked list. */
2959 emit_jump_insn (pattern)
2962 if (GET_CODE (pattern) == SEQUENCE)
2963 return emit_insn (pattern);
2966 register rtx insn = make_jump_insn_raw (pattern);
2972 /* Make an insn of code CALL_INSN with pattern PATTERN
2973 and add it to the end of the doubly-linked list. */
2976 emit_call_insn (pattern)
2979 if (GET_CODE (pattern) == SEQUENCE)
2980 return emit_insn (pattern);
2983 register rtx insn = make_call_insn_raw (pattern);
2985 PUT_CODE (insn, CALL_INSN);
2990 /* Add the label LABEL to the end of the doubly-linked list. */
2996 /* This can be called twice for the same label
2997 as a result of the confusion that follows a syntax error!
2998 So make it harmless. */
2999 if (INSN_UID (label) == 0)
3001 INSN_UID (label) = cur_insn_uid++;
3007 /* Make an insn of code BARRIER
3008 and add it to the end of the doubly-linked list. */
3013 register rtx barrier = rtx_alloc (BARRIER);
3014 INSN_UID (barrier) = cur_insn_uid++;
3019 /* Make an insn of code NOTE
3020 with data-fields specified by FILE and LINE
3021 and add it to the end of the doubly-linked list,
3022 but only if line-numbers are desired for debugging info. */
3025 emit_line_note (file, line)
3029 set_file_and_line_for_stmt (file, line);
3032 if (no_line_numbers)
3036 return emit_note (file, line);
3039 /* Make an insn of code NOTE
3040 with data-fields specified by FILE and LINE
3041 and add it to the end of the doubly-linked list.
3042 If it is a line-number NOTE, omit it if it matches the previous one. */
3045 emit_note (file, line)
3053 if (file && last_filename && !strcmp (file, last_filename)
3054 && line == last_linenum)
3056 last_filename = file;
3057 last_linenum = line;
3060 if (no_line_numbers && line > 0)
3066 note = rtx_alloc (NOTE);
3067 INSN_UID (note) = cur_insn_uid++;
3068 NOTE_SOURCE_FILE (note) = file;
3069 NOTE_LINE_NUMBER (note) = line;
3074 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3077 emit_line_note_force (file, line)
3082 return emit_line_note (file, line);
3085 /* Cause next statement to emit a line note even if the line number
3086 has not changed. This is used at the beginning of a function. */
3089 force_next_line_note ()
3094 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3095 note of this type already exists, remove it first. */
3098 set_unique_reg_note (insn, kind, datum)
3103 rtx note = find_reg_note (insn, kind, NULL_RTX);
3105 /* First remove the note if there already is one. */
3107 remove_note (insn, note);
3109 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3112 /* Return an indication of which type of insn should have X as a body.
3113 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3119 if (GET_CODE (x) == CODE_LABEL)
3121 if (GET_CODE (x) == CALL)
3123 if (GET_CODE (x) == RETURN)
3125 if (GET_CODE (x) == SET)
3127 if (SET_DEST (x) == pc_rtx)
3129 else if (GET_CODE (SET_SRC (x)) == CALL)
3134 if (GET_CODE (x) == PARALLEL)
3137 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3138 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3140 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3141 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3143 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3144 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3150 /* Emit the rtl pattern X as an appropriate kind of insn.
3151 If X is a label, it is simply added into the insn chain. */
3157 enum rtx_code code = classify_insn (x);
3159 if (code == CODE_LABEL)
3160 return emit_label (x);
3161 else if (code == INSN)
3162 return emit_insn (x);
3163 else if (code == JUMP_INSN)
3165 register rtx insn = emit_jump_insn (x);
3166 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3167 return emit_barrier ();
3170 else if (code == CALL_INSN)
3171 return emit_call_insn (x);
3176 /* Begin emitting insns to a sequence which can be packaged in an
3177 RTL_EXPR. If this sequence will contain something that might cause
3178 the compiler to pop arguments to function calls (because those
3179 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3180 details), use do_pending_stack_adjust before calling this function.
3181 That will ensure that the deferred pops are not accidentally
3182 emitted in the middel of this sequence. */
3187 struct sequence_stack *tem;
3189 if (sequence_element_free_list)
3191 /* Reuse a previously-saved struct sequence_stack. */
3192 tem = sequence_element_free_list;
3193 sequence_element_free_list = tem->next;
3196 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3198 tem->next = seq_stack;
3199 tem->first = first_insn;
3200 tem->last = last_insn;
3201 tem->sequence_rtl_expr = seq_rtl_expr;
3209 /* Similarly, but indicate that this sequence will be placed in T, an
3210 RTL_EXPR. See the documentation for start_sequence for more
3211 information about how to use this function. */
3214 start_sequence_for_rtl_expr (t)
3222 /* Set up the insn chain starting with FIRST as the current sequence,
3223 saving the previously current one. See the documentation for
3224 start_sequence for more information about how to use this function. */
3227 push_to_sequence (first)
3234 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3240 /* Set up the outer-level insn chain
3241 as the current sequence, saving the previously current one. */
3244 push_topmost_sequence ()
3246 struct sequence_stack *stack, *top = NULL;
3250 for (stack = seq_stack; stack; stack = stack->next)
3253 first_insn = top->first;
3254 last_insn = top->last;
3255 seq_rtl_expr = top->sequence_rtl_expr;
3258 /* After emitting to the outer-level insn chain, update the outer-level
3259 insn chain, and restore the previous saved state. */
3262 pop_topmost_sequence ()
3264 struct sequence_stack *stack, *top = NULL;
3266 for (stack = seq_stack; stack; stack = stack->next)
3269 top->first = first_insn;
3270 top->last = last_insn;
3271 /* ??? Why don't we save seq_rtl_expr here? */
3276 /* After emitting to a sequence, restore previous saved state.
3278 To get the contents of the sequence just made, you must call
3279 `gen_sequence' *before* calling here.
3281 If the compiler might have deferred popping arguments while
3282 generating this sequence, and this sequence will not be immediately
3283 inserted into the instruction stream, use do_pending_stack_adjust
3284 before calling gen_sequence. That will ensure that the deferred
3285 pops are inserted into this sequence, and not into some random
3286 location in the instruction stream. See INHIBIT_DEFER_POP for more
3287 information about deferred popping of arguments. */
3292 struct sequence_stack *tem = seq_stack;
3294 first_insn = tem->first;
3295 last_insn = tem->last;
3296 seq_rtl_expr = tem->sequence_rtl_expr;
3297 seq_stack = tem->next;
3299 tem->next = sequence_element_free_list;
3300 sequence_element_free_list = tem;
3303 /* Return 1 if currently emitting into a sequence. */
3308 return seq_stack != 0;
3311 /* Generate a SEQUENCE rtx containing the insns already emitted
3312 to the current sequence.
3314 This is how the gen_... function from a DEFINE_EXPAND
3315 constructs the SEQUENCE that it returns. */
3325 /* Count the insns in the chain. */
3327 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3330 /* If only one insn, return its pattern rather than a SEQUENCE.
3331 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3332 the case of an empty list.) */
3334 && ! RTX_FRAME_RELATED_P (first_insn)
3335 && (GET_CODE (first_insn) == INSN
3336 || GET_CODE (first_insn) == JUMP_INSN
3337 /* Don't discard the call usage field. */
3338 || (GET_CODE (first_insn) == CALL_INSN
3339 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3341 NEXT_INSN (first_insn) = free_insn;
3342 free_insn = first_insn;
3343 return PATTERN (first_insn);
3346 /* Put them in a vector. See if we already have a SEQUENCE of the
3347 appropriate length around. */
3348 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3349 sequence_result[len] = 0;
3352 /* Ensure that this rtl goes in saveable_obstack, since we may
3354 push_obstacks_nochange ();
3355 rtl_in_saveable_obstack ();
3356 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3360 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3361 XVECEXP (result, 0, i) = tem;
3366 /* Put the various virtual registers into REGNO_REG_RTX. */
3369 init_virtual_regs (es)
3370 struct emit_status *es;
3372 rtx *ptr = es->x_regno_reg_rtx;
3373 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3374 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3375 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3376 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3377 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3381 clear_emit_caches ()
3385 /* Clear the start_sequence/gen_sequence cache. */
3386 sequence_element_free_list = 0;
3387 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3388 sequence_result[i] = 0;
3392 /* Initialize data structures and variables in this file
3393 before generating rtl for each function. */
3398 struct function *f = current_function;
3400 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3403 seq_rtl_expr = NULL;
3405 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3408 first_label_num = label_num;
3412 clear_emit_caches ();
3414 /* Init the tables that describe all the pseudo regs. */
3416 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3418 f->emit->regno_pointer_flag
3419 = (char *) xmalloc (f->emit->regno_pointer_flag_length);
3420 bzero (f->emit->regno_pointer_flag, f->emit->regno_pointer_flag_length);
3422 f->emit->regno_pointer_align
3423 = (char *) xmalloc (f->emit->regno_pointer_flag_length);
3424 bzero (f->emit->regno_pointer_align, f->emit->regno_pointer_flag_length);
3427 = (rtx *) xmalloc (f->emit->regno_pointer_flag_length * sizeof (rtx));
3428 bzero ((char *) regno_reg_rtx,
3429 f->emit->regno_pointer_flag_length * sizeof (rtx));
3431 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3432 init_virtual_regs (f->emit);
3434 /* Indicate that the virtual registers and stack locations are
3436 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3437 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3438 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3439 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3441 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3442 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3443 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3444 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3445 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3447 #ifdef STACK_BOUNDARY
3448 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3449 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3450 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3451 = STACK_BOUNDARY / BITS_PER_UNIT;
3452 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3454 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3455 = STACK_BOUNDARY / BITS_PER_UNIT;
3456 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3457 = STACK_BOUNDARY / BITS_PER_UNIT;
3458 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3459 = STACK_BOUNDARY / BITS_PER_UNIT;
3460 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3461 = STACK_BOUNDARY / BITS_PER_UNIT;
3462 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD;
3465 #ifdef INIT_EXPANDERS
3470 /* Create some permanent unique rtl objects shared between all functions.
3471 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3474 init_emit_once (line_numbers)
3478 enum machine_mode mode;
3479 enum machine_mode double_mode;
3481 no_line_numbers = ! line_numbers;
3483 /* Compute the word and byte modes. */
3485 byte_mode = VOIDmode;
3486 word_mode = VOIDmode;
3487 double_mode = VOIDmode;
3489 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3490 mode = GET_MODE_WIDER_MODE (mode))
3492 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3493 && byte_mode == VOIDmode)
3496 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3497 && word_mode == VOIDmode)
3501 #ifndef DOUBLE_TYPE_SIZE
3502 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3505 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3506 mode = GET_MODE_WIDER_MODE (mode))
3508 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
3509 && double_mode == VOIDmode)
3513 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3515 /* Create the unique rtx's for certain rtx codes and operand values. */
3517 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3519 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3520 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3521 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3524 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3525 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3526 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3528 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3530 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
3531 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
3532 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
3533 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
3535 for (i = 0; i <= 2; i++)
3537 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3538 mode = GET_MODE_WIDER_MODE (mode))
3540 rtx tem = rtx_alloc (CONST_DOUBLE);
3541 union real_extract u;
3543 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3544 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3546 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3547 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3548 PUT_MODE (tem, mode);
3550 const_tiny_rtx[i][(int) mode] = tem;
3553 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3555 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3556 mode = GET_MODE_WIDER_MODE (mode))
3557 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3559 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3561 mode = GET_MODE_WIDER_MODE (mode))
3562 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3565 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
3566 if (GET_MODE_CLASS (mode) == MODE_CC)
3567 const_tiny_rtx[0][(int) mode] = const0_rtx;
3569 /* Assign register numbers to the globally defined register rtx.
3570 This must be done at runtime because the register number field
3571 is in a union and some compilers can't initialize unions. */
3573 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3574 PUT_MODE (stack_pointer_rtx, Pmode);
3575 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3576 PUT_MODE (frame_pointer_rtx, Pmode);
3577 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3578 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3579 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3581 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3582 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3583 PUT_MODE (arg_pointer_rtx, Pmode);
3586 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3587 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3588 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3589 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3590 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3591 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3592 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3593 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3594 REGNO (virtual_cfa_rtx) = VIRTUAL_CFA_REGNUM;
3595 PUT_MODE (virtual_cfa_rtx, Pmode);
3597 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3598 return_address_pointer_rtx
3599 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3603 struct_value_rtx = STRUCT_VALUE;
3605 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3608 #ifdef STRUCT_VALUE_INCOMING
3609 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3611 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3612 struct_value_incoming_rtx
3613 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3615 struct_value_incoming_rtx = struct_value_rtx;
3619 #ifdef STATIC_CHAIN_REGNUM
3620 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3622 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3623 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3624 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3627 static_chain_incoming_rtx = static_chain_rtx;
3631 static_chain_rtx = STATIC_CHAIN;
3633 #ifdef STATIC_CHAIN_INCOMING
3634 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3636 static_chain_incoming_rtx = static_chain_rtx;
3640 #ifdef PIC_OFFSET_TABLE_REGNUM
3641 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3644 #ifdef INIT_EXPANDERS
3645 /* This is to initialize save_machine_status and restore_machine_status before
3646 the first call to push_function_context_to. This is needed by the Chill
3647 front end which calls push_function_context_to before the first cal to
3648 init_function_start. */
3653 /* Query and clear/ restore no_line_numbers. This is used by the
3654 switch / case handling in stmt.c to give proper line numbers in
3655 warnings about unreachable code. */
3658 force_line_numbers ()
3660 int old = no_line_numbers;
3662 no_line_numbers = 0;
3664 force_next_line_note ();
3669 restore_line_number_status (old_value)
3672 no_line_numbers = old_value;