1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 2, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl[GR_MAX];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab;
147 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
148 shortly thrown away. We use two mechanisms to prevent this waste:
150 For sizes up to 5 elements, we keep a SEQUENCE and its associated
151 rtvec for use by gen_sequence. One entry for each size is
152 sufficient because most cases are calls to gen_sequence followed by
153 immediately emitting the SEQUENCE. Reuse is safe since emitting a
154 sequence is destructive on the insn in it anyway and hence can't be
157 We do not bother to save this cached data over nested function calls.
158 Instead, we just reinitialize them. */
160 #define SEQUENCE_RESULT_SIZE 5
162 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
164 /* During RTL generation, we also keep a list of free INSN rtl codes. */
165 static rtx free_insn;
167 #define first_insn (cfun->emit->x_first_insn)
168 #define last_insn (cfun->emit->x_last_insn)
169 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
170 #define last_linenum (cfun->emit->x_last_linenum)
171 #define last_filename (cfun->emit->x_last_filename)
172 #define first_label_num (cfun->emit->x_first_label_num)
174 static rtx make_jump_insn_raw PARAMS ((rtx));
175 static rtx make_call_insn_raw PARAMS ((rtx));
176 static rtx find_line_note PARAMS ((rtx));
177 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
178 static void unshare_all_rtl_1 PARAMS ((rtx));
179 static void unshare_all_decls PARAMS ((tree));
180 static void reset_used_decls PARAMS ((tree));
181 static void mark_label_nuses PARAMS ((rtx));
182 static hashval_t const_int_htab_hash PARAMS ((const void *));
183 static int const_int_htab_eq PARAMS ((const void *,
185 static int rtx_htab_mark_1 PARAMS ((void **, void *));
186 static void rtx_htab_mark PARAMS ((void *));
188 /* Probability of the conditional branch currently proceeded by try_split.
189 Set to -1 otherwise. */
190 int split_branch_probability = -1;
193 /* Returns a hash code for X (which is a really a CONST_INT). */
196 const_int_htab_hash (x)
199 return (hashval_t) INTVAL ((const struct rtx_def *) x);
202 /* Returns non-zero if the value represented by X (which is really a
203 CONST_INT) is the same as that given by Y (which is really a
207 const_int_htab_eq (x, y)
211 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
214 /* Mark the hash-table element X (which is really a pointer to an
218 rtx_htab_mark_1 (x, data)
220 void *data ATTRIBUTE_UNUSED;
226 /* Mark all the elements of HTAB (which is really an htab_t full of
233 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
236 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
237 don't attempt to share with the various global pieces of rtl (such as
238 frame_pointer_rtx). */
241 gen_raw_REG (mode, regno)
242 enum machine_mode mode;
245 rtx x = gen_rtx_raw_REG (mode, regno);
246 ORIGINAL_REGNO (x) = regno;
250 /* There are some RTL codes that require special attention; the generation
251 functions do the raw handling. If you add to this list, modify
252 special_rtx in gengenrtl.c as well. */
255 gen_rtx_CONST_INT (mode, arg)
256 enum machine_mode mode ATTRIBUTE_UNUSED;
261 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
262 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
264 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
265 if (const_true_rtx && arg == STORE_FLAG_VALUE)
266 return const_true_rtx;
269 /* Look up the CONST_INT in the hash table. */
270 slot = htab_find_slot_with_hash (const_int_htab, &arg,
271 (hashval_t) arg, INSERT);
273 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
278 /* CONST_DOUBLEs needs special handling because their length is known
282 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
283 enum machine_mode mode;
285 HOST_WIDE_INT arg1, arg2;
287 rtx r = rtx_alloc (CONST_DOUBLE);
292 X0EXP (r, 1) = NULL_RTX;
296 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
303 gen_rtx_REG (mode, regno)
304 enum machine_mode mode;
307 /* In case the MD file explicitly references the frame pointer, have
308 all such references point to the same frame pointer. This is
309 used during frame pointer elimination to distinguish the explicit
310 references to these registers from pseudos that happened to be
313 If we have eliminated the frame pointer or arg pointer, we will
314 be using it as a normal register, for example as a spill
315 register. In such cases, we might be accessing it in a mode that
316 is not Pmode and therefore cannot use the pre-allocated rtx.
318 Also don't do this when we are making new REGs in reload, since
319 we don't want to get confused with the real pointers. */
321 if (mode == Pmode && !reload_in_progress)
323 if (regno == FRAME_POINTER_REGNUM)
324 return frame_pointer_rtx;
325 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
326 if (regno == HARD_FRAME_POINTER_REGNUM)
327 return hard_frame_pointer_rtx;
329 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
330 if (regno == ARG_POINTER_REGNUM)
331 return arg_pointer_rtx;
333 #ifdef RETURN_ADDRESS_POINTER_REGNUM
334 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
335 return return_address_pointer_rtx;
337 if (regno == STACK_POINTER_REGNUM)
338 return stack_pointer_rtx;
341 return gen_raw_REG (mode, regno);
345 gen_rtx_MEM (mode, addr)
346 enum machine_mode mode;
349 rtx rt = gen_rtx_raw_MEM (mode, addr);
351 /* This field is not cleared by the mere allocation of the rtx, so
353 MEM_ALIAS_SET (rt) = 0;
359 gen_rtx_SUBREG (mode, reg, offset)
360 enum machine_mode mode;
364 /* This is the most common failure type.
365 Catch it early so we can see who does it. */
366 if ((offset % GET_MODE_SIZE (mode)) != 0)
369 /* This check isn't usable right now because combine will
370 throw arbitrary crap like a CALL into a SUBREG in
371 gen_lowpart_for_combine so we must just eat it. */
373 /* Check for this too. */
374 if (offset >= GET_MODE_SIZE (GET_MODE (reg)))
377 return gen_rtx_fmt_ei (SUBREG, mode, reg, offset);
380 /* Generate a SUBREG representing the least-significant part
381 * of REG if MODE is smaller than mode of REG, otherwise
382 * paradoxical SUBREG. */
384 gen_lowpart_SUBREG (mode, reg)
385 enum machine_mode mode;
388 enum machine_mode inmode;
390 inmode = GET_MODE (reg);
391 if (inmode == VOIDmode)
393 return gen_rtx_SUBREG (mode, reg,
394 subreg_lowpart_offset (mode, inmode));
397 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
399 ** This routine generates an RTX of the size specified by
400 ** <code>, which is an RTX code. The RTX structure is initialized
401 ** from the arguments <element1> through <elementn>, which are
402 ** interpreted according to the specific RTX type's format. The
403 ** special machine mode associated with the rtx (if any) is specified
406 ** gen_rtx can be invoked in a way which resembles the lisp-like
407 ** rtx it will generate. For example, the following rtx structure:
409 ** (plus:QI (mem:QI (reg:SI 1))
410 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
412 ** ...would be generated by the following C code:
414 ** gen_rtx (PLUS, QImode,
415 ** gen_rtx (MEM, QImode,
416 ** gen_rtx (REG, SImode, 1)),
417 ** gen_rtx (MEM, QImode,
418 ** gen_rtx (PLUS, SImode,
419 ** gen_rtx (REG, SImode, 2),
420 ** gen_rtx (REG, SImode, 3)))),
425 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
427 register int i; /* Array indices... */
428 register const char *fmt; /* Current rtx's format... */
429 register rtx rt_val; /* RTX to return to caller... */
432 VA_FIXEDARG (p, enum rtx_code, code);
433 VA_FIXEDARG (p, enum machine_mode, mode);
438 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
443 rtx arg0 = va_arg (p, rtx);
444 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
445 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
446 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
451 rt_val = gen_rtx_REG (mode, va_arg (p, int));
455 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
459 rt_val = rtx_alloc (code); /* Allocate the storage space. */
460 rt_val->mode = mode; /* Store the machine mode... */
462 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
463 for (i = 0; i < GET_RTX_LENGTH (code); i++)
467 case '0': /* Unused field. */
470 case 'i': /* An integer? */
471 XINT (rt_val, i) = va_arg (p, int);
474 case 'w': /* A wide integer? */
475 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
478 case 's': /* A string? */
479 XSTR (rt_val, i) = va_arg (p, char *);
482 case 'e': /* An expression? */
483 case 'u': /* An insn? Same except when printing. */
484 XEXP (rt_val, i) = va_arg (p, rtx);
487 case 'E': /* An RTX vector? */
488 XVEC (rt_val, i) = va_arg (p, rtvec);
491 case 'b': /* A bitmap? */
492 XBITMAP (rt_val, i) = va_arg (p, bitmap);
495 case 't': /* A tree? */
496 XTREE (rt_val, i) = va_arg (p, tree);
510 /* gen_rtvec (n, [rt1, ..., rtn])
512 ** This routine creates an rtvec and stores within it the
513 ** pointers to rtx's which are its arguments.
518 gen_rtvec VPARAMS ((int n, ...))
524 VA_FIXEDARG (p, int, n);
527 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
529 vector = (rtx *) alloca (n * sizeof (rtx));
531 for (i = 0; i < n; i++)
532 vector[i] = va_arg (p, rtx);
535 return gen_rtvec_v (n, vector);
539 gen_rtvec_v (n, argp)
544 register rtvec rt_val;
547 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
549 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
551 for (i = 0; i < n; i++)
552 rt_val->elem[i] = *argp++;
558 /* Generate a REG rtx for a new pseudo register of mode MODE.
559 This pseudo is assigned the next sequential register number. */
563 enum machine_mode mode;
565 struct function *f = cfun;
568 /* Don't let anything called after initial flow analysis create new
573 if (generating_concat_p
574 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
575 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
577 /* For complex modes, don't make a single pseudo.
578 Instead, make a CONCAT of two pseudos.
579 This allows noncontiguous allocation of the real and imaginary parts,
580 which makes much better code. Besides, allocating DCmode
581 pseudos overstrains reload on some machines like the 386. */
582 rtx realpart, imagpart;
583 int size = GET_MODE_UNIT_SIZE (mode);
584 enum machine_mode partmode
585 = mode_for_size (size * BITS_PER_UNIT,
586 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
587 ? MODE_FLOAT : MODE_INT),
590 realpart = gen_reg_rtx (partmode);
591 imagpart = gen_reg_rtx (partmode);
592 return gen_rtx_CONCAT (mode, realpart, imagpart);
595 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
596 to have an element for this pseudo reg number. */
598 if (reg_rtx_no == f->emit->regno_pointer_align_length)
600 int old_size = f->emit->regno_pointer_align_length;
603 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
604 memset (new + old_size, 0, old_size);
605 f->emit->regno_pointer_align = (unsigned char *) new;
607 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
608 old_size * 2 * sizeof (rtx));
609 memset (new1 + old_size, 0, old_size * sizeof (rtx));
610 regno_reg_rtx = new1;
612 f->emit->regno_pointer_align_length = old_size * 2;
615 val = gen_raw_REG (mode, reg_rtx_no);
616 regno_reg_rtx[reg_rtx_no++] = val;
620 /* Identify REG (which may be a CONCAT) as a user register. */
626 if (GET_CODE (reg) == CONCAT)
628 REG_USERVAR_P (XEXP (reg, 0)) = 1;
629 REG_USERVAR_P (XEXP (reg, 1)) = 1;
631 else if (GET_CODE (reg) == REG)
632 REG_USERVAR_P (reg) = 1;
637 /* Identify REG as a probable pointer register and show its alignment
638 as ALIGN, if nonzero. */
641 mark_reg_pointer (reg, align)
645 if (! REG_POINTER (reg))
647 REG_POINTER (reg) = 1;
650 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
652 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
653 /* We can no-longer be sure just how aligned this pointer is */
654 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
657 /* Return 1 plus largest pseudo reg number used in the current function. */
665 /* Return 1 + the largest label number used so far in the current function. */
670 if (last_label_num && label_num == base_label_num)
671 return last_label_num;
675 /* Return first label number used in this function (if any were used). */
678 get_first_label_num ()
680 return first_label_num;
683 /* Return the final regno of X, which is a SUBREG of a hard
686 subreg_hard_regno (x, check_mode)
690 enum machine_mode mode = GET_MODE (x);
691 unsigned int byte_offset, base_regno, final_regno;
692 rtx reg = SUBREG_REG (x);
694 /* This is where we attempt to catch illegal subregs
695 created by the compiler. */
696 if (GET_CODE (x) != SUBREG
697 || GET_CODE (reg) != REG)
699 base_regno = REGNO (reg);
700 if (base_regno >= FIRST_PSEUDO_REGISTER)
702 if (check_mode && ! HARD_REGNO_MODE_OK (base_regno, GET_MODE (reg)))
705 /* Catch non-congruent offsets too. */
706 byte_offset = SUBREG_BYTE (x);
707 if ((byte_offset % GET_MODE_SIZE (mode)) != 0)
710 final_regno = subreg_regno (x);
715 /* Return a value representing some low-order bits of X, where the number
716 of low-order bits is given by MODE. Note that no conversion is done
717 between floating-point and fixed-point values, rather, the bit
718 representation is returned.
720 This function handles the cases in common between gen_lowpart, below,
721 and two variants in cse.c and combine.c. These are the cases that can
722 be safely handled at all points in the compilation.
724 If this is not a case we can handle, return 0. */
727 gen_lowpart_common (mode, x)
728 enum machine_mode mode;
731 int msize = GET_MODE_SIZE (mode);
732 int xsize = GET_MODE_SIZE (GET_MODE (x));
735 if (GET_MODE (x) == mode)
738 /* MODE must occupy no more words than the mode of X. */
739 if (GET_MODE (x) != VOIDmode
740 && ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
741 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))
744 offset = subreg_lowpart_offset (mode, GET_MODE (x));
746 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
747 && (GET_MODE_CLASS (mode) == MODE_INT
748 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
750 /* If we are getting the low-order part of something that has been
751 sign- or zero-extended, we can either just use the object being
752 extended or make a narrower extension. If we want an even smaller
753 piece than the size of the object being extended, call ourselves
756 This case is used mostly by combine and cse. */
758 if (GET_MODE (XEXP (x, 0)) == mode)
760 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
761 return gen_lowpart_common (mode, XEXP (x, 0));
762 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
763 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
765 else if (GET_CODE (x) == SUBREG || GET_CODE (x) == REG
766 || GET_CODE (x) == CONCAT)
767 return simplify_gen_subreg (mode, x, GET_MODE (x), offset);
768 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
769 from the low-order part of the constant. */
770 else if ((GET_MODE_CLASS (mode) == MODE_INT
771 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
772 && GET_MODE (x) == VOIDmode
773 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
775 /* If MODE is twice the host word size, X is already the desired
776 representation. Otherwise, if MODE is wider than a word, we can't
777 do this. If MODE is exactly a word, return just one CONST_INT. */
779 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
781 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
783 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
784 return (GET_CODE (x) == CONST_INT ? x
785 : GEN_INT (CONST_DOUBLE_LOW (x)));
788 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
789 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
790 : CONST_DOUBLE_LOW (x));
792 /* Sign extend to HOST_WIDE_INT. */
793 val = trunc_int_for_mode (val, mode);
795 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
800 #ifndef REAL_ARITHMETIC
801 /* If X is an integral constant but we want it in floating-point, it
802 must be the case that we have a union of an integer and a floating-point
803 value. If the machine-parameters allow it, simulate that union here
804 and return the result. The two-word and single-word cases are
807 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
808 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
809 || flag_pretend_float)
810 && GET_MODE_CLASS (mode) == MODE_FLOAT
811 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
812 && GET_CODE (x) == CONST_INT
813 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
815 union {HOST_WIDE_INT i; float d; } u;
818 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
820 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
821 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
822 || flag_pretend_float)
823 && GET_MODE_CLASS (mode) == MODE_FLOAT
824 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
825 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
826 && GET_MODE (x) == VOIDmode
827 && (sizeof (double) * HOST_BITS_PER_CHAR
828 == 2 * HOST_BITS_PER_WIDE_INT))
830 union {HOST_WIDE_INT i[2]; double d; } u;
831 HOST_WIDE_INT low, high;
833 if (GET_CODE (x) == CONST_INT)
834 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
836 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
838 #ifdef HOST_WORDS_BIG_ENDIAN
839 u.i[0] = high, u.i[1] = low;
841 u.i[0] = low, u.i[1] = high;
844 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
847 /* Similarly, if this is converting a floating-point value into a
848 single-word integer. Only do this is the host and target parameters are
851 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
852 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
853 || flag_pretend_float)
854 && (GET_MODE_CLASS (mode) == MODE_INT
855 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
856 && GET_CODE (x) == CONST_DOUBLE
857 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
858 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
859 return constant_subword (x, (offset / UNITS_PER_WORD), GET_MODE (x));
861 /* Similarly, if this is converting a floating-point value into a
862 two-word integer, we can do this one word at a time and make an
863 integer. Only do this is the host and target parameters are
866 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
867 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
868 || flag_pretend_float)
869 && (GET_MODE_CLASS (mode) == MODE_INT
870 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
871 && GET_CODE (x) == CONST_DOUBLE
872 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
873 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
875 rtx lowpart, highpart;
877 lowpart = constant_subword (x,
878 (offset / UNITS_PER_WORD) + WORDS_BIG_ENDIAN,
880 highpart = constant_subword (x,
881 (offset / UNITS_PER_WORD) + (! WORDS_BIG_ENDIAN),
883 if (lowpart && GET_CODE (lowpart) == CONST_INT
884 && highpart && GET_CODE (highpart) == CONST_INT)
885 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
887 #else /* ifndef REAL_ARITHMETIC */
889 /* When we have a FP emulator, we can handle all conversions between
890 FP and integer operands. This simplifies reload because it
891 doesn't have to deal with constructs like (subreg:DI
892 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
893 /* Single-precision floats are always 32-bits and double-precision
894 floats are always 64-bits. */
896 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
897 && GET_MODE_BITSIZE (mode) == 32
898 && GET_CODE (x) == CONST_INT)
904 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
905 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
907 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
908 && GET_MODE_BITSIZE (mode) == 64
909 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
910 && GET_MODE (x) == VOIDmode)
914 HOST_WIDE_INT low, high;
916 if (GET_CODE (x) == CONST_INT)
919 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
923 low = CONST_DOUBLE_LOW (x);
924 high = CONST_DOUBLE_HIGH (x);
927 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
929 if (WORDS_BIG_ENDIAN)
930 i[0] = high, i[1] = low;
932 i[0] = low, i[1] = high;
934 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
935 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
937 else if ((GET_MODE_CLASS (mode) == MODE_INT
938 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
939 && GET_CODE (x) == CONST_DOUBLE
940 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
943 long i[4]; /* Only the low 32 bits of each 'long' are used. */
944 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
946 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
947 switch (GET_MODE_BITSIZE (GET_MODE (x)))
950 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
954 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
957 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
961 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
967 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
969 #if HOST_BITS_PER_WIDE_INT == 32
970 return immed_double_const (i[endian], i[1 - endian], mode);
975 if (HOST_BITS_PER_WIDE_INT != 64)
978 for (c = 0; c < 4; c++)
981 switch (GET_MODE_BITSIZE (GET_MODE (x)))
985 return immed_double_const (((unsigned long) i[endian]) |
986 (((HOST_WIDE_INT) i[1-endian]) << 32),
990 return immed_double_const (((unsigned long) i[endian*3]) |
991 (((HOST_WIDE_INT) i[1+endian]) << 32),
992 ((unsigned long) i[2-endian]) |
993 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
1001 #endif /* ifndef REAL_ARITHMETIC */
1003 /* Otherwise, we can't do this. */
1007 /* Return the real part (which has mode MODE) of a complex value X.
1008 This always comes at the low address in memory. */
1011 gen_realpart (mode, x)
1012 enum machine_mode mode;
1015 if (WORDS_BIG_ENDIAN
1016 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1018 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1020 ("Can't access real part of complex value in hard register");
1021 else if (WORDS_BIG_ENDIAN)
1022 return gen_highpart (mode, x);
1024 return gen_lowpart (mode, x);
1027 /* Return the imaginary part (which has mode MODE) of a complex value X.
1028 This always comes at the high address in memory. */
1031 gen_imagpart (mode, x)
1032 enum machine_mode mode;
1035 if (WORDS_BIG_ENDIAN)
1036 return gen_lowpart (mode, x);
1037 else if (! WORDS_BIG_ENDIAN
1038 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1040 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1042 ("can't access imaginary part of complex value in hard register");
1044 return gen_highpart (mode, x);
1047 /* Return 1 iff X, assumed to be a SUBREG,
1048 refers to the real part of the complex value in its containing reg.
1049 Complex values are always stored with the real part in the first word,
1050 regardless of WORDS_BIG_ENDIAN. */
1053 subreg_realpart_p (x)
1056 if (GET_CODE (x) != SUBREG)
1059 return ((unsigned int) SUBREG_BYTE (x)
1060 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1063 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1064 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1065 least-significant part of X.
1066 MODE specifies how big a part of X to return;
1067 it usually should not be larger than a word.
1068 If X is a MEM whose address is a QUEUED, the value may be so also. */
1071 gen_lowpart (mode, x)
1072 enum machine_mode mode;
1075 rtx result = gen_lowpart_common (mode, x);
1079 else if (GET_CODE (x) == REG)
1081 /* Must be a hard reg that's not valid in MODE. */
1082 result = gen_lowpart_common (mode, copy_to_reg (x));
1087 else if (GET_CODE (x) == MEM)
1089 /* The only additional case we can do is MEM. */
1090 register int offset = 0;
1091 if (WORDS_BIG_ENDIAN)
1092 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1093 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1095 if (BYTES_BIG_ENDIAN)
1096 /* Adjust the address so that the address-after-the-data
1098 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1099 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1101 return adjust_address (x, mode, offset);
1103 else if (GET_CODE (x) == ADDRESSOF)
1104 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1109 /* Like `gen_lowpart', but refer to the most significant part.
1110 This is used to access the imaginary part of a complex number. */
1113 gen_highpart (mode, x)
1114 enum machine_mode mode;
1117 unsigned int msize = GET_MODE_SIZE (mode);
1120 /* This case loses if X is a subreg. To catch bugs early,
1121 complain if an invalid MODE is used even in other cases. */
1122 if (msize > UNITS_PER_WORD
1123 && msize != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1126 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1127 subreg_highpart_offset (mode, GET_MODE (x)));
1129 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1130 the target if we have a MEM. gen_highpart must return a valid operand,
1131 emitting code if necessary to do so. */
1132 if (GET_CODE (result) == MEM)
1133 result = validize_mem (result);
1140 /* Like gen_highpart_mode, but accept mode of EXP operand in case EXP can
1141 be VOIDmode constant. */
1143 gen_highpart_mode (outermode, innermode, exp)
1144 enum machine_mode outermode, innermode;
1147 if (GET_MODE (exp) != VOIDmode)
1149 if (GET_MODE (exp) != innermode)
1151 return gen_highpart (outermode, exp);
1153 return simplify_gen_subreg (outermode, exp, innermode,
1154 subreg_highpart_offset (outermode, innermode));
1156 /* Return offset in bytes to get OUTERMODE low part
1157 of the value in mode INNERMODE stored in memory in target format. */
1160 subreg_lowpart_offset (outermode, innermode)
1161 enum machine_mode outermode, innermode;
1163 unsigned int offset = 0;
1164 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1168 if (WORDS_BIG_ENDIAN)
1169 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1170 if (BYTES_BIG_ENDIAN)
1171 offset += difference % UNITS_PER_WORD;
1177 /* Return offset in bytes to get OUTERMODE high part
1178 of the value in mode INNERMODE stored in memory in target format. */
1180 subreg_highpart_offset (outermode, innermode)
1181 enum machine_mode outermode, innermode;
1183 unsigned int offset = 0;
1184 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1186 if (GET_MODE_SIZE (innermode) < GET_MODE_SIZE (outermode))
1191 if (! WORDS_BIG_ENDIAN)
1192 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1193 if (! BYTES_BIG_ENDIAN)
1194 offset += difference % UNITS_PER_WORD;
1200 /* Return 1 iff X, assumed to be a SUBREG,
1201 refers to the least significant part of its containing reg.
1202 If X is not a SUBREG, always return 1 (it is its own low part!). */
1205 subreg_lowpart_p (x)
1208 if (GET_CODE (x) != SUBREG)
1210 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1213 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1214 == SUBREG_BYTE (x));
1218 /* Helper routine for all the constant cases of operand_subword.
1219 Some places invoke this directly. */
1222 constant_subword (op, offset, mode)
1225 enum machine_mode mode;
1227 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1230 /* If OP is already an integer word, return it. */
1231 if (GET_MODE_CLASS (mode) == MODE_INT
1232 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1235 #ifdef REAL_ARITHMETIC
1236 /* The output is some bits, the width of the target machine's word.
1237 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1239 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1240 && GET_MODE_CLASS (mode) == MODE_FLOAT
1241 && GET_MODE_BITSIZE (mode) == 64
1242 && GET_CODE (op) == CONST_DOUBLE)
1247 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1248 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1250 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1251 which the words are written depends on the word endianness.
1252 ??? This is a potential portability problem and should
1253 be fixed at some point.
1255 We must excercise caution with the sign bit. By definition there
1256 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1257 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1258 So we explicitly mask and sign-extend as necessary. */
1259 if (BITS_PER_WORD == 32)
1262 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1263 return GEN_INT (val);
1265 #if HOST_BITS_PER_WIDE_INT >= 64
1266 else if (BITS_PER_WORD >= 64 && offset == 0)
1268 val = k[! WORDS_BIG_ENDIAN];
1269 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1270 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1271 return GEN_INT (val);
1274 else if (BITS_PER_WORD == 16)
1276 val = k[offset >> 1];
1277 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1279 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1280 return GEN_INT (val);
1285 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1286 && GET_MODE_CLASS (mode) == MODE_FLOAT
1287 && GET_MODE_BITSIZE (mode) > 64
1288 && GET_CODE (op) == CONST_DOUBLE)
1293 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1294 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1296 if (BITS_PER_WORD == 32)
1299 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1300 return GEN_INT (val);
1302 #if HOST_BITS_PER_WIDE_INT >= 64
1303 else if (BITS_PER_WORD >= 64 && offset <= 1)
1305 val = k[offset * 2 + ! WORDS_BIG_ENDIAN];
1306 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1307 val |= (HOST_WIDE_INT) k[offset * 2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1308 return GEN_INT (val);
1314 #else /* no REAL_ARITHMETIC */
1315 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1316 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1317 || flag_pretend_float)
1318 && GET_MODE_CLASS (mode) == MODE_FLOAT
1319 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1320 && GET_CODE (op) == CONST_DOUBLE)
1322 /* The constant is stored in the host's word-ordering,
1323 but we want to access it in the target's word-ordering. Some
1324 compilers don't like a conditional inside macro args, so we have two
1325 copies of the return. */
1326 #ifdef HOST_WORDS_BIG_ENDIAN
1327 return GEN_INT (offset == WORDS_BIG_ENDIAN
1328 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1330 return GEN_INT (offset != WORDS_BIG_ENDIAN
1331 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1334 #endif /* no REAL_ARITHMETIC */
1336 /* Single word float is a little harder, since single- and double-word
1337 values often do not have the same high-order bits. We have already
1338 verified that we want the only defined word of the single-word value. */
1339 #ifdef REAL_ARITHMETIC
1340 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1341 && GET_MODE_BITSIZE (mode) == 32
1342 && GET_CODE (op) == CONST_DOUBLE)
1347 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1348 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1350 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1352 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1354 if (BITS_PER_WORD == 16)
1356 if ((offset & 1) == ! WORDS_BIG_ENDIAN)
1358 val = ((val & 0xffff) ^ 0x8000) - 0x8000;
1361 return GEN_INT (val);
1364 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1365 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1366 || flag_pretend_float)
1367 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1368 && GET_MODE_CLASS (mode) == MODE_FLOAT
1369 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1370 && GET_CODE (op) == CONST_DOUBLE)
1373 union {float f; HOST_WIDE_INT i; } u;
1375 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1378 return GEN_INT (u.i);
1380 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1381 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1382 || flag_pretend_float)
1383 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1384 && GET_MODE_CLASS (mode) == MODE_FLOAT
1385 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1386 && GET_CODE (op) == CONST_DOUBLE)
1389 union {double d; HOST_WIDE_INT i; } u;
1391 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1394 return GEN_INT (u.i);
1396 #endif /* no REAL_ARITHMETIC */
1398 /* The only remaining cases that we can handle are integers.
1399 Convert to proper endianness now since these cases need it.
1400 At this point, offset == 0 means the low-order word.
1402 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1403 in general. However, if OP is (const_int 0), we can just return
1406 if (op == const0_rtx)
1409 if (GET_MODE_CLASS (mode) != MODE_INT
1410 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1411 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1414 if (WORDS_BIG_ENDIAN)
1415 offset = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - offset;
1417 /* Find out which word on the host machine this value is in and get
1418 it from the constant. */
1419 val = (offset / size_ratio == 0
1420 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1421 : (GET_CODE (op) == CONST_INT
1422 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1424 /* Get the value we want into the low bits of val. */
1425 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1426 val = ((val >> ((offset % size_ratio) * BITS_PER_WORD)));
1428 val = trunc_int_for_mode (val, word_mode);
1430 return GEN_INT (val);
1433 /* Return subword OFFSET of operand OP.
1434 The word number, OFFSET, is interpreted as the word number starting
1435 at the low-order address. OFFSET 0 is the low-order word if not
1436 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1438 If we cannot extract the required word, we return zero. Otherwise,
1439 an rtx corresponding to the requested word will be returned.
1441 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1442 reload has completed, a valid address will always be returned. After
1443 reload, if a valid address cannot be returned, we return zero.
1445 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1446 it is the responsibility of the caller.
1448 MODE is the mode of OP in case it is a CONST_INT.
1450 ??? This is still rather broken for some cases. The problem for the
1451 moment is that all callers of this thing provide no 'goal mode' to
1452 tell us to work with. This exists because all callers were written
1453 in a word based SUBREG world.
1454 Now use of this function can be deprecated by simplify_subreg in most
1459 operand_subword (op, offset, validate_address, mode)
1461 unsigned int offset;
1462 int validate_address;
1463 enum machine_mode mode;
1465 if (mode == VOIDmode)
1466 mode = GET_MODE (op);
1468 if (mode == VOIDmode)
1471 /* If OP is narrower than a word, fail. */
1473 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1476 /* If we want a word outside OP, return zero. */
1478 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1481 /* Form a new MEM at the requested address. */
1482 if (GET_CODE (op) == MEM)
1484 rtx new = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1486 if (! validate_address)
1489 else if (reload_completed)
1491 if (! strict_memory_address_p (word_mode, XEXP (new, 0)))
1495 return replace_equiv_address (new, XEXP (new, 0));
1498 /* Rest can be handled by simplify_subreg. */
1499 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1502 /* Similar to `operand_subword', but never return 0. If we can't extract
1503 the required subword, put OP into a register and try again. If that fails,
1504 abort. We always validate the address in this case.
1506 MODE is the mode of OP, in case it is CONST_INT. */
1509 operand_subword_force (op, offset, mode)
1511 unsigned int offset;
1512 enum machine_mode mode;
1514 rtx result = operand_subword (op, offset, 1, mode);
1519 if (mode != BLKmode && mode != VOIDmode)
1521 /* If this is a register which can not be accessed by words, copy it
1522 to a pseudo register. */
1523 if (GET_CODE (op) == REG)
1524 op = copy_to_reg (op);
1526 op = force_reg (mode, op);
1529 result = operand_subword (op, offset, 1, mode);
1536 /* Given a compare instruction, swap the operands.
1537 A test instruction is changed into a compare of 0 against the operand. */
1540 reverse_comparison (insn)
1543 rtx body = PATTERN (insn);
1546 if (GET_CODE (body) == SET)
1547 comp = SET_SRC (body);
1549 comp = SET_SRC (XVECEXP (body, 0, 0));
1551 if (GET_CODE (comp) == COMPARE)
1553 rtx op0 = XEXP (comp, 0);
1554 rtx op1 = XEXP (comp, 1);
1555 XEXP (comp, 0) = op1;
1556 XEXP (comp, 1) = op0;
1560 rtx new = gen_rtx_COMPARE (VOIDmode,
1561 CONST0_RTX (GET_MODE (comp)), comp);
1562 if (GET_CODE (body) == SET)
1563 SET_SRC (body) = new;
1565 SET_SRC (XVECEXP (body, 0, 0)) = new;
1569 /* Return a memory reference like MEMREF, but with its mode changed
1570 to MODE and its address changed to ADDR.
1571 (VOIDmode means don't change the mode.
1572 NULL for ADDR means don't change the address.)
1573 VALIDATE is nonzero if the returned memory location is required to be
1577 change_address_1 (memref, mode, addr, validate)
1579 enum machine_mode mode;
1585 if (GET_CODE (memref) != MEM)
1587 if (mode == VOIDmode)
1588 mode = GET_MODE (memref);
1590 addr = XEXP (memref, 0);
1594 if (reload_in_progress || reload_completed)
1596 if (! memory_address_p (mode, addr))
1600 addr = memory_address (mode, addr);
1603 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1606 new = gen_rtx_MEM (mode, addr);
1607 MEM_COPY_ATTRIBUTES (new, memref);
1611 /* Return a memory reference like MEMREF, but with its mode changed
1612 to MODE and its address offset by OFFSET bytes. */
1615 adjust_address (memref, mode, offset)
1617 enum machine_mode mode;
1618 HOST_WIDE_INT offset;
1620 /* For now, this is just a wrapper for change_address, but eventually
1621 will do memref tracking. */
1622 rtx addr = XEXP (memref, 0);
1624 /* ??? Prefer to create garbage instead of creating shared rtl. */
1625 addr = copy_rtx (addr);
1627 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
1628 object, we can merge it into the LO_SUM. */
1629 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1631 && (unsigned HOST_WIDE_INT) offset
1632 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1633 addr = gen_rtx_LO_SUM (mode, XEXP (addr, 0),
1634 plus_constant (XEXP (addr, 1), offset));
1636 addr = plus_constant (addr, offset);
1638 return change_address (memref, mode, addr);
1641 /* Likewise, but the reference is not required to be valid. */
1644 adjust_address_nv (memref, mode, offset)
1646 enum machine_mode mode;
1647 HOST_WIDE_INT offset;
1649 /* For now, this is just a wrapper for change_address, but eventually
1650 will do memref tracking. */
1651 rtx addr = XEXP (memref, 0);
1653 /* If MEMREF is a LO_SUM and the offset is within the size of the
1654 object, we can merge it into the LO_SUM. */
1655 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
1657 && (unsigned HOST_WIDE_INT) offset
1658 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
1659 addr = gen_rtx_LO_SUM (mode, XEXP (addr, 0),
1660 plus_constant (XEXP (addr, 1), offset));
1662 addr = plus_constant (addr, offset);
1664 return change_address_1 (memref, mode, addr, 0);
1667 /* Return a memory reference like MEMREF, but with its address changed to
1668 ADDR. The caller is asserting that the actual piece of memory pointed
1669 to is the same, just the form of the address is being changed, such as
1670 by putting something into a register. */
1673 replace_equiv_address (memref, addr)
1677 /* For now, this is just a wrapper for change_address, but eventually
1678 will do memref tracking. */
1679 return change_address (memref, VOIDmode, addr);
1681 /* Likewise, but the reference is not required to be valid. */
1684 replace_equiv_address_nv (memref, addr)
1688 /* For now, this is just a wrapper for change_address, but eventually
1689 will do memref tracking. */
1690 return change_address_1 (memref, VOIDmode, addr, 0);
1693 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1700 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1701 NULL_RTX, label_num++, NULL, NULL);
1703 LABEL_NUSES (label) = 0;
1704 LABEL_ALTERNATE_NAME (label) = NULL;
1708 /* For procedure integration. */
1710 /* Install new pointers to the first and last insns in the chain.
1711 Also, set cur_insn_uid to one higher than the last in use.
1712 Used for an inline-procedure after copying the insn chain. */
1715 set_new_first_and_last_insn (first, last)
1724 for (insn = first; insn; insn = NEXT_INSN (insn))
1725 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1730 /* Set the range of label numbers found in the current function.
1731 This is used when belatedly compiling an inline function. */
1734 set_new_first_and_last_label_num (first, last)
1737 base_label_num = label_num;
1738 first_label_num = first;
1739 last_label_num = last;
1742 /* Set the last label number found in the current function.
1743 This is used when belatedly compiling an inline function. */
1746 set_new_last_label_num (last)
1749 base_label_num = label_num;
1750 last_label_num = last;
1753 /* Restore all variables describing the current status from the structure *P.
1754 This is used after a nested function. */
1757 restore_emit_status (p)
1758 struct function *p ATTRIBUTE_UNUSED;
1761 clear_emit_caches ();
1764 /* Clear out all parts of the state in F that can safely be discarded
1765 after the function has been compiled, to let garbage collection
1766 reclaim the memory. */
1769 free_emit_status (f)
1772 free (f->emit->x_regno_reg_rtx);
1773 free (f->emit->regno_pointer_align);
1778 /* Go through all the RTL insn bodies and copy any invalid shared
1779 structure. This routine should only be called once. */
1782 unshare_all_rtl (fndecl, insn)
1788 /* Make sure that virtual parameters are not shared. */
1789 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1790 SET_DECL_RTL (decl, copy_rtx_if_shared (DECL_RTL (decl)));
1792 /* Make sure that virtual stack slots are not shared. */
1793 unshare_all_decls (DECL_INITIAL (fndecl));
1795 /* Unshare just about everything else. */
1796 unshare_all_rtl_1 (insn);
1798 /* Make sure the addresses of stack slots found outside the insn chain
1799 (such as, in DECL_RTL of a variable) are not shared
1800 with the insn chain.
1802 This special care is necessary when the stack slot MEM does not
1803 actually appear in the insn chain. If it does appear, its address
1804 is unshared from all else at that point. */
1805 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1808 /* Go through all the RTL insn bodies and copy any invalid shared
1809 structure, again. This is a fairly expensive thing to do so it
1810 should be done sparingly. */
1813 unshare_all_rtl_again (insn)
1819 for (p = insn; p; p = NEXT_INSN (p))
1822 reset_used_flags (PATTERN (p));
1823 reset_used_flags (REG_NOTES (p));
1824 reset_used_flags (LOG_LINKS (p));
1827 /* Make sure that virtual stack slots are not shared. */
1828 reset_used_decls (DECL_INITIAL (cfun->decl));
1830 /* Make sure that virtual parameters are not shared. */
1831 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1832 reset_used_flags (DECL_RTL (decl));
1834 reset_used_flags (stack_slot_list);
1836 unshare_all_rtl (cfun->decl, insn);
1839 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1840 Assumes the mark bits are cleared at entry. */
1843 unshare_all_rtl_1 (insn)
1846 for (; insn; insn = NEXT_INSN (insn))
1849 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1850 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1851 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1855 /* Go through all virtual stack slots of a function and copy any
1856 shared structure. */
1858 unshare_all_decls (blk)
1863 /* Copy shared decls. */
1864 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1865 if (DECL_RTL_SET_P (t))
1866 SET_DECL_RTL (t, copy_rtx_if_shared (DECL_RTL (t)));
1868 /* Now process sub-blocks. */
1869 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1870 unshare_all_decls (t);
1873 /* Go through all virtual stack slots of a function and mark them as
1876 reset_used_decls (blk)
1882 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1883 if (DECL_RTL_SET_P (t))
1884 reset_used_flags (DECL_RTL (t));
1886 /* Now process sub-blocks. */
1887 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1888 reset_used_decls (t);
1891 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1892 Recursively does the same for subexpressions. */
1895 copy_rtx_if_shared (orig)
1898 register rtx x = orig;
1900 register enum rtx_code code;
1901 register const char *format_ptr;
1907 code = GET_CODE (x);
1909 /* These types may be freely shared. */
1922 /* SCRATCH must be shared because they represent distinct values. */
1926 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1927 a LABEL_REF, it isn't sharable. */
1928 if (GET_CODE (XEXP (x, 0)) == PLUS
1929 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1930 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1939 /* The chain of insns is not being copied. */
1943 /* A MEM is allowed to be shared if its address is constant.
1945 We used to allow sharing of MEMs which referenced
1946 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1947 that can lose. instantiate_virtual_regs will not unshare
1948 the MEMs, and combine may change the structure of the address
1949 because it looks safe and profitable in one context, but
1950 in some other context it creates unrecognizable RTL. */
1951 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1960 /* This rtx may not be shared. If it has already been seen,
1961 replace it with a copy of itself. */
1967 copy = rtx_alloc (code);
1969 (sizeof (*copy) - sizeof (copy->fld)
1970 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1976 /* Now scan the subexpressions recursively.
1977 We can store any replaced subexpressions directly into X
1978 since we know X is not shared! Any vectors in X
1979 must be copied if X was copied. */
1981 format_ptr = GET_RTX_FORMAT (code);
1983 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1985 switch (*format_ptr++)
1988 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1992 if (XVEC (x, i) != NULL)
1995 int len = XVECLEN (x, i);
1997 if (copied && len > 0)
1998 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1999 for (j = 0; j < len; j++)
2000 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
2008 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2009 to look for shared sub-parts. */
2012 reset_used_flags (x)
2016 register enum rtx_code code;
2017 register const char *format_ptr;
2022 code = GET_CODE (x);
2024 /* These types may be freely shared so we needn't do any resetting
2045 /* The chain of insns is not being copied. */
2054 format_ptr = GET_RTX_FORMAT (code);
2055 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2057 switch (*format_ptr++)
2060 reset_used_flags (XEXP (x, i));
2064 for (j = 0; j < XVECLEN (x, i); j++)
2065 reset_used_flags (XVECEXP (x, i, j));
2071 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2072 Return X or the rtx for the pseudo reg the value of X was copied into.
2073 OTHER must be valid as a SET_DEST. */
2076 make_safe_from (x, other)
2080 switch (GET_CODE (other))
2083 other = SUBREG_REG (other);
2085 case STRICT_LOW_PART:
2088 other = XEXP (other, 0);
2094 if ((GET_CODE (other) == MEM
2096 && GET_CODE (x) != REG
2097 && GET_CODE (x) != SUBREG)
2098 || (GET_CODE (other) == REG
2099 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2100 || reg_mentioned_p (other, x))))
2102 rtx temp = gen_reg_rtx (GET_MODE (x));
2103 emit_move_insn (temp, x);
2109 /* Emission of insns (adding them to the doubly-linked list). */
2111 /* Return the first insn of the current sequence or current function. */
2119 /* Return the last insn emitted in current sequence or current function. */
2127 /* Specify a new insn as the last in the chain. */
2130 set_last_insn (insn)
2133 if (NEXT_INSN (insn) != 0)
2138 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2141 get_last_insn_anywhere ()
2143 struct sequence_stack *stack;
2146 for (stack = seq_stack; stack; stack = stack->next)
2147 if (stack->last != 0)
2152 /* Return a number larger than any instruction's uid in this function. */
2157 return cur_insn_uid;
2160 /* Renumber instructions so that no instruction UIDs are wasted. */
2163 renumber_insns (stream)
2168 /* If we're not supposed to renumber instructions, don't. */
2169 if (!flag_renumber_insns)
2172 /* If there aren't that many instructions, then it's not really
2173 worth renumbering them. */
2174 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2179 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2182 fprintf (stream, "Renumbering insn %d to %d\n",
2183 INSN_UID (insn), cur_insn_uid);
2184 INSN_UID (insn) = cur_insn_uid++;
2188 /* Return the next insn. If it is a SEQUENCE, return the first insn
2197 insn = NEXT_INSN (insn);
2198 if (insn && GET_CODE (insn) == INSN
2199 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2200 insn = XVECEXP (PATTERN (insn), 0, 0);
2206 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2210 previous_insn (insn)
2215 insn = PREV_INSN (insn);
2216 if (insn && GET_CODE (insn) == INSN
2217 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2218 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2224 /* Return the next insn after INSN that is not a NOTE. This routine does not
2225 look inside SEQUENCEs. */
2228 next_nonnote_insn (insn)
2233 insn = NEXT_INSN (insn);
2234 if (insn == 0 || GET_CODE (insn) != NOTE)
2241 /* Return the previous insn before INSN that is not a NOTE. This routine does
2242 not look inside SEQUENCEs. */
2245 prev_nonnote_insn (insn)
2250 insn = PREV_INSN (insn);
2251 if (insn == 0 || GET_CODE (insn) != NOTE)
2258 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2259 or 0, if there is none. This routine does not look inside
2263 next_real_insn (insn)
2268 insn = NEXT_INSN (insn);
2269 if (insn == 0 || GET_CODE (insn) == INSN
2270 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2277 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2278 or 0, if there is none. This routine does not look inside
2282 prev_real_insn (insn)
2287 insn = PREV_INSN (insn);
2288 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2289 || GET_CODE (insn) == JUMP_INSN)
2296 /* Find the next insn after INSN that really does something. This routine
2297 does not look inside SEQUENCEs. Until reload has completed, this is the
2298 same as next_real_insn. */
2301 active_insn_p (insn)
2304 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2305 || (GET_CODE (insn) == INSN
2306 && (! reload_completed
2307 || (GET_CODE (PATTERN (insn)) != USE
2308 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2312 next_active_insn (insn)
2317 insn = NEXT_INSN (insn);
2318 if (insn == 0 || active_insn_p (insn))
2325 /* Find the last insn before INSN that really does something. This routine
2326 does not look inside SEQUENCEs. Until reload has completed, this is the
2327 same as prev_real_insn. */
2330 prev_active_insn (insn)
2335 insn = PREV_INSN (insn);
2336 if (insn == 0 || active_insn_p (insn))
2343 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2351 insn = NEXT_INSN (insn);
2352 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2359 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2367 insn = PREV_INSN (insn);
2368 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2376 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2377 and REG_CC_USER notes so we can find it. */
2380 link_cc0_insns (insn)
2383 rtx user = next_nonnote_insn (insn);
2385 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2386 user = XVECEXP (PATTERN (user), 0, 0);
2388 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2390 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2393 /* Return the next insn that uses CC0 after INSN, which is assumed to
2394 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2395 applied to the result of this function should yield INSN).
2397 Normally, this is simply the next insn. However, if a REG_CC_USER note
2398 is present, it contains the insn that uses CC0.
2400 Return 0 if we can't find the insn. */
2403 next_cc0_user (insn)
2406 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2409 return XEXP (note, 0);
2411 insn = next_nonnote_insn (insn);
2412 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2413 insn = XVECEXP (PATTERN (insn), 0, 0);
2415 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2421 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2422 note, it is the previous insn. */
2425 prev_cc0_setter (insn)
2428 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2431 return XEXP (note, 0);
2433 insn = prev_nonnote_insn (insn);
2434 if (! sets_cc0_p (PATTERN (insn)))
2441 /* Increment the label uses for all labels present in rtx. */
2447 register enum rtx_code code;
2449 register const char *fmt;
2451 code = GET_CODE (x);
2452 if (code == LABEL_REF)
2453 LABEL_NUSES (XEXP (x, 0))++;
2455 fmt = GET_RTX_FORMAT (code);
2456 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2459 mark_label_nuses (XEXP (x, i));
2460 else if (fmt[i] == 'E')
2461 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2462 mark_label_nuses (XVECEXP (x, i, j));
2467 /* Try splitting insns that can be split for better scheduling.
2468 PAT is the pattern which might split.
2469 TRIAL is the insn providing PAT.
2470 LAST is non-zero if we should return the last insn of the sequence produced.
2472 If this routine succeeds in splitting, it returns the first or last
2473 replacement insn depending on the value of LAST. Otherwise, it
2474 returns TRIAL. If the insn to be returned can be split, it will be. */
2477 try_split (pat, trial, last)
2481 rtx before = PREV_INSN (trial);
2482 rtx after = NEXT_INSN (trial);
2483 int has_barrier = 0;
2488 if (any_condjump_p (trial)
2489 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
2490 split_branch_probability = INTVAL (XEXP (note, 0));
2491 probability = split_branch_probability;
2493 seq = split_insns (pat, trial);
2495 split_branch_probability = -1;
2497 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2498 We may need to handle this specially. */
2499 if (after && GET_CODE (after) == BARRIER)
2502 after = NEXT_INSN (after);
2507 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2508 The latter case will normally arise only when being done so that
2509 it, in turn, will be split (SFmode on the 29k is an example). */
2510 if (GET_CODE (seq) == SEQUENCE)
2515 /* Avoid infinite loop if any insn of the result matches
2516 the original pattern. */
2517 for (i = 0; i < XVECLEN (seq, 0); i++)
2518 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2519 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2523 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2524 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2526 rtx insn = XVECEXP (seq, 0, i);
2527 mark_jump_label (PATTERN (insn),
2528 XVECEXP (seq, 0, i), 0);
2530 if (probability != -1
2531 && any_condjump_p (insn)
2532 && !find_reg_note (insn, REG_BR_PROB, 0))
2534 /* We can preserve the REG_BR_PROB notes only if exactly
2535 one jump is created, otherwise the machinde description
2536 is responsible for this step using
2537 split_branch_probability variable. */
2541 = gen_rtx_EXPR_LIST (REG_BR_PROB,
2542 GEN_INT (probability),
2546 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2547 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2548 if (GET_CODE (trial) == CALL_INSN)
2549 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2550 if (GET_CODE (XVECEXP (seq, 0, i)) == CALL_INSN)
2551 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq, 0, i))
2552 = CALL_INSN_FUNCTION_USAGE (trial);
2554 /* Copy EH notes. */
2555 if ((eh_note = find_reg_note (trial, REG_EH_REGION, NULL_RTX)))
2556 for (i = 0; i < XVECLEN (seq, 0); i++)
2558 rtx insn = XVECEXP (seq, 0, i);
2559 if (GET_CODE (insn) == CALL_INSN
2560 || (flag_non_call_exceptions
2561 && may_trap_p (PATTERN (insn))))
2563 = gen_rtx_EXPR_LIST (REG_EH_REGION, XEXP (eh_note, 0),
2567 /* If there are LABELS inside the split insns increment the
2568 usage count so we don't delete the label. */
2569 if (GET_CODE (trial) == INSN)
2570 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2571 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN)
2572 mark_label_nuses (PATTERN (XVECEXP (seq, 0, i)));
2574 tem = emit_insn_after (seq, before);
2576 delete_insn (trial);
2578 emit_barrier_after (tem);
2580 /* Recursively call try_split for each new insn created; by the
2581 time control returns here that insn will be fully split, so
2582 set LAST and continue from the insn after the one returned.
2583 We can't use next_active_insn here since AFTER may be a note.
2584 Ignore deleted insns, which can be occur if not optimizing. */
2585 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2586 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2587 tem = try_split (PATTERN (tem), tem, 1);
2589 /* Avoid infinite loop if the result matches the original pattern. */
2590 else if (rtx_equal_p (seq, pat))
2594 PATTERN (trial) = seq;
2595 INSN_CODE (trial) = -1;
2596 try_split (seq, trial, last);
2599 /* Return either the first or the last insn, depending on which was
2602 ? (after ? PREV_INSN (after) : last_insn)
2603 : NEXT_INSN (before);
2609 /* Make and return an INSN rtx, initializing all its slots.
2610 Store PATTERN in the pattern slots. */
2613 make_insn_raw (pattern)
2618 insn = rtx_alloc (INSN);
2620 INSN_UID (insn) = cur_insn_uid++;
2621 PATTERN (insn) = pattern;
2622 INSN_CODE (insn) = -1;
2623 LOG_LINKS (insn) = NULL;
2624 REG_NOTES (insn) = NULL;
2626 #ifdef ENABLE_RTL_CHECKING
2629 && (returnjump_p (insn)
2630 || (GET_CODE (insn) == SET
2631 && SET_DEST (insn) == pc_rtx)))
2633 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2641 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2644 make_jump_insn_raw (pattern)
2649 insn = rtx_alloc (JUMP_INSN);
2650 INSN_UID (insn) = cur_insn_uid++;
2652 PATTERN (insn) = pattern;
2653 INSN_CODE (insn) = -1;
2654 LOG_LINKS (insn) = NULL;
2655 REG_NOTES (insn) = NULL;
2656 JUMP_LABEL (insn) = NULL;
2661 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2664 make_call_insn_raw (pattern)
2669 insn = rtx_alloc (CALL_INSN);
2670 INSN_UID (insn) = cur_insn_uid++;
2672 PATTERN (insn) = pattern;
2673 INSN_CODE (insn) = -1;
2674 LOG_LINKS (insn) = NULL;
2675 REG_NOTES (insn) = NULL;
2676 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2681 /* Add INSN to the end of the doubly-linked list.
2682 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2688 PREV_INSN (insn) = last_insn;
2689 NEXT_INSN (insn) = 0;
2691 if (NULL != last_insn)
2692 NEXT_INSN (last_insn) = insn;
2694 if (NULL == first_insn)
2700 /* Add INSN into the doubly-linked list after insn AFTER. This and
2701 the next should be the only functions called to insert an insn once
2702 delay slots have been filled since only they know how to update a
2706 add_insn_after (insn, after)
2709 rtx next = NEXT_INSN (after);
2711 if (optimize && INSN_DELETED_P (after))
2714 NEXT_INSN (insn) = next;
2715 PREV_INSN (insn) = after;
2719 PREV_INSN (next) = insn;
2720 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2721 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2723 else if (last_insn == after)
2727 struct sequence_stack *stack = seq_stack;
2728 /* Scan all pending sequences too. */
2729 for (; stack; stack = stack->next)
2730 if (after == stack->last)
2740 NEXT_INSN (after) = insn;
2741 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2743 rtx sequence = PATTERN (after);
2744 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2748 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2749 the previous should be the only functions called to insert an insn once
2750 delay slots have been filled since only they know how to update a
2754 add_insn_before (insn, before)
2757 rtx prev = PREV_INSN (before);
2759 if (optimize && INSN_DELETED_P (before))
2762 PREV_INSN (insn) = prev;
2763 NEXT_INSN (insn) = before;
2767 NEXT_INSN (prev) = insn;
2768 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2770 rtx sequence = PATTERN (prev);
2771 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2774 else if (first_insn == before)
2778 struct sequence_stack *stack = seq_stack;
2779 /* Scan all pending sequences too. */
2780 for (; stack; stack = stack->next)
2781 if (before == stack->first)
2783 stack->first = insn;
2791 PREV_INSN (before) = insn;
2792 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2793 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2796 /* Remove an insn from its doubly-linked list. This function knows how
2797 to handle sequences. */
2802 rtx next = NEXT_INSN (insn);
2803 rtx prev = PREV_INSN (insn);
2806 NEXT_INSN (prev) = next;
2807 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2809 rtx sequence = PATTERN (prev);
2810 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2813 else if (first_insn == insn)
2817 struct sequence_stack *stack = seq_stack;
2818 /* Scan all pending sequences too. */
2819 for (; stack; stack = stack->next)
2820 if (insn == stack->first)
2822 stack->first = next;
2832 PREV_INSN (next) = prev;
2833 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2834 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2836 else if (last_insn == insn)
2840 struct sequence_stack *stack = seq_stack;
2841 /* Scan all pending sequences too. */
2842 for (; stack; stack = stack->next)
2843 if (insn == stack->last)
2854 /* Delete all insns made since FROM.
2855 FROM becomes the new last instruction. */
2858 delete_insns_since (from)
2864 NEXT_INSN (from) = 0;
2868 /* This function is deprecated, please use sequences instead.
2870 Move a consecutive bunch of insns to a different place in the chain.
2871 The insns to be moved are those between FROM and TO.
2872 They are moved to a new position after the insn AFTER.
2873 AFTER must not be FROM or TO or any insn in between.
2875 This function does not know about SEQUENCEs and hence should not be
2876 called after delay-slot filling has been done. */
2879 reorder_insns (from, to, after)
2880 rtx from, to, after;
2882 /* Splice this bunch out of where it is now. */
2883 if (PREV_INSN (from))
2884 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2886 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2887 if (last_insn == to)
2888 last_insn = PREV_INSN (from);
2889 if (first_insn == from)
2890 first_insn = NEXT_INSN (to);
2892 /* Make the new neighbors point to it and it to them. */
2893 if (NEXT_INSN (after))
2894 PREV_INSN (NEXT_INSN (after)) = to;
2896 NEXT_INSN (to) = NEXT_INSN (after);
2897 PREV_INSN (from) = after;
2898 NEXT_INSN (after) = from;
2899 if (after == last_insn)
2903 /* Return the line note insn preceding INSN. */
2906 find_line_note (insn)
2909 if (no_line_numbers)
2912 for (; insn; insn = PREV_INSN (insn))
2913 if (GET_CODE (insn) == NOTE
2914 && NOTE_LINE_NUMBER (insn) >= 0)
2920 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2921 of the moved insns when debugging. This may insert a note between AFTER
2922 and FROM, and another one after TO. */
2925 reorder_insns_with_line_notes (from, to, after)
2926 rtx from, to, after;
2928 rtx from_line = find_line_note (from);
2929 rtx after_line = find_line_note (after);
2931 reorder_insns (from, to, after);
2933 if (from_line == after_line)
2937 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2938 NOTE_LINE_NUMBER (from_line),
2941 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2942 NOTE_LINE_NUMBER (after_line),
2946 /* Remove unnecessary notes from the instruction stream. */
2949 remove_unnecessary_notes ()
2951 rtx block_stack = NULL_RTX;
2952 rtx eh_stack = NULL_RTX;
2957 /* We must not remove the first instruction in the function because
2958 the compiler depends on the first instruction being a note. */
2959 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2961 /* Remember what's next. */
2962 next = NEXT_INSN (insn);
2964 /* We're only interested in notes. */
2965 if (GET_CODE (insn) != NOTE)
2968 switch (NOTE_LINE_NUMBER (insn))
2970 case NOTE_INSN_DELETED:
2974 case NOTE_INSN_EH_REGION_BEG:
2975 eh_stack = alloc_INSN_LIST (insn, eh_stack);
2978 case NOTE_INSN_EH_REGION_END:
2979 /* Too many end notes. */
2980 if (eh_stack == NULL_RTX)
2982 /* Mismatched nesting. */
2983 if (NOTE_EH_HANDLER (XEXP (eh_stack, 0)) != NOTE_EH_HANDLER (insn))
2986 eh_stack = XEXP (eh_stack, 1);
2987 free_INSN_LIST_node (tmp);
2990 case NOTE_INSN_BLOCK_BEG:
2991 /* By now, all notes indicating lexical blocks should have
2992 NOTE_BLOCK filled in. */
2993 if (NOTE_BLOCK (insn) == NULL_TREE)
2995 block_stack = alloc_INSN_LIST (insn, block_stack);
2998 case NOTE_INSN_BLOCK_END:
2999 /* Too many end notes. */
3000 if (block_stack == NULL_RTX)
3002 /* Mismatched nesting. */
3003 if (NOTE_BLOCK (XEXP (block_stack, 0)) != NOTE_BLOCK (insn))
3006 block_stack = XEXP (block_stack, 1);
3007 free_INSN_LIST_node (tmp);
3009 /* Scan back to see if there are any non-note instructions
3010 between INSN and the beginning of this block. If not,
3011 then there is no PC range in the generated code that will
3012 actually be in this block, so there's no point in
3013 remembering the existence of the block. */
3014 for (tmp = PREV_INSN (insn); tmp ; tmp = PREV_INSN (tmp))
3016 /* This block contains a real instruction. Note that we
3017 don't include labels; if the only thing in the block
3018 is a label, then there are still no PC values that
3019 lie within the block. */
3023 /* We're only interested in NOTEs. */
3024 if (GET_CODE (tmp) != NOTE)
3027 if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_BEG)
3029 /* We just verified that this BLOCK matches us with
3030 the block_stack check above. Never delete the
3031 BLOCK for the outermost scope of the function; we
3032 can refer to names from that scope even if the
3033 block notes are messed up. */
3034 if (! is_body_block (NOTE_BLOCK (insn))
3035 && (*debug_hooks->ignore_block) (NOTE_BLOCK (insn)))
3042 else if (NOTE_LINE_NUMBER (tmp) == NOTE_INSN_BLOCK_END)
3043 /* There's a nested block. We need to leave the
3044 current block in place since otherwise the debugger
3045 wouldn't be able to show symbols from our block in
3046 the nested block. */
3052 /* Too many begin notes. */
3053 if (block_stack || eh_stack)
3058 /* Emit an insn of given code and pattern
3059 at a specified place within the doubly-linked list. */
3061 /* Make an instruction with body PATTERN
3062 and output it before the instruction BEFORE. */
3065 emit_insn_before (pattern, before)
3066 register rtx pattern, before;
3068 register rtx insn = before;
3070 if (GET_CODE (pattern) == SEQUENCE)
3074 for (i = 0; i < XVECLEN (pattern, 0); i++)
3076 insn = XVECEXP (pattern, 0, i);
3077 add_insn_before (insn, before);
3082 insn = make_insn_raw (pattern);
3083 add_insn_before (insn, before);
3089 /* Similar to emit_insn_before, but update basic block boundaries as well. */
3092 emit_block_insn_before (pattern, before, block)
3093 rtx pattern, before;
3096 rtx prev = PREV_INSN (before);
3097 rtx r = emit_insn_before (pattern, before);
3098 if (block && block->head == before)
3099 block->head = NEXT_INSN (prev);
3103 /* Make an instruction with body PATTERN and code JUMP_INSN
3104 and output it before the instruction BEFORE. */
3107 emit_jump_insn_before (pattern, before)
3108 register rtx pattern, before;
3112 if (GET_CODE (pattern) == SEQUENCE)
3113 insn = emit_insn_before (pattern, before);
3116 insn = make_jump_insn_raw (pattern);
3117 add_insn_before (insn, before);
3123 /* Make an instruction with body PATTERN and code CALL_INSN
3124 and output it before the instruction BEFORE. */
3127 emit_call_insn_before (pattern, before)
3128 register rtx pattern, before;
3132 if (GET_CODE (pattern) == SEQUENCE)
3133 insn = emit_insn_before (pattern, before);
3136 insn = make_call_insn_raw (pattern);
3137 add_insn_before (insn, before);
3138 PUT_CODE (insn, CALL_INSN);
3144 /* Make an insn of code BARRIER
3145 and output it before the insn BEFORE. */
3148 emit_barrier_before (before)
3149 register rtx before;
3151 register rtx insn = rtx_alloc (BARRIER);
3153 INSN_UID (insn) = cur_insn_uid++;
3155 add_insn_before (insn, before);
3159 /* Emit the label LABEL before the insn BEFORE. */
3162 emit_label_before (label, before)
3165 /* This can be called twice for the same label as a result of the
3166 confusion that follows a syntax error! So make it harmless. */
3167 if (INSN_UID (label) == 0)
3169 INSN_UID (label) = cur_insn_uid++;
3170 add_insn_before (label, before);
3176 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3179 emit_note_before (subtype, before)
3183 register rtx note = rtx_alloc (NOTE);
3184 INSN_UID (note) = cur_insn_uid++;
3185 NOTE_SOURCE_FILE (note) = 0;
3186 NOTE_LINE_NUMBER (note) = subtype;
3188 add_insn_before (note, before);
3192 /* Make an insn of code INSN with body PATTERN
3193 and output it after the insn AFTER. */
3196 emit_insn_after (pattern, after)
3197 register rtx pattern, after;
3199 register rtx insn = after;
3201 if (GET_CODE (pattern) == SEQUENCE)
3205 for (i = 0; i < XVECLEN (pattern, 0); i++)
3207 insn = XVECEXP (pattern, 0, i);
3208 add_insn_after (insn, after);
3214 insn = make_insn_raw (pattern);
3215 add_insn_after (insn, after);
3221 /* Similar to emit_insn_after, except that line notes are to be inserted so
3222 as to act as if this insn were at FROM. */
3225 emit_insn_after_with_line_notes (pattern, after, from)
3226 rtx pattern, after, from;
3228 rtx from_line = find_line_note (from);
3229 rtx after_line = find_line_note (after);
3230 rtx insn = emit_insn_after (pattern, after);
3233 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3234 NOTE_LINE_NUMBER (from_line),
3238 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3239 NOTE_LINE_NUMBER (after_line),
3243 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3246 emit_block_insn_after (pattern, after, block)
3250 rtx r = emit_insn_after (pattern, after);
3251 if (block && block->end == after)
3256 /* Make an insn of code JUMP_INSN with body PATTERN
3257 and output it after the insn AFTER. */
3260 emit_jump_insn_after (pattern, after)
3261 register rtx pattern, after;
3265 if (GET_CODE (pattern) == SEQUENCE)
3266 insn = emit_insn_after (pattern, after);
3269 insn = make_jump_insn_raw (pattern);
3270 add_insn_after (insn, after);
3276 /* Make an insn of code BARRIER
3277 and output it after the insn AFTER. */
3280 emit_barrier_after (after)
3283 register rtx insn = rtx_alloc (BARRIER);
3285 INSN_UID (insn) = cur_insn_uid++;
3287 add_insn_after (insn, after);
3291 /* Emit the label LABEL after the insn AFTER. */
3294 emit_label_after (label, after)
3297 /* This can be called twice for the same label
3298 as a result of the confusion that follows a syntax error!
3299 So make it harmless. */
3300 if (INSN_UID (label) == 0)
3302 INSN_UID (label) = cur_insn_uid++;
3303 add_insn_after (label, after);
3309 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3312 emit_note_after (subtype, after)
3316 register rtx note = rtx_alloc (NOTE);
3317 INSN_UID (note) = cur_insn_uid++;
3318 NOTE_SOURCE_FILE (note) = 0;
3319 NOTE_LINE_NUMBER (note) = subtype;
3320 add_insn_after (note, after);
3324 /* Emit a line note for FILE and LINE after the insn AFTER. */
3327 emit_line_note_after (file, line, after)
3334 if (no_line_numbers && line > 0)
3340 note = rtx_alloc (NOTE);
3341 INSN_UID (note) = cur_insn_uid++;
3342 NOTE_SOURCE_FILE (note) = file;
3343 NOTE_LINE_NUMBER (note) = line;
3344 add_insn_after (note, after);
3348 /* Make an insn of code INSN with pattern PATTERN
3349 and add it to the end of the doubly-linked list.
3350 If PATTERN is a SEQUENCE, take the elements of it
3351 and emit an insn for each element.
3353 Returns the last insn emitted. */
3359 rtx insn = last_insn;
3361 if (GET_CODE (pattern) == SEQUENCE)
3365 for (i = 0; i < XVECLEN (pattern, 0); i++)
3367 insn = XVECEXP (pattern, 0, i);
3373 insn = make_insn_raw (pattern);
3380 /* Emit the insns in a chain starting with INSN.
3381 Return the last insn emitted. */
3391 rtx next = NEXT_INSN (insn);
3400 /* Emit the insns in a chain starting with INSN and place them in front of
3401 the insn BEFORE. Return the last insn emitted. */
3404 emit_insns_before (insn, before)
3412 rtx next = NEXT_INSN (insn);
3413 add_insn_before (insn, before);
3421 /* Emit the insns in a chain starting with FIRST and place them in back of
3422 the insn AFTER. Return the last insn emitted. */
3425 emit_insns_after (first, after)
3430 register rtx after_after;
3438 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3441 after_after = NEXT_INSN (after);
3443 NEXT_INSN (after) = first;
3444 PREV_INSN (first) = after;
3445 NEXT_INSN (last) = after_after;
3447 PREV_INSN (after_after) = last;
3449 if (after == last_insn)
3454 /* Make an insn of code JUMP_INSN with pattern PATTERN
3455 and add it to the end of the doubly-linked list. */
3458 emit_jump_insn (pattern)
3461 if (GET_CODE (pattern) == SEQUENCE)
3462 return emit_insn (pattern);
3465 register rtx insn = make_jump_insn_raw (pattern);
3471 /* Make an insn of code CALL_INSN with pattern PATTERN
3472 and add it to the end of the doubly-linked list. */
3475 emit_call_insn (pattern)
3478 if (GET_CODE (pattern) == SEQUENCE)
3479 return emit_insn (pattern);
3482 register rtx insn = make_call_insn_raw (pattern);
3484 PUT_CODE (insn, CALL_INSN);
3489 /* Add the label LABEL to the end of the doubly-linked list. */
3495 /* This can be called twice for the same label
3496 as a result of the confusion that follows a syntax error!
3497 So make it harmless. */
3498 if (INSN_UID (label) == 0)
3500 INSN_UID (label) = cur_insn_uid++;
3506 /* Make an insn of code BARRIER
3507 and add it to the end of the doubly-linked list. */
3512 register rtx barrier = rtx_alloc (BARRIER);
3513 INSN_UID (barrier) = cur_insn_uid++;
3518 /* Make an insn of code NOTE
3519 with data-fields specified by FILE and LINE
3520 and add it to the end of the doubly-linked list,
3521 but only if line-numbers are desired for debugging info. */
3524 emit_line_note (file, line)
3528 set_file_and_line_for_stmt (file, line);
3531 if (no_line_numbers)
3535 return emit_note (file, line);
3538 /* Make an insn of code NOTE
3539 with data-fields specified by FILE and LINE
3540 and add it to the end of the doubly-linked list.
3541 If it is a line-number NOTE, omit it if it matches the previous one. */
3544 emit_note (file, line)
3552 if (file && last_filename && !strcmp (file, last_filename)
3553 && line == last_linenum)
3555 last_filename = file;
3556 last_linenum = line;
3559 if (no_line_numbers && line > 0)
3565 note = rtx_alloc (NOTE);
3566 INSN_UID (note) = cur_insn_uid++;
3567 NOTE_SOURCE_FILE (note) = file;
3568 NOTE_LINE_NUMBER (note) = line;
3573 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3576 emit_line_note_force (file, line)
3581 return emit_line_note (file, line);
3584 /* Cause next statement to emit a line note even if the line number
3585 has not changed. This is used at the beginning of a function. */
3588 force_next_line_note ()
3593 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3594 note of this type already exists, remove it first. */
3597 set_unique_reg_note (insn, kind, datum)
3602 rtx note = find_reg_note (insn, kind, NULL_RTX);
3604 /* First remove the note if there already is one. */
3606 remove_note (insn, note);
3608 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3611 /* Return an indication of which type of insn should have X as a body.
3612 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3618 if (GET_CODE (x) == CODE_LABEL)
3620 if (GET_CODE (x) == CALL)
3622 if (GET_CODE (x) == RETURN)
3624 if (GET_CODE (x) == SET)
3626 if (SET_DEST (x) == pc_rtx)
3628 else if (GET_CODE (SET_SRC (x)) == CALL)
3633 if (GET_CODE (x) == PARALLEL)
3636 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3637 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3639 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3640 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3642 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3643 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3649 /* Emit the rtl pattern X as an appropriate kind of insn.
3650 If X is a label, it is simply added into the insn chain. */
3656 enum rtx_code code = classify_insn (x);
3658 if (code == CODE_LABEL)
3659 return emit_label (x);
3660 else if (code == INSN)
3661 return emit_insn (x);
3662 else if (code == JUMP_INSN)
3664 register rtx insn = emit_jump_insn (x);
3665 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3666 return emit_barrier ();
3669 else if (code == CALL_INSN)
3670 return emit_call_insn (x);
3675 /* Begin emitting insns to a sequence which can be packaged in an
3676 RTL_EXPR. If this sequence will contain something that might cause
3677 the compiler to pop arguments to function calls (because those
3678 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3679 details), use do_pending_stack_adjust before calling this function.
3680 That will ensure that the deferred pops are not accidentally
3681 emitted in the middle of this sequence. */
3686 struct sequence_stack *tem;
3688 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3690 tem->next = seq_stack;
3691 tem->first = first_insn;
3692 tem->last = last_insn;
3693 tem->sequence_rtl_expr = seq_rtl_expr;
3701 /* Similarly, but indicate that this sequence will be placed in T, an
3702 RTL_EXPR. See the documentation for start_sequence for more
3703 information about how to use this function. */
3706 start_sequence_for_rtl_expr (t)
3714 /* Set up the insn chain starting with FIRST as the current sequence,
3715 saving the previously current one. See the documentation for
3716 start_sequence for more information about how to use this function. */
3719 push_to_sequence (first)
3726 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3732 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3735 push_to_full_sequence (first, last)
3741 /* We really should have the end of the insn chain here. */
3742 if (last && NEXT_INSN (last))
3746 /* Set up the outer-level insn chain
3747 as the current sequence, saving the previously current one. */
3750 push_topmost_sequence ()
3752 struct sequence_stack *stack, *top = NULL;
3756 for (stack = seq_stack; stack; stack = stack->next)
3759 first_insn = top->first;
3760 last_insn = top->last;
3761 seq_rtl_expr = top->sequence_rtl_expr;
3764 /* After emitting to the outer-level insn chain, update the outer-level
3765 insn chain, and restore the previous saved state. */
3768 pop_topmost_sequence ()
3770 struct sequence_stack *stack, *top = NULL;
3772 for (stack = seq_stack; stack; stack = stack->next)
3775 top->first = first_insn;
3776 top->last = last_insn;
3777 /* ??? Why don't we save seq_rtl_expr here? */
3782 /* After emitting to a sequence, restore previous saved state.
3784 To get the contents of the sequence just made, you must call
3785 `gen_sequence' *before* calling here.
3787 If the compiler might have deferred popping arguments while
3788 generating this sequence, and this sequence will not be immediately
3789 inserted into the instruction stream, use do_pending_stack_adjust
3790 before calling gen_sequence. That will ensure that the deferred
3791 pops are inserted into this sequence, and not into some random
3792 location in the instruction stream. See INHIBIT_DEFER_POP for more
3793 information about deferred popping of arguments. */
3798 struct sequence_stack *tem = seq_stack;
3800 first_insn = tem->first;
3801 last_insn = tem->last;
3802 seq_rtl_expr = tem->sequence_rtl_expr;
3803 seq_stack = tem->next;
3808 /* This works like end_sequence, but records the old sequence in FIRST
3812 end_full_sequence (first, last)
3815 *first = first_insn;
3820 /* Return 1 if currently emitting into a sequence. */
3825 return seq_stack != 0;
3828 /* Generate a SEQUENCE rtx containing the insns already emitted
3829 to the current sequence.
3831 This is how the gen_... function from a DEFINE_EXPAND
3832 constructs the SEQUENCE that it returns. */
3842 /* Count the insns in the chain. */
3844 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3847 /* If only one insn, return it rather than a SEQUENCE.
3848 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3849 the case of an empty list.)
3850 We only return the pattern of an insn if its code is INSN and it
3851 has no notes. This ensures that no information gets lost. */
3853 && ! RTX_FRAME_RELATED_P (first_insn)
3854 && GET_CODE (first_insn) == INSN
3855 /* Don't throw away any reg notes. */
3856 && REG_NOTES (first_insn) == 0)
3857 return PATTERN (first_insn);
3859 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3861 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3862 XVECEXP (result, 0, i) = tem;
3867 /* Put the various virtual registers into REGNO_REG_RTX. */
3870 init_virtual_regs (es)
3871 struct emit_status *es;
3873 rtx *ptr = es->x_regno_reg_rtx;
3874 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3875 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3876 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3877 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3878 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3882 clear_emit_caches ()
3886 /* Clear the start_sequence/gen_sequence cache. */
3887 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3888 sequence_result[i] = 0;
3892 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3893 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3894 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3895 static int copy_insn_n_scratches;
3897 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3898 copied an ASM_OPERANDS.
3899 In that case, it is the original input-operand vector. */
3900 static rtvec orig_asm_operands_vector;
3902 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3903 copied an ASM_OPERANDS.
3904 In that case, it is the copied input-operand vector. */
3905 static rtvec copy_asm_operands_vector;
3907 /* Likewise for the constraints vector. */
3908 static rtvec orig_asm_constraints_vector;
3909 static rtvec copy_asm_constraints_vector;
3911 /* Recursively create a new copy of an rtx for copy_insn.
3912 This function differs from copy_rtx in that it handles SCRATCHes and
3913 ASM_OPERANDs properly.
3914 Normally, this function is not used directly; use copy_insn as front end.
3915 However, you could first copy an insn pattern with copy_insn and then use
3916 this function afterwards to properly copy any REG_NOTEs containing
3925 register RTX_CODE code;
3926 register const char *format_ptr;
3928 code = GET_CODE (orig);
3944 for (i = 0; i < copy_insn_n_scratches; i++)
3945 if (copy_insn_scratch_in[i] == orig)
3946 return copy_insn_scratch_out[i];
3950 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3951 a LABEL_REF, it isn't sharable. */
3952 if (GET_CODE (XEXP (orig, 0)) == PLUS
3953 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3954 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3958 /* A MEM with a constant address is not sharable. The problem is that
3959 the constant address may need to be reloaded. If the mem is shared,
3960 then reloading one copy of this mem will cause all copies to appear
3961 to have been reloaded. */
3967 copy = rtx_alloc (code);
3969 /* Copy the various flags, and other information. We assume that
3970 all fields need copying, and then clear the fields that should
3971 not be copied. That is the sensible default behavior, and forces
3972 us to explicitly document why we are *not* copying a flag. */
3973 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3975 /* We do not copy the USED flag, which is used as a mark bit during
3976 walks over the RTL. */
3979 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3980 if (GET_RTX_CLASS (code) == 'i')
3984 copy->frame_related = 0;
3987 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3989 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3991 copy->fld[i] = orig->fld[i];
3992 switch (*format_ptr++)
3995 if (XEXP (orig, i) != NULL)
3996 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
4001 if (XVEC (orig, i) == orig_asm_constraints_vector)
4002 XVEC (copy, i) = copy_asm_constraints_vector;
4003 else if (XVEC (orig, i) == orig_asm_operands_vector)
4004 XVEC (copy, i) = copy_asm_operands_vector;
4005 else if (XVEC (orig, i) != NULL)
4007 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
4008 for (j = 0; j < XVECLEN (copy, i); j++)
4009 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
4020 /* These are left unchanged. */
4028 if (code == SCRATCH)
4030 i = copy_insn_n_scratches++;
4031 if (i >= MAX_RECOG_OPERANDS)
4033 copy_insn_scratch_in[i] = orig;
4034 copy_insn_scratch_out[i] = copy;
4036 else if (code == ASM_OPERANDS)
4038 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
4039 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
4040 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
4041 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
4047 /* Create a new copy of an rtx.
4048 This function differs from copy_rtx in that it handles SCRATCHes and
4049 ASM_OPERANDs properly.
4050 INSN doesn't really have to be a full INSN; it could be just the
4056 copy_insn_n_scratches = 0;
4057 orig_asm_operands_vector = 0;
4058 orig_asm_constraints_vector = 0;
4059 copy_asm_operands_vector = 0;
4060 copy_asm_constraints_vector = 0;
4061 return copy_insn_1 (insn);
4064 /* Initialize data structures and variables in this file
4065 before generating rtl for each function. */
4070 struct function *f = cfun;
4072 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
4075 seq_rtl_expr = NULL;
4077 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
4080 first_label_num = label_num;
4084 clear_emit_caches ();
4086 /* Init the tables that describe all the pseudo regs. */
4088 f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
4090 f->emit->regno_pointer_align
4091 = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
4092 sizeof (unsigned char));
4095 = (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
4098 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
4099 init_virtual_regs (f->emit);
4101 /* Indicate that the virtual registers and stack locations are
4103 REG_POINTER (stack_pointer_rtx) = 1;
4104 REG_POINTER (frame_pointer_rtx) = 1;
4105 REG_POINTER (hard_frame_pointer_rtx) = 1;
4106 REG_POINTER (arg_pointer_rtx) = 1;
4108 REG_POINTER (virtual_incoming_args_rtx) = 1;
4109 REG_POINTER (virtual_stack_vars_rtx) = 1;
4110 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
4111 REG_POINTER (virtual_outgoing_args_rtx) = 1;
4112 REG_POINTER (virtual_cfa_rtx) = 1;
4114 #ifdef STACK_BOUNDARY
4115 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
4116 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4117 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
4118 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
4120 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
4121 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
4122 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
4123 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
4124 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
4127 #ifdef INIT_EXPANDERS
4132 /* Mark SS for GC. */
4135 mark_sequence_stack (ss)
4136 struct sequence_stack *ss;
4140 ggc_mark_rtx (ss->first);
4141 ggc_mark_tree (ss->sequence_rtl_expr);
4146 /* Mark ES for GC. */
4149 mark_emit_status (es)
4150 struct emit_status *es;
4158 for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
4162 mark_sequence_stack (es->sequence_stack);
4163 ggc_mark_tree (es->sequence_rtl_expr);
4164 ggc_mark_rtx (es->x_first_insn);
4167 /* Create some permanent unique rtl objects shared between all functions.
4168 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4171 init_emit_once (line_numbers)
4175 enum machine_mode mode;
4176 enum machine_mode double_mode;
4178 /* Initialize the CONST_INT hash table. */
4179 const_int_htab = htab_create (37, const_int_htab_hash,
4180 const_int_htab_eq, NULL);
4181 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4184 no_line_numbers = ! line_numbers;
4186 /* Compute the word and byte modes. */
4188 byte_mode = VOIDmode;
4189 word_mode = VOIDmode;
4190 double_mode = VOIDmode;
4192 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4193 mode = GET_MODE_WIDER_MODE (mode))
4195 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4196 && byte_mode == VOIDmode)
4199 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4200 && word_mode == VOIDmode)
4204 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4205 mode = GET_MODE_WIDER_MODE (mode))
4207 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4208 && double_mode == VOIDmode)
4212 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4214 /* Assign register numbers to the globally defined register rtx.
4215 This must be done at runtime because the register number field
4216 is in a union and some compilers can't initialize unions. */
4218 pc_rtx = gen_rtx (PC, VOIDmode);
4219 cc0_rtx = gen_rtx (CC0, VOIDmode);
4220 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
4221 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4222 if (hard_frame_pointer_rtx == 0)
4223 hard_frame_pointer_rtx = gen_raw_REG (Pmode,
4224 HARD_FRAME_POINTER_REGNUM);
4225 if (arg_pointer_rtx == 0)
4226 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
4227 virtual_incoming_args_rtx =
4228 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4229 virtual_stack_vars_rtx =
4230 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4231 virtual_stack_dynamic_rtx =
4232 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4233 virtual_outgoing_args_rtx =
4234 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4235 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4237 /* These rtx must be roots if GC is enabled. */
4238 ggc_add_rtx_root (global_rtl, GR_MAX);
4240 #ifdef INIT_EXPANDERS
4241 /* This is to initialize {init|mark|free}_machine_status before the first
4242 call to push_function_context_to. This is needed by the Chill front
4243 end which calls push_function_context_to before the first cal to
4244 init_function_start. */
4248 /* Create the unique rtx's for certain rtx codes and operand values. */
4250 /* Don't use gen_rtx here since gen_rtx in this case
4251 tries to use these variables. */
4252 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4253 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4254 gen_rtx_raw_CONST_INT (VOIDmode, i);
4255 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4257 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4258 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4259 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4261 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4263 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4264 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4265 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4266 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4268 for (i = 0; i <= 2; i++)
4270 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4271 mode = GET_MODE_WIDER_MODE (mode))
4273 rtx tem = rtx_alloc (CONST_DOUBLE);
4274 union real_extract u;
4276 /* Zero any holes in a structure. */
4277 memset ((char *) &u, 0, sizeof u);
4278 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4280 /* Avoid trailing garbage in the rtx. */
4281 if (sizeof (u) < sizeof (HOST_WIDE_INT))
4282 CONST_DOUBLE_LOW (tem) = 0;
4283 if (sizeof (u) < 2 * sizeof (HOST_WIDE_INT))
4284 CONST_DOUBLE_HIGH (tem) = 0;
4286 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4287 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4288 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4289 PUT_MODE (tem, mode);
4291 const_tiny_rtx[i][(int) mode] = tem;
4294 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4296 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4297 mode = GET_MODE_WIDER_MODE (mode))
4298 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4300 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4302 mode = GET_MODE_WIDER_MODE (mode))
4303 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4306 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
4307 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
4308 const_tiny_rtx[0][i] = const0_rtx;
4310 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4311 if (STORE_FLAG_VALUE == 1)
4312 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4314 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4315 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4316 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4317 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4318 ggc_add_rtx_root (&const_true_rtx, 1);
4320 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4321 return_address_pointer_rtx
4322 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4326 struct_value_rtx = STRUCT_VALUE;
4328 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4331 #ifdef STRUCT_VALUE_INCOMING
4332 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4334 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4335 struct_value_incoming_rtx
4336 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4338 struct_value_incoming_rtx = struct_value_rtx;
4342 #ifdef STATIC_CHAIN_REGNUM
4343 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4345 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4346 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4347 static_chain_incoming_rtx
4348 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4351 static_chain_incoming_rtx = static_chain_rtx;
4355 static_chain_rtx = STATIC_CHAIN;
4357 #ifdef STATIC_CHAIN_INCOMING
4358 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4360 static_chain_incoming_rtx = static_chain_rtx;
4364 if (PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
4365 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4367 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4368 ggc_add_rtx_root (&struct_value_rtx, 1);
4369 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4370 ggc_add_rtx_root (&static_chain_rtx, 1);
4371 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4372 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4375 /* Query and clear/ restore no_line_numbers. This is used by the
4376 switch / case handling in stmt.c to give proper line numbers in
4377 warnings about unreachable code. */
4380 force_line_numbers ()
4382 int old = no_line_numbers;
4384 no_line_numbers = 0;
4386 force_next_line_note ();
4391 restore_line_number_status (old_value)
4394 no_line_numbers = old_value;