1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
66 /* This is *not* reset after each function. It gives each CODE_LABEL
67 in the entire compilation a unique label number. */
69 static int label_num = 1;
71 /* Highest label number in current function.
72 Zero means use the value of label_num instead.
73 This is nonzero only when belatedly compiling an inline function. */
75 static int last_label_num;
77 /* Value label_num had when set_new_first_and_last_label_number was called.
78 If label_num has not changed since then, last_label_num is valid. */
80 static int base_label_num;
82 /* Nonzero means do not generate NOTEs for source line numbers. */
84 static int no_line_numbers;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these except perhaps the floating-point CONST_DOUBLEs
89 are unique; no other rtx-object will be equal to any of these. */
91 rtx global_rtl[GR_MAX];
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx. */
97 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
101 REAL_VALUE_TYPE dconst0;
102 REAL_VALUE_TYPE dconst1;
103 REAL_VALUE_TYPE dconst2;
104 REAL_VALUE_TYPE dconstm1;
106 /* All references to the following fixed hard registers go through
107 these unique rtl objects. On machines where the frame-pointer and
108 arg-pointer are the same register, they use the same unique object.
110 After register allocation, other rtl objects which used to be pseudo-regs
111 may be clobbered to refer to the frame-pointer register.
112 But references that were originally to the frame-pointer can be
113 distinguished from the others because they contain frame_pointer_rtx.
115 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
116 tricky: until register elimination has taken place hard_frame_pointer_rtx
117 should be used if it is being set, and frame_pointer_rtx otherwise. After
118 register elimination hard_frame_pointer_rtx should always be used.
119 On machines where the two registers are same (most) then these are the
122 In an inline procedure, the stack and frame pointer rtxs may not be
123 used for anything else. */
124 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
125 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
126 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
127 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
128 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
130 /* This is used to implement __builtin_return_address for some machines.
131 See for instance the MIPS port. */
132 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
134 /* We make one copy of (const_int C) where C is in
135 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
136 to save space during the compilation and simplify comparisons of
139 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 static htab_t const_int_htab;
146 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
147 shortly thrown away. We use two mechanisms to prevent this waste:
149 For sizes up to 5 elements, we keep a SEQUENCE and its associated
150 rtvec for use by gen_sequence. One entry for each size is
151 sufficient because most cases are calls to gen_sequence followed by
152 immediately emitting the SEQUENCE. Reuse is safe since emitting a
153 sequence is destructive on the insn in it anyway and hence can't be
156 We do not bother to save this cached data over nested function calls.
157 Instead, we just reinitialize them. */
159 #define SEQUENCE_RESULT_SIZE 5
161 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
163 /* During RTL generation, we also keep a list of free INSN rtl codes. */
164 static rtx free_insn;
166 #define first_insn (cfun->emit->x_first_insn)
167 #define last_insn (cfun->emit->x_last_insn)
168 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
169 #define last_linenum (cfun->emit->x_last_linenum)
170 #define last_filename (cfun->emit->x_last_filename)
171 #define first_label_num (cfun->emit->x_first_label_num)
173 /* This is where the pointer to the obstack being used for RTL is stored. */
174 extern struct obstack *rtl_obstack;
176 static rtx make_jump_insn_raw PARAMS ((rtx));
177 static rtx make_call_insn_raw PARAMS ((rtx));
178 static rtx find_line_note PARAMS ((rtx));
179 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
180 static void unshare_all_rtl_1 PARAMS ((rtx));
181 static hashval_t const_int_htab_hash PARAMS ((const void *));
182 static int const_int_htab_eq PARAMS ((const void *,
184 static int rtx_htab_mark_1 PARAMS ((void **, void *));
185 static void rtx_htab_mark PARAMS ((void *));
188 /* Returns a hash code for X (which is a really a CONST_INT). */
191 const_int_htab_hash (x)
194 return (hashval_t) INTVAL ((const struct rtx_def *) x);
197 /* Returns non-zero if the value represented by X (which is really a
198 CONST_INT) is the same as that given by Y (which is really a
202 const_int_htab_eq (x, y)
206 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
209 /* Mark the hash-table element X (which is really a pointer to an
213 rtx_htab_mark_1 (x, data)
215 void *data ATTRIBUTE_UNUSED;
221 /* Mark all the elements of HTAB (which is really an htab_t full of
228 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
231 /* There are some RTL codes that require special attention; the generation
232 functions do the raw handling. If you add to this list, modify
233 special_rtx in gengenrtl.c as well. */
236 gen_rtx_CONST_INT (mode, arg)
237 enum machine_mode mode ATTRIBUTE_UNUSED;
242 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
243 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
245 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
246 if (const_true_rtx && arg == STORE_FLAG_VALUE)
247 return const_true_rtx;
250 /* Look up the CONST_INT in the hash table. */
251 slot = htab_find_slot_with_hash (const_int_htab,
259 push_obstacks_nochange ();
260 end_temporary_allocation ();
262 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
270 /* CONST_DOUBLEs needs special handling because its length is known
273 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
274 enum machine_mode mode;
276 HOST_WIDE_INT arg1, arg2;
278 rtx r = rtx_alloc (CONST_DOUBLE);
283 X0EXP (r, 1) = NULL_RTX;
287 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
294 gen_rtx_REG (mode, regno)
295 enum machine_mode mode;
298 /* In case the MD file explicitly references the frame pointer, have
299 all such references point to the same frame pointer. This is
300 used during frame pointer elimination to distinguish the explicit
301 references to these registers from pseudos that happened to be
304 If we have eliminated the frame pointer or arg pointer, we will
305 be using it as a normal register, for example as a spill
306 register. In such cases, we might be accessing it in a mode that
307 is not Pmode and therefore cannot use the pre-allocated rtx.
309 Also don't do this when we are making new REGs in reload, since
310 we don't want to get confused with the real pointers. */
312 if (mode == Pmode && !reload_in_progress)
314 if (regno == FRAME_POINTER_REGNUM)
315 return frame_pointer_rtx;
316 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
317 if (regno == HARD_FRAME_POINTER_REGNUM)
318 return hard_frame_pointer_rtx;
320 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
321 if (regno == ARG_POINTER_REGNUM)
322 return arg_pointer_rtx;
324 #ifdef RETURN_ADDRESS_POINTER_REGNUM
325 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
326 return return_address_pointer_rtx;
328 if (regno == STACK_POINTER_REGNUM)
329 return stack_pointer_rtx;
332 return gen_rtx_raw_REG (mode, regno);
336 gen_rtx_MEM (mode, addr)
337 enum machine_mode mode;
340 rtx rt = gen_rtx_raw_MEM (mode, addr);
342 /* This field is not cleared by the mere allocation of the rtx, so
344 MEM_ALIAS_SET (rt) = 0;
349 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
351 ** This routine generates an RTX of the size specified by
352 ** <code>, which is an RTX code. The RTX structure is initialized
353 ** from the arguments <element1> through <elementn>, which are
354 ** interpreted according to the specific RTX type's format. The
355 ** special machine mode associated with the rtx (if any) is specified
358 ** gen_rtx can be invoked in a way which resembles the lisp-like
359 ** rtx it will generate. For example, the following rtx structure:
361 ** (plus:QI (mem:QI (reg:SI 1))
362 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
364 ** ...would be generated by the following C code:
366 ** gen_rtx (PLUS, QImode,
367 ** gen_rtx (MEM, QImode,
368 ** gen_rtx (REG, SImode, 1)),
369 ** gen_rtx (MEM, QImode,
370 ** gen_rtx (PLUS, SImode,
371 ** gen_rtx (REG, SImode, 2),
372 ** gen_rtx (REG, SImode, 3)))),
377 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
379 #ifndef ANSI_PROTOTYPES
381 enum machine_mode mode;
384 register int i; /* Array indices... */
385 register const char *fmt; /* Current rtx's format... */
386 register rtx rt_val; /* RTX to return to caller... */
390 #ifndef ANSI_PROTOTYPES
391 code = va_arg (p, enum rtx_code);
392 mode = va_arg (p, enum machine_mode);
398 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
403 rtx arg0 = va_arg (p, rtx);
404 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
405 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
406 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
411 rt_val = gen_rtx_REG (mode, va_arg (p, int));
415 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
419 rt_val = rtx_alloc (code); /* Allocate the storage space. */
420 rt_val->mode = mode; /* Store the machine mode... */
422 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
423 for (i = 0; i < GET_RTX_LENGTH (code); i++)
427 case '0': /* Unused field. */
430 case 'i': /* An integer? */
431 XINT (rt_val, i) = va_arg (p, int);
434 case 'w': /* A wide integer? */
435 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
438 case 's': /* A string? */
439 XSTR (rt_val, i) = va_arg (p, char *);
442 case 'e': /* An expression? */
443 case 'u': /* An insn? Same except when printing. */
444 XEXP (rt_val, i) = va_arg (p, rtx);
447 case 'E': /* An RTX vector? */
448 XVEC (rt_val, i) = va_arg (p, rtvec);
451 case 'b': /* A bitmap? */
452 XBITMAP (rt_val, i) = va_arg (p, bitmap);
455 case 't': /* A tree? */
456 XTREE (rt_val, i) = va_arg (p, tree);
470 /* gen_rtvec (n, [rt1, ..., rtn])
472 ** This routine creates an rtvec and stores within it the
473 ** pointers to rtx's which are its arguments.
478 gen_rtvec VPARAMS ((int n, ...))
480 #ifndef ANSI_PROTOTYPES
489 #ifndef ANSI_PROTOTYPES
494 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
496 vector = (rtx *) alloca (n * sizeof (rtx));
498 for (i = 0; i < n; i++)
499 vector[i] = va_arg (p, rtx);
502 return gen_rtvec_v (n, vector);
506 gen_rtvec_v (n, argp)
511 register rtvec rt_val;
514 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
516 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
518 for (i = 0; i < n; i++)
519 rt_val->elem[i] = *argp++;
525 /* Generate a REG rtx for a new pseudo register of mode MODE.
526 This pseudo is assigned the next sequential register number. */
530 enum machine_mode mode;
532 struct function *f = cfun;
535 /* Don't let anything called after initial flow analysis create new
540 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
541 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
543 /* For complex modes, don't make a single pseudo.
544 Instead, make a CONCAT of two pseudos.
545 This allows noncontiguous allocation of the real and imaginary parts,
546 which makes much better code. Besides, allocating DCmode
547 pseudos overstrains reload on some machines like the 386. */
548 rtx realpart, imagpart;
549 int size = GET_MODE_UNIT_SIZE (mode);
550 enum machine_mode partmode
551 = mode_for_size (size * BITS_PER_UNIT,
552 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
553 ? MODE_FLOAT : MODE_INT),
556 realpart = gen_reg_rtx (partmode);
557 imagpart = gen_reg_rtx (partmode);
558 return gen_rtx_CONCAT (mode, realpart, imagpart);
561 /* Make sure regno_pointer_flag and regno_reg_rtx are large
562 enough to have an element for this pseudo reg number. */
564 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
566 int old_size = f->emit->regno_pointer_flag_length;
569 new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
570 memset (new + old_size, 0, old_size);
571 f->emit->regno_pointer_flag = new;
573 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
574 memset (new + old_size, 0, old_size);
575 f->emit->regno_pointer_align = new;
577 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
578 old_size * 2 * sizeof (rtx));
579 memset (new1 + old_size, 0, old_size * sizeof (rtx));
580 regno_reg_rtx = new1;
582 f->emit->regno_pointer_flag_length = old_size * 2;
585 val = gen_rtx_raw_REG (mode, reg_rtx_no);
586 regno_reg_rtx[reg_rtx_no++] = val;
590 /* Identify REG (which may be a CONCAT) as a user register. */
596 if (GET_CODE (reg) == CONCAT)
598 REG_USERVAR_P (XEXP (reg, 0)) = 1;
599 REG_USERVAR_P (XEXP (reg, 1)) = 1;
601 else if (GET_CODE (reg) == REG)
602 REG_USERVAR_P (reg) = 1;
607 /* Identify REG as a probable pointer register and show its alignment
608 as ALIGN, if nonzero. */
611 mark_reg_pointer (reg, align)
615 if (! REGNO_POINTER_FLAG (REGNO (reg)))
617 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
620 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
622 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
623 /* We can no-longer be sure just how aligned this pointer is */
624 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
627 /* Return 1 plus largest pseudo reg number used in the current function. */
635 /* Return 1 + the largest label number used so far in the current function. */
640 if (last_label_num && label_num == base_label_num)
641 return last_label_num;
645 /* Return first label number used in this function (if any were used). */
648 get_first_label_num ()
650 return first_label_num;
653 /* Return a value representing some low-order bits of X, where the number
654 of low-order bits is given by MODE. Note that no conversion is done
655 between floating-point and fixed-point values, rather, the bit
656 representation is returned.
658 This function handles the cases in common between gen_lowpart, below,
659 and two variants in cse.c and combine.c. These are the cases that can
660 be safely handled at all points in the compilation.
662 If this is not a case we can handle, return 0. */
665 gen_lowpart_common (mode, x)
666 enum machine_mode mode;
671 if (GET_MODE (x) == mode)
674 /* MODE must occupy no more words than the mode of X. */
675 if (GET_MODE (x) != VOIDmode
676 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
677 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
681 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
682 word = ((GET_MODE_SIZE (GET_MODE (x))
683 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
686 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
687 && (GET_MODE_CLASS (mode) == MODE_INT
688 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
690 /* If we are getting the low-order part of something that has been
691 sign- or zero-extended, we can either just use the object being
692 extended or make a narrower extension. If we want an even smaller
693 piece than the size of the object being extended, call ourselves
696 This case is used mostly by combine and cse. */
698 if (GET_MODE (XEXP (x, 0)) == mode)
700 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
701 return gen_lowpart_common (mode, XEXP (x, 0));
702 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
703 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
705 else if (GET_CODE (x) == SUBREG
706 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
707 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
708 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
710 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
711 else if (GET_CODE (x) == REG)
713 /* Let the backend decide how many registers to skip. This is needed
714 in particular for Sparc64 where fp regs are smaller than a word. */
715 /* ??? Note that subregs are now ambiguous, in that those against
716 pseudos are sized by the Word Size, while those against hard
717 regs are sized by the underlying register size. Better would be
718 to always interpret the subreg offset parameter as bytes or bits. */
720 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
721 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
722 - HARD_REGNO_NREGS (REGNO (x), mode));
724 /* If the register is not valid for MODE, return 0. If we don't
725 do this, there is no way to fix up the resulting REG later.
726 But we do do this if the current REG is not valid for its
727 mode. This latter is a kludge, but is required due to the
728 way that parameters are passed on some machines, most
730 if (REGNO (x) < FIRST_PSEUDO_REGISTER
731 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
732 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
734 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
735 /* integrate.c can't handle parts of a return value register. */
736 && (! REG_FUNCTION_VALUE_P (x)
737 || ! rtx_equal_function_value_matters)
738 #ifdef CLASS_CANNOT_CHANGE_SIZE
739 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
740 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
741 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
742 && (TEST_HARD_REG_BIT
743 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
746 /* We want to keep the stack, frame, and arg pointers
748 && x != frame_pointer_rtx
749 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
750 && x != arg_pointer_rtx
752 && x != stack_pointer_rtx)
753 return gen_rtx_REG (mode, REGNO (x) + word);
755 return gen_rtx_SUBREG (mode, x, word);
757 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
758 from the low-order part of the constant. */
759 else if ((GET_MODE_CLASS (mode) == MODE_INT
760 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
761 && GET_MODE (x) == VOIDmode
762 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
764 /* If MODE is twice the host word size, X is already the desired
765 representation. Otherwise, if MODE is wider than a word, we can't
766 do this. If MODE is exactly a word, return just one CONST_INT.
767 If MODE is smaller than a word, clear the bits that don't belong
768 in our mode, unless they and our sign bit are all one. So we get
769 either a reasonable negative value or a reasonable unsigned value
772 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
774 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
776 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
777 return (GET_CODE (x) == CONST_INT ? x
778 : GEN_INT (CONST_DOUBLE_LOW (x)));
781 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
782 int width = GET_MODE_BITSIZE (mode);
783 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
784 : CONST_DOUBLE_LOW (x));
786 /* Sign extend to HOST_WIDE_INT. */
787 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
789 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
794 /* If X is an integral constant but we want it in floating-point, it
795 must be the case that we have a union of an integer and a floating-point
796 value. If the machine-parameters allow it, simulate that union here
797 and return the result. The two-word and single-word cases are
800 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
801 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
802 || flag_pretend_float)
803 && GET_MODE_CLASS (mode) == MODE_FLOAT
804 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
805 && GET_CODE (x) == CONST_INT
806 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
807 #ifdef REAL_ARITHMETIC
813 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
814 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
818 union {HOST_WIDE_INT i; float d; } u;
821 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
824 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
825 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
826 || flag_pretend_float)
827 && GET_MODE_CLASS (mode) == MODE_FLOAT
828 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
829 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
830 && GET_MODE (x) == VOIDmode
831 && (sizeof (double) * HOST_BITS_PER_CHAR
832 == 2 * HOST_BITS_PER_WIDE_INT))
833 #ifdef REAL_ARITHMETIC
837 HOST_WIDE_INT low, high;
839 if (GET_CODE (x) == CONST_INT)
840 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
842 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
844 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
846 if (WORDS_BIG_ENDIAN)
847 i[0] = high, i[1] = low;
849 i[0] = low, i[1] = high;
851 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
852 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
856 union {HOST_WIDE_INT i[2]; double d; } u;
857 HOST_WIDE_INT low, high;
859 if (GET_CODE (x) == CONST_INT)
860 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
862 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
864 #ifdef HOST_WORDS_BIG_ENDIAN
865 u.i[0] = high, u.i[1] = low;
867 u.i[0] = low, u.i[1] = high;
870 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
874 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
875 same as sizeof (double) or when sizeof (float) is larger than the
876 size of a word on the target machine. */
877 #ifdef REAL_ARITHMETIC
878 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
884 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
885 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
887 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
888 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
889 || flag_pretend_float)
890 && GET_MODE_CLASS (mode) == MODE_FLOAT
891 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
892 && GET_CODE (x) == CONST_INT
893 && (sizeof (double) * HOST_BITS_PER_CHAR
894 == HOST_BITS_PER_WIDE_INT))
900 r = REAL_VALUE_FROM_TARGET_DOUBLE (&i);
901 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
905 /* Similarly, if this is converting a floating-point value into a
906 single-word integer. Only do this is the host and target parameters are
909 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
910 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
911 || flag_pretend_float)
912 && (GET_MODE_CLASS (mode) == MODE_INT
913 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
914 && GET_CODE (x) == CONST_DOUBLE
915 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
916 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
917 return operand_subword (x, word, 0, GET_MODE (x));
919 /* Similarly, if this is converting a floating-point value into a
920 two-word integer, we can do this one word at a time and make an
921 integer. Only do this is the host and target parameters are
924 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
925 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
926 || flag_pretend_float)
927 && (GET_MODE_CLASS (mode) == MODE_INT
928 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
929 && GET_CODE (x) == CONST_DOUBLE
930 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
931 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
934 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
936 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
938 if (lowpart && GET_CODE (lowpart) == CONST_INT
939 && highpart && GET_CODE (highpart) == CONST_INT)
940 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
943 /* Otherwise, we can't do this. */
947 /* Return the real part (which has mode MODE) of a complex value X.
948 This always comes at the low address in memory. */
951 gen_realpart (mode, x)
952 enum machine_mode mode;
955 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
957 else if (WORDS_BIG_ENDIAN
958 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
960 && REGNO (x) < FIRST_PSEUDO_REGISTER)
961 fatal ("Unable to access real part of complex value in a hard register on this target");
962 else if (WORDS_BIG_ENDIAN)
963 return gen_highpart (mode, x);
965 return gen_lowpart (mode, x);
968 /* Return the imaginary part (which has mode MODE) of a complex value X.
969 This always comes at the high address in memory. */
972 gen_imagpart (mode, x)
973 enum machine_mode mode;
976 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
978 else if (WORDS_BIG_ENDIAN)
979 return gen_lowpart (mode, x);
980 else if (!WORDS_BIG_ENDIAN
981 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
983 && REGNO (x) < FIRST_PSEUDO_REGISTER)
984 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
986 return gen_highpart (mode, x);
989 /* Return 1 iff X, assumed to be a SUBREG,
990 refers to the real part of the complex value in its containing reg.
991 Complex values are always stored with the real part in the first word,
992 regardless of WORDS_BIG_ENDIAN. */
995 subreg_realpart_p (x)
998 if (GET_CODE (x) != SUBREG)
1001 return ((unsigned int) SUBREG_WORD (x) * UNITS_PER_WORD
1002 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1005 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1006 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1007 least-significant part of X.
1008 MODE specifies how big a part of X to return;
1009 it usually should not be larger than a word.
1010 If X is a MEM whose address is a QUEUED, the value may be so also. */
1013 gen_lowpart (mode, x)
1014 enum machine_mode mode;
1017 rtx result = gen_lowpart_common (mode, x);
1021 else if (GET_CODE (x) == REG)
1023 /* Must be a hard reg that's not valid in MODE. */
1024 result = gen_lowpart_common (mode, copy_to_reg (x));
1029 else if (GET_CODE (x) == MEM)
1031 /* The only additional case we can do is MEM. */
1032 register int offset = 0;
1033 if (WORDS_BIG_ENDIAN)
1034 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1035 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1037 if (BYTES_BIG_ENDIAN)
1038 /* Adjust the address so that the address-after-the-data
1040 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1041 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1043 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1045 else if (GET_CODE (x) == ADDRESSOF)
1046 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1051 /* Like `gen_lowpart', but refer to the most significant part.
1052 This is used to access the imaginary part of a complex number. */
1055 gen_highpart (mode, x)
1056 enum machine_mode mode;
1059 /* This case loses if X is a subreg. To catch bugs early,
1060 complain if an invalid MODE is used even in other cases. */
1061 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1062 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1064 if (GET_CODE (x) == CONST_DOUBLE
1065 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1066 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1069 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1070 else if (GET_CODE (x) == CONST_INT)
1072 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1074 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1076 else if (GET_CODE (x) == MEM)
1078 register int offset = 0;
1079 if (! WORDS_BIG_ENDIAN)
1080 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1081 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1083 if (! BYTES_BIG_ENDIAN
1084 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1085 offset -= (GET_MODE_SIZE (mode)
1086 - MIN (UNITS_PER_WORD,
1087 GET_MODE_SIZE (GET_MODE (x))));
1089 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1091 else if (GET_CODE (x) == SUBREG)
1093 /* The only time this should occur is when we are looking at a
1094 multi-word item with a SUBREG whose mode is the same as that of the
1095 item. It isn't clear what we would do if it wasn't. */
1096 if (SUBREG_WORD (x) != 0)
1098 return gen_highpart (mode, SUBREG_REG (x));
1100 else if (GET_CODE (x) == REG)
1104 /* Let the backend decide how many registers to skip. This is needed
1105 in particular for sparc64 where fp regs are smaller than a word. */
1106 /* ??? Note that subregs are now ambiguous, in that those against
1107 pseudos are sized by the word size, while those against hard
1108 regs are sized by the underlying register size. Better would be
1109 to always interpret the subreg offset parameter as bytes or bits. */
1111 if (WORDS_BIG_ENDIAN)
1113 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1114 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1115 - HARD_REGNO_NREGS (REGNO (x), mode));
1117 word = ((GET_MODE_SIZE (GET_MODE (x))
1118 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1121 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1122 /* integrate.c can't handle parts of a return value register. */
1123 && (! REG_FUNCTION_VALUE_P (x)
1124 || ! rtx_equal_function_value_matters)
1125 /* We want to keep the stack, frame, and arg pointers special. */
1126 && x != frame_pointer_rtx
1127 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1128 && x != arg_pointer_rtx
1130 && x != stack_pointer_rtx)
1131 return gen_rtx_REG (mode, REGNO (x) + word);
1133 return gen_rtx_SUBREG (mode, x, word);
1139 /* Return 1 iff X, assumed to be a SUBREG,
1140 refers to the least significant part of its containing reg.
1141 If X is not a SUBREG, always return 1 (it is its own low part!). */
1144 subreg_lowpart_p (x)
1147 if (GET_CODE (x) != SUBREG)
1149 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1152 if (WORDS_BIG_ENDIAN
1153 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1154 return (SUBREG_WORD (x)
1155 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1156 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1159 return SUBREG_WORD (x) == 0;
1162 /* Return subword I of operand OP.
1163 The word number, I, is interpreted as the word number starting at the
1164 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1165 otherwise it is the high-order word.
1167 If we cannot extract the required word, we return zero. Otherwise, an
1168 rtx corresponding to the requested word will be returned.
1170 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1171 reload has completed, a valid address will always be returned. After
1172 reload, if a valid address cannot be returned, we return zero.
1174 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1175 it is the responsibility of the caller.
1177 MODE is the mode of OP in case it is a CONST_INT. */
1180 operand_subword (op, i, validate_address, mode)
1183 int validate_address;
1184 enum machine_mode mode;
1187 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1189 if (mode == VOIDmode)
1190 mode = GET_MODE (op);
1192 if (mode == VOIDmode)
1195 /* If OP is narrower than a word, fail. */
1197 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1200 /* If we want a word outside OP, return zero. */
1202 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1205 /* If OP is already an integer word, return it. */
1206 if (GET_MODE_CLASS (mode) == MODE_INT
1207 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1210 /* If OP is a REG or SUBREG, we can handle it very simply. */
1211 if (GET_CODE (op) == REG)
1213 /* ??? There is a potential problem with this code. It does not
1214 properly handle extractions of a subword from a hard register
1215 that is larger than word_mode. Presumably the check for
1216 HARD_REGNO_MODE_OK catches these most of these cases. */
1218 /* If OP is a hard register, but OP + I is not a hard register,
1219 then extracting a subword is impossible.
1221 For example, consider if OP is the last hard register and it is
1222 larger than word_mode. If we wanted word N (for N > 0) because a
1223 part of that hard register was known to contain a useful value,
1224 then OP + I would refer to a pseudo, not the hard register we
1226 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1227 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1230 /* If the register is not valid for MODE, return 0. Note we
1231 have to check both OP and OP + I since they may refer to
1232 different parts of the register file.
1234 Consider if OP refers to the last 96bit FP register and we want
1235 subword 3 because that subword is known to contain a value we
1237 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1238 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1239 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1241 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1242 || (REG_FUNCTION_VALUE_P (op)
1243 && rtx_equal_function_value_matters)
1244 /* We want to keep the stack, frame, and arg pointers
1246 || op == frame_pointer_rtx
1247 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1248 || op == arg_pointer_rtx
1250 || op == stack_pointer_rtx)
1251 return gen_rtx_SUBREG (word_mode, op, i);
1253 return gen_rtx_REG (word_mode, REGNO (op) + i);
1255 else if (GET_CODE (op) == SUBREG)
1256 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1257 else if (GET_CODE (op) == CONCAT)
1259 unsigned int partwords
1260 = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1263 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1264 return operand_subword (XEXP (op, 1), i - partwords,
1265 validate_address, mode);
1268 /* Form a new MEM at the requested address. */
1269 if (GET_CODE (op) == MEM)
1271 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1274 if (validate_address)
1276 if (reload_completed)
1278 if (! strict_memory_address_p (word_mode, addr))
1282 addr = memory_address (word_mode, addr);
1285 new = gen_rtx_MEM (word_mode, addr);
1287 MEM_COPY_ATTRIBUTES (new, op);
1288 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1289 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (op);
1294 /* The only remaining cases are when OP is a constant. If the host and
1295 target floating formats are the same, handling two-word floating
1296 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1297 are defined as returning one or two 32 bit values, respectively,
1298 and not values of BITS_PER_WORD bits. */
1299 #ifdef REAL_ARITHMETIC
1300 /* The output is some bits, the width of the target machine's word.
1301 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1303 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1304 && GET_MODE_CLASS (mode) == MODE_FLOAT
1305 && GET_MODE_BITSIZE (mode) == 64
1306 && GET_CODE (op) == CONST_DOUBLE)
1311 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1312 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1314 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1315 which the words are written depends on the word endianness.
1316 ??? This is a potential portability problem and should
1317 be fixed at some point.
1319 We must excercise caution with the sign bit. By definition there
1320 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1321 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1322 So we explicitly mask and sign-extend as necessary. */
1323 if (BITS_PER_WORD == 32)
1326 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1327 return GEN_INT (val);
1329 #if HOST_BITS_PER_WIDE_INT >= 64
1330 else if (BITS_PER_WORD >= 64 && i == 0)
1332 val = k[! WORDS_BIG_ENDIAN];
1333 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1334 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1335 return GEN_INT (val);
1338 else if (BITS_PER_WORD == 16)
1341 if ((i & 1) == !WORDS_BIG_ENDIAN)
1344 return GEN_INT (val);
1349 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1350 && GET_MODE_CLASS (mode) == MODE_FLOAT
1351 && GET_MODE_BITSIZE (mode) > 64
1352 && GET_CODE (op) == CONST_DOUBLE)
1357 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1358 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1360 if (BITS_PER_WORD == 32)
1363 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1364 return GEN_INT (val);
1366 #if HOST_BITS_PER_WIDE_INT >= 64
1367 else if (BITS_PER_WORD >= 64 && i <= 1)
1369 val = k[i*2 + ! WORDS_BIG_ENDIAN];
1370 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1371 val |= (HOST_WIDE_INT) k[i*2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1372 return GEN_INT (val);
1378 #else /* no REAL_ARITHMETIC */
1379 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1380 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1381 || flag_pretend_float)
1382 && GET_MODE_CLASS (mode) == MODE_FLOAT
1383 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1384 && GET_CODE (op) == CONST_DOUBLE)
1386 /* The constant is stored in the host's word-ordering,
1387 but we want to access it in the target's word-ordering. Some
1388 compilers don't like a conditional inside macro args, so we have two
1389 copies of the return. */
1390 #ifdef HOST_WORDS_BIG_ENDIAN
1391 return GEN_INT (i == WORDS_BIG_ENDIAN
1392 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1394 return GEN_INT (i != WORDS_BIG_ENDIAN
1395 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1398 #endif /* no REAL_ARITHMETIC */
1400 /* Single word float is a little harder, since single- and double-word
1401 values often do not have the same high-order bits. We have already
1402 verified that we want the only defined word of the single-word value. */
1403 #ifdef REAL_ARITHMETIC
1404 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1405 && GET_MODE_BITSIZE (mode) == 32
1406 && GET_CODE (op) == CONST_DOUBLE)
1411 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1412 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1414 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1416 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1418 if (BITS_PER_WORD == 16)
1420 if ((i & 1) == !WORDS_BIG_ENDIAN)
1425 return GEN_INT (val);
1428 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1429 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1430 || flag_pretend_float)
1431 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1432 && GET_MODE_CLASS (mode) == MODE_FLOAT
1433 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1434 && GET_CODE (op) == CONST_DOUBLE)
1437 union {float f; HOST_WIDE_INT i; } u;
1439 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1442 return GEN_INT (u.i);
1444 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1445 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1446 || flag_pretend_float)
1447 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1448 && GET_MODE_CLASS (mode) == MODE_FLOAT
1449 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1450 && GET_CODE (op) == CONST_DOUBLE)
1453 union {double d; HOST_WIDE_INT i; } u;
1455 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1458 return GEN_INT (u.i);
1460 #endif /* no REAL_ARITHMETIC */
1462 /* The only remaining cases that we can handle are integers.
1463 Convert to proper endianness now since these cases need it.
1464 At this point, i == 0 means the low-order word.
1466 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1467 in general. However, if OP is (const_int 0), we can just return
1470 if (op == const0_rtx)
1473 if (GET_MODE_CLASS (mode) != MODE_INT
1474 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1475 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1478 if (WORDS_BIG_ENDIAN)
1479 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1481 /* Find out which word on the host machine this value is in and get
1482 it from the constant. */
1483 val = (i / size_ratio == 0
1484 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1485 : (GET_CODE (op) == CONST_INT
1486 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1488 /* Get the value we want into the low bits of val. */
1489 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1490 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1492 val = trunc_int_for_mode (val, word_mode);
1494 return GEN_INT (val);
1497 /* Similar to `operand_subword', but never return 0. If we can't extract
1498 the required subword, put OP into a register and try again. If that fails,
1499 abort. We always validate the address in this case. It is not valid
1500 to call this function after reload; it is mostly meant for RTL
1503 MODE is the mode of OP, in case it is CONST_INT. */
1506 operand_subword_force (op, i, mode)
1509 enum machine_mode mode;
1511 rtx result = operand_subword (op, i, 1, mode);
1516 if (mode != BLKmode && mode != VOIDmode)
1518 /* If this is a register which can not be accessed by words, copy it
1519 to a pseudo register. */
1520 if (GET_CODE (op) == REG)
1521 op = copy_to_reg (op);
1523 op = force_reg (mode, op);
1526 result = operand_subword (op, i, 1, mode);
1533 /* Given a compare instruction, swap the operands.
1534 A test instruction is changed into a compare of 0 against the operand. */
1537 reverse_comparison (insn)
1540 rtx body = PATTERN (insn);
1543 if (GET_CODE (body) == SET)
1544 comp = SET_SRC (body);
1546 comp = SET_SRC (XVECEXP (body, 0, 0));
1548 if (GET_CODE (comp) == COMPARE)
1550 rtx op0 = XEXP (comp, 0);
1551 rtx op1 = XEXP (comp, 1);
1552 XEXP (comp, 0) = op1;
1553 XEXP (comp, 1) = op0;
1557 rtx new = gen_rtx_COMPARE (VOIDmode,
1558 CONST0_RTX (GET_MODE (comp)), comp);
1559 if (GET_CODE (body) == SET)
1560 SET_SRC (body) = new;
1562 SET_SRC (XVECEXP (body, 0, 0)) = new;
1566 /* Return a memory reference like MEMREF, but with its mode changed
1567 to MODE and its address changed to ADDR.
1568 (VOIDmode means don't change the mode.
1569 NULL for ADDR means don't change the address.) */
1572 change_address (memref, mode, addr)
1574 enum machine_mode mode;
1579 if (GET_CODE (memref) != MEM)
1581 if (mode == VOIDmode)
1582 mode = GET_MODE (memref);
1584 addr = XEXP (memref, 0);
1586 /* If reload is in progress or has completed, ADDR must be valid.
1587 Otherwise, we can call memory_address to make it valid. */
1588 if (reload_completed || reload_in_progress)
1590 if (! memory_address_p (mode, addr))
1594 addr = memory_address (mode, addr);
1596 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1599 new = gen_rtx_MEM (mode, addr);
1600 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1601 MEM_COPY_ATTRIBUTES (new, memref);
1602 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (memref);
1606 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1613 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1614 NULL_RTX, label_num++, NULL_PTR, NULL_PTR);
1616 LABEL_NUSES (label) = 0;
1617 LABEL_ALTERNATE_NAME (label) = NULL;
1621 /* For procedure integration. */
1623 /* Install new pointers to the first and last insns in the chain.
1624 Also, set cur_insn_uid to one higher than the last in use.
1625 Used for an inline-procedure after copying the insn chain. */
1628 set_new_first_and_last_insn (first, last)
1637 for (insn = first; insn; insn = NEXT_INSN (insn))
1638 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1643 /* Set the range of label numbers found in the current function.
1644 This is used when belatedly compiling an inline function. */
1647 set_new_first_and_last_label_num (first, last)
1650 base_label_num = label_num;
1651 first_label_num = first;
1652 last_label_num = last;
1655 /* Set the last label number found in the current function.
1656 This is used when belatedly compiling an inline function. */
1659 set_new_last_label_num (last)
1662 base_label_num = label_num;
1663 last_label_num = last;
1666 /* Restore all variables describing the current status from the structure *P.
1667 This is used after a nested function. */
1670 restore_emit_status (p)
1671 struct function *p ATTRIBUTE_UNUSED;
1674 clear_emit_caches ();
1677 /* Clear out all parts of the state in F that can safely be discarded
1678 after the function has been compiled, to let garbage collection
1679 reclaim the memory. */
1682 free_emit_status (f)
1685 free (f->emit->x_regno_reg_rtx);
1686 free (f->emit->regno_pointer_flag);
1687 free (f->emit->regno_pointer_align);
1692 /* Go through all the RTL insn bodies and copy any invalid shared
1693 structure. This routine should only be called once. */
1696 unshare_all_rtl (fndecl, insn)
1702 /* Make sure that virtual parameters are not shared. */
1703 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1704 copy_rtx_if_shared (DECL_RTL (decl));
1706 /* Unshare just about everything else. */
1707 unshare_all_rtl_1 (insn);
1709 /* Make sure the addresses of stack slots found outside the insn chain
1710 (such as, in DECL_RTL of a variable) are not shared
1711 with the insn chain.
1713 This special care is necessary when the stack slot MEM does not
1714 actually appear in the insn chain. If it does appear, its address
1715 is unshared from all else at that point. */
1716 copy_rtx_if_shared (stack_slot_list);
1719 /* Go through all the RTL insn bodies and copy any invalid shared
1720 structure, again. This is a fairly expensive thing to do so it
1721 should be done sparingly. */
1724 unshare_all_rtl_again (insn)
1728 for (p = insn; p; p = NEXT_INSN (p))
1729 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
1731 reset_used_flags (PATTERN (p));
1732 reset_used_flags (REG_NOTES (p));
1733 reset_used_flags (LOG_LINKS (p));
1735 unshare_all_rtl_1 (insn);
1738 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1739 Assumes the mark bits are cleared at entry. */
1742 unshare_all_rtl_1 (insn)
1745 for (; insn; insn = NEXT_INSN (insn))
1746 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1748 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1749 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1750 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1754 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1755 Recursively does the same for subexpressions. */
1758 copy_rtx_if_shared (orig)
1761 register rtx x = orig;
1763 register enum rtx_code code;
1764 register const char *format_ptr;
1770 code = GET_CODE (x);
1772 /* These types may be freely shared. */
1785 /* SCRATCH must be shared because they represent distinct values. */
1789 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1790 a LABEL_REF, it isn't sharable. */
1791 if (GET_CODE (XEXP (x, 0)) == PLUS
1792 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1793 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1802 /* The chain of insns is not being copied. */
1806 /* A MEM is allowed to be shared if its address is constant.
1808 We used to allow sharing of MEMs which referenced
1809 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1810 that can lose. instantiate_virtual_regs will not unshare
1811 the MEMs, and combine may change the structure of the address
1812 because it looks safe and profitable in one context, but
1813 in some other context it creates unrecognizable RTL. */
1814 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1823 /* This rtx may not be shared. If it has already been seen,
1824 replace it with a copy of itself. */
1830 copy = rtx_alloc (code);
1831 bcopy ((char *) x, (char *) copy,
1832 (sizeof (*copy) - sizeof (copy->fld)
1833 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1839 /* Now scan the subexpressions recursively.
1840 We can store any replaced subexpressions directly into X
1841 since we know X is not shared! Any vectors in X
1842 must be copied if X was copied. */
1844 format_ptr = GET_RTX_FORMAT (code);
1846 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1848 switch (*format_ptr++)
1851 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1855 if (XVEC (x, i) != NULL)
1858 int len = XVECLEN (x, i);
1860 if (copied && len > 0)
1861 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1862 for (j = 0; j < len; j++)
1863 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1871 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1872 to look for shared sub-parts. */
1875 reset_used_flags (x)
1879 register enum rtx_code code;
1880 register const char *format_ptr;
1885 code = GET_CODE (x);
1887 /* These types may be freely shared so we needn't do any resetting
1908 /* The chain of insns is not being copied. */
1917 format_ptr = GET_RTX_FORMAT (code);
1918 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1920 switch (*format_ptr++)
1923 reset_used_flags (XEXP (x, i));
1927 for (j = 0; j < XVECLEN (x, i); j++)
1928 reset_used_flags (XVECEXP (x, i, j));
1934 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1935 Return X or the rtx for the pseudo reg the value of X was copied into.
1936 OTHER must be valid as a SET_DEST. */
1939 make_safe_from (x, other)
1943 switch (GET_CODE (other))
1946 other = SUBREG_REG (other);
1948 case STRICT_LOW_PART:
1951 other = XEXP (other, 0);
1957 if ((GET_CODE (other) == MEM
1959 && GET_CODE (x) != REG
1960 && GET_CODE (x) != SUBREG)
1961 || (GET_CODE (other) == REG
1962 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1963 || reg_mentioned_p (other, x))))
1965 rtx temp = gen_reg_rtx (GET_MODE (x));
1966 emit_move_insn (temp, x);
1972 /* Emission of insns (adding them to the doubly-linked list). */
1974 /* Return the first insn of the current sequence or current function. */
1982 /* Return the last insn emitted in current sequence or current function. */
1990 /* Specify a new insn as the last in the chain. */
1993 set_last_insn (insn)
1996 if (NEXT_INSN (insn) != 0)
2001 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2004 get_last_insn_anywhere ()
2006 struct sequence_stack *stack;
2009 for (stack = seq_stack; stack; stack = stack->next)
2010 if (stack->last != 0)
2015 /* Return a number larger than any instruction's uid in this function. */
2020 return cur_insn_uid;
2023 /* Renumber instructions so that no instruction UIDs are wasted. */
2026 renumber_insns (stream)
2031 /* If we're not supposed to renumber instructions, don't. */
2032 if (!flag_renumber_insns)
2035 /* If there aren't that many instructions, then it's not really
2036 worth renumbering them. */
2037 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2042 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2045 fprintf (stream, "Renumbering insn %d to %d\n",
2046 INSN_UID (insn), cur_insn_uid);
2047 INSN_UID (insn) = cur_insn_uid++;
2051 /* Return the next insn. If it is a SEQUENCE, return the first insn
2060 insn = NEXT_INSN (insn);
2061 if (insn && GET_CODE (insn) == INSN
2062 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2063 insn = XVECEXP (PATTERN (insn), 0, 0);
2069 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2073 previous_insn (insn)
2078 insn = PREV_INSN (insn);
2079 if (insn && GET_CODE (insn) == INSN
2080 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2081 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2087 /* Return the next insn after INSN that is not a NOTE. This routine does not
2088 look inside SEQUENCEs. */
2091 next_nonnote_insn (insn)
2096 insn = NEXT_INSN (insn);
2097 if (insn == 0 || GET_CODE (insn) != NOTE)
2104 /* Return the previous insn before INSN that is not a NOTE. This routine does
2105 not look inside SEQUENCEs. */
2108 prev_nonnote_insn (insn)
2113 insn = PREV_INSN (insn);
2114 if (insn == 0 || GET_CODE (insn) != NOTE)
2121 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2122 or 0, if there is none. This routine does not look inside
2126 next_real_insn (insn)
2131 insn = NEXT_INSN (insn);
2132 if (insn == 0 || GET_CODE (insn) == INSN
2133 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2140 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2141 or 0, if there is none. This routine does not look inside
2145 prev_real_insn (insn)
2150 insn = PREV_INSN (insn);
2151 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2152 || GET_CODE (insn) == JUMP_INSN)
2159 /* Find the next insn after INSN that really does something. This routine
2160 does not look inside SEQUENCEs. Until reload has completed, this is the
2161 same as next_real_insn. */
2164 active_insn_p (insn)
2167 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2168 || (GET_CODE (insn) == INSN
2169 && (! reload_completed
2170 || (GET_CODE (PATTERN (insn)) != USE
2171 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2175 next_active_insn (insn)
2180 insn = NEXT_INSN (insn);
2181 if (insn == 0 || active_insn_p (insn))
2188 /* Find the last insn before INSN that really does something. This routine
2189 does not look inside SEQUENCEs. Until reload has completed, this is the
2190 same as prev_real_insn. */
2193 prev_active_insn (insn)
2198 insn = PREV_INSN (insn);
2199 if (insn == 0 || active_insn_p (insn))
2206 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2214 insn = NEXT_INSN (insn);
2215 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2222 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2230 insn = PREV_INSN (insn);
2231 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2239 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2240 and REG_CC_USER notes so we can find it. */
2243 link_cc0_insns (insn)
2246 rtx user = next_nonnote_insn (insn);
2248 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2249 user = XVECEXP (PATTERN (user), 0, 0);
2251 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2253 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2256 /* Return the next insn that uses CC0 after INSN, which is assumed to
2257 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2258 applied to the result of this function should yield INSN).
2260 Normally, this is simply the next insn. However, if a REG_CC_USER note
2261 is present, it contains the insn that uses CC0.
2263 Return 0 if we can't find the insn. */
2266 next_cc0_user (insn)
2269 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2272 return XEXP (note, 0);
2274 insn = next_nonnote_insn (insn);
2275 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2276 insn = XVECEXP (PATTERN (insn), 0, 0);
2278 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2279 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2285 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2286 note, it is the previous insn. */
2289 prev_cc0_setter (insn)
2292 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2295 return XEXP (note, 0);
2297 insn = prev_nonnote_insn (insn);
2298 if (! sets_cc0_p (PATTERN (insn)))
2305 /* Try splitting insns that can be split for better scheduling.
2306 PAT is the pattern which might split.
2307 TRIAL is the insn providing PAT.
2308 LAST is non-zero if we should return the last insn of the sequence produced.
2310 If this routine succeeds in splitting, it returns the first or last
2311 replacement insn depending on the value of LAST. Otherwise, it
2312 returns TRIAL. If the insn to be returned can be split, it will be. */
2315 try_split (pat, trial, last)
2319 rtx before = PREV_INSN (trial);
2320 rtx after = NEXT_INSN (trial);
2321 rtx seq = split_insns (pat, trial);
2322 int has_barrier = 0;
2325 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2326 We may need to handle this specially. */
2327 if (after && GET_CODE (after) == BARRIER)
2330 after = NEXT_INSN (after);
2335 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2336 The latter case will normally arise only when being done so that
2337 it, in turn, will be split (SFmode on the 29k is an example). */
2338 if (GET_CODE (seq) == SEQUENCE)
2340 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2341 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2342 increment the usage count so we don't delete the label. */
2345 if (GET_CODE (trial) == JUMP_INSN)
2346 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2347 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2349 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2351 if (JUMP_LABEL (trial))
2352 LABEL_NUSES (JUMP_LABEL (trial))++;
2355 tem = emit_insn_after (seq, before);
2357 delete_insn (trial);
2359 emit_barrier_after (tem);
2361 /* Recursively call try_split for each new insn created; by the
2362 time control returns here that insn will be fully split, so
2363 set LAST and continue from the insn after the one returned.
2364 We can't use next_active_insn here since AFTER may be a note.
2365 Ignore deleted insns, which can be occur if not optimizing. */
2366 for (tem = NEXT_INSN (before); tem != after;
2367 tem = NEXT_INSN (tem))
2368 if (! INSN_DELETED_P (tem)
2369 && GET_RTX_CLASS (GET_CODE (tem)) == 'i')
2370 tem = try_split (PATTERN (tem), tem, 1);
2372 /* Avoid infinite loop if the result matches the original pattern. */
2373 else if (rtx_equal_p (seq, pat))
2377 PATTERN (trial) = seq;
2378 INSN_CODE (trial) = -1;
2379 try_split (seq, trial, last);
2382 /* Return either the first or the last insn, depending on which was
2385 ? (after ? prev_active_insn (after) : last_insn)
2386 : next_active_insn (before);
2392 /* Make and return an INSN rtx, initializing all its slots.
2393 Store PATTERN in the pattern slots. */
2396 make_insn_raw (pattern)
2401 /* If in RTL generation phase, see if FREE_INSN can be used. */
2402 if (!ggc_p && free_insn != 0 && rtx_equal_function_value_matters)
2405 free_insn = NEXT_INSN (free_insn);
2406 PUT_CODE (insn, INSN);
2409 insn = rtx_alloc (INSN);
2411 INSN_UID (insn) = cur_insn_uid++;
2412 PATTERN (insn) = pattern;
2413 INSN_CODE (insn) = -1;
2414 LOG_LINKS (insn) = NULL;
2415 REG_NOTES (insn) = NULL;
2417 #ifdef ENABLE_RTL_CHECKING
2419 && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2420 && (returnjump_p (insn)
2421 || (GET_CODE (insn) == SET
2422 && SET_DEST (insn) == pc_rtx)))
2424 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2432 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2435 make_jump_insn_raw (pattern)
2440 insn = rtx_alloc (JUMP_INSN);
2441 INSN_UID (insn) = cur_insn_uid++;
2443 PATTERN (insn) = pattern;
2444 INSN_CODE (insn) = -1;
2445 LOG_LINKS (insn) = NULL;
2446 REG_NOTES (insn) = NULL;
2447 JUMP_LABEL (insn) = NULL;
2452 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2455 make_call_insn_raw (pattern)
2460 insn = rtx_alloc (CALL_INSN);
2461 INSN_UID (insn) = cur_insn_uid++;
2463 PATTERN (insn) = pattern;
2464 INSN_CODE (insn) = -1;
2465 LOG_LINKS (insn) = NULL;
2466 REG_NOTES (insn) = NULL;
2467 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2472 /* Add INSN to the end of the doubly-linked list.
2473 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2479 PREV_INSN (insn) = last_insn;
2480 NEXT_INSN (insn) = 0;
2482 if (NULL != last_insn)
2483 NEXT_INSN (last_insn) = insn;
2485 if (NULL == first_insn)
2491 /* Add INSN into the doubly-linked list after insn AFTER. This and
2492 the next should be the only functions called to insert an insn once
2493 delay slots have been filled since only they know how to update a
2497 add_insn_after (insn, after)
2500 rtx next = NEXT_INSN (after);
2502 if (optimize && INSN_DELETED_P (after))
2505 NEXT_INSN (insn) = next;
2506 PREV_INSN (insn) = after;
2510 PREV_INSN (next) = insn;
2511 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2512 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2514 else if (last_insn == after)
2518 struct sequence_stack *stack = seq_stack;
2519 /* Scan all pending sequences too. */
2520 for (; stack; stack = stack->next)
2521 if (after == stack->last)
2531 NEXT_INSN (after) = insn;
2532 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2534 rtx sequence = PATTERN (after);
2535 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2539 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2540 the previous should be the only functions called to insert an insn once
2541 delay slots have been filled since only they know how to update a
2545 add_insn_before (insn, before)
2548 rtx prev = PREV_INSN (before);
2550 if (optimize && INSN_DELETED_P (before))
2553 PREV_INSN (insn) = prev;
2554 NEXT_INSN (insn) = before;
2558 NEXT_INSN (prev) = insn;
2559 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2561 rtx sequence = PATTERN (prev);
2562 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2565 else if (first_insn == before)
2569 struct sequence_stack *stack = seq_stack;
2570 /* Scan all pending sequences too. */
2571 for (; stack; stack = stack->next)
2572 if (before == stack->first)
2574 stack->first = insn;
2582 PREV_INSN (before) = insn;
2583 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2584 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2587 /* Remove an insn from its doubly-linked list. This function knows how
2588 to handle sequences. */
2593 rtx next = NEXT_INSN (insn);
2594 rtx prev = PREV_INSN (insn);
2597 NEXT_INSN (prev) = next;
2598 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2600 rtx sequence = PATTERN (prev);
2601 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2604 else if (first_insn == insn)
2608 struct sequence_stack *stack = seq_stack;
2609 /* Scan all pending sequences too. */
2610 for (; stack; stack = stack->next)
2611 if (insn == stack->first)
2613 stack->first = next;
2623 PREV_INSN (next) = prev;
2624 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2625 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2627 else if (last_insn == insn)
2631 struct sequence_stack *stack = seq_stack;
2632 /* Scan all pending sequences too. */
2633 for (; stack; stack = stack->next)
2634 if (insn == stack->last)
2645 /* Delete all insns made since FROM.
2646 FROM becomes the new last instruction. */
2649 delete_insns_since (from)
2655 NEXT_INSN (from) = 0;
2659 /* This function is deprecated, please use sequences instead.
2661 Move a consecutive bunch of insns to a different place in the chain.
2662 The insns to be moved are those between FROM and TO.
2663 They are moved to a new position after the insn AFTER.
2664 AFTER must not be FROM or TO or any insn in between.
2666 This function does not know about SEQUENCEs and hence should not be
2667 called after delay-slot filling has been done. */
2670 reorder_insns (from, to, after)
2671 rtx from, to, after;
2673 /* Splice this bunch out of where it is now. */
2674 if (PREV_INSN (from))
2675 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2677 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2678 if (last_insn == to)
2679 last_insn = PREV_INSN (from);
2680 if (first_insn == from)
2681 first_insn = NEXT_INSN (to);
2683 /* Make the new neighbors point to it and it to them. */
2684 if (NEXT_INSN (after))
2685 PREV_INSN (NEXT_INSN (after)) = to;
2687 NEXT_INSN (to) = NEXT_INSN (after);
2688 PREV_INSN (from) = after;
2689 NEXT_INSN (after) = from;
2690 if (after == last_insn)
2694 /* Return the line note insn preceding INSN. */
2697 find_line_note (insn)
2700 if (no_line_numbers)
2703 for (; insn; insn = PREV_INSN (insn))
2704 if (GET_CODE (insn) == NOTE
2705 && NOTE_LINE_NUMBER (insn) >= 0)
2711 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2712 of the moved insns when debugging. This may insert a note between AFTER
2713 and FROM, and another one after TO. */
2716 reorder_insns_with_line_notes (from, to, after)
2717 rtx from, to, after;
2719 rtx from_line = find_line_note (from);
2720 rtx after_line = find_line_note (after);
2722 reorder_insns (from, to, after);
2724 if (from_line == after_line)
2728 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2729 NOTE_LINE_NUMBER (from_line),
2732 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2733 NOTE_LINE_NUMBER (after_line),
2737 /* Remove unncessary notes from the instruction stream. */
2740 remove_unncessary_notes ()
2745 /* We must not remove the first instruction in the function because
2746 the compiler depends on the first instruction being a note. */
2747 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2749 /* Remember what's next. */
2750 next = NEXT_INSN (insn);
2752 /* We're only interested in notes. */
2753 if (GET_CODE (insn) != NOTE)
2756 /* By now, all notes indicating lexical blocks should have
2757 NOTE_BLOCK filled in. */
2758 if ((NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2759 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2760 && NOTE_BLOCK (insn) == NULL_TREE)
2763 /* Remove NOTE_INSN_DELETED notes. */
2764 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
2766 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2768 /* Scan back to see if there are any non-note instructions
2769 between INSN and the beginning of this block. If not,
2770 then there is no PC range in the generated code that will
2771 actually be in this block, so there's no point in
2772 remembering the existence of the block. */
2775 for (prev = PREV_INSN (insn); prev; prev = PREV_INSN (prev))
2777 /* This block contains a real instruction. Note that we
2778 don't include labels; if the only thing in the block
2779 is a label, then there are still no PC values that
2780 lie within the block. */
2781 if (GET_RTX_CLASS (GET_CODE (prev)) == 'i')
2784 /* We're only interested in NOTEs. */
2785 if (GET_CODE (prev) != NOTE)
2788 if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_BEG)
2790 /* If the BLOCKs referred to by these notes don't
2791 match, then something is wrong with our BLOCK
2792 nesting structure. */
2793 if (NOTE_BLOCK (prev) != NOTE_BLOCK (insn))
2796 /* Never delete the BLOCK for the outermost scope
2797 of the function; we can refer to names from
2798 that scope even if the block notes are messed up. */
2799 if (! is_body_block (NOTE_BLOCK (insn)))
2801 debug_ignore_block (NOTE_BLOCK (insn));
2808 else if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_END)
2809 /* There's a nested block. We need to leave the
2810 current block in place since otherwise the debugger
2811 wouldn't be able to show symbols from our block in
2812 the nested block. */
2820 /* Emit an insn of given code and pattern
2821 at a specified place within the doubly-linked list. */
2823 /* Make an instruction with body PATTERN
2824 and output it before the instruction BEFORE. */
2827 emit_insn_before (pattern, before)
2828 register rtx pattern, before;
2830 register rtx insn = before;
2832 if (GET_CODE (pattern) == SEQUENCE)
2836 for (i = 0; i < XVECLEN (pattern, 0); i++)
2838 insn = XVECEXP (pattern, 0, i);
2839 add_insn_before (insn, before);
2841 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2842 sequence_result[XVECLEN (pattern, 0)] = pattern;
2846 insn = make_insn_raw (pattern);
2847 add_insn_before (insn, before);
2853 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2856 emit_block_insn_before (pattern, before, block)
2857 rtx pattern, before;
2860 rtx prev = PREV_INSN (before);
2861 rtx r = emit_insn_before (pattern, before);
2862 if (block && block->head == before)
2863 block->head = NEXT_INSN (prev);
2867 /* Make an instruction with body PATTERN and code JUMP_INSN
2868 and output it before the instruction BEFORE. */
2871 emit_jump_insn_before (pattern, before)
2872 register rtx pattern, before;
2876 if (GET_CODE (pattern) == SEQUENCE)
2877 insn = emit_insn_before (pattern, before);
2880 insn = make_jump_insn_raw (pattern);
2881 add_insn_before (insn, before);
2887 /* Make an instruction with body PATTERN and code CALL_INSN
2888 and output it before the instruction BEFORE. */
2891 emit_call_insn_before (pattern, before)
2892 register rtx pattern, before;
2896 if (GET_CODE (pattern) == SEQUENCE)
2897 insn = emit_insn_before (pattern, before);
2900 insn = make_call_insn_raw (pattern);
2901 add_insn_before (insn, before);
2902 PUT_CODE (insn, CALL_INSN);
2908 /* Make an insn of code BARRIER
2909 and output it before the insn BEFORE. */
2912 emit_barrier_before (before)
2913 register rtx before;
2915 register rtx insn = rtx_alloc (BARRIER);
2917 INSN_UID (insn) = cur_insn_uid++;
2919 add_insn_before (insn, before);
2923 /* Emit the label LABEL before the insn BEFORE. */
2926 emit_label_before (label, before)
2929 /* This can be called twice for the same label as a result of the
2930 confusion that follows a syntax error! So make it harmless. */
2931 if (INSN_UID (label) == 0)
2933 INSN_UID (label) = cur_insn_uid++;
2934 add_insn_before (label, before);
2940 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2943 emit_note_before (subtype, before)
2947 register rtx note = rtx_alloc (NOTE);
2948 INSN_UID (note) = cur_insn_uid++;
2949 NOTE_SOURCE_FILE (note) = 0;
2950 NOTE_LINE_NUMBER (note) = subtype;
2952 add_insn_before (note, before);
2956 /* Make an insn of code INSN with body PATTERN
2957 and output it after the insn AFTER. */
2960 emit_insn_after (pattern, after)
2961 register rtx pattern, after;
2963 register rtx insn = after;
2965 if (GET_CODE (pattern) == SEQUENCE)
2969 for (i = 0; i < XVECLEN (pattern, 0); i++)
2971 insn = XVECEXP (pattern, 0, i);
2972 add_insn_after (insn, after);
2975 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2976 sequence_result[XVECLEN (pattern, 0)] = pattern;
2980 insn = make_insn_raw (pattern);
2981 add_insn_after (insn, after);
2987 /* Similar to emit_insn_after, except that line notes are to be inserted so
2988 as to act as if this insn were at FROM. */
2991 emit_insn_after_with_line_notes (pattern, after, from)
2992 rtx pattern, after, from;
2994 rtx from_line = find_line_note (from);
2995 rtx after_line = find_line_note (after);
2996 rtx insn = emit_insn_after (pattern, after);
2999 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3000 NOTE_LINE_NUMBER (from_line),
3004 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3005 NOTE_LINE_NUMBER (after_line),
3009 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3012 emit_block_insn_after (pattern, after, block)
3016 rtx r = emit_insn_after (pattern, after);
3017 if (block && block->end == after)
3022 /* Make an insn of code JUMP_INSN with body PATTERN
3023 and output it after the insn AFTER. */
3026 emit_jump_insn_after (pattern, after)
3027 register rtx pattern, after;
3031 if (GET_CODE (pattern) == SEQUENCE)
3032 insn = emit_insn_after (pattern, after);
3035 insn = make_jump_insn_raw (pattern);
3036 add_insn_after (insn, after);
3042 /* Make an insn of code BARRIER
3043 and output it after the insn AFTER. */
3046 emit_barrier_after (after)
3049 register rtx insn = rtx_alloc (BARRIER);
3051 INSN_UID (insn) = cur_insn_uid++;
3053 add_insn_after (insn, after);
3057 /* Emit the label LABEL after the insn AFTER. */
3060 emit_label_after (label, after)
3063 /* This can be called twice for the same label
3064 as a result of the confusion that follows a syntax error!
3065 So make it harmless. */
3066 if (INSN_UID (label) == 0)
3068 INSN_UID (label) = cur_insn_uid++;
3069 add_insn_after (label, after);
3075 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3078 emit_note_after (subtype, after)
3082 register rtx note = rtx_alloc (NOTE);
3083 INSN_UID (note) = cur_insn_uid++;
3084 NOTE_SOURCE_FILE (note) = 0;
3085 NOTE_LINE_NUMBER (note) = subtype;
3086 add_insn_after (note, after);
3090 /* Emit a line note for FILE and LINE after the insn AFTER. */
3093 emit_line_note_after (file, line, after)
3100 if (no_line_numbers && line > 0)
3106 note = rtx_alloc (NOTE);
3107 INSN_UID (note) = cur_insn_uid++;
3108 NOTE_SOURCE_FILE (note) = file;
3109 NOTE_LINE_NUMBER (note) = line;
3110 add_insn_after (note, after);
3114 /* Make an insn of code INSN with pattern PATTERN
3115 and add it to the end of the doubly-linked list.
3116 If PATTERN is a SEQUENCE, take the elements of it
3117 and emit an insn for each element.
3119 Returns the last insn emitted. */
3125 rtx insn = last_insn;
3127 if (GET_CODE (pattern) == SEQUENCE)
3131 for (i = 0; i < XVECLEN (pattern, 0); i++)
3133 insn = XVECEXP (pattern, 0, i);
3136 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
3137 sequence_result[XVECLEN (pattern, 0)] = pattern;
3141 insn = make_insn_raw (pattern);
3148 /* Emit the insns in a chain starting with INSN.
3149 Return the last insn emitted. */
3159 rtx next = NEXT_INSN (insn);
3168 /* Emit the insns in a chain starting with INSN and place them in front of
3169 the insn BEFORE. Return the last insn emitted. */
3172 emit_insns_before (insn, before)
3180 rtx next = NEXT_INSN (insn);
3181 add_insn_before (insn, before);
3189 /* Emit the insns in a chain starting with FIRST and place them in back of
3190 the insn AFTER. Return the last insn emitted. */
3193 emit_insns_after (first, after)
3198 register rtx after_after;
3206 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3209 after_after = NEXT_INSN (after);
3211 NEXT_INSN (after) = first;
3212 PREV_INSN (first) = after;
3213 NEXT_INSN (last) = after_after;
3215 PREV_INSN (after_after) = last;
3217 if (after == last_insn)
3222 /* Make an insn of code JUMP_INSN with pattern PATTERN
3223 and add it to the end of the doubly-linked list. */
3226 emit_jump_insn (pattern)
3229 if (GET_CODE (pattern) == SEQUENCE)
3230 return emit_insn (pattern);
3233 register rtx insn = make_jump_insn_raw (pattern);
3239 /* Make an insn of code CALL_INSN with pattern PATTERN
3240 and add it to the end of the doubly-linked list. */
3243 emit_call_insn (pattern)
3246 if (GET_CODE (pattern) == SEQUENCE)
3247 return emit_insn (pattern);
3250 register rtx insn = make_call_insn_raw (pattern);
3252 PUT_CODE (insn, CALL_INSN);
3257 /* Add the label LABEL to the end of the doubly-linked list. */
3263 /* This can be called twice for the same label
3264 as a result of the confusion that follows a syntax error!
3265 So make it harmless. */
3266 if (INSN_UID (label) == 0)
3268 INSN_UID (label) = cur_insn_uid++;
3274 /* Make an insn of code BARRIER
3275 and add it to the end of the doubly-linked list. */
3280 register rtx barrier = rtx_alloc (BARRIER);
3281 INSN_UID (barrier) = cur_insn_uid++;
3286 /* Make an insn of code NOTE
3287 with data-fields specified by FILE and LINE
3288 and add it to the end of the doubly-linked list,
3289 but only if line-numbers are desired for debugging info. */
3292 emit_line_note (file, line)
3296 set_file_and_line_for_stmt (file, line);
3299 if (no_line_numbers)
3303 return emit_note (file, line);
3306 /* Make an insn of code NOTE
3307 with data-fields specified by FILE and LINE
3308 and add it to the end of the doubly-linked list.
3309 If it is a line-number NOTE, omit it if it matches the previous one. */
3312 emit_note (file, line)
3320 if (file && last_filename && !strcmp (file, last_filename)
3321 && line == last_linenum)
3323 last_filename = file;
3324 last_linenum = line;
3327 if (no_line_numbers && line > 0)
3333 note = rtx_alloc (NOTE);
3334 INSN_UID (note) = cur_insn_uid++;
3335 NOTE_SOURCE_FILE (note) = file;
3336 NOTE_LINE_NUMBER (note) = line;
3341 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3344 emit_line_note_force (file, line)
3349 return emit_line_note (file, line);
3352 /* Cause next statement to emit a line note even if the line number
3353 has not changed. This is used at the beginning of a function. */
3356 force_next_line_note ()
3361 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3362 note of this type already exists, remove it first. */
3365 set_unique_reg_note (insn, kind, datum)
3370 rtx note = find_reg_note (insn, kind, NULL_RTX);
3372 /* First remove the note if there already is one. */
3374 remove_note (insn, note);
3376 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3379 /* Return an indication of which type of insn should have X as a body.
3380 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3386 if (GET_CODE (x) == CODE_LABEL)
3388 if (GET_CODE (x) == CALL)
3390 if (GET_CODE (x) == RETURN)
3392 if (GET_CODE (x) == SET)
3394 if (SET_DEST (x) == pc_rtx)
3396 else if (GET_CODE (SET_SRC (x)) == CALL)
3401 if (GET_CODE (x) == PARALLEL)
3404 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3405 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3407 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3408 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3410 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3411 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3417 /* Emit the rtl pattern X as an appropriate kind of insn.
3418 If X is a label, it is simply added into the insn chain. */
3424 enum rtx_code code = classify_insn (x);
3426 if (code == CODE_LABEL)
3427 return emit_label (x);
3428 else if (code == INSN)
3429 return emit_insn (x);
3430 else if (code == JUMP_INSN)
3432 register rtx insn = emit_jump_insn (x);
3433 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3434 return emit_barrier ();
3437 else if (code == CALL_INSN)
3438 return emit_call_insn (x);
3443 /* Begin emitting insns to a sequence which can be packaged in an
3444 RTL_EXPR. If this sequence will contain something that might cause
3445 the compiler to pop arguments to function calls (because those
3446 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3447 details), use do_pending_stack_adjust before calling this function.
3448 That will ensure that the deferred pops are not accidentally
3449 emitted in the middel of this sequence. */
3454 struct sequence_stack *tem;
3456 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3458 tem->next = seq_stack;
3459 tem->first = first_insn;
3460 tem->last = last_insn;
3461 tem->sequence_rtl_expr = seq_rtl_expr;
3469 /* Similarly, but indicate that this sequence will be placed in T, an
3470 RTL_EXPR. See the documentation for start_sequence for more
3471 information about how to use this function. */
3474 start_sequence_for_rtl_expr (t)
3482 /* Set up the insn chain starting with FIRST as the current sequence,
3483 saving the previously current one. See the documentation for
3484 start_sequence for more information about how to use this function. */
3487 push_to_sequence (first)
3494 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3500 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3503 push_to_full_sequence (first, last)
3509 /* We really should have the end of the insn chain here. */
3510 if (last && NEXT_INSN (last))
3514 /* Set up the outer-level insn chain
3515 as the current sequence, saving the previously current one. */
3518 push_topmost_sequence ()
3520 struct sequence_stack *stack, *top = NULL;
3524 for (stack = seq_stack; stack; stack = stack->next)
3527 first_insn = top->first;
3528 last_insn = top->last;
3529 seq_rtl_expr = top->sequence_rtl_expr;
3532 /* After emitting to the outer-level insn chain, update the outer-level
3533 insn chain, and restore the previous saved state. */
3536 pop_topmost_sequence ()
3538 struct sequence_stack *stack, *top = NULL;
3540 for (stack = seq_stack; stack; stack = stack->next)
3543 top->first = first_insn;
3544 top->last = last_insn;
3545 /* ??? Why don't we save seq_rtl_expr here? */
3550 /* After emitting to a sequence, restore previous saved state.
3552 To get the contents of the sequence just made, you must call
3553 `gen_sequence' *before* calling here.
3555 If the compiler might have deferred popping arguments while
3556 generating this sequence, and this sequence will not be immediately
3557 inserted into the instruction stream, use do_pending_stack_adjust
3558 before calling gen_sequence. That will ensure that the deferred
3559 pops are inserted into this sequence, and not into some random
3560 location in the instruction stream. See INHIBIT_DEFER_POP for more
3561 information about deferred popping of arguments. */
3566 struct sequence_stack *tem = seq_stack;
3568 first_insn = tem->first;
3569 last_insn = tem->last;
3570 seq_rtl_expr = tem->sequence_rtl_expr;
3571 seq_stack = tem->next;
3576 /* This works like end_sequence, but records the old sequence in FIRST
3580 end_full_sequence (first, last)
3583 *first = first_insn;
3588 /* Return 1 if currently emitting into a sequence. */
3593 return seq_stack != 0;
3596 /* Generate a SEQUENCE rtx containing the insns already emitted
3597 to the current sequence.
3599 This is how the gen_... function from a DEFINE_EXPAND
3600 constructs the SEQUENCE that it returns. */
3610 /* Count the insns in the chain. */
3612 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3615 /* If only one insn, return it rather than a SEQUENCE.
3616 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3617 the case of an empty list.)
3618 We only return the pattern of an insn if its code is INSN and it
3619 has no notes. This ensures that no information gets lost. */
3621 && ! RTX_FRAME_RELATED_P (first_insn)
3622 && GET_CODE (first_insn) == INSN
3623 /* Don't throw away any reg notes. */
3624 && REG_NOTES (first_insn) == 0)
3628 NEXT_INSN (first_insn) = free_insn;
3629 free_insn = first_insn;
3631 return PATTERN (first_insn);
3634 /* Put them in a vector. See if we already have a SEQUENCE of the
3635 appropriate length around. */
3636 if (!ggc_p && len < SEQUENCE_RESULT_SIZE
3637 && (result = sequence_result[len]) != 0)
3638 sequence_result[len] = 0;
3641 /* Ensure that this rtl goes in saveable_obstack, since we may
3643 push_obstacks_nochange ();
3644 rtl_in_saveable_obstack ();
3645 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3649 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3650 XVECEXP (result, 0, i) = tem;
3655 /* Put the various virtual registers into REGNO_REG_RTX. */
3658 init_virtual_regs (es)
3659 struct emit_status *es;
3661 rtx *ptr = es->x_regno_reg_rtx;
3662 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3663 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3664 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3665 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3666 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3670 clear_emit_caches ()
3674 /* Clear the start_sequence/gen_sequence cache. */
3675 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3676 sequence_result[i] = 0;
3680 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3681 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3682 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3683 static int copy_insn_n_scratches;
3685 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3686 copied an ASM_OPERANDS.
3687 In that case, it is the original input-operand vector. */
3688 static rtvec orig_asm_operands_vector;
3690 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3691 copied an ASM_OPERANDS.
3692 In that case, it is the copied input-operand vector. */
3693 static rtvec copy_asm_operands_vector;
3695 /* Likewise for the constraints vector. */
3696 static rtvec orig_asm_constraints_vector;
3697 static rtvec copy_asm_constraints_vector;
3699 /* Recursively create a new copy of an rtx for copy_insn.
3700 This function differs from copy_rtx in that it handles SCRATCHes and
3701 ASM_OPERANDs properly.
3702 Normally, this function is not used directly; use copy_insn as front end.
3703 However, you could first copy an insn pattern with copy_insn and then use
3704 this function afterwards to properly copy any REG_NOTEs containing
3713 register RTX_CODE code;
3714 register const char *format_ptr;
3716 code = GET_CODE (orig);
3732 for (i = 0; i < copy_insn_n_scratches; i++)
3733 if (copy_insn_scratch_in[i] == orig)
3734 return copy_insn_scratch_out[i];
3738 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3739 a LABEL_REF, it isn't sharable. */
3740 if (GET_CODE (XEXP (orig, 0)) == PLUS
3741 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3742 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3746 /* A MEM with a constant address is not sharable. The problem is that
3747 the constant address may need to be reloaded. If the mem is shared,
3748 then reloading one copy of this mem will cause all copies to appear
3749 to have been reloaded. */
3755 copy = rtx_alloc (code);
3757 /* Copy the various flags, and other information. We assume that
3758 all fields need copying, and then clear the fields that should
3759 not be copied. That is the sensible default behavior, and forces
3760 us to explicitly document why we are *not* copying a flag. */
3761 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3763 /* We do not copy the USED flag, which is used as a mark bit during
3764 walks over the RTL. */
3767 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3768 if (GET_RTX_CLASS (code) == 'i')
3772 copy->frame_related = 0;
3775 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3777 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3779 copy->fld[i] = orig->fld[i];
3780 switch (*format_ptr++)
3783 if (XEXP (orig, i) != NULL)
3784 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3789 if (XVEC (orig, i) == orig_asm_constraints_vector)
3790 XVEC (copy, i) = copy_asm_constraints_vector;
3791 else if (XVEC (orig, i) == orig_asm_operands_vector)
3792 XVEC (copy, i) = copy_asm_operands_vector;
3793 else if (XVEC (orig, i) != NULL)
3795 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3796 for (j = 0; j < XVECLEN (copy, i); j++)
3797 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3803 bitmap new_bits = BITMAP_OBSTACK_ALLOC (rtl_obstack);
3804 bitmap_copy (new_bits, XBITMAP (orig, i));
3805 XBITMAP (copy, i) = new_bits;
3816 /* These are left unchanged. */
3824 if (code == SCRATCH)
3826 i = copy_insn_n_scratches++;
3827 if (i >= MAX_RECOG_OPERANDS)
3829 copy_insn_scratch_in[i] = orig;
3830 copy_insn_scratch_out[i] = copy;
3832 else if (code == ASM_OPERANDS)
3834 orig_asm_operands_vector = XVEC (orig, 3);
3835 copy_asm_operands_vector = XVEC (copy, 3);
3836 orig_asm_constraints_vector = XVEC (orig, 4);
3837 copy_asm_constraints_vector = XVEC (copy, 4);
3843 /* Create a new copy of an rtx.
3844 This function differs from copy_rtx in that it handles SCRATCHes and
3845 ASM_OPERANDs properly.
3846 INSN doesn't really have to be a full INSN; it could be just the
3852 copy_insn_n_scratches = 0;
3853 orig_asm_operands_vector = 0;
3854 orig_asm_constraints_vector = 0;
3855 copy_asm_operands_vector = 0;
3856 copy_asm_constraints_vector = 0;
3857 return copy_insn_1 (insn);
3860 /* Initialize data structures and variables in this file
3861 before generating rtl for each function. */
3866 struct function *f = cfun;
3868 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3871 seq_rtl_expr = NULL;
3873 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3876 first_label_num = label_num;
3880 clear_emit_caches ();
3882 /* Init the tables that describe all the pseudo regs. */
3884 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3886 f->emit->regno_pointer_flag
3887 = (char *) xcalloc (f->emit->regno_pointer_flag_length, sizeof (char));
3889 f->emit->regno_pointer_align
3890 = (char *) xcalloc (f->emit->regno_pointer_flag_length,
3894 = (rtx *) xcalloc (f->emit->regno_pointer_flag_length * sizeof (rtx),
3897 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3898 init_virtual_regs (f->emit);
3900 /* Indicate that the virtual registers and stack locations are
3902 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3903 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3904 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3905 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3907 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3908 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3909 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3910 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3911 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3913 #ifdef STACK_BOUNDARY
3914 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
3915 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3916 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3917 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
3919 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
3920 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
3921 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
3922 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
3923 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
3926 #ifdef INIT_EXPANDERS
3931 /* Mark SS for GC. */
3934 mark_sequence_stack (ss)
3935 struct sequence_stack *ss;
3939 ggc_mark_rtx (ss->first);
3940 ggc_mark_tree (ss->sequence_rtl_expr);
3945 /* Mark ES for GC. */
3948 mark_emit_status (es)
3949 struct emit_status *es;
3957 for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
3961 mark_sequence_stack (es->sequence_stack);
3962 ggc_mark_tree (es->sequence_rtl_expr);
3963 ggc_mark_rtx (es->x_first_insn);
3966 /* Create some permanent unique rtl objects shared between all functions.
3967 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3970 init_emit_once (line_numbers)
3974 enum machine_mode mode;
3975 enum machine_mode double_mode;
3977 no_line_numbers = ! line_numbers;
3979 /* Compute the word and byte modes. */
3981 byte_mode = VOIDmode;
3982 word_mode = VOIDmode;
3983 double_mode = VOIDmode;
3985 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3986 mode = GET_MODE_WIDER_MODE (mode))
3988 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3989 && byte_mode == VOIDmode)
3992 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3993 && word_mode == VOIDmode)
3997 #ifndef DOUBLE_TYPE_SIZE
3998 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
4001 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4002 mode = GET_MODE_WIDER_MODE (mode))
4004 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4005 && double_mode == VOIDmode)
4009 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4011 /* Assign register numbers to the globally defined register rtx.
4012 This must be done at runtime because the register number field
4013 is in a union and some compilers can't initialize unions. */
4015 pc_rtx = gen_rtx (PC, VOIDmode);
4016 cc0_rtx = gen_rtx (CC0, VOIDmode);
4017 stack_pointer_rtx = gen_rtx_raw_REG (Pmode, STACK_POINTER_REGNUM);
4018 frame_pointer_rtx = gen_rtx_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4019 if (hard_frame_pointer_rtx == 0)
4020 hard_frame_pointer_rtx = gen_rtx_raw_REG (Pmode,
4021 HARD_FRAME_POINTER_REGNUM);
4022 if (arg_pointer_rtx == 0)
4023 arg_pointer_rtx = gen_rtx_raw_REG (Pmode, ARG_POINTER_REGNUM);
4024 virtual_incoming_args_rtx =
4025 gen_rtx_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4026 virtual_stack_vars_rtx =
4027 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4028 virtual_stack_dynamic_rtx =
4029 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4030 virtual_outgoing_args_rtx =
4031 gen_rtx_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4032 virtual_cfa_rtx = gen_rtx_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4034 /* These rtx must be roots if GC is enabled. */
4036 ggc_add_rtx_root (global_rtl, GR_MAX);
4038 #ifdef INIT_EXPANDERS
4039 /* This is to initialize save_machine_status and restore_machine_status before
4040 the first call to push_function_context_to. This is needed by the Chill
4041 front end which calls push_function_context_to before the first cal to
4042 init_function_start. */
4046 /* Create the unique rtx's for certain rtx codes and operand values. */
4048 /* Don't use gen_rtx here since gen_rtx in this case
4049 tries to use these variables. */
4050 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4051 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4052 gen_rtx_raw_CONST_INT (VOIDmode, i);
4054 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4056 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4057 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4058 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4060 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4062 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4063 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4064 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4065 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4067 for (i = 0; i <= 2; i++)
4069 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4070 mode = GET_MODE_WIDER_MODE (mode))
4072 rtx tem = rtx_alloc (CONST_DOUBLE);
4073 union real_extract u;
4075 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
4076 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4078 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
4079 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4080 PUT_MODE (tem, mode);
4082 const_tiny_rtx[i][(int) mode] = tem;
4085 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4087 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4088 mode = GET_MODE_WIDER_MODE (mode))
4089 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4091 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4093 mode = GET_MODE_WIDER_MODE (mode))
4094 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4097 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
4098 if (GET_MODE_CLASS (mode) == MODE_CC)
4099 const_tiny_rtx[0][(int) mode] = const0_rtx;
4101 ggc_add_rtx_root (&const_tiny_rtx[0][0], sizeof(const_tiny_rtx)/sizeof(rtx));
4102 ggc_add_rtx_root (&const_true_rtx, 1);
4104 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4105 return_address_pointer_rtx
4106 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4110 struct_value_rtx = STRUCT_VALUE;
4112 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4115 #ifdef STRUCT_VALUE_INCOMING
4116 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4118 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4119 struct_value_incoming_rtx
4120 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4122 struct_value_incoming_rtx = struct_value_rtx;
4126 #ifdef STATIC_CHAIN_REGNUM
4127 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4129 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4130 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4131 static_chain_incoming_rtx
4132 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4135 static_chain_incoming_rtx = static_chain_rtx;
4139 static_chain_rtx = STATIC_CHAIN;
4141 #ifdef STATIC_CHAIN_INCOMING
4142 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4144 static_chain_incoming_rtx = static_chain_rtx;
4148 #ifdef PIC_OFFSET_TABLE_REGNUM
4149 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4152 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4153 ggc_add_rtx_root (&struct_value_rtx, 1);
4154 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4155 ggc_add_rtx_root (&static_chain_rtx, 1);
4156 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4157 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4159 /* Initialize the CONST_INT hash table. */
4160 const_int_htab = htab_create (37,
4161 const_int_htab_hash,
4164 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4168 /* Query and clear/ restore no_line_numbers. This is used by the
4169 switch / case handling in stmt.c to give proper line numbers in
4170 warnings about unreachable code. */
4173 force_line_numbers ()
4175 int old = no_line_numbers;
4177 no_line_numbers = 0;
4179 force_next_line_note ();
4184 restore_line_number_status (old_value)
4187 no_line_numbers = old_value;