1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
41 #include "diagnostic-core.h"
49 #include "hard-reg-set.h"
51 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
58 #include "tree-pass.h"
62 #include "tree-flow.h"
64 struct target_rtl default_target_rtl;
66 struct target_rtl *this_target_rtl = &default_target_rtl;
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
74 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
75 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
76 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
78 /* Datastructures maintained for currently processed function in RTL form. */
80 struct rtl_data x_rtl;
82 /* Indexed by pseudo register number, gives the rtx for that pseudo.
83 Allocated in parallel with regno_pointer_align.
84 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
85 with length attribute nested in top level structures. */
89 /* This is *not* reset after each function. It gives each CODE_LABEL
90 in the entire compilation a unique label number. */
92 static GTY(()) int label_num = 1;
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
106 REAL_VALUE_TYPE dconsthalf;
108 /* Record fixed-point constant 0 and 1. */
109 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
110 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
112 /* We make one copy of (const_int C) where C is in
113 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
114 to save space during the compilation and simplify comparisons of
117 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
119 /* A hash table storing CONST_INTs whose absolute value is greater
120 than MAX_SAVED_CONST_INT. */
122 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
123 htab_t const_int_htab;
125 /* A hash table storing memory attribute structures. */
126 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
127 htab_t mem_attrs_htab;
129 /* A hash table storing register attribute structures. */
130 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
131 htab_t reg_attrs_htab;
133 /* A hash table storing all CONST_DOUBLEs. */
134 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
135 htab_t const_double_htab;
137 /* A hash table storing all CONST_FIXEDs. */
138 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
139 htab_t const_fixed_htab;
141 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
142 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
143 #define last_location (crtl->emit.x_last_location)
144 #define first_label_num (crtl->emit.x_first_label_num)
146 static rtx make_call_insn_raw (rtx);
147 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
148 static void set_used_decls (tree);
149 static void mark_label_nuses (rtx);
150 static hashval_t const_int_htab_hash (const void *);
151 static int const_int_htab_eq (const void *, const void *);
152 static hashval_t const_double_htab_hash (const void *);
153 static int const_double_htab_eq (const void *, const void *);
154 static rtx lookup_const_double (rtx);
155 static hashval_t const_fixed_htab_hash (const void *);
156 static int const_fixed_htab_eq (const void *, const void *);
157 static rtx lookup_const_fixed (rtx);
158 static hashval_t mem_attrs_htab_hash (const void *);
159 static int mem_attrs_htab_eq (const void *, const void *);
160 static hashval_t reg_attrs_htab_hash (const void *);
161 static int reg_attrs_htab_eq (const void *, const void *);
162 static reg_attrs *get_reg_attrs (tree, int);
163 static rtx gen_const_vector (enum machine_mode, int);
164 static void copy_rtx_if_shared_1 (rtx *orig);
166 /* Probability of the conditional branch currently proceeded by try_split.
167 Set to -1 otherwise. */
168 int split_branch_probability = -1;
170 /* Returns a hash code for X (which is a really a CONST_INT). */
173 const_int_htab_hash (const void *x)
175 return (hashval_t) INTVAL ((const_rtx) x);
178 /* Returns nonzero if the value represented by X (which is really a
179 CONST_INT) is the same as that given by Y (which is really a
183 const_int_htab_eq (const void *x, const void *y)
185 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
188 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
190 const_double_htab_hash (const void *x)
192 const_rtx const value = (const_rtx) x;
195 if (GET_MODE (value) == VOIDmode)
196 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
199 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
200 /* MODE is used in the comparison, so it should be in the hash. */
201 h ^= GET_MODE (value);
206 /* Returns nonzero if the value represented by X (really a ...)
207 is the same as that represented by Y (really a ...) */
209 const_double_htab_eq (const void *x, const void *y)
211 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
213 if (GET_MODE (a) != GET_MODE (b))
215 if (GET_MODE (a) == VOIDmode)
216 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
217 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
219 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
220 CONST_DOUBLE_REAL_VALUE (b));
223 /* Returns a hash code for X (which is really a CONST_FIXED). */
226 const_fixed_htab_hash (const void *x)
228 const_rtx const value = (const_rtx) x;
231 h = fixed_hash (CONST_FIXED_VALUE (value));
232 /* MODE is used in the comparison, so it should be in the hash. */
233 h ^= GET_MODE (value);
237 /* Returns nonzero if the value represented by X (really a ...)
238 is the same as that represented by Y (really a ...). */
241 const_fixed_htab_eq (const void *x, const void *y)
243 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
245 if (GET_MODE (a) != GET_MODE (b))
247 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
250 /* Returns a hash code for X (which is a really a mem_attrs *). */
253 mem_attrs_htab_hash (const void *x)
255 const mem_attrs *const p = (const mem_attrs *) x;
257 return (p->alias ^ (p->align * 1000)
258 ^ (p->addrspace * 4000)
259 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
260 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
261 ^ (size_t) iterative_hash_expr (p->expr, 0));
264 /* Return true if the given memory attributes are equal. */
267 mem_attrs_eq_p (const struct mem_attrs *p, const struct mem_attrs *q)
269 return (p->alias == q->alias && p->offset == q->offset
270 && p->size == q->size && p->align == q->align
271 && p->addrspace == q->addrspace
272 && (p->expr == q->expr
273 || (p->expr != NULL_TREE && q->expr != NULL_TREE
274 && operand_equal_p (p->expr, q->expr, 0))));
277 /* Returns nonzero if the value represented by X (which is really a
278 mem_attrs *) is the same as that given by Y (which is also really a
282 mem_attrs_htab_eq (const void *x, const void *y)
284 return mem_attrs_eq_p ((const mem_attrs *) x, (const mem_attrs *) y);
287 /* Set MEM's memory attributes so that they are the same as ATTRS. */
290 set_mem_attrs (rtx mem, mem_attrs *attrs)
294 /* If everything is the default, we can just clear the attributes. */
295 if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
301 slot = htab_find_slot (mem_attrs_htab, attrs, INSERT);
304 *slot = ggc_alloc_mem_attrs ();
305 memcpy (*slot, attrs, sizeof (mem_attrs));
308 MEM_ATTRS (mem) = (mem_attrs *) *slot;
311 /* Returns a hash code for X (which is a really a reg_attrs *). */
314 reg_attrs_htab_hash (const void *x)
316 const reg_attrs *const p = (const reg_attrs *) x;
318 return ((p->offset * 1000) ^ (intptr_t) p->decl);
321 /* Returns nonzero if the value represented by X (which is really a
322 reg_attrs *) is the same as that given by Y (which is also really a
326 reg_attrs_htab_eq (const void *x, const void *y)
328 const reg_attrs *const p = (const reg_attrs *) x;
329 const reg_attrs *const q = (const reg_attrs *) y;
331 return (p->decl == q->decl && p->offset == q->offset);
333 /* Allocate a new reg_attrs structure and insert it into the hash table if
334 one identical to it is not already in the table. We are doing this for
338 get_reg_attrs (tree decl, int offset)
343 /* If everything is the default, we can just return zero. */
344 if (decl == 0 && offset == 0)
348 attrs.offset = offset;
350 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
353 *slot = ggc_alloc_reg_attrs ();
354 memcpy (*slot, &attrs, sizeof (reg_attrs));
357 return (reg_attrs *) *slot;
362 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
368 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
369 MEM_VOLATILE_P (x) = true;
375 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
376 don't attempt to share with the various global pieces of rtl (such as
377 frame_pointer_rtx). */
380 gen_raw_REG (enum machine_mode mode, int regno)
382 rtx x = gen_rtx_raw_REG (mode, regno);
383 ORIGINAL_REGNO (x) = regno;
387 /* There are some RTL codes that require special attention; the generation
388 functions do the raw handling. If you add to this list, modify
389 special_rtx in gengenrtl.c as well. */
392 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
396 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
397 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
399 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
400 if (const_true_rtx && arg == STORE_FLAG_VALUE)
401 return const_true_rtx;
404 /* Look up the CONST_INT in the hash table. */
405 slot = htab_find_slot_with_hash (const_int_htab, &arg,
406 (hashval_t) arg, INSERT);
408 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
414 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
416 return GEN_INT (trunc_int_for_mode (c, mode));
419 /* CONST_DOUBLEs might be created from pairs of integers, or from
420 REAL_VALUE_TYPEs. Also, their length is known only at run time,
421 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
423 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
424 hash table. If so, return its counterpart; otherwise add it
425 to the hash table and return it. */
427 lookup_const_double (rtx real)
429 void **slot = htab_find_slot (const_double_htab, real, INSERT);
436 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
437 VALUE in mode MODE. */
439 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
441 rtx real = rtx_alloc (CONST_DOUBLE);
442 PUT_MODE (real, mode);
446 return lookup_const_double (real);
449 /* Determine whether FIXED, a CONST_FIXED, already exists in the
450 hash table. If so, return its counterpart; otherwise add it
451 to the hash table and return it. */
454 lookup_const_fixed (rtx fixed)
456 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
463 /* Return a CONST_FIXED rtx for a fixed-point value specified by
464 VALUE in mode MODE. */
467 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
469 rtx fixed = rtx_alloc (CONST_FIXED);
470 PUT_MODE (fixed, mode);
474 return lookup_const_fixed (fixed);
477 /* Constructs double_int from rtx CST. */
480 rtx_to_double_int (const_rtx cst)
484 if (CONST_INT_P (cst))
485 r = shwi_to_double_int (INTVAL (cst));
486 else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
488 r.low = CONST_DOUBLE_LOW (cst);
489 r.high = CONST_DOUBLE_HIGH (cst);
498 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
502 immed_double_int_const (double_int i, enum machine_mode mode)
504 return immed_double_const (i.low, i.high, mode);
507 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
508 of ints: I0 is the low-order word and I1 is the high-order word.
509 Do not use this routine for non-integer modes; convert to
510 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
513 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
518 /* There are the following cases (note that there are no modes with
519 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
521 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
523 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
524 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
525 from copies of the sign bit, and sign of i0 and i1 are the same), then
526 we return a CONST_INT for i0.
527 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
528 if (mode != VOIDmode)
530 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
531 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
532 /* We can get a 0 for an error mark. */
533 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
534 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
536 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
537 return gen_int_mode (i0, mode);
539 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
542 /* If this integer fits in one word, return a CONST_INT. */
543 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
546 /* We use VOIDmode for integers. */
547 value = rtx_alloc (CONST_DOUBLE);
548 PUT_MODE (value, VOIDmode);
550 CONST_DOUBLE_LOW (value) = i0;
551 CONST_DOUBLE_HIGH (value) = i1;
553 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
554 XWINT (value, i) = 0;
556 return lookup_const_double (value);
560 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
562 /* In case the MD file explicitly references the frame pointer, have
563 all such references point to the same frame pointer. This is
564 used during frame pointer elimination to distinguish the explicit
565 references to these registers from pseudos that happened to be
568 If we have eliminated the frame pointer or arg pointer, we will
569 be using it as a normal register, for example as a spill
570 register. In such cases, we might be accessing it in a mode that
571 is not Pmode and therefore cannot use the pre-allocated rtx.
573 Also don't do this when we are making new REGs in reload, since
574 we don't want to get confused with the real pointers. */
576 if (mode == Pmode && !reload_in_progress)
578 if (regno == FRAME_POINTER_REGNUM
579 && (!reload_completed || frame_pointer_needed))
580 return frame_pointer_rtx;
581 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
582 if (regno == HARD_FRAME_POINTER_REGNUM
583 && (!reload_completed || frame_pointer_needed))
584 return hard_frame_pointer_rtx;
586 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
587 if (regno == ARG_POINTER_REGNUM)
588 return arg_pointer_rtx;
590 #ifdef RETURN_ADDRESS_POINTER_REGNUM
591 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
592 return return_address_pointer_rtx;
594 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
595 && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
596 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
597 return pic_offset_table_rtx;
598 if (regno == STACK_POINTER_REGNUM)
599 return stack_pointer_rtx;
603 /* If the per-function register table has been set up, try to re-use
604 an existing entry in that table to avoid useless generation of RTL.
606 This code is disabled for now until we can fix the various backends
607 which depend on having non-shared hard registers in some cases. Long
608 term we want to re-enable this code as it can significantly cut down
609 on the amount of useless RTL that gets generated.
611 We'll also need to fix some code that runs after reload that wants to
612 set ORIGINAL_REGNO. */
617 && regno < FIRST_PSEUDO_REGISTER
618 && reg_raw_mode[regno] == mode)
619 return regno_reg_rtx[regno];
622 return gen_raw_REG (mode, regno);
626 gen_rtx_MEM (enum machine_mode mode, rtx addr)
628 rtx rt = gen_rtx_raw_MEM (mode, addr);
630 /* This field is not cleared by the mere allocation of the rtx, so
637 /* Generate a memory referring to non-trapping constant memory. */
640 gen_const_mem (enum machine_mode mode, rtx addr)
642 rtx mem = gen_rtx_MEM (mode, addr);
643 MEM_READONLY_P (mem) = 1;
644 MEM_NOTRAP_P (mem) = 1;
648 /* Generate a MEM referring to fixed portions of the frame, e.g., register
652 gen_frame_mem (enum machine_mode mode, rtx addr)
654 rtx mem = gen_rtx_MEM (mode, addr);
655 MEM_NOTRAP_P (mem) = 1;
656 set_mem_alias_set (mem, get_frame_alias_set ());
660 /* Generate a MEM referring to a temporary use of the stack, not part
661 of the fixed stack frame. For example, something which is pushed
662 by a target splitter. */
664 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
666 rtx mem = gen_rtx_MEM (mode, addr);
667 MEM_NOTRAP_P (mem) = 1;
668 if (!cfun->calls_alloca)
669 set_mem_alias_set (mem, get_frame_alias_set ());
673 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
674 this construct would be valid, and false otherwise. */
677 validate_subreg (enum machine_mode omode, enum machine_mode imode,
678 const_rtx reg, unsigned int offset)
680 unsigned int isize = GET_MODE_SIZE (imode);
681 unsigned int osize = GET_MODE_SIZE (omode);
683 /* All subregs must be aligned. */
684 if (offset % osize != 0)
687 /* The subreg offset cannot be outside the inner object. */
691 /* ??? This should not be here. Temporarily continue to allow word_mode
692 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
693 Generally, backends are doing something sketchy but it'll take time to
695 if (omode == word_mode)
697 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
698 is the culprit here, and not the backends. */
699 else if (osize >= UNITS_PER_WORD && isize >= osize)
701 /* Allow component subregs of complex and vector. Though given the below
702 extraction rules, it's not always clear what that means. */
703 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
704 && GET_MODE_INNER (imode) == omode)
706 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
707 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
708 represent this. It's questionable if this ought to be represented at
709 all -- why can't this all be hidden in post-reload splitters that make
710 arbitrarily mode changes to the registers themselves. */
711 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
713 /* Subregs involving floating point modes are not allowed to
714 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
715 (subreg:SI (reg:DF) 0) isn't. */
716 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
722 /* Paradoxical subregs must have offset zero. */
726 /* This is a normal subreg. Verify that the offset is representable. */
728 /* For hard registers, we already have most of these rules collected in
729 subreg_offset_representable_p. */
730 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
732 unsigned int regno = REGNO (reg);
734 #ifdef CANNOT_CHANGE_MODE_CLASS
735 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
736 && GET_MODE_INNER (imode) == omode)
738 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
742 return subreg_offset_representable_p (regno, imode, offset, omode);
745 /* For pseudo registers, we want most of the same checks. Namely:
746 If the register no larger than a word, the subreg must be lowpart.
747 If the register is larger than a word, the subreg must be the lowpart
748 of a subword. A subreg does *not* perform arbitrary bit extraction.
749 Given that we've already checked mode/offset alignment, we only have
750 to check subword subregs here. */
751 if (osize < UNITS_PER_WORD)
753 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
754 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
755 if (offset % UNITS_PER_WORD != low_off)
762 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
764 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
765 return gen_rtx_raw_SUBREG (mode, reg, offset);
768 /* Generate a SUBREG representing the least-significant part of REG if MODE
769 is smaller than mode of REG, otherwise paradoxical SUBREG. */
772 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
774 enum machine_mode inmode;
776 inmode = GET_MODE (reg);
777 if (inmode == VOIDmode)
779 return gen_rtx_SUBREG (mode, reg,
780 subreg_lowpart_offset (mode, inmode));
784 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
787 gen_rtvec (int n, ...)
795 /* Don't allocate an empty rtvec... */
802 rt_val = rtvec_alloc (n);
804 for (i = 0; i < n; i++)
805 rt_val->elem[i] = va_arg (p, rtx);
812 gen_rtvec_v (int n, rtx *argp)
817 /* Don't allocate an empty rtvec... */
821 rt_val = rtvec_alloc (n);
823 for (i = 0; i < n; i++)
824 rt_val->elem[i] = *argp++;
829 /* Return the number of bytes between the start of an OUTER_MODE
830 in-memory value and the start of an INNER_MODE in-memory value,
831 given that the former is a lowpart of the latter. It may be a
832 paradoxical lowpart, in which case the offset will be negative
833 on big-endian targets. */
836 byte_lowpart_offset (enum machine_mode outer_mode,
837 enum machine_mode inner_mode)
839 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
840 return subreg_lowpart_offset (outer_mode, inner_mode);
842 return -subreg_lowpart_offset (inner_mode, outer_mode);
845 /* Generate a REG rtx for a new pseudo register of mode MODE.
846 This pseudo is assigned the next sequential register number. */
849 gen_reg_rtx (enum machine_mode mode)
852 unsigned int align = GET_MODE_ALIGNMENT (mode);
854 gcc_assert (can_create_pseudo_p ());
856 /* If a virtual register with bigger mode alignment is generated,
857 increase stack alignment estimation because it might be spilled
859 if (SUPPORTS_STACK_ALIGNMENT
860 && crtl->stack_alignment_estimated < align
861 && !crtl->stack_realign_processed)
863 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
864 if (crtl->stack_alignment_estimated < min_align)
865 crtl->stack_alignment_estimated = min_align;
868 if (generating_concat_p
869 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
870 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
872 /* For complex modes, don't make a single pseudo.
873 Instead, make a CONCAT of two pseudos.
874 This allows noncontiguous allocation of the real and imaginary parts,
875 which makes much better code. Besides, allocating DCmode
876 pseudos overstrains reload on some machines like the 386. */
877 rtx realpart, imagpart;
878 enum machine_mode partmode = GET_MODE_INNER (mode);
880 realpart = gen_reg_rtx (partmode);
881 imagpart = gen_reg_rtx (partmode);
882 return gen_rtx_CONCAT (mode, realpart, imagpart);
885 /* Make sure regno_pointer_align, and regno_reg_rtx are large
886 enough to have an element for this pseudo reg number. */
888 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
890 int old_size = crtl->emit.regno_pointer_align_length;
894 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
895 memset (tmp + old_size, 0, old_size);
896 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
898 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
899 memset (new1 + old_size, 0, old_size * sizeof (rtx));
900 regno_reg_rtx = new1;
902 crtl->emit.regno_pointer_align_length = old_size * 2;
905 val = gen_raw_REG (mode, reg_rtx_no);
906 regno_reg_rtx[reg_rtx_no++] = val;
910 /* Update NEW with the same attributes as REG, but with OFFSET added
911 to the REG_OFFSET. */
914 update_reg_offset (rtx new_rtx, rtx reg, int offset)
916 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
917 REG_OFFSET (reg) + offset);
920 /* Generate a register with same attributes as REG, but with OFFSET
921 added to the REG_OFFSET. */
924 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
927 rtx new_rtx = gen_rtx_REG (mode, regno);
929 update_reg_offset (new_rtx, reg, offset);
933 /* Generate a new pseudo-register with the same attributes as REG, but
934 with OFFSET added to the REG_OFFSET. */
937 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
939 rtx new_rtx = gen_reg_rtx (mode);
941 update_reg_offset (new_rtx, reg, offset);
945 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
946 new register is a (possibly paradoxical) lowpart of the old one. */
949 adjust_reg_mode (rtx reg, enum machine_mode mode)
951 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
952 PUT_MODE (reg, mode);
955 /* Copy REG's attributes from X, if X has any attributes. If REG and X
956 have different modes, REG is a (possibly paradoxical) lowpart of X. */
959 set_reg_attrs_from_value (rtx reg, rtx x)
963 /* Hard registers can be reused for multiple purposes within the same
964 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
966 if (HARD_REGISTER_P (reg))
969 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
972 if (MEM_OFFSET_KNOWN_P (x))
973 REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
974 MEM_OFFSET (x) + offset);
976 mark_reg_pointer (reg, 0);
981 update_reg_offset (reg, x, offset);
983 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
987 /* Generate a REG rtx for a new pseudo register, copying the mode
988 and attributes from X. */
991 gen_reg_rtx_and_attrs (rtx x)
993 rtx reg = gen_reg_rtx (GET_MODE (x));
994 set_reg_attrs_from_value (reg, x);
998 /* Set the register attributes for registers contained in PARM_RTX.
999 Use needed values from memory attributes of MEM. */
1002 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1004 if (REG_P (parm_rtx))
1005 set_reg_attrs_from_value (parm_rtx, mem);
1006 else if (GET_CODE (parm_rtx) == PARALLEL)
1008 /* Check for a NULL entry in the first slot, used to indicate that the
1009 parameter goes both on the stack and in registers. */
1010 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1011 for (; i < XVECLEN (parm_rtx, 0); i++)
1013 rtx x = XVECEXP (parm_rtx, 0, i);
1014 if (REG_P (XEXP (x, 0)))
1015 REG_ATTRS (XEXP (x, 0))
1016 = get_reg_attrs (MEM_EXPR (mem),
1017 INTVAL (XEXP (x, 1)));
1022 /* Set the REG_ATTRS for registers in value X, given that X represents
1026 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1028 if (GET_CODE (x) == SUBREG)
1030 gcc_assert (subreg_lowpart_p (x));
1035 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1037 if (GET_CODE (x) == CONCAT)
1039 if (REG_P (XEXP (x, 0)))
1040 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1041 if (REG_P (XEXP (x, 1)))
1042 REG_ATTRS (XEXP (x, 1))
1043 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1045 if (GET_CODE (x) == PARALLEL)
1049 /* Check for a NULL entry, used to indicate that the parameter goes
1050 both on the stack and in registers. */
1051 if (XEXP (XVECEXP (x, 0, 0), 0))
1056 for (i = start; i < XVECLEN (x, 0); i++)
1058 rtx y = XVECEXP (x, 0, i);
1059 if (REG_P (XEXP (y, 0)))
1060 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1065 /* Assign the RTX X to declaration T. */
1068 set_decl_rtl (tree t, rtx x)
1070 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1072 set_reg_attrs_for_decl_rtl (t, x);
1075 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1076 if the ABI requires the parameter to be passed by reference. */
1079 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1081 DECL_INCOMING_RTL (t) = x;
1082 if (x && !by_reference_p)
1083 set_reg_attrs_for_decl_rtl (t, x);
1086 /* Identify REG (which may be a CONCAT) as a user register. */
1089 mark_user_reg (rtx reg)
1091 if (GET_CODE (reg) == CONCAT)
1093 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1094 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1098 gcc_assert (REG_P (reg));
1099 REG_USERVAR_P (reg) = 1;
1103 /* Identify REG as a probable pointer register and show its alignment
1104 as ALIGN, if nonzero. */
1107 mark_reg_pointer (rtx reg, int align)
1109 if (! REG_POINTER (reg))
1111 REG_POINTER (reg) = 1;
1114 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1116 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1117 /* We can no-longer be sure just how aligned this pointer is. */
1118 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1121 /* Return 1 plus largest pseudo reg number used in the current function. */
1129 /* Return 1 + the largest label number used so far in the current function. */
1132 max_label_num (void)
1137 /* Return first label number used in this function (if any were used). */
1140 get_first_label_num (void)
1142 return first_label_num;
1145 /* If the rtx for label was created during the expansion of a nested
1146 function, then first_label_num won't include this label number.
1147 Fix this now so that array indices work later. */
1150 maybe_set_first_label_num (rtx x)
1152 if (CODE_LABEL_NUMBER (x) < first_label_num)
1153 first_label_num = CODE_LABEL_NUMBER (x);
1156 /* Return a value representing some low-order bits of X, where the number
1157 of low-order bits is given by MODE. Note that no conversion is done
1158 between floating-point and fixed-point values, rather, the bit
1159 representation is returned.
1161 This function handles the cases in common between gen_lowpart, below,
1162 and two variants in cse.c and combine.c. These are the cases that can
1163 be safely handled at all points in the compilation.
1165 If this is not a case we can handle, return 0. */
1168 gen_lowpart_common (enum machine_mode mode, rtx x)
1170 int msize = GET_MODE_SIZE (mode);
1173 enum machine_mode innermode;
1175 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1176 so we have to make one up. Yuk. */
1177 innermode = GET_MODE (x);
1179 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1180 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1181 else if (innermode == VOIDmode)
1182 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1184 xsize = GET_MODE_SIZE (innermode);
1186 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1188 if (innermode == mode)
1191 /* MODE must occupy no more words than the mode of X. */
1192 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1193 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1196 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1197 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1200 offset = subreg_lowpart_offset (mode, innermode);
1202 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1203 && (GET_MODE_CLASS (mode) == MODE_INT
1204 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1206 /* If we are getting the low-order part of something that has been
1207 sign- or zero-extended, we can either just use the object being
1208 extended or make a narrower extension. If we want an even smaller
1209 piece than the size of the object being extended, call ourselves
1212 This case is used mostly by combine and cse. */
1214 if (GET_MODE (XEXP (x, 0)) == mode)
1216 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1217 return gen_lowpart_common (mode, XEXP (x, 0));
1218 else if (msize < xsize)
1219 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1221 else if (GET_CODE (x) == SUBREG || REG_P (x)
1222 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1223 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1224 return simplify_gen_subreg (mode, x, innermode, offset);
1226 /* Otherwise, we can't do this. */
1231 gen_highpart (enum machine_mode mode, rtx x)
1233 unsigned int msize = GET_MODE_SIZE (mode);
1236 /* This case loses if X is a subreg. To catch bugs early,
1237 complain if an invalid MODE is used even in other cases. */
1238 gcc_assert (msize <= UNITS_PER_WORD
1239 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1241 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1242 subreg_highpart_offset (mode, GET_MODE (x)));
1243 gcc_assert (result);
1245 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1246 the target if we have a MEM. gen_highpart must return a valid operand,
1247 emitting code if necessary to do so. */
1250 result = validize_mem (result);
1251 gcc_assert (result);
1257 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1258 be VOIDmode constant. */
1260 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1262 if (GET_MODE (exp) != VOIDmode)
1264 gcc_assert (GET_MODE (exp) == innermode);
1265 return gen_highpart (outermode, exp);
1267 return simplify_gen_subreg (outermode, exp, innermode,
1268 subreg_highpart_offset (outermode, innermode));
1271 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1274 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1276 unsigned int offset = 0;
1277 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1281 if (WORDS_BIG_ENDIAN)
1282 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1283 if (BYTES_BIG_ENDIAN)
1284 offset += difference % UNITS_PER_WORD;
1290 /* Return offset in bytes to get OUTERMODE high part
1291 of the value in mode INNERMODE stored in memory in target format. */
1293 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1295 unsigned int offset = 0;
1296 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1298 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1302 if (! WORDS_BIG_ENDIAN)
1303 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1304 if (! BYTES_BIG_ENDIAN)
1305 offset += difference % UNITS_PER_WORD;
1311 /* Return 1 iff X, assumed to be a SUBREG,
1312 refers to the least significant part of its containing reg.
1313 If X is not a SUBREG, always return 1 (it is its own low part!). */
1316 subreg_lowpart_p (const_rtx x)
1318 if (GET_CODE (x) != SUBREG)
1320 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1323 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1324 == SUBREG_BYTE (x));
1327 /* Return true if X is a paradoxical subreg, false otherwise. */
1329 paradoxical_subreg_p (const_rtx x)
1331 if (GET_CODE (x) != SUBREG)
1333 return (GET_MODE_PRECISION (GET_MODE (x))
1334 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x))));
1337 /* Return subword OFFSET of operand OP.
1338 The word number, OFFSET, is interpreted as the word number starting
1339 at the low-order address. OFFSET 0 is the low-order word if not
1340 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1342 If we cannot extract the required word, we return zero. Otherwise,
1343 an rtx corresponding to the requested word will be returned.
1345 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1346 reload has completed, a valid address will always be returned. After
1347 reload, if a valid address cannot be returned, we return zero.
1349 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1350 it is the responsibility of the caller.
1352 MODE is the mode of OP in case it is a CONST_INT.
1354 ??? This is still rather broken for some cases. The problem for the
1355 moment is that all callers of this thing provide no 'goal mode' to
1356 tell us to work with. This exists because all callers were written
1357 in a word based SUBREG world.
1358 Now use of this function can be deprecated by simplify_subreg in most
1363 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1365 if (mode == VOIDmode)
1366 mode = GET_MODE (op);
1368 gcc_assert (mode != VOIDmode);
1370 /* If OP is narrower than a word, fail. */
1372 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1375 /* If we want a word outside OP, return zero. */
1377 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1380 /* Form a new MEM at the requested address. */
1383 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1385 if (! validate_address)
1388 else if (reload_completed)
1390 if (! strict_memory_address_addr_space_p (word_mode,
1392 MEM_ADDR_SPACE (op)))
1396 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1399 /* Rest can be handled by simplify_subreg. */
1400 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1403 /* Similar to `operand_subword', but never return 0. If we can't
1404 extract the required subword, put OP into a register and try again.
1405 The second attempt must succeed. We always validate the address in
1408 MODE is the mode of OP, in case it is CONST_INT. */
1411 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1413 rtx result = operand_subword (op, offset, 1, mode);
1418 if (mode != BLKmode && mode != VOIDmode)
1420 /* If this is a register which can not be accessed by words, copy it
1421 to a pseudo register. */
1423 op = copy_to_reg (op);
1425 op = force_reg (mode, op);
1428 result = operand_subword (op, offset, 1, mode);
1429 gcc_assert (result);
1434 /* Returns 1 if both MEM_EXPR can be considered equal
1438 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1443 if (! expr1 || ! expr2)
1446 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1449 return operand_equal_p (expr1, expr2, 0);
1452 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1453 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1457 get_mem_align_offset (rtx mem, unsigned int align)
1460 unsigned HOST_WIDE_INT offset;
1462 /* This function can't use
1463 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1464 || (MAX (MEM_ALIGN (mem),
1465 get_object_alignment (MEM_EXPR (mem), align))
1469 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1471 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1472 for <variable>. get_inner_reference doesn't handle it and
1473 even if it did, the alignment in that case needs to be determined
1474 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1475 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1476 isn't sufficiently aligned, the object it is in might be. */
1477 gcc_assert (MEM_P (mem));
1478 expr = MEM_EXPR (mem);
1479 if (expr == NULL_TREE || !MEM_OFFSET_KNOWN_P (mem))
1482 offset = MEM_OFFSET (mem);
1485 if (DECL_ALIGN (expr) < align)
1488 else if (INDIRECT_REF_P (expr))
1490 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1493 else if (TREE_CODE (expr) == COMPONENT_REF)
1497 tree inner = TREE_OPERAND (expr, 0);
1498 tree field = TREE_OPERAND (expr, 1);
1499 tree byte_offset = component_ref_field_offset (expr);
1500 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1503 || !host_integerp (byte_offset, 1)
1504 || !host_integerp (bit_offset, 1))
1507 offset += tree_low_cst (byte_offset, 1);
1508 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1510 if (inner == NULL_TREE)
1512 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1513 < (unsigned int) align)
1517 else if (DECL_P (inner))
1519 if (DECL_ALIGN (inner) < align)
1523 else if (TREE_CODE (inner) != COMPONENT_REF)
1531 return offset & ((align / BITS_PER_UNIT) - 1);
1534 /* Given REF (a MEM) and T, either the type of X or the expression
1535 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1536 if we are making a new object of this type. BITPOS is nonzero if
1537 there is an offset outstanding on T that will be applied later. */
1540 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1541 HOST_WIDE_INT bitpos)
1543 HOST_WIDE_INT apply_bitpos = 0;
1545 struct mem_attrs attrs, *defattrs, *refattrs;
1547 /* It can happen that type_for_mode was given a mode for which there
1548 is no language-level type. In which case it returns NULL, which
1553 type = TYPE_P (t) ? t : TREE_TYPE (t);
1554 if (type == error_mark_node)
1557 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1558 wrong answer, as it assumes that DECL_RTL already has the right alias
1559 info. Callers should not set DECL_RTL until after the call to
1560 set_mem_attributes. */
1561 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1563 memset (&attrs, 0, sizeof (attrs));
1565 /* Get the alias set from the expression or type (perhaps using a
1566 front-end routine) and use it. */
1567 attrs.alias = get_alias_set (t);
1569 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1570 MEM_IN_STRUCT_P (ref)
1571 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1572 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1574 /* If we are making an object of this type, or if this is a DECL, we know
1575 that it is a scalar if the type is not an aggregate. */
1576 if ((objectp || DECL_P (t))
1577 && ! AGGREGATE_TYPE_P (type)
1578 && TREE_CODE (type) != COMPLEX_TYPE)
1579 MEM_SCALAR_P (ref) = 1;
1581 /* Default values from pre-existing memory attributes if present. */
1582 refattrs = MEM_ATTRS (ref);
1585 /* ??? Can this ever happen? Calling this routine on a MEM that
1586 already carries memory attributes should probably be invalid. */
1587 attrs.expr = refattrs->expr;
1588 attrs.offset = refattrs->offset;
1589 attrs.size = refattrs->size;
1590 attrs.align = refattrs->align;
1593 /* Otherwise, default values from the mode of the MEM reference. */
1596 defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
1597 gcc_assert (!defattrs->expr);
1598 gcc_assert (!defattrs->offset);
1600 /* Respect mode size. */
1601 attrs.size = defattrs->size;
1602 /* ??? Is this really necessary? We probably should always get
1603 the size from the type below. */
1605 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1606 if T is an object, always compute the object alignment below. */
1608 attrs.align = defattrs->align;
1610 attrs.align = BITS_PER_UNIT;
1611 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1612 e.g. if the type carries an alignment attribute. Should we be
1613 able to simply always use TYPE_ALIGN? */
1616 /* We can set the alignment from the type if we are making an object,
1617 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1618 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1619 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1621 else if (TREE_CODE (t) == MEM_REF)
1623 tree op0 = TREE_OPERAND (t, 0);
1624 if (TREE_CODE (op0) == ADDR_EXPR
1625 && (DECL_P (TREE_OPERAND (op0, 0))
1626 || CONSTANT_CLASS_P (TREE_OPERAND (op0, 0))))
1628 if (DECL_P (TREE_OPERAND (op0, 0)))
1629 attrs.align = DECL_ALIGN (TREE_OPERAND (op0, 0));
1630 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0, 0)))
1632 attrs.align = TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0, 0)));
1633 #ifdef CONSTANT_ALIGNMENT
1634 attrs.align = CONSTANT_ALIGNMENT (TREE_OPERAND (op0, 0),
1638 if (TREE_INT_CST_LOW (TREE_OPERAND (t, 1)) != 0)
1640 unsigned HOST_WIDE_INT ioff
1641 = TREE_INT_CST_LOW (TREE_OPERAND (t, 1));
1642 unsigned HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1643 attrs.align = MIN (aoff, attrs.align);
1647 /* ??? This isn't fully correct, we can't set the alignment from the
1648 type in all cases. */
1649 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1652 else if (TREE_CODE (t) == TARGET_MEM_REF)
1653 /* ??? This isn't fully correct, we can't set the alignment from the
1654 type in all cases. */
1655 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1657 /* If the size is known, we can set that. */
1658 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1659 attrs.size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1661 /* If T is not a type, we may be able to deduce some more information about
1666 bool align_computed = false;
1668 if (TREE_THIS_VOLATILE (t))
1669 MEM_VOLATILE_P (ref) = 1;
1671 /* Now remove any conversions: they don't change what the underlying
1672 object is. Likewise for SAVE_EXPR. */
1673 while (CONVERT_EXPR_P (t)
1674 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1675 || TREE_CODE (t) == SAVE_EXPR)
1676 t = TREE_OPERAND (t, 0);
1678 /* Note whether this expression can trap. */
1679 MEM_NOTRAP_P (ref) = !tree_could_trap_p (t);
1681 base = get_base_address (t);
1682 if (base && DECL_P (base)
1683 && TREE_READONLY (base)
1684 && (TREE_STATIC (base) || DECL_EXTERNAL (base))
1685 && !TREE_THIS_VOLATILE (base))
1686 MEM_READONLY_P (ref) = 1;
1688 /* If this expression uses it's parent's alias set, mark it such
1689 that we won't change it. */
1690 if (component_uses_parent_alias_set (t))
1691 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1693 /* If this is a decl, set the attributes of the MEM from it. */
1697 attrs.offset = const0_rtx;
1698 apply_bitpos = bitpos;
1699 attrs.size = (DECL_SIZE_UNIT (t)
1700 && host_integerp (DECL_SIZE_UNIT (t), 1)
1701 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1702 attrs.align = DECL_ALIGN (t);
1703 align_computed = true;
1706 /* If this is a constant, we know the alignment. */
1707 else if (CONSTANT_CLASS_P (t))
1709 attrs.align = TYPE_ALIGN (type);
1710 #ifdef CONSTANT_ALIGNMENT
1711 attrs.align = CONSTANT_ALIGNMENT (t, attrs.align);
1713 align_computed = true;
1716 /* If this is a field reference and not a bit-field, record it. */
1717 /* ??? There is some information that can be gleaned from bit-fields,
1718 such as the word offset in the structure that might be modified.
1719 But skip it for now. */
1720 else if (TREE_CODE (t) == COMPONENT_REF
1721 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1724 attrs.offset = const0_rtx;
1725 apply_bitpos = bitpos;
1726 /* ??? Any reason the field size would be different than
1727 the size we got from the type? */
1730 /* If this is an array reference, look for an outer field reference. */
1731 else if (TREE_CODE (t) == ARRAY_REF)
1733 tree off_tree = size_zero_node;
1734 /* We can't modify t, because we use it at the end of the
1740 tree index = TREE_OPERAND (t2, 1);
1741 tree low_bound = array_ref_low_bound (t2);
1742 tree unit_size = array_ref_element_size (t2);
1744 /* We assume all arrays have sizes that are a multiple of a byte.
1745 First subtract the lower bound, if any, in the type of the
1746 index, then convert to sizetype and multiply by the size of
1747 the array element. */
1748 if (! integer_zerop (low_bound))
1749 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1752 off_tree = size_binop (PLUS_EXPR,
1753 size_binop (MULT_EXPR,
1754 fold_convert (sizetype,
1758 t2 = TREE_OPERAND (t2, 0);
1760 while (TREE_CODE (t2) == ARRAY_REF);
1765 attrs.offset = NULL;
1766 if (host_integerp (off_tree, 1))
1768 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1769 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1770 attrs.align = DECL_ALIGN (t2);
1771 if (aoff && (unsigned HOST_WIDE_INT) aoff < attrs.align)
1773 align_computed = true;
1774 attrs.offset = GEN_INT (ioff);
1775 apply_bitpos = bitpos;
1778 else if (TREE_CODE (t2) == COMPONENT_REF)
1781 attrs.offset = NULL;
1782 if (host_integerp (off_tree, 1))
1784 attrs.offset = GEN_INT (tree_low_cst (off_tree, 1));
1785 apply_bitpos = bitpos;
1787 /* ??? Any reason the field size would be different than
1788 the size we got from the type? */
1791 /* If this is an indirect reference, record it. */
1792 else if (TREE_CODE (t) == MEM_REF)
1795 attrs.offset = const0_rtx;
1796 apply_bitpos = bitpos;
1800 /* If this is an indirect reference, record it. */
1801 else if (TREE_CODE (t) == MEM_REF
1802 || TREE_CODE (t) == TARGET_MEM_REF)
1805 attrs.offset = const0_rtx;
1806 apply_bitpos = bitpos;
1809 if (!align_computed && !INDIRECT_REF_P (t))
1811 unsigned int obj_align = get_object_alignment (t, BIGGEST_ALIGNMENT);
1812 attrs.align = MAX (attrs.align, obj_align);
1816 /* If we modified OFFSET based on T, then subtract the outstanding
1817 bit position offset. Similarly, increase the size of the accessed
1818 object to contain the negative offset. */
1821 attrs.offset = plus_constant (attrs.offset,
1822 -(apply_bitpos / BITS_PER_UNIT));
1824 attrs.size = plus_constant (attrs.size, apply_bitpos / BITS_PER_UNIT);
1827 /* Now set the attributes we computed above. */
1828 set_mem_attrs (ref, &attrs);
1830 /* If this is already known to be a scalar or aggregate, we are done. */
1831 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1834 /* If it is a reference into an aggregate, this is part of an aggregate.
1835 Otherwise we don't know. */
1836 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1837 || TREE_CODE (t) == ARRAY_RANGE_REF
1838 || TREE_CODE (t) == BIT_FIELD_REF)
1839 MEM_IN_STRUCT_P (ref) = 1;
1843 set_mem_attributes (rtx ref, tree t, int objectp)
1845 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1848 /* Set the alias set of MEM to SET. */
1851 set_mem_alias_set (rtx mem, alias_set_type set)
1853 struct mem_attrs attrs;
1855 /* If the new and old alias sets don't conflict, something is wrong. */
1856 gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1857 attrs = *get_mem_attrs (mem);
1859 set_mem_attrs (mem, &attrs);
1862 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1865 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1867 struct mem_attrs attrs;
1869 attrs = *get_mem_attrs (mem);
1870 attrs.addrspace = addrspace;
1871 set_mem_attrs (mem, &attrs);
1874 /* Set the alignment of MEM to ALIGN bits. */
1877 set_mem_align (rtx mem, unsigned int align)
1879 struct mem_attrs attrs;
1881 attrs = *get_mem_attrs (mem);
1882 attrs.align = align;
1883 set_mem_attrs (mem, &attrs);
1886 /* Set the expr for MEM to EXPR. */
1889 set_mem_expr (rtx mem, tree expr)
1891 struct mem_attrs attrs;
1893 attrs = *get_mem_attrs (mem);
1895 set_mem_attrs (mem, &attrs);
1898 /* Set the offset of MEM to OFFSET. */
1901 set_mem_offset (rtx mem, HOST_WIDE_INT offset)
1903 struct mem_attrs attrs;
1905 attrs = *get_mem_attrs (mem);
1906 attrs.offset = GEN_INT (offset);
1907 set_mem_attrs (mem, &attrs);
1910 /* Clear the offset of MEM. */
1913 clear_mem_offset (rtx mem)
1915 struct mem_attrs attrs;
1917 attrs = *get_mem_attrs (mem);
1918 attrs.offset = NULL_RTX;
1919 set_mem_attrs (mem, &attrs);
1922 /* Set the size of MEM to SIZE. */
1925 set_mem_size (rtx mem, HOST_WIDE_INT size)
1927 struct mem_attrs attrs;
1929 attrs = *get_mem_attrs (mem);
1930 attrs.size = GEN_INT (size);
1931 set_mem_attrs (mem, &attrs);
1934 /* Clear the size of MEM. */
1937 clear_mem_size (rtx mem)
1939 struct mem_attrs attrs;
1941 attrs = *get_mem_attrs (mem);
1942 attrs.size = NULL_RTX;
1943 set_mem_attrs (mem, &attrs);
1946 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1947 and its address changed to ADDR. (VOIDmode means don't change the mode.
1948 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1949 returned memory location is required to be valid. The memory
1950 attributes are not changed. */
1953 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1958 gcc_assert (MEM_P (memref));
1959 as = MEM_ADDR_SPACE (memref);
1960 if (mode == VOIDmode)
1961 mode = GET_MODE (memref);
1963 addr = XEXP (memref, 0);
1964 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1965 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1970 if (reload_in_progress || reload_completed)
1971 gcc_assert (memory_address_addr_space_p (mode, addr, as));
1973 addr = memory_address_addr_space (mode, addr, as);
1976 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1979 new_rtx = gen_rtx_MEM (mode, addr);
1980 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1984 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1985 way we are changing MEMREF, so we only preserve the alias set. */
1988 change_address (rtx memref, enum machine_mode mode, rtx addr)
1990 rtx new_rtx = change_address_1 (memref, mode, addr, 1);
1991 enum machine_mode mmode = GET_MODE (new_rtx);
1992 struct mem_attrs attrs, *defattrs;
1994 attrs = *get_mem_attrs (memref);
1995 defattrs = mode_mem_attrs[(int) mmode];
1996 attrs.expr = defattrs->expr;
1997 attrs.offset = defattrs->offset;
1998 attrs.size = defattrs->size;
1999 attrs.align = defattrs->align;
2001 /* If there are no changes, just return the original memory reference. */
2002 if (new_rtx == memref)
2004 if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
2007 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
2008 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2011 set_mem_attrs (new_rtx, &attrs);
2015 /* Return a memory reference like MEMREF, but with its mode changed
2016 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2017 nonzero, the memory address is forced to be valid.
2018 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2019 and caller is responsible for adjusting MEMREF base register. */
2022 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2023 int validate, int adjust)
2025 rtx addr = XEXP (memref, 0);
2027 enum machine_mode address_mode;
2029 struct mem_attrs attrs, *defattrs;
2030 unsigned HOST_WIDE_INT max_align;
2032 attrs = *get_mem_attrs (memref);
2034 /* If there are no changes, just return the original memory reference. */
2035 if (mode == GET_MODE (memref) && !offset
2036 && (!validate || memory_address_addr_space_p (mode, addr,
2040 /* ??? Prefer to create garbage instead of creating shared rtl.
2041 This may happen even if offset is nonzero -- consider
2042 (plus (plus reg reg) const_int) -- so do this always. */
2043 addr = copy_rtx (addr);
2045 /* Convert a possibly large offset to a signed value within the
2046 range of the target address space. */
2047 address_mode = targetm.addr_space.address_mode (attrs.addrspace);
2048 pbits = GET_MODE_BITSIZE (address_mode);
2049 if (HOST_BITS_PER_WIDE_INT > pbits)
2051 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2052 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2058 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2059 object, we can merge it into the LO_SUM. */
2060 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2062 && (unsigned HOST_WIDE_INT) offset
2063 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2064 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2065 plus_constant (XEXP (addr, 1), offset));
2067 addr = plus_constant (addr, offset);
2070 new_rtx = change_address_1 (memref, mode, addr, validate);
2072 /* If the address is a REG, change_address_1 rightfully returns memref,
2073 but this would destroy memref's MEM_ATTRS. */
2074 if (new_rtx == memref && offset != 0)
2075 new_rtx = copy_rtx (new_rtx);
2077 /* Compute the new values of the memory attributes due to this adjustment.
2078 We add the offsets and update the alignment. */
2080 attrs.offset = GEN_INT (offset + INTVAL (attrs.offset));
2082 /* Compute the new alignment by taking the MIN of the alignment and the
2083 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2087 max_align = (offset & -offset) * BITS_PER_UNIT;
2088 attrs.align = MIN (attrs.align, max_align);
2091 /* We can compute the size in a number of ways. */
2092 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2094 attrs.size = defattrs->size;
2095 else if (attrs.size)
2096 attrs.size = plus_constant (attrs.size, -offset);
2098 set_mem_attrs (new_rtx, &attrs);
2100 /* At some point, we should validate that this offset is within the object,
2101 if all the appropriate values are known. */
2105 /* Return a memory reference like MEMREF, but with its mode changed
2106 to MODE and its address changed to ADDR, which is assumed to be
2107 MEMREF offset by OFFSET bytes. If VALIDATE is
2108 nonzero, the memory address is forced to be valid. */
2111 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2112 HOST_WIDE_INT offset, int validate)
2114 memref = change_address_1 (memref, VOIDmode, addr, validate);
2115 return adjust_address_1 (memref, mode, offset, validate, 0);
2118 /* Return a memory reference like MEMREF, but whose address is changed by
2119 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2120 known to be in OFFSET (possibly 1). */
2123 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2125 rtx new_rtx, addr = XEXP (memref, 0);
2126 enum machine_mode address_mode;
2127 struct mem_attrs attrs;
2129 attrs = *get_mem_attrs (memref);
2130 address_mode = targetm.addr_space.address_mode (attrs.addrspace);
2131 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2133 /* At this point we don't know _why_ the address is invalid. It
2134 could have secondary memory references, multiplies or anything.
2136 However, if we did go and rearrange things, we can wind up not
2137 being able to recognize the magic around pic_offset_table_rtx.
2138 This stuff is fragile, and is yet another example of why it is
2139 bad to expose PIC machinery too early. */
2140 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2142 && GET_CODE (addr) == PLUS
2143 && XEXP (addr, 0) == pic_offset_table_rtx)
2145 addr = force_reg (GET_MODE (addr), addr);
2146 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2149 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2150 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2152 /* If there are no changes, just return the original memory reference. */
2153 if (new_rtx == memref)
2156 /* Update the alignment to reflect the offset. Reset the offset, which
2159 attrs.size = mode_mem_attrs[(int) GET_MODE (new_rtx)]->size;
2160 attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2161 set_mem_attrs (new_rtx, &attrs);
2165 /* Return a memory reference like MEMREF, but with its address changed to
2166 ADDR. The caller is asserting that the actual piece of memory pointed
2167 to is the same, just the form of the address is being changed, such as
2168 by putting something into a register. */
2171 replace_equiv_address (rtx memref, rtx addr)
2173 /* change_address_1 copies the memory attribute structure without change
2174 and that's exactly what we want here. */
2175 update_temp_slot_address (XEXP (memref, 0), addr);
2176 return change_address_1 (memref, VOIDmode, addr, 1);
2179 /* Likewise, but the reference is not required to be valid. */
2182 replace_equiv_address_nv (rtx memref, rtx addr)
2184 return change_address_1 (memref, VOIDmode, addr, 0);
2187 /* Return a memory reference like MEMREF, but with its mode widened to
2188 MODE and offset by OFFSET. This would be used by targets that e.g.
2189 cannot issue QImode memory operations and have to use SImode memory
2190 operations plus masking logic. */
2193 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2195 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2196 struct mem_attrs attrs;
2197 unsigned int size = GET_MODE_SIZE (mode);
2199 /* If there are no changes, just return the original memory reference. */
2200 if (new_rtx == memref)
2203 attrs = *get_mem_attrs (new_rtx);
2205 /* If we don't know what offset we were at within the expression, then
2206 we can't know if we've overstepped the bounds. */
2208 attrs.expr = NULL_TREE;
2212 if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2214 tree field = TREE_OPERAND (attrs.expr, 1);
2215 tree offset = component_ref_field_offset (attrs.expr);
2217 if (! DECL_SIZE_UNIT (field))
2219 attrs.expr = NULL_TREE;
2223 /* Is the field at least as large as the access? If so, ok,
2224 otherwise strip back to the containing structure. */
2225 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2226 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2227 && INTVAL (attrs.offset) >= 0)
2230 if (! host_integerp (offset, 1))
2232 attrs.expr = NULL_TREE;
2236 attrs.expr = TREE_OPERAND (attrs.expr, 0);
2238 = (GEN_INT (INTVAL (attrs.offset)
2239 + tree_low_cst (offset, 1)
2240 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2243 /* Similarly for the decl. */
2244 else if (DECL_P (attrs.expr)
2245 && DECL_SIZE_UNIT (attrs.expr)
2246 && TREE_CODE (DECL_SIZE_UNIT (attrs.expr)) == INTEGER_CST
2247 && compare_tree_int (DECL_SIZE_UNIT (attrs.expr), size) >= 0
2248 && (! attrs.offset || INTVAL (attrs.offset) >= 0))
2252 /* The widened memory access overflows the expression, which means
2253 that it could alias another expression. Zap it. */
2254 attrs.expr = NULL_TREE;
2260 attrs.offset = NULL_RTX;
2262 /* The widened memory may alias other stuff, so zap the alias set. */
2263 /* ??? Maybe use get_alias_set on any remaining expression. */
2265 attrs.size = GEN_INT (size);
2266 set_mem_attrs (new_rtx, &attrs);
2270 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2271 static GTY(()) tree spill_slot_decl;
2274 get_spill_slot_decl (bool force_build_p)
2276 tree d = spill_slot_decl;
2278 struct mem_attrs attrs;
2280 if (d || !force_build_p)
2283 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2284 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2285 DECL_ARTIFICIAL (d) = 1;
2286 DECL_IGNORED_P (d) = 1;
2288 spill_slot_decl = d;
2290 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2291 MEM_NOTRAP_P (rd) = 1;
2292 attrs = *mode_mem_attrs[(int) BLKmode];
2293 attrs.alias = new_alias_set ();
2295 set_mem_attrs (rd, &attrs);
2296 SET_DECL_RTL (d, rd);
2301 /* Given MEM, a result from assign_stack_local, fill in the memory
2302 attributes as appropriate for a register allocator spill slot.
2303 These slots are not aliasable by other memory. We arrange for
2304 them all to use a single MEM_EXPR, so that the aliasing code can
2305 work properly in the case of shared spill slots. */
2308 set_mem_attrs_for_spill (rtx mem)
2310 struct mem_attrs attrs;
2313 attrs = *get_mem_attrs (mem);
2314 attrs.expr = get_spill_slot_decl (true);
2315 attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2316 attrs.addrspace = ADDR_SPACE_GENERIC;
2318 /* We expect the incoming memory to be of the form:
2319 (mem:MODE (plus (reg sfp) (const_int offset)))
2320 with perhaps the plus missing for offset = 0. */
2321 addr = XEXP (mem, 0);
2322 attrs.offset = const0_rtx;
2323 if (GET_CODE (addr) == PLUS
2324 && CONST_INT_P (XEXP (addr, 1)))
2325 attrs.offset = XEXP (addr, 1);
2327 set_mem_attrs (mem, &attrs);
2328 MEM_NOTRAP_P (mem) = 1;
2331 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2334 gen_label_rtx (void)
2336 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2337 NULL, label_num++, NULL);
2340 /* For procedure integration. */
2342 /* Install new pointers to the first and last insns in the chain.
2343 Also, set cur_insn_uid to one higher than the last in use.
2344 Used for an inline-procedure after copying the insn chain. */
2347 set_new_first_and_last_insn (rtx first, rtx last)
2351 set_first_insn (first);
2352 set_last_insn (last);
2355 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2357 int debug_count = 0;
2359 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2360 cur_debug_insn_uid = 0;
2362 for (insn = first; insn; insn = NEXT_INSN (insn))
2363 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2364 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2367 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2368 if (DEBUG_INSN_P (insn))
2373 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2375 cur_debug_insn_uid++;
2378 for (insn = first; insn; insn = NEXT_INSN (insn))
2379 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2384 /* Go through all the RTL insn bodies and copy any invalid shared
2385 structure. This routine should only be called once. */
2388 unshare_all_rtl_1 (rtx insn)
2390 /* Unshare just about everything else. */
2391 unshare_all_rtl_in_chain (insn);
2393 /* Make sure the addresses of stack slots found outside the insn chain
2394 (such as, in DECL_RTL of a variable) are not shared
2395 with the insn chain.
2397 This special care is necessary when the stack slot MEM does not
2398 actually appear in the insn chain. If it does appear, its address
2399 is unshared from all else at that point. */
2400 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2403 /* Go through all the RTL insn bodies and copy any invalid shared
2404 structure, again. This is a fairly expensive thing to do so it
2405 should be done sparingly. */
2408 unshare_all_rtl_again (rtx insn)
2413 for (p = insn; p; p = NEXT_INSN (p))
2416 reset_used_flags (PATTERN (p));
2417 reset_used_flags (REG_NOTES (p));
2420 /* Make sure that virtual stack slots are not shared. */
2421 set_used_decls (DECL_INITIAL (cfun->decl));
2423 /* Make sure that virtual parameters are not shared. */
2424 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2425 set_used_flags (DECL_RTL (decl));
2427 reset_used_flags (stack_slot_list);
2429 unshare_all_rtl_1 (insn);
2433 unshare_all_rtl (void)
2435 unshare_all_rtl_1 (get_insns ());
2439 struct rtl_opt_pass pass_unshare_all_rtl =
2443 "unshare", /* name */
2445 unshare_all_rtl, /* execute */
2448 0, /* static_pass_number */
2449 TV_NONE, /* tv_id */
2450 0, /* properties_required */
2451 0, /* properties_provided */
2452 0, /* properties_destroyed */
2453 0, /* todo_flags_start */
2454 TODO_verify_rtl_sharing /* todo_flags_finish */
2459 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2460 Recursively does the same for subexpressions. */
2463 verify_rtx_sharing (rtx orig, rtx insn)
2468 const char *format_ptr;
2473 code = GET_CODE (x);
2475 /* These types may be freely shared. */
2494 /* SCRATCH must be shared because they represent distinct values. */
2496 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2501 if (shared_const_p (orig))
2506 /* A MEM is allowed to be shared if its address is constant. */
2507 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2508 || reload_completed || reload_in_progress)
2517 /* This rtx may not be shared. If it has already been seen,
2518 replace it with a copy of itself. */
2519 #ifdef ENABLE_CHECKING
2520 if (RTX_FLAG (x, used))
2522 error ("invalid rtl sharing found in the insn");
2524 error ("shared rtx");
2526 internal_error ("internal consistency failure");
2529 gcc_assert (!RTX_FLAG (x, used));
2531 RTX_FLAG (x, used) = 1;
2533 /* Now scan the subexpressions recursively. */
2535 format_ptr = GET_RTX_FORMAT (code);
2537 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2539 switch (*format_ptr++)
2542 verify_rtx_sharing (XEXP (x, i), insn);
2546 if (XVEC (x, i) != NULL)
2549 int len = XVECLEN (x, i);
2551 for (j = 0; j < len; j++)
2553 /* We allow sharing of ASM_OPERANDS inside single
2555 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2556 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2558 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2560 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2569 /* Go through all the RTL insn bodies and check that there is no unexpected
2570 sharing in between the subexpressions. */
2573 verify_rtl_sharing (void)
2577 timevar_push (TV_VERIFY_RTL_SHARING);
2579 for (p = get_insns (); p; p = NEXT_INSN (p))
2582 reset_used_flags (PATTERN (p));
2583 reset_used_flags (REG_NOTES (p));
2584 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2587 rtx q, sequence = PATTERN (p);
2589 for (i = 0; i < XVECLEN (sequence, 0); i++)
2591 q = XVECEXP (sequence, 0, i);
2592 gcc_assert (INSN_P (q));
2593 reset_used_flags (PATTERN (q));
2594 reset_used_flags (REG_NOTES (q));
2599 for (p = get_insns (); p; p = NEXT_INSN (p))
2602 verify_rtx_sharing (PATTERN (p), p);
2603 verify_rtx_sharing (REG_NOTES (p), p);
2606 timevar_pop (TV_VERIFY_RTL_SHARING);
2609 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2610 Assumes the mark bits are cleared at entry. */
2613 unshare_all_rtl_in_chain (rtx insn)
2615 for (; insn; insn = NEXT_INSN (insn))
2618 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2619 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2623 /* Go through all virtual stack slots of a function and mark them as
2624 shared. We never replace the DECL_RTLs themselves with a copy,
2625 but expressions mentioned into a DECL_RTL cannot be shared with
2626 expressions in the instruction stream.
2628 Note that reload may convert pseudo registers into memories in-place.
2629 Pseudo registers are always shared, but MEMs never are. Thus if we
2630 reset the used flags on MEMs in the instruction stream, we must set
2631 them again on MEMs that appear in DECL_RTLs. */
2634 set_used_decls (tree blk)
2639 for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
2640 if (DECL_RTL_SET_P (t))
2641 set_used_flags (DECL_RTL (t));
2643 /* Now process sub-blocks. */
2644 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2648 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2649 Recursively does the same for subexpressions. Uses
2650 copy_rtx_if_shared_1 to reduce stack space. */
2653 copy_rtx_if_shared (rtx orig)
2655 copy_rtx_if_shared_1 (&orig);
2659 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2660 use. Recursively does the same for subexpressions. */
2663 copy_rtx_if_shared_1 (rtx *orig1)
2669 const char *format_ptr;
2673 /* Repeat is used to turn tail-recursion into iteration. */
2680 code = GET_CODE (x);
2682 /* These types may be freely shared. */
2699 /* SCRATCH must be shared because they represent distinct values. */
2702 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2707 if (shared_const_p (x))
2717 /* The chain of insns is not being copied. */
2724 /* This rtx may not be shared. If it has already been seen,
2725 replace it with a copy of itself. */
2727 if (RTX_FLAG (x, used))
2729 x = shallow_copy_rtx (x);
2732 RTX_FLAG (x, used) = 1;
2734 /* Now scan the subexpressions recursively.
2735 We can store any replaced subexpressions directly into X
2736 since we know X is not shared! Any vectors in X
2737 must be copied if X was copied. */
2739 format_ptr = GET_RTX_FORMAT (code);
2740 length = GET_RTX_LENGTH (code);
2743 for (i = 0; i < length; i++)
2745 switch (*format_ptr++)
2749 copy_rtx_if_shared_1 (last_ptr);
2750 last_ptr = &XEXP (x, i);
2754 if (XVEC (x, i) != NULL)
2757 int len = XVECLEN (x, i);
2759 /* Copy the vector iff I copied the rtx and the length
2761 if (copied && len > 0)
2762 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2764 /* Call recursively on all inside the vector. */
2765 for (j = 0; j < len; j++)
2768 copy_rtx_if_shared_1 (last_ptr);
2769 last_ptr = &XVECEXP (x, i, j);
2784 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2787 mark_used_flags (rtx x, int flag)
2791 const char *format_ptr;
2794 /* Repeat is used to turn tail-recursion into iteration. */
2799 code = GET_CODE (x);
2801 /* These types may be freely shared so we needn't do any resetting
2826 /* The chain of insns is not being copied. */
2833 RTX_FLAG (x, used) = flag;
2835 format_ptr = GET_RTX_FORMAT (code);
2836 length = GET_RTX_LENGTH (code);
2838 for (i = 0; i < length; i++)
2840 switch (*format_ptr++)
2848 mark_used_flags (XEXP (x, i), flag);
2852 for (j = 0; j < XVECLEN (x, i); j++)
2853 mark_used_flags (XVECEXP (x, i, j), flag);
2859 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2860 to look for shared sub-parts. */
2863 reset_used_flags (rtx x)
2865 mark_used_flags (x, 0);
2868 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2869 to look for shared sub-parts. */
2872 set_used_flags (rtx x)
2874 mark_used_flags (x, 1);
2877 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2878 Return X or the rtx for the pseudo reg the value of X was copied into.
2879 OTHER must be valid as a SET_DEST. */
2882 make_safe_from (rtx x, rtx other)
2885 switch (GET_CODE (other))
2888 other = SUBREG_REG (other);
2890 case STRICT_LOW_PART:
2893 other = XEXP (other, 0);
2902 && GET_CODE (x) != SUBREG)
2904 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2905 || reg_mentioned_p (other, x))))
2907 rtx temp = gen_reg_rtx (GET_MODE (x));
2908 emit_move_insn (temp, x);
2914 /* Emission of insns (adding them to the doubly-linked list). */
2916 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2919 get_last_insn_anywhere (void)
2921 struct sequence_stack *stack;
2922 if (get_last_insn ())
2923 return get_last_insn ();
2924 for (stack = seq_stack; stack; stack = stack->next)
2925 if (stack->last != 0)
2930 /* Return the first nonnote insn emitted in current sequence or current
2931 function. This routine looks inside SEQUENCEs. */
2934 get_first_nonnote_insn (void)
2936 rtx insn = get_insns ();
2941 for (insn = next_insn (insn);
2942 insn && NOTE_P (insn);
2943 insn = next_insn (insn))
2947 if (NONJUMP_INSN_P (insn)
2948 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2949 insn = XVECEXP (PATTERN (insn), 0, 0);
2956 /* Return the last nonnote insn emitted in current sequence or current
2957 function. This routine looks inside SEQUENCEs. */
2960 get_last_nonnote_insn (void)
2962 rtx insn = get_last_insn ();
2967 for (insn = previous_insn (insn);
2968 insn && NOTE_P (insn);
2969 insn = previous_insn (insn))
2973 if (NONJUMP_INSN_P (insn)
2974 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2975 insn = XVECEXP (PATTERN (insn), 0,
2976 XVECLEN (PATTERN (insn), 0) - 1);
2983 /* Return the number of actual (non-debug) insns emitted in this
2987 get_max_insn_count (void)
2989 int n = cur_insn_uid;
2991 /* The table size must be stable across -g, to avoid codegen
2992 differences due to debug insns, and not be affected by
2993 -fmin-insn-uid, to avoid excessive table size and to simplify
2994 debugging of -fcompare-debug failures. */
2995 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
2996 n -= cur_debug_insn_uid;
2998 n -= MIN_NONDEBUG_INSN_UID;
3004 /* Return the next insn. If it is a SEQUENCE, return the first insn
3008 next_insn (rtx insn)
3012 insn = NEXT_INSN (insn);
3013 if (insn && NONJUMP_INSN_P (insn)
3014 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3015 insn = XVECEXP (PATTERN (insn), 0, 0);
3021 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3025 previous_insn (rtx insn)
3029 insn = PREV_INSN (insn);
3030 if (insn && NONJUMP_INSN_P (insn)
3031 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3032 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3038 /* Return the next insn after INSN that is not a NOTE. This routine does not
3039 look inside SEQUENCEs. */
3042 next_nonnote_insn (rtx insn)
3046 insn = NEXT_INSN (insn);
3047 if (insn == 0 || !NOTE_P (insn))
3054 /* Return the next insn after INSN that is not a NOTE, but stop the
3055 search before we enter another basic block. This routine does not
3056 look inside SEQUENCEs. */
3059 next_nonnote_insn_bb (rtx insn)
3063 insn = NEXT_INSN (insn);
3064 if (insn == 0 || !NOTE_P (insn))
3066 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3073 /* Return the previous insn before INSN that is not a NOTE. This routine does
3074 not look inside SEQUENCEs. */
3077 prev_nonnote_insn (rtx insn)
3081 insn = PREV_INSN (insn);
3082 if (insn == 0 || !NOTE_P (insn))
3089 /* Return the previous insn before INSN that is not a NOTE, but stop
3090 the search before we enter another basic block. This routine does
3091 not look inside SEQUENCEs. */
3094 prev_nonnote_insn_bb (rtx insn)
3098 insn = PREV_INSN (insn);
3099 if (insn == 0 || !NOTE_P (insn))
3101 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3108 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3109 routine does not look inside SEQUENCEs. */
3112 next_nondebug_insn (rtx insn)
3116 insn = NEXT_INSN (insn);
3117 if (insn == 0 || !DEBUG_INSN_P (insn))
3124 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3125 This routine does not look inside SEQUENCEs. */
3128 prev_nondebug_insn (rtx insn)
3132 insn = PREV_INSN (insn);
3133 if (insn == 0 || !DEBUG_INSN_P (insn))
3140 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3141 This routine does not look inside SEQUENCEs. */
3144 next_nonnote_nondebug_insn (rtx insn)
3148 insn = NEXT_INSN (insn);
3149 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3156 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3157 This routine does not look inside SEQUENCEs. */
3160 prev_nonnote_nondebug_insn (rtx insn)
3164 insn = PREV_INSN (insn);
3165 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3172 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3173 or 0, if there is none. This routine does not look inside
3177 next_real_insn (rtx insn)
3181 insn = NEXT_INSN (insn);
3182 if (insn == 0 || INSN_P (insn))
3189 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3190 or 0, if there is none. This routine does not look inside
3194 prev_real_insn (rtx insn)
3198 insn = PREV_INSN (insn);
3199 if (insn == 0 || INSN_P (insn))
3206 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3207 This routine does not look inside SEQUENCEs. */
3210 last_call_insn (void)
3214 for (insn = get_last_insn ();
3215 insn && !CALL_P (insn);
3216 insn = PREV_INSN (insn))
3222 /* Find the next insn after INSN that really does something. This routine
3223 does not look inside SEQUENCEs. After reload this also skips over
3224 standalone USE and CLOBBER insn. */
3227 active_insn_p (const_rtx insn)
3229 return (CALL_P (insn) || JUMP_P (insn)
3230 || (NONJUMP_INSN_P (insn)
3231 && (! reload_completed
3232 || (GET_CODE (PATTERN (insn)) != USE
3233 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3237 next_active_insn (rtx insn)
3241 insn = NEXT_INSN (insn);
3242 if (insn == 0 || active_insn_p (insn))
3249 /* Find the last insn before INSN that really does something. This routine
3250 does not look inside SEQUENCEs. After reload this also skips over
3251 standalone USE and CLOBBER insn. */
3254 prev_active_insn (rtx insn)
3258 insn = PREV_INSN (insn);
3259 if (insn == 0 || active_insn_p (insn))
3266 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3269 next_label (rtx insn)
3273 insn = NEXT_INSN (insn);
3274 if (insn == 0 || LABEL_P (insn))
3281 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3284 prev_label (rtx insn)
3288 insn = PREV_INSN (insn);
3289 if (insn == 0 || LABEL_P (insn))
3296 /* Return the last label to mark the same position as LABEL. Return null
3297 if LABEL itself is null. */
3300 skip_consecutive_labels (rtx label)
3304 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3312 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3313 and REG_CC_USER notes so we can find it. */
3316 link_cc0_insns (rtx insn)
3318 rtx user = next_nonnote_insn (insn);
3320 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3321 user = XVECEXP (PATTERN (user), 0, 0);
3323 add_reg_note (user, REG_CC_SETTER, insn);
3324 add_reg_note (insn, REG_CC_USER, user);
3327 /* Return the next insn that uses CC0 after INSN, which is assumed to
3328 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3329 applied to the result of this function should yield INSN).
3331 Normally, this is simply the next insn. However, if a REG_CC_USER note
3332 is present, it contains the insn that uses CC0.
3334 Return 0 if we can't find the insn. */
3337 next_cc0_user (rtx insn)
3339 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3342 return XEXP (note, 0);
3344 insn = next_nonnote_insn (insn);
3345 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3346 insn = XVECEXP (PATTERN (insn), 0, 0);
3348 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3354 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3355 note, it is the previous insn. */
3358 prev_cc0_setter (rtx insn)
3360 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3363 return XEXP (note, 0);
3365 insn = prev_nonnote_insn (insn);
3366 gcc_assert (sets_cc0_p (PATTERN (insn)));
3373 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3376 find_auto_inc (rtx *xp, void *data)
3379 rtx reg = (rtx) data;
3381 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3384 switch (GET_CODE (x))
3392 if (rtx_equal_p (reg, XEXP (x, 0)))
3403 /* Increment the label uses for all labels present in rtx. */
3406 mark_label_nuses (rtx x)
3412 code = GET_CODE (x);
3413 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3414 LABEL_NUSES (XEXP (x, 0))++;
3416 fmt = GET_RTX_FORMAT (code);
3417 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3420 mark_label_nuses (XEXP (x, i));
3421 else if (fmt[i] == 'E')
3422 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3423 mark_label_nuses (XVECEXP (x, i, j));
3428 /* Try splitting insns that can be split for better scheduling.
3429 PAT is the pattern which might split.
3430 TRIAL is the insn providing PAT.
3431 LAST is nonzero if we should return the last insn of the sequence produced.
3433 If this routine succeeds in splitting, it returns the first or last
3434 replacement insn depending on the value of LAST. Otherwise, it
3435 returns TRIAL. If the insn to be returned can be split, it will be. */
3438 try_split (rtx pat, rtx trial, int last)
3440 rtx before = PREV_INSN (trial);
3441 rtx after = NEXT_INSN (trial);
3442 int has_barrier = 0;
3445 rtx insn_last, insn;
3448 /* We're not good at redistributing frame information. */
3449 if (RTX_FRAME_RELATED_P (trial))
3452 if (any_condjump_p (trial)
3453 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3454 split_branch_probability = INTVAL (XEXP (note, 0));
3455 probability = split_branch_probability;
3457 seq = split_insns (pat, trial);
3459 split_branch_probability = -1;
3461 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3462 We may need to handle this specially. */
3463 if (after && BARRIER_P (after))
3466 after = NEXT_INSN (after);
3472 /* Avoid infinite loop if any insn of the result matches
3473 the original pattern. */
3477 if (INSN_P (insn_last)
3478 && rtx_equal_p (PATTERN (insn_last), pat))
3480 if (!NEXT_INSN (insn_last))
3482 insn_last = NEXT_INSN (insn_last);
3485 /* We will be adding the new sequence to the function. The splitters
3486 may have introduced invalid RTL sharing, so unshare the sequence now. */
3487 unshare_all_rtl_in_chain (seq);
3490 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3494 mark_jump_label (PATTERN (insn), insn, 0);
3496 if (probability != -1
3497 && any_condjump_p (insn)
3498 && !find_reg_note (insn, REG_BR_PROB, 0))
3500 /* We can preserve the REG_BR_PROB notes only if exactly
3501 one jump is created, otherwise the machine description
3502 is responsible for this step using
3503 split_branch_probability variable. */
3504 gcc_assert (njumps == 1);
3505 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3510 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3511 in SEQ and copy any additional information across. */
3514 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3519 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3520 target may have explicitly specified. */
3521 p = &CALL_INSN_FUNCTION_USAGE (insn);
3524 *p = CALL_INSN_FUNCTION_USAGE (trial);
3526 /* If the old call was a sibling call, the new one must
3528 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3530 /* If the new call is the last instruction in the sequence,
3531 it will effectively replace the old call in-situ. Otherwise
3532 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3533 so that it comes immediately after the new call. */
3534 if (NEXT_INSN (insn))
3535 for (next = NEXT_INSN (trial);
3536 next && NOTE_P (next);
3537 next = NEXT_INSN (next))
3538 if (NOTE_KIND (next) == NOTE_INSN_CALL_ARG_LOCATION)
3541 add_insn_after (next, insn, NULL);
3547 /* Copy notes, particularly those related to the CFG. */
3548 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3550 switch (REG_NOTE_KIND (note))
3553 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3558 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3561 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3565 case REG_NON_LOCAL_GOTO:
3566 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3569 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3575 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3577 rtx reg = XEXP (note, 0);
3578 if (!FIND_REG_INC_NOTE (insn, reg)
3579 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3580 add_reg_note (insn, REG_INC, reg);
3590 /* If there are LABELS inside the split insns increment the
3591 usage count so we don't delete the label. */
3595 while (insn != NULL_RTX)
3597 /* JUMP_P insns have already been "marked" above. */
3598 if (NONJUMP_INSN_P (insn))
3599 mark_label_nuses (PATTERN (insn));
3601 insn = PREV_INSN (insn);
3605 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3607 delete_insn (trial);
3609 emit_barrier_after (tem);
3611 /* Recursively call try_split for each new insn created; by the
3612 time control returns here that insn will be fully split, so
3613 set LAST and continue from the insn after the one returned.
3614 We can't use next_active_insn here since AFTER may be a note.
3615 Ignore deleted insns, which can be occur if not optimizing. */
3616 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3617 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3618 tem = try_split (PATTERN (tem), tem, 1);
3620 /* Return either the first or the last insn, depending on which was
3623 ? (after ? PREV_INSN (after) : get_last_insn ())
3624 : NEXT_INSN (before);
3627 /* Make and return an INSN rtx, initializing all its slots.
3628 Store PATTERN in the pattern slots. */
3631 make_insn_raw (rtx pattern)
3635 insn = rtx_alloc (INSN);
3637 INSN_UID (insn) = cur_insn_uid++;
3638 PATTERN (insn) = pattern;
3639 INSN_CODE (insn) = -1;
3640 REG_NOTES (insn) = NULL;
3641 INSN_LOCATOR (insn) = curr_insn_locator ();
3642 BLOCK_FOR_INSN (insn) = NULL;
3644 #ifdef ENABLE_RTL_CHECKING
3647 && (returnjump_p (insn)
3648 || (GET_CODE (insn) == SET
3649 && SET_DEST (insn) == pc_rtx)))
3651 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3659 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3662 make_debug_insn_raw (rtx pattern)
3666 insn = rtx_alloc (DEBUG_INSN);
3667 INSN_UID (insn) = cur_debug_insn_uid++;
3668 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3669 INSN_UID (insn) = cur_insn_uid++;
3671 PATTERN (insn) = pattern;
3672 INSN_CODE (insn) = -1;
3673 REG_NOTES (insn) = NULL;
3674 INSN_LOCATOR (insn) = curr_insn_locator ();
3675 BLOCK_FOR_INSN (insn) = NULL;
3680 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3683 make_jump_insn_raw (rtx pattern)
3687 insn = rtx_alloc (JUMP_INSN);
3688 INSN_UID (insn) = cur_insn_uid++;
3690 PATTERN (insn) = pattern;
3691 INSN_CODE (insn) = -1;
3692 REG_NOTES (insn) = NULL;
3693 JUMP_LABEL (insn) = NULL;
3694 INSN_LOCATOR (insn) = curr_insn_locator ();
3695 BLOCK_FOR_INSN (insn) = NULL;
3700 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3703 make_call_insn_raw (rtx pattern)
3707 insn = rtx_alloc (CALL_INSN);
3708 INSN_UID (insn) = cur_insn_uid++;
3710 PATTERN (insn) = pattern;
3711 INSN_CODE (insn) = -1;
3712 REG_NOTES (insn) = NULL;
3713 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3714 INSN_LOCATOR (insn) = curr_insn_locator ();
3715 BLOCK_FOR_INSN (insn) = NULL;
3720 /* Add INSN to the end of the doubly-linked list.
3721 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3726 PREV_INSN (insn) = get_last_insn();
3727 NEXT_INSN (insn) = 0;
3729 if (NULL != get_last_insn())
3730 NEXT_INSN (get_last_insn ()) = insn;
3732 if (NULL == get_insns ())
3733 set_first_insn (insn);
3735 set_last_insn (insn);
3738 /* Add INSN into the doubly-linked list after insn AFTER. This and
3739 the next should be the only functions called to insert an insn once
3740 delay slots have been filled since only they know how to update a
3744 add_insn_after (rtx insn, rtx after, basic_block bb)
3746 rtx next = NEXT_INSN (after);
3748 gcc_assert (!optimize || !INSN_DELETED_P (after));
3750 NEXT_INSN (insn) = next;
3751 PREV_INSN (insn) = after;
3755 PREV_INSN (next) = insn;
3756 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3757 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3759 else if (get_last_insn () == after)
3760 set_last_insn (insn);
3763 struct sequence_stack *stack = seq_stack;
3764 /* Scan all pending sequences too. */
3765 for (; stack; stack = stack->next)
3766 if (after == stack->last)
3775 if (!BARRIER_P (after)
3776 && !BARRIER_P (insn)
3777 && (bb = BLOCK_FOR_INSN (after)))
3779 set_block_for_insn (insn, bb);
3781 df_insn_rescan (insn);
3782 /* Should not happen as first in the BB is always
3783 either NOTE or LABEL. */
3784 if (BB_END (bb) == after
3785 /* Avoid clobbering of structure when creating new BB. */
3786 && !BARRIER_P (insn)
3787 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3791 NEXT_INSN (after) = insn;
3792 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3794 rtx sequence = PATTERN (after);
3795 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3799 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3800 the previous should be the only functions called to insert an insn
3801 once delay slots have been filled since only they know how to
3802 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3806 add_insn_before (rtx insn, rtx before, basic_block bb)
3808 rtx prev = PREV_INSN (before);
3810 gcc_assert (!optimize || !INSN_DELETED_P (before));
3812 PREV_INSN (insn) = prev;
3813 NEXT_INSN (insn) = before;
3817 NEXT_INSN (prev) = insn;
3818 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3820 rtx sequence = PATTERN (prev);
3821 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3824 else if (get_insns () == before)
3825 set_first_insn (insn);
3828 struct sequence_stack *stack = seq_stack;
3829 /* Scan all pending sequences too. */
3830 for (; stack; stack = stack->next)
3831 if (before == stack->first)
3833 stack->first = insn;
3841 && !BARRIER_P (before)
3842 && !BARRIER_P (insn))
3843 bb = BLOCK_FOR_INSN (before);
3847 set_block_for_insn (insn, bb);
3849 df_insn_rescan (insn);
3850 /* Should not happen as first in the BB is always either NOTE or
3852 gcc_assert (BB_HEAD (bb) != insn
3853 /* Avoid clobbering of structure when creating new BB. */
3855 || NOTE_INSN_BASIC_BLOCK_P (insn));
3858 PREV_INSN (before) = insn;
3859 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3860 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3864 /* Replace insn with an deleted instruction note. */
3867 set_insn_deleted (rtx insn)
3869 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3870 PUT_CODE (insn, NOTE);
3871 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3875 /* Remove an insn from its doubly-linked list. This function knows how
3876 to handle sequences. */
3878 remove_insn (rtx insn)
3880 rtx next = NEXT_INSN (insn);
3881 rtx prev = PREV_INSN (insn);
3884 /* Later in the code, the block will be marked dirty. */
3885 df_insn_delete (NULL, INSN_UID (insn));
3889 NEXT_INSN (prev) = next;
3890 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3892 rtx sequence = PATTERN (prev);
3893 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3896 else if (get_insns () == insn)
3899 PREV_INSN (next) = NULL;
3900 set_first_insn (next);
3904 struct sequence_stack *stack = seq_stack;
3905 /* Scan all pending sequences too. */
3906 for (; stack; stack = stack->next)
3907 if (insn == stack->first)
3909 stack->first = next;
3918 PREV_INSN (next) = prev;
3919 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3920 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3922 else if (get_last_insn () == insn)
3923 set_last_insn (prev);
3926 struct sequence_stack *stack = seq_stack;
3927 /* Scan all pending sequences too. */
3928 for (; stack; stack = stack->next)
3929 if (insn == stack->last)
3937 if (!BARRIER_P (insn)
3938 && (bb = BLOCK_FOR_INSN (insn)))
3940 if (NONDEBUG_INSN_P (insn))
3941 df_set_bb_dirty (bb);
3942 if (BB_HEAD (bb) == insn)
3944 /* Never ever delete the basic block note without deleting whole
3946 gcc_assert (!NOTE_P (insn));
3947 BB_HEAD (bb) = next;
3949 if (BB_END (bb) == insn)
3954 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3957 add_function_usage_to (rtx call_insn, rtx call_fusage)
3959 gcc_assert (call_insn && CALL_P (call_insn));
3961 /* Put the register usage information on the CALL. If there is already
3962 some usage information, put ours at the end. */
3963 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3967 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3968 link = XEXP (link, 1))
3971 XEXP (link, 1) = call_fusage;
3974 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3977 /* Delete all insns made since FROM.
3978 FROM becomes the new last instruction. */
3981 delete_insns_since (rtx from)
3986 NEXT_INSN (from) = 0;
3987 set_last_insn (from);
3990 /* This function is deprecated, please use sequences instead.
3992 Move a consecutive bunch of insns to a different place in the chain.
3993 The insns to be moved are those between FROM and TO.
3994 They are moved to a new position after the insn AFTER.
3995 AFTER must not be FROM or TO or any insn in between.
3997 This function does not know about SEQUENCEs and hence should not be
3998 called after delay-slot filling has been done. */
4001 reorder_insns_nobb (rtx from, rtx to, rtx after)
4003 #ifdef ENABLE_CHECKING
4005 for (x = from; x != to; x = NEXT_INSN (x))
4006 gcc_assert (after != x);
4007 gcc_assert (after != to);
4010 /* Splice this bunch out of where it is now. */
4011 if (PREV_INSN (from))
4012 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4014 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4015 if (get_last_insn () == to)
4016 set_last_insn (PREV_INSN (from));
4017 if (get_insns () == from)
4018 set_first_insn (NEXT_INSN (to));
4020 /* Make the new neighbors point to it and it to them. */
4021 if (NEXT_INSN (after))
4022 PREV_INSN (NEXT_INSN (after)) = to;
4024 NEXT_INSN (to) = NEXT_INSN (after);
4025 PREV_INSN (from) = after;
4026 NEXT_INSN (after) = from;
4027 if (after == get_last_insn())
4031 /* Same as function above, but take care to update BB boundaries. */
4033 reorder_insns (rtx from, rtx to, rtx after)
4035 rtx prev = PREV_INSN (from);
4036 basic_block bb, bb2;
4038 reorder_insns_nobb (from, to, after);
4040 if (!BARRIER_P (after)
4041 && (bb = BLOCK_FOR_INSN (after)))
4044 df_set_bb_dirty (bb);
4046 if (!BARRIER_P (from)
4047 && (bb2 = BLOCK_FOR_INSN (from)))
4049 if (BB_END (bb2) == to)
4050 BB_END (bb2) = prev;
4051 df_set_bb_dirty (bb2);
4054 if (BB_END (bb) == after)
4057 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4059 df_insn_change_bb (x, bb);
4064 /* Emit insn(s) of given code and pattern
4065 at a specified place within the doubly-linked list.
4067 All of the emit_foo global entry points accept an object
4068 X which is either an insn list or a PATTERN of a single
4071 There are thus a few canonical ways to generate code and
4072 emit it at a specific place in the instruction stream. For
4073 example, consider the instruction named SPOT and the fact that
4074 we would like to emit some instructions before SPOT. We might
4078 ... emit the new instructions ...
4079 insns_head = get_insns ();
4082 emit_insn_before (insns_head, SPOT);
4084 It used to be common to generate SEQUENCE rtl instead, but that
4085 is a relic of the past which no longer occurs. The reason is that
4086 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4087 generated would almost certainly die right after it was created. */
4090 emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
4091 rtx (*make_raw) (rtx))
4095 gcc_assert (before);
4100 switch (GET_CODE (x))
4112 rtx next = NEXT_INSN (insn);
4113 add_insn_before (insn, before, bb);
4119 #ifdef ENABLE_RTL_CHECKING
4126 last = (*make_raw) (x);
4127 add_insn_before (last, before, bb);
4134 /* Make X be output before the instruction BEFORE. */
4137 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4139 return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4142 /* Make an instruction with body X and code JUMP_INSN
4143 and output it before the instruction BEFORE. */
4146 emit_jump_insn_before_noloc (rtx x, rtx before)
4148 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4149 make_jump_insn_raw);
4152 /* Make an instruction with body X and code CALL_INSN
4153 and output it before the instruction BEFORE. */
4156 emit_call_insn_before_noloc (rtx x, rtx before)
4158 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4159 make_call_insn_raw);
4162 /* Make an instruction with body X and code DEBUG_INSN
4163 and output it before the instruction BEFORE. */
4166 emit_debug_insn_before_noloc (rtx x, rtx before)
4168 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4169 make_debug_insn_raw);
4172 /* Make an insn of code BARRIER
4173 and output it before the insn BEFORE. */
4176 emit_barrier_before (rtx before)
4178 rtx insn = rtx_alloc (BARRIER);
4180 INSN_UID (insn) = cur_insn_uid++;
4182 add_insn_before (insn, before, NULL);
4186 /* Emit the label LABEL before the insn BEFORE. */
4189 emit_label_before (rtx label, rtx before)
4191 /* This can be called twice for the same label as a result of the
4192 confusion that follows a syntax error! So make it harmless. */
4193 if (INSN_UID (label) == 0)
4195 INSN_UID (label) = cur_insn_uid++;
4196 add_insn_before (label, before, NULL);
4202 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4205 emit_note_before (enum insn_note subtype, rtx before)
4207 rtx note = rtx_alloc (NOTE);
4208 INSN_UID (note) = cur_insn_uid++;
4209 NOTE_KIND (note) = subtype;
4210 BLOCK_FOR_INSN (note) = NULL;
4211 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4213 add_insn_before (note, before, NULL);
4217 /* Helper for emit_insn_after, handles lists of instructions
4221 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4225 if (!bb && !BARRIER_P (after))
4226 bb = BLOCK_FOR_INSN (after);
4230 df_set_bb_dirty (bb);
4231 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4232 if (!BARRIER_P (last))
4234 set_block_for_insn (last, bb);
4235 df_insn_rescan (last);
4237 if (!BARRIER_P (last))
4239 set_block_for_insn (last, bb);
4240 df_insn_rescan (last);
4242 if (BB_END (bb) == after)
4246 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4249 after_after = NEXT_INSN (after);
4251 NEXT_INSN (after) = first;
4252 PREV_INSN (first) = after;
4253 NEXT_INSN (last) = after_after;
4255 PREV_INSN (after_after) = last;
4257 if (after == get_last_insn())
4258 set_last_insn (last);
4264 emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
4265 rtx (*make_raw)(rtx))
4274 switch (GET_CODE (x))
4283 last = emit_insn_after_1 (x, after, bb);
4286 #ifdef ENABLE_RTL_CHECKING
4293 last = (*make_raw) (x);
4294 add_insn_after (last, after, bb);
4301 /* Make X be output after the insn AFTER and set the BB of insn. If
4302 BB is NULL, an attempt is made to infer the BB from AFTER. */
4305 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4307 return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4311 /* Make an insn of code JUMP_INSN with body X
4312 and output it after the insn AFTER. */
4315 emit_jump_insn_after_noloc (rtx x, rtx after)
4317 return emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw);
4320 /* Make an instruction with body X and code CALL_INSN
4321 and output it after the instruction AFTER. */
4324 emit_call_insn_after_noloc (rtx x, rtx after)
4326 return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4329 /* Make an instruction with body X and code CALL_INSN
4330 and output it after the instruction AFTER. */
4333 emit_debug_insn_after_noloc (rtx x, rtx after)
4335 return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4338 /* Make an insn of code BARRIER
4339 and output it after the insn AFTER. */
4342 emit_barrier_after (rtx after)
4344 rtx insn = rtx_alloc (BARRIER);
4346 INSN_UID (insn) = cur_insn_uid++;
4348 add_insn_after (insn, after, NULL);
4352 /* Emit the label LABEL after the insn AFTER. */
4355 emit_label_after (rtx label, rtx after)
4357 /* This can be called twice for the same label
4358 as a result of the confusion that follows a syntax error!
4359 So make it harmless. */
4360 if (INSN_UID (label) == 0)
4362 INSN_UID (label) = cur_insn_uid++;
4363 add_insn_after (label, after, NULL);
4369 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4372 emit_note_after (enum insn_note subtype, rtx after)
4374 rtx note = rtx_alloc (NOTE);
4375 INSN_UID (note) = cur_insn_uid++;
4376 NOTE_KIND (note) = subtype;
4377 BLOCK_FOR_INSN (note) = NULL;
4378 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4379 add_insn_after (note, after, NULL);
4383 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4384 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4387 emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
4388 rtx (*make_raw) (rtx))
4390 rtx last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4392 if (pattern == NULL_RTX || !loc)
4395 after = NEXT_INSN (after);
4398 if (active_insn_p (after) && !INSN_LOCATOR (after))
4399 INSN_LOCATOR (after) = loc;
4402 after = NEXT_INSN (after);
4407 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4408 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4412 emit_pattern_after (rtx pattern, rtx after, bool skip_debug_insns,
4413 rtx (*make_raw) (rtx))
4417 if (skip_debug_insns)
4418 while (DEBUG_INSN_P (prev))
4419 prev = PREV_INSN (prev);
4422 return emit_pattern_after_setloc (pattern, after, INSN_LOCATOR (prev),
4425 return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4428 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4430 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4432 return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
4435 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4437 emit_insn_after (rtx pattern, rtx after)
4439 return emit_pattern_after (pattern, after, true, make_insn_raw);
4442 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4444 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4446 return emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw);
4449 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4451 emit_jump_insn_after (rtx pattern, rtx after)
4453 return emit_pattern_after (pattern, after, true, make_jump_insn_raw);
4456 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4458 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4460 return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
4463 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4465 emit_call_insn_after (rtx pattern, rtx after)
4467 return emit_pattern_after (pattern, after, true, make_call_insn_raw);
4470 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4472 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4474 return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
4477 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4479 emit_debug_insn_after (rtx pattern, rtx after)
4481 return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
4484 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4485 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4486 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4490 emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
4491 rtx (*make_raw) (rtx))
4493 rtx first = PREV_INSN (before);
4494 rtx last = emit_pattern_before_noloc (pattern, before,
4495 insnp ? before : NULL_RTX,
4498 if (pattern == NULL_RTX || !loc)
4502 first = get_insns ();
4504 first = NEXT_INSN (first);
4507 if (active_insn_p (first) && !INSN_LOCATOR (first))
4508 INSN_LOCATOR (first) = loc;
4511 first = NEXT_INSN (first);
4516 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4517 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4518 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4519 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4522 emit_pattern_before (rtx pattern, rtx before, bool skip_debug_insns,
4523 bool insnp, rtx (*make_raw) (rtx))
4527 if (skip_debug_insns)
4528 while (DEBUG_INSN_P (next))
4529 next = PREV_INSN (next);
4532 return emit_pattern_before_setloc (pattern, before, INSN_LOCATOR (next),
4535 return emit_pattern_before_noloc (pattern, before,
4536 insnp ? before : NULL_RTX,
4540 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4542 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4544 return emit_pattern_before_setloc (pattern, before, loc, true,
4548 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4550 emit_insn_before (rtx pattern, rtx before)
4552 return emit_pattern_before (pattern, before, true, true, make_insn_raw);
4555 /* like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4557 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4559 return emit_pattern_before_setloc (pattern, before, loc, false,
4560 make_jump_insn_raw);
4563 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4565 emit_jump_insn_before (rtx pattern, rtx before)
4567 return emit_pattern_before (pattern, before, true, false,
4568 make_jump_insn_raw);
4571 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4573 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4575 return emit_pattern_before_setloc (pattern, before, loc, false,
4576 make_call_insn_raw);
4579 /* Like emit_call_insn_before_noloc,
4580 but set insn_locator according to BEFORE. */
4582 emit_call_insn_before (rtx pattern, rtx before)
4584 return emit_pattern_before (pattern, before, true, false,
4585 make_call_insn_raw);
4588 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4590 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4592 return emit_pattern_before_setloc (pattern, before, loc, false,
4593 make_debug_insn_raw);
4596 /* Like emit_debug_insn_before_noloc,
4597 but set insn_locator according to BEFORE. */
4599 emit_debug_insn_before (rtx pattern, rtx before)
4601 return emit_pattern_before (pattern, before, false, false,
4602 make_debug_insn_raw);
4605 /* Take X and emit it at the end of the doubly-linked
4608 Returns the last insn emitted. */
4613 rtx last = get_last_insn();
4619 switch (GET_CODE (x))
4631 rtx next = NEXT_INSN (insn);
4638 #ifdef ENABLE_RTL_CHECKING
4645 last = make_insn_raw (x);
4653 /* Make an insn of code DEBUG_INSN with pattern X
4654 and add it to the end of the doubly-linked list. */
4657 emit_debug_insn (rtx x)
4659 rtx last = get_last_insn();
4665 switch (GET_CODE (x))
4677 rtx next = NEXT_INSN (insn);
4684 #ifdef ENABLE_RTL_CHECKING
4691 last = make_debug_insn_raw (x);
4699 /* Make an insn of code JUMP_INSN with pattern X
4700 and add it to the end of the doubly-linked list. */
4703 emit_jump_insn (rtx x)
4705 rtx last = NULL_RTX, insn;
4707 switch (GET_CODE (x))
4719 rtx next = NEXT_INSN (insn);
4726 #ifdef ENABLE_RTL_CHECKING
4733 last = make_jump_insn_raw (x);
4741 /* Make an insn of code CALL_INSN with pattern X
4742 and add it to the end of the doubly-linked list. */
4745 emit_call_insn (rtx x)
4749 switch (GET_CODE (x))
4758 insn = emit_insn (x);
4761 #ifdef ENABLE_RTL_CHECKING
4768 insn = make_call_insn_raw (x);
4776 /* Add the label LABEL to the end of the doubly-linked list. */
4779 emit_label (rtx label)
4781 /* This can be called twice for the same label
4782 as a result of the confusion that follows a syntax error!
4783 So make it harmless. */
4784 if (INSN_UID (label) == 0)
4786 INSN_UID (label) = cur_insn_uid++;
4792 /* Make an insn of code BARRIER
4793 and add it to the end of the doubly-linked list. */
4798 rtx barrier = rtx_alloc (BARRIER);
4799 INSN_UID (barrier) = cur_insn_uid++;
4804 /* Emit a copy of note ORIG. */
4807 emit_note_copy (rtx orig)
4811 note = rtx_alloc (NOTE);
4813 INSN_UID (note) = cur_insn_uid++;
4814 NOTE_DATA (note) = NOTE_DATA (orig);
4815 NOTE_KIND (note) = NOTE_KIND (orig);
4816 BLOCK_FOR_INSN (note) = NULL;
4822 /* Make an insn of code NOTE or type NOTE_NO
4823 and add it to the end of the doubly-linked list. */
4826 emit_note (enum insn_note kind)
4830 note = rtx_alloc (NOTE);
4831 INSN_UID (note) = cur_insn_uid++;
4832 NOTE_KIND (note) = kind;
4833 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4834 BLOCK_FOR_INSN (note) = NULL;
4839 /* Emit a clobber of lvalue X. */
4842 emit_clobber (rtx x)
4844 /* CONCATs should not appear in the insn stream. */
4845 if (GET_CODE (x) == CONCAT)
4847 emit_clobber (XEXP (x, 0));
4848 return emit_clobber (XEXP (x, 1));
4850 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
4853 /* Return a sequence of insns to clobber lvalue X. */
4867 /* Emit a use of rvalue X. */
4872 /* CONCATs should not appear in the insn stream. */
4873 if (GET_CODE (x) == CONCAT)
4875 emit_use (XEXP (x, 0));
4876 return emit_use (XEXP (x, 1));
4878 return emit_insn (gen_rtx_USE (VOIDmode, x));
4881 /* Return a sequence of insns to use rvalue X. */
4895 /* Cause next statement to emit a line note even if the line number
4899 force_next_line_note (void)
4904 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4905 note of this type already exists, remove it first. */
4908 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4910 rtx note = find_reg_note (insn, kind, NULL_RTX);
4916 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4917 has multiple sets (some callers assume single_set
4918 means the insn only has one set, when in fact it
4919 means the insn only has one * useful * set). */
4920 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4926 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4927 It serves no useful purpose and breaks eliminate_regs. */
4928 if (GET_CODE (datum) == ASM_OPERANDS)
4933 XEXP (note, 0) = datum;
4934 df_notes_rescan (insn);
4942 XEXP (note, 0) = datum;
4948 add_reg_note (insn, kind, datum);
4954 df_notes_rescan (insn);
4960 return REG_NOTES (insn);
4963 /* Return an indication of which type of insn should have X as a body.
4964 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
4966 static enum rtx_code
4967 classify_insn (rtx x)
4971 if (GET_CODE (x) == CALL)
4973 if (GET_CODE (x) == RETURN)
4975 if (GET_CODE (x) == SET)
4977 if (SET_DEST (x) == pc_rtx)
4979 else if (GET_CODE (SET_SRC (x)) == CALL)
4984 if (GET_CODE (x) == PARALLEL)
4987 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
4988 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
4990 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4991 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
4993 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
4994 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5000 /* Emit the rtl pattern X as an appropriate kind of insn.
5001 If X is a label, it is simply added into the insn chain. */
5006 enum rtx_code code = classify_insn (x);
5011 return emit_label (x);
5013 return emit_insn (x);
5016 rtx insn = emit_jump_insn (x);
5017 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5018 return emit_barrier ();
5022 return emit_call_insn (x);
5024 return emit_debug_insn (x);
5030 /* Space for free sequence stack entries. */
5031 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5033 /* Begin emitting insns to a sequence. If this sequence will contain
5034 something that might cause the compiler to pop arguments to function
5035 calls (because those pops have previously been deferred; see
5036 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5037 before calling this function. That will ensure that the deferred
5038 pops are not accidentally emitted in the middle of this sequence. */
5041 start_sequence (void)
5043 struct sequence_stack *tem;
5045 if (free_sequence_stack != NULL)
5047 tem = free_sequence_stack;
5048 free_sequence_stack = tem->next;
5051 tem = ggc_alloc_sequence_stack ();
5053 tem->next = seq_stack;
5054 tem->first = get_insns ();
5055 tem->last = get_last_insn ();
5063 /* Set up the insn chain starting with FIRST as the current sequence,
5064 saving the previously current one. See the documentation for
5065 start_sequence for more information about how to use this function. */
5068 push_to_sequence (rtx first)
5074 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5077 set_first_insn (first);
5078 set_last_insn (last);
5081 /* Like push_to_sequence, but take the last insn as an argument to avoid
5082 looping through the list. */
5085 push_to_sequence2 (rtx first, rtx last)
5089 set_first_insn (first);
5090 set_last_insn (last);
5093 /* Set up the outer-level insn chain
5094 as the current sequence, saving the previously current one. */
5097 push_topmost_sequence (void)
5099 struct sequence_stack *stack, *top = NULL;
5103 for (stack = seq_stack; stack; stack = stack->next)
5106 set_first_insn (top->first);
5107 set_last_insn (top->last);
5110 /* After emitting to the outer-level insn chain, update the outer-level
5111 insn chain, and restore the previous saved state. */
5114 pop_topmost_sequence (void)
5116 struct sequence_stack *stack, *top = NULL;
5118 for (stack = seq_stack; stack; stack = stack->next)
5121 top->first = get_insns ();
5122 top->last = get_last_insn ();
5127 /* After emitting to a sequence, restore previous saved state.
5129 To get the contents of the sequence just made, you must call
5130 `get_insns' *before* calling here.
5132 If the compiler might have deferred popping arguments while
5133 generating this sequence, and this sequence will not be immediately
5134 inserted into the instruction stream, use do_pending_stack_adjust
5135 before calling get_insns. That will ensure that the deferred
5136 pops are inserted into this sequence, and not into some random
5137 location in the instruction stream. See INHIBIT_DEFER_POP for more
5138 information about deferred popping of arguments. */
5143 struct sequence_stack *tem = seq_stack;
5145 set_first_insn (tem->first);
5146 set_last_insn (tem->last);
5147 seq_stack = tem->next;
5149 memset (tem, 0, sizeof (*tem));
5150 tem->next = free_sequence_stack;
5151 free_sequence_stack = tem;
5154 /* Return 1 if currently emitting into a sequence. */
5157 in_sequence_p (void)
5159 return seq_stack != 0;
5162 /* Put the various virtual registers into REGNO_REG_RTX. */
5165 init_virtual_regs (void)
5167 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5168 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5169 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5170 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5171 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5172 regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5173 = virtual_preferred_stack_boundary_rtx;
5177 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5178 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5179 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5180 static int copy_insn_n_scratches;
5182 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5183 copied an ASM_OPERANDS.
5184 In that case, it is the original input-operand vector. */
5185 static rtvec orig_asm_operands_vector;
5187 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5188 copied an ASM_OPERANDS.
5189 In that case, it is the copied input-operand vector. */
5190 static rtvec copy_asm_operands_vector;
5192 /* Likewise for the constraints vector. */
5193 static rtvec orig_asm_constraints_vector;
5194 static rtvec copy_asm_constraints_vector;
5196 /* Recursively create a new copy of an rtx for copy_insn.
5197 This function differs from copy_rtx in that it handles SCRATCHes and
5198 ASM_OPERANDs properly.
5199 Normally, this function is not used directly; use copy_insn as front end.
5200 However, you could first copy an insn pattern with copy_insn and then use
5201 this function afterwards to properly copy any REG_NOTEs containing
5205 copy_insn_1 (rtx orig)
5210 const char *format_ptr;
5215 code = GET_CODE (orig);
5230 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5235 for (i = 0; i < copy_insn_n_scratches; i++)
5236 if (copy_insn_scratch_in[i] == orig)
5237 return copy_insn_scratch_out[i];
5241 if (shared_const_p (orig))
5245 /* A MEM with a constant address is not sharable. The problem is that
5246 the constant address may need to be reloaded. If the mem is shared,
5247 then reloading one copy of this mem will cause all copies to appear
5248 to have been reloaded. */
5254 /* Copy the various flags, fields, and other information. We assume
5255 that all fields need copying, and then clear the fields that should
5256 not be copied. That is the sensible default behavior, and forces
5257 us to explicitly document why we are *not* copying a flag. */
5258 copy = shallow_copy_rtx (orig);
5260 /* We do not copy the USED flag, which is used as a mark bit during
5261 walks over the RTL. */
5262 RTX_FLAG (copy, used) = 0;
5264 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5267 RTX_FLAG (copy, jump) = 0;
5268 RTX_FLAG (copy, call) = 0;
5269 RTX_FLAG (copy, frame_related) = 0;
5272 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5274 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5275 switch (*format_ptr++)
5278 if (XEXP (orig, i) != NULL)
5279 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5284 if (XVEC (orig, i) == orig_asm_constraints_vector)
5285 XVEC (copy, i) = copy_asm_constraints_vector;
5286 else if (XVEC (orig, i) == orig_asm_operands_vector)
5287 XVEC (copy, i) = copy_asm_operands_vector;
5288 else if (XVEC (orig, i) != NULL)
5290 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5291 for (j = 0; j < XVECLEN (copy, i); j++)
5292 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5303 /* These are left unchanged. */
5310 if (code == SCRATCH)
5312 i = copy_insn_n_scratches++;
5313 gcc_assert (i < MAX_RECOG_OPERANDS);
5314 copy_insn_scratch_in[i] = orig;
5315 copy_insn_scratch_out[i] = copy;
5317 else if (code == ASM_OPERANDS)
5319 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5320 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5321 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5322 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5328 /* Create a new copy of an rtx.
5329 This function differs from copy_rtx in that it handles SCRATCHes and
5330 ASM_OPERANDs properly.
5331 INSN doesn't really have to be a full INSN; it could be just the
5334 copy_insn (rtx insn)
5336 copy_insn_n_scratches = 0;
5337 orig_asm_operands_vector = 0;
5338 orig_asm_constraints_vector = 0;
5339 copy_asm_operands_vector = 0;
5340 copy_asm_constraints_vector = 0;
5341 return copy_insn_1 (insn);
5344 /* Initialize data structures and variables in this file
5345 before generating rtl for each function. */
5350 set_first_insn (NULL);
5351 set_last_insn (NULL);
5352 if (MIN_NONDEBUG_INSN_UID)
5353 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5356 cur_debug_insn_uid = 1;
5357 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5358 last_location = UNKNOWN_LOCATION;
5359 first_label_num = label_num;
5362 /* Init the tables that describe all the pseudo regs. */
5364 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5366 crtl->emit.regno_pointer_align
5367 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5369 regno_reg_rtx = ggc_alloc_vec_rtx (crtl->emit.regno_pointer_align_length);
5371 /* Put copies of all the hard registers into regno_reg_rtx. */
5372 memcpy (regno_reg_rtx,
5373 initial_regno_reg_rtx,
5374 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5376 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5377 init_virtual_regs ();
5379 /* Indicate that the virtual registers and stack locations are
5381 REG_POINTER (stack_pointer_rtx) = 1;
5382 REG_POINTER (frame_pointer_rtx) = 1;
5383 REG_POINTER (hard_frame_pointer_rtx) = 1;
5384 REG_POINTER (arg_pointer_rtx) = 1;
5386 REG_POINTER (virtual_incoming_args_rtx) = 1;
5387 REG_POINTER (virtual_stack_vars_rtx) = 1;
5388 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5389 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5390 REG_POINTER (virtual_cfa_rtx) = 1;
5392 #ifdef STACK_BOUNDARY
5393 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5394 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5395 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5396 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5398 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5399 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5400 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5401 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5402 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5405 #ifdef INIT_EXPANDERS
5410 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5413 gen_const_vector (enum machine_mode mode, int constant)
5418 enum machine_mode inner;
5420 units = GET_MODE_NUNITS (mode);
5421 inner = GET_MODE_INNER (mode);
5423 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5425 v = rtvec_alloc (units);
5427 /* We need to call this function after we set the scalar const_tiny_rtx
5429 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5431 for (i = 0; i < units; ++i)
5432 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5434 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5438 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5439 all elements are zero, and the one vector when all elements are one. */
5441 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5443 enum machine_mode inner = GET_MODE_INNER (mode);
5444 int nunits = GET_MODE_NUNITS (mode);
5448 /* Check to see if all of the elements have the same value. */
5449 x = RTVEC_ELT (v, nunits - 1);
5450 for (i = nunits - 2; i >= 0; i--)
5451 if (RTVEC_ELT (v, i) != x)
5454 /* If the values are all the same, check to see if we can use one of the
5455 standard constant vectors. */
5458 if (x == CONST0_RTX (inner))
5459 return CONST0_RTX (mode);
5460 else if (x == CONST1_RTX (inner))
5461 return CONST1_RTX (mode);
5464 return gen_rtx_raw_CONST_VECTOR (mode, v);
5467 /* Initialise global register information required by all functions. */
5470 init_emit_regs (void)
5473 enum machine_mode mode;
5476 /* Reset register attributes */
5477 htab_empty (reg_attrs_htab);
5479 /* We need reg_raw_mode, so initialize the modes now. */
5480 init_reg_modes_target ();
5482 /* Assign register numbers to the globally defined register rtx. */
5483 pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
5484 ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
5485 cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
5486 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5487 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5488 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5489 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5490 virtual_incoming_args_rtx =
5491 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5492 virtual_stack_vars_rtx =
5493 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5494 virtual_stack_dynamic_rtx =
5495 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5496 virtual_outgoing_args_rtx =
5497 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5498 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5499 virtual_preferred_stack_boundary_rtx =
5500 gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
5502 /* Initialize RTL for commonly used hard registers. These are
5503 copied into regno_reg_rtx as we begin to compile each function. */
5504 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5505 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5507 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5508 return_address_pointer_rtx
5509 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5512 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5513 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5515 pic_offset_table_rtx = NULL_RTX;
5517 for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
5519 mode = (enum machine_mode) i;
5520 attrs = ggc_alloc_cleared_mem_attrs ();
5521 attrs->align = BITS_PER_UNIT;
5522 attrs->addrspace = ADDR_SPACE_GENERIC;
5523 if (mode != BLKmode)
5525 attrs->size = GEN_INT (GET_MODE_SIZE (mode));
5526 if (STRICT_ALIGNMENT)
5527 attrs->align = GET_MODE_ALIGNMENT (mode);
5529 mode_mem_attrs[i] = attrs;
5533 /* Create some permanent unique rtl objects shared between all functions. */
5536 init_emit_once (void)
5539 enum machine_mode mode;
5540 enum machine_mode double_mode;
5542 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5544 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5545 const_int_htab_eq, NULL);
5547 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5548 const_double_htab_eq, NULL);
5550 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5551 const_fixed_htab_eq, NULL);
5553 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5554 mem_attrs_htab_eq, NULL);
5555 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5556 reg_attrs_htab_eq, NULL);
5558 /* Compute the word and byte modes. */
5560 byte_mode = VOIDmode;
5561 word_mode = VOIDmode;
5562 double_mode = VOIDmode;
5564 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5566 mode = GET_MODE_WIDER_MODE (mode))
5568 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5569 && byte_mode == VOIDmode)
5572 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5573 && word_mode == VOIDmode)
5577 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5579 mode = GET_MODE_WIDER_MODE (mode))
5581 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5582 && double_mode == VOIDmode)
5586 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5588 #ifdef INIT_EXPANDERS
5589 /* This is to initialize {init|mark|free}_machine_status before the first
5590 call to push_function_context_to. This is needed by the Chill front
5591 end which calls push_function_context_to before the first call to
5592 init_function_start. */
5596 /* Create the unique rtx's for certain rtx codes and operand values. */
5598 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5599 tries to use these variables. */
5600 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5601 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5602 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5604 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5605 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5606 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5608 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5610 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5611 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5612 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5617 dconsthalf = dconst1;
5618 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5620 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5622 const REAL_VALUE_TYPE *const r =
5623 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5625 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5627 mode = GET_MODE_WIDER_MODE (mode))
5628 const_tiny_rtx[i][(int) mode] =
5629 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5631 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5633 mode = GET_MODE_WIDER_MODE (mode))
5634 const_tiny_rtx[i][(int) mode] =
5635 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5637 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5639 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5641 mode = GET_MODE_WIDER_MODE (mode))
5642 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5644 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5646 mode = GET_MODE_WIDER_MODE (mode))
5647 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5650 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5652 mode = GET_MODE_WIDER_MODE (mode))
5654 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5655 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5658 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5660 mode = GET_MODE_WIDER_MODE (mode))
5662 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5663 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5666 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5668 mode = GET_MODE_WIDER_MODE (mode))
5670 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5671 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5674 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5676 mode = GET_MODE_WIDER_MODE (mode))
5678 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5679 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5682 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5684 mode = GET_MODE_WIDER_MODE (mode))
5686 FCONST0(mode).data.high = 0;
5687 FCONST0(mode).data.low = 0;
5688 FCONST0(mode).mode = mode;
5689 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5690 FCONST0 (mode), mode);
5693 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5695 mode = GET_MODE_WIDER_MODE (mode))
5697 FCONST0(mode).data.high = 0;
5698 FCONST0(mode).data.low = 0;
5699 FCONST0(mode).mode = mode;
5700 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5701 FCONST0 (mode), mode);
5704 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5706 mode = GET_MODE_WIDER_MODE (mode))
5708 FCONST0(mode).data.high = 0;
5709 FCONST0(mode).data.low = 0;
5710 FCONST0(mode).mode = mode;
5711 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5712 FCONST0 (mode), mode);
5714 /* We store the value 1. */
5715 FCONST1(mode).data.high = 0;
5716 FCONST1(mode).data.low = 0;
5717 FCONST1(mode).mode = mode;
5718 lshift_double (1, 0, GET_MODE_FBIT (mode),
5719 2 * HOST_BITS_PER_WIDE_INT,
5720 &FCONST1(mode).data.low,
5721 &FCONST1(mode).data.high,
5722 SIGNED_FIXED_POINT_MODE_P (mode));
5723 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5724 FCONST1 (mode), mode);
5727 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5729 mode = GET_MODE_WIDER_MODE (mode))
5731 FCONST0(mode).data.high = 0;
5732 FCONST0(mode).data.low = 0;
5733 FCONST0(mode).mode = mode;
5734 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5735 FCONST0 (mode), mode);
5737 /* We store the value 1. */
5738 FCONST1(mode).data.high = 0;
5739 FCONST1(mode).data.low = 0;
5740 FCONST1(mode).mode = mode;
5741 lshift_double (1, 0, GET_MODE_FBIT (mode),
5742 2 * HOST_BITS_PER_WIDE_INT,
5743 &FCONST1(mode).data.low,
5744 &FCONST1(mode).data.high,
5745 SIGNED_FIXED_POINT_MODE_P (mode));
5746 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5747 FCONST1 (mode), mode);
5750 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5752 mode = GET_MODE_WIDER_MODE (mode))
5754 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5757 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5759 mode = GET_MODE_WIDER_MODE (mode))
5761 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5764 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5766 mode = GET_MODE_WIDER_MODE (mode))
5768 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5769 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5772 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5774 mode = GET_MODE_WIDER_MODE (mode))
5776 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5777 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5780 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5781 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5782 const_tiny_rtx[0][i] = const0_rtx;
5784 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5785 if (STORE_FLAG_VALUE == 1)
5786 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5789 /* Produce exact duplicate of insn INSN after AFTER.
5790 Care updating of libcall regions if present. */
5793 emit_copy_of_insn_after (rtx insn, rtx after)
5797 switch (GET_CODE (insn))
5800 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5804 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5808 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
5812 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5813 if (CALL_INSN_FUNCTION_USAGE (insn))
5814 CALL_INSN_FUNCTION_USAGE (new_rtx)
5815 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5816 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5817 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5818 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5819 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5820 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5827 /* Update LABEL_NUSES. */
5828 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
5830 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
5832 /* If the old insn is frame related, then so is the new one. This is
5833 primarily needed for IA-64 unwind info which marks epilogue insns,
5834 which may be duplicated by the basic block reordering code. */
5835 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
5837 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5838 will make them. REG_LABEL_TARGETs are created there too, but are
5839 supposed to be sticky, so we copy them. */
5840 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5841 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5843 if (GET_CODE (link) == EXPR_LIST)
5844 add_reg_note (new_rtx, REG_NOTE_KIND (link),
5845 copy_insn_1 (XEXP (link, 0)));
5847 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
5850 INSN_CODE (new_rtx) = INSN_CODE (insn);
5854 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5856 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5858 if (hard_reg_clobbers[mode][regno])
5859 return hard_reg_clobbers[mode][regno];
5861 return (hard_reg_clobbers[mode][regno] =
5862 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5865 #include "gt-emit-rtl.h"