1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
49 #include "hard-reg-set.h"
51 #include "insn-config.h"
54 #include "fixed-value.h"
56 #include "basic-block.h"
59 #include "langhooks.h"
60 #include "tree-pass.h"
65 /* Commonly used modes. */
67 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
68 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
69 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
70 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
72 /* Datastructures maintained for currently processed function in RTL form. */
74 struct rtl_data x_rtl;
76 /* Indexed by pseudo register number, gives the rtx for that pseudo.
77 Allocated in parallel with regno_pointer_align.
78 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
79 with length attribute nested in top level structures. */
83 /* This is *not* reset after each function. It gives each CODE_LABEL
84 in the entire compilation a unique label number. */
86 static GTY(()) int label_num = 1;
88 /* Commonly used rtx's, so that we only need space for one copy.
89 These are initialized once for the entire compilation.
90 All of these are unique; no other rtx-object will be equal to any
93 rtx global_rtl[GR_MAX];
95 /* Commonly used RTL for hard registers. These objects are not necessarily
96 unique, so we allocate them separately from global_rtl. They are
97 initialized once per compilation unit, then copied into regno_reg_rtx
98 at the beginning of each function. */
99 static GTY(()) rtx static_regno_reg_rtx[FIRST_PSEUDO_REGISTER];
101 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
102 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
103 record a copy of const[012]_rtx. */
105 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
109 REAL_VALUE_TYPE dconst0;
110 REAL_VALUE_TYPE dconst1;
111 REAL_VALUE_TYPE dconst2;
112 REAL_VALUE_TYPE dconstm1;
113 REAL_VALUE_TYPE dconsthalf;
115 /* Record fixed-point constant 0 and 1. */
116 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
117 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
119 /* All references to the following fixed hard registers go through
120 these unique rtl objects. On machines where the frame-pointer and
121 arg-pointer are the same register, they use the same unique object.
123 After register allocation, other rtl objects which used to be pseudo-regs
124 may be clobbered to refer to the frame-pointer register.
125 But references that were originally to the frame-pointer can be
126 distinguished from the others because they contain frame_pointer_rtx.
128 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
129 tricky: until register elimination has taken place hard_frame_pointer_rtx
130 should be used if it is being set, and frame_pointer_rtx otherwise. After
131 register elimination hard_frame_pointer_rtx should always be used.
132 On machines where the two registers are same (most) then these are the
135 In an inline procedure, the stack and frame pointer rtxs may not be
136 used for anything else. */
137 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
139 /* This is used to implement __builtin_return_address for some machines.
140 See for instance the MIPS port. */
141 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
143 /* We make one copy of (const_int C) where C is in
144 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
145 to save space during the compilation and simplify comparisons of
148 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
150 /* A hash table storing CONST_INTs whose absolute value is greater
151 than MAX_SAVED_CONST_INT. */
153 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
154 htab_t const_int_htab;
156 /* A hash table storing memory attribute structures. */
157 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
158 htab_t mem_attrs_htab;
160 /* A hash table storing register attribute structures. */
161 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
162 htab_t reg_attrs_htab;
164 /* A hash table storing all CONST_DOUBLEs. */
165 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
166 htab_t const_double_htab;
168 /* A hash table storing all CONST_FIXEDs. */
169 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
170 htab_t const_fixed_htab;
172 #define first_insn (crtl->emit.x_first_insn)
173 #define last_insn (crtl->emit.x_last_insn)
174 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
175 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
176 #define last_location (crtl->emit.x_last_location)
177 #define first_label_num (crtl->emit.x_first_label_num)
179 static rtx make_call_insn_raw (rtx);
180 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
181 static void set_used_decls (tree);
182 static void mark_label_nuses (rtx);
183 static hashval_t const_int_htab_hash (const void *);
184 static int const_int_htab_eq (const void *, const void *);
185 static hashval_t const_double_htab_hash (const void *);
186 static int const_double_htab_eq (const void *, const void *);
187 static rtx lookup_const_double (rtx);
188 static hashval_t const_fixed_htab_hash (const void *);
189 static int const_fixed_htab_eq (const void *, const void *);
190 static rtx lookup_const_fixed (rtx);
191 static hashval_t mem_attrs_htab_hash (const void *);
192 static int mem_attrs_htab_eq (const void *, const void *);
193 static mem_attrs *get_mem_attrs (alias_set_type, tree, rtx, rtx, unsigned int,
194 addr_space_t, enum machine_mode);
195 static hashval_t reg_attrs_htab_hash (const void *);
196 static int reg_attrs_htab_eq (const void *, const void *);
197 static reg_attrs *get_reg_attrs (tree, int);
198 static rtx gen_const_vector (enum machine_mode, int);
199 static void copy_rtx_if_shared_1 (rtx *orig);
201 /* Probability of the conditional branch currently proceeded by try_split.
202 Set to -1 otherwise. */
203 int split_branch_probability = -1;
205 /* Returns a hash code for X (which is a really a CONST_INT). */
208 const_int_htab_hash (const void *x)
210 return (hashval_t) INTVAL ((const_rtx) x);
213 /* Returns nonzero if the value represented by X (which is really a
214 CONST_INT) is the same as that given by Y (which is really a
218 const_int_htab_eq (const void *x, const void *y)
220 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
223 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
225 const_double_htab_hash (const void *x)
227 const_rtx const value = (const_rtx) x;
230 if (GET_MODE (value) == VOIDmode)
231 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
234 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
235 /* MODE is used in the comparison, so it should be in the hash. */
236 h ^= GET_MODE (value);
241 /* Returns nonzero if the value represented by X (really a ...)
242 is the same as that represented by Y (really a ...) */
244 const_double_htab_eq (const void *x, const void *y)
246 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
248 if (GET_MODE (a) != GET_MODE (b))
250 if (GET_MODE (a) == VOIDmode)
251 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
252 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
254 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
255 CONST_DOUBLE_REAL_VALUE (b));
258 /* Returns a hash code for X (which is really a CONST_FIXED). */
261 const_fixed_htab_hash (const void *x)
263 const_rtx const value = (const_rtx) x;
266 h = fixed_hash (CONST_FIXED_VALUE (value));
267 /* MODE is used in the comparison, so it should be in the hash. */
268 h ^= GET_MODE (value);
272 /* Returns nonzero if the value represented by X (really a ...)
273 is the same as that represented by Y (really a ...). */
276 const_fixed_htab_eq (const void *x, const void *y)
278 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
280 if (GET_MODE (a) != GET_MODE (b))
282 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
285 /* Returns a hash code for X (which is a really a mem_attrs *). */
288 mem_attrs_htab_hash (const void *x)
290 const mem_attrs *const p = (const mem_attrs *) x;
292 return (p->alias ^ (p->align * 1000)
293 ^ (p->addrspace * 4000)
294 ^ ((p->offset ? INTVAL (p->offset) : 0) * 50000)
295 ^ ((p->size ? INTVAL (p->size) : 0) * 2500000)
296 ^ (size_t) iterative_hash_expr (p->expr, 0));
299 /* Returns nonzero if the value represented by X (which is really a
300 mem_attrs *) is the same as that given by Y (which is also really a
304 mem_attrs_htab_eq (const void *x, const void *y)
306 const mem_attrs *const p = (const mem_attrs *) x;
307 const mem_attrs *const q = (const mem_attrs *) y;
309 return (p->alias == q->alias && p->offset == q->offset
310 && p->size == q->size && p->align == q->align
311 && p->addrspace == q->addrspace
312 && (p->expr == q->expr
313 || (p->expr != NULL_TREE && q->expr != NULL_TREE
314 && operand_equal_p (p->expr, q->expr, 0))));
317 /* Allocate a new mem_attrs structure and insert it into the hash table if
318 one identical to it is not already in the table. We are doing this for
322 get_mem_attrs (alias_set_type alias, tree expr, rtx offset, rtx size,
323 unsigned int align, addr_space_t addrspace, enum machine_mode mode)
328 /* If everything is the default, we can just return zero.
329 This must match what the corresponding MEM_* macros return when the
330 field is not present. */
331 if (alias == 0 && expr == 0 && offset == 0 && addrspace == 0
333 || (mode != BLKmode && GET_MODE_SIZE (mode) == INTVAL (size)))
334 && (STRICT_ALIGNMENT && mode != BLKmode
335 ? align == GET_MODE_ALIGNMENT (mode) : align == BITS_PER_UNIT))
340 attrs.offset = offset;
343 attrs.addrspace = addrspace;
345 slot = htab_find_slot (mem_attrs_htab, &attrs, INSERT);
348 *slot = ggc_alloc (sizeof (mem_attrs));
349 memcpy (*slot, &attrs, sizeof (mem_attrs));
352 return (mem_attrs *) *slot;
355 /* Returns a hash code for X (which is a really a reg_attrs *). */
358 reg_attrs_htab_hash (const void *x)
360 const reg_attrs *const p = (const reg_attrs *) x;
362 return ((p->offset * 1000) ^ (long) p->decl);
365 /* Returns nonzero if the value represented by X (which is really a
366 reg_attrs *) is the same as that given by Y (which is also really a
370 reg_attrs_htab_eq (const void *x, const void *y)
372 const reg_attrs *const p = (const reg_attrs *) x;
373 const reg_attrs *const q = (const reg_attrs *) y;
375 return (p->decl == q->decl && p->offset == q->offset);
377 /* Allocate a new reg_attrs structure and insert it into the hash table if
378 one identical to it is not already in the table. We are doing this for
382 get_reg_attrs (tree decl, int offset)
387 /* If everything is the default, we can just return zero. */
388 if (decl == 0 && offset == 0)
392 attrs.offset = offset;
394 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
397 *slot = ggc_alloc (sizeof (reg_attrs));
398 memcpy (*slot, &attrs, sizeof (reg_attrs));
401 return (reg_attrs *) *slot;
406 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
412 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
413 MEM_VOLATILE_P (x) = true;
419 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
420 don't attempt to share with the various global pieces of rtl (such as
421 frame_pointer_rtx). */
424 gen_raw_REG (enum machine_mode mode, int regno)
426 rtx x = gen_rtx_raw_REG (mode, regno);
427 ORIGINAL_REGNO (x) = regno;
431 /* There are some RTL codes that require special attention; the generation
432 functions do the raw handling. If you add to this list, modify
433 special_rtx in gengenrtl.c as well. */
436 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
440 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
441 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
443 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
444 if (const_true_rtx && arg == STORE_FLAG_VALUE)
445 return const_true_rtx;
448 /* Look up the CONST_INT in the hash table. */
449 slot = htab_find_slot_with_hash (const_int_htab, &arg,
450 (hashval_t) arg, INSERT);
452 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
458 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
460 return GEN_INT (trunc_int_for_mode (c, mode));
463 /* CONST_DOUBLEs might be created from pairs of integers, or from
464 REAL_VALUE_TYPEs. Also, their length is known only at run time,
465 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
467 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
468 hash table. If so, return its counterpart; otherwise add it
469 to the hash table and return it. */
471 lookup_const_double (rtx real)
473 void **slot = htab_find_slot (const_double_htab, real, INSERT);
480 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
481 VALUE in mode MODE. */
483 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
485 rtx real = rtx_alloc (CONST_DOUBLE);
486 PUT_MODE (real, mode);
490 return lookup_const_double (real);
493 /* Determine whether FIXED, a CONST_FIXED, already exists in the
494 hash table. If so, return its counterpart; otherwise add it
495 to the hash table and return it. */
498 lookup_const_fixed (rtx fixed)
500 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
507 /* Return a CONST_FIXED rtx for a fixed-point value specified by
508 VALUE in mode MODE. */
511 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
513 rtx fixed = rtx_alloc (CONST_FIXED);
514 PUT_MODE (fixed, mode);
518 return lookup_const_fixed (fixed);
521 /* Constructs double_int from rtx CST. */
524 rtx_to_double_int (const_rtx cst)
528 if (CONST_INT_P (cst))
529 r = shwi_to_double_int (INTVAL (cst));
530 else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
532 r.low = CONST_DOUBLE_LOW (cst);
533 r.high = CONST_DOUBLE_HIGH (cst);
542 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
546 immed_double_int_const (double_int i, enum machine_mode mode)
548 return immed_double_const (i.low, i.high, mode);
551 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
552 of ints: I0 is the low-order word and I1 is the high-order word.
553 Do not use this routine for non-integer modes; convert to
554 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
557 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
562 /* There are the following cases (note that there are no modes with
563 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
565 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
567 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
568 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
569 from copies of the sign bit, and sign of i0 and i1 are the same), then
570 we return a CONST_INT for i0.
571 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
572 if (mode != VOIDmode)
574 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
575 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
576 /* We can get a 0 for an error mark. */
577 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
578 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
580 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
581 return gen_int_mode (i0, mode);
583 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
586 /* If this integer fits in one word, return a CONST_INT. */
587 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
590 /* We use VOIDmode for integers. */
591 value = rtx_alloc (CONST_DOUBLE);
592 PUT_MODE (value, VOIDmode);
594 CONST_DOUBLE_LOW (value) = i0;
595 CONST_DOUBLE_HIGH (value) = i1;
597 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
598 XWINT (value, i) = 0;
600 return lookup_const_double (value);
604 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
606 /* In case the MD file explicitly references the frame pointer, have
607 all such references point to the same frame pointer. This is
608 used during frame pointer elimination to distinguish the explicit
609 references to these registers from pseudos that happened to be
612 If we have eliminated the frame pointer or arg pointer, we will
613 be using it as a normal register, for example as a spill
614 register. In such cases, we might be accessing it in a mode that
615 is not Pmode and therefore cannot use the pre-allocated rtx.
617 Also don't do this when we are making new REGs in reload, since
618 we don't want to get confused with the real pointers. */
620 if (mode == Pmode && !reload_in_progress)
622 if (regno == FRAME_POINTER_REGNUM
623 && (!reload_completed || frame_pointer_needed))
624 return frame_pointer_rtx;
625 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
626 if (regno == HARD_FRAME_POINTER_REGNUM
627 && (!reload_completed || frame_pointer_needed))
628 return hard_frame_pointer_rtx;
630 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
631 if (regno == ARG_POINTER_REGNUM)
632 return arg_pointer_rtx;
634 #ifdef RETURN_ADDRESS_POINTER_REGNUM
635 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
636 return return_address_pointer_rtx;
638 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
639 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
640 return pic_offset_table_rtx;
641 if (regno == STACK_POINTER_REGNUM)
642 return stack_pointer_rtx;
646 /* If the per-function register table has been set up, try to re-use
647 an existing entry in that table to avoid useless generation of RTL.
649 This code is disabled for now until we can fix the various backends
650 which depend on having non-shared hard registers in some cases. Long
651 term we want to re-enable this code as it can significantly cut down
652 on the amount of useless RTL that gets generated.
654 We'll also need to fix some code that runs after reload that wants to
655 set ORIGINAL_REGNO. */
660 && regno < FIRST_PSEUDO_REGISTER
661 && reg_raw_mode[regno] == mode)
662 return regno_reg_rtx[regno];
665 return gen_raw_REG (mode, regno);
669 gen_rtx_MEM (enum machine_mode mode, rtx addr)
671 rtx rt = gen_rtx_raw_MEM (mode, addr);
673 /* This field is not cleared by the mere allocation of the rtx, so
680 /* Generate a memory referring to non-trapping constant memory. */
683 gen_const_mem (enum machine_mode mode, rtx addr)
685 rtx mem = gen_rtx_MEM (mode, addr);
686 MEM_READONLY_P (mem) = 1;
687 MEM_NOTRAP_P (mem) = 1;
691 /* Generate a MEM referring to fixed portions of the frame, e.g., register
695 gen_frame_mem (enum machine_mode mode, rtx addr)
697 rtx mem = gen_rtx_MEM (mode, addr);
698 MEM_NOTRAP_P (mem) = 1;
699 set_mem_alias_set (mem, get_frame_alias_set ());
703 /* Generate a MEM referring to a temporary use of the stack, not part
704 of the fixed stack frame. For example, something which is pushed
705 by a target splitter. */
707 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
709 rtx mem = gen_rtx_MEM (mode, addr);
710 MEM_NOTRAP_P (mem) = 1;
711 if (!cfun->calls_alloca)
712 set_mem_alias_set (mem, get_frame_alias_set ());
716 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
717 this construct would be valid, and false otherwise. */
720 validate_subreg (enum machine_mode omode, enum machine_mode imode,
721 const_rtx reg, unsigned int offset)
723 unsigned int isize = GET_MODE_SIZE (imode);
724 unsigned int osize = GET_MODE_SIZE (omode);
726 /* All subregs must be aligned. */
727 if (offset % osize != 0)
730 /* The subreg offset cannot be outside the inner object. */
734 /* ??? This should not be here. Temporarily continue to allow word_mode
735 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
736 Generally, backends are doing something sketchy but it'll take time to
738 if (omode == word_mode)
740 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
741 is the culprit here, and not the backends. */
742 else if (osize >= UNITS_PER_WORD && isize >= osize)
744 /* Allow component subregs of complex and vector. Though given the below
745 extraction rules, it's not always clear what that means. */
746 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
747 && GET_MODE_INNER (imode) == omode)
749 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
750 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
751 represent this. It's questionable if this ought to be represented at
752 all -- why can't this all be hidden in post-reload splitters that make
753 arbitrarily mode changes to the registers themselves. */
754 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
756 /* Subregs involving floating point modes are not allowed to
757 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
758 (subreg:SI (reg:DF) 0) isn't. */
759 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
765 /* Paradoxical subregs must have offset zero. */
769 /* This is a normal subreg. Verify that the offset is representable. */
771 /* For hard registers, we already have most of these rules collected in
772 subreg_offset_representable_p. */
773 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
775 unsigned int regno = REGNO (reg);
777 #ifdef CANNOT_CHANGE_MODE_CLASS
778 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
779 && GET_MODE_INNER (imode) == omode)
781 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
785 return subreg_offset_representable_p (regno, imode, offset, omode);
788 /* For pseudo registers, we want most of the same checks. Namely:
789 If the register no larger than a word, the subreg must be lowpart.
790 If the register is larger than a word, the subreg must be the lowpart
791 of a subword. A subreg does *not* perform arbitrary bit extraction.
792 Given that we've already checked mode/offset alignment, we only have
793 to check subword subregs here. */
794 if (osize < UNITS_PER_WORD)
796 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
797 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
798 if (offset % UNITS_PER_WORD != low_off)
805 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
807 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
808 return gen_rtx_raw_SUBREG (mode, reg, offset);
811 /* Generate a SUBREG representing the least-significant part of REG if MODE
812 is smaller than mode of REG, otherwise paradoxical SUBREG. */
815 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
817 enum machine_mode inmode;
819 inmode = GET_MODE (reg);
820 if (inmode == VOIDmode)
822 return gen_rtx_SUBREG (mode, reg,
823 subreg_lowpart_offset (mode, inmode));
827 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
830 gen_rtvec (int n, ...)
838 /* Don't allocate an empty rtvec... */
842 rt_val = rtvec_alloc (n);
844 for (i = 0; i < n; i++)
845 rt_val->elem[i] = va_arg (p, rtx);
852 gen_rtvec_v (int n, rtx *argp)
857 /* Don't allocate an empty rtvec... */
861 rt_val = rtvec_alloc (n);
863 for (i = 0; i < n; i++)
864 rt_val->elem[i] = *argp++;
869 /* Return the number of bytes between the start of an OUTER_MODE
870 in-memory value and the start of an INNER_MODE in-memory value,
871 given that the former is a lowpart of the latter. It may be a
872 paradoxical lowpart, in which case the offset will be negative
873 on big-endian targets. */
876 byte_lowpart_offset (enum machine_mode outer_mode,
877 enum machine_mode inner_mode)
879 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
880 return subreg_lowpart_offset (outer_mode, inner_mode);
882 return -subreg_lowpart_offset (inner_mode, outer_mode);
885 /* Generate a REG rtx for a new pseudo register of mode MODE.
886 This pseudo is assigned the next sequential register number. */
889 gen_reg_rtx (enum machine_mode mode)
892 unsigned int align = GET_MODE_ALIGNMENT (mode);
894 gcc_assert (can_create_pseudo_p ());
896 /* If a virtual register with bigger mode alignment is generated,
897 increase stack alignment estimation because it might be spilled
899 if (SUPPORTS_STACK_ALIGNMENT
900 && crtl->stack_alignment_estimated < align
901 && !crtl->stack_realign_processed)
903 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
904 if (crtl->stack_alignment_estimated < min_align)
905 crtl->stack_alignment_estimated = min_align;
908 if (generating_concat_p
909 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
910 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
912 /* For complex modes, don't make a single pseudo.
913 Instead, make a CONCAT of two pseudos.
914 This allows noncontiguous allocation of the real and imaginary parts,
915 which makes much better code. Besides, allocating DCmode
916 pseudos overstrains reload on some machines like the 386. */
917 rtx realpart, imagpart;
918 enum machine_mode partmode = GET_MODE_INNER (mode);
920 realpart = gen_reg_rtx (partmode);
921 imagpart = gen_reg_rtx (partmode);
922 return gen_rtx_CONCAT (mode, realpart, imagpart);
925 /* Make sure regno_pointer_align, and regno_reg_rtx are large
926 enough to have an element for this pseudo reg number. */
928 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
930 int old_size = crtl->emit.regno_pointer_align_length;
934 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
935 memset (tmp + old_size, 0, old_size);
936 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
938 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
939 memset (new1 + old_size, 0, old_size * sizeof (rtx));
940 regno_reg_rtx = new1;
942 crtl->emit.regno_pointer_align_length = old_size * 2;
945 val = gen_raw_REG (mode, reg_rtx_no);
946 regno_reg_rtx[reg_rtx_no++] = val;
950 /* Update NEW with the same attributes as REG, but with OFFSET added
951 to the REG_OFFSET. */
954 update_reg_offset (rtx new_rtx, rtx reg, int offset)
956 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
957 REG_OFFSET (reg) + offset);
960 /* Generate a register with same attributes as REG, but with OFFSET
961 added to the REG_OFFSET. */
964 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
967 rtx new_rtx = gen_rtx_REG (mode, regno);
969 update_reg_offset (new_rtx, reg, offset);
973 /* Generate a new pseudo-register with the same attributes as REG, but
974 with OFFSET added to the REG_OFFSET. */
977 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
979 rtx new_rtx = gen_reg_rtx (mode);
981 update_reg_offset (new_rtx, reg, offset);
985 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
986 new register is a (possibly paradoxical) lowpart of the old one. */
989 adjust_reg_mode (rtx reg, enum machine_mode mode)
991 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
992 PUT_MODE (reg, mode);
995 /* Copy REG's attributes from X, if X has any attributes. If REG and X
996 have different modes, REG is a (possibly paradoxical) lowpart of X. */
999 set_reg_attrs_from_value (rtx reg, rtx x)
1003 /* Hard registers can be reused for multiple purposes within the same
1004 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
1005 on them is wrong. */
1006 if (HARD_REGISTER_P (reg))
1009 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
1012 if (MEM_OFFSET (x) && CONST_INT_P (MEM_OFFSET (x)))
1014 = get_reg_attrs (MEM_EXPR (x), INTVAL (MEM_OFFSET (x)) + offset);
1015 if (MEM_POINTER (x))
1016 mark_reg_pointer (reg, 0);
1021 update_reg_offset (reg, x, offset);
1022 if (REG_POINTER (x))
1023 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
1027 /* Generate a REG rtx for a new pseudo register, copying the mode
1028 and attributes from X. */
1031 gen_reg_rtx_and_attrs (rtx x)
1033 rtx reg = gen_reg_rtx (GET_MODE (x));
1034 set_reg_attrs_from_value (reg, x);
1038 /* Set the register attributes for registers contained in PARM_RTX.
1039 Use needed values from memory attributes of MEM. */
1042 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1044 if (REG_P (parm_rtx))
1045 set_reg_attrs_from_value (parm_rtx, mem);
1046 else if (GET_CODE (parm_rtx) == PARALLEL)
1048 /* Check for a NULL entry in the first slot, used to indicate that the
1049 parameter goes both on the stack and in registers. */
1050 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1051 for (; i < XVECLEN (parm_rtx, 0); i++)
1053 rtx x = XVECEXP (parm_rtx, 0, i);
1054 if (REG_P (XEXP (x, 0)))
1055 REG_ATTRS (XEXP (x, 0))
1056 = get_reg_attrs (MEM_EXPR (mem),
1057 INTVAL (XEXP (x, 1)));
1062 /* Set the REG_ATTRS for registers in value X, given that X represents
1066 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1068 if (GET_CODE (x) == SUBREG)
1070 gcc_assert (subreg_lowpart_p (x));
1075 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1077 if (GET_CODE (x) == CONCAT)
1079 if (REG_P (XEXP (x, 0)))
1080 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1081 if (REG_P (XEXP (x, 1)))
1082 REG_ATTRS (XEXP (x, 1))
1083 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1085 if (GET_CODE (x) == PARALLEL)
1089 /* Check for a NULL entry, used to indicate that the parameter goes
1090 both on the stack and in registers. */
1091 if (XEXP (XVECEXP (x, 0, 0), 0))
1096 for (i = start; i < XVECLEN (x, 0); i++)
1098 rtx y = XVECEXP (x, 0, i);
1099 if (REG_P (XEXP (y, 0)))
1100 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1105 /* Assign the RTX X to declaration T. */
1108 set_decl_rtl (tree t, rtx x)
1110 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1112 set_reg_attrs_for_decl_rtl (t, x);
1115 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1116 if the ABI requires the parameter to be passed by reference. */
1119 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1121 DECL_INCOMING_RTL (t) = x;
1122 if (x && !by_reference_p)
1123 set_reg_attrs_for_decl_rtl (t, x);
1126 /* Identify REG (which may be a CONCAT) as a user register. */
1129 mark_user_reg (rtx reg)
1131 if (GET_CODE (reg) == CONCAT)
1133 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1134 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1138 gcc_assert (REG_P (reg));
1139 REG_USERVAR_P (reg) = 1;
1143 /* Identify REG as a probable pointer register and show its alignment
1144 as ALIGN, if nonzero. */
1147 mark_reg_pointer (rtx reg, int align)
1149 if (! REG_POINTER (reg))
1151 REG_POINTER (reg) = 1;
1154 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1156 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1157 /* We can no-longer be sure just how aligned this pointer is. */
1158 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1161 /* Return 1 plus largest pseudo reg number used in the current function. */
1169 /* Return 1 + the largest label number used so far in the current function. */
1172 max_label_num (void)
1177 /* Return first label number used in this function (if any were used). */
1180 get_first_label_num (void)
1182 return first_label_num;
1185 /* If the rtx for label was created during the expansion of a nested
1186 function, then first_label_num won't include this label number.
1187 Fix this now so that array indices work later. */
1190 maybe_set_first_label_num (rtx x)
1192 if (CODE_LABEL_NUMBER (x) < first_label_num)
1193 first_label_num = CODE_LABEL_NUMBER (x);
1196 /* Return a value representing some low-order bits of X, where the number
1197 of low-order bits is given by MODE. Note that no conversion is done
1198 between floating-point and fixed-point values, rather, the bit
1199 representation is returned.
1201 This function handles the cases in common between gen_lowpart, below,
1202 and two variants in cse.c and combine.c. These are the cases that can
1203 be safely handled at all points in the compilation.
1205 If this is not a case we can handle, return 0. */
1208 gen_lowpart_common (enum machine_mode mode, rtx x)
1210 int msize = GET_MODE_SIZE (mode);
1213 enum machine_mode innermode;
1215 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1216 so we have to make one up. Yuk. */
1217 innermode = GET_MODE (x);
1219 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1220 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1221 else if (innermode == VOIDmode)
1222 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1224 xsize = GET_MODE_SIZE (innermode);
1226 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1228 if (innermode == mode)
1231 /* MODE must occupy no more words than the mode of X. */
1232 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1233 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1236 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1237 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1240 offset = subreg_lowpart_offset (mode, innermode);
1242 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1243 && (GET_MODE_CLASS (mode) == MODE_INT
1244 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1246 /* If we are getting the low-order part of something that has been
1247 sign- or zero-extended, we can either just use the object being
1248 extended or make a narrower extension. If we want an even smaller
1249 piece than the size of the object being extended, call ourselves
1252 This case is used mostly by combine and cse. */
1254 if (GET_MODE (XEXP (x, 0)) == mode)
1256 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1257 return gen_lowpart_common (mode, XEXP (x, 0));
1258 else if (msize < xsize)
1259 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1261 else if (GET_CODE (x) == SUBREG || REG_P (x)
1262 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1263 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1264 return simplify_gen_subreg (mode, x, innermode, offset);
1266 /* Otherwise, we can't do this. */
1271 gen_highpart (enum machine_mode mode, rtx x)
1273 unsigned int msize = GET_MODE_SIZE (mode);
1276 /* This case loses if X is a subreg. To catch bugs early,
1277 complain if an invalid MODE is used even in other cases. */
1278 gcc_assert (msize <= UNITS_PER_WORD
1279 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1281 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1282 subreg_highpart_offset (mode, GET_MODE (x)));
1283 gcc_assert (result);
1285 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1286 the target if we have a MEM. gen_highpart must return a valid operand,
1287 emitting code if necessary to do so. */
1290 result = validize_mem (result);
1291 gcc_assert (result);
1297 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1298 be VOIDmode constant. */
1300 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1302 if (GET_MODE (exp) != VOIDmode)
1304 gcc_assert (GET_MODE (exp) == innermode);
1305 return gen_highpart (outermode, exp);
1307 return simplify_gen_subreg (outermode, exp, innermode,
1308 subreg_highpart_offset (outermode, innermode));
1311 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1314 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1316 unsigned int offset = 0;
1317 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1321 if (WORDS_BIG_ENDIAN)
1322 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1323 if (BYTES_BIG_ENDIAN)
1324 offset += difference % UNITS_PER_WORD;
1330 /* Return offset in bytes to get OUTERMODE high part
1331 of the value in mode INNERMODE stored in memory in target format. */
1333 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1335 unsigned int offset = 0;
1336 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1338 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1342 if (! WORDS_BIG_ENDIAN)
1343 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1344 if (! BYTES_BIG_ENDIAN)
1345 offset += difference % UNITS_PER_WORD;
1351 /* Return 1 iff X, assumed to be a SUBREG,
1352 refers to the least significant part of its containing reg.
1353 If X is not a SUBREG, always return 1 (it is its own low part!). */
1356 subreg_lowpart_p (const_rtx x)
1358 if (GET_CODE (x) != SUBREG)
1360 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1363 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1364 == SUBREG_BYTE (x));
1367 /* Return subword OFFSET of operand OP.
1368 The word number, OFFSET, is interpreted as the word number starting
1369 at the low-order address. OFFSET 0 is the low-order word if not
1370 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1372 If we cannot extract the required word, we return zero. Otherwise,
1373 an rtx corresponding to the requested word will be returned.
1375 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1376 reload has completed, a valid address will always be returned. After
1377 reload, if a valid address cannot be returned, we return zero.
1379 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1380 it is the responsibility of the caller.
1382 MODE is the mode of OP in case it is a CONST_INT.
1384 ??? This is still rather broken for some cases. The problem for the
1385 moment is that all callers of this thing provide no 'goal mode' to
1386 tell us to work with. This exists because all callers were written
1387 in a word based SUBREG world.
1388 Now use of this function can be deprecated by simplify_subreg in most
1393 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1395 if (mode == VOIDmode)
1396 mode = GET_MODE (op);
1398 gcc_assert (mode != VOIDmode);
1400 /* If OP is narrower than a word, fail. */
1402 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1405 /* If we want a word outside OP, return zero. */
1407 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1410 /* Form a new MEM at the requested address. */
1413 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1415 if (! validate_address)
1418 else if (reload_completed)
1420 if (! strict_memory_address_addr_space_p (word_mode,
1422 MEM_ADDR_SPACE (op)))
1426 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1429 /* Rest can be handled by simplify_subreg. */
1430 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1433 /* Similar to `operand_subword', but never return 0. If we can't
1434 extract the required subword, put OP into a register and try again.
1435 The second attempt must succeed. We always validate the address in
1438 MODE is the mode of OP, in case it is CONST_INT. */
1441 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1443 rtx result = operand_subword (op, offset, 1, mode);
1448 if (mode != BLKmode && mode != VOIDmode)
1450 /* If this is a register which can not be accessed by words, copy it
1451 to a pseudo register. */
1453 op = copy_to_reg (op);
1455 op = force_reg (mode, op);
1458 result = operand_subword (op, offset, 1, mode);
1459 gcc_assert (result);
1464 /* Returns 1 if both MEM_EXPR can be considered equal
1468 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1473 if (! expr1 || ! expr2)
1476 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1479 return operand_equal_p (expr1, expr2, 0);
1482 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1483 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1487 get_mem_align_offset (rtx mem, unsigned int align)
1490 unsigned HOST_WIDE_INT offset;
1492 /* This function can't use
1493 if (!MEM_EXPR (mem) || !MEM_OFFSET (mem)
1494 || !CONST_INT_P (MEM_OFFSET (mem))
1495 || (get_object_alignment (MEM_EXPR (mem), MEM_ALIGN (mem), align)
1499 return (- INTVAL (MEM_OFFSET (mem))) & (align / BITS_PER_UNIT - 1);
1501 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1502 for <variable>. get_inner_reference doesn't handle it and
1503 even if it did, the alignment in that case needs to be determined
1504 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1505 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1506 isn't sufficiently aligned, the object it is in might be. */
1507 gcc_assert (MEM_P (mem));
1508 expr = MEM_EXPR (mem);
1509 if (expr == NULL_TREE
1510 || MEM_OFFSET (mem) == NULL_RTX
1511 || !CONST_INT_P (MEM_OFFSET (mem)))
1514 offset = INTVAL (MEM_OFFSET (mem));
1517 if (DECL_ALIGN (expr) < align)
1520 else if (INDIRECT_REF_P (expr))
1522 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1525 else if (TREE_CODE (expr) == COMPONENT_REF)
1529 tree inner = TREE_OPERAND (expr, 0);
1530 tree field = TREE_OPERAND (expr, 1);
1531 tree byte_offset = component_ref_field_offset (expr);
1532 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1535 || !host_integerp (byte_offset, 1)
1536 || !host_integerp (bit_offset, 1))
1539 offset += tree_low_cst (byte_offset, 1);
1540 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1542 if (inner == NULL_TREE)
1544 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1545 < (unsigned int) align)
1549 else if (DECL_P (inner))
1551 if (DECL_ALIGN (inner) < align)
1555 else if (TREE_CODE (inner) != COMPONENT_REF)
1563 return offset & ((align / BITS_PER_UNIT) - 1);
1566 /* Given REF (a MEM) and T, either the type of X or the expression
1567 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1568 if we are making a new object of this type. BITPOS is nonzero if
1569 there is an offset outstanding on T that will be applied later. */
1572 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1573 HOST_WIDE_INT bitpos)
1575 alias_set_type alias = MEM_ALIAS_SET (ref);
1576 tree expr = MEM_EXPR (ref);
1577 rtx offset = MEM_OFFSET (ref);
1578 rtx size = MEM_SIZE (ref);
1579 unsigned int align = MEM_ALIGN (ref);
1580 HOST_WIDE_INT apply_bitpos = 0;
1583 /* It can happen that type_for_mode was given a mode for which there
1584 is no language-level type. In which case it returns NULL, which
1589 type = TYPE_P (t) ? t : TREE_TYPE (t);
1590 if (type == error_mark_node)
1593 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1594 wrong answer, as it assumes that DECL_RTL already has the right alias
1595 info. Callers should not set DECL_RTL until after the call to
1596 set_mem_attributes. */
1597 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1599 /* Get the alias set from the expression or type (perhaps using a
1600 front-end routine) and use it. */
1601 alias = get_alias_set (t);
1603 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1604 MEM_IN_STRUCT_P (ref)
1605 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1606 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1608 /* If we are making an object of this type, or if this is a DECL, we know
1609 that it is a scalar if the type is not an aggregate. */
1610 if ((objectp || DECL_P (t))
1611 && ! AGGREGATE_TYPE_P (type)
1612 && TREE_CODE (type) != COMPLEX_TYPE)
1613 MEM_SCALAR_P (ref) = 1;
1615 /* We can set the alignment from the type if we are making an object,
1616 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1617 if (objectp || TREE_CODE (t) == INDIRECT_REF
1618 || TREE_CODE (t) == ALIGN_INDIRECT_REF
1619 || TYPE_ALIGN_OK (type))
1620 align = MAX (align, TYPE_ALIGN (type));
1622 if (TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1624 if (integer_zerop (TREE_OPERAND (t, 1)))
1625 /* We don't know anything about the alignment. */
1626 align = BITS_PER_UNIT;
1628 align = tree_low_cst (TREE_OPERAND (t, 1), 1);
1631 /* If the size is known, we can set that. */
1632 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1633 size = GEN_INT (tree_low_cst (TYPE_SIZE_UNIT (type), 1));
1635 /* If T is not a type, we may be able to deduce some more information about
1640 bool align_computed = false;
1642 if (TREE_THIS_VOLATILE (t))
1643 MEM_VOLATILE_P (ref) = 1;
1645 /* Now remove any conversions: they don't change what the underlying
1646 object is. Likewise for SAVE_EXPR. */
1647 while (CONVERT_EXPR_P (t)
1648 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1649 || TREE_CODE (t) == SAVE_EXPR)
1650 t = TREE_OPERAND (t, 0);
1652 /* We may look through structure-like accesses for the purposes of
1653 examining TREE_THIS_NOTRAP, but not array-like accesses. */
1655 while (TREE_CODE (base) == COMPONENT_REF
1656 || TREE_CODE (base) == REALPART_EXPR
1657 || TREE_CODE (base) == IMAGPART_EXPR
1658 || TREE_CODE (base) == BIT_FIELD_REF)
1659 base = TREE_OPERAND (base, 0);
1663 if (CODE_CONTAINS_STRUCT (TREE_CODE (base), TS_DECL_WITH_VIS))
1664 MEM_NOTRAP_P (ref) = !DECL_WEAK (base);
1666 MEM_NOTRAP_P (ref) = 1;
1669 MEM_NOTRAP_P (ref) = TREE_THIS_NOTRAP (base);
1671 base = get_base_address (base);
1672 if (base && DECL_P (base)
1673 && TREE_READONLY (base)
1674 && (TREE_STATIC (base) || DECL_EXTERNAL (base)))
1676 tree base_type = TREE_TYPE (base);
1677 gcc_assert (!(base_type && TYPE_NEEDS_CONSTRUCTING (base_type))
1678 || DECL_ARTIFICIAL (base));
1679 MEM_READONLY_P (ref) = 1;
1682 /* If this expression uses it's parent's alias set, mark it such
1683 that we won't change it. */
1684 if (component_uses_parent_alias_set (t))
1685 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1687 /* If this is a decl, set the attributes of the MEM from it. */
1691 offset = const0_rtx;
1692 apply_bitpos = bitpos;
1693 size = (DECL_SIZE_UNIT (t)
1694 && host_integerp (DECL_SIZE_UNIT (t), 1)
1695 ? GEN_INT (tree_low_cst (DECL_SIZE_UNIT (t), 1)) : 0);
1696 align = DECL_ALIGN (t);
1697 align_computed = true;
1700 /* If this is a constant, we know the alignment. */
1701 else if (CONSTANT_CLASS_P (t))
1703 align = TYPE_ALIGN (type);
1704 #ifdef CONSTANT_ALIGNMENT
1705 align = CONSTANT_ALIGNMENT (t, align);
1707 align_computed = true;
1710 /* If this is a field reference and not a bit-field, record it. */
1711 /* ??? There is some information that can be gleaned from bit-fields,
1712 such as the word offset in the structure that might be modified.
1713 But skip it for now. */
1714 else if (TREE_CODE (t) == COMPONENT_REF
1715 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1718 offset = const0_rtx;
1719 apply_bitpos = bitpos;
1720 /* ??? Any reason the field size would be different than
1721 the size we got from the type? */
1724 /* If this is an array reference, look for an outer field reference. */
1725 else if (TREE_CODE (t) == ARRAY_REF)
1727 tree off_tree = size_zero_node;
1728 /* We can't modify t, because we use it at the end of the
1734 tree index = TREE_OPERAND (t2, 1);
1735 tree low_bound = array_ref_low_bound (t2);
1736 tree unit_size = array_ref_element_size (t2);
1738 /* We assume all arrays have sizes that are a multiple of a byte.
1739 First subtract the lower bound, if any, in the type of the
1740 index, then convert to sizetype and multiply by the size of
1741 the array element. */
1742 if (! integer_zerop (low_bound))
1743 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1746 off_tree = size_binop (PLUS_EXPR,
1747 size_binop (MULT_EXPR,
1748 fold_convert (sizetype,
1752 t2 = TREE_OPERAND (t2, 0);
1754 while (TREE_CODE (t2) == ARRAY_REF);
1760 if (host_integerp (off_tree, 1))
1762 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1763 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1764 align = DECL_ALIGN (t2);
1765 if (aoff && (unsigned HOST_WIDE_INT) aoff < align)
1767 align_computed = true;
1768 offset = GEN_INT (ioff);
1769 apply_bitpos = bitpos;
1772 else if (TREE_CODE (t2) == COMPONENT_REF)
1776 if (host_integerp (off_tree, 1))
1778 offset = GEN_INT (tree_low_cst (off_tree, 1));
1779 apply_bitpos = bitpos;
1781 /* ??? Any reason the field size would be different than
1782 the size we got from the type? */
1785 /* If this is an indirect reference, record it. */
1786 else if (TREE_CODE (t) == INDIRECT_REF
1787 || TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1790 offset = const0_rtx;
1791 apply_bitpos = bitpos;
1795 /* If this is an indirect reference, record it. */
1796 else if (TREE_CODE (t) == INDIRECT_REF
1797 || TREE_CODE (t) == MISALIGNED_INDIRECT_REF)
1800 offset = const0_rtx;
1801 apply_bitpos = bitpos;
1804 if (!align_computed && !INDIRECT_REF_P (t))
1806 unsigned int obj_align
1807 = get_object_alignment (t, align, BIGGEST_ALIGNMENT);
1808 align = MAX (align, obj_align);
1812 /* If we modified OFFSET based on T, then subtract the outstanding
1813 bit position offset. Similarly, increase the size of the accessed
1814 object to contain the negative offset. */
1817 offset = plus_constant (offset, -(apply_bitpos / BITS_PER_UNIT));
1819 size = plus_constant (size, apply_bitpos / BITS_PER_UNIT);
1822 if (TREE_CODE (t) == ALIGN_INDIRECT_REF)
1824 /* Force EXPR and OFFSET to NULL, since we don't know exactly what
1825 we're overlapping. */
1830 /* Now set the attributes we computed above. */
1832 = get_mem_attrs (alias, expr, offset, size, align,
1833 TYPE_ADDR_SPACE (type), GET_MODE (ref));
1835 /* If this is already known to be a scalar or aggregate, we are done. */
1836 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1839 /* If it is a reference into an aggregate, this is part of an aggregate.
1840 Otherwise we don't know. */
1841 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1842 || TREE_CODE (t) == ARRAY_RANGE_REF
1843 || TREE_CODE (t) == BIT_FIELD_REF)
1844 MEM_IN_STRUCT_P (ref) = 1;
1848 set_mem_attributes (rtx ref, tree t, int objectp)
1850 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1853 /* Set the alias set of MEM to SET. */
1856 set_mem_alias_set (rtx mem, alias_set_type set)
1858 #ifdef ENABLE_CHECKING
1859 /* If the new and old alias sets don't conflict, something is wrong. */
1860 gcc_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1863 MEM_ATTRS (mem) = get_mem_attrs (set, MEM_EXPR (mem), MEM_OFFSET (mem),
1864 MEM_SIZE (mem), MEM_ALIGN (mem),
1865 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1868 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1871 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1873 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1874 MEM_OFFSET (mem), MEM_SIZE (mem),
1875 MEM_ALIGN (mem), addrspace, GET_MODE (mem));
1878 /* Set the alignment of MEM to ALIGN bits. */
1881 set_mem_align (rtx mem, unsigned int align)
1883 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1884 MEM_OFFSET (mem), MEM_SIZE (mem), align,
1885 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1888 /* Set the expr for MEM to EXPR. */
1891 set_mem_expr (rtx mem, tree expr)
1894 = get_mem_attrs (MEM_ALIAS_SET (mem), expr, MEM_OFFSET (mem),
1895 MEM_SIZE (mem), MEM_ALIGN (mem),
1896 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1899 /* Set the offset of MEM to OFFSET. */
1902 set_mem_offset (rtx mem, rtx offset)
1904 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1905 offset, MEM_SIZE (mem), MEM_ALIGN (mem),
1906 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1909 /* Set the size of MEM to SIZE. */
1912 set_mem_size (rtx mem, rtx size)
1914 MEM_ATTRS (mem) = get_mem_attrs (MEM_ALIAS_SET (mem), MEM_EXPR (mem),
1915 MEM_OFFSET (mem), size, MEM_ALIGN (mem),
1916 MEM_ADDR_SPACE (mem), GET_MODE (mem));
1919 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1920 and its address changed to ADDR. (VOIDmode means don't change the mode.
1921 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1922 returned memory location is required to be valid. The memory
1923 attributes are not changed. */
1926 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1931 gcc_assert (MEM_P (memref));
1932 as = MEM_ADDR_SPACE (memref);
1933 if (mode == VOIDmode)
1934 mode = GET_MODE (memref);
1936 addr = XEXP (memref, 0);
1937 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1938 && (!validate || memory_address_addr_space_p (mode, addr, as)))
1943 if (reload_in_progress || reload_completed)
1944 gcc_assert (memory_address_addr_space_p (mode, addr, as));
1946 addr = memory_address_addr_space (mode, addr, as);
1949 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1952 new_rtx = gen_rtx_MEM (mode, addr);
1953 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1957 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
1958 way we are changing MEMREF, so we only preserve the alias set. */
1961 change_address (rtx memref, enum machine_mode mode, rtx addr)
1963 rtx new_rtx = change_address_1 (memref, mode, addr, 1), size;
1964 enum machine_mode mmode = GET_MODE (new_rtx);
1967 size = mmode == BLKmode ? 0 : GEN_INT (GET_MODE_SIZE (mmode));
1968 align = mmode == BLKmode ? BITS_PER_UNIT : GET_MODE_ALIGNMENT (mmode);
1970 /* If there are no changes, just return the original memory reference. */
1971 if (new_rtx == memref)
1973 if (MEM_ATTRS (memref) == 0
1974 || (MEM_EXPR (memref) == NULL
1975 && MEM_OFFSET (memref) == NULL
1976 && MEM_SIZE (memref) == size
1977 && MEM_ALIGN (memref) == align))
1980 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
1981 MEM_COPY_ATTRIBUTES (new_rtx, memref);
1985 = get_mem_attrs (MEM_ALIAS_SET (memref), 0, 0, size, align,
1986 MEM_ADDR_SPACE (memref), mmode);
1991 /* Return a memory reference like MEMREF, but with its mode changed
1992 to MODE and its address offset by OFFSET bytes. If VALIDATE is
1993 nonzero, the memory address is forced to be valid.
1994 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
1995 and caller is responsible for adjusting MEMREF base register. */
1998 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
1999 int validate, int adjust)
2001 rtx addr = XEXP (memref, 0);
2003 rtx memoffset = MEM_OFFSET (memref);
2005 unsigned int memalign = MEM_ALIGN (memref);
2006 addr_space_t as = MEM_ADDR_SPACE (memref);
2007 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
2010 /* If there are no changes, just return the original memory reference. */
2011 if (mode == GET_MODE (memref) && !offset
2012 && (!validate || memory_address_addr_space_p (mode, addr, as)))
2015 /* ??? Prefer to create garbage instead of creating shared rtl.
2016 This may happen even if offset is nonzero -- consider
2017 (plus (plus reg reg) const_int) -- so do this always. */
2018 addr = copy_rtx (addr);
2020 /* Convert a possibly large offset to a signed value within the
2021 range of the target address space. */
2022 pbits = GET_MODE_BITSIZE (address_mode);
2023 if (HOST_BITS_PER_WIDE_INT > pbits)
2025 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2026 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2032 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2033 object, we can merge it into the LO_SUM. */
2034 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2036 && (unsigned HOST_WIDE_INT) offset
2037 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2038 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2039 plus_constant (XEXP (addr, 1), offset));
2041 addr = plus_constant (addr, offset);
2044 new_rtx = change_address_1 (memref, mode, addr, validate);
2046 /* If the address is a REG, change_address_1 rightfully returns memref,
2047 but this would destroy memref's MEM_ATTRS. */
2048 if (new_rtx == memref && offset != 0)
2049 new_rtx = copy_rtx (new_rtx);
2051 /* Compute the new values of the memory attributes due to this adjustment.
2052 We add the offsets and update the alignment. */
2054 memoffset = GEN_INT (offset + INTVAL (memoffset));
2056 /* Compute the new alignment by taking the MIN of the alignment and the
2057 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2062 (unsigned HOST_WIDE_INT) (offset & -offset) * BITS_PER_UNIT);
2064 /* We can compute the size in a number of ways. */
2065 if (GET_MODE (new_rtx) != BLKmode)
2066 size = GEN_INT (GET_MODE_SIZE (GET_MODE (new_rtx)));
2067 else if (MEM_SIZE (memref))
2068 size = plus_constant (MEM_SIZE (memref), -offset);
2070 MEM_ATTRS (new_rtx) = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref),
2071 memoffset, size, memalign, as,
2072 GET_MODE (new_rtx));
2074 /* At some point, we should validate that this offset is within the object,
2075 if all the appropriate values are known. */
2079 /* Return a memory reference like MEMREF, but with its mode changed
2080 to MODE and its address changed to ADDR, which is assumed to be
2081 MEMREF offset by OFFSET bytes. If VALIDATE is
2082 nonzero, the memory address is forced to be valid. */
2085 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2086 HOST_WIDE_INT offset, int validate)
2088 memref = change_address_1 (memref, VOIDmode, addr, validate);
2089 return adjust_address_1 (memref, mode, offset, validate, 0);
2092 /* Return a memory reference like MEMREF, but whose address is changed by
2093 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2094 known to be in OFFSET (possibly 1). */
2097 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2099 rtx new_rtx, addr = XEXP (memref, 0);
2100 addr_space_t as = MEM_ADDR_SPACE (memref);
2101 enum machine_mode address_mode = targetm.addr_space.address_mode (as);
2103 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2105 /* At this point we don't know _why_ the address is invalid. It
2106 could have secondary memory references, multiplies or anything.
2108 However, if we did go and rearrange things, we can wind up not
2109 being able to recognize the magic around pic_offset_table_rtx.
2110 This stuff is fragile, and is yet another example of why it is
2111 bad to expose PIC machinery too early. */
2112 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx, as)
2113 && GET_CODE (addr) == PLUS
2114 && XEXP (addr, 0) == pic_offset_table_rtx)
2116 addr = force_reg (GET_MODE (addr), addr);
2117 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2120 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2121 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2123 /* If there are no changes, just return the original memory reference. */
2124 if (new_rtx == memref)
2127 /* Update the alignment to reflect the offset. Reset the offset, which
2130 = get_mem_attrs (MEM_ALIAS_SET (memref), MEM_EXPR (memref), 0, 0,
2131 MIN (MEM_ALIGN (memref), pow2 * BITS_PER_UNIT),
2132 as, GET_MODE (new_rtx));
2136 /* Return a memory reference like MEMREF, but with its address changed to
2137 ADDR. The caller is asserting that the actual piece of memory pointed
2138 to is the same, just the form of the address is being changed, such as
2139 by putting something into a register. */
2142 replace_equiv_address (rtx memref, rtx addr)
2144 /* change_address_1 copies the memory attribute structure without change
2145 and that's exactly what we want here. */
2146 update_temp_slot_address (XEXP (memref, 0), addr);
2147 return change_address_1 (memref, VOIDmode, addr, 1);
2150 /* Likewise, but the reference is not required to be valid. */
2153 replace_equiv_address_nv (rtx memref, rtx addr)
2155 return change_address_1 (memref, VOIDmode, addr, 0);
2158 /* Return a memory reference like MEMREF, but with its mode widened to
2159 MODE and offset by OFFSET. This would be used by targets that e.g.
2160 cannot issue QImode memory operations and have to use SImode memory
2161 operations plus masking logic. */
2164 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2166 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2167 tree expr = MEM_EXPR (new_rtx);
2168 rtx memoffset = MEM_OFFSET (new_rtx);
2169 unsigned int size = GET_MODE_SIZE (mode);
2171 /* If there are no changes, just return the original memory reference. */
2172 if (new_rtx == memref)
2175 /* If we don't know what offset we were at within the expression, then
2176 we can't know if we've overstepped the bounds. */
2182 if (TREE_CODE (expr) == COMPONENT_REF)
2184 tree field = TREE_OPERAND (expr, 1);
2185 tree offset = component_ref_field_offset (expr);
2187 if (! DECL_SIZE_UNIT (field))
2193 /* Is the field at least as large as the access? If so, ok,
2194 otherwise strip back to the containing structure. */
2195 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2196 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2197 && INTVAL (memoffset) >= 0)
2200 if (! host_integerp (offset, 1))
2206 expr = TREE_OPERAND (expr, 0);
2208 = (GEN_INT (INTVAL (memoffset)
2209 + tree_low_cst (offset, 1)
2210 + (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2213 /* Similarly for the decl. */
2214 else if (DECL_P (expr)
2215 && DECL_SIZE_UNIT (expr)
2216 && TREE_CODE (DECL_SIZE_UNIT (expr)) == INTEGER_CST
2217 && compare_tree_int (DECL_SIZE_UNIT (expr), size) >= 0
2218 && (! memoffset || INTVAL (memoffset) >= 0))
2222 /* The widened memory access overflows the expression, which means
2223 that it could alias another expression. Zap it. */
2230 memoffset = NULL_RTX;
2232 /* The widened memory may alias other stuff, so zap the alias set. */
2233 /* ??? Maybe use get_alias_set on any remaining expression. */
2235 MEM_ATTRS (new_rtx) = get_mem_attrs (0, expr, memoffset, GEN_INT (size),
2236 MEM_ALIGN (new_rtx),
2237 MEM_ADDR_SPACE (new_rtx), mode);
2242 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2243 static GTY(()) tree spill_slot_decl;
2246 get_spill_slot_decl (bool force_build_p)
2248 tree d = spill_slot_decl;
2251 if (d || !force_build_p)
2254 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2255 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2256 DECL_ARTIFICIAL (d) = 1;
2257 DECL_IGNORED_P (d) = 1;
2259 TREE_THIS_NOTRAP (d) = 1;
2260 spill_slot_decl = d;
2262 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2263 MEM_NOTRAP_P (rd) = 1;
2264 MEM_ATTRS (rd) = get_mem_attrs (new_alias_set (), d, const0_rtx,
2265 NULL_RTX, 0, ADDR_SPACE_GENERIC, BLKmode);
2266 SET_DECL_RTL (d, rd);
2271 /* Given MEM, a result from assign_stack_local, fill in the memory
2272 attributes as appropriate for a register allocator spill slot.
2273 These slots are not aliasable by other memory. We arrange for
2274 them all to use a single MEM_EXPR, so that the aliasing code can
2275 work properly in the case of shared spill slots. */
2278 set_mem_attrs_for_spill (rtx mem)
2280 alias_set_type alias;
2284 expr = get_spill_slot_decl (true);
2285 alias = MEM_ALIAS_SET (DECL_RTL (expr));
2287 /* We expect the incoming memory to be of the form:
2288 (mem:MODE (plus (reg sfp) (const_int offset)))
2289 with perhaps the plus missing for offset = 0. */
2290 addr = XEXP (mem, 0);
2291 offset = const0_rtx;
2292 if (GET_CODE (addr) == PLUS
2293 && CONST_INT_P (XEXP (addr, 1)))
2294 offset = XEXP (addr, 1);
2296 MEM_ATTRS (mem) = get_mem_attrs (alias, expr, offset,
2297 MEM_SIZE (mem), MEM_ALIGN (mem),
2298 ADDR_SPACE_GENERIC, GET_MODE (mem));
2299 MEM_NOTRAP_P (mem) = 1;
2302 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2305 gen_label_rtx (void)
2307 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2308 NULL, label_num++, NULL);
2311 /* For procedure integration. */
2313 /* Install new pointers to the first and last insns in the chain.
2314 Also, set cur_insn_uid to one higher than the last in use.
2315 Used for an inline-procedure after copying the insn chain. */
2318 set_new_first_and_last_insn (rtx first, rtx last)
2326 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2328 int debug_count = 0;
2330 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2331 cur_debug_insn_uid = 0;
2333 for (insn = first; insn; insn = NEXT_INSN (insn))
2334 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2335 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2338 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2339 if (DEBUG_INSN_P (insn))
2344 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2346 cur_debug_insn_uid++;
2349 for (insn = first; insn; insn = NEXT_INSN (insn))
2350 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2355 /* Go through all the RTL insn bodies and copy any invalid shared
2356 structure. This routine should only be called once. */
2359 unshare_all_rtl_1 (rtx insn)
2361 /* Unshare just about everything else. */
2362 unshare_all_rtl_in_chain (insn);
2364 /* Make sure the addresses of stack slots found outside the insn chain
2365 (such as, in DECL_RTL of a variable) are not shared
2366 with the insn chain.
2368 This special care is necessary when the stack slot MEM does not
2369 actually appear in the insn chain. If it does appear, its address
2370 is unshared from all else at that point. */
2371 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2374 /* Go through all the RTL insn bodies and copy any invalid shared
2375 structure, again. This is a fairly expensive thing to do so it
2376 should be done sparingly. */
2379 unshare_all_rtl_again (rtx insn)
2384 for (p = insn; p; p = NEXT_INSN (p))
2387 reset_used_flags (PATTERN (p));
2388 reset_used_flags (REG_NOTES (p));
2391 /* Make sure that virtual stack slots are not shared. */
2392 set_used_decls (DECL_INITIAL (cfun->decl));
2394 /* Make sure that virtual parameters are not shared. */
2395 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
2396 set_used_flags (DECL_RTL (decl));
2398 reset_used_flags (stack_slot_list);
2400 unshare_all_rtl_1 (insn);
2404 unshare_all_rtl (void)
2406 unshare_all_rtl_1 (get_insns ());
2410 struct rtl_opt_pass pass_unshare_all_rtl =
2414 "unshare", /* name */
2416 unshare_all_rtl, /* execute */
2419 0, /* static_pass_number */
2420 TV_NONE, /* tv_id */
2421 0, /* properties_required */
2422 0, /* properties_provided */
2423 0, /* properties_destroyed */
2424 0, /* todo_flags_start */
2425 TODO_dump_func | TODO_verify_rtl_sharing /* todo_flags_finish */
2430 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2431 Recursively does the same for subexpressions. */
2434 verify_rtx_sharing (rtx orig, rtx insn)
2439 const char *format_ptr;
2444 code = GET_CODE (x);
2446 /* These types may be freely shared. */
2464 /* SCRATCH must be shared because they represent distinct values. */
2466 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2471 if (shared_const_p (orig))
2476 /* A MEM is allowed to be shared if its address is constant. */
2477 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2478 || reload_completed || reload_in_progress)
2487 /* This rtx may not be shared. If it has already been seen,
2488 replace it with a copy of itself. */
2489 #ifdef ENABLE_CHECKING
2490 if (RTX_FLAG (x, used))
2492 error ("invalid rtl sharing found in the insn");
2494 error ("shared rtx");
2496 internal_error ("internal consistency failure");
2499 gcc_assert (!RTX_FLAG (x, used));
2501 RTX_FLAG (x, used) = 1;
2503 /* Now scan the subexpressions recursively. */
2505 format_ptr = GET_RTX_FORMAT (code);
2507 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2509 switch (*format_ptr++)
2512 verify_rtx_sharing (XEXP (x, i), insn);
2516 if (XVEC (x, i) != NULL)
2519 int len = XVECLEN (x, i);
2521 for (j = 0; j < len; j++)
2523 /* We allow sharing of ASM_OPERANDS inside single
2525 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2526 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2528 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2530 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2539 /* Go through all the RTL insn bodies and check that there is no unexpected
2540 sharing in between the subexpressions. */
2543 verify_rtl_sharing (void)
2547 for (p = get_insns (); p; p = NEXT_INSN (p))
2550 reset_used_flags (PATTERN (p));
2551 reset_used_flags (REG_NOTES (p));
2552 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2555 rtx q, sequence = PATTERN (p);
2557 for (i = 0; i < XVECLEN (sequence, 0); i++)
2559 q = XVECEXP (sequence, 0, i);
2560 gcc_assert (INSN_P (q));
2561 reset_used_flags (PATTERN (q));
2562 reset_used_flags (REG_NOTES (q));
2567 for (p = get_insns (); p; p = NEXT_INSN (p))
2570 verify_rtx_sharing (PATTERN (p), p);
2571 verify_rtx_sharing (REG_NOTES (p), p);
2575 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2576 Assumes the mark bits are cleared at entry. */
2579 unshare_all_rtl_in_chain (rtx insn)
2581 for (; insn; insn = NEXT_INSN (insn))
2584 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2585 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2589 /* Go through all virtual stack slots of a function and mark them as
2590 shared. We never replace the DECL_RTLs themselves with a copy,
2591 but expressions mentioned into a DECL_RTL cannot be shared with
2592 expressions in the instruction stream.
2594 Note that reload may convert pseudo registers into memories in-place.
2595 Pseudo registers are always shared, but MEMs never are. Thus if we
2596 reset the used flags on MEMs in the instruction stream, we must set
2597 them again on MEMs that appear in DECL_RTLs. */
2600 set_used_decls (tree blk)
2605 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
2606 if (DECL_RTL_SET_P (t))
2607 set_used_flags (DECL_RTL (t));
2609 /* Now process sub-blocks. */
2610 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2614 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2615 Recursively does the same for subexpressions. Uses
2616 copy_rtx_if_shared_1 to reduce stack space. */
2619 copy_rtx_if_shared (rtx orig)
2621 copy_rtx_if_shared_1 (&orig);
2625 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2626 use. Recursively does the same for subexpressions. */
2629 copy_rtx_if_shared_1 (rtx *orig1)
2635 const char *format_ptr;
2639 /* Repeat is used to turn tail-recursion into iteration. */
2646 code = GET_CODE (x);
2648 /* These types may be freely shared. */
2665 /* SCRATCH must be shared because they represent distinct values. */
2668 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2673 if (shared_const_p (x))
2683 /* The chain of insns is not being copied. */
2690 /* This rtx may not be shared. If it has already been seen,
2691 replace it with a copy of itself. */
2693 if (RTX_FLAG (x, used))
2695 x = shallow_copy_rtx (x);
2698 RTX_FLAG (x, used) = 1;
2700 /* Now scan the subexpressions recursively.
2701 We can store any replaced subexpressions directly into X
2702 since we know X is not shared! Any vectors in X
2703 must be copied if X was copied. */
2705 format_ptr = GET_RTX_FORMAT (code);
2706 length = GET_RTX_LENGTH (code);
2709 for (i = 0; i < length; i++)
2711 switch (*format_ptr++)
2715 copy_rtx_if_shared_1 (last_ptr);
2716 last_ptr = &XEXP (x, i);
2720 if (XVEC (x, i) != NULL)
2723 int len = XVECLEN (x, i);
2725 /* Copy the vector iff I copied the rtx and the length
2727 if (copied && len > 0)
2728 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2730 /* Call recursively on all inside the vector. */
2731 for (j = 0; j < len; j++)
2734 copy_rtx_if_shared_1 (last_ptr);
2735 last_ptr = &XVECEXP (x, i, j);
2750 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2751 to look for shared sub-parts. */
2754 reset_used_flags (rtx x)
2758 const char *format_ptr;
2761 /* Repeat is used to turn tail-recursion into iteration. */
2766 code = GET_CODE (x);
2768 /* These types may be freely shared so we needn't do any resetting
2793 /* The chain of insns is not being copied. */
2800 RTX_FLAG (x, used) = 0;
2802 format_ptr = GET_RTX_FORMAT (code);
2803 length = GET_RTX_LENGTH (code);
2805 for (i = 0; i < length; i++)
2807 switch (*format_ptr++)
2815 reset_used_flags (XEXP (x, i));
2819 for (j = 0; j < XVECLEN (x, i); j++)
2820 reset_used_flags (XVECEXP (x, i, j));
2826 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2827 to look for shared sub-parts. */
2830 set_used_flags (rtx x)
2834 const char *format_ptr;
2839 code = GET_CODE (x);
2841 /* These types may be freely shared so we needn't do any resetting
2866 /* The chain of insns is not being copied. */
2873 RTX_FLAG (x, used) = 1;
2875 format_ptr = GET_RTX_FORMAT (code);
2876 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2878 switch (*format_ptr++)
2881 set_used_flags (XEXP (x, i));
2885 for (j = 0; j < XVECLEN (x, i); j++)
2886 set_used_flags (XVECEXP (x, i, j));
2892 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2893 Return X or the rtx for the pseudo reg the value of X was copied into.
2894 OTHER must be valid as a SET_DEST. */
2897 make_safe_from (rtx x, rtx other)
2900 switch (GET_CODE (other))
2903 other = SUBREG_REG (other);
2905 case STRICT_LOW_PART:
2908 other = XEXP (other, 0);
2917 && GET_CODE (x) != SUBREG)
2919 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2920 || reg_mentioned_p (other, x))))
2922 rtx temp = gen_reg_rtx (GET_MODE (x));
2923 emit_move_insn (temp, x);
2929 /* Emission of insns (adding them to the doubly-linked list). */
2931 /* Return the first insn of the current sequence or current function. */
2939 /* Specify a new insn as the first in the chain. */
2942 set_first_insn (rtx insn)
2944 gcc_assert (!PREV_INSN (insn));
2948 /* Return the last insn emitted in current sequence or current function. */
2951 get_last_insn (void)
2956 /* Specify a new insn as the last in the chain. */
2959 set_last_insn (rtx insn)
2961 gcc_assert (!NEXT_INSN (insn));
2965 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2968 get_last_insn_anywhere (void)
2970 struct sequence_stack *stack;
2973 for (stack = seq_stack; stack; stack = stack->next)
2974 if (stack->last != 0)
2979 /* Return the first nonnote insn emitted in current sequence or current
2980 function. This routine looks inside SEQUENCEs. */
2983 get_first_nonnote_insn (void)
2985 rtx insn = first_insn;
2990 for (insn = next_insn (insn);
2991 insn && NOTE_P (insn);
2992 insn = next_insn (insn))
2996 if (NONJUMP_INSN_P (insn)
2997 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2998 insn = XVECEXP (PATTERN (insn), 0, 0);
3005 /* Return the last nonnote insn emitted in current sequence or current
3006 function. This routine looks inside SEQUENCEs. */
3009 get_last_nonnote_insn (void)
3011 rtx insn = last_insn;
3016 for (insn = previous_insn (insn);
3017 insn && NOTE_P (insn);
3018 insn = previous_insn (insn))
3022 if (NONJUMP_INSN_P (insn)
3023 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3024 insn = XVECEXP (PATTERN (insn), 0,
3025 XVECLEN (PATTERN (insn), 0) - 1);
3032 /* Return a number larger than any instruction's uid in this function. */
3037 return cur_insn_uid;
3040 /* Return the number of actual (non-debug) insns emitted in this
3044 get_max_insn_count (void)
3046 int n = cur_insn_uid;
3048 /* The table size must be stable across -g, to avoid codegen
3049 differences due to debug insns, and not be affected by
3050 -fmin-insn-uid, to avoid excessive table size and to simplify
3051 debugging of -fcompare-debug failures. */
3052 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3053 n -= cur_debug_insn_uid;
3055 n -= MIN_NONDEBUG_INSN_UID;
3061 /* Return the next insn. If it is a SEQUENCE, return the first insn
3065 next_insn (rtx insn)
3069 insn = NEXT_INSN (insn);
3070 if (insn && NONJUMP_INSN_P (insn)
3071 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3072 insn = XVECEXP (PATTERN (insn), 0, 0);
3078 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3082 previous_insn (rtx insn)
3086 insn = PREV_INSN (insn);
3087 if (insn && NONJUMP_INSN_P (insn)
3088 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3089 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3095 /* Return the next insn after INSN that is not a NOTE. This routine does not
3096 look inside SEQUENCEs. */
3099 next_nonnote_insn (rtx insn)
3103 insn = NEXT_INSN (insn);
3104 if (insn == 0 || !NOTE_P (insn))
3111 /* Return the next insn after INSN that is not a NOTE, but stop the
3112 search before we enter another basic block. This routine does not
3113 look inside SEQUENCEs. */
3116 next_nonnote_insn_bb (rtx insn)
3120 insn = NEXT_INSN (insn);
3121 if (insn == 0 || !NOTE_P (insn))
3123 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3130 /* Return the previous insn before INSN that is not a NOTE. This routine does
3131 not look inside SEQUENCEs. */
3134 prev_nonnote_insn (rtx insn)
3138 insn = PREV_INSN (insn);
3139 if (insn == 0 || !NOTE_P (insn))
3146 /* Return the previous insn before INSN that is not a NOTE, but stop
3147 the search before we enter another basic block. This routine does
3148 not look inside SEQUENCEs. */
3151 prev_nonnote_insn_bb (rtx insn)
3155 insn = PREV_INSN (insn);
3156 if (insn == 0 || !NOTE_P (insn))
3158 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3165 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3166 routine does not look inside SEQUENCEs. */
3169 next_nondebug_insn (rtx insn)
3173 insn = NEXT_INSN (insn);
3174 if (insn == 0 || !DEBUG_INSN_P (insn))
3181 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3182 This routine does not look inside SEQUENCEs. */
3185 prev_nondebug_insn (rtx insn)
3189 insn = PREV_INSN (insn);
3190 if (insn == 0 || !DEBUG_INSN_P (insn))
3197 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3198 or 0, if there is none. This routine does not look inside
3202 next_real_insn (rtx insn)
3206 insn = NEXT_INSN (insn);
3207 if (insn == 0 || INSN_P (insn))
3214 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3215 or 0, if there is none. This routine does not look inside
3219 prev_real_insn (rtx insn)
3223 insn = PREV_INSN (insn);
3224 if (insn == 0 || INSN_P (insn))
3231 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3232 This routine does not look inside SEQUENCEs. */
3235 last_call_insn (void)
3239 for (insn = get_last_insn ();
3240 insn && !CALL_P (insn);
3241 insn = PREV_INSN (insn))
3247 /* Find the next insn after INSN that really does something. This routine
3248 does not look inside SEQUENCEs. After reload this also skips over
3249 standalone USE and CLOBBER insn. */
3252 active_insn_p (const_rtx insn)
3254 return (CALL_P (insn) || JUMP_P (insn)
3255 || (NONJUMP_INSN_P (insn)
3256 && (! reload_completed
3257 || (GET_CODE (PATTERN (insn)) != USE
3258 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3262 next_active_insn (rtx insn)
3266 insn = NEXT_INSN (insn);
3267 if (insn == 0 || active_insn_p (insn))
3274 /* Find the last insn before INSN that really does something. This routine
3275 does not look inside SEQUENCEs. After reload this also skips over
3276 standalone USE and CLOBBER insn. */
3279 prev_active_insn (rtx insn)
3283 insn = PREV_INSN (insn);
3284 if (insn == 0 || active_insn_p (insn))
3291 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3294 next_label (rtx insn)
3298 insn = NEXT_INSN (insn);
3299 if (insn == 0 || LABEL_P (insn))
3306 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3309 prev_label (rtx insn)
3313 insn = PREV_INSN (insn);
3314 if (insn == 0 || LABEL_P (insn))
3321 /* Return the last label to mark the same position as LABEL. Return null
3322 if LABEL itself is null. */
3325 skip_consecutive_labels (rtx label)
3329 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3337 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3338 and REG_CC_USER notes so we can find it. */
3341 link_cc0_insns (rtx insn)
3343 rtx user = next_nonnote_insn (insn);
3345 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3346 user = XVECEXP (PATTERN (user), 0, 0);
3348 add_reg_note (user, REG_CC_SETTER, insn);
3349 add_reg_note (insn, REG_CC_USER, user);
3352 /* Return the next insn that uses CC0 after INSN, which is assumed to
3353 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3354 applied to the result of this function should yield INSN).
3356 Normally, this is simply the next insn. However, if a REG_CC_USER note
3357 is present, it contains the insn that uses CC0.
3359 Return 0 if we can't find the insn. */
3362 next_cc0_user (rtx insn)
3364 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3367 return XEXP (note, 0);
3369 insn = next_nonnote_insn (insn);
3370 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3371 insn = XVECEXP (PATTERN (insn), 0, 0);
3373 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3379 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3380 note, it is the previous insn. */
3383 prev_cc0_setter (rtx insn)
3385 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3388 return XEXP (note, 0);
3390 insn = prev_nonnote_insn (insn);
3391 gcc_assert (sets_cc0_p (PATTERN (insn)));
3398 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3401 find_auto_inc (rtx *xp, void *data)
3404 rtx reg = (rtx) data;
3406 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3409 switch (GET_CODE (x))
3417 if (rtx_equal_p (reg, XEXP (x, 0)))
3428 /* Increment the label uses for all labels present in rtx. */
3431 mark_label_nuses (rtx x)
3437 code = GET_CODE (x);
3438 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3439 LABEL_NUSES (XEXP (x, 0))++;
3441 fmt = GET_RTX_FORMAT (code);
3442 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3445 mark_label_nuses (XEXP (x, i));
3446 else if (fmt[i] == 'E')
3447 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3448 mark_label_nuses (XVECEXP (x, i, j));
3453 /* Try splitting insns that can be split for better scheduling.
3454 PAT is the pattern which might split.
3455 TRIAL is the insn providing PAT.
3456 LAST is nonzero if we should return the last insn of the sequence produced.
3458 If this routine succeeds in splitting, it returns the first or last
3459 replacement insn depending on the value of LAST. Otherwise, it
3460 returns TRIAL. If the insn to be returned can be split, it will be. */
3463 try_split (rtx pat, rtx trial, int last)
3465 rtx before = PREV_INSN (trial);
3466 rtx after = NEXT_INSN (trial);
3467 int has_barrier = 0;
3470 rtx insn_last, insn;
3473 /* We're not good at redistributing frame information. */
3474 if (RTX_FRAME_RELATED_P (trial))
3477 if (any_condjump_p (trial)
3478 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3479 split_branch_probability = INTVAL (XEXP (note, 0));
3480 probability = split_branch_probability;
3482 seq = split_insns (pat, trial);
3484 split_branch_probability = -1;
3486 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3487 We may need to handle this specially. */
3488 if (after && BARRIER_P (after))
3491 after = NEXT_INSN (after);
3497 /* Avoid infinite loop if any insn of the result matches
3498 the original pattern. */
3502 if (INSN_P (insn_last)
3503 && rtx_equal_p (PATTERN (insn_last), pat))
3505 if (!NEXT_INSN (insn_last))
3507 insn_last = NEXT_INSN (insn_last);
3510 /* We will be adding the new sequence to the function. The splitters
3511 may have introduced invalid RTL sharing, so unshare the sequence now. */
3512 unshare_all_rtl_in_chain (seq);
3515 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3519 mark_jump_label (PATTERN (insn), insn, 0);
3521 if (probability != -1
3522 && any_condjump_p (insn)
3523 && !find_reg_note (insn, REG_BR_PROB, 0))
3525 /* We can preserve the REG_BR_PROB notes only if exactly
3526 one jump is created, otherwise the machine description
3527 is responsible for this step using
3528 split_branch_probability variable. */
3529 gcc_assert (njumps == 1);
3530 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3535 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3536 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
3539 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3542 rtx *p = &CALL_INSN_FUNCTION_USAGE (insn);
3545 *p = CALL_INSN_FUNCTION_USAGE (trial);
3546 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3548 /* Update the debug information for the CALL_INSN. */
3549 if (flag_enable_icf_debug)
3550 (*debug_hooks->copy_call_info) (trial, insn);
3554 /* Copy notes, particularly those related to the CFG. */
3555 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3557 switch (REG_NOTE_KIND (note))
3560 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3565 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3568 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3572 case REG_NON_LOCAL_GOTO:
3573 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3576 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3582 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3584 rtx reg = XEXP (note, 0);
3585 if (!FIND_REG_INC_NOTE (insn, reg)
3586 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3587 add_reg_note (insn, REG_INC, reg);
3597 /* If there are LABELS inside the split insns increment the
3598 usage count so we don't delete the label. */
3602 while (insn != NULL_RTX)
3604 /* JUMP_P insns have already been "marked" above. */
3605 if (NONJUMP_INSN_P (insn))
3606 mark_label_nuses (PATTERN (insn));
3608 insn = PREV_INSN (insn);
3612 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3614 delete_insn (trial);
3616 emit_barrier_after (tem);
3618 /* Recursively call try_split for each new insn created; by the
3619 time control returns here that insn will be fully split, so
3620 set LAST and continue from the insn after the one returned.
3621 We can't use next_active_insn here since AFTER may be a note.
3622 Ignore deleted insns, which can be occur if not optimizing. */
3623 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3624 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3625 tem = try_split (PATTERN (tem), tem, 1);
3627 /* Return either the first or the last insn, depending on which was
3630 ? (after ? PREV_INSN (after) : last_insn)
3631 : NEXT_INSN (before);
3634 /* Make and return an INSN rtx, initializing all its slots.
3635 Store PATTERN in the pattern slots. */
3638 make_insn_raw (rtx pattern)
3642 insn = rtx_alloc (INSN);
3644 INSN_UID (insn) = cur_insn_uid++;
3645 PATTERN (insn) = pattern;
3646 INSN_CODE (insn) = -1;
3647 REG_NOTES (insn) = NULL;
3648 INSN_LOCATOR (insn) = curr_insn_locator ();
3649 BLOCK_FOR_INSN (insn) = NULL;
3651 #ifdef ENABLE_RTL_CHECKING
3654 && (returnjump_p (insn)
3655 || (GET_CODE (insn) == SET
3656 && SET_DEST (insn) == pc_rtx)))
3658 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3666 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3669 make_debug_insn_raw (rtx pattern)
3673 insn = rtx_alloc (DEBUG_INSN);
3674 INSN_UID (insn) = cur_debug_insn_uid++;
3675 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3676 INSN_UID (insn) = cur_insn_uid++;
3678 PATTERN (insn) = pattern;
3679 INSN_CODE (insn) = -1;
3680 REG_NOTES (insn) = NULL;
3681 INSN_LOCATOR (insn) = curr_insn_locator ();
3682 BLOCK_FOR_INSN (insn) = NULL;
3687 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3690 make_jump_insn_raw (rtx pattern)
3694 insn = rtx_alloc (JUMP_INSN);
3695 INSN_UID (insn) = cur_insn_uid++;
3697 PATTERN (insn) = pattern;
3698 INSN_CODE (insn) = -1;
3699 REG_NOTES (insn) = NULL;
3700 JUMP_LABEL (insn) = NULL;
3701 INSN_LOCATOR (insn) = curr_insn_locator ();
3702 BLOCK_FOR_INSN (insn) = NULL;
3707 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3710 make_call_insn_raw (rtx pattern)
3714 insn = rtx_alloc (CALL_INSN);
3715 INSN_UID (insn) = cur_insn_uid++;
3717 PATTERN (insn) = pattern;
3718 INSN_CODE (insn) = -1;
3719 REG_NOTES (insn) = NULL;
3720 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3721 INSN_LOCATOR (insn) = curr_insn_locator ();
3722 BLOCK_FOR_INSN (insn) = NULL;
3727 /* Add INSN to the end of the doubly-linked list.
3728 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3733 PREV_INSN (insn) = last_insn;
3734 NEXT_INSN (insn) = 0;
3736 if (NULL != last_insn)
3737 NEXT_INSN (last_insn) = insn;
3739 if (NULL == first_insn)
3745 /* Add INSN into the doubly-linked list after insn AFTER. This and
3746 the next should be the only functions called to insert an insn once
3747 delay slots have been filled since only they know how to update a
3751 add_insn_after (rtx insn, rtx after, basic_block bb)
3753 rtx next = NEXT_INSN (after);
3755 gcc_assert (!optimize || !INSN_DELETED_P (after));
3757 NEXT_INSN (insn) = next;
3758 PREV_INSN (insn) = after;
3762 PREV_INSN (next) = insn;
3763 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3764 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3766 else if (last_insn == after)
3770 struct sequence_stack *stack = seq_stack;
3771 /* Scan all pending sequences too. */
3772 for (; stack; stack = stack->next)
3773 if (after == stack->last)
3782 if (!BARRIER_P (after)
3783 && !BARRIER_P (insn)
3784 && (bb = BLOCK_FOR_INSN (after)))
3786 set_block_for_insn (insn, bb);
3788 df_insn_rescan (insn);
3789 /* Should not happen as first in the BB is always
3790 either NOTE or LABEL. */
3791 if (BB_END (bb) == after
3792 /* Avoid clobbering of structure when creating new BB. */
3793 && !BARRIER_P (insn)
3794 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3798 NEXT_INSN (after) = insn;
3799 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3801 rtx sequence = PATTERN (after);
3802 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3806 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3807 the previous should be the only functions called to insert an insn
3808 once delay slots have been filled since only they know how to
3809 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3813 add_insn_before (rtx insn, rtx before, basic_block bb)
3815 rtx prev = PREV_INSN (before);
3817 gcc_assert (!optimize || !INSN_DELETED_P (before));
3819 PREV_INSN (insn) = prev;
3820 NEXT_INSN (insn) = before;
3824 NEXT_INSN (prev) = insn;
3825 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3827 rtx sequence = PATTERN (prev);
3828 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3831 else if (first_insn == before)
3835 struct sequence_stack *stack = seq_stack;
3836 /* Scan all pending sequences too. */
3837 for (; stack; stack = stack->next)
3838 if (before == stack->first)
3840 stack->first = insn;
3848 && !BARRIER_P (before)
3849 && !BARRIER_P (insn))
3850 bb = BLOCK_FOR_INSN (before);
3854 set_block_for_insn (insn, bb);
3856 df_insn_rescan (insn);
3857 /* Should not happen as first in the BB is always either NOTE or
3859 gcc_assert (BB_HEAD (bb) != insn
3860 /* Avoid clobbering of structure when creating new BB. */
3862 || NOTE_INSN_BASIC_BLOCK_P (insn));
3865 PREV_INSN (before) = insn;
3866 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3867 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3871 /* Replace insn with an deleted instruction note. */
3874 set_insn_deleted (rtx insn)
3876 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3877 PUT_CODE (insn, NOTE);
3878 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3882 /* Remove an insn from its doubly-linked list. This function knows how
3883 to handle sequences. */
3885 remove_insn (rtx insn)
3887 rtx next = NEXT_INSN (insn);
3888 rtx prev = PREV_INSN (insn);
3891 /* Later in the code, the block will be marked dirty. */
3892 df_insn_delete (NULL, INSN_UID (insn));
3896 NEXT_INSN (prev) = next;
3897 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3899 rtx sequence = PATTERN (prev);
3900 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3903 else if (first_insn == insn)
3907 struct sequence_stack *stack = seq_stack;
3908 /* Scan all pending sequences too. */
3909 for (; stack; stack = stack->next)
3910 if (insn == stack->first)
3912 stack->first = next;
3921 PREV_INSN (next) = prev;
3922 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3923 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3925 else if (last_insn == insn)
3929 struct sequence_stack *stack = seq_stack;
3930 /* Scan all pending sequences too. */
3931 for (; stack; stack = stack->next)
3932 if (insn == stack->last)
3940 if (!BARRIER_P (insn)
3941 && (bb = BLOCK_FOR_INSN (insn)))
3944 df_set_bb_dirty (bb);
3945 if (BB_HEAD (bb) == insn)
3947 /* Never ever delete the basic block note without deleting whole
3949 gcc_assert (!NOTE_P (insn));
3950 BB_HEAD (bb) = next;
3952 if (BB_END (bb) == insn)
3957 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
3960 add_function_usage_to (rtx call_insn, rtx call_fusage)
3962 gcc_assert (call_insn && CALL_P (call_insn));
3964 /* Put the register usage information on the CALL. If there is already
3965 some usage information, put ours at the end. */
3966 if (CALL_INSN_FUNCTION_USAGE (call_insn))
3970 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
3971 link = XEXP (link, 1))
3974 XEXP (link, 1) = call_fusage;
3977 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
3980 /* Delete all insns made since FROM.
3981 FROM becomes the new last instruction. */
3984 delete_insns_since (rtx from)
3989 NEXT_INSN (from) = 0;
3993 /* This function is deprecated, please use sequences instead.
3995 Move a consecutive bunch of insns to a different place in the chain.
3996 The insns to be moved are those between FROM and TO.
3997 They are moved to a new position after the insn AFTER.
3998 AFTER must not be FROM or TO or any insn in between.
4000 This function does not know about SEQUENCEs and hence should not be
4001 called after delay-slot filling has been done. */
4004 reorder_insns_nobb (rtx from, rtx to, rtx after)
4006 /* Splice this bunch out of where it is now. */
4007 if (PREV_INSN (from))
4008 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4010 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4011 if (last_insn == to)
4012 last_insn = PREV_INSN (from);
4013 if (first_insn == from)
4014 first_insn = NEXT_INSN (to);
4016 /* Make the new neighbors point to it and it to them. */
4017 if (NEXT_INSN (after))
4018 PREV_INSN (NEXT_INSN (after)) = to;
4020 NEXT_INSN (to) = NEXT_INSN (after);
4021 PREV_INSN (from) = after;
4022 NEXT_INSN (after) = from;
4023 if (after == last_insn)
4027 /* Same as function above, but take care to update BB boundaries. */
4029 reorder_insns (rtx from, rtx to, rtx after)
4031 rtx prev = PREV_INSN (from);
4032 basic_block bb, bb2;
4034 reorder_insns_nobb (from, to, after);
4036 if (!BARRIER_P (after)
4037 && (bb = BLOCK_FOR_INSN (after)))
4040 df_set_bb_dirty (bb);
4042 if (!BARRIER_P (from)
4043 && (bb2 = BLOCK_FOR_INSN (from)))
4045 if (BB_END (bb2) == to)
4046 BB_END (bb2) = prev;
4047 df_set_bb_dirty (bb2);
4050 if (BB_END (bb) == after)
4053 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4055 df_insn_change_bb (x, bb);
4060 /* Emit insn(s) of given code and pattern
4061 at a specified place within the doubly-linked list.
4063 All of the emit_foo global entry points accept an object
4064 X which is either an insn list or a PATTERN of a single
4067 There are thus a few canonical ways to generate code and
4068 emit it at a specific place in the instruction stream. For
4069 example, consider the instruction named SPOT and the fact that
4070 we would like to emit some instructions before SPOT. We might
4074 ... emit the new instructions ...
4075 insns_head = get_insns ();
4078 emit_insn_before (insns_head, SPOT);
4080 It used to be common to generate SEQUENCE rtl instead, but that
4081 is a relic of the past which no longer occurs. The reason is that
4082 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4083 generated would almost certainly die right after it was created. */
4085 /* Make X be output before the instruction BEFORE. */
4088 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4093 gcc_assert (before);
4098 switch (GET_CODE (x))
4110 rtx next = NEXT_INSN (insn);
4111 add_insn_before (insn, before, bb);
4117 #ifdef ENABLE_RTL_CHECKING
4124 last = make_insn_raw (x);
4125 add_insn_before (last, before, bb);
4132 /* Make an instruction with body X and code JUMP_INSN
4133 and output it before the instruction BEFORE. */
4136 emit_jump_insn_before_noloc (rtx x, rtx before)
4138 rtx insn, last = NULL_RTX;
4140 gcc_assert (before);
4142 switch (GET_CODE (x))
4154 rtx next = NEXT_INSN (insn);
4155 add_insn_before (insn, before, NULL);
4161 #ifdef ENABLE_RTL_CHECKING
4168 last = make_jump_insn_raw (x);
4169 add_insn_before (last, before, NULL);
4176 /* Make an instruction with body X and code CALL_INSN
4177 and output it before the instruction BEFORE. */
4180 emit_call_insn_before_noloc (rtx x, rtx before)
4182 rtx last = NULL_RTX, insn;
4184 gcc_assert (before);
4186 switch (GET_CODE (x))
4198 rtx next = NEXT_INSN (insn);
4199 add_insn_before (insn, before, NULL);
4205 #ifdef ENABLE_RTL_CHECKING
4212 last = make_call_insn_raw (x);
4213 add_insn_before (last, before, NULL);
4220 /* Make an instruction with body X and code DEBUG_INSN
4221 and output it before the instruction BEFORE. */
4224 emit_debug_insn_before_noloc (rtx x, rtx before)
4226 rtx last = NULL_RTX, insn;
4228 gcc_assert (before);
4230 switch (GET_CODE (x))
4242 rtx next = NEXT_INSN (insn);
4243 add_insn_before (insn, before, NULL);
4249 #ifdef ENABLE_RTL_CHECKING
4256 last = make_debug_insn_raw (x);
4257 add_insn_before (last, before, NULL);
4264 /* Make an insn of code BARRIER
4265 and output it before the insn BEFORE. */
4268 emit_barrier_before (rtx before)
4270 rtx insn = rtx_alloc (BARRIER);
4272 INSN_UID (insn) = cur_insn_uid++;
4274 add_insn_before (insn, before, NULL);
4278 /* Emit the label LABEL before the insn BEFORE. */
4281 emit_label_before (rtx label, rtx before)
4283 /* This can be called twice for the same label as a result of the
4284 confusion that follows a syntax error! So make it harmless. */
4285 if (INSN_UID (label) == 0)
4287 INSN_UID (label) = cur_insn_uid++;
4288 add_insn_before (label, before, NULL);
4294 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4297 emit_note_before (enum insn_note subtype, rtx before)
4299 rtx note = rtx_alloc (NOTE);
4300 INSN_UID (note) = cur_insn_uid++;
4301 NOTE_KIND (note) = subtype;
4302 BLOCK_FOR_INSN (note) = NULL;
4303 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4305 add_insn_before (note, before, NULL);
4309 /* Helper for emit_insn_after, handles lists of instructions
4313 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4317 if (!bb && !BARRIER_P (after))
4318 bb = BLOCK_FOR_INSN (after);
4322 df_set_bb_dirty (bb);
4323 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4324 if (!BARRIER_P (last))
4326 set_block_for_insn (last, bb);
4327 df_insn_rescan (last);
4329 if (!BARRIER_P (last))
4331 set_block_for_insn (last, bb);
4332 df_insn_rescan (last);
4334 if (BB_END (bb) == after)
4338 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4341 after_after = NEXT_INSN (after);
4343 NEXT_INSN (after) = first;
4344 PREV_INSN (first) = after;
4345 NEXT_INSN (last) = after_after;
4347 PREV_INSN (after_after) = last;
4349 if (after == last_insn)
4355 /* Make X be output after the insn AFTER and set the BB of insn. If
4356 BB is NULL, an attempt is made to infer the BB from AFTER. */
4359 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4368 switch (GET_CODE (x))
4377 last = emit_insn_after_1 (x, after, bb);
4380 #ifdef ENABLE_RTL_CHECKING
4387 last = make_insn_raw (x);
4388 add_insn_after (last, after, bb);
4396 /* Make an insn of code JUMP_INSN with body X
4397 and output it after the insn AFTER. */
4400 emit_jump_insn_after_noloc (rtx x, rtx after)
4406 switch (GET_CODE (x))
4415 last = emit_insn_after_1 (x, after, NULL);
4418 #ifdef ENABLE_RTL_CHECKING
4425 last = make_jump_insn_raw (x);
4426 add_insn_after (last, after, NULL);
4433 /* Make an instruction with body X and code CALL_INSN
4434 and output it after the instruction AFTER. */
4437 emit_call_insn_after_noloc (rtx x, rtx after)
4443 switch (GET_CODE (x))
4452 last = emit_insn_after_1 (x, after, NULL);
4455 #ifdef ENABLE_RTL_CHECKING
4462 last = make_call_insn_raw (x);
4463 add_insn_after (last, after, NULL);
4470 /* Make an instruction with body X and code CALL_INSN
4471 and output it after the instruction AFTER. */
4474 emit_debug_insn_after_noloc (rtx x, rtx after)
4480 switch (GET_CODE (x))
4489 last = emit_insn_after_1 (x, after, NULL);
4492 #ifdef ENABLE_RTL_CHECKING
4499 last = make_debug_insn_raw (x);
4500 add_insn_after (last, after, NULL);
4507 /* Make an insn of code BARRIER
4508 and output it after the insn AFTER. */
4511 emit_barrier_after (rtx after)
4513 rtx insn = rtx_alloc (BARRIER);
4515 INSN_UID (insn) = cur_insn_uid++;
4517 add_insn_after (insn, after, NULL);
4521 /* Emit the label LABEL after the insn AFTER. */
4524 emit_label_after (rtx label, rtx after)
4526 /* This can be called twice for the same label
4527 as a result of the confusion that follows a syntax error!
4528 So make it harmless. */
4529 if (INSN_UID (label) == 0)
4531 INSN_UID (label) = cur_insn_uid++;
4532 add_insn_after (label, after, NULL);
4538 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4541 emit_note_after (enum insn_note subtype, rtx after)
4543 rtx note = rtx_alloc (NOTE);
4544 INSN_UID (note) = cur_insn_uid++;
4545 NOTE_KIND (note) = subtype;
4546 BLOCK_FOR_INSN (note) = NULL;
4547 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4548 add_insn_after (note, after, NULL);
4552 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4554 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4556 rtx last = emit_insn_after_noloc (pattern, after, NULL);
4558 if (pattern == NULL_RTX || !loc)
4561 after = NEXT_INSN (after);
4564 if (active_insn_p (after) && !INSN_LOCATOR (after))
4565 INSN_LOCATOR (after) = loc;
4568 after = NEXT_INSN (after);
4573 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4575 emit_insn_after (rtx pattern, rtx after)
4579 while (DEBUG_INSN_P (prev))
4580 prev = PREV_INSN (prev);
4583 return emit_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4585 return emit_insn_after_noloc (pattern, after, NULL);
4588 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4590 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4592 rtx last = emit_jump_insn_after_noloc (pattern, after);
4594 if (pattern == NULL_RTX || !loc)
4597 after = NEXT_INSN (after);
4600 if (active_insn_p (after) && !INSN_LOCATOR (after))
4601 INSN_LOCATOR (after) = loc;
4604 after = NEXT_INSN (after);
4609 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4611 emit_jump_insn_after (rtx pattern, rtx after)
4615 while (DEBUG_INSN_P (prev))
4616 prev = PREV_INSN (prev);
4619 return emit_jump_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4621 return emit_jump_insn_after_noloc (pattern, after);
4624 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4626 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4628 rtx last = emit_call_insn_after_noloc (pattern, after);
4630 if (pattern == NULL_RTX || !loc)
4633 after = NEXT_INSN (after);
4636 if (active_insn_p (after) && !INSN_LOCATOR (after))
4637 INSN_LOCATOR (after) = loc;
4640 after = NEXT_INSN (after);
4645 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4647 emit_call_insn_after (rtx pattern, rtx after)
4651 while (DEBUG_INSN_P (prev))
4652 prev = PREV_INSN (prev);
4655 return emit_call_insn_after_setloc (pattern, after, INSN_LOCATOR (prev));
4657 return emit_call_insn_after_noloc (pattern, after);
4660 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to SCOPE. */
4662 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4664 rtx last = emit_debug_insn_after_noloc (pattern, after);
4666 if (pattern == NULL_RTX || !loc)
4669 after = NEXT_INSN (after);
4672 if (active_insn_p (after) && !INSN_LOCATOR (after))
4673 INSN_LOCATOR (after) = loc;
4676 after = NEXT_INSN (after);
4681 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4683 emit_debug_insn_after (rtx pattern, rtx after)
4686 return emit_debug_insn_after_setloc (pattern, after, INSN_LOCATOR (after));
4688 return emit_debug_insn_after_noloc (pattern, after);
4691 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to SCOPE. */
4693 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4695 rtx first = PREV_INSN (before);
4696 rtx last = emit_insn_before_noloc (pattern, before, NULL);
4698 if (pattern == NULL_RTX || !loc)
4702 first = get_insns ();
4704 first = NEXT_INSN (first);
4707 if (active_insn_p (first) && !INSN_LOCATOR (first))
4708 INSN_LOCATOR (first) = loc;
4711 first = NEXT_INSN (first);
4716 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4718 emit_insn_before (rtx pattern, rtx before)
4722 while (DEBUG_INSN_P (next))
4723 next = PREV_INSN (next);
4726 return emit_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4728 return emit_insn_before_noloc (pattern, before, NULL);
4731 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4733 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4735 rtx first = PREV_INSN (before);
4736 rtx last = emit_jump_insn_before_noloc (pattern, before);
4738 if (pattern == NULL_RTX)
4741 first = NEXT_INSN (first);
4744 if (active_insn_p (first) && !INSN_LOCATOR (first))
4745 INSN_LOCATOR (first) = loc;
4748 first = NEXT_INSN (first);
4753 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4755 emit_jump_insn_before (rtx pattern, rtx before)
4759 while (DEBUG_INSN_P (next))
4760 next = PREV_INSN (next);
4763 return emit_jump_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4765 return emit_jump_insn_before_noloc (pattern, before);
4768 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4770 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4772 rtx first = PREV_INSN (before);
4773 rtx last = emit_call_insn_before_noloc (pattern, before);
4775 if (pattern == NULL_RTX)
4778 first = NEXT_INSN (first);
4781 if (active_insn_p (first) && !INSN_LOCATOR (first))
4782 INSN_LOCATOR (first) = loc;
4785 first = NEXT_INSN (first);
4790 /* like emit_call_insn_before_noloc,
4791 but set insn_locator according to before. */
4793 emit_call_insn_before (rtx pattern, rtx before)
4797 while (DEBUG_INSN_P (next))
4798 next = PREV_INSN (next);
4801 return emit_call_insn_before_setloc (pattern, before, INSN_LOCATOR (next));
4803 return emit_call_insn_before_noloc (pattern, before);
4806 /* like emit_insn_before_noloc, but set insn_locator according to scope. */
4808 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4810 rtx first = PREV_INSN (before);
4811 rtx last = emit_debug_insn_before_noloc (pattern, before);
4813 if (pattern == NULL_RTX)
4816 first = NEXT_INSN (first);
4819 if (active_insn_p (first) && !INSN_LOCATOR (first))
4820 INSN_LOCATOR (first) = loc;
4823 first = NEXT_INSN (first);
4828 /* like emit_debug_insn_before_noloc,
4829 but set insn_locator according to before. */
4831 emit_debug_insn_before (rtx pattern, rtx before)
4833 if (INSN_P (before))
4834 return emit_debug_insn_before_setloc (pattern, before, INSN_LOCATOR (before));
4836 return emit_debug_insn_before_noloc (pattern, before);
4839 /* Take X and emit it at the end of the doubly-linked
4842 Returns the last insn emitted. */
4847 rtx last = last_insn;
4853 switch (GET_CODE (x))
4865 rtx next = NEXT_INSN (insn);
4872 #ifdef ENABLE_RTL_CHECKING
4879 last = make_insn_raw (x);
4887 /* Make an insn of code DEBUG_INSN with pattern X
4888 and add it to the end of the doubly-linked list. */
4891 emit_debug_insn (rtx x)
4893 rtx last = last_insn;
4899 switch (GET_CODE (x))
4911 rtx next = NEXT_INSN (insn);
4918 #ifdef ENABLE_RTL_CHECKING
4925 last = make_debug_insn_raw (x);
4933 /* Make an insn of code JUMP_INSN with pattern X
4934 and add it to the end of the doubly-linked list. */
4937 emit_jump_insn (rtx x)
4939 rtx last = NULL_RTX, insn;
4941 switch (GET_CODE (x))
4953 rtx next = NEXT_INSN (insn);
4960 #ifdef ENABLE_RTL_CHECKING
4967 last = make_jump_insn_raw (x);
4975 /* Make an insn of code CALL_INSN with pattern X
4976 and add it to the end of the doubly-linked list. */
4979 emit_call_insn (rtx x)
4983 switch (GET_CODE (x))
4992 insn = emit_insn (x);
4995 #ifdef ENABLE_RTL_CHECKING
5002 insn = make_call_insn_raw (x);
5010 /* Add the label LABEL to the end of the doubly-linked list. */
5013 emit_label (rtx label)
5015 /* This can be called twice for the same label
5016 as a result of the confusion that follows a syntax error!
5017 So make it harmless. */
5018 if (INSN_UID (label) == 0)
5020 INSN_UID (label) = cur_insn_uid++;
5026 /* Make an insn of code BARRIER
5027 and add it to the end of the doubly-linked list. */
5032 rtx barrier = rtx_alloc (BARRIER);
5033 INSN_UID (barrier) = cur_insn_uid++;
5038 /* Emit a copy of note ORIG. */
5041 emit_note_copy (rtx orig)
5045 note = rtx_alloc (NOTE);
5047 INSN_UID (note) = cur_insn_uid++;
5048 NOTE_DATA (note) = NOTE_DATA (orig);
5049 NOTE_KIND (note) = NOTE_KIND (orig);
5050 BLOCK_FOR_INSN (note) = NULL;
5056 /* Make an insn of code NOTE or type NOTE_NO
5057 and add it to the end of the doubly-linked list. */
5060 emit_note (enum insn_note kind)
5064 note = rtx_alloc (NOTE);
5065 INSN_UID (note) = cur_insn_uid++;
5066 NOTE_KIND (note) = kind;
5067 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
5068 BLOCK_FOR_INSN (note) = NULL;
5073 /* Emit a clobber of lvalue X. */
5076 emit_clobber (rtx x)
5078 /* CONCATs should not appear in the insn stream. */
5079 if (GET_CODE (x) == CONCAT)
5081 emit_clobber (XEXP (x, 0));
5082 return emit_clobber (XEXP (x, 1));
5084 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
5087 /* Return a sequence of insns to clobber lvalue X. */
5101 /* Emit a use of rvalue X. */
5106 /* CONCATs should not appear in the insn stream. */
5107 if (GET_CODE (x) == CONCAT)
5109 emit_use (XEXP (x, 0));
5110 return emit_use (XEXP (x, 1));
5112 return emit_insn (gen_rtx_USE (VOIDmode, x));
5115 /* Return a sequence of insns to use rvalue X. */
5129 /* Cause next statement to emit a line note even if the line number
5133 force_next_line_note (void)
5138 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
5139 note of this type already exists, remove it first. */
5142 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
5144 rtx note = find_reg_note (insn, kind, NULL_RTX);
5150 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
5151 has multiple sets (some callers assume single_set
5152 means the insn only has one set, when in fact it
5153 means the insn only has one * useful * set). */
5154 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
5160 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
5161 It serves no useful purpose and breaks eliminate_regs. */
5162 if (GET_CODE (datum) == ASM_OPERANDS)
5167 XEXP (note, 0) = datum;
5168 df_notes_rescan (insn);
5176 XEXP (note, 0) = datum;
5182 add_reg_note (insn, kind, datum);
5188 df_notes_rescan (insn);
5194 return REG_NOTES (insn);
5197 /* Return an indication of which type of insn should have X as a body.
5198 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5200 static enum rtx_code
5201 classify_insn (rtx x)
5205 if (GET_CODE (x) == CALL)
5207 if (GET_CODE (x) == RETURN)
5209 if (GET_CODE (x) == SET)
5211 if (SET_DEST (x) == pc_rtx)
5213 else if (GET_CODE (SET_SRC (x)) == CALL)
5218 if (GET_CODE (x) == PARALLEL)
5221 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5222 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5224 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5225 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5227 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5228 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5234 /* Emit the rtl pattern X as an appropriate kind of insn.
5235 If X is a label, it is simply added into the insn chain. */
5240 enum rtx_code code = classify_insn (x);
5245 return emit_label (x);
5247 return emit_insn (x);
5250 rtx insn = emit_jump_insn (x);
5251 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5252 return emit_barrier ();
5256 return emit_call_insn (x);
5258 return emit_debug_insn (x);
5264 /* Space for free sequence stack entries. */
5265 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5267 /* Begin emitting insns to a sequence. If this sequence will contain
5268 something that might cause the compiler to pop arguments to function
5269 calls (because those pops have previously been deferred; see
5270 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5271 before calling this function. That will ensure that the deferred
5272 pops are not accidentally emitted in the middle of this sequence. */
5275 start_sequence (void)
5277 struct sequence_stack *tem;
5279 if (free_sequence_stack != NULL)
5281 tem = free_sequence_stack;
5282 free_sequence_stack = tem->next;
5285 tem = GGC_NEW (struct sequence_stack);
5287 tem->next = seq_stack;
5288 tem->first = first_insn;
5289 tem->last = last_insn;
5297 /* Set up the insn chain starting with FIRST as the current sequence,
5298 saving the previously current one. See the documentation for
5299 start_sequence for more information about how to use this function. */
5302 push_to_sequence (rtx first)
5308 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
5314 /* Like push_to_sequence, but take the last insn as an argument to avoid
5315 looping through the list. */
5318 push_to_sequence2 (rtx first, rtx last)
5326 /* Set up the outer-level insn chain
5327 as the current sequence, saving the previously current one. */
5330 push_topmost_sequence (void)
5332 struct sequence_stack *stack, *top = NULL;
5336 for (stack = seq_stack; stack; stack = stack->next)
5339 first_insn = top->first;
5340 last_insn = top->last;
5343 /* After emitting to the outer-level insn chain, update the outer-level
5344 insn chain, and restore the previous saved state. */
5347 pop_topmost_sequence (void)
5349 struct sequence_stack *stack, *top = NULL;
5351 for (stack = seq_stack; stack; stack = stack->next)
5354 top->first = first_insn;
5355 top->last = last_insn;
5360 /* After emitting to a sequence, restore previous saved state.
5362 To get the contents of the sequence just made, you must call
5363 `get_insns' *before* calling here.
5365 If the compiler might have deferred popping arguments while
5366 generating this sequence, and this sequence will not be immediately
5367 inserted into the instruction stream, use do_pending_stack_adjust
5368 before calling get_insns. That will ensure that the deferred
5369 pops are inserted into this sequence, and not into some random
5370 location in the instruction stream. See INHIBIT_DEFER_POP for more
5371 information about deferred popping of arguments. */
5376 struct sequence_stack *tem = seq_stack;
5378 first_insn = tem->first;
5379 last_insn = tem->last;
5380 seq_stack = tem->next;
5382 memset (tem, 0, sizeof (*tem));
5383 tem->next = free_sequence_stack;
5384 free_sequence_stack = tem;
5387 /* Return 1 if currently emitting into a sequence. */
5390 in_sequence_p (void)
5392 return seq_stack != 0;
5395 /* Put the various virtual registers into REGNO_REG_RTX. */
5398 init_virtual_regs (void)
5400 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5401 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5402 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5403 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5404 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5408 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5409 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5410 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5411 static int copy_insn_n_scratches;
5413 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5414 copied an ASM_OPERANDS.
5415 In that case, it is the original input-operand vector. */
5416 static rtvec orig_asm_operands_vector;
5418 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5419 copied an ASM_OPERANDS.
5420 In that case, it is the copied input-operand vector. */
5421 static rtvec copy_asm_operands_vector;
5423 /* Likewise for the constraints vector. */
5424 static rtvec orig_asm_constraints_vector;
5425 static rtvec copy_asm_constraints_vector;
5427 /* Recursively create a new copy of an rtx for copy_insn.
5428 This function differs from copy_rtx in that it handles SCRATCHes and
5429 ASM_OPERANDs properly.
5430 Normally, this function is not used directly; use copy_insn as front end.
5431 However, you could first copy an insn pattern with copy_insn and then use
5432 this function afterwards to properly copy any REG_NOTEs containing
5436 copy_insn_1 (rtx orig)
5441 const char *format_ptr;
5446 code = GET_CODE (orig);
5461 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5466 for (i = 0; i < copy_insn_n_scratches; i++)
5467 if (copy_insn_scratch_in[i] == orig)
5468 return copy_insn_scratch_out[i];
5472 if (shared_const_p (orig))
5476 /* A MEM with a constant address is not sharable. The problem is that
5477 the constant address may need to be reloaded. If the mem is shared,
5478 then reloading one copy of this mem will cause all copies to appear
5479 to have been reloaded. */
5485 /* Copy the various flags, fields, and other information. We assume
5486 that all fields need copying, and then clear the fields that should
5487 not be copied. That is the sensible default behavior, and forces
5488 us to explicitly document why we are *not* copying a flag. */
5489 copy = shallow_copy_rtx (orig);
5491 /* We do not copy the USED flag, which is used as a mark bit during
5492 walks over the RTL. */
5493 RTX_FLAG (copy, used) = 0;
5495 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5498 RTX_FLAG (copy, jump) = 0;
5499 RTX_FLAG (copy, call) = 0;
5500 RTX_FLAG (copy, frame_related) = 0;
5503 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5505 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5506 switch (*format_ptr++)
5509 if (XEXP (orig, i) != NULL)
5510 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5515 if (XVEC (orig, i) == orig_asm_constraints_vector)
5516 XVEC (copy, i) = copy_asm_constraints_vector;
5517 else if (XVEC (orig, i) == orig_asm_operands_vector)
5518 XVEC (copy, i) = copy_asm_operands_vector;
5519 else if (XVEC (orig, i) != NULL)
5521 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5522 for (j = 0; j < XVECLEN (copy, i); j++)
5523 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5534 /* These are left unchanged. */
5541 if (code == SCRATCH)
5543 i = copy_insn_n_scratches++;
5544 gcc_assert (i < MAX_RECOG_OPERANDS);
5545 copy_insn_scratch_in[i] = orig;
5546 copy_insn_scratch_out[i] = copy;
5548 else if (code == ASM_OPERANDS)
5550 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5551 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5552 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5553 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5559 /* Create a new copy of an rtx.
5560 This function differs from copy_rtx in that it handles SCRATCHes and
5561 ASM_OPERANDs properly.
5562 INSN doesn't really have to be a full INSN; it could be just the
5565 copy_insn (rtx insn)
5567 copy_insn_n_scratches = 0;
5568 orig_asm_operands_vector = 0;
5569 orig_asm_constraints_vector = 0;
5570 copy_asm_operands_vector = 0;
5571 copy_asm_constraints_vector = 0;
5572 return copy_insn_1 (insn);
5575 /* Initialize data structures and variables in this file
5576 before generating rtl for each function. */
5583 if (MIN_NONDEBUG_INSN_UID)
5584 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5587 cur_debug_insn_uid = 1;
5588 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5589 last_location = UNKNOWN_LOCATION;
5590 first_label_num = label_num;
5593 /* Init the tables that describe all the pseudo regs. */
5595 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5597 crtl->emit.regno_pointer_align
5598 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5601 = GGC_NEWVEC (rtx, crtl->emit.regno_pointer_align_length);
5603 /* Put copies of all the hard registers into regno_reg_rtx. */
5604 memcpy (regno_reg_rtx,
5605 static_regno_reg_rtx,
5606 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5608 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5609 init_virtual_regs ();
5611 /* Indicate that the virtual registers and stack locations are
5613 REG_POINTER (stack_pointer_rtx) = 1;
5614 REG_POINTER (frame_pointer_rtx) = 1;
5615 REG_POINTER (hard_frame_pointer_rtx) = 1;
5616 REG_POINTER (arg_pointer_rtx) = 1;
5618 REG_POINTER (virtual_incoming_args_rtx) = 1;
5619 REG_POINTER (virtual_stack_vars_rtx) = 1;
5620 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5621 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5622 REG_POINTER (virtual_cfa_rtx) = 1;
5624 #ifdef STACK_BOUNDARY
5625 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5626 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5627 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5628 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5630 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5631 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5632 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5633 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5634 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5637 #ifdef INIT_EXPANDERS
5642 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5645 gen_const_vector (enum machine_mode mode, int constant)
5650 enum machine_mode inner;
5652 units = GET_MODE_NUNITS (mode);
5653 inner = GET_MODE_INNER (mode);
5655 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5657 v = rtvec_alloc (units);
5659 /* We need to call this function after we set the scalar const_tiny_rtx
5661 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5663 for (i = 0; i < units; ++i)
5664 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5666 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5670 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5671 all elements are zero, and the one vector when all elements are one. */
5673 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5675 enum machine_mode inner = GET_MODE_INNER (mode);
5676 int nunits = GET_MODE_NUNITS (mode);
5680 /* Check to see if all of the elements have the same value. */
5681 x = RTVEC_ELT (v, nunits - 1);
5682 for (i = nunits - 2; i >= 0; i--)
5683 if (RTVEC_ELT (v, i) != x)
5686 /* If the values are all the same, check to see if we can use one of the
5687 standard constant vectors. */
5690 if (x == CONST0_RTX (inner))
5691 return CONST0_RTX (mode);
5692 else if (x == CONST1_RTX (inner))
5693 return CONST1_RTX (mode);
5696 return gen_rtx_raw_CONST_VECTOR (mode, v);
5699 /* Initialise global register information required by all functions. */
5702 init_emit_regs (void)
5706 /* Reset register attributes */
5707 htab_empty (reg_attrs_htab);
5709 /* We need reg_raw_mode, so initialize the modes now. */
5710 init_reg_modes_target ();
5712 /* Assign register numbers to the globally defined register rtx. */
5713 pc_rtx = gen_rtx_PC (VOIDmode);
5714 cc0_rtx = gen_rtx_CC0 (VOIDmode);
5715 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5716 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5717 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5718 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5719 virtual_incoming_args_rtx =
5720 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5721 virtual_stack_vars_rtx =
5722 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5723 virtual_stack_dynamic_rtx =
5724 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5725 virtual_outgoing_args_rtx =
5726 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5727 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5729 /* Initialize RTL for commonly used hard registers. These are
5730 copied into regno_reg_rtx as we begin to compile each function. */
5731 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5732 static_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5734 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5735 return_address_pointer_rtx
5736 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5739 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5740 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5742 pic_offset_table_rtx = NULL_RTX;
5745 /* Create some permanent unique rtl objects shared between all functions. */
5748 init_emit_once (void)
5751 enum machine_mode mode;
5752 enum machine_mode double_mode;
5754 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5756 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5757 const_int_htab_eq, NULL);
5759 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5760 const_double_htab_eq, NULL);
5762 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5763 const_fixed_htab_eq, NULL);
5765 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5766 mem_attrs_htab_eq, NULL);
5767 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5768 reg_attrs_htab_eq, NULL);
5770 /* Compute the word and byte modes. */
5772 byte_mode = VOIDmode;
5773 word_mode = VOIDmode;
5774 double_mode = VOIDmode;
5776 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5778 mode = GET_MODE_WIDER_MODE (mode))
5780 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5781 && byte_mode == VOIDmode)
5784 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5785 && word_mode == VOIDmode)
5789 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5791 mode = GET_MODE_WIDER_MODE (mode))
5793 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5794 && double_mode == VOIDmode)
5798 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5800 #ifdef INIT_EXPANDERS
5801 /* This is to initialize {init|mark|free}_machine_status before the first
5802 call to push_function_context_to. This is needed by the Chill front
5803 end which calls push_function_context_to before the first call to
5804 init_function_start. */
5808 /* Create the unique rtx's for certain rtx codes and operand values. */
5810 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5811 tries to use these variables. */
5812 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5813 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5814 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5816 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5817 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5818 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5820 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5822 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5823 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5824 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5829 dconsthalf = dconst1;
5830 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5832 for (i = 0; i < (int) ARRAY_SIZE (const_tiny_rtx); i++)
5834 const REAL_VALUE_TYPE *const r =
5835 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5837 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5839 mode = GET_MODE_WIDER_MODE (mode))
5840 const_tiny_rtx[i][(int) mode] =
5841 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5843 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5845 mode = GET_MODE_WIDER_MODE (mode))
5846 const_tiny_rtx[i][(int) mode] =
5847 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5849 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5851 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5853 mode = GET_MODE_WIDER_MODE (mode))
5854 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5856 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5858 mode = GET_MODE_WIDER_MODE (mode))
5859 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5862 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5864 mode = GET_MODE_WIDER_MODE (mode))
5866 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5867 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5870 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5872 mode = GET_MODE_WIDER_MODE (mode))
5874 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5875 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5878 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5880 mode = GET_MODE_WIDER_MODE (mode))
5882 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5883 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5886 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5888 mode = GET_MODE_WIDER_MODE (mode))
5890 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5891 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5894 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5896 mode = GET_MODE_WIDER_MODE (mode))
5898 FCONST0(mode).data.high = 0;
5899 FCONST0(mode).data.low = 0;
5900 FCONST0(mode).mode = mode;
5901 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5902 FCONST0 (mode), mode);
5905 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5907 mode = GET_MODE_WIDER_MODE (mode))
5909 FCONST0(mode).data.high = 0;
5910 FCONST0(mode).data.low = 0;
5911 FCONST0(mode).mode = mode;
5912 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5913 FCONST0 (mode), mode);
5916 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5918 mode = GET_MODE_WIDER_MODE (mode))
5920 FCONST0(mode).data.high = 0;
5921 FCONST0(mode).data.low = 0;
5922 FCONST0(mode).mode = mode;
5923 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5924 FCONST0 (mode), mode);
5926 /* We store the value 1. */
5927 FCONST1(mode).data.high = 0;
5928 FCONST1(mode).data.low = 0;
5929 FCONST1(mode).mode = mode;
5930 lshift_double (1, 0, GET_MODE_FBIT (mode),
5931 2 * HOST_BITS_PER_WIDE_INT,
5932 &FCONST1(mode).data.low,
5933 &FCONST1(mode).data.high,
5934 SIGNED_FIXED_POINT_MODE_P (mode));
5935 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5936 FCONST1 (mode), mode);
5939 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5941 mode = GET_MODE_WIDER_MODE (mode))
5943 FCONST0(mode).data.high = 0;
5944 FCONST0(mode).data.low = 0;
5945 FCONST0(mode).mode = mode;
5946 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5947 FCONST0 (mode), mode);
5949 /* We store the value 1. */
5950 FCONST1(mode).data.high = 0;
5951 FCONST1(mode).data.low = 0;
5952 FCONST1(mode).mode = mode;
5953 lshift_double (1, 0, GET_MODE_FBIT (mode),
5954 2 * HOST_BITS_PER_WIDE_INT,
5955 &FCONST1(mode).data.low,
5956 &FCONST1(mode).data.high,
5957 SIGNED_FIXED_POINT_MODE_P (mode));
5958 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5959 FCONST1 (mode), mode);
5962 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5964 mode = GET_MODE_WIDER_MODE (mode))
5966 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5969 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5971 mode = GET_MODE_WIDER_MODE (mode))
5973 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5976 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5978 mode = GET_MODE_WIDER_MODE (mode))
5980 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5981 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5984 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5986 mode = GET_MODE_WIDER_MODE (mode))
5988 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5989 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5992 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5993 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5994 const_tiny_rtx[0][i] = const0_rtx;
5996 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5997 if (STORE_FLAG_VALUE == 1)
5998 const_tiny_rtx[1][(int) BImode] = const1_rtx;
6001 /* Produce exact duplicate of insn INSN after AFTER.
6002 Care updating of libcall regions if present. */
6005 emit_copy_of_insn_after (rtx insn, rtx after)
6009 switch (GET_CODE (insn))
6012 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
6016 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
6020 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
6024 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
6025 if (CALL_INSN_FUNCTION_USAGE (insn))
6026 CALL_INSN_FUNCTION_USAGE (new_rtx)
6027 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
6028 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
6029 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
6030 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
6031 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
6032 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
6039 /* Update LABEL_NUSES. */
6040 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
6042 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
6044 /* If the old insn is frame related, then so is the new one. This is
6045 primarily needed for IA-64 unwind info which marks epilogue insns,
6046 which may be duplicated by the basic block reordering code. */
6047 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
6049 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
6050 will make them. REG_LABEL_TARGETs are created there too, but are
6051 supposed to be sticky, so we copy them. */
6052 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
6053 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
6055 if (GET_CODE (link) == EXPR_LIST)
6056 add_reg_note (new_rtx, REG_NOTE_KIND (link),
6057 copy_insn_1 (XEXP (link, 0)));
6059 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
6062 INSN_CODE (new_rtx) = INSN_CODE (insn);
6066 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
6068 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
6070 if (hard_reg_clobbers[mode][regno])
6071 return hard_reg_clobbers[mode][regno];
6073 return (hard_reg_clobbers[mode][regno] =
6074 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
6077 #include "gt-emit-rtl.h"