1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
59 /* Commonly used modes. */
61 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
62 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
63 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
64 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
67 /* This is *not* reset after each function. It gives each CODE_LABEL
68 in the entire compilation a unique label number. */
70 static int label_num = 1;
72 /* Highest label number in current function.
73 Zero means use the value of label_num instead.
74 This is nonzero only when belatedly compiling an inline function. */
76 static int last_label_num;
78 /* Value label_num had when set_new_first_and_last_label_number was called.
79 If label_num has not changed since then, last_label_num is valid. */
81 static int base_label_num;
83 /* Nonzero means do not generate NOTEs for source line numbers. */
85 static int no_line_numbers;
87 /* Commonly used rtx's, so that we only need space for one copy.
88 These are initialized once for the entire compilation.
89 All of these except perhaps the floating-point CONST_DOUBLEs
90 are unique; no other rtx-object will be equal to any of these. */
92 rtx global_rtl[GR_MAX];
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx. */
98 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
102 REAL_VALUE_TYPE dconst0;
103 REAL_VALUE_TYPE dconst1;
104 REAL_VALUE_TYPE dconst2;
105 REAL_VALUE_TYPE dconstm1;
107 /* All references to the following fixed hard registers go through
108 these unique rtl objects. On machines where the frame-pointer and
109 arg-pointer are the same register, they use the same unique object.
111 After register allocation, other rtl objects which used to be pseudo-regs
112 may be clobbered to refer to the frame-pointer register.
113 But references that were originally to the frame-pointer can be
114 distinguished from the others because they contain frame_pointer_rtx.
116 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
117 tricky: until register elimination has taken place hard_frame_pointer_rtx
118 should be used if it is being set, and frame_pointer_rtx otherwise. After
119 register elimination hard_frame_pointer_rtx should always be used.
120 On machines where the two registers are same (most) then these are the
123 In an inline procedure, the stack and frame pointer rtxs may not be
124 used for anything else. */
125 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
126 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
127 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
128 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
129 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
131 /* This is used to implement __builtin_return_address for some machines.
132 See for instance the MIPS port. */
133 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
135 /* We make one copy of (const_int C) where C is in
136 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
137 to save space during the compilation and simplify comparisons of
140 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
142 /* A hash table storing CONST_INTs whose absolute value is greater
143 than MAX_SAVED_CONST_INT. */
145 static htab_t const_int_htab;
147 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
148 shortly thrown away. We use two mechanisms to prevent this waste:
150 For sizes up to 5 elements, we keep a SEQUENCE and its associated
151 rtvec for use by gen_sequence. One entry for each size is
152 sufficient because most cases are calls to gen_sequence followed by
153 immediately emitting the SEQUENCE. Reuse is safe since emitting a
154 sequence is destructive on the insn in it anyway and hence can't be
157 We do not bother to save this cached data over nested function calls.
158 Instead, we just reinitialize them. */
160 #define SEQUENCE_RESULT_SIZE 5
162 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
164 /* During RTL generation, we also keep a list of free INSN rtl codes. */
165 static rtx free_insn;
167 #define first_insn (cfun->emit->x_first_insn)
168 #define last_insn (cfun->emit->x_last_insn)
169 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
170 #define last_linenum (cfun->emit->x_last_linenum)
171 #define last_filename (cfun->emit->x_last_filename)
172 #define first_label_num (cfun->emit->x_first_label_num)
174 static rtx make_jump_insn_raw PARAMS ((rtx));
175 static rtx make_call_insn_raw PARAMS ((rtx));
176 static rtx find_line_note PARAMS ((rtx));
177 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
178 static void unshare_all_rtl_1 PARAMS ((rtx));
179 static void unshare_all_decls PARAMS ((tree));
180 static void reset_used_decls PARAMS ((tree));
181 static hashval_t const_int_htab_hash PARAMS ((const void *));
182 static int const_int_htab_eq PARAMS ((const void *,
184 static int rtx_htab_mark_1 PARAMS ((void **, void *));
185 static void rtx_htab_mark PARAMS ((void *));
188 /* Returns a hash code for X (which is a really a CONST_INT). */
191 const_int_htab_hash (x)
194 return (hashval_t) INTVAL ((const struct rtx_def *) x);
197 /* Returns non-zero if the value represented by X (which is really a
198 CONST_INT) is the same as that given by Y (which is really a
202 const_int_htab_eq (x, y)
206 return (INTVAL ((const struct rtx_def *) x) == *((const HOST_WIDE_INT *) y));
209 /* Mark the hash-table element X (which is really a pointer to an
213 rtx_htab_mark_1 (x, data)
215 void *data ATTRIBUTE_UNUSED;
221 /* Mark all the elements of HTAB (which is really an htab_t full of
228 htab_traverse (*((htab_t *) htab), rtx_htab_mark_1, NULL);
231 /* There are some RTL codes that require special attention; the generation
232 functions do the raw handling. If you add to this list, modify
233 special_rtx in gengenrtl.c as well. */
236 gen_rtx_CONST_INT (mode, arg)
237 enum machine_mode mode ATTRIBUTE_UNUSED;
242 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
243 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
245 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
246 if (const_true_rtx && arg == STORE_FLAG_VALUE)
247 return const_true_rtx;
250 /* Look up the CONST_INT in the hash table. */
251 slot = htab_find_slot_with_hash (const_int_htab, &arg,
252 (hashval_t) arg, INSERT);
254 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
259 /* CONST_DOUBLEs needs special handling because their length is known
263 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
264 enum machine_mode mode;
266 HOST_WIDE_INT arg1, arg2;
268 rtx r = rtx_alloc (CONST_DOUBLE);
273 X0EXP (r, 1) = NULL_RTX;
277 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
284 gen_rtx_REG (mode, regno)
285 enum machine_mode mode;
288 /* In case the MD file explicitly references the frame pointer, have
289 all such references point to the same frame pointer. This is
290 used during frame pointer elimination to distinguish the explicit
291 references to these registers from pseudos that happened to be
294 If we have eliminated the frame pointer or arg pointer, we will
295 be using it as a normal register, for example as a spill
296 register. In such cases, we might be accessing it in a mode that
297 is not Pmode and therefore cannot use the pre-allocated rtx.
299 Also don't do this when we are making new REGs in reload, since
300 we don't want to get confused with the real pointers. */
302 if (mode == Pmode && !reload_in_progress)
304 if (regno == FRAME_POINTER_REGNUM)
305 return frame_pointer_rtx;
306 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
307 if (regno == HARD_FRAME_POINTER_REGNUM)
308 return hard_frame_pointer_rtx;
310 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
311 if (regno == ARG_POINTER_REGNUM)
312 return arg_pointer_rtx;
314 #ifdef RETURN_ADDRESS_POINTER_REGNUM
315 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
316 return return_address_pointer_rtx;
318 if (regno == STACK_POINTER_REGNUM)
319 return stack_pointer_rtx;
322 return gen_rtx_raw_REG (mode, regno);
326 gen_rtx_MEM (mode, addr)
327 enum machine_mode mode;
330 rtx rt = gen_rtx_raw_MEM (mode, addr);
332 /* This field is not cleared by the mere allocation of the rtx, so
334 MEM_ALIAS_SET (rt) = 0;
339 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
341 ** This routine generates an RTX of the size specified by
342 ** <code>, which is an RTX code. The RTX structure is initialized
343 ** from the arguments <element1> through <elementn>, which are
344 ** interpreted according to the specific RTX type's format. The
345 ** special machine mode associated with the rtx (if any) is specified
348 ** gen_rtx can be invoked in a way which resembles the lisp-like
349 ** rtx it will generate. For example, the following rtx structure:
351 ** (plus:QI (mem:QI (reg:SI 1))
352 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
354 ** ...would be generated by the following C code:
356 ** gen_rtx (PLUS, QImode,
357 ** gen_rtx (MEM, QImode,
358 ** gen_rtx (REG, SImode, 1)),
359 ** gen_rtx (MEM, QImode,
360 ** gen_rtx (PLUS, SImode,
361 ** gen_rtx (REG, SImode, 2),
362 ** gen_rtx (REG, SImode, 3)))),
367 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
369 #ifndef ANSI_PROTOTYPES
371 enum machine_mode mode;
374 register int i; /* Array indices... */
375 register const char *fmt; /* Current rtx's format... */
376 register rtx rt_val; /* RTX to return to caller... */
380 #ifndef ANSI_PROTOTYPES
381 code = va_arg (p, enum rtx_code);
382 mode = va_arg (p, enum machine_mode);
388 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
393 rtx arg0 = va_arg (p, rtx);
394 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
395 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
396 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
401 rt_val = gen_rtx_REG (mode, va_arg (p, int));
405 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
409 rt_val = rtx_alloc (code); /* Allocate the storage space. */
410 rt_val->mode = mode; /* Store the machine mode... */
412 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
413 for (i = 0; i < GET_RTX_LENGTH (code); i++)
417 case '0': /* Unused field. */
420 case 'i': /* An integer? */
421 XINT (rt_val, i) = va_arg (p, int);
424 case 'w': /* A wide integer? */
425 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
428 case 's': /* A string? */
429 XSTR (rt_val, i) = va_arg (p, char *);
432 case 'e': /* An expression? */
433 case 'u': /* An insn? Same except when printing. */
434 XEXP (rt_val, i) = va_arg (p, rtx);
437 case 'E': /* An RTX vector? */
438 XVEC (rt_val, i) = va_arg (p, rtvec);
441 case 'b': /* A bitmap? */
442 XBITMAP (rt_val, i) = va_arg (p, bitmap);
445 case 't': /* A tree? */
446 XTREE (rt_val, i) = va_arg (p, tree);
460 /* gen_rtvec (n, [rt1, ..., rtn])
462 ** This routine creates an rtvec and stores within it the
463 ** pointers to rtx's which are its arguments.
468 gen_rtvec VPARAMS ((int n, ...))
470 #ifndef ANSI_PROTOTYPES
479 #ifndef ANSI_PROTOTYPES
484 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
486 vector = (rtx *) alloca (n * sizeof (rtx));
488 for (i = 0; i < n; i++)
489 vector[i] = va_arg (p, rtx);
492 return gen_rtvec_v (n, vector);
496 gen_rtvec_v (n, argp)
501 register rtvec rt_val;
504 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
506 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
508 for (i = 0; i < n; i++)
509 rt_val->elem[i] = *argp++;
515 /* Generate a REG rtx for a new pseudo register of mode MODE.
516 This pseudo is assigned the next sequential register number. */
520 enum machine_mode mode;
522 struct function *f = cfun;
525 /* Don't let anything called after initial flow analysis create new
530 if (generating_concat_p
531 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
532 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
534 /* For complex modes, don't make a single pseudo.
535 Instead, make a CONCAT of two pseudos.
536 This allows noncontiguous allocation of the real and imaginary parts,
537 which makes much better code. Besides, allocating DCmode
538 pseudos overstrains reload on some machines like the 386. */
539 rtx realpart, imagpart;
540 int size = GET_MODE_UNIT_SIZE (mode);
541 enum machine_mode partmode
542 = mode_for_size (size * BITS_PER_UNIT,
543 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
544 ? MODE_FLOAT : MODE_INT),
547 realpart = gen_reg_rtx (partmode);
548 imagpart = gen_reg_rtx (partmode);
549 return gen_rtx_CONCAT (mode, realpart, imagpart);
552 /* Make sure regno_pointer_flag and regno_reg_rtx are large
553 enough to have an element for this pseudo reg number. */
555 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
557 int old_size = f->emit->regno_pointer_flag_length;
560 new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
561 memset (new + old_size, 0, old_size);
562 f->emit->regno_pointer_flag = new;
564 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
565 memset (new + old_size, 0, old_size);
566 f->emit->regno_pointer_align = (unsigned char *) new;
568 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
569 old_size * 2 * sizeof (rtx));
570 memset (new1 + old_size, 0, old_size * sizeof (rtx));
571 regno_reg_rtx = new1;
573 f->emit->regno_pointer_flag_length = old_size * 2;
576 val = gen_rtx_raw_REG (mode, reg_rtx_no);
577 regno_reg_rtx[reg_rtx_no++] = val;
581 /* Identify REG (which may be a CONCAT) as a user register. */
587 if (GET_CODE (reg) == CONCAT)
589 REG_USERVAR_P (XEXP (reg, 0)) = 1;
590 REG_USERVAR_P (XEXP (reg, 1)) = 1;
592 else if (GET_CODE (reg) == REG)
593 REG_USERVAR_P (reg) = 1;
598 /* Identify REG as a probable pointer register and show its alignment
599 as ALIGN, if nonzero. */
602 mark_reg_pointer (reg, align)
606 if (! REGNO_POINTER_FLAG (REGNO (reg)))
608 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
611 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
613 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
614 /* We can no-longer be sure just how aligned this pointer is */
615 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
618 /* Return 1 plus largest pseudo reg number used in the current function. */
626 /* Return 1 + the largest label number used so far in the current function. */
631 if (last_label_num && label_num == base_label_num)
632 return last_label_num;
636 /* Return first label number used in this function (if any were used). */
639 get_first_label_num ()
641 return first_label_num;
644 /* Return a value representing some low-order bits of X, where the number
645 of low-order bits is given by MODE. Note that no conversion is done
646 between floating-point and fixed-point values, rather, the bit
647 representation is returned.
649 This function handles the cases in common between gen_lowpart, below,
650 and two variants in cse.c and combine.c. These are the cases that can
651 be safely handled at all points in the compilation.
653 If this is not a case we can handle, return 0. */
656 gen_lowpart_common (mode, x)
657 enum machine_mode mode;
662 if (GET_MODE (x) == mode)
665 /* MODE must occupy no more words than the mode of X. */
666 if (GET_MODE (x) != VOIDmode
667 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
668 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
672 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
673 word = ((GET_MODE_SIZE (GET_MODE (x))
674 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
677 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
678 && (GET_MODE_CLASS (mode) == MODE_INT
679 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
681 /* If we are getting the low-order part of something that has been
682 sign- or zero-extended, we can either just use the object being
683 extended or make a narrower extension. If we want an even smaller
684 piece than the size of the object being extended, call ourselves
687 This case is used mostly by combine and cse. */
689 if (GET_MODE (XEXP (x, 0)) == mode)
691 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
692 return gen_lowpart_common (mode, XEXP (x, 0));
693 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
694 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
696 else if (GET_CODE (x) == SUBREG
697 && (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
698 || GET_MODE_SIZE (mode) <= UNITS_PER_WORD
699 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
700 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
702 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
703 else if (GET_CODE (x) == REG)
705 /* Let the backend decide how many registers to skip. This is needed
706 in particular for Sparc64 where fp regs are smaller than a word. */
707 /* ??? Note that subregs are now ambiguous, in that those against
708 pseudos are sized by the Word Size, while those against hard
709 regs are sized by the underlying register size. Better would be
710 to always interpret the subreg offset parameter as bytes or bits. */
712 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
713 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
714 - HARD_REGNO_NREGS (REGNO (x), mode));
716 /* If the register is not valid for MODE, return 0. If we don't
717 do this, there is no way to fix up the resulting REG later.
718 But we do do this if the current REG is not valid for its
719 mode. This latter is a kludge, but is required due to the
720 way that parameters are passed on some machines, most
722 if (REGNO (x) < FIRST_PSEUDO_REGISTER
723 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
724 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
726 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
727 /* integrate.c can't handle parts of a return value register. */
728 && (! REG_FUNCTION_VALUE_P (x)
729 || ! rtx_equal_function_value_matters)
730 #ifdef CLASS_CANNOT_CHANGE_MODE
731 && ! (CLASS_CANNOT_CHANGE_MODE_P (mode, GET_MODE (x))
732 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
733 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
734 && (TEST_HARD_REG_BIT
735 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_MODE],
738 /* We want to keep the stack, frame, and arg pointers
740 && x != frame_pointer_rtx
741 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
742 && x != arg_pointer_rtx
744 && x != stack_pointer_rtx)
745 return gen_rtx_REG (mode, REGNO (x) + word);
747 return gen_rtx_SUBREG (mode, x, word);
749 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
750 from the low-order part of the constant. */
751 else if ((GET_MODE_CLASS (mode) == MODE_INT
752 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
753 && GET_MODE (x) == VOIDmode
754 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
756 /* If MODE is twice the host word size, X is already the desired
757 representation. Otherwise, if MODE is wider than a word, we can't
758 do this. If MODE is exactly a word, return just one CONST_INT. */
760 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
762 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
764 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
765 return (GET_CODE (x) == CONST_INT ? x
766 : GEN_INT (CONST_DOUBLE_LOW (x)));
769 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
770 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
771 : CONST_DOUBLE_LOW (x));
773 /* Sign extend to HOST_WIDE_INT. */
774 val = trunc_int_for_mode (val, mode);
776 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
781 #ifndef REAL_ARITHMETIC
782 /* If X is an integral constant but we want it in floating-point, it
783 must be the case that we have a union of an integer and a floating-point
784 value. If the machine-parameters allow it, simulate that union here
785 and return the result. The two-word and single-word cases are
788 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
789 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
790 || flag_pretend_float)
791 && GET_MODE_CLASS (mode) == MODE_FLOAT
792 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
793 && GET_CODE (x) == CONST_INT
794 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
796 union {HOST_WIDE_INT i; float d; } u;
799 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
801 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
802 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
803 || flag_pretend_float)
804 && GET_MODE_CLASS (mode) == MODE_FLOAT
805 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
806 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
807 && GET_MODE (x) == VOIDmode
808 && (sizeof (double) * HOST_BITS_PER_CHAR
809 == 2 * HOST_BITS_PER_WIDE_INT))
811 union {HOST_WIDE_INT i[2]; double d; } u;
812 HOST_WIDE_INT low, high;
814 if (GET_CODE (x) == CONST_INT)
815 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
817 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
819 #ifdef HOST_WORDS_BIG_ENDIAN
820 u.i[0] = high, u.i[1] = low;
822 u.i[0] = low, u.i[1] = high;
825 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
828 /* Similarly, if this is converting a floating-point value into a
829 single-word integer. Only do this is the host and target parameters are
832 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
833 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
834 || flag_pretend_float)
835 && (GET_MODE_CLASS (mode) == MODE_INT
836 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
837 && GET_CODE (x) == CONST_DOUBLE
838 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
839 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
840 return operand_subword (x, word, 0, GET_MODE (x));
842 /* Similarly, if this is converting a floating-point value into a
843 two-word integer, we can do this one word at a time and make an
844 integer. Only do this is the host and target parameters are
847 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
848 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
849 || flag_pretend_float)
850 && (GET_MODE_CLASS (mode) == MODE_INT
851 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
852 && GET_CODE (x) == CONST_DOUBLE
853 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
854 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
857 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
859 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
861 if (lowpart && GET_CODE (lowpart) == CONST_INT
862 && highpart && GET_CODE (highpart) == CONST_INT)
863 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
865 #else /* ifndef REAL_ARITHMETIC */
867 /* When we have a FP emulator, we can handle all conversions between
868 FP and integer operands. This simplifies reload because it
869 doesn't have to deal with constructs like (subreg:DI
870 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
872 else if (mode == SFmode
873 && GET_CODE (x) == CONST_INT)
879 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
880 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
882 else if (mode == DFmode
883 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
884 && GET_MODE (x) == VOIDmode)
888 HOST_WIDE_INT low, high;
890 if (GET_CODE (x) == CONST_INT)
893 high = low >> (HOST_BITS_PER_WIDE_INT - 1);
897 low = CONST_DOUBLE_LOW (x);
898 high = CONST_DOUBLE_HIGH (x);
901 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
903 if (WORDS_BIG_ENDIAN)
904 i[0] = high, i[1] = low;
906 i[0] = low, i[1] = high;
908 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
909 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
911 else if ((GET_MODE_CLASS (mode) == MODE_INT
912 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
913 && GET_CODE (x) == CONST_DOUBLE
914 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT)
917 long i[4]; /* Only the low 32 bits of each 'long' are used. */
918 int endian = WORDS_BIG_ENDIAN ? 1 : 0;
920 REAL_VALUE_FROM_CONST_DOUBLE (r, x);
921 switch (GET_MODE (x))
924 REAL_VALUE_TO_TARGET_SINGLE (r, i[endian]);
928 REAL_VALUE_TO_TARGET_DOUBLE (r, i);
930 #if LONG_DOUBLE_TYPE_SIZE == 96
932 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i + endian);
936 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r, i);
943 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
945 #if HOST_BITS_PER_WIDE_INT == 32
946 return immed_double_const (i[endian], i[1 - endian], mode);
951 if (HOST_BITS_PER_WIDE_INT != 64)
954 for (c = 0; c < 4; c++)
957 switch (GET_MODE (x))
961 return immed_double_const (((unsigned long) i[endian]) |
962 (((HOST_WIDE_INT) i[1-endian]) << 32),
965 return immed_double_const (((unsigned long) i[endian*3]) |
966 (((HOST_WIDE_INT) i[1+endian]) << 32),
967 ((unsigned long) i[2-endian]) |
968 (((HOST_WIDE_INT) i[3-endian*3]) << 32),
974 #endif /* ifndef REAL_ARITHMETIC */
976 /* Otherwise, we can't do this. */
980 /* Return the real part (which has mode MODE) of a complex value X.
981 This always comes at the low address in memory. */
984 gen_realpart (mode, x)
985 enum machine_mode mode;
988 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
990 else if (WORDS_BIG_ENDIAN
991 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
993 && REGNO (x) < FIRST_PSEUDO_REGISTER)
994 fatal ("Unable to access real part of complex value in a hard register on this target");
995 else if (WORDS_BIG_ENDIAN)
996 return gen_highpart (mode, x);
998 return gen_lowpart (mode, x);
1001 /* Return the imaginary part (which has mode MODE) of a complex value X.
1002 This always comes at the high address in memory. */
1005 gen_imagpart (mode, x)
1006 enum machine_mode mode;
1009 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
1011 else if (WORDS_BIG_ENDIAN)
1012 return gen_lowpart (mode, x);
1013 else if (!WORDS_BIG_ENDIAN
1014 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
1016 && REGNO (x) < FIRST_PSEUDO_REGISTER)
1017 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
1019 return gen_highpart (mode, x);
1022 /* Return 1 iff X, assumed to be a SUBREG,
1023 refers to the real part of the complex value in its containing reg.
1024 Complex values are always stored with the real part in the first word,
1025 regardless of WORDS_BIG_ENDIAN. */
1028 subreg_realpart_p (x)
1031 if (GET_CODE (x) != SUBREG)
1034 return ((unsigned int) SUBREG_WORD (x) * UNITS_PER_WORD
1035 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x))));
1038 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1039 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1040 least-significant part of X.
1041 MODE specifies how big a part of X to return;
1042 it usually should not be larger than a word.
1043 If X is a MEM whose address is a QUEUED, the value may be so also. */
1046 gen_lowpart (mode, x)
1047 enum machine_mode mode;
1050 rtx result = gen_lowpart_common (mode, x);
1054 else if (GET_CODE (x) == REG)
1056 /* Must be a hard reg that's not valid in MODE. */
1057 result = gen_lowpart_common (mode, copy_to_reg (x));
1062 else if (GET_CODE (x) == MEM)
1064 /* The only additional case we can do is MEM. */
1065 register int offset = 0;
1066 if (WORDS_BIG_ENDIAN)
1067 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1068 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1070 if (BYTES_BIG_ENDIAN)
1071 /* Adjust the address so that the address-after-the-data
1073 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1074 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1076 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1078 else if (GET_CODE (x) == ADDRESSOF)
1079 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1084 /* Like `gen_lowpart', but refer to the most significant part.
1085 This is used to access the imaginary part of a complex number. */
1088 gen_highpart (mode, x)
1089 enum machine_mode mode;
1092 /* This case loses if X is a subreg. To catch bugs early,
1093 complain if an invalid MODE is used even in other cases. */
1094 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1095 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1097 if (GET_CODE (x) == CONST_DOUBLE
1098 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1099 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1102 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1103 else if (GET_CODE (x) == CONST_INT)
1105 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1107 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1109 else if (GET_CODE (x) == MEM)
1111 register int offset = 0;
1112 if (! WORDS_BIG_ENDIAN)
1113 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1114 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1116 if (! BYTES_BIG_ENDIAN
1117 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1118 offset -= (GET_MODE_SIZE (mode)
1119 - MIN (UNITS_PER_WORD,
1120 GET_MODE_SIZE (GET_MODE (x))));
1122 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1124 else if (GET_CODE (x) == SUBREG)
1126 /* The only time this should occur is when we are looking at a
1127 multi-word item with a SUBREG whose mode is the same as that of the
1128 item. It isn't clear what we would do if it wasn't. */
1129 if (SUBREG_WORD (x) != 0)
1131 return gen_highpart (mode, SUBREG_REG (x));
1133 else if (GET_CODE (x) == REG)
1137 /* Let the backend decide how many registers to skip. This is needed
1138 in particular for sparc64 where fp regs are smaller than a word. */
1139 /* ??? Note that subregs are now ambiguous, in that those against
1140 pseudos are sized by the word size, while those against hard
1141 regs are sized by the underlying register size. Better would be
1142 to always interpret the subreg offset parameter as bytes or bits. */
1144 if (WORDS_BIG_ENDIAN)
1146 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1147 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1148 - HARD_REGNO_NREGS (REGNO (x), mode));
1150 word = ((GET_MODE_SIZE (GET_MODE (x))
1151 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1154 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1155 /* integrate.c can't handle parts of a return value register. */
1156 && (! REG_FUNCTION_VALUE_P (x)
1157 || ! rtx_equal_function_value_matters)
1158 /* We want to keep the stack, frame, and arg pointers special. */
1159 && x != frame_pointer_rtx
1160 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1161 && x != arg_pointer_rtx
1163 && x != stack_pointer_rtx)
1164 return gen_rtx_REG (mode, REGNO (x) + word);
1166 return gen_rtx_SUBREG (mode, x, word);
1172 /* Return 1 iff X, assumed to be a SUBREG,
1173 refers to the least significant part of its containing reg.
1174 If X is not a SUBREG, always return 1 (it is its own low part!). */
1177 subreg_lowpart_p (x)
1180 if (GET_CODE (x) != SUBREG)
1182 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1185 if (WORDS_BIG_ENDIAN
1186 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1187 return (SUBREG_WORD (x)
1188 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1189 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1192 return SUBREG_WORD (x) == 0;
1195 /* Return subword I of operand OP.
1196 The word number, I, is interpreted as the word number starting at the
1197 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1198 otherwise it is the high-order word.
1200 If we cannot extract the required word, we return zero. Otherwise, an
1201 rtx corresponding to the requested word will be returned.
1203 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1204 reload has completed, a valid address will always be returned. After
1205 reload, if a valid address cannot be returned, we return zero.
1207 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1208 it is the responsibility of the caller.
1210 MODE is the mode of OP in case it is a CONST_INT. */
1213 operand_subword (op, i, validate_address, mode)
1216 int validate_address;
1217 enum machine_mode mode;
1220 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1222 if (mode == VOIDmode)
1223 mode = GET_MODE (op);
1225 if (mode == VOIDmode)
1228 /* If OP is narrower than a word, fail. */
1230 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1233 /* If we want a word outside OP, return zero. */
1235 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1238 /* If OP is already an integer word, return it. */
1239 if (GET_MODE_CLASS (mode) == MODE_INT
1240 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1243 /* If OP is a REG or SUBREG, we can handle it very simply. */
1244 if (GET_CODE (op) == REG)
1246 /* ??? There is a potential problem with this code. It does not
1247 properly handle extractions of a subword from a hard register
1248 that is larger than word_mode. Presumably the check for
1249 HARD_REGNO_MODE_OK catches these most of these cases. */
1251 /* If OP is a hard register, but OP + I is not a hard register,
1252 then extracting a subword is impossible.
1254 For example, consider if OP is the last hard register and it is
1255 larger than word_mode. If we wanted word N (for N > 0) because a
1256 part of that hard register was known to contain a useful value,
1257 then OP + I would refer to a pseudo, not the hard register we
1259 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1260 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1263 /* If the register is not valid for MODE, return 0. Note we
1264 have to check both OP and OP + I since they may refer to
1265 different parts of the register file.
1267 Consider if OP refers to the last 96bit FP register and we want
1268 subword 3 because that subword is known to contain a value we
1270 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1271 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1272 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1274 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1275 || (REG_FUNCTION_VALUE_P (op)
1276 && rtx_equal_function_value_matters)
1277 /* We want to keep the stack, frame, and arg pointers
1279 || op == frame_pointer_rtx
1280 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1281 || op == arg_pointer_rtx
1283 || op == stack_pointer_rtx)
1284 return gen_rtx_SUBREG (word_mode, op, i);
1286 return gen_rtx_REG (word_mode, REGNO (op) + i);
1288 else if (GET_CODE (op) == SUBREG)
1289 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1290 else if (GET_CODE (op) == CONCAT)
1292 unsigned int partwords
1293 = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1296 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1297 return operand_subword (XEXP (op, 1), i - partwords,
1298 validate_address, mode);
1301 /* Form a new MEM at the requested address. */
1302 if (GET_CODE (op) == MEM)
1304 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1307 if (validate_address)
1309 if (reload_completed)
1311 if (! strict_memory_address_p (word_mode, addr))
1315 addr = memory_address (word_mode, addr);
1318 new = gen_rtx_MEM (word_mode, addr);
1319 MEM_COPY_ATTRIBUTES (new, op);
1323 /* The only remaining cases are when OP is a constant. If the host and
1324 target floating formats are the same, handling two-word floating
1325 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1326 are defined as returning one or two 32 bit values, respectively,
1327 and not values of BITS_PER_WORD bits. */
1328 #ifdef REAL_ARITHMETIC
1329 /* The output is some bits, the width of the target machine's word.
1330 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1332 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1333 && GET_MODE_CLASS (mode) == MODE_FLOAT
1334 && GET_MODE_BITSIZE (mode) == 64
1335 && GET_CODE (op) == CONST_DOUBLE)
1340 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1341 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1343 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1344 which the words are written depends on the word endianness.
1345 ??? This is a potential portability problem and should
1346 be fixed at some point.
1348 We must excercise caution with the sign bit. By definition there
1349 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1350 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1351 So we explicitly mask and sign-extend as necessary. */
1352 if (BITS_PER_WORD == 32)
1355 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1356 return GEN_INT (val);
1358 #if HOST_BITS_PER_WIDE_INT >= 64
1359 else if (BITS_PER_WORD >= 64 && i == 0)
1361 val = k[! WORDS_BIG_ENDIAN];
1362 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1363 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1364 return GEN_INT (val);
1367 else if (BITS_PER_WORD == 16)
1370 if ((i & 1) == !WORDS_BIG_ENDIAN)
1373 return GEN_INT (val);
1378 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1379 && GET_MODE_CLASS (mode) == MODE_FLOAT
1380 && GET_MODE_BITSIZE (mode) > 64
1381 && GET_CODE (op) == CONST_DOUBLE)
1386 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1387 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1389 if (BITS_PER_WORD == 32)
1392 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1393 return GEN_INT (val);
1395 #if HOST_BITS_PER_WIDE_INT >= 64
1396 else if (BITS_PER_WORD >= 64 && i <= 1)
1398 val = k[i*2 + ! WORDS_BIG_ENDIAN];
1399 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1400 val |= (HOST_WIDE_INT) k[i*2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1401 return GEN_INT (val);
1407 #else /* no REAL_ARITHMETIC */
1408 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1409 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1410 || flag_pretend_float)
1411 && GET_MODE_CLASS (mode) == MODE_FLOAT
1412 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1413 && GET_CODE (op) == CONST_DOUBLE)
1415 /* The constant is stored in the host's word-ordering,
1416 but we want to access it in the target's word-ordering. Some
1417 compilers don't like a conditional inside macro args, so we have two
1418 copies of the return. */
1419 #ifdef HOST_WORDS_BIG_ENDIAN
1420 return GEN_INT (i == WORDS_BIG_ENDIAN
1421 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1423 return GEN_INT (i != WORDS_BIG_ENDIAN
1424 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1427 #endif /* no REAL_ARITHMETIC */
1429 /* Single word float is a little harder, since single- and double-word
1430 values often do not have the same high-order bits. We have already
1431 verified that we want the only defined word of the single-word value. */
1432 #ifdef REAL_ARITHMETIC
1433 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1434 && GET_MODE_BITSIZE (mode) == 32
1435 && GET_CODE (op) == CONST_DOUBLE)
1440 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1441 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1443 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1445 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1447 if (BITS_PER_WORD == 16)
1449 if ((i & 1) == !WORDS_BIG_ENDIAN)
1454 return GEN_INT (val);
1457 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1458 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1459 || flag_pretend_float)
1460 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1461 && GET_MODE_CLASS (mode) == MODE_FLOAT
1462 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1463 && GET_CODE (op) == CONST_DOUBLE)
1466 union {float f; HOST_WIDE_INT i; } u;
1468 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1471 return GEN_INT (u.i);
1473 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1474 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1475 || flag_pretend_float)
1476 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1477 && GET_MODE_CLASS (mode) == MODE_FLOAT
1478 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1479 && GET_CODE (op) == CONST_DOUBLE)
1482 union {double d; HOST_WIDE_INT i; } u;
1484 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1487 return GEN_INT (u.i);
1489 #endif /* no REAL_ARITHMETIC */
1491 /* The only remaining cases that we can handle are integers.
1492 Convert to proper endianness now since these cases need it.
1493 At this point, i == 0 means the low-order word.
1495 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1496 in general. However, if OP is (const_int 0), we can just return
1499 if (op == const0_rtx)
1502 if (GET_MODE_CLASS (mode) != MODE_INT
1503 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1504 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1507 if (WORDS_BIG_ENDIAN)
1508 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1510 /* Find out which word on the host machine this value is in and get
1511 it from the constant. */
1512 val = (i / size_ratio == 0
1513 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1514 : (GET_CODE (op) == CONST_INT
1515 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1517 /* Get the value we want into the low bits of val. */
1518 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1519 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1521 val = trunc_int_for_mode (val, word_mode);
1523 return GEN_INT (val);
1526 /* Similar to `operand_subword', but never return 0. If we can't extract
1527 the required subword, put OP into a register and try again. If that fails,
1528 abort. We always validate the address in this case. It is not valid
1529 to call this function after reload; it is mostly meant for RTL
1532 MODE is the mode of OP, in case it is CONST_INT. */
1535 operand_subword_force (op, i, mode)
1538 enum machine_mode mode;
1540 rtx result = operand_subword (op, i, 1, mode);
1545 if (mode != BLKmode && mode != VOIDmode)
1547 /* If this is a register which can not be accessed by words, copy it
1548 to a pseudo register. */
1549 if (GET_CODE (op) == REG)
1550 op = copy_to_reg (op);
1552 op = force_reg (mode, op);
1555 result = operand_subword (op, i, 1, mode);
1562 /* Given a compare instruction, swap the operands.
1563 A test instruction is changed into a compare of 0 against the operand. */
1566 reverse_comparison (insn)
1569 rtx body = PATTERN (insn);
1572 if (GET_CODE (body) == SET)
1573 comp = SET_SRC (body);
1575 comp = SET_SRC (XVECEXP (body, 0, 0));
1577 if (GET_CODE (comp) == COMPARE)
1579 rtx op0 = XEXP (comp, 0);
1580 rtx op1 = XEXP (comp, 1);
1581 XEXP (comp, 0) = op1;
1582 XEXP (comp, 1) = op0;
1586 rtx new = gen_rtx_COMPARE (VOIDmode,
1587 CONST0_RTX (GET_MODE (comp)), comp);
1588 if (GET_CODE (body) == SET)
1589 SET_SRC (body) = new;
1591 SET_SRC (XVECEXP (body, 0, 0)) = new;
1595 /* Return a memory reference like MEMREF, but with its mode changed
1596 to MODE and its address changed to ADDR.
1597 (VOIDmode means don't change the mode.
1598 NULL for ADDR means don't change the address.) */
1601 change_address (memref, mode, addr)
1603 enum machine_mode mode;
1608 if (GET_CODE (memref) != MEM)
1610 if (mode == VOIDmode)
1611 mode = GET_MODE (memref);
1613 addr = XEXP (memref, 0);
1615 /* If reload is in progress or has completed, ADDR must be valid.
1616 Otherwise, we can call memory_address to make it valid. */
1617 if (reload_completed || reload_in_progress)
1619 if (! memory_address_p (mode, addr))
1623 addr = memory_address (mode, addr);
1625 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1628 new = gen_rtx_MEM (mode, addr);
1629 MEM_COPY_ATTRIBUTES (new, memref);
1633 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1640 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1641 NULL_RTX, label_num++, NULL_PTR, NULL_PTR);
1643 LABEL_NUSES (label) = 0;
1644 LABEL_ALTERNATE_NAME (label) = NULL;
1648 /* For procedure integration. */
1650 /* Install new pointers to the first and last insns in the chain.
1651 Also, set cur_insn_uid to one higher than the last in use.
1652 Used for an inline-procedure after copying the insn chain. */
1655 set_new_first_and_last_insn (first, last)
1664 for (insn = first; insn; insn = NEXT_INSN (insn))
1665 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1670 /* Set the range of label numbers found in the current function.
1671 This is used when belatedly compiling an inline function. */
1674 set_new_first_and_last_label_num (first, last)
1677 base_label_num = label_num;
1678 first_label_num = first;
1679 last_label_num = last;
1682 /* Set the last label number found in the current function.
1683 This is used when belatedly compiling an inline function. */
1686 set_new_last_label_num (last)
1689 base_label_num = label_num;
1690 last_label_num = last;
1693 /* Restore all variables describing the current status from the structure *P.
1694 This is used after a nested function. */
1697 restore_emit_status (p)
1698 struct function *p ATTRIBUTE_UNUSED;
1701 clear_emit_caches ();
1704 /* Clear out all parts of the state in F that can safely be discarded
1705 after the function has been compiled, to let garbage collection
1706 reclaim the memory. */
1709 free_emit_status (f)
1712 free (f->emit->x_regno_reg_rtx);
1713 free (f->emit->regno_pointer_flag);
1714 free (f->emit->regno_pointer_align);
1719 /* Go through all the RTL insn bodies and copy any invalid shared
1720 structure. This routine should only be called once. */
1723 unshare_all_rtl (fndecl, insn)
1729 /* Make sure that virtual parameters are not shared. */
1730 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1731 DECL_RTL (decl) = copy_rtx_if_shared (DECL_RTL (decl));
1733 /* Make sure that virtual stack slots are not shared. */
1734 unshare_all_decls (DECL_INITIAL (fndecl));
1736 /* Unshare just about everything else. */
1737 unshare_all_rtl_1 (insn);
1739 /* Make sure the addresses of stack slots found outside the insn chain
1740 (such as, in DECL_RTL of a variable) are not shared
1741 with the insn chain.
1743 This special care is necessary when the stack slot MEM does not
1744 actually appear in the insn chain. If it does appear, its address
1745 is unshared from all else at that point. */
1746 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
1749 /* Go through all the RTL insn bodies and copy any invalid shared
1750 structure, again. This is a fairly expensive thing to do so it
1751 should be done sparingly. */
1754 unshare_all_rtl_again (insn)
1760 for (p = insn; p; p = NEXT_INSN (p))
1763 reset_used_flags (PATTERN (p));
1764 reset_used_flags (REG_NOTES (p));
1765 reset_used_flags (LOG_LINKS (p));
1768 /* Make sure that virtual stack slots are not shared. */
1769 reset_used_decls (DECL_INITIAL (cfun->decl));
1771 /* Make sure that virtual parameters are not shared. */
1772 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = TREE_CHAIN (decl))
1773 reset_used_flags (DECL_RTL (decl));
1775 reset_used_flags (stack_slot_list);
1777 unshare_all_rtl (cfun->decl, insn);
1780 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1781 Assumes the mark bits are cleared at entry. */
1784 unshare_all_rtl_1 (insn)
1787 for (; insn; insn = NEXT_INSN (insn))
1790 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1791 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1792 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1796 /* Go through all virtual stack slots of a function and copy any
1797 shared structure. */
1799 unshare_all_decls (blk)
1804 /* Copy shared decls. */
1805 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1806 DECL_RTL (t) = copy_rtx_if_shared (DECL_RTL (t));
1808 /* Now process sub-blocks. */
1809 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1810 unshare_all_decls (t);
1813 /* Go through all virtual stack slots of a function and mark them as
1816 reset_used_decls (blk)
1822 for (t = BLOCK_VARS (blk); t; t = TREE_CHAIN (t))
1823 reset_used_flags (DECL_RTL (t));
1825 /* Now process sub-blocks. */
1826 for (t = BLOCK_SUBBLOCKS (blk); t; t = TREE_CHAIN (t))
1827 reset_used_decls (t);
1830 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1831 Recursively does the same for subexpressions. */
1834 copy_rtx_if_shared (orig)
1837 register rtx x = orig;
1839 register enum rtx_code code;
1840 register const char *format_ptr;
1846 code = GET_CODE (x);
1848 /* These types may be freely shared. */
1861 /* SCRATCH must be shared because they represent distinct values. */
1865 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1866 a LABEL_REF, it isn't sharable. */
1867 if (GET_CODE (XEXP (x, 0)) == PLUS
1868 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1869 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1878 /* The chain of insns is not being copied. */
1882 /* A MEM is allowed to be shared if its address is constant.
1884 We used to allow sharing of MEMs which referenced
1885 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1886 that can lose. instantiate_virtual_regs will not unshare
1887 the MEMs, and combine may change the structure of the address
1888 because it looks safe and profitable in one context, but
1889 in some other context it creates unrecognizable RTL. */
1890 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1899 /* This rtx may not be shared. If it has already been seen,
1900 replace it with a copy of itself. */
1906 copy = rtx_alloc (code);
1908 (sizeof (*copy) - sizeof (copy->fld)
1909 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1915 /* Now scan the subexpressions recursively.
1916 We can store any replaced subexpressions directly into X
1917 since we know X is not shared! Any vectors in X
1918 must be copied if X was copied. */
1920 format_ptr = GET_RTX_FORMAT (code);
1922 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1924 switch (*format_ptr++)
1927 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1931 if (XVEC (x, i) != NULL)
1934 int len = XVECLEN (x, i);
1936 if (copied && len > 0)
1937 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1938 for (j = 0; j < len; j++)
1939 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1947 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1948 to look for shared sub-parts. */
1951 reset_used_flags (x)
1955 register enum rtx_code code;
1956 register const char *format_ptr;
1961 code = GET_CODE (x);
1963 /* These types may be freely shared so we needn't do any resetting
1984 /* The chain of insns is not being copied. */
1993 format_ptr = GET_RTX_FORMAT (code);
1994 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1996 switch (*format_ptr++)
1999 reset_used_flags (XEXP (x, i));
2003 for (j = 0; j < XVECLEN (x, i); j++)
2004 reset_used_flags (XVECEXP (x, i, j));
2010 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2011 Return X or the rtx for the pseudo reg the value of X was copied into.
2012 OTHER must be valid as a SET_DEST. */
2015 make_safe_from (x, other)
2019 switch (GET_CODE (other))
2022 other = SUBREG_REG (other);
2024 case STRICT_LOW_PART:
2027 other = XEXP (other, 0);
2033 if ((GET_CODE (other) == MEM
2035 && GET_CODE (x) != REG
2036 && GET_CODE (x) != SUBREG)
2037 || (GET_CODE (other) == REG
2038 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2039 || reg_mentioned_p (other, x))))
2041 rtx temp = gen_reg_rtx (GET_MODE (x));
2042 emit_move_insn (temp, x);
2048 /* Emission of insns (adding them to the doubly-linked list). */
2050 /* Return the first insn of the current sequence or current function. */
2058 /* Return the last insn emitted in current sequence or current function. */
2066 /* Specify a new insn as the last in the chain. */
2069 set_last_insn (insn)
2072 if (NEXT_INSN (insn) != 0)
2077 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2080 get_last_insn_anywhere ()
2082 struct sequence_stack *stack;
2085 for (stack = seq_stack; stack; stack = stack->next)
2086 if (stack->last != 0)
2091 /* Return a number larger than any instruction's uid in this function. */
2096 return cur_insn_uid;
2099 /* Renumber instructions so that no instruction UIDs are wasted. */
2102 renumber_insns (stream)
2107 /* If we're not supposed to renumber instructions, don't. */
2108 if (!flag_renumber_insns)
2111 /* If there aren't that many instructions, then it's not really
2112 worth renumbering them. */
2113 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
2118 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
2121 fprintf (stream, "Renumbering insn %d to %d\n",
2122 INSN_UID (insn), cur_insn_uid);
2123 INSN_UID (insn) = cur_insn_uid++;
2127 /* Return the next insn. If it is a SEQUENCE, return the first insn
2136 insn = NEXT_INSN (insn);
2137 if (insn && GET_CODE (insn) == INSN
2138 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2139 insn = XVECEXP (PATTERN (insn), 0, 0);
2145 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2149 previous_insn (insn)
2154 insn = PREV_INSN (insn);
2155 if (insn && GET_CODE (insn) == INSN
2156 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2157 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2163 /* Return the next insn after INSN that is not a NOTE. This routine does not
2164 look inside SEQUENCEs. */
2167 next_nonnote_insn (insn)
2172 insn = NEXT_INSN (insn);
2173 if (insn == 0 || GET_CODE (insn) != NOTE)
2180 /* Return the previous insn before INSN that is not a NOTE. This routine does
2181 not look inside SEQUENCEs. */
2184 prev_nonnote_insn (insn)
2189 insn = PREV_INSN (insn);
2190 if (insn == 0 || GET_CODE (insn) != NOTE)
2197 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2198 or 0, if there is none. This routine does not look inside
2202 next_real_insn (insn)
2207 insn = NEXT_INSN (insn);
2208 if (insn == 0 || GET_CODE (insn) == INSN
2209 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2216 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2217 or 0, if there is none. This routine does not look inside
2221 prev_real_insn (insn)
2226 insn = PREV_INSN (insn);
2227 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2228 || GET_CODE (insn) == JUMP_INSN)
2235 /* Find the next insn after INSN that really does something. This routine
2236 does not look inside SEQUENCEs. Until reload has completed, this is the
2237 same as next_real_insn. */
2240 active_insn_p (insn)
2243 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2244 || (GET_CODE (insn) == INSN
2245 && (! reload_completed
2246 || (GET_CODE (PATTERN (insn)) != USE
2247 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2251 next_active_insn (insn)
2256 insn = NEXT_INSN (insn);
2257 if (insn == 0 || active_insn_p (insn))
2264 /* Find the last insn before INSN that really does something. This routine
2265 does not look inside SEQUENCEs. Until reload has completed, this is the
2266 same as prev_real_insn. */
2269 prev_active_insn (insn)
2274 insn = PREV_INSN (insn);
2275 if (insn == 0 || active_insn_p (insn))
2282 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2290 insn = NEXT_INSN (insn);
2291 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2298 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2306 insn = PREV_INSN (insn);
2307 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2315 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2316 and REG_CC_USER notes so we can find it. */
2319 link_cc0_insns (insn)
2322 rtx user = next_nonnote_insn (insn);
2324 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2325 user = XVECEXP (PATTERN (user), 0, 0);
2327 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2329 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2332 /* Return the next insn that uses CC0 after INSN, which is assumed to
2333 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2334 applied to the result of this function should yield INSN).
2336 Normally, this is simply the next insn. However, if a REG_CC_USER note
2337 is present, it contains the insn that uses CC0.
2339 Return 0 if we can't find the insn. */
2342 next_cc0_user (insn)
2345 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2348 return XEXP (note, 0);
2350 insn = next_nonnote_insn (insn);
2351 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2352 insn = XVECEXP (PATTERN (insn), 0, 0);
2354 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2360 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2361 note, it is the previous insn. */
2364 prev_cc0_setter (insn)
2367 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2370 return XEXP (note, 0);
2372 insn = prev_nonnote_insn (insn);
2373 if (! sets_cc0_p (PATTERN (insn)))
2380 /* Try splitting insns that can be split for better scheduling.
2381 PAT is the pattern which might split.
2382 TRIAL is the insn providing PAT.
2383 LAST is non-zero if we should return the last insn of the sequence produced.
2385 If this routine succeeds in splitting, it returns the first or last
2386 replacement insn depending on the value of LAST. Otherwise, it
2387 returns TRIAL. If the insn to be returned can be split, it will be. */
2390 try_split (pat, trial, last)
2394 rtx before = PREV_INSN (trial);
2395 rtx after = NEXT_INSN (trial);
2396 rtx seq = split_insns (pat, trial);
2397 int has_barrier = 0;
2400 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2401 We may need to handle this specially. */
2402 if (after && GET_CODE (after) == BARRIER)
2405 after = NEXT_INSN (after);
2410 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2411 The latter case will normally arise only when being done so that
2412 it, in turn, will be split (SFmode on the 29k is an example). */
2413 if (GET_CODE (seq) == SEQUENCE)
2417 /* Avoid infinite loop if any insn of the result matches
2418 the original pattern. */
2419 for (i = 0; i < XVECLEN (seq, 0); i++)
2420 if (GET_CODE (XVECEXP (seq, 0, i)) == INSN
2421 && rtx_equal_p (PATTERN (XVECEXP (seq, 0, i)), pat))
2424 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2425 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2426 increment the usage count so we don't delete the label. */
2428 if (GET_CODE (trial) == JUMP_INSN)
2429 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2430 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2432 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2434 if (JUMP_LABEL (trial))
2435 LABEL_NUSES (JUMP_LABEL (trial))++;
2438 tem = emit_insn_after (seq, before);
2440 delete_insn (trial);
2442 emit_barrier_after (tem);
2444 /* Recursively call try_split for each new insn created; by the
2445 time control returns here that insn will be fully split, so
2446 set LAST and continue from the insn after the one returned.
2447 We can't use next_active_insn here since AFTER may be a note.
2448 Ignore deleted insns, which can be occur if not optimizing. */
2449 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
2450 if (! INSN_DELETED_P (tem) && INSN_P (tem))
2451 tem = try_split (PATTERN (tem), tem, 1);
2453 /* Avoid infinite loop if the result matches the original pattern. */
2454 else if (rtx_equal_p (seq, pat))
2458 PATTERN (trial) = seq;
2459 INSN_CODE (trial) = -1;
2460 try_split (seq, trial, last);
2463 /* Return either the first or the last insn, depending on which was
2466 ? (after ? prev_active_insn (after) : last_insn)
2467 : next_active_insn (before);
2473 /* Make and return an INSN rtx, initializing all its slots.
2474 Store PATTERN in the pattern slots. */
2477 make_insn_raw (pattern)
2482 insn = rtx_alloc (INSN);
2484 INSN_UID (insn) = cur_insn_uid++;
2485 PATTERN (insn) = pattern;
2486 INSN_CODE (insn) = -1;
2487 LOG_LINKS (insn) = NULL;
2488 REG_NOTES (insn) = NULL;
2490 #ifdef ENABLE_RTL_CHECKING
2493 && (returnjump_p (insn)
2494 || (GET_CODE (insn) == SET
2495 && SET_DEST (insn) == pc_rtx)))
2497 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2505 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2508 make_jump_insn_raw (pattern)
2513 insn = rtx_alloc (JUMP_INSN);
2514 INSN_UID (insn) = cur_insn_uid++;
2516 PATTERN (insn) = pattern;
2517 INSN_CODE (insn) = -1;
2518 LOG_LINKS (insn) = NULL;
2519 REG_NOTES (insn) = NULL;
2520 JUMP_LABEL (insn) = NULL;
2525 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2528 make_call_insn_raw (pattern)
2533 insn = rtx_alloc (CALL_INSN);
2534 INSN_UID (insn) = cur_insn_uid++;
2536 PATTERN (insn) = pattern;
2537 INSN_CODE (insn) = -1;
2538 LOG_LINKS (insn) = NULL;
2539 REG_NOTES (insn) = NULL;
2540 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2545 /* Add INSN to the end of the doubly-linked list.
2546 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2552 PREV_INSN (insn) = last_insn;
2553 NEXT_INSN (insn) = 0;
2555 if (NULL != last_insn)
2556 NEXT_INSN (last_insn) = insn;
2558 if (NULL == first_insn)
2564 /* Add INSN into the doubly-linked list after insn AFTER. This and
2565 the next should be the only functions called to insert an insn once
2566 delay slots have been filled since only they know how to update a
2570 add_insn_after (insn, after)
2573 rtx next = NEXT_INSN (after);
2575 if (optimize && INSN_DELETED_P (after))
2578 NEXT_INSN (insn) = next;
2579 PREV_INSN (insn) = after;
2583 PREV_INSN (next) = insn;
2584 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2585 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2587 else if (last_insn == after)
2591 struct sequence_stack *stack = seq_stack;
2592 /* Scan all pending sequences too. */
2593 for (; stack; stack = stack->next)
2594 if (after == stack->last)
2604 NEXT_INSN (after) = insn;
2605 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2607 rtx sequence = PATTERN (after);
2608 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2612 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2613 the previous should be the only functions called to insert an insn once
2614 delay slots have been filled since only they know how to update a
2618 add_insn_before (insn, before)
2621 rtx prev = PREV_INSN (before);
2623 if (optimize && INSN_DELETED_P (before))
2626 PREV_INSN (insn) = prev;
2627 NEXT_INSN (insn) = before;
2631 NEXT_INSN (prev) = insn;
2632 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2634 rtx sequence = PATTERN (prev);
2635 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2638 else if (first_insn == before)
2642 struct sequence_stack *stack = seq_stack;
2643 /* Scan all pending sequences too. */
2644 for (; stack; stack = stack->next)
2645 if (before == stack->first)
2647 stack->first = insn;
2655 PREV_INSN (before) = insn;
2656 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2657 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2660 /* Remove an insn from its doubly-linked list. This function knows how
2661 to handle sequences. */
2666 rtx next = NEXT_INSN (insn);
2667 rtx prev = PREV_INSN (insn);
2670 NEXT_INSN (prev) = next;
2671 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2673 rtx sequence = PATTERN (prev);
2674 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2677 else if (first_insn == insn)
2681 struct sequence_stack *stack = seq_stack;
2682 /* Scan all pending sequences too. */
2683 for (; stack; stack = stack->next)
2684 if (insn == stack->first)
2686 stack->first = next;
2696 PREV_INSN (next) = prev;
2697 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2698 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2700 else if (last_insn == insn)
2704 struct sequence_stack *stack = seq_stack;
2705 /* Scan all pending sequences too. */
2706 for (; stack; stack = stack->next)
2707 if (insn == stack->last)
2718 /* Delete all insns made since FROM.
2719 FROM becomes the new last instruction. */
2722 delete_insns_since (from)
2728 NEXT_INSN (from) = 0;
2732 /* This function is deprecated, please use sequences instead.
2734 Move a consecutive bunch of insns to a different place in the chain.
2735 The insns to be moved are those between FROM and TO.
2736 They are moved to a new position after the insn AFTER.
2737 AFTER must not be FROM or TO or any insn in between.
2739 This function does not know about SEQUENCEs and hence should not be
2740 called after delay-slot filling has been done. */
2743 reorder_insns (from, to, after)
2744 rtx from, to, after;
2746 /* Splice this bunch out of where it is now. */
2747 if (PREV_INSN (from))
2748 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2750 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2751 if (last_insn == to)
2752 last_insn = PREV_INSN (from);
2753 if (first_insn == from)
2754 first_insn = NEXT_INSN (to);
2756 /* Make the new neighbors point to it and it to them. */
2757 if (NEXT_INSN (after))
2758 PREV_INSN (NEXT_INSN (after)) = to;
2760 NEXT_INSN (to) = NEXT_INSN (after);
2761 PREV_INSN (from) = after;
2762 NEXT_INSN (after) = from;
2763 if (after == last_insn)
2767 /* Return the line note insn preceding INSN. */
2770 find_line_note (insn)
2773 if (no_line_numbers)
2776 for (; insn; insn = PREV_INSN (insn))
2777 if (GET_CODE (insn) == NOTE
2778 && NOTE_LINE_NUMBER (insn) >= 0)
2784 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2785 of the moved insns when debugging. This may insert a note between AFTER
2786 and FROM, and another one after TO. */
2789 reorder_insns_with_line_notes (from, to, after)
2790 rtx from, to, after;
2792 rtx from_line = find_line_note (from);
2793 rtx after_line = find_line_note (after);
2795 reorder_insns (from, to, after);
2797 if (from_line == after_line)
2801 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2802 NOTE_LINE_NUMBER (from_line),
2805 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2806 NOTE_LINE_NUMBER (after_line),
2810 /* Remove unnecessary notes from the instruction stream. */
2813 remove_unnecessary_notes ()
2818 /* We must not remove the first instruction in the function because
2819 the compiler depends on the first instruction being a note. */
2820 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2822 /* Remember what's next. */
2823 next = NEXT_INSN (insn);
2825 /* We're only interested in notes. */
2826 if (GET_CODE (insn) != NOTE)
2829 /* By now, all notes indicating lexical blocks should have
2830 NOTE_BLOCK filled in. */
2831 if ((NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_BEG
2832 || NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2833 && NOTE_BLOCK (insn) == NULL_TREE)
2836 /* Remove NOTE_INSN_DELETED notes. */
2837 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
2839 else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_BLOCK_END)
2841 /* Scan back to see if there are any non-note instructions
2842 between INSN and the beginning of this block. If not,
2843 then there is no PC range in the generated code that will
2844 actually be in this block, so there's no point in
2845 remembering the existence of the block. */
2848 for (prev = PREV_INSN (insn); prev; prev = PREV_INSN (prev))
2850 /* This block contains a real instruction. Note that we
2851 don't include labels; if the only thing in the block
2852 is a label, then there are still no PC values that
2853 lie within the block. */
2857 /* We're only interested in NOTEs. */
2858 if (GET_CODE (prev) != NOTE)
2861 if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_BEG)
2863 /* If the BLOCKs referred to by these notes don't
2864 match, then something is wrong with our BLOCK
2865 nesting structure. */
2866 if (NOTE_BLOCK (prev) != NOTE_BLOCK (insn))
2869 if (debug_ignore_block (NOTE_BLOCK (insn)))
2876 else if (NOTE_LINE_NUMBER (prev) == NOTE_INSN_BLOCK_END)
2877 /* There's a nested block. We need to leave the
2878 current block in place since otherwise the debugger
2879 wouldn't be able to show symbols from our block in
2880 the nested block. */
2888 /* Emit an insn of given code and pattern
2889 at a specified place within the doubly-linked list. */
2891 /* Make an instruction with body PATTERN
2892 and output it before the instruction BEFORE. */
2895 emit_insn_before (pattern, before)
2896 register rtx pattern, before;
2898 register rtx insn = before;
2900 if (GET_CODE (pattern) == SEQUENCE)
2904 for (i = 0; i < XVECLEN (pattern, 0); i++)
2906 insn = XVECEXP (pattern, 0, i);
2907 add_insn_before (insn, before);
2912 insn = make_insn_raw (pattern);
2913 add_insn_before (insn, before);
2919 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2922 emit_block_insn_before (pattern, before, block)
2923 rtx pattern, before;
2926 rtx prev = PREV_INSN (before);
2927 rtx r = emit_insn_before (pattern, before);
2928 if (block && block->head == before)
2929 block->head = NEXT_INSN (prev);
2933 /* Make an instruction with body PATTERN and code JUMP_INSN
2934 and output it before the instruction BEFORE. */
2937 emit_jump_insn_before (pattern, before)
2938 register rtx pattern, before;
2942 if (GET_CODE (pattern) == SEQUENCE)
2943 insn = emit_insn_before (pattern, before);
2946 insn = make_jump_insn_raw (pattern);
2947 add_insn_before (insn, before);
2953 /* Make an instruction with body PATTERN and code CALL_INSN
2954 and output it before the instruction BEFORE. */
2957 emit_call_insn_before (pattern, before)
2958 register rtx pattern, before;
2962 if (GET_CODE (pattern) == SEQUENCE)
2963 insn = emit_insn_before (pattern, before);
2966 insn = make_call_insn_raw (pattern);
2967 add_insn_before (insn, before);
2968 PUT_CODE (insn, CALL_INSN);
2974 /* Make an insn of code BARRIER
2975 and output it before the insn BEFORE. */
2978 emit_barrier_before (before)
2979 register rtx before;
2981 register rtx insn = rtx_alloc (BARRIER);
2983 INSN_UID (insn) = cur_insn_uid++;
2985 add_insn_before (insn, before);
2989 /* Emit the label LABEL before the insn BEFORE. */
2992 emit_label_before (label, before)
2995 /* This can be called twice for the same label as a result of the
2996 confusion that follows a syntax error! So make it harmless. */
2997 if (INSN_UID (label) == 0)
2999 INSN_UID (label) = cur_insn_uid++;
3000 add_insn_before (label, before);
3006 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3009 emit_note_before (subtype, before)
3013 register rtx note = rtx_alloc (NOTE);
3014 INSN_UID (note) = cur_insn_uid++;
3015 NOTE_SOURCE_FILE (note) = 0;
3016 NOTE_LINE_NUMBER (note) = subtype;
3018 add_insn_before (note, before);
3022 /* Make an insn of code INSN with body PATTERN
3023 and output it after the insn AFTER. */
3026 emit_insn_after (pattern, after)
3027 register rtx pattern, after;
3029 register rtx insn = after;
3031 if (GET_CODE (pattern) == SEQUENCE)
3035 for (i = 0; i < XVECLEN (pattern, 0); i++)
3037 insn = XVECEXP (pattern, 0, i);
3038 add_insn_after (insn, after);
3044 insn = make_insn_raw (pattern);
3045 add_insn_after (insn, after);
3051 /* Similar to emit_insn_after, except that line notes are to be inserted so
3052 as to act as if this insn were at FROM. */
3055 emit_insn_after_with_line_notes (pattern, after, from)
3056 rtx pattern, after, from;
3058 rtx from_line = find_line_note (from);
3059 rtx after_line = find_line_note (after);
3060 rtx insn = emit_insn_after (pattern, after);
3063 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
3064 NOTE_LINE_NUMBER (from_line),
3068 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
3069 NOTE_LINE_NUMBER (after_line),
3073 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3076 emit_block_insn_after (pattern, after, block)
3080 rtx r = emit_insn_after (pattern, after);
3081 if (block && block->end == after)
3086 /* Make an insn of code JUMP_INSN with body PATTERN
3087 and output it after the insn AFTER. */
3090 emit_jump_insn_after (pattern, after)
3091 register rtx pattern, after;
3095 if (GET_CODE (pattern) == SEQUENCE)
3096 insn = emit_insn_after (pattern, after);
3099 insn = make_jump_insn_raw (pattern);
3100 add_insn_after (insn, after);
3106 /* Make an insn of code BARRIER
3107 and output it after the insn AFTER. */
3110 emit_barrier_after (after)
3113 register rtx insn = rtx_alloc (BARRIER);
3115 INSN_UID (insn) = cur_insn_uid++;
3117 add_insn_after (insn, after);
3121 /* Emit the label LABEL after the insn AFTER. */
3124 emit_label_after (label, after)
3127 /* This can be called twice for the same label
3128 as a result of the confusion that follows a syntax error!
3129 So make it harmless. */
3130 if (INSN_UID (label) == 0)
3132 INSN_UID (label) = cur_insn_uid++;
3133 add_insn_after (label, after);
3139 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3142 emit_note_after (subtype, after)
3146 register rtx note = rtx_alloc (NOTE);
3147 INSN_UID (note) = cur_insn_uid++;
3148 NOTE_SOURCE_FILE (note) = 0;
3149 NOTE_LINE_NUMBER (note) = subtype;
3150 add_insn_after (note, after);
3154 /* Emit a line note for FILE and LINE after the insn AFTER. */
3157 emit_line_note_after (file, line, after)
3164 if (no_line_numbers && line > 0)
3170 note = rtx_alloc (NOTE);
3171 INSN_UID (note) = cur_insn_uid++;
3172 NOTE_SOURCE_FILE (note) = file;
3173 NOTE_LINE_NUMBER (note) = line;
3174 add_insn_after (note, after);
3178 /* Make an insn of code INSN with pattern PATTERN
3179 and add it to the end of the doubly-linked list.
3180 If PATTERN is a SEQUENCE, take the elements of it
3181 and emit an insn for each element.
3183 Returns the last insn emitted. */
3189 rtx insn = last_insn;
3191 if (GET_CODE (pattern) == SEQUENCE)
3195 for (i = 0; i < XVECLEN (pattern, 0); i++)
3197 insn = XVECEXP (pattern, 0, i);
3203 insn = make_insn_raw (pattern);
3210 /* Emit the insns in a chain starting with INSN.
3211 Return the last insn emitted. */
3221 rtx next = NEXT_INSN (insn);
3230 /* Emit the insns in a chain starting with INSN and place them in front of
3231 the insn BEFORE. Return the last insn emitted. */
3234 emit_insns_before (insn, before)
3242 rtx next = NEXT_INSN (insn);
3243 add_insn_before (insn, before);
3251 /* Emit the insns in a chain starting with FIRST and place them in back of
3252 the insn AFTER. Return the last insn emitted. */
3255 emit_insns_after (first, after)
3260 register rtx after_after;
3268 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3271 after_after = NEXT_INSN (after);
3273 NEXT_INSN (after) = first;
3274 PREV_INSN (first) = after;
3275 NEXT_INSN (last) = after_after;
3277 PREV_INSN (after_after) = last;
3279 if (after == last_insn)
3284 /* Make an insn of code JUMP_INSN with pattern PATTERN
3285 and add it to the end of the doubly-linked list. */
3288 emit_jump_insn (pattern)
3291 if (GET_CODE (pattern) == SEQUENCE)
3292 return emit_insn (pattern);
3295 register rtx insn = make_jump_insn_raw (pattern);
3301 /* Make an insn of code CALL_INSN with pattern PATTERN
3302 and add it to the end of the doubly-linked list. */
3305 emit_call_insn (pattern)
3308 if (GET_CODE (pattern) == SEQUENCE)
3309 return emit_insn (pattern);
3312 register rtx insn = make_call_insn_raw (pattern);
3314 PUT_CODE (insn, CALL_INSN);
3319 /* Add the label LABEL to the end of the doubly-linked list. */
3325 /* This can be called twice for the same label
3326 as a result of the confusion that follows a syntax error!
3327 So make it harmless. */
3328 if (INSN_UID (label) == 0)
3330 INSN_UID (label) = cur_insn_uid++;
3336 /* Make an insn of code BARRIER
3337 and add it to the end of the doubly-linked list. */
3342 register rtx barrier = rtx_alloc (BARRIER);
3343 INSN_UID (barrier) = cur_insn_uid++;
3348 /* Make an insn of code NOTE
3349 with data-fields specified by FILE and LINE
3350 and add it to the end of the doubly-linked list,
3351 but only if line-numbers are desired for debugging info. */
3354 emit_line_note (file, line)
3358 set_file_and_line_for_stmt (file, line);
3361 if (no_line_numbers)
3365 return emit_note (file, line);
3368 /* Make an insn of code NOTE
3369 with data-fields specified by FILE and LINE
3370 and add it to the end of the doubly-linked list.
3371 If it is a line-number NOTE, omit it if it matches the previous one. */
3374 emit_note (file, line)
3382 if (file && last_filename && !strcmp (file, last_filename)
3383 && line == last_linenum)
3385 last_filename = file;
3386 last_linenum = line;
3389 if (no_line_numbers && line > 0)
3395 note = rtx_alloc (NOTE);
3396 INSN_UID (note) = cur_insn_uid++;
3397 NOTE_SOURCE_FILE (note) = file;
3398 NOTE_LINE_NUMBER (note) = line;
3403 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3406 emit_line_note_force (file, line)
3411 return emit_line_note (file, line);
3414 /* Cause next statement to emit a line note even if the line number
3415 has not changed. This is used at the beginning of a function. */
3418 force_next_line_note ()
3423 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3424 note of this type already exists, remove it first. */
3427 set_unique_reg_note (insn, kind, datum)
3432 rtx note = find_reg_note (insn, kind, NULL_RTX);
3434 /* First remove the note if there already is one. */
3436 remove_note (insn, note);
3438 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3441 /* Return an indication of which type of insn should have X as a body.
3442 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3448 if (GET_CODE (x) == CODE_LABEL)
3450 if (GET_CODE (x) == CALL)
3452 if (GET_CODE (x) == RETURN)
3454 if (GET_CODE (x) == SET)
3456 if (SET_DEST (x) == pc_rtx)
3458 else if (GET_CODE (SET_SRC (x)) == CALL)
3463 if (GET_CODE (x) == PARALLEL)
3466 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3467 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3469 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3470 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3472 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3473 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3479 /* Emit the rtl pattern X as an appropriate kind of insn.
3480 If X is a label, it is simply added into the insn chain. */
3486 enum rtx_code code = classify_insn (x);
3488 if (code == CODE_LABEL)
3489 return emit_label (x);
3490 else if (code == INSN)
3491 return emit_insn (x);
3492 else if (code == JUMP_INSN)
3494 register rtx insn = emit_jump_insn (x);
3495 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
3496 return emit_barrier ();
3499 else if (code == CALL_INSN)
3500 return emit_call_insn (x);
3505 /* Begin emitting insns to a sequence which can be packaged in an
3506 RTL_EXPR. If this sequence will contain something that might cause
3507 the compiler to pop arguments to function calls (because those
3508 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3509 details), use do_pending_stack_adjust before calling this function.
3510 That will ensure that the deferred pops are not accidentally
3511 emitted in the middle of this sequence. */
3516 struct sequence_stack *tem;
3518 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3520 tem->next = seq_stack;
3521 tem->first = first_insn;
3522 tem->last = last_insn;
3523 tem->sequence_rtl_expr = seq_rtl_expr;
3531 /* Similarly, but indicate that this sequence will be placed in T, an
3532 RTL_EXPR. See the documentation for start_sequence for more
3533 information about how to use this function. */
3536 start_sequence_for_rtl_expr (t)
3544 /* Set up the insn chain starting with FIRST as the current sequence,
3545 saving the previously current one. See the documentation for
3546 start_sequence for more information about how to use this function. */
3549 push_to_sequence (first)
3556 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3562 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3565 push_to_full_sequence (first, last)
3571 /* We really should have the end of the insn chain here. */
3572 if (last && NEXT_INSN (last))
3576 /* Set up the outer-level insn chain
3577 as the current sequence, saving the previously current one. */
3580 push_topmost_sequence ()
3582 struct sequence_stack *stack, *top = NULL;
3586 for (stack = seq_stack; stack; stack = stack->next)
3589 first_insn = top->first;
3590 last_insn = top->last;
3591 seq_rtl_expr = top->sequence_rtl_expr;
3594 /* After emitting to the outer-level insn chain, update the outer-level
3595 insn chain, and restore the previous saved state. */
3598 pop_topmost_sequence ()
3600 struct sequence_stack *stack, *top = NULL;
3602 for (stack = seq_stack; stack; stack = stack->next)
3605 top->first = first_insn;
3606 top->last = last_insn;
3607 /* ??? Why don't we save seq_rtl_expr here? */
3612 /* After emitting to a sequence, restore previous saved state.
3614 To get the contents of the sequence just made, you must call
3615 `gen_sequence' *before* calling here.
3617 If the compiler might have deferred popping arguments while
3618 generating this sequence, and this sequence will not be immediately
3619 inserted into the instruction stream, use do_pending_stack_adjust
3620 before calling gen_sequence. That will ensure that the deferred
3621 pops are inserted into this sequence, and not into some random
3622 location in the instruction stream. See INHIBIT_DEFER_POP for more
3623 information about deferred popping of arguments. */
3628 struct sequence_stack *tem = seq_stack;
3630 first_insn = tem->first;
3631 last_insn = tem->last;
3632 seq_rtl_expr = tem->sequence_rtl_expr;
3633 seq_stack = tem->next;
3638 /* This works like end_sequence, but records the old sequence in FIRST
3642 end_full_sequence (first, last)
3645 *first = first_insn;
3650 /* Return 1 if currently emitting into a sequence. */
3655 return seq_stack != 0;
3658 /* Generate a SEQUENCE rtx containing the insns already emitted
3659 to the current sequence.
3661 This is how the gen_... function from a DEFINE_EXPAND
3662 constructs the SEQUENCE that it returns. */
3672 /* Count the insns in the chain. */
3674 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3677 /* If only one insn, return it rather than a SEQUENCE.
3678 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3679 the case of an empty list.)
3680 We only return the pattern of an insn if its code is INSN and it
3681 has no notes. This ensures that no information gets lost. */
3683 && ! RTX_FRAME_RELATED_P (first_insn)
3684 && GET_CODE (first_insn) == INSN
3685 /* Don't throw away any reg notes. */
3686 && REG_NOTES (first_insn) == 0)
3687 return PATTERN (first_insn);
3689 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3691 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3692 XVECEXP (result, 0, i) = tem;
3697 /* Put the various virtual registers into REGNO_REG_RTX. */
3700 init_virtual_regs (es)
3701 struct emit_status *es;
3703 rtx *ptr = es->x_regno_reg_rtx;
3704 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3705 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3706 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3707 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3708 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3712 clear_emit_caches ()
3716 /* Clear the start_sequence/gen_sequence cache. */
3717 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3718 sequence_result[i] = 0;
3722 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3723 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3724 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3725 static int copy_insn_n_scratches;
3727 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3728 copied an ASM_OPERANDS.
3729 In that case, it is the original input-operand vector. */
3730 static rtvec orig_asm_operands_vector;
3732 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3733 copied an ASM_OPERANDS.
3734 In that case, it is the copied input-operand vector. */
3735 static rtvec copy_asm_operands_vector;
3737 /* Likewise for the constraints vector. */
3738 static rtvec orig_asm_constraints_vector;
3739 static rtvec copy_asm_constraints_vector;
3741 /* Recursively create a new copy of an rtx for copy_insn.
3742 This function differs from copy_rtx in that it handles SCRATCHes and
3743 ASM_OPERANDs properly.
3744 Normally, this function is not used directly; use copy_insn as front end.
3745 However, you could first copy an insn pattern with copy_insn and then use
3746 this function afterwards to properly copy any REG_NOTEs containing
3755 register RTX_CODE code;
3756 register const char *format_ptr;
3758 code = GET_CODE (orig);
3774 for (i = 0; i < copy_insn_n_scratches; i++)
3775 if (copy_insn_scratch_in[i] == orig)
3776 return copy_insn_scratch_out[i];
3780 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3781 a LABEL_REF, it isn't sharable. */
3782 if (GET_CODE (XEXP (orig, 0)) == PLUS
3783 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3784 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3788 /* A MEM with a constant address is not sharable. The problem is that
3789 the constant address may need to be reloaded. If the mem is shared,
3790 then reloading one copy of this mem will cause all copies to appear
3791 to have been reloaded. */
3797 copy = rtx_alloc (code);
3799 /* Copy the various flags, and other information. We assume that
3800 all fields need copying, and then clear the fields that should
3801 not be copied. That is the sensible default behavior, and forces
3802 us to explicitly document why we are *not* copying a flag. */
3803 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3805 /* We do not copy the USED flag, which is used as a mark bit during
3806 walks over the RTL. */
3809 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3810 if (GET_RTX_CLASS (code) == 'i')
3814 copy->frame_related = 0;
3817 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3819 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3821 copy->fld[i] = orig->fld[i];
3822 switch (*format_ptr++)
3825 if (XEXP (orig, i) != NULL)
3826 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3831 if (XVEC (orig, i) == orig_asm_constraints_vector)
3832 XVEC (copy, i) = copy_asm_constraints_vector;
3833 else if (XVEC (orig, i) == orig_asm_operands_vector)
3834 XVEC (copy, i) = copy_asm_operands_vector;
3835 else if (XVEC (orig, i) != NULL)
3837 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3838 for (j = 0; j < XVECLEN (copy, i); j++)
3839 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3850 /* These are left unchanged. */
3858 if (code == SCRATCH)
3860 i = copy_insn_n_scratches++;
3861 if (i >= MAX_RECOG_OPERANDS)
3863 copy_insn_scratch_in[i] = orig;
3864 copy_insn_scratch_out[i] = copy;
3866 else if (code == ASM_OPERANDS)
3868 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
3869 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
3870 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
3871 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
3877 /* Create a new copy of an rtx.
3878 This function differs from copy_rtx in that it handles SCRATCHes and
3879 ASM_OPERANDs properly.
3880 INSN doesn't really have to be a full INSN; it could be just the
3886 copy_insn_n_scratches = 0;
3887 orig_asm_operands_vector = 0;
3888 orig_asm_constraints_vector = 0;
3889 copy_asm_operands_vector = 0;
3890 copy_asm_constraints_vector = 0;
3891 return copy_insn_1 (insn);
3894 /* Initialize data structures and variables in this file
3895 before generating rtl for each function. */
3900 struct function *f = cfun;
3902 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3905 seq_rtl_expr = NULL;
3907 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3910 first_label_num = label_num;
3914 clear_emit_caches ();
3916 /* Init the tables that describe all the pseudo regs. */
3918 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3920 f->emit->regno_pointer_flag
3921 = (char *) xcalloc (f->emit->regno_pointer_flag_length, sizeof (char));
3923 f->emit->regno_pointer_align
3924 = (unsigned char *) xcalloc (f->emit->regno_pointer_flag_length,
3925 sizeof (unsigned char));
3928 = (rtx *) xcalloc (f->emit->regno_pointer_flag_length * sizeof (rtx),
3931 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3932 init_virtual_regs (f->emit);
3934 /* Indicate that the virtual registers and stack locations are
3936 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3937 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3938 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3939 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3941 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3942 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3943 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3944 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3945 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3947 #ifdef STACK_BOUNDARY
3948 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
3949 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3950 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
3951 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
3953 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
3954 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
3955 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
3956 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
3957 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
3960 #ifdef INIT_EXPANDERS
3965 /* Mark SS for GC. */
3968 mark_sequence_stack (ss)
3969 struct sequence_stack *ss;
3973 ggc_mark_rtx (ss->first);
3974 ggc_mark_tree (ss->sequence_rtl_expr);
3979 /* Mark ES for GC. */
3982 mark_emit_status (es)
3983 struct emit_status *es;
3991 for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
3995 mark_sequence_stack (es->sequence_stack);
3996 ggc_mark_tree (es->sequence_rtl_expr);
3997 ggc_mark_rtx (es->x_first_insn);
4000 /* Create some permanent unique rtl objects shared between all functions.
4001 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4004 init_emit_once (line_numbers)
4008 enum machine_mode mode;
4009 enum machine_mode double_mode;
4011 /* Initialize the CONST_INT hash table. */
4012 const_int_htab = htab_create (37, const_int_htab_hash,
4013 const_int_htab_eq, NULL);
4014 ggc_add_root (&const_int_htab, 1, sizeof (const_int_htab),
4017 no_line_numbers = ! line_numbers;
4019 /* Compute the word and byte modes. */
4021 byte_mode = VOIDmode;
4022 word_mode = VOIDmode;
4023 double_mode = VOIDmode;
4025 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4026 mode = GET_MODE_WIDER_MODE (mode))
4028 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
4029 && byte_mode == VOIDmode)
4032 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
4033 && word_mode == VOIDmode)
4037 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4038 mode = GET_MODE_WIDER_MODE (mode))
4040 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
4041 && double_mode == VOIDmode)
4045 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
4047 /* Assign register numbers to the globally defined register rtx.
4048 This must be done at runtime because the register number field
4049 is in a union and some compilers can't initialize unions. */
4051 pc_rtx = gen_rtx (PC, VOIDmode);
4052 cc0_rtx = gen_rtx (CC0, VOIDmode);
4053 stack_pointer_rtx = gen_rtx_raw_REG (Pmode, STACK_POINTER_REGNUM);
4054 frame_pointer_rtx = gen_rtx_raw_REG (Pmode, FRAME_POINTER_REGNUM);
4055 if (hard_frame_pointer_rtx == 0)
4056 hard_frame_pointer_rtx = gen_rtx_raw_REG (Pmode,
4057 HARD_FRAME_POINTER_REGNUM);
4058 if (arg_pointer_rtx == 0)
4059 arg_pointer_rtx = gen_rtx_raw_REG (Pmode, ARG_POINTER_REGNUM);
4060 virtual_incoming_args_rtx =
4061 gen_rtx_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
4062 virtual_stack_vars_rtx =
4063 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
4064 virtual_stack_dynamic_rtx =
4065 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
4066 virtual_outgoing_args_rtx =
4067 gen_rtx_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
4068 virtual_cfa_rtx = gen_rtx_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
4070 /* These rtx must be roots if GC is enabled. */
4071 ggc_add_rtx_root (global_rtl, GR_MAX);
4073 #ifdef INIT_EXPANDERS
4074 /* This is to initialize save_machine_status and restore_machine_status before
4075 the first call to push_function_context_to. This is needed by the Chill
4076 front end which calls push_function_context_to before the first cal to
4077 init_function_start. */
4081 /* Create the unique rtx's for certain rtx codes and operand values. */
4083 /* Don't use gen_rtx here since gen_rtx in this case
4084 tries to use these variables. */
4085 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
4086 const_int_rtx[i + MAX_SAVED_CONST_INT] =
4087 gen_rtx_raw_CONST_INT (VOIDmode, i);
4088 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
4090 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
4091 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
4092 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
4094 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
4096 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
4097 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
4098 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
4099 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
4101 for (i = 0; i <= 2; i++)
4103 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
4104 mode = GET_MODE_WIDER_MODE (mode))
4106 rtx tem = rtx_alloc (CONST_DOUBLE);
4107 union real_extract u;
4109 memset ((char *) &u, 0, sizeof u); /* Zero any holes in a structure. */
4110 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
4112 memcpy (&CONST_DOUBLE_LOW (tem), &u, sizeof u);
4113 CONST_DOUBLE_MEM (tem) = cc0_rtx;
4114 CONST_DOUBLE_CHAIN (tem) = NULL_RTX;
4115 PUT_MODE (tem, mode);
4117 const_tiny_rtx[i][(int) mode] = tem;
4120 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
4122 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
4123 mode = GET_MODE_WIDER_MODE (mode))
4124 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4126 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
4128 mode = GET_MODE_WIDER_MODE (mode))
4129 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
4132 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
4133 if (GET_MODE_CLASS (mode) == MODE_CC)
4134 const_tiny_rtx[0][(int) mode] = const0_rtx;
4136 const_tiny_rtx[0][(int) BImode] = const0_rtx;
4137 if (STORE_FLAG_VALUE == 1)
4138 const_tiny_rtx[1][(int) BImode] = const1_rtx;
4140 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4141 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4142 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4143 ggc_add_rtx_root ((rtx *) const_tiny_rtx, sizeof const_tiny_rtx / sizeof (rtx));
4144 ggc_add_rtx_root (&const_true_rtx, 1);
4146 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4147 return_address_pointer_rtx
4148 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
4152 struct_value_rtx = STRUCT_VALUE;
4154 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
4157 #ifdef STRUCT_VALUE_INCOMING
4158 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
4160 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4161 struct_value_incoming_rtx
4162 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
4164 struct_value_incoming_rtx = struct_value_rtx;
4168 #ifdef STATIC_CHAIN_REGNUM
4169 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
4171 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4172 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
4173 static_chain_incoming_rtx
4174 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
4177 static_chain_incoming_rtx = static_chain_rtx;
4181 static_chain_rtx = STATIC_CHAIN;
4183 #ifdef STATIC_CHAIN_INCOMING
4184 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
4186 static_chain_incoming_rtx = static_chain_rtx;
4190 #ifdef PIC_OFFSET_TABLE_REGNUM
4191 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
4194 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
4195 ggc_add_rtx_root (&struct_value_rtx, 1);
4196 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4197 ggc_add_rtx_root (&static_chain_rtx, 1);
4198 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4199 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4202 /* Query and clear/ restore no_line_numbers. This is used by the
4203 switch / case handling in stmt.c to give proper line numbers in
4204 warnings about unreachable code. */
4207 force_line_numbers ()
4209 int old = no_line_numbers;
4211 no_line_numbers = 0;
4213 force_next_line_note ();
4218 restore_line_number_status (old_value)
4221 no_line_numbers = old_value;