1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
51 #include "hard-reg-set.h"
52 #include "insn-config.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
64 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
65 After rtl generation, it is 1 plus the largest register number used. */
67 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
69 /* This is *not* reset after each function. It gives each CODE_LABEL
70 in the entire compilation a unique label number. */
72 static int label_num = 1;
74 /* Lowest label number in current function. */
76 static int first_label_num;
78 /* Highest label number in current function.
79 Zero means use the value of label_num instead.
80 This is nonzero only when belatedly compiling an inline function. */
82 static int last_label_num;
84 /* Value label_num had when set_new_first_and_last_label_number was called.
85 If label_num has not changed since then, last_label_num is valid. */
87 static int base_label_num;
89 /* Nonzero means do not generate NOTEs for source line numbers. */
91 static int no_line_numbers;
93 /* Commonly used rtx's, so that we only need space for one copy.
94 These are initialized once for the entire compilation.
95 All of these except perhaps the floating-point CONST_DOUBLEs
96 are unique; no other rtx-object will be equal to any of these. */
98 struct _global_rtl global_rtl =
100 {PC, VOIDmode}, /* pc_rtx */
101 {CC0, VOIDmode}, /* cc0_rtx */
102 {REG}, /* stack_pointer_rtx */
103 {REG}, /* frame_pointer_rtx */
104 {REG}, /* hard_frame_pointer_rtx */
105 {REG}, /* arg_pointer_rtx */
106 {REG}, /* virtual_incoming_args_rtx */
107 {REG}, /* virtual_stack_vars_rtx */
108 {REG}, /* virtual_stack_dynamic_rtx */
109 {REG}, /* virtual_outgoing_args_rtx */
112 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
113 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
114 record a copy of const[012]_rtx. */
116 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
120 REAL_VALUE_TYPE dconst0;
121 REAL_VALUE_TYPE dconst1;
122 REAL_VALUE_TYPE dconst2;
123 REAL_VALUE_TYPE dconstm1;
125 /* All references to the following fixed hard registers go through
126 these unique rtl objects. On machines where the frame-pointer and
127 arg-pointer are the same register, they use the same unique object.
129 After register allocation, other rtl objects which used to be pseudo-regs
130 may be clobbered to refer to the frame-pointer register.
131 But references that were originally to the frame-pointer can be
132 distinguished from the others because they contain frame_pointer_rtx.
134 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
135 tricky: until register elimination has taken place hard_frame_pointer_rtx
136 should be used if it is being set, and frame_pointer_rtx otherwise. After
137 register elimination hard_frame_pointer_rtx should always be used.
138 On machines where the two registers are same (most) then these are the
141 In an inline procedure, the stack and frame pointer rtxs may not be
142 used for anything else. */
143 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
144 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
145 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
146 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
147 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
149 /* This is used to implement __builtin_return_address for some machines.
150 See for instance the MIPS port. */
151 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
153 /* We make one copy of (const_int C) where C is in
154 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
155 to save space during the compilation and simplify comparisons of
158 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
160 /* The ends of the doubly-linked chain of rtl for the current function.
161 Both are reset to null at the start of rtl generation for the function.
163 start_sequence saves both of these on `sequence_stack' along with
164 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
166 static rtx first_insn = NULL;
167 static rtx last_insn = NULL;
169 /* RTL_EXPR within which the current sequence will be placed. Use to
170 prevent reuse of any temporaries within the sequence until after the
171 RTL_EXPR is emitted. */
173 tree sequence_rtl_expr = NULL;
175 /* INSN_UID for next insn emitted.
176 Reset to 1 for each function compiled. */
178 static int cur_insn_uid = 1;
180 /* Line number and source file of the last line-number NOTE emitted.
181 This is used to avoid generating duplicates. */
183 static int last_linenum = 0;
184 static char *last_filename = 0;
186 /* A vector indexed by pseudo reg number. The allocated length
187 of this vector is regno_pointer_flag_length. Since this
188 vector is needed during the expansion phase when the total
189 number of registers in the function is not yet known,
190 it is copied and made bigger when necessary. */
192 char *regno_pointer_flag;
193 int regno_pointer_flag_length;
195 /* Indexed by pseudo register number, if nonzero gives the known alignment
196 for that pseudo (if regno_pointer_flag is set).
197 Allocated in parallel with regno_pointer_flag. */
198 char *regno_pointer_align;
200 /* Indexed by pseudo register number, gives the rtx for that pseudo.
201 Allocated in parallel with regno_pointer_flag. */
205 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
206 Each element describes one pending sequence.
207 The main insn-chain is saved in the last element of the chain,
208 unless the chain is empty. */
210 struct sequence_stack *sequence_stack;
212 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
213 shortly thrown away. We use two mechanisms to prevent this waste:
215 First, we keep a list of the expressions used to represent the sequence
216 stack in sequence_element_free_list.
218 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
219 rtvec for use by gen_sequence. One entry for each size is sufficient
220 because most cases are calls to gen_sequence followed by immediately
221 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
222 destructive on the insn in it anyway and hence can't be redone.
224 We do not bother to save this cached data over nested function calls.
225 Instead, we just reinitialize them. */
227 #define SEQUENCE_RESULT_SIZE 5
229 static struct sequence_stack *sequence_element_free_list;
230 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
232 /* During RTL generation, we also keep a list of free INSN rtl codes. */
233 static rtx free_insn;
235 extern int rtx_equal_function_value_matters;
237 /* Filename and line number of last line-number note,
238 whether we actually emitted it or not. */
239 extern char *emit_filename;
240 extern int emit_lineno;
242 static rtx make_jump_insn_raw PROTO((rtx));
243 static rtx make_call_insn_raw PROTO((rtx));
244 static rtx find_line_note PROTO((rtx));
247 gen_rtx_CONST_INT (mode, arg)
248 enum machine_mode mode;
251 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
252 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
254 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
255 if (const_true_rtx && arg == STORE_FLAG_VALUE)
256 return const_true_rtx;
259 return gen_rtx_raw_CONST_INT (mode, arg);
263 gen_rtx_REG (mode, regno)
264 enum machine_mode mode;
267 /* In case the MD file explicitly references the frame pointer, have
268 all such references point to the same frame pointer. This is
269 used during frame pointer elimination to distinguish the explicit
270 references to these registers from pseudos that happened to be
273 If we have eliminated the frame pointer or arg pointer, we will
274 be using it as a normal register, for example as a spill
275 register. In such cases, we might be accessing it in a mode that
276 is not Pmode and therefore cannot use the pre-allocated rtx.
278 Also don't do this when we are making new REGs in reload, since
279 we don't want to get confused with the real pointers. */
281 if (mode == Pmode && !reload_in_progress)
283 if (regno == FRAME_POINTER_REGNUM)
284 return frame_pointer_rtx;
285 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
286 if (regno == HARD_FRAME_POINTER_REGNUM)
287 return hard_frame_pointer_rtx;
289 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
290 if (regno == ARG_POINTER_REGNUM)
291 return arg_pointer_rtx;
293 #ifdef RETURN_ADDRESS_POINTER_REGNUM
294 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
295 return return_address_pointer_rtx;
297 if (regno == STACK_POINTER_REGNUM)
298 return stack_pointer_rtx;
301 return gen_rtx_raw_REG (mode, regno);
304 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
306 ** This routine generates an RTX of the size specified by
307 ** <code>, which is an RTX code. The RTX structure is initialized
308 ** from the arguments <element1> through <elementn>, which are
309 ** interpreted according to the specific RTX type's format. The
310 ** special machine mode associated with the rtx (if any) is specified
313 ** gen_rtx can be invoked in a way which resembles the lisp-like
314 ** rtx it will generate. For example, the following rtx structure:
316 ** (plus:QI (mem:QI (reg:SI 1))
317 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
319 ** ...would be generated by the following C code:
321 ** gen_rtx (PLUS, QImode,
322 ** gen_rtx (MEM, QImode,
323 ** gen_rtx (REG, SImode, 1)),
324 ** gen_rtx (MEM, QImode,
325 ** gen_rtx (PLUS, SImode,
326 ** gen_rtx (REG, SImode, 2),
327 ** gen_rtx (REG, SImode, 3)))),
332 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
336 enum machine_mode mode;
339 register int i; /* Array indices... */
340 register char *fmt; /* Current rtx's format... */
341 register rtx rt_val; /* RTX to return to caller... */
346 code = va_arg (p, enum rtx_code);
347 mode = va_arg (p, enum machine_mode);
350 if (code == CONST_INT)
351 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
352 else if (code == REG)
353 rt_val = gen_rtx_REG (mode, va_arg (p, int));
356 rt_val = rtx_alloc (code); /* Allocate the storage space. */
357 rt_val->mode = mode; /* Store the machine mode... */
359 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
360 for (i = 0; i < GET_RTX_LENGTH (code); i++)
364 case '0': /* Unused field. */
367 case 'i': /* An integer? */
368 XINT (rt_val, i) = va_arg (p, int);
371 case 'w': /* A wide integer? */
372 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
375 case 's': /* A string? */
376 XSTR (rt_val, i) = va_arg (p, char *);
379 case 'e': /* An expression? */
380 case 'u': /* An insn? Same except when printing. */
381 XEXP (rt_val, i) = va_arg (p, rtx);
384 case 'E': /* An RTX vector? */
385 XVEC (rt_val, i) = va_arg (p, rtvec);
388 case 'b': /* A bitmap? */
389 XBITMAP (rt_val, i) = va_arg (p, bitmap);
392 case 't': /* A tree? */
393 XTREE (rt_val, i) = va_arg (p, tree);
402 return rt_val; /* Return the new RTX... */
405 /* gen_rtvec (n, [rt1, ..., rtn])
407 ** This routine creates an rtvec and stores within it the
408 ** pointers to rtx's which are its arguments.
413 gen_rtvec VPROTO((int n, ...))
429 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
431 vector = (rtx *) alloca (n * sizeof (rtx));
433 for (i = 0; i < n; i++)
434 vector[i] = va_arg (p, rtx);
437 return gen_rtvec_v (n, vector);
441 gen_rtvec_v (n, argp)
446 register rtvec rt_val;
449 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
451 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
453 for (i = 0; i < n; i++)
454 rt_val->elem[i].rtx = *argp++;
460 gen_rtvec_vv (n, argp)
465 register rtvec rt_val;
468 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
470 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
472 for (i = 0; i < n; i++)
473 rt_val->elem[i].rtx = (argp++)->rtx;
478 /* Generate a REG rtx for a new pseudo register of mode MODE.
479 This pseudo is assigned the next sequential register number. */
483 enum machine_mode mode;
487 /* Don't let anything called by or after reload create new registers
488 (actually, registers can't be created after flow, but this is a good
491 if (reload_in_progress || reload_completed)
494 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
495 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
497 /* For complex modes, don't make a single pseudo.
498 Instead, make a CONCAT of two pseudos.
499 This allows noncontiguous allocation of the real and imaginary parts,
500 which makes much better code. Besides, allocating DCmode
501 pseudos overstrains reload on some machines like the 386. */
502 rtx realpart, imagpart;
503 int size = GET_MODE_UNIT_SIZE (mode);
504 enum machine_mode partmode
505 = mode_for_size (size * BITS_PER_UNIT,
506 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
507 ? MODE_FLOAT : MODE_INT),
510 realpart = gen_reg_rtx (partmode);
511 imagpart = gen_reg_rtx (partmode);
512 return gen_rtx_CONCAT (mode, realpart, imagpart);
515 /* Make sure regno_pointer_flag and regno_reg_rtx are large
516 enough to have an element for this pseudo reg number. */
518 if (reg_rtx_no == regno_pointer_flag_length)
522 (char *) savealloc (regno_pointer_flag_length * 2);
523 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
524 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
525 regno_pointer_flag = new;
527 new = (char *) savealloc (regno_pointer_flag_length * 2);
528 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
529 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
530 regno_pointer_align = new;
532 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
533 bcopy ((char *) regno_reg_rtx, (char *) new1,
534 regno_pointer_flag_length * sizeof (rtx));
535 bzero ((char *) &new1[regno_pointer_flag_length],
536 regno_pointer_flag_length * sizeof (rtx));
537 regno_reg_rtx = new1;
539 regno_pointer_flag_length *= 2;
542 val = gen_rtx_raw_REG (mode, reg_rtx_no);
543 regno_reg_rtx[reg_rtx_no++] = val;
547 /* Identify REG (which may be a CONCAT) as a user register. */
553 if (GET_CODE (reg) == CONCAT)
555 REG_USERVAR_P (XEXP (reg, 0)) = 1;
556 REG_USERVAR_P (XEXP (reg, 1)) = 1;
558 else if (GET_CODE (reg) == REG)
559 REG_USERVAR_P (reg) = 1;
564 /* Identify REG as a probable pointer register and show its alignment
565 as ALIGN, if nonzero. */
568 mark_reg_pointer (reg, align)
572 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
575 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
578 /* Return 1 plus largest pseudo reg number used in the current function. */
586 /* Return 1 + the largest label number used so far in the current function. */
591 if (last_label_num && label_num == base_label_num)
592 return last_label_num;
596 /* Return first label number used in this function (if any were used). */
599 get_first_label_num ()
601 return first_label_num;
604 /* Return a value representing some low-order bits of X, where the number
605 of low-order bits is given by MODE. Note that no conversion is done
606 between floating-point and fixed-point values, rather, the bit
607 representation is returned.
609 This function handles the cases in common between gen_lowpart, below,
610 and two variants in cse.c and combine.c. These are the cases that can
611 be safely handled at all points in the compilation.
613 If this is not a case we can handle, return 0. */
616 gen_lowpart_common (mode, x)
617 enum machine_mode mode;
622 if (GET_MODE (x) == mode)
625 /* MODE must occupy no more words than the mode of X. */
626 if (GET_MODE (x) != VOIDmode
627 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
628 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
632 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
633 word = ((GET_MODE_SIZE (GET_MODE (x))
634 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
637 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
638 && (GET_MODE_CLASS (mode) == MODE_INT
639 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
641 /* If we are getting the low-order part of something that has been
642 sign- or zero-extended, we can either just use the object being
643 extended or make a narrower extension. If we want an even smaller
644 piece than the size of the object being extended, call ourselves
647 This case is used mostly by combine and cse. */
649 if (GET_MODE (XEXP (x, 0)) == mode)
651 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
652 return gen_lowpart_common (mode, XEXP (x, 0));
653 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
654 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
656 else if (GET_CODE (x) == SUBREG
657 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
658 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
659 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
661 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
662 else if (GET_CODE (x) == REG)
664 /* Let the backend decide how many registers to skip. This is needed
665 in particular for Sparc64 where fp regs are smaller than a word. */
666 /* ??? Note that subregs are now ambiguous, in that those against
667 pseudos are sized by the Word Size, while those against hard
668 regs are sized by the underlying register size. Better would be
669 to always interpret the subreg offset parameter as bytes or bits. */
671 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
672 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
673 - HARD_REGNO_NREGS (REGNO (x), mode));
675 /* If the register is not valid for MODE, return 0. If we don't
676 do this, there is no way to fix up the resulting REG later.
677 But we do do this if the current REG is not valid for its
678 mode. This latter is a kludge, but is required due to the
679 way that parameters are passed on some machines, most
681 if (REGNO (x) < FIRST_PSEUDO_REGISTER
682 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
683 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
685 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
686 /* integrate.c can't handle parts of a return value register. */
687 && (! REG_FUNCTION_VALUE_P (x)
688 || ! rtx_equal_function_value_matters)
689 #ifdef CLASS_CANNOT_CHANGE_SIZE
690 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
691 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
692 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
693 && (TEST_HARD_REG_BIT
694 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
697 /* We want to keep the stack, frame, and arg pointers
699 && x != frame_pointer_rtx
700 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
701 && x != arg_pointer_rtx
703 && x != stack_pointer_rtx)
704 return gen_rtx_REG (mode, REGNO (x) + word);
706 return gen_rtx_SUBREG (mode, x, word);
708 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
709 from the low-order part of the constant. */
710 else if ((GET_MODE_CLASS (mode) == MODE_INT
711 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
712 && GET_MODE (x) == VOIDmode
713 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
715 /* If MODE is twice the host word size, X is already the desired
716 representation. Otherwise, if MODE is wider than a word, we can't
717 do this. If MODE is exactly a word, return just one CONST_INT.
718 If MODE is smaller than a word, clear the bits that don't belong
719 in our mode, unless they and our sign bit are all one. So we get
720 either a reasonable negative value or a reasonable unsigned value
723 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
725 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
727 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
728 return (GET_CODE (x) == CONST_INT ? x
729 : GEN_INT (CONST_DOUBLE_LOW (x)));
732 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
733 int width = GET_MODE_BITSIZE (mode);
734 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
735 : CONST_DOUBLE_LOW (x));
737 /* Sign extend to HOST_WIDE_INT. */
738 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
740 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
745 /* If X is an integral constant but we want it in floating-point, it
746 must be the case that we have a union of an integer and a floating-point
747 value. If the machine-parameters allow it, simulate that union here
748 and return the result. The two-word and single-word cases are
751 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
752 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
753 || flag_pretend_float)
754 && GET_MODE_CLASS (mode) == MODE_FLOAT
755 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
756 && GET_CODE (x) == CONST_INT
757 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
758 #ifdef REAL_ARITHMETIC
764 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
765 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
769 union {HOST_WIDE_INT i; float d; } u;
772 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
775 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
776 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
777 || flag_pretend_float)
778 && GET_MODE_CLASS (mode) == MODE_FLOAT
779 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
780 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
781 && GET_MODE (x) == VOIDmode
782 && (sizeof (double) * HOST_BITS_PER_CHAR
783 == 2 * HOST_BITS_PER_WIDE_INT))
784 #ifdef REAL_ARITHMETIC
788 HOST_WIDE_INT low, high;
790 if (GET_CODE (x) == CONST_INT)
791 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
793 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
795 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
797 if (WORDS_BIG_ENDIAN)
798 i[0] = high, i[1] = low;
800 i[0] = low, i[1] = high;
802 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
803 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
807 union {HOST_WIDE_INT i[2]; double d; } u;
808 HOST_WIDE_INT low, high;
810 if (GET_CODE (x) == CONST_INT)
811 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
813 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
815 #ifdef HOST_WORDS_BIG_ENDIAN
816 u.i[0] = high, u.i[1] = low;
818 u.i[0] = low, u.i[1] = high;
821 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
825 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
826 same as sizeof (double) or when sizeof (float) is larger than the
827 size of a word on the target machine. */
828 #ifdef REAL_ARITHMETIC
829 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
835 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
836 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
840 /* Similarly, if this is converting a floating-point value into a
841 single-word integer. Only do this is the host and target parameters are
844 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
845 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
846 || flag_pretend_float)
847 && (GET_MODE_CLASS (mode) == MODE_INT
848 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
849 && GET_CODE (x) == CONST_DOUBLE
850 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
851 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
852 return operand_subword (x, word, 0, GET_MODE (x));
854 /* Similarly, if this is converting a floating-point value into a
855 two-word integer, we can do this one word at a time and make an
856 integer. Only do this is the host and target parameters are
859 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
860 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
861 || flag_pretend_float)
862 && (GET_MODE_CLASS (mode) == MODE_INT
863 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
864 && GET_CODE (x) == CONST_DOUBLE
865 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
866 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
869 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
871 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
873 if (lowpart && GET_CODE (lowpart) == CONST_INT
874 && highpart && GET_CODE (highpart) == CONST_INT)
875 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
878 /* Otherwise, we can't do this. */
882 /* Return the real part (which has mode MODE) of a complex value X.
883 This always comes at the low address in memory. */
886 gen_realpart (mode, x)
887 enum machine_mode mode;
890 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
892 else if (WORDS_BIG_ENDIAN)
893 return gen_highpart (mode, x);
895 return gen_lowpart (mode, x);
898 /* Return the imaginary part (which has mode MODE) of a complex value X.
899 This always comes at the high address in memory. */
902 gen_imagpart (mode, x)
903 enum machine_mode mode;
906 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
908 else if (WORDS_BIG_ENDIAN)
909 return gen_lowpart (mode, x);
911 return gen_highpart (mode, x);
914 /* Return 1 iff X, assumed to be a SUBREG,
915 refers to the real part of the complex value in its containing reg.
916 Complex values are always stored with the real part in the first word,
917 regardless of WORDS_BIG_ENDIAN. */
920 subreg_realpart_p (x)
923 if (GET_CODE (x) != SUBREG)
926 return SUBREG_WORD (x) == 0;
929 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
930 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
931 least-significant part of X.
932 MODE specifies how big a part of X to return;
933 it usually should not be larger than a word.
934 If X is a MEM whose address is a QUEUED, the value may be so also. */
937 gen_lowpart (mode, x)
938 enum machine_mode mode;
941 rtx result = gen_lowpart_common (mode, x);
945 else if (GET_CODE (x) == REG)
947 /* Must be a hard reg that's not valid in MODE. */
948 result = gen_lowpart_common (mode, copy_to_reg (x));
953 else if (GET_CODE (x) == MEM)
955 /* The only additional case we can do is MEM. */
956 register int offset = 0;
957 if (WORDS_BIG_ENDIAN)
958 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
959 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
961 if (BYTES_BIG_ENDIAN)
962 /* Adjust the address so that the address-after-the-data
964 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
965 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
967 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
969 else if (GET_CODE (x) == ADDRESSOF)
970 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
975 /* Like `gen_lowpart', but refer to the most significant part.
976 This is used to access the imaginary part of a complex number. */
979 gen_highpart (mode, x)
980 enum machine_mode mode;
983 /* This case loses if X is a subreg. To catch bugs early,
984 complain if an invalid MODE is used even in other cases. */
985 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
986 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
988 if (GET_CODE (x) == CONST_DOUBLE
989 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
990 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
993 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
994 else if (GET_CODE (x) == CONST_INT)
996 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
998 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1000 else if (GET_CODE (x) == MEM)
1002 register int offset = 0;
1003 if (! WORDS_BIG_ENDIAN)
1004 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1005 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1007 if (! BYTES_BIG_ENDIAN
1008 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1009 offset -= (GET_MODE_SIZE (mode)
1010 - MIN (UNITS_PER_WORD,
1011 GET_MODE_SIZE (GET_MODE (x))));
1013 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1015 else if (GET_CODE (x) == SUBREG)
1017 /* The only time this should occur is when we are looking at a
1018 multi-word item with a SUBREG whose mode is the same as that of the
1019 item. It isn't clear what we would do if it wasn't. */
1020 if (SUBREG_WORD (x) != 0)
1022 return gen_highpart (mode, SUBREG_REG (x));
1024 else if (GET_CODE (x) == REG)
1028 /* Let the backend decide how many registers to skip. This is needed
1029 in particular for sparc64 where fp regs are smaller than a word. */
1030 /* ??? Note that subregs are now ambiguous, in that those against
1031 pseudos are sized by the word size, while those against hard
1032 regs are sized by the underlying register size. Better would be
1033 to always interpret the subreg offset parameter as bytes or bits. */
1035 if (WORDS_BIG_ENDIAN)
1037 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1038 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1039 - HARD_REGNO_NREGS (REGNO (x), mode));
1041 word = ((GET_MODE_SIZE (GET_MODE (x))
1042 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1045 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1046 /* integrate.c can't handle parts of a return value register. */
1047 && (! REG_FUNCTION_VALUE_P (x)
1048 || ! rtx_equal_function_value_matters)
1049 /* We want to keep the stack, frame, and arg pointers special. */
1050 && x != frame_pointer_rtx
1051 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1052 && x != arg_pointer_rtx
1054 && x != stack_pointer_rtx)
1055 return gen_rtx_REG (mode, REGNO (x) + word);
1057 return gen_rtx_SUBREG (mode, x, word);
1063 /* Return 1 iff X, assumed to be a SUBREG,
1064 refers to the least significant part of its containing reg.
1065 If X is not a SUBREG, always return 1 (it is its own low part!). */
1068 subreg_lowpart_p (x)
1071 if (GET_CODE (x) != SUBREG)
1073 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1076 if (WORDS_BIG_ENDIAN
1077 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1078 return (SUBREG_WORD (x)
1079 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1080 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1083 return SUBREG_WORD (x) == 0;
1086 /* Return subword I of operand OP.
1087 The word number, I, is interpreted as the word number starting at the
1088 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1089 otherwise it is the high-order word.
1091 If we cannot extract the required word, we return zero. Otherwise, an
1092 rtx corresponding to the requested word will be returned.
1094 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1095 reload has completed, a valid address will always be returned. After
1096 reload, if a valid address cannot be returned, we return zero.
1098 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1099 it is the responsibility of the caller.
1101 MODE is the mode of OP in case it is a CONST_INT. */
1104 operand_subword (op, i, validate_address, mode)
1107 int validate_address;
1108 enum machine_mode mode;
1111 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1112 int bits_per_word = BITS_PER_WORD;
1114 if (mode == VOIDmode)
1115 mode = GET_MODE (op);
1117 if (mode == VOIDmode)
1120 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1122 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1123 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1126 /* If OP is already an integer word, return it. */
1127 if (GET_MODE_CLASS (mode) == MODE_INT
1128 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1131 /* If OP is a REG or SUBREG, we can handle it very simply. */
1132 if (GET_CODE (op) == REG)
1134 /* If the register is not valid for MODE, return 0. If we don't
1135 do this, there is no way to fix up the resulting REG later. */
1136 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1137 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1139 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1140 || (REG_FUNCTION_VALUE_P (op)
1141 && rtx_equal_function_value_matters)
1142 /* We want to keep the stack, frame, and arg pointers
1144 || op == frame_pointer_rtx
1145 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1146 || op == arg_pointer_rtx
1148 || op == stack_pointer_rtx)
1149 return gen_rtx_SUBREG (word_mode, op, i);
1151 return gen_rtx_REG (word_mode, REGNO (op) + i);
1153 else if (GET_CODE (op) == SUBREG)
1154 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1155 else if (GET_CODE (op) == CONCAT)
1157 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1159 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1160 return operand_subword (XEXP (op, 1), i - partwords,
1161 validate_address, mode);
1164 /* Form a new MEM at the requested address. */
1165 if (GET_CODE (op) == MEM)
1167 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1170 if (validate_address)
1172 if (reload_completed)
1174 if (! strict_memory_address_p (word_mode, addr))
1178 addr = memory_address (word_mode, addr);
1181 new = gen_rtx_MEM (word_mode, addr);
1183 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1184 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1185 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1190 /* The only remaining cases are when OP is a constant. If the host and
1191 target floating formats are the same, handling two-word floating
1192 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1193 are defined as returning one or two 32 bit values, respectively,
1194 and not values of BITS_PER_WORD bits. */
1195 #ifdef REAL_ARITHMETIC
1196 /* The output is some bits, the width of the target machine's word.
1197 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1199 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1200 && GET_MODE_CLASS (mode) == MODE_FLOAT
1201 && GET_MODE_BITSIZE (mode) == 64
1202 && GET_CODE (op) == CONST_DOUBLE)
1207 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1208 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1210 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1211 which the words are written depends on the word endianness.
1213 ??? This is a potential portability problem and should
1214 be fixed at some point. */
1215 if (BITS_PER_WORD == 32)
1216 return GEN_INT ((HOST_WIDE_INT) k[i]);
1217 #if HOST_BITS_PER_WIDE_INT > 32
1218 else if (BITS_PER_WORD >= 64 && i == 0)
1219 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1220 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1222 else if (BITS_PER_WORD == 16)
1226 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1229 return GEN_INT ((HOST_WIDE_INT) value);
1234 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1235 && GET_MODE_CLASS (mode) == MODE_FLOAT
1236 && GET_MODE_BITSIZE (mode) > 64
1237 && GET_CODE (op) == CONST_DOUBLE)
1242 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1243 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1245 if (BITS_PER_WORD == 32)
1246 return GEN_INT ((HOST_WIDE_INT) k[i]);
1248 #else /* no REAL_ARITHMETIC */
1249 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1250 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1251 || flag_pretend_float)
1252 && GET_MODE_CLASS (mode) == MODE_FLOAT
1253 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1254 && GET_CODE (op) == CONST_DOUBLE)
1256 /* The constant is stored in the host's word-ordering,
1257 but we want to access it in the target's word-ordering. Some
1258 compilers don't like a conditional inside macro args, so we have two
1259 copies of the return. */
1260 #ifdef HOST_WORDS_BIG_ENDIAN
1261 return GEN_INT (i == WORDS_BIG_ENDIAN
1262 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1264 return GEN_INT (i != WORDS_BIG_ENDIAN
1265 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1268 #endif /* no REAL_ARITHMETIC */
1270 /* Single word float is a little harder, since single- and double-word
1271 values often do not have the same high-order bits. We have already
1272 verified that we want the only defined word of the single-word value. */
1273 #ifdef REAL_ARITHMETIC
1274 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1275 && GET_MODE_BITSIZE (mode) == 32
1276 && GET_CODE (op) == CONST_DOUBLE)
1281 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1282 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1284 if (BITS_PER_WORD == 16)
1286 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1290 return GEN_INT ((HOST_WIDE_INT) l);
1293 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1294 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1295 || flag_pretend_float)
1296 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1297 && GET_MODE_CLASS (mode) == MODE_FLOAT
1298 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1299 && GET_CODE (op) == CONST_DOUBLE)
1302 union {float f; HOST_WIDE_INT i; } u;
1304 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1307 return GEN_INT (u.i);
1309 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1310 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1311 || flag_pretend_float)
1312 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1313 && GET_MODE_CLASS (mode) == MODE_FLOAT
1314 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1315 && GET_CODE (op) == CONST_DOUBLE)
1318 union {double d; HOST_WIDE_INT i; } u;
1320 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1323 return GEN_INT (u.i);
1325 #endif /* no REAL_ARITHMETIC */
1327 /* The only remaining cases that we can handle are integers.
1328 Convert to proper endianness now since these cases need it.
1329 At this point, i == 0 means the low-order word.
1331 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1332 in general. However, if OP is (const_int 0), we can just return
1335 if (op == const0_rtx)
1338 if (GET_MODE_CLASS (mode) != MODE_INT
1339 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1340 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1343 if (WORDS_BIG_ENDIAN)
1344 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1346 /* Find out which word on the host machine this value is in and get
1347 it from the constant. */
1348 val = (i / size_ratio == 0
1349 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1350 : (GET_CODE (op) == CONST_INT
1351 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1353 /* Get the value we want into the low bits of val. */
1354 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1355 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1357 /* Clear the bits that don't belong in our mode, unless they and our sign
1358 bit are all one. So we get either a reasonable negative value or a
1359 reasonable unsigned value for this mode. */
1360 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1361 && ((val & ((HOST_WIDE_INT) (-1) << (bits_per_word - 1)))
1362 != ((HOST_WIDE_INT) (-1) << (bits_per_word - 1))))
1363 val &= ((HOST_WIDE_INT) 1 << bits_per_word) - 1;
1365 /* If this would be an entire word for the target, but is not for
1366 the host, then sign-extend on the host so that the number will look
1367 the same way on the host that it would on the target.
1369 For example, when building a 64 bit alpha hosted 32 bit sparc
1370 targeted compiler, then we want the 32 bit unsigned value -1 to be
1371 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
1372 The later confuses the sparc backend. */
1374 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1375 && (val & ((HOST_WIDE_INT) 1 << (bits_per_word - 1))))
1376 val |= ((HOST_WIDE_INT) (-1) << bits_per_word);
1378 return GEN_INT (val);
1381 /* Similar to `operand_subword', but never return 0. If we can't extract
1382 the required subword, put OP into a register and try again. If that fails,
1383 abort. We always validate the address in this case. It is not valid
1384 to call this function after reload; it is mostly meant for RTL
1387 MODE is the mode of OP, in case it is CONST_INT. */
1390 operand_subword_force (op, i, mode)
1393 enum machine_mode mode;
1395 rtx result = operand_subword (op, i, 1, mode);
1400 if (mode != BLKmode && mode != VOIDmode)
1402 /* If this is a register which can not be accessed by words, copy it
1403 to a pseudo register. */
1404 if (GET_CODE (op) == REG)
1405 op = copy_to_reg (op);
1407 op = force_reg (mode, op);
1410 result = operand_subword (op, i, 1, mode);
1417 /* Given a compare instruction, swap the operands.
1418 A test instruction is changed into a compare of 0 against the operand. */
1421 reverse_comparison (insn)
1424 rtx body = PATTERN (insn);
1427 if (GET_CODE (body) == SET)
1428 comp = SET_SRC (body);
1430 comp = SET_SRC (XVECEXP (body, 0, 0));
1432 if (GET_CODE (comp) == COMPARE)
1434 rtx op0 = XEXP (comp, 0);
1435 rtx op1 = XEXP (comp, 1);
1436 XEXP (comp, 0) = op1;
1437 XEXP (comp, 1) = op0;
1441 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1442 if (GET_CODE (body) == SET)
1443 SET_SRC (body) = new;
1445 SET_SRC (XVECEXP (body, 0, 0)) = new;
1449 /* Return a memory reference like MEMREF, but with its mode changed
1450 to MODE and its address changed to ADDR.
1451 (VOIDmode means don't change the mode.
1452 NULL for ADDR means don't change the address.) */
1455 change_address (memref, mode, addr)
1457 enum machine_mode mode;
1462 if (GET_CODE (memref) != MEM)
1464 if (mode == VOIDmode)
1465 mode = GET_MODE (memref);
1467 addr = XEXP (memref, 0);
1469 /* If reload is in progress or has completed, ADDR must be valid.
1470 Otherwise, we can call memory_address to make it valid. */
1471 if (reload_completed || reload_in_progress)
1473 if (! memory_address_p (mode, addr))
1477 addr = memory_address (mode, addr);
1479 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1482 new = gen_rtx_MEM (mode, addr);
1483 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1484 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1485 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1489 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1496 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1497 NULL_RTX, label_num++, NULL_PTR);
1499 LABEL_NUSES (label) = 0;
1503 /* For procedure integration. */
1505 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1506 from a permanent obstack when the opportunity arises. */
1509 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1510 last_labelno, max_parm_regnum, max_regnum, args_size,
1511 pops_args, stack_slots, forced_labels, function_flags,
1512 outgoing_args_size, original_arg_vector,
1513 original_decl_initial, regno_rtx, regno_flag,
1514 regno_align, parm_reg_stack_loc)
1515 rtx first_insn, first_parm_insn;
1516 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1521 int outgoing_args_size;
1522 rtvec original_arg_vector;
1523 rtx original_decl_initial;
1527 rtvec parm_reg_stack_loc;
1529 rtx header = gen_rtx_INLINE_HEADER (VOIDmode,
1530 cur_insn_uid++, NULL_RTX,
1531 first_insn, first_parm_insn,
1532 first_labelno, last_labelno,
1533 max_parm_regnum, max_regnum, args_size,
1534 pops_args, stack_slots, forced_labels,
1535 function_flags, outgoing_args_size,
1536 original_arg_vector,
1537 original_decl_initial,
1538 regno_rtx, regno_flag, regno_align,
1539 parm_reg_stack_loc);
1543 /* Install new pointers to the first and last insns in the chain.
1544 Also, set cur_insn_uid to one higher than the last in use.
1545 Used for an inline-procedure after copying the insn chain. */
1548 set_new_first_and_last_insn (first, last)
1557 for (insn = first; insn; insn = NEXT_INSN (insn))
1558 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1563 /* Set the range of label numbers found in the current function.
1564 This is used when belatedly compiling an inline function. */
1567 set_new_first_and_last_label_num (first, last)
1570 base_label_num = label_num;
1571 first_label_num = first;
1572 last_label_num = last;
1575 /* Save all variables describing the current status into the structure *P.
1576 This is used before starting a nested function. */
1579 save_emit_status (p)
1582 p->reg_rtx_no = reg_rtx_no;
1583 p->first_label_num = first_label_num;
1584 p->first_insn = first_insn;
1585 p->last_insn = last_insn;
1586 p->sequence_rtl_expr = sequence_rtl_expr;
1587 p->sequence_stack = sequence_stack;
1588 p->cur_insn_uid = cur_insn_uid;
1589 p->last_linenum = last_linenum;
1590 p->last_filename = last_filename;
1591 p->regno_pointer_flag = regno_pointer_flag;
1592 p->regno_pointer_align = regno_pointer_align;
1593 p->regno_pointer_flag_length = regno_pointer_flag_length;
1594 p->regno_reg_rtx = regno_reg_rtx;
1597 /* Restore all variables describing the current status from the structure *P.
1598 This is used after a nested function. */
1601 restore_emit_status (p)
1606 reg_rtx_no = p->reg_rtx_no;
1607 first_label_num = p->first_label_num;
1609 first_insn = p->first_insn;
1610 last_insn = p->last_insn;
1611 sequence_rtl_expr = p->sequence_rtl_expr;
1612 sequence_stack = p->sequence_stack;
1613 cur_insn_uid = p->cur_insn_uid;
1614 last_linenum = p->last_linenum;
1615 last_filename = p->last_filename;
1616 regno_pointer_flag = p->regno_pointer_flag;
1617 regno_pointer_align = p->regno_pointer_align;
1618 regno_pointer_flag_length = p->regno_pointer_flag_length;
1619 regno_reg_rtx = p->regno_reg_rtx;
1621 /* Clear our cache of rtx expressions for start_sequence and
1623 sequence_element_free_list = 0;
1624 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1625 sequence_result[i] = 0;
1630 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1631 It does not work to do this twice, because the mark bits set here
1632 are not cleared afterwards. */
1635 unshare_all_rtl (insn)
1638 for (; insn; insn = NEXT_INSN (insn))
1639 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1640 || GET_CODE (insn) == CALL_INSN)
1642 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1643 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1644 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1647 /* Make sure the addresses of stack slots found outside the insn chain
1648 (such as, in DECL_RTL of a variable) are not shared
1649 with the insn chain.
1651 This special care is necessary when the stack slot MEM does not
1652 actually appear in the insn chain. If it does appear, its address
1653 is unshared from all else at that point. */
1655 copy_rtx_if_shared (stack_slot_list);
1658 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1659 Recursively does the same for subexpressions. */
1662 copy_rtx_if_shared (orig)
1665 register rtx x = orig;
1667 register enum rtx_code code;
1668 register char *format_ptr;
1674 code = GET_CODE (x);
1676 /* These types may be freely shared. */
1689 /* SCRATCH must be shared because they represent distinct values. */
1693 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1694 a LABEL_REF, it isn't sharable. */
1695 if (GET_CODE (XEXP (x, 0)) == PLUS
1696 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1697 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1706 /* The chain of insns is not being copied. */
1710 /* A MEM is allowed to be shared if its address is constant
1711 or is a constant plus one of the special registers. */
1712 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1713 || XEXP (x, 0) == virtual_stack_vars_rtx
1714 || XEXP (x, 0) == virtual_incoming_args_rtx)
1717 if (GET_CODE (XEXP (x, 0)) == PLUS
1718 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1719 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1720 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1722 /* This MEM can appear in more than one place,
1723 but its address better not be shared with anything else. */
1725 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1735 /* This rtx may not be shared. If it has already been seen,
1736 replace it with a copy of itself. */
1742 copy = rtx_alloc (code);
1743 bcopy ((char *) x, (char *) copy,
1744 (sizeof (*copy) - sizeof (copy->fld)
1745 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1751 /* Now scan the subexpressions recursively.
1752 We can store any replaced subexpressions directly into X
1753 since we know X is not shared! Any vectors in X
1754 must be copied if X was copied. */
1756 format_ptr = GET_RTX_FORMAT (code);
1758 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1760 switch (*format_ptr++)
1763 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1767 if (XVEC (x, i) != NULL)
1770 int len = XVECLEN (x, i);
1772 if (copied && len > 0)
1773 XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem);
1774 for (j = 0; j < len; j++)
1775 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1783 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1784 to look for shared sub-parts. */
1787 reset_used_flags (x)
1791 register enum rtx_code code;
1792 register char *format_ptr;
1797 code = GET_CODE (x);
1799 /* These types may be freely shared so we needn't do any resetting
1820 /* The chain of insns is not being copied. */
1829 format_ptr = GET_RTX_FORMAT (code);
1830 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1832 switch (*format_ptr++)
1835 reset_used_flags (XEXP (x, i));
1839 for (j = 0; j < XVECLEN (x, i); j++)
1840 reset_used_flags (XVECEXP (x, i, j));
1846 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1847 Return X or the rtx for the pseudo reg the value of X was copied into.
1848 OTHER must be valid as a SET_DEST. */
1851 make_safe_from (x, other)
1855 switch (GET_CODE (other))
1858 other = SUBREG_REG (other);
1860 case STRICT_LOW_PART:
1863 other = XEXP (other, 0);
1869 if ((GET_CODE (other) == MEM
1871 && GET_CODE (x) != REG
1872 && GET_CODE (x) != SUBREG)
1873 || (GET_CODE (other) == REG
1874 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1875 || reg_mentioned_p (other, x))))
1877 rtx temp = gen_reg_rtx (GET_MODE (x));
1878 emit_move_insn (temp, x);
1884 /* Emission of insns (adding them to the doubly-linked list). */
1886 /* Return the first insn of the current sequence or current function. */
1894 /* Return the last insn emitted in current sequence or current function. */
1902 /* Specify a new insn as the last in the chain. */
1905 set_last_insn (insn)
1908 if (NEXT_INSN (insn) != 0)
1913 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1916 get_last_insn_anywhere ()
1918 struct sequence_stack *stack;
1921 for (stack = sequence_stack; stack; stack = stack->next)
1922 if (stack->last != 0)
1927 /* Return a number larger than any instruction's uid in this function. */
1932 return cur_insn_uid;
1935 /* Return the next insn. If it is a SEQUENCE, return the first insn
1944 insn = NEXT_INSN (insn);
1945 if (insn && GET_CODE (insn) == INSN
1946 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1947 insn = XVECEXP (PATTERN (insn), 0, 0);
1953 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1957 previous_insn (insn)
1962 insn = PREV_INSN (insn);
1963 if (insn && GET_CODE (insn) == INSN
1964 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1965 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1971 /* Return the next insn after INSN that is not a NOTE. This routine does not
1972 look inside SEQUENCEs. */
1975 next_nonnote_insn (insn)
1980 insn = NEXT_INSN (insn);
1981 if (insn == 0 || GET_CODE (insn) != NOTE)
1988 /* Return the previous insn before INSN that is not a NOTE. This routine does
1989 not look inside SEQUENCEs. */
1992 prev_nonnote_insn (insn)
1997 insn = PREV_INSN (insn);
1998 if (insn == 0 || GET_CODE (insn) != NOTE)
2005 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2006 or 0, if there is none. This routine does not look inside
2010 next_real_insn (insn)
2015 insn = NEXT_INSN (insn);
2016 if (insn == 0 || GET_CODE (insn) == INSN
2017 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2024 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2025 or 0, if there is none. This routine does not look inside
2029 prev_real_insn (insn)
2034 insn = PREV_INSN (insn);
2035 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2036 || GET_CODE (insn) == JUMP_INSN)
2043 /* Find the next insn after INSN that really does something. This routine
2044 does not look inside SEQUENCEs. Until reload has completed, this is the
2045 same as next_real_insn. */
2048 next_active_insn (insn)
2053 insn = NEXT_INSN (insn);
2055 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2056 || (GET_CODE (insn) == INSN
2057 && (! reload_completed
2058 || (GET_CODE (PATTERN (insn)) != USE
2059 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2066 /* Find the last insn before INSN that really does something. This routine
2067 does not look inside SEQUENCEs. Until reload has completed, this is the
2068 same as prev_real_insn. */
2071 prev_active_insn (insn)
2076 insn = PREV_INSN (insn);
2078 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2079 || (GET_CODE (insn) == INSN
2080 && (! reload_completed
2081 || (GET_CODE (PATTERN (insn)) != USE
2082 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2089 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2097 insn = NEXT_INSN (insn);
2098 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2105 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2113 insn = PREV_INSN (insn);
2114 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2122 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2123 and REG_CC_USER notes so we can find it. */
2126 link_cc0_insns (insn)
2129 rtx user = next_nonnote_insn (insn);
2131 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2132 user = XVECEXP (PATTERN (user), 0, 0);
2134 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2135 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2138 /* Return the next insn that uses CC0 after INSN, which is assumed to
2139 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2140 applied to the result of this function should yield INSN).
2142 Normally, this is simply the next insn. However, if a REG_CC_USER note
2143 is present, it contains the insn that uses CC0.
2145 Return 0 if we can't find the insn. */
2148 next_cc0_user (insn)
2151 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2154 return XEXP (note, 0);
2156 insn = next_nonnote_insn (insn);
2157 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2158 insn = XVECEXP (PATTERN (insn), 0, 0);
2160 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2161 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2167 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2168 note, it is the previous insn. */
2171 prev_cc0_setter (insn)
2174 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2177 return XEXP (note, 0);
2179 insn = prev_nonnote_insn (insn);
2180 if (! sets_cc0_p (PATTERN (insn)))
2187 /* Try splitting insns that can be split for better scheduling.
2188 PAT is the pattern which might split.
2189 TRIAL is the insn providing PAT.
2190 LAST is non-zero if we should return the last insn of the sequence produced.
2192 If this routine succeeds in splitting, it returns the first or last
2193 replacement insn depending on the value of LAST. Otherwise, it
2194 returns TRIAL. If the insn to be returned can be split, it will be. */
2197 try_split (pat, trial, last)
2201 rtx before = PREV_INSN (trial);
2202 rtx after = NEXT_INSN (trial);
2203 rtx seq = split_insns (pat, trial);
2204 int has_barrier = 0;
2207 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2208 We may need to handle this specially. */
2209 if (after && GET_CODE (after) == BARRIER)
2212 after = NEXT_INSN (after);
2217 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2218 The latter case will normally arise only when being done so that
2219 it, in turn, will be split (SFmode on the 29k is an example). */
2220 if (GET_CODE (seq) == SEQUENCE)
2222 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2223 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2224 increment the usage count so we don't delete the label. */
2227 if (GET_CODE (trial) == JUMP_INSN)
2228 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2229 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2231 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2233 if (JUMP_LABEL (trial))
2234 LABEL_NUSES (JUMP_LABEL (trial))++;
2237 tem = emit_insn_after (seq, before);
2239 delete_insn (trial);
2241 emit_barrier_after (tem);
2243 /* Recursively call try_split for each new insn created; by the
2244 time control returns here that insn will be fully split, so
2245 set LAST and continue from the insn after the one returned.
2246 We can't use next_active_insn here since AFTER may be a note.
2247 Ignore deleted insns, which can be occur if not optimizing. */
2248 for (tem = NEXT_INSN (before); tem != after;
2249 tem = NEXT_INSN (tem))
2250 if (! INSN_DELETED_P (tem))
2251 tem = try_split (PATTERN (tem), tem, 1);
2253 /* Avoid infinite loop if the result matches the original pattern. */
2254 else if (rtx_equal_p (seq, pat))
2258 PATTERN (trial) = seq;
2259 INSN_CODE (trial) = -1;
2260 try_split (seq, trial, last);
2263 /* Return either the first or the last insn, depending on which was
2265 return last ? prev_active_insn (after) : next_active_insn (before);
2271 /* Make and return an INSN rtx, initializing all its slots.
2272 Store PATTERN in the pattern slots. */
2275 make_insn_raw (pattern)
2280 /* If in RTL generation phase, see if FREE_INSN can be used. */
2281 if (free_insn != 0 && rtx_equal_function_value_matters)
2284 free_insn = NEXT_INSN (free_insn);
2285 PUT_CODE (insn, INSN);
2288 insn = rtx_alloc (INSN);
2290 INSN_UID (insn) = cur_insn_uid++;
2291 PATTERN (insn) = pattern;
2292 INSN_CODE (insn) = -1;
2293 LOG_LINKS (insn) = NULL;
2294 REG_NOTES (insn) = NULL;
2299 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2302 make_jump_insn_raw (pattern)
2307 insn = rtx_alloc (JUMP_INSN);
2308 INSN_UID (insn) = cur_insn_uid++;
2310 PATTERN (insn) = pattern;
2311 INSN_CODE (insn) = -1;
2312 LOG_LINKS (insn) = NULL;
2313 REG_NOTES (insn) = NULL;
2314 JUMP_LABEL (insn) = NULL;
2319 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2322 make_call_insn_raw (pattern)
2327 insn = rtx_alloc (CALL_INSN);
2328 INSN_UID (insn) = cur_insn_uid++;
2330 PATTERN (insn) = pattern;
2331 INSN_CODE (insn) = -1;
2332 LOG_LINKS (insn) = NULL;
2333 REG_NOTES (insn) = NULL;
2334 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2339 /* Add INSN to the end of the doubly-linked list.
2340 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2346 PREV_INSN (insn) = last_insn;
2347 NEXT_INSN (insn) = 0;
2349 if (NULL != last_insn)
2350 NEXT_INSN (last_insn) = insn;
2352 if (NULL == first_insn)
2358 /* Add INSN into the doubly-linked list after insn AFTER. This and
2359 the next should be the only functions called to insert an insn once
2360 delay slots have been filled since only they know how to update a
2364 add_insn_after (insn, after)
2367 rtx next = NEXT_INSN (after);
2369 if (optimize && INSN_DELETED_P (after))
2372 NEXT_INSN (insn) = next;
2373 PREV_INSN (insn) = after;
2377 PREV_INSN (next) = insn;
2378 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2379 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2381 else if (last_insn == after)
2385 struct sequence_stack *stack = sequence_stack;
2386 /* Scan all pending sequences too. */
2387 for (; stack; stack = stack->next)
2388 if (after == stack->last)
2398 NEXT_INSN (after) = insn;
2399 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2401 rtx sequence = PATTERN (after);
2402 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2406 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2407 the previous should be the only functions called to insert an insn once
2408 delay slots have been filled since only they know how to update a
2412 add_insn_before (insn, before)
2415 rtx prev = PREV_INSN (before);
2417 if (optimize && INSN_DELETED_P (before))
2420 PREV_INSN (insn) = prev;
2421 NEXT_INSN (insn) = before;
2425 NEXT_INSN (prev) = insn;
2426 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2428 rtx sequence = PATTERN (prev);
2429 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2432 else if (first_insn == before)
2436 struct sequence_stack *stack = sequence_stack;
2437 /* Scan all pending sequences too. */
2438 for (; stack; stack = stack->next)
2439 if (before == stack->first)
2441 stack->first = insn;
2449 PREV_INSN (before) = insn;
2450 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2451 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2454 /* Delete all insns made since FROM.
2455 FROM becomes the new last instruction. */
2458 delete_insns_since (from)
2464 NEXT_INSN (from) = 0;
2468 /* This function is deprecated, please use sequences instead.
2470 Move a consecutive bunch of insns to a different place in the chain.
2471 The insns to be moved are those between FROM and TO.
2472 They are moved to a new position after the insn AFTER.
2473 AFTER must not be FROM or TO or any insn in between.
2475 This function does not know about SEQUENCEs and hence should not be
2476 called after delay-slot filling has been done. */
2479 reorder_insns (from, to, after)
2480 rtx from, to, after;
2482 /* Splice this bunch out of where it is now. */
2483 if (PREV_INSN (from))
2484 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2486 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2487 if (last_insn == to)
2488 last_insn = PREV_INSN (from);
2489 if (first_insn == from)
2490 first_insn = NEXT_INSN (to);
2492 /* Make the new neighbors point to it and it to them. */
2493 if (NEXT_INSN (after))
2494 PREV_INSN (NEXT_INSN (after)) = to;
2496 NEXT_INSN (to) = NEXT_INSN (after);
2497 PREV_INSN (from) = after;
2498 NEXT_INSN (after) = from;
2499 if (after == last_insn)
2503 /* Return the line note insn preceding INSN. */
2506 find_line_note (insn)
2509 if (no_line_numbers)
2512 for (; insn; insn = PREV_INSN (insn))
2513 if (GET_CODE (insn) == NOTE
2514 && NOTE_LINE_NUMBER (insn) >= 0)
2520 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2521 of the moved insns when debugging. This may insert a note between AFTER
2522 and FROM, and another one after TO. */
2525 reorder_insns_with_line_notes (from, to, after)
2526 rtx from, to, after;
2528 rtx from_line = find_line_note (from);
2529 rtx after_line = find_line_note (after);
2531 reorder_insns (from, to, after);
2533 if (from_line == after_line)
2537 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2538 NOTE_LINE_NUMBER (from_line),
2541 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2542 NOTE_LINE_NUMBER (after_line),
2546 /* Emit an insn of given code and pattern
2547 at a specified place within the doubly-linked list. */
2549 /* Make an instruction with body PATTERN
2550 and output it before the instruction BEFORE. */
2553 emit_insn_before (pattern, before)
2554 register rtx pattern, before;
2556 register rtx insn = before;
2558 if (GET_CODE (pattern) == SEQUENCE)
2562 for (i = 0; i < XVECLEN (pattern, 0); i++)
2564 insn = XVECEXP (pattern, 0, i);
2565 add_insn_before (insn, before);
2567 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2568 sequence_result[XVECLEN (pattern, 0)] = pattern;
2572 insn = make_insn_raw (pattern);
2573 add_insn_before (insn, before);
2579 /* Make an instruction with body PATTERN and code JUMP_INSN
2580 and output it before the instruction BEFORE. */
2583 emit_jump_insn_before (pattern, before)
2584 register rtx pattern, before;
2588 if (GET_CODE (pattern) == SEQUENCE)
2589 insn = emit_insn_before (pattern, before);
2592 insn = make_jump_insn_raw (pattern);
2593 add_insn_before (insn, before);
2599 /* Make an instruction with body PATTERN and code CALL_INSN
2600 and output it before the instruction BEFORE. */
2603 emit_call_insn_before (pattern, before)
2604 register rtx pattern, before;
2608 if (GET_CODE (pattern) == SEQUENCE)
2609 insn = emit_insn_before (pattern, before);
2612 insn = make_call_insn_raw (pattern);
2613 add_insn_before (insn, before);
2614 PUT_CODE (insn, CALL_INSN);
2620 /* Make an insn of code BARRIER
2621 and output it before the insn AFTER. */
2624 emit_barrier_before (before)
2625 register rtx before;
2627 register rtx insn = rtx_alloc (BARRIER);
2629 INSN_UID (insn) = cur_insn_uid++;
2631 add_insn_before (insn, before);
2635 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2638 emit_note_before (subtype, before)
2642 register rtx note = rtx_alloc (NOTE);
2643 INSN_UID (note) = cur_insn_uid++;
2644 NOTE_SOURCE_FILE (note) = 0;
2645 NOTE_LINE_NUMBER (note) = subtype;
2647 add_insn_before (note, before);
2651 /* Make an insn of code INSN with body PATTERN
2652 and output it after the insn AFTER. */
2655 emit_insn_after (pattern, after)
2656 register rtx pattern, after;
2658 register rtx insn = after;
2660 if (GET_CODE (pattern) == SEQUENCE)
2664 for (i = 0; i < XVECLEN (pattern, 0); i++)
2666 insn = XVECEXP (pattern, 0, i);
2667 add_insn_after (insn, after);
2670 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2671 sequence_result[XVECLEN (pattern, 0)] = pattern;
2675 insn = make_insn_raw (pattern);
2676 add_insn_after (insn, after);
2682 /* Similar to emit_insn_after, except that line notes are to be inserted so
2683 as to act as if this insn were at FROM. */
2686 emit_insn_after_with_line_notes (pattern, after, from)
2687 rtx pattern, after, from;
2689 rtx from_line = find_line_note (from);
2690 rtx after_line = find_line_note (after);
2691 rtx insn = emit_insn_after (pattern, after);
2694 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2695 NOTE_LINE_NUMBER (from_line),
2699 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2700 NOTE_LINE_NUMBER (after_line),
2704 /* Make an insn of code JUMP_INSN with body PATTERN
2705 and output it after the insn AFTER. */
2708 emit_jump_insn_after (pattern, after)
2709 register rtx pattern, after;
2713 if (GET_CODE (pattern) == SEQUENCE)
2714 insn = emit_insn_after (pattern, after);
2717 insn = make_jump_insn_raw (pattern);
2718 add_insn_after (insn, after);
2724 /* Make an insn of code BARRIER
2725 and output it after the insn AFTER. */
2728 emit_barrier_after (after)
2731 register rtx insn = rtx_alloc (BARRIER);
2733 INSN_UID (insn) = cur_insn_uid++;
2735 add_insn_after (insn, after);
2739 /* Emit the label LABEL after the insn AFTER. */
2742 emit_label_after (label, after)
2745 /* This can be called twice for the same label
2746 as a result of the confusion that follows a syntax error!
2747 So make it harmless. */
2748 if (INSN_UID (label) == 0)
2750 INSN_UID (label) = cur_insn_uid++;
2751 add_insn_after (label, after);
2757 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2760 emit_note_after (subtype, after)
2764 register rtx note = rtx_alloc (NOTE);
2765 INSN_UID (note) = cur_insn_uid++;
2766 NOTE_SOURCE_FILE (note) = 0;
2767 NOTE_LINE_NUMBER (note) = subtype;
2768 add_insn_after (note, after);
2772 /* Emit a line note for FILE and LINE after the insn AFTER. */
2775 emit_line_note_after (file, line, after)
2782 if (no_line_numbers && line > 0)
2788 note = rtx_alloc (NOTE);
2789 INSN_UID (note) = cur_insn_uid++;
2790 NOTE_SOURCE_FILE (note) = file;
2791 NOTE_LINE_NUMBER (note) = line;
2792 add_insn_after (note, after);
2796 /* Make an insn of code INSN with pattern PATTERN
2797 and add it to the end of the doubly-linked list.
2798 If PATTERN is a SEQUENCE, take the elements of it
2799 and emit an insn for each element.
2801 Returns the last insn emitted. */
2807 rtx insn = last_insn;
2809 if (GET_CODE (pattern) == SEQUENCE)
2813 for (i = 0; i < XVECLEN (pattern, 0); i++)
2815 insn = XVECEXP (pattern, 0, i);
2818 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2819 sequence_result[XVECLEN (pattern, 0)] = pattern;
2823 insn = make_insn_raw (pattern);
2830 /* Emit the insns in a chain starting with INSN.
2831 Return the last insn emitted. */
2841 rtx next = NEXT_INSN (insn);
2850 /* Emit the insns in a chain starting with INSN and place them in front of
2851 the insn BEFORE. Return the last insn emitted. */
2854 emit_insns_before (insn, before)
2862 rtx next = NEXT_INSN (insn);
2863 add_insn_before (insn, before);
2871 /* Emit the insns in a chain starting with FIRST and place them in back of
2872 the insn AFTER. Return the last insn emitted. */
2875 emit_insns_after (first, after)
2880 register rtx after_after;
2888 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2891 after_after = NEXT_INSN (after);
2893 NEXT_INSN (after) = first;
2894 PREV_INSN (first) = after;
2895 NEXT_INSN (last) = after_after;
2897 PREV_INSN (after_after) = last;
2899 if (after == last_insn)
2904 /* Make an insn of code JUMP_INSN with pattern PATTERN
2905 and add it to the end of the doubly-linked list. */
2908 emit_jump_insn (pattern)
2911 if (GET_CODE (pattern) == SEQUENCE)
2912 return emit_insn (pattern);
2915 register rtx insn = make_jump_insn_raw (pattern);
2921 /* Make an insn of code CALL_INSN with pattern PATTERN
2922 and add it to the end of the doubly-linked list. */
2925 emit_call_insn (pattern)
2928 if (GET_CODE (pattern) == SEQUENCE)
2929 return emit_insn (pattern);
2932 register rtx insn = make_call_insn_raw (pattern);
2934 PUT_CODE (insn, CALL_INSN);
2939 /* Add the label LABEL to the end of the doubly-linked list. */
2945 /* This can be called twice for the same label
2946 as a result of the confusion that follows a syntax error!
2947 So make it harmless. */
2948 if (INSN_UID (label) == 0)
2950 INSN_UID (label) = cur_insn_uid++;
2956 /* Make an insn of code BARRIER
2957 and add it to the end of the doubly-linked list. */
2962 register rtx barrier = rtx_alloc (BARRIER);
2963 INSN_UID (barrier) = cur_insn_uid++;
2968 /* Make an insn of code NOTE
2969 with data-fields specified by FILE and LINE
2970 and add it to the end of the doubly-linked list,
2971 but only if line-numbers are desired for debugging info. */
2974 emit_line_note (file, line)
2978 emit_filename = file;
2982 if (no_line_numbers)
2986 return emit_note (file, line);
2989 /* Make an insn of code NOTE
2990 with data-fields specified by FILE and LINE
2991 and add it to the end of the doubly-linked list.
2992 If it is a line-number NOTE, omit it if it matches the previous one. */
2995 emit_note (file, line)
3003 if (file && last_filename && !strcmp (file, last_filename)
3004 && line == last_linenum)
3006 last_filename = file;
3007 last_linenum = line;
3010 if (no_line_numbers && line > 0)
3016 note = rtx_alloc (NOTE);
3017 INSN_UID (note) = cur_insn_uid++;
3018 NOTE_SOURCE_FILE (note) = file;
3019 NOTE_LINE_NUMBER (note) = line;
3024 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
3027 emit_line_note_force (file, line)
3032 return emit_line_note (file, line);
3035 /* Cause next statement to emit a line note even if the line number
3036 has not changed. This is used at the beginning of a function. */
3039 force_next_line_note ()
3044 /* Return an indication of which type of insn should have X as a body.
3045 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3051 if (GET_CODE (x) == CODE_LABEL)
3053 if (GET_CODE (x) == CALL)
3055 if (GET_CODE (x) == RETURN)
3057 if (GET_CODE (x) == SET)
3059 if (SET_DEST (x) == pc_rtx)
3061 else if (GET_CODE (SET_SRC (x)) == CALL)
3066 if (GET_CODE (x) == PARALLEL)
3069 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3070 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3072 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3073 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3075 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3076 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3082 /* Emit the rtl pattern X as an appropriate kind of insn.
3083 If X is a label, it is simply added into the insn chain. */
3089 enum rtx_code code = classify_insn (x);
3091 if (code == CODE_LABEL)
3092 return emit_label (x);
3093 else if (code == INSN)
3094 return emit_insn (x);
3095 else if (code == JUMP_INSN)
3097 register rtx insn = emit_jump_insn (x);
3098 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3099 return emit_barrier ();
3102 else if (code == CALL_INSN)
3103 return emit_call_insn (x);
3108 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3113 struct sequence_stack *tem;
3115 if (sequence_element_free_list)
3117 /* Reuse a previously-saved struct sequence_stack. */
3118 tem = sequence_element_free_list;
3119 sequence_element_free_list = tem->next;
3122 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3124 tem->next = sequence_stack;
3125 tem->first = first_insn;
3126 tem->last = last_insn;
3127 tem->sequence_rtl_expr = sequence_rtl_expr;
3129 sequence_stack = tem;
3135 /* Similarly, but indicate that this sequence will be placed in
3139 start_sequence_for_rtl_expr (t)
3144 sequence_rtl_expr = t;
3147 /* Set up the insn chain starting with FIRST
3148 as the current sequence, saving the previously current one. */
3151 push_to_sequence (first)
3158 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3164 /* Set up the outer-level insn chain
3165 as the current sequence, saving the previously current one. */
3168 push_topmost_sequence ()
3170 struct sequence_stack *stack, *top = NULL;
3174 for (stack = sequence_stack; stack; stack = stack->next)
3177 first_insn = top->first;
3178 last_insn = top->last;
3179 sequence_rtl_expr = top->sequence_rtl_expr;
3182 /* After emitting to the outer-level insn chain, update the outer-level
3183 insn chain, and restore the previous saved state. */
3186 pop_topmost_sequence ()
3188 struct sequence_stack *stack, *top = NULL;
3190 for (stack = sequence_stack; stack; stack = stack->next)
3193 top->first = first_insn;
3194 top->last = last_insn;
3195 /* ??? Why don't we save sequence_rtl_expr here? */
3200 /* After emitting to a sequence, restore previous saved state.
3202 To get the contents of the sequence just made,
3203 you must call `gen_sequence' *before* calling here. */
3208 struct sequence_stack *tem = sequence_stack;
3210 first_insn = tem->first;
3211 last_insn = tem->last;
3212 sequence_rtl_expr = tem->sequence_rtl_expr;
3213 sequence_stack = tem->next;
3215 tem->next = sequence_element_free_list;
3216 sequence_element_free_list = tem;
3219 /* Return 1 if currently emitting into a sequence. */
3224 return sequence_stack != 0;
3227 /* Generate a SEQUENCE rtx containing the insns already emitted
3228 to the current sequence.
3230 This is how the gen_... function from a DEFINE_EXPAND
3231 constructs the SEQUENCE that it returns. */
3241 /* Count the insns in the chain. */
3243 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3246 /* If only one insn, return its pattern rather than a SEQUENCE.
3247 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3248 the case of an empty list.) */
3250 && ! RTX_FRAME_RELATED_P (first_insn)
3251 && (GET_CODE (first_insn) == INSN
3252 || GET_CODE (first_insn) == JUMP_INSN
3253 /* Don't discard the call usage field. */
3254 || (GET_CODE (first_insn) == CALL_INSN
3255 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3257 NEXT_INSN (first_insn) = free_insn;
3258 free_insn = first_insn;
3259 return PATTERN (first_insn);
3262 /* Put them in a vector. See if we already have a SEQUENCE of the
3263 appropriate length around. */
3264 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3265 sequence_result[len] = 0;
3268 /* Ensure that this rtl goes in saveable_obstack, since we may
3270 push_obstacks_nochange ();
3271 rtl_in_saveable_obstack ();
3272 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3276 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3277 XVECEXP (result, 0, i) = tem;
3282 /* Initialize data structures and variables in this file
3283 before generating rtl for each function. */
3292 sequence_rtl_expr = NULL;
3294 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3297 first_label_num = label_num;
3299 sequence_stack = NULL;
3301 /* Clear the start_sequence/gen_sequence cache. */
3302 sequence_element_free_list = 0;
3303 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3304 sequence_result[i] = 0;
3307 /* Init the tables that describe all the pseudo regs. */
3309 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3312 = (char *) savealloc (regno_pointer_flag_length);
3313 bzero (regno_pointer_flag, regno_pointer_flag_length);
3316 = (char *) savealloc (regno_pointer_flag_length);
3317 bzero (regno_pointer_align, regno_pointer_flag_length);
3320 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3321 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3323 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3324 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3325 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3326 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3327 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3329 /* Indicate that the virtual registers and stack locations are
3331 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3332 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3333 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3334 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3336 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3337 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3338 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3339 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3341 #ifdef STACK_BOUNDARY
3342 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3343 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3344 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3345 = STACK_BOUNDARY / BITS_PER_UNIT;
3346 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3348 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3349 = STACK_BOUNDARY / BITS_PER_UNIT;
3350 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3351 = STACK_BOUNDARY / BITS_PER_UNIT;
3352 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3353 = STACK_BOUNDARY / BITS_PER_UNIT;
3354 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3355 = STACK_BOUNDARY / BITS_PER_UNIT;
3358 #ifdef INIT_EXPANDERS
3363 /* Create some permanent unique rtl objects shared between all functions.
3364 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3367 init_emit_once (line_numbers)
3371 enum machine_mode mode;
3373 no_line_numbers = ! line_numbers;
3375 sequence_stack = NULL;
3377 /* Compute the word and byte modes. */
3379 byte_mode = VOIDmode;
3380 word_mode = VOIDmode;
3382 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3383 mode = GET_MODE_WIDER_MODE (mode))
3385 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3386 && byte_mode == VOIDmode)
3389 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3390 && word_mode == VOIDmode)
3394 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3396 /* Create the unique rtx's for certain rtx codes and operand values. */
3398 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3400 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3401 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3402 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3405 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3406 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3407 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3409 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3411 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3412 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3413 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3414 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3416 for (i = 0; i <= 2; i++)
3418 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3419 mode = GET_MODE_WIDER_MODE (mode))
3421 rtx tem = rtx_alloc (CONST_DOUBLE);
3422 union real_extract u;
3424 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3425 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3427 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3428 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3429 PUT_MODE (tem, mode);
3431 const_tiny_rtx[i][(int) mode] = tem;
3434 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3436 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3437 mode = GET_MODE_WIDER_MODE (mode))
3438 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3440 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3442 mode = GET_MODE_WIDER_MODE (mode))
3443 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3446 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3447 mode = GET_MODE_WIDER_MODE (mode))
3448 const_tiny_rtx[0][(int) mode] = const0_rtx;
3451 /* Assign register numbers to the globally defined register rtx.
3452 This must be done at runtime because the register number field
3453 is in a union and some compilers can't initialize unions. */
3455 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3456 PUT_MODE (stack_pointer_rtx, Pmode);
3457 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3458 PUT_MODE (frame_pointer_rtx, Pmode);
3459 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3460 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3461 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3463 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3464 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3465 PUT_MODE (arg_pointer_rtx, Pmode);
3468 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3469 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3470 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3471 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3472 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3473 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3474 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3475 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3477 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3478 return_address_pointer_rtx
3479 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3483 struct_value_rtx = STRUCT_VALUE;
3485 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3488 #ifdef STRUCT_VALUE_INCOMING
3489 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3491 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3492 struct_value_incoming_rtx
3493 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3495 struct_value_incoming_rtx = struct_value_rtx;
3499 #ifdef STATIC_CHAIN_REGNUM
3500 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3502 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3503 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3504 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3507 static_chain_incoming_rtx = static_chain_rtx;
3511 static_chain_rtx = STATIC_CHAIN;
3513 #ifdef STATIC_CHAIN_INCOMING
3514 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3516 static_chain_incoming_rtx = static_chain_rtx;
3520 #ifdef PIC_OFFSET_TABLE_REGNUM
3521 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3525 /* Query and clear/ restore no_line_numbers. This is used by the
3526 switch / case handling in stmt.c to give proper line numbers in
3527 warnings about unreachable code. */
3530 force_line_numbers ()
3532 int old = no_line_numbers;
3534 no_line_numbers = 0;
3536 force_next_line_note ();
3541 restore_line_number_status (old_value)
3544 no_line_numbers = old_value;