1 /* Emit RTL for the GCC expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
5 Free Software Foundation, Inc.
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 3, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING3. If not see
21 <http://www.gnu.org/licenses/>. */
24 /* Middle-to-low level generation of rtx code and insns.
26 This file contains support functions for creating rtl expressions
27 and manipulating them in the doubly-linked chain of insns.
29 The patterns of the insns are created by machine-dependent
30 routines in insn-emit.c, which is generated automatically from
31 the machine description. These routines make the individual rtx's
32 of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
33 which are automatically generated from rtl.def; what is machine
34 dependent is the kind of rtx's they make and what arguments they
39 #include "coretypes.h"
41 #include "diagnostic-core.h"
49 #include "hard-reg-set.h"
51 #include "insn-config.h"
54 #include "basic-block.h"
57 #include "langhooks.h"
58 #include "tree-pass.h"
62 #include "tree-flow.h"
64 struct target_rtl default_target_rtl;
66 struct target_rtl *this_target_rtl = &default_target_rtl;
69 #define initial_regno_reg_rtx (this_target_rtl->x_initial_regno_reg_rtx)
71 /* Commonly used modes. */
73 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
74 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
75 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
76 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
78 /* Datastructures maintained for currently processed function in RTL form. */
80 struct rtl_data x_rtl;
82 /* Indexed by pseudo register number, gives the rtx for that pseudo.
83 Allocated in parallel with regno_pointer_align.
84 FIXME: We could put it into emit_status struct, but gengtype is not able to deal
85 with length attribute nested in top level structures. */
89 /* This is *not* reset after each function. It gives each CODE_LABEL
90 in the entire compilation a unique label number. */
92 static GTY(()) int label_num = 1;
94 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
95 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
96 record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX
97 is set only for MODE_INT and MODE_VECTOR_INT modes. */
99 rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE];
103 REAL_VALUE_TYPE dconst0;
104 REAL_VALUE_TYPE dconst1;
105 REAL_VALUE_TYPE dconst2;
106 REAL_VALUE_TYPE dconstm1;
107 REAL_VALUE_TYPE dconsthalf;
109 /* Record fixed-point constant 0 and 1. */
110 FIXED_VALUE_TYPE fconst0[MAX_FCONST0];
111 FIXED_VALUE_TYPE fconst1[MAX_FCONST1];
113 /* We make one copy of (const_int C) where C is in
114 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
115 to save space during the compilation and simplify comparisons of
118 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
120 /* A hash table storing CONST_INTs whose absolute value is greater
121 than MAX_SAVED_CONST_INT. */
123 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
124 htab_t const_int_htab;
126 /* A hash table storing memory attribute structures. */
127 static GTY ((if_marked ("ggc_marked_p"), param_is (struct mem_attrs)))
128 htab_t mem_attrs_htab;
130 /* A hash table storing register attribute structures. */
131 static GTY ((if_marked ("ggc_marked_p"), param_is (struct reg_attrs)))
132 htab_t reg_attrs_htab;
134 /* A hash table storing all CONST_DOUBLEs. */
135 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
136 htab_t const_double_htab;
138 /* A hash table storing all CONST_FIXEDs. */
139 static GTY ((if_marked ("ggc_marked_p"), param_is (struct rtx_def)))
140 htab_t const_fixed_htab;
142 #define cur_insn_uid (crtl->emit.x_cur_insn_uid)
143 #define cur_debug_insn_uid (crtl->emit.x_cur_debug_insn_uid)
144 #define last_location (crtl->emit.x_last_location)
145 #define first_label_num (crtl->emit.x_first_label_num)
147 static rtx make_call_insn_raw (rtx);
148 static rtx change_address_1 (rtx, enum machine_mode, rtx, int);
149 static void set_used_decls (tree);
150 static void mark_label_nuses (rtx);
151 static hashval_t const_int_htab_hash (const void *);
152 static int const_int_htab_eq (const void *, const void *);
153 static hashval_t const_double_htab_hash (const void *);
154 static int const_double_htab_eq (const void *, const void *);
155 static rtx lookup_const_double (rtx);
156 static hashval_t const_fixed_htab_hash (const void *);
157 static int const_fixed_htab_eq (const void *, const void *);
158 static rtx lookup_const_fixed (rtx);
159 static hashval_t mem_attrs_htab_hash (const void *);
160 static int mem_attrs_htab_eq (const void *, const void *);
161 static hashval_t reg_attrs_htab_hash (const void *);
162 static int reg_attrs_htab_eq (const void *, const void *);
163 static reg_attrs *get_reg_attrs (tree, int);
164 static rtx gen_const_vector (enum machine_mode, int);
165 static void copy_rtx_if_shared_1 (rtx *orig);
167 /* Probability of the conditional branch currently proceeded by try_split.
168 Set to -1 otherwise. */
169 int split_branch_probability = -1;
171 /* Returns a hash code for X (which is a really a CONST_INT). */
174 const_int_htab_hash (const void *x)
176 return (hashval_t) INTVAL ((const_rtx) x);
179 /* Returns nonzero if the value represented by X (which is really a
180 CONST_INT) is the same as that given by Y (which is really a
184 const_int_htab_eq (const void *x, const void *y)
186 return (INTVAL ((const_rtx) x) == *((const HOST_WIDE_INT *) y));
189 /* Returns a hash code for X (which is really a CONST_DOUBLE). */
191 const_double_htab_hash (const void *x)
193 const_rtx const value = (const_rtx) x;
196 if (GET_MODE (value) == VOIDmode)
197 h = CONST_DOUBLE_LOW (value) ^ CONST_DOUBLE_HIGH (value);
200 h = real_hash (CONST_DOUBLE_REAL_VALUE (value));
201 /* MODE is used in the comparison, so it should be in the hash. */
202 h ^= GET_MODE (value);
207 /* Returns nonzero if the value represented by X (really a ...)
208 is the same as that represented by Y (really a ...) */
210 const_double_htab_eq (const void *x, const void *y)
212 const_rtx const a = (const_rtx)x, b = (const_rtx)y;
214 if (GET_MODE (a) != GET_MODE (b))
216 if (GET_MODE (a) == VOIDmode)
217 return (CONST_DOUBLE_LOW (a) == CONST_DOUBLE_LOW (b)
218 && CONST_DOUBLE_HIGH (a) == CONST_DOUBLE_HIGH (b));
220 return real_identical (CONST_DOUBLE_REAL_VALUE (a),
221 CONST_DOUBLE_REAL_VALUE (b));
224 /* Returns a hash code for X (which is really a CONST_FIXED). */
227 const_fixed_htab_hash (const void *x)
229 const_rtx const value = (const_rtx) x;
232 h = fixed_hash (CONST_FIXED_VALUE (value));
233 /* MODE is used in the comparison, so it should be in the hash. */
234 h ^= GET_MODE (value);
238 /* Returns nonzero if the value represented by X (really a ...)
239 is the same as that represented by Y (really a ...). */
242 const_fixed_htab_eq (const void *x, const void *y)
244 const_rtx const a = (const_rtx) x, b = (const_rtx) y;
246 if (GET_MODE (a) != GET_MODE (b))
248 return fixed_identical (CONST_FIXED_VALUE (a), CONST_FIXED_VALUE (b));
251 /* Returns a hash code for X (which is a really a mem_attrs *). */
254 mem_attrs_htab_hash (const void *x)
256 const mem_attrs *const p = (const mem_attrs *) x;
258 return (p->alias ^ (p->align * 1000)
259 ^ (p->addrspace * 4000)
260 ^ ((p->offset_known_p ? p->offset : 0) * 50000)
261 ^ ((p->size_known_p ? p->size : 0) * 2500000)
262 ^ (size_t) iterative_hash_expr (p->expr, 0));
265 /* Return true if the given memory attributes are equal. */
268 mem_attrs_eq_p (const struct mem_attrs *p, const struct mem_attrs *q)
270 return (p->alias == q->alias
271 && p->offset_known_p == q->offset_known_p
272 && (!p->offset_known_p || p->offset == q->offset)
273 && p->size_known_p == q->size_known_p
274 && (!p->size_known_p || p->size == q->size)
275 && p->align == q->align
276 && p->addrspace == q->addrspace
277 && (p->expr == q->expr
278 || (p->expr != NULL_TREE && q->expr != NULL_TREE
279 && operand_equal_p (p->expr, q->expr, 0))));
282 /* Returns nonzero if the value represented by X (which is really a
283 mem_attrs *) is the same as that given by Y (which is also really a
287 mem_attrs_htab_eq (const void *x, const void *y)
289 return mem_attrs_eq_p ((const mem_attrs *) x, (const mem_attrs *) y);
292 /* Set MEM's memory attributes so that they are the same as ATTRS. */
295 set_mem_attrs (rtx mem, mem_attrs *attrs)
299 /* If everything is the default, we can just clear the attributes. */
300 if (mem_attrs_eq_p (attrs, mode_mem_attrs[(int) GET_MODE (mem)]))
306 slot = htab_find_slot (mem_attrs_htab, attrs, INSERT);
309 *slot = ggc_alloc_mem_attrs ();
310 memcpy (*slot, attrs, sizeof (mem_attrs));
313 MEM_ATTRS (mem) = (mem_attrs *) *slot;
316 /* Returns a hash code for X (which is a really a reg_attrs *). */
319 reg_attrs_htab_hash (const void *x)
321 const reg_attrs *const p = (const reg_attrs *) x;
323 return ((p->offset * 1000) ^ (intptr_t) p->decl);
326 /* Returns nonzero if the value represented by X (which is really a
327 reg_attrs *) is the same as that given by Y (which is also really a
331 reg_attrs_htab_eq (const void *x, const void *y)
333 const reg_attrs *const p = (const reg_attrs *) x;
334 const reg_attrs *const q = (const reg_attrs *) y;
336 return (p->decl == q->decl && p->offset == q->offset);
338 /* Allocate a new reg_attrs structure and insert it into the hash table if
339 one identical to it is not already in the table. We are doing this for
343 get_reg_attrs (tree decl, int offset)
348 /* If everything is the default, we can just return zero. */
349 if (decl == 0 && offset == 0)
353 attrs.offset = offset;
355 slot = htab_find_slot (reg_attrs_htab, &attrs, INSERT);
358 *slot = ggc_alloc_reg_attrs ();
359 memcpy (*slot, &attrs, sizeof (reg_attrs));
362 return (reg_attrs *) *slot;
367 /* Generate an empty ASM_INPUT, which is used to block attempts to schedule
373 rtx x = gen_rtx_ASM_INPUT (VOIDmode, "");
374 MEM_VOLATILE_P (x) = true;
380 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
381 don't attempt to share with the various global pieces of rtl (such as
382 frame_pointer_rtx). */
385 gen_raw_REG (enum machine_mode mode, int regno)
387 rtx x = gen_rtx_raw_REG (mode, regno);
388 ORIGINAL_REGNO (x) = regno;
392 /* There are some RTL codes that require special attention; the generation
393 functions do the raw handling. If you add to this list, modify
394 special_rtx in gengenrtl.c as well. */
397 gen_rtx_CONST_INT (enum machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT arg)
401 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
402 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
404 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
405 if (const_true_rtx && arg == STORE_FLAG_VALUE)
406 return const_true_rtx;
409 /* Look up the CONST_INT in the hash table. */
410 slot = htab_find_slot_with_hash (const_int_htab, &arg,
411 (hashval_t) arg, INSERT);
413 *slot = gen_rtx_raw_CONST_INT (VOIDmode, arg);
419 gen_int_mode (HOST_WIDE_INT c, enum machine_mode mode)
421 return GEN_INT (trunc_int_for_mode (c, mode));
424 /* CONST_DOUBLEs might be created from pairs of integers, or from
425 REAL_VALUE_TYPEs. Also, their length is known only at run time,
426 so we cannot use gen_rtx_raw_CONST_DOUBLE. */
428 /* Determine whether REAL, a CONST_DOUBLE, already exists in the
429 hash table. If so, return its counterpart; otherwise add it
430 to the hash table and return it. */
432 lookup_const_double (rtx real)
434 void **slot = htab_find_slot (const_double_htab, real, INSERT);
441 /* Return a CONST_DOUBLE rtx for a floating-point value specified by
442 VALUE in mode MODE. */
444 const_double_from_real_value (REAL_VALUE_TYPE value, enum machine_mode mode)
446 rtx real = rtx_alloc (CONST_DOUBLE);
447 PUT_MODE (real, mode);
451 return lookup_const_double (real);
454 /* Determine whether FIXED, a CONST_FIXED, already exists in the
455 hash table. If so, return its counterpart; otherwise add it
456 to the hash table and return it. */
459 lookup_const_fixed (rtx fixed)
461 void **slot = htab_find_slot (const_fixed_htab, fixed, INSERT);
468 /* Return a CONST_FIXED rtx for a fixed-point value specified by
469 VALUE in mode MODE. */
472 const_fixed_from_fixed_value (FIXED_VALUE_TYPE value, enum machine_mode mode)
474 rtx fixed = rtx_alloc (CONST_FIXED);
475 PUT_MODE (fixed, mode);
479 return lookup_const_fixed (fixed);
482 /* Constructs double_int from rtx CST. */
485 rtx_to_double_int (const_rtx cst)
489 if (CONST_INT_P (cst))
490 r = shwi_to_double_int (INTVAL (cst));
491 else if (CONST_DOUBLE_P (cst) && GET_MODE (cst) == VOIDmode)
493 r.low = CONST_DOUBLE_LOW (cst);
494 r.high = CONST_DOUBLE_HIGH (cst);
503 /* Return a CONST_DOUBLE or CONST_INT for a value specified as
507 immed_double_int_const (double_int i, enum machine_mode mode)
509 return immed_double_const (i.low, i.high, mode);
512 /* Return a CONST_DOUBLE or CONST_INT for a value specified as a pair
513 of ints: I0 is the low-order word and I1 is the high-order word.
514 Do not use this routine for non-integer modes; convert to
515 REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE. */
518 immed_double_const (HOST_WIDE_INT i0, HOST_WIDE_INT i1, enum machine_mode mode)
523 /* There are the following cases (note that there are no modes with
524 HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < 2 * HOST_BITS_PER_WIDE_INT):
526 1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
528 2) GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT, but the value of
529 the integer fits into HOST_WIDE_INT anyway (i.e., i1 consists only
530 from copies of the sign bit, and sign of i0 and i1 are the same), then
531 we return a CONST_INT for i0.
532 3) Otherwise, we create a CONST_DOUBLE for i0 and i1. */
533 if (mode != VOIDmode)
535 gcc_assert (GET_MODE_CLASS (mode) == MODE_INT
536 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT
537 /* We can get a 0 for an error mark. */
538 || GET_MODE_CLASS (mode) == MODE_VECTOR_INT
539 || GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT);
541 if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
542 return gen_int_mode (i0, mode);
544 gcc_assert (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT);
547 /* If this integer fits in one word, return a CONST_INT. */
548 if ((i1 == 0 && i0 >= 0) || (i1 == ~0 && i0 < 0))
551 /* We use VOIDmode for integers. */
552 value = rtx_alloc (CONST_DOUBLE);
553 PUT_MODE (value, VOIDmode);
555 CONST_DOUBLE_LOW (value) = i0;
556 CONST_DOUBLE_HIGH (value) = i1;
558 for (i = 2; i < (sizeof CONST_DOUBLE_FORMAT - 1); i++)
559 XWINT (value, i) = 0;
561 return lookup_const_double (value);
565 gen_rtx_REG (enum machine_mode mode, unsigned int regno)
567 /* In case the MD file explicitly references the frame pointer, have
568 all such references point to the same frame pointer. This is
569 used during frame pointer elimination to distinguish the explicit
570 references to these registers from pseudos that happened to be
573 If we have eliminated the frame pointer or arg pointer, we will
574 be using it as a normal register, for example as a spill
575 register. In such cases, we might be accessing it in a mode that
576 is not Pmode and therefore cannot use the pre-allocated rtx.
578 Also don't do this when we are making new REGs in reload, since
579 we don't want to get confused with the real pointers. */
581 if (mode == Pmode && !reload_in_progress)
583 if (regno == FRAME_POINTER_REGNUM
584 && (!reload_completed || frame_pointer_needed))
585 return frame_pointer_rtx;
586 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
587 if (regno == HARD_FRAME_POINTER_REGNUM
588 && (!reload_completed || frame_pointer_needed))
589 return hard_frame_pointer_rtx;
591 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && !HARD_FRAME_POINTER_IS_ARG_POINTER
592 if (regno == ARG_POINTER_REGNUM)
593 return arg_pointer_rtx;
595 #ifdef RETURN_ADDRESS_POINTER_REGNUM
596 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
597 return return_address_pointer_rtx;
599 if (regno == (unsigned) PIC_OFFSET_TABLE_REGNUM
600 && PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM
601 && fixed_regs[PIC_OFFSET_TABLE_REGNUM])
602 return pic_offset_table_rtx;
603 if (regno == STACK_POINTER_REGNUM)
604 return stack_pointer_rtx;
608 /* If the per-function register table has been set up, try to re-use
609 an existing entry in that table to avoid useless generation of RTL.
611 This code is disabled for now until we can fix the various backends
612 which depend on having non-shared hard registers in some cases. Long
613 term we want to re-enable this code as it can significantly cut down
614 on the amount of useless RTL that gets generated.
616 We'll also need to fix some code that runs after reload that wants to
617 set ORIGINAL_REGNO. */
622 && regno < FIRST_PSEUDO_REGISTER
623 && reg_raw_mode[regno] == mode)
624 return regno_reg_rtx[regno];
627 return gen_raw_REG (mode, regno);
631 gen_rtx_MEM (enum machine_mode mode, rtx addr)
633 rtx rt = gen_rtx_raw_MEM (mode, addr);
635 /* This field is not cleared by the mere allocation of the rtx, so
642 /* Generate a memory referring to non-trapping constant memory. */
645 gen_const_mem (enum machine_mode mode, rtx addr)
647 rtx mem = gen_rtx_MEM (mode, addr);
648 MEM_READONLY_P (mem) = 1;
649 MEM_NOTRAP_P (mem) = 1;
653 /* Generate a MEM referring to fixed portions of the frame, e.g., register
657 gen_frame_mem (enum machine_mode mode, rtx addr)
659 rtx mem = gen_rtx_MEM (mode, addr);
660 MEM_NOTRAP_P (mem) = 1;
661 set_mem_alias_set (mem, get_frame_alias_set ());
665 /* Generate a MEM referring to a temporary use of the stack, not part
666 of the fixed stack frame. For example, something which is pushed
667 by a target splitter. */
669 gen_tmp_stack_mem (enum machine_mode mode, rtx addr)
671 rtx mem = gen_rtx_MEM (mode, addr);
672 MEM_NOTRAP_P (mem) = 1;
673 if (!cfun->calls_alloca)
674 set_mem_alias_set (mem, get_frame_alias_set ());
678 /* We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if
679 this construct would be valid, and false otherwise. */
682 validate_subreg (enum machine_mode omode, enum machine_mode imode,
683 const_rtx reg, unsigned int offset)
685 unsigned int isize = GET_MODE_SIZE (imode);
686 unsigned int osize = GET_MODE_SIZE (omode);
688 /* All subregs must be aligned. */
689 if (offset % osize != 0)
692 /* The subreg offset cannot be outside the inner object. */
696 /* ??? This should not be here. Temporarily continue to allow word_mode
697 subregs of anything. The most common offender is (subreg:SI (reg:DF)).
698 Generally, backends are doing something sketchy but it'll take time to
700 if (omode == word_mode)
702 /* ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
703 is the culprit here, and not the backends. */
704 else if (osize >= UNITS_PER_WORD && isize >= osize)
706 /* Allow component subregs of complex and vector. Though given the below
707 extraction rules, it's not always clear what that means. */
708 else if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
709 && GET_MODE_INNER (imode) == omode)
711 /* ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
712 i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
713 represent this. It's questionable if this ought to be represented at
714 all -- why can't this all be hidden in post-reload splitters that make
715 arbitrarily mode changes to the registers themselves. */
716 else if (VECTOR_MODE_P (omode) && GET_MODE_INNER (omode) == imode)
718 /* Subregs involving floating point modes are not allowed to
719 change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
720 (subreg:SI (reg:DF) 0) isn't. */
721 else if (FLOAT_MODE_P (imode) || FLOAT_MODE_P (omode))
727 /* Paradoxical subregs must have offset zero. */
731 /* This is a normal subreg. Verify that the offset is representable. */
733 /* For hard registers, we already have most of these rules collected in
734 subreg_offset_representable_p. */
735 if (reg && REG_P (reg) && HARD_REGISTER_P (reg))
737 unsigned int regno = REGNO (reg);
739 #ifdef CANNOT_CHANGE_MODE_CLASS
740 if ((COMPLEX_MODE_P (imode) || VECTOR_MODE_P (imode))
741 && GET_MODE_INNER (imode) == omode)
743 else if (REG_CANNOT_CHANGE_MODE_P (regno, imode, omode))
747 return subreg_offset_representable_p (regno, imode, offset, omode);
750 /* For pseudo registers, we want most of the same checks. Namely:
751 If the register no larger than a word, the subreg must be lowpart.
752 If the register is larger than a word, the subreg must be the lowpart
753 of a subword. A subreg does *not* perform arbitrary bit extraction.
754 Given that we've already checked mode/offset alignment, we only have
755 to check subword subregs here. */
756 if (osize < UNITS_PER_WORD)
758 enum machine_mode wmode = isize > UNITS_PER_WORD ? word_mode : imode;
759 unsigned int low_off = subreg_lowpart_offset (omode, wmode);
760 if (offset % UNITS_PER_WORD != low_off)
767 gen_rtx_SUBREG (enum machine_mode mode, rtx reg, int offset)
769 gcc_assert (validate_subreg (mode, GET_MODE (reg), reg, offset));
770 return gen_rtx_raw_SUBREG (mode, reg, offset);
773 /* Generate a SUBREG representing the least-significant part of REG if MODE
774 is smaller than mode of REG, otherwise paradoxical SUBREG. */
777 gen_lowpart_SUBREG (enum machine_mode mode, rtx reg)
779 enum machine_mode inmode;
781 inmode = GET_MODE (reg);
782 if (inmode == VOIDmode)
784 return gen_rtx_SUBREG (mode, reg,
785 subreg_lowpart_offset (mode, inmode));
789 /* Create an rtvec and stores within it the RTXen passed in the arguments. */
792 gen_rtvec (int n, ...)
800 /* Don't allocate an empty rtvec... */
807 rt_val = rtvec_alloc (n);
809 for (i = 0; i < n; i++)
810 rt_val->elem[i] = va_arg (p, rtx);
817 gen_rtvec_v (int n, rtx *argp)
822 /* Don't allocate an empty rtvec... */
826 rt_val = rtvec_alloc (n);
828 for (i = 0; i < n; i++)
829 rt_val->elem[i] = *argp++;
834 /* Return the number of bytes between the start of an OUTER_MODE
835 in-memory value and the start of an INNER_MODE in-memory value,
836 given that the former is a lowpart of the latter. It may be a
837 paradoxical lowpart, in which case the offset will be negative
838 on big-endian targets. */
841 byte_lowpart_offset (enum machine_mode outer_mode,
842 enum machine_mode inner_mode)
844 if (GET_MODE_SIZE (outer_mode) < GET_MODE_SIZE (inner_mode))
845 return subreg_lowpart_offset (outer_mode, inner_mode);
847 return -subreg_lowpart_offset (inner_mode, outer_mode);
850 /* Generate a REG rtx for a new pseudo register of mode MODE.
851 This pseudo is assigned the next sequential register number. */
854 gen_reg_rtx (enum machine_mode mode)
857 unsigned int align = GET_MODE_ALIGNMENT (mode);
859 gcc_assert (can_create_pseudo_p ());
861 /* If a virtual register with bigger mode alignment is generated,
862 increase stack alignment estimation because it might be spilled
864 if (SUPPORTS_STACK_ALIGNMENT
865 && crtl->stack_alignment_estimated < align
866 && !crtl->stack_realign_processed)
868 unsigned int min_align = MINIMUM_ALIGNMENT (NULL, mode, align);
869 if (crtl->stack_alignment_estimated < min_align)
870 crtl->stack_alignment_estimated = min_align;
873 if (generating_concat_p
874 && (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
875 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT))
877 /* For complex modes, don't make a single pseudo.
878 Instead, make a CONCAT of two pseudos.
879 This allows noncontiguous allocation of the real and imaginary parts,
880 which makes much better code. Besides, allocating DCmode
881 pseudos overstrains reload on some machines like the 386. */
882 rtx realpart, imagpart;
883 enum machine_mode partmode = GET_MODE_INNER (mode);
885 realpart = gen_reg_rtx (partmode);
886 imagpart = gen_reg_rtx (partmode);
887 return gen_rtx_CONCAT (mode, realpart, imagpart);
890 /* Make sure regno_pointer_align, and regno_reg_rtx are large
891 enough to have an element for this pseudo reg number. */
893 if (reg_rtx_no == crtl->emit.regno_pointer_align_length)
895 int old_size = crtl->emit.regno_pointer_align_length;
899 tmp = XRESIZEVEC (char, crtl->emit.regno_pointer_align, old_size * 2);
900 memset (tmp + old_size, 0, old_size);
901 crtl->emit.regno_pointer_align = (unsigned char *) tmp;
903 new1 = GGC_RESIZEVEC (rtx, regno_reg_rtx, old_size * 2);
904 memset (new1 + old_size, 0, old_size * sizeof (rtx));
905 regno_reg_rtx = new1;
907 crtl->emit.regno_pointer_align_length = old_size * 2;
910 val = gen_raw_REG (mode, reg_rtx_no);
911 regno_reg_rtx[reg_rtx_no++] = val;
915 /* Update NEW with the same attributes as REG, but with OFFSET added
916 to the REG_OFFSET. */
919 update_reg_offset (rtx new_rtx, rtx reg, int offset)
921 REG_ATTRS (new_rtx) = get_reg_attrs (REG_EXPR (reg),
922 REG_OFFSET (reg) + offset);
925 /* Generate a register with same attributes as REG, but with OFFSET
926 added to the REG_OFFSET. */
929 gen_rtx_REG_offset (rtx reg, enum machine_mode mode, unsigned int regno,
932 rtx new_rtx = gen_rtx_REG (mode, regno);
934 update_reg_offset (new_rtx, reg, offset);
938 /* Generate a new pseudo-register with the same attributes as REG, but
939 with OFFSET added to the REG_OFFSET. */
942 gen_reg_rtx_offset (rtx reg, enum machine_mode mode, int offset)
944 rtx new_rtx = gen_reg_rtx (mode);
946 update_reg_offset (new_rtx, reg, offset);
950 /* Adjust REG in-place so that it has mode MODE. It is assumed that the
951 new register is a (possibly paradoxical) lowpart of the old one. */
954 adjust_reg_mode (rtx reg, enum machine_mode mode)
956 update_reg_offset (reg, reg, byte_lowpart_offset (mode, GET_MODE (reg)));
957 PUT_MODE (reg, mode);
960 /* Copy REG's attributes from X, if X has any attributes. If REG and X
961 have different modes, REG is a (possibly paradoxical) lowpart of X. */
964 set_reg_attrs_from_value (rtx reg, rtx x)
968 /* Hard registers can be reused for multiple purposes within the same
969 function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
971 if (HARD_REGISTER_P (reg))
974 offset = byte_lowpart_offset (GET_MODE (reg), GET_MODE (x));
977 if (MEM_OFFSET_KNOWN_P (x))
978 REG_ATTRS (reg) = get_reg_attrs (MEM_EXPR (x),
979 MEM_OFFSET (x) + offset);
981 mark_reg_pointer (reg, 0);
986 update_reg_offset (reg, x, offset);
988 mark_reg_pointer (reg, REGNO_POINTER_ALIGN (REGNO (x)));
992 /* Generate a REG rtx for a new pseudo register, copying the mode
993 and attributes from X. */
996 gen_reg_rtx_and_attrs (rtx x)
998 rtx reg = gen_reg_rtx (GET_MODE (x));
999 set_reg_attrs_from_value (reg, x);
1003 /* Set the register attributes for registers contained in PARM_RTX.
1004 Use needed values from memory attributes of MEM. */
1007 set_reg_attrs_for_parm (rtx parm_rtx, rtx mem)
1009 if (REG_P (parm_rtx))
1010 set_reg_attrs_from_value (parm_rtx, mem);
1011 else if (GET_CODE (parm_rtx) == PARALLEL)
1013 /* Check for a NULL entry in the first slot, used to indicate that the
1014 parameter goes both on the stack and in registers. */
1015 int i = XEXP (XVECEXP (parm_rtx, 0, 0), 0) ? 0 : 1;
1016 for (; i < XVECLEN (parm_rtx, 0); i++)
1018 rtx x = XVECEXP (parm_rtx, 0, i);
1019 if (REG_P (XEXP (x, 0)))
1020 REG_ATTRS (XEXP (x, 0))
1021 = get_reg_attrs (MEM_EXPR (mem),
1022 INTVAL (XEXP (x, 1)));
1027 /* Set the REG_ATTRS for registers in value X, given that X represents
1031 set_reg_attrs_for_decl_rtl (tree t, rtx x)
1033 if (GET_CODE (x) == SUBREG)
1035 gcc_assert (subreg_lowpart_p (x));
1040 = get_reg_attrs (t, byte_lowpart_offset (GET_MODE (x),
1042 if (GET_CODE (x) == CONCAT)
1044 if (REG_P (XEXP (x, 0)))
1045 REG_ATTRS (XEXP (x, 0)) = get_reg_attrs (t, 0);
1046 if (REG_P (XEXP (x, 1)))
1047 REG_ATTRS (XEXP (x, 1))
1048 = get_reg_attrs (t, GET_MODE_UNIT_SIZE (GET_MODE (XEXP (x, 0))));
1050 if (GET_CODE (x) == PARALLEL)
1054 /* Check for a NULL entry, used to indicate that the parameter goes
1055 both on the stack and in registers. */
1056 if (XEXP (XVECEXP (x, 0, 0), 0))
1061 for (i = start; i < XVECLEN (x, 0); i++)
1063 rtx y = XVECEXP (x, 0, i);
1064 if (REG_P (XEXP (y, 0)))
1065 REG_ATTRS (XEXP (y, 0)) = get_reg_attrs (t, INTVAL (XEXP (y, 1)));
1070 /* Assign the RTX X to declaration T. */
1073 set_decl_rtl (tree t, rtx x)
1075 DECL_WRTL_CHECK (t)->decl_with_rtl.rtl = x;
1077 set_reg_attrs_for_decl_rtl (t, x);
1080 /* Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true
1081 if the ABI requires the parameter to be passed by reference. */
1084 set_decl_incoming_rtl (tree t, rtx x, bool by_reference_p)
1086 DECL_INCOMING_RTL (t) = x;
1087 if (x && !by_reference_p)
1088 set_reg_attrs_for_decl_rtl (t, x);
1091 /* Identify REG (which may be a CONCAT) as a user register. */
1094 mark_user_reg (rtx reg)
1096 if (GET_CODE (reg) == CONCAT)
1098 REG_USERVAR_P (XEXP (reg, 0)) = 1;
1099 REG_USERVAR_P (XEXP (reg, 1)) = 1;
1103 gcc_assert (REG_P (reg));
1104 REG_USERVAR_P (reg) = 1;
1108 /* Identify REG as a probable pointer register and show its alignment
1109 as ALIGN, if nonzero. */
1112 mark_reg_pointer (rtx reg, int align)
1114 if (! REG_POINTER (reg))
1116 REG_POINTER (reg) = 1;
1119 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1121 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
1122 /* We can no-longer be sure just how aligned this pointer is. */
1123 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
1126 /* Return 1 plus largest pseudo reg number used in the current function. */
1134 /* Return 1 + the largest label number used so far in the current function. */
1137 max_label_num (void)
1142 /* Return first label number used in this function (if any were used). */
1145 get_first_label_num (void)
1147 return first_label_num;
1150 /* If the rtx for label was created during the expansion of a nested
1151 function, then first_label_num won't include this label number.
1152 Fix this now so that array indices work later. */
1155 maybe_set_first_label_num (rtx x)
1157 if (CODE_LABEL_NUMBER (x) < first_label_num)
1158 first_label_num = CODE_LABEL_NUMBER (x);
1161 /* Return a value representing some low-order bits of X, where the number
1162 of low-order bits is given by MODE. Note that no conversion is done
1163 between floating-point and fixed-point values, rather, the bit
1164 representation is returned.
1166 This function handles the cases in common between gen_lowpart, below,
1167 and two variants in cse.c and combine.c. These are the cases that can
1168 be safely handled at all points in the compilation.
1170 If this is not a case we can handle, return 0. */
1173 gen_lowpart_common (enum machine_mode mode, rtx x)
1175 int msize = GET_MODE_SIZE (mode);
1178 enum machine_mode innermode;
1180 /* Unfortunately, this routine doesn't take a parameter for the mode of X,
1181 so we have to make one up. Yuk. */
1182 innermode = GET_MODE (x);
1184 && msize * BITS_PER_UNIT <= HOST_BITS_PER_WIDE_INT)
1185 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT, MODE_INT, 0);
1186 else if (innermode == VOIDmode)
1187 innermode = mode_for_size (HOST_BITS_PER_WIDE_INT * 2, MODE_INT, 0);
1189 xsize = GET_MODE_SIZE (innermode);
1191 gcc_assert (innermode != VOIDmode && innermode != BLKmode);
1193 if (innermode == mode)
1196 /* MODE must occupy no more words than the mode of X. */
1197 if ((msize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
1198 > ((xsize + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD))
1201 /* Don't allow generating paradoxical FLOAT_MODE subregs. */
1202 if (SCALAR_FLOAT_MODE_P (mode) && msize > xsize)
1205 offset = subreg_lowpart_offset (mode, innermode);
1207 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
1208 && (GET_MODE_CLASS (mode) == MODE_INT
1209 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
1211 /* If we are getting the low-order part of something that has been
1212 sign- or zero-extended, we can either just use the object being
1213 extended or make a narrower extension. If we want an even smaller
1214 piece than the size of the object being extended, call ourselves
1217 This case is used mostly by combine and cse. */
1219 if (GET_MODE (XEXP (x, 0)) == mode)
1221 else if (msize < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
1222 return gen_lowpart_common (mode, XEXP (x, 0));
1223 else if (msize < xsize)
1224 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
1226 else if (GET_CODE (x) == SUBREG || REG_P (x)
1227 || GET_CODE (x) == CONCAT || GET_CODE (x) == CONST_VECTOR
1228 || GET_CODE (x) == CONST_DOUBLE || CONST_INT_P (x))
1229 return simplify_gen_subreg (mode, x, innermode, offset);
1231 /* Otherwise, we can't do this. */
1236 gen_highpart (enum machine_mode mode, rtx x)
1238 unsigned int msize = GET_MODE_SIZE (mode);
1241 /* This case loses if X is a subreg. To catch bugs early,
1242 complain if an invalid MODE is used even in other cases. */
1243 gcc_assert (msize <= UNITS_PER_WORD
1244 || msize == (unsigned int) GET_MODE_UNIT_SIZE (GET_MODE (x)));
1246 result = simplify_gen_subreg (mode, x, GET_MODE (x),
1247 subreg_highpart_offset (mode, GET_MODE (x)));
1248 gcc_assert (result);
1250 /* simplify_gen_subreg is not guaranteed to return a valid operand for
1251 the target if we have a MEM. gen_highpart must return a valid operand,
1252 emitting code if necessary to do so. */
1255 result = validize_mem (result);
1256 gcc_assert (result);
1262 /* Like gen_highpart, but accept mode of EXP operand in case EXP can
1263 be VOIDmode constant. */
1265 gen_highpart_mode (enum machine_mode outermode, enum machine_mode innermode, rtx exp)
1267 if (GET_MODE (exp) != VOIDmode)
1269 gcc_assert (GET_MODE (exp) == innermode);
1270 return gen_highpart (outermode, exp);
1272 return simplify_gen_subreg (outermode, exp, innermode,
1273 subreg_highpart_offset (outermode, innermode));
1276 /* Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value. */
1279 subreg_lowpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1281 unsigned int offset = 0;
1282 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1286 if (WORDS_BIG_ENDIAN)
1287 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1288 if (BYTES_BIG_ENDIAN)
1289 offset += difference % UNITS_PER_WORD;
1295 /* Return offset in bytes to get OUTERMODE high part
1296 of the value in mode INNERMODE stored in memory in target format. */
1298 subreg_highpart_offset (enum machine_mode outermode, enum machine_mode innermode)
1300 unsigned int offset = 0;
1301 int difference = (GET_MODE_SIZE (innermode) - GET_MODE_SIZE (outermode));
1303 gcc_assert (GET_MODE_SIZE (innermode) >= GET_MODE_SIZE (outermode));
1307 if (! WORDS_BIG_ENDIAN)
1308 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
1309 if (! BYTES_BIG_ENDIAN)
1310 offset += difference % UNITS_PER_WORD;
1316 /* Return 1 iff X, assumed to be a SUBREG,
1317 refers to the least significant part of its containing reg.
1318 If X is not a SUBREG, always return 1 (it is its own low part!). */
1321 subreg_lowpart_p (const_rtx x)
1323 if (GET_CODE (x) != SUBREG)
1325 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1328 return (subreg_lowpart_offset (GET_MODE (x), GET_MODE (SUBREG_REG (x)))
1329 == SUBREG_BYTE (x));
1332 /* Return true if X is a paradoxical subreg, false otherwise. */
1334 paradoxical_subreg_p (const_rtx x)
1336 if (GET_CODE (x) != SUBREG)
1338 return (GET_MODE_PRECISION (GET_MODE (x))
1339 > GET_MODE_PRECISION (GET_MODE (SUBREG_REG (x))));
1342 /* Return subword OFFSET of operand OP.
1343 The word number, OFFSET, is interpreted as the word number starting
1344 at the low-order address. OFFSET 0 is the low-order word if not
1345 WORDS_BIG_ENDIAN, otherwise it is the high-order word.
1347 If we cannot extract the required word, we return zero. Otherwise,
1348 an rtx corresponding to the requested word will be returned.
1350 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1351 reload has completed, a valid address will always be returned. After
1352 reload, if a valid address cannot be returned, we return zero.
1354 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1355 it is the responsibility of the caller.
1357 MODE is the mode of OP in case it is a CONST_INT.
1359 ??? This is still rather broken for some cases. The problem for the
1360 moment is that all callers of this thing provide no 'goal mode' to
1361 tell us to work with. This exists because all callers were written
1362 in a word based SUBREG world.
1363 Now use of this function can be deprecated by simplify_subreg in most
1368 operand_subword (rtx op, unsigned int offset, int validate_address, enum machine_mode mode)
1370 if (mode == VOIDmode)
1371 mode = GET_MODE (op);
1373 gcc_assert (mode != VOIDmode);
1375 /* If OP is narrower than a word, fail. */
1377 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1380 /* If we want a word outside OP, return zero. */
1382 && (offset + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1385 /* Form a new MEM at the requested address. */
1388 rtx new_rtx = adjust_address_nv (op, word_mode, offset * UNITS_PER_WORD);
1390 if (! validate_address)
1393 else if (reload_completed)
1395 if (! strict_memory_address_addr_space_p (word_mode,
1397 MEM_ADDR_SPACE (op)))
1401 return replace_equiv_address (new_rtx, XEXP (new_rtx, 0));
1404 /* Rest can be handled by simplify_subreg. */
1405 return simplify_gen_subreg (word_mode, op, mode, (offset * UNITS_PER_WORD));
1408 /* Similar to `operand_subword', but never return 0. If we can't
1409 extract the required subword, put OP into a register and try again.
1410 The second attempt must succeed. We always validate the address in
1413 MODE is the mode of OP, in case it is CONST_INT. */
1416 operand_subword_force (rtx op, unsigned int offset, enum machine_mode mode)
1418 rtx result = operand_subword (op, offset, 1, mode);
1423 if (mode != BLKmode && mode != VOIDmode)
1425 /* If this is a register which can not be accessed by words, copy it
1426 to a pseudo register. */
1428 op = copy_to_reg (op);
1430 op = force_reg (mode, op);
1433 result = operand_subword (op, offset, 1, mode);
1434 gcc_assert (result);
1439 /* Returns 1 if both MEM_EXPR can be considered equal
1443 mem_expr_equal_p (const_tree expr1, const_tree expr2)
1448 if (! expr1 || ! expr2)
1451 if (TREE_CODE (expr1) != TREE_CODE (expr2))
1454 return operand_equal_p (expr1, expr2, 0);
1457 /* Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN
1458 bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or
1462 get_mem_align_offset (rtx mem, unsigned int align)
1465 unsigned HOST_WIDE_INT offset;
1467 /* This function can't use
1468 if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
1469 || (MAX (MEM_ALIGN (mem),
1470 MAX (align, get_object_alignment (MEM_EXPR (mem))))
1474 return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
1476 - COMPONENT_REFs in MEM_EXPR can have NULL first operand,
1477 for <variable>. get_inner_reference doesn't handle it and
1478 even if it did, the alignment in that case needs to be determined
1479 from DECL_FIELD_CONTEXT's TYPE_ALIGN.
1480 - it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
1481 isn't sufficiently aligned, the object it is in might be. */
1482 gcc_assert (MEM_P (mem));
1483 expr = MEM_EXPR (mem);
1484 if (expr == NULL_TREE || !MEM_OFFSET_KNOWN_P (mem))
1487 offset = MEM_OFFSET (mem);
1490 if (DECL_ALIGN (expr) < align)
1493 else if (INDIRECT_REF_P (expr))
1495 if (TYPE_ALIGN (TREE_TYPE (expr)) < (unsigned int) align)
1498 else if (TREE_CODE (expr) == COMPONENT_REF)
1502 tree inner = TREE_OPERAND (expr, 0);
1503 tree field = TREE_OPERAND (expr, 1);
1504 tree byte_offset = component_ref_field_offset (expr);
1505 tree bit_offset = DECL_FIELD_BIT_OFFSET (field);
1508 || !host_integerp (byte_offset, 1)
1509 || !host_integerp (bit_offset, 1))
1512 offset += tree_low_cst (byte_offset, 1);
1513 offset += tree_low_cst (bit_offset, 1) / BITS_PER_UNIT;
1515 if (inner == NULL_TREE)
1517 if (TYPE_ALIGN (DECL_FIELD_CONTEXT (field))
1518 < (unsigned int) align)
1522 else if (DECL_P (inner))
1524 if (DECL_ALIGN (inner) < align)
1528 else if (TREE_CODE (inner) != COMPONENT_REF)
1536 return offset & ((align / BITS_PER_UNIT) - 1);
1539 /* Given REF (a MEM) and T, either the type of X or the expression
1540 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1541 if we are making a new object of this type. BITPOS is nonzero if
1542 there is an offset outstanding on T that will be applied later. */
1545 set_mem_attributes_minus_bitpos (rtx ref, tree t, int objectp,
1546 HOST_WIDE_INT bitpos)
1548 HOST_WIDE_INT apply_bitpos = 0;
1550 struct mem_attrs attrs, *defattrs, *refattrs;
1552 /* It can happen that type_for_mode was given a mode for which there
1553 is no language-level type. In which case it returns NULL, which
1558 type = TYPE_P (t) ? t : TREE_TYPE (t);
1559 if (type == error_mark_node)
1562 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1563 wrong answer, as it assumes that DECL_RTL already has the right alias
1564 info. Callers should not set DECL_RTL until after the call to
1565 set_mem_attributes. */
1566 gcc_assert (!DECL_P (t) || ref != DECL_RTL_IF_SET (t));
1568 memset (&attrs, 0, sizeof (attrs));
1570 /* Get the alias set from the expression or type (perhaps using a
1571 front-end routine) and use it. */
1572 attrs.alias = get_alias_set (t);
1574 MEM_VOLATILE_P (ref) |= TYPE_VOLATILE (type);
1575 MEM_IN_STRUCT_P (ref)
1576 = AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE;
1577 MEM_POINTER (ref) = POINTER_TYPE_P (type);
1579 /* If we are making an object of this type, or if this is a DECL, we know
1580 that it is a scalar if the type is not an aggregate. */
1581 if ((objectp || DECL_P (t))
1582 && ! AGGREGATE_TYPE_P (type)
1583 && TREE_CODE (type) != COMPLEX_TYPE)
1584 MEM_SCALAR_P (ref) = 1;
1586 /* Default values from pre-existing memory attributes if present. */
1587 refattrs = MEM_ATTRS (ref);
1590 /* ??? Can this ever happen? Calling this routine on a MEM that
1591 already carries memory attributes should probably be invalid. */
1592 attrs.expr = refattrs->expr;
1593 attrs.offset_known_p = refattrs->offset_known_p;
1594 attrs.offset = refattrs->offset;
1595 attrs.size_known_p = refattrs->size_known_p;
1596 attrs.size = refattrs->size;
1597 attrs.align = refattrs->align;
1600 /* Otherwise, default values from the mode of the MEM reference. */
1603 defattrs = mode_mem_attrs[(int) GET_MODE (ref)];
1604 gcc_assert (!defattrs->expr);
1605 gcc_assert (!defattrs->offset_known_p);
1607 /* Respect mode size. */
1608 attrs.size_known_p = defattrs->size_known_p;
1609 attrs.size = defattrs->size;
1610 /* ??? Is this really necessary? We probably should always get
1611 the size from the type below. */
1613 /* Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
1614 if T is an object, always compute the object alignment below. */
1616 attrs.align = defattrs->align;
1618 attrs.align = BITS_PER_UNIT;
1619 /* ??? If T is a type, respecting mode alignment may *also* be wrong
1620 e.g. if the type carries an alignment attribute. Should we be
1621 able to simply always use TYPE_ALIGN? */
1624 /* We can set the alignment from the type if we are making an object,
1625 this is an INDIRECT_REF, or if TYPE_ALIGN_OK. */
1626 if (objectp || TREE_CODE (t) == INDIRECT_REF || TYPE_ALIGN_OK (type))
1627 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1629 else if (TREE_CODE (t) == MEM_REF)
1631 tree op0 = TREE_OPERAND (t, 0);
1632 if (TREE_CODE (op0) == ADDR_EXPR
1633 && (DECL_P (TREE_OPERAND (op0, 0))
1634 || CONSTANT_CLASS_P (TREE_OPERAND (op0, 0))))
1636 if (DECL_P (TREE_OPERAND (op0, 0)))
1637 attrs.align = DECL_ALIGN (TREE_OPERAND (op0, 0));
1638 else if (CONSTANT_CLASS_P (TREE_OPERAND (op0, 0)))
1640 attrs.align = TYPE_ALIGN (TREE_TYPE (TREE_OPERAND (op0, 0)));
1641 #ifdef CONSTANT_ALIGNMENT
1642 attrs.align = CONSTANT_ALIGNMENT (TREE_OPERAND (op0, 0),
1646 if (TREE_INT_CST_LOW (TREE_OPERAND (t, 1)) != 0)
1648 unsigned HOST_WIDE_INT ioff
1649 = TREE_INT_CST_LOW (TREE_OPERAND (t, 1));
1650 unsigned HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1651 attrs.align = MIN (aoff, attrs.align);
1655 /* ??? This isn't fully correct, we can't set the alignment from the
1656 type in all cases. */
1657 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1660 else if (TREE_CODE (t) == TARGET_MEM_REF)
1661 /* ??? This isn't fully correct, we can't set the alignment from the
1662 type in all cases. */
1663 attrs.align = MAX (attrs.align, TYPE_ALIGN (type));
1665 /* If the size is known, we can set that. */
1666 if (TYPE_SIZE_UNIT (type) && host_integerp (TYPE_SIZE_UNIT (type), 1))
1668 attrs.size_known_p = true;
1669 attrs.size = tree_low_cst (TYPE_SIZE_UNIT (type), 1);
1672 /* If T is not a type, we may be able to deduce some more information about
1677 bool align_computed = false;
1679 if (TREE_THIS_VOLATILE (t))
1680 MEM_VOLATILE_P (ref) = 1;
1682 /* Now remove any conversions: they don't change what the underlying
1683 object is. Likewise for SAVE_EXPR. */
1684 while (CONVERT_EXPR_P (t)
1685 || TREE_CODE (t) == VIEW_CONVERT_EXPR
1686 || TREE_CODE (t) == SAVE_EXPR)
1687 t = TREE_OPERAND (t, 0);
1689 /* Note whether this expression can trap. */
1690 MEM_NOTRAP_P (ref) = !tree_could_trap_p (t);
1692 base = get_base_address (t);
1693 if (base && DECL_P (base)
1694 && TREE_READONLY (base)
1695 && (TREE_STATIC (base) || DECL_EXTERNAL (base))
1696 && !TREE_THIS_VOLATILE (base))
1697 MEM_READONLY_P (ref) = 1;
1699 /* Mark static const strings readonly as well. */
1700 if (base && TREE_CODE (base) == STRING_CST
1701 && TREE_READONLY (base)
1702 && TREE_STATIC (base))
1703 MEM_READONLY_P (ref) = 1;
1705 /* If this expression uses it's parent's alias set, mark it such
1706 that we won't change it. */
1707 if (component_uses_parent_alias_set (t))
1708 MEM_KEEP_ALIAS_SET_P (ref) = 1;
1710 /* If this is a decl, set the attributes of the MEM from it. */
1714 attrs.offset_known_p = true;
1716 apply_bitpos = bitpos;
1717 if (DECL_SIZE_UNIT (t) && host_integerp (DECL_SIZE_UNIT (t), 1))
1719 attrs.size_known_p = true;
1720 attrs.size = tree_low_cst (DECL_SIZE_UNIT (t), 1);
1723 attrs.size_known_p = false;
1724 attrs.align = DECL_ALIGN (t);
1725 align_computed = true;
1728 /* If this is a constant, we know the alignment. */
1729 else if (CONSTANT_CLASS_P (t))
1731 attrs.align = TYPE_ALIGN (type);
1732 #ifdef CONSTANT_ALIGNMENT
1733 attrs.align = CONSTANT_ALIGNMENT (t, attrs.align);
1735 align_computed = true;
1738 /* If this is a field reference and not a bit-field, record it. */
1739 /* ??? There is some information that can be gleaned from bit-fields,
1740 such as the word offset in the structure that might be modified.
1741 But skip it for now. */
1742 else if (TREE_CODE (t) == COMPONENT_REF
1743 && ! DECL_BIT_FIELD (TREE_OPERAND (t, 1)))
1746 attrs.offset_known_p = true;
1748 apply_bitpos = bitpos;
1749 /* ??? Any reason the field size would be different than
1750 the size we got from the type? */
1753 /* If this is an array reference, look for an outer field reference. */
1754 else if (TREE_CODE (t) == ARRAY_REF)
1756 tree off_tree = size_zero_node;
1757 /* We can't modify t, because we use it at the end of the
1763 tree index = TREE_OPERAND (t2, 1);
1764 tree low_bound = array_ref_low_bound (t2);
1765 tree unit_size = array_ref_element_size (t2);
1767 /* We assume all arrays have sizes that are a multiple of a byte.
1768 First subtract the lower bound, if any, in the type of the
1769 index, then convert to sizetype and multiply by the size of
1770 the array element. */
1771 if (! integer_zerop (low_bound))
1772 index = fold_build2 (MINUS_EXPR, TREE_TYPE (index),
1775 off_tree = size_binop (PLUS_EXPR,
1776 size_binop (MULT_EXPR,
1777 fold_convert (sizetype,
1781 t2 = TREE_OPERAND (t2, 0);
1783 while (TREE_CODE (t2) == ARRAY_REF);
1788 attrs.offset_known_p = false;
1789 if (host_integerp (off_tree, 1))
1791 HOST_WIDE_INT ioff = tree_low_cst (off_tree, 1);
1792 HOST_WIDE_INT aoff = (ioff & -ioff) * BITS_PER_UNIT;
1793 attrs.align = DECL_ALIGN (t2);
1794 if (aoff && (unsigned HOST_WIDE_INT) aoff < attrs.align)
1796 align_computed = true;
1797 attrs.offset_known_p = true;
1798 attrs.offset = ioff;
1799 apply_bitpos = bitpos;
1802 else if (TREE_CODE (t2) == COMPONENT_REF)
1805 attrs.offset_known_p = false;
1806 if (host_integerp (off_tree, 1))
1808 attrs.offset_known_p = true;
1809 attrs.offset = tree_low_cst (off_tree, 1);
1810 apply_bitpos = bitpos;
1812 /* ??? Any reason the field size would be different than
1813 the size we got from the type? */
1816 /* If this is an indirect reference, record it. */
1817 else if (TREE_CODE (t) == MEM_REF)
1820 attrs.offset_known_p = true;
1822 apply_bitpos = bitpos;
1826 /* If this is an indirect reference, record it. */
1827 else if (TREE_CODE (t) == MEM_REF
1828 || TREE_CODE (t) == TARGET_MEM_REF)
1831 attrs.offset_known_p = true;
1833 apply_bitpos = bitpos;
1836 if (!align_computed)
1838 unsigned int obj_align = get_object_alignment (t);
1839 attrs.align = MAX (attrs.align, obj_align);
1843 /* If we modified OFFSET based on T, then subtract the outstanding
1844 bit position offset. Similarly, increase the size of the accessed
1845 object to contain the negative offset. */
1848 gcc_assert (attrs.offset_known_p);
1849 attrs.offset -= apply_bitpos / BITS_PER_UNIT;
1850 if (attrs.size_known_p)
1851 attrs.size += apply_bitpos / BITS_PER_UNIT;
1854 /* Now set the attributes we computed above. */
1855 attrs.addrspace = TYPE_ADDR_SPACE (type);
1856 set_mem_attrs (ref, &attrs);
1858 /* If this is already known to be a scalar or aggregate, we are done. */
1859 if (MEM_IN_STRUCT_P (ref) || MEM_SCALAR_P (ref))
1862 /* If it is a reference into an aggregate, this is part of an aggregate.
1863 Otherwise we don't know. */
1864 else if (TREE_CODE (t) == COMPONENT_REF || TREE_CODE (t) == ARRAY_REF
1865 || TREE_CODE (t) == ARRAY_RANGE_REF
1866 || TREE_CODE (t) == BIT_FIELD_REF)
1867 MEM_IN_STRUCT_P (ref) = 1;
1871 set_mem_attributes (rtx ref, tree t, int objectp)
1873 set_mem_attributes_minus_bitpos (ref, t, objectp, 0);
1876 /* Set the alias set of MEM to SET. */
1879 set_mem_alias_set (rtx mem, alias_set_type set)
1881 struct mem_attrs attrs;
1883 /* If the new and old alias sets don't conflict, something is wrong. */
1884 gcc_checking_assert (alias_sets_conflict_p (set, MEM_ALIAS_SET (mem)));
1885 attrs = *get_mem_attrs (mem);
1887 set_mem_attrs (mem, &attrs);
1890 /* Set the address space of MEM to ADDRSPACE (target-defined). */
1893 set_mem_addr_space (rtx mem, addr_space_t addrspace)
1895 struct mem_attrs attrs;
1897 attrs = *get_mem_attrs (mem);
1898 attrs.addrspace = addrspace;
1899 set_mem_attrs (mem, &attrs);
1902 /* Set the alignment of MEM to ALIGN bits. */
1905 set_mem_align (rtx mem, unsigned int align)
1907 struct mem_attrs attrs;
1909 attrs = *get_mem_attrs (mem);
1910 attrs.align = align;
1911 set_mem_attrs (mem, &attrs);
1914 /* Set the expr for MEM to EXPR. */
1917 set_mem_expr (rtx mem, tree expr)
1919 struct mem_attrs attrs;
1921 attrs = *get_mem_attrs (mem);
1923 set_mem_attrs (mem, &attrs);
1926 /* Set the offset of MEM to OFFSET. */
1929 set_mem_offset (rtx mem, HOST_WIDE_INT offset)
1931 struct mem_attrs attrs;
1933 attrs = *get_mem_attrs (mem);
1934 attrs.offset_known_p = true;
1935 attrs.offset = offset;
1936 set_mem_attrs (mem, &attrs);
1939 /* Clear the offset of MEM. */
1942 clear_mem_offset (rtx mem)
1944 struct mem_attrs attrs;
1946 attrs = *get_mem_attrs (mem);
1947 attrs.offset_known_p = false;
1948 set_mem_attrs (mem, &attrs);
1951 /* Set the size of MEM to SIZE. */
1954 set_mem_size (rtx mem, HOST_WIDE_INT size)
1956 struct mem_attrs attrs;
1958 attrs = *get_mem_attrs (mem);
1959 attrs.size_known_p = true;
1961 set_mem_attrs (mem, &attrs);
1964 /* Clear the size of MEM. */
1967 clear_mem_size (rtx mem)
1969 struct mem_attrs attrs;
1971 attrs = *get_mem_attrs (mem);
1972 attrs.size_known_p = false;
1973 set_mem_attrs (mem, &attrs);
1976 /* Return a memory reference like MEMREF, but with its mode changed to MODE
1977 and its address changed to ADDR. (VOIDmode means don't change the mode.
1978 NULL for ADDR means don't change the address.) VALIDATE is nonzero if the
1979 returned memory location is required to be valid. The memory
1980 attributes are not changed. */
1983 change_address_1 (rtx memref, enum machine_mode mode, rtx addr, int validate)
1988 gcc_assert (MEM_P (memref));
1989 as = MEM_ADDR_SPACE (memref);
1990 if (mode == VOIDmode)
1991 mode = GET_MODE (memref);
1993 addr = XEXP (memref, 0);
1994 if (mode == GET_MODE (memref) && addr == XEXP (memref, 0)
1995 && (!validate || memory_address_addr_space_p (mode, addr, as)))
2000 if (reload_in_progress || reload_completed)
2001 gcc_assert (memory_address_addr_space_p (mode, addr, as));
2003 addr = memory_address_addr_space (mode, addr, as);
2006 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
2009 new_rtx = gen_rtx_MEM (mode, addr);
2010 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2014 /* Like change_address_1 with VALIDATE nonzero, but we are not saying in what
2015 way we are changing MEMREF, so we only preserve the alias set. */
2018 change_address (rtx memref, enum machine_mode mode, rtx addr)
2020 rtx new_rtx = change_address_1 (memref, mode, addr, 1);
2021 enum machine_mode mmode = GET_MODE (new_rtx);
2022 struct mem_attrs attrs, *defattrs;
2024 attrs = *get_mem_attrs (memref);
2025 defattrs = mode_mem_attrs[(int) mmode];
2026 attrs.expr = NULL_TREE;
2027 attrs.offset_known_p = false;
2028 attrs.size_known_p = defattrs->size_known_p;
2029 attrs.size = defattrs->size;
2030 attrs.align = defattrs->align;
2032 /* If there are no changes, just return the original memory reference. */
2033 if (new_rtx == memref)
2035 if (mem_attrs_eq_p (get_mem_attrs (memref), &attrs))
2038 new_rtx = gen_rtx_MEM (mmode, XEXP (memref, 0));
2039 MEM_COPY_ATTRIBUTES (new_rtx, memref);
2042 set_mem_attrs (new_rtx, &attrs);
2046 /* Return a memory reference like MEMREF, but with its mode changed
2047 to MODE and its address offset by OFFSET bytes. If VALIDATE is
2048 nonzero, the memory address is forced to be valid.
2049 If ADJUST is zero, OFFSET is only used to update MEM_ATTRS
2050 and caller is responsible for adjusting MEMREF base register. */
2053 adjust_address_1 (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset,
2054 int validate, int adjust)
2056 rtx addr = XEXP (memref, 0);
2058 enum machine_mode address_mode;
2060 struct mem_attrs attrs, *defattrs;
2061 unsigned HOST_WIDE_INT max_align;
2063 attrs = *get_mem_attrs (memref);
2065 /* If there are no changes, just return the original memory reference. */
2066 if (mode == GET_MODE (memref) && !offset
2067 && (!validate || memory_address_addr_space_p (mode, addr,
2071 /* ??? Prefer to create garbage instead of creating shared rtl.
2072 This may happen even if offset is nonzero -- consider
2073 (plus (plus reg reg) const_int) -- so do this always. */
2074 addr = copy_rtx (addr);
2076 /* Convert a possibly large offset to a signed value within the
2077 range of the target address space. */
2078 address_mode = targetm.addr_space.address_mode (attrs.addrspace);
2079 pbits = GET_MODE_BITSIZE (address_mode);
2080 if (HOST_BITS_PER_WIDE_INT > pbits)
2082 int shift = HOST_BITS_PER_WIDE_INT - pbits;
2083 offset = (((HOST_WIDE_INT) ((unsigned HOST_WIDE_INT) offset << shift))
2089 /* If MEMREF is a LO_SUM and the offset is within the alignment of the
2090 object, we can merge it into the LO_SUM. */
2091 if (GET_MODE (memref) != BLKmode && GET_CODE (addr) == LO_SUM
2093 && (unsigned HOST_WIDE_INT) offset
2094 < GET_MODE_ALIGNMENT (GET_MODE (memref)) / BITS_PER_UNIT)
2095 addr = gen_rtx_LO_SUM (address_mode, XEXP (addr, 0),
2096 plus_constant (XEXP (addr, 1), offset));
2098 addr = plus_constant (addr, offset);
2101 new_rtx = change_address_1 (memref, mode, addr, validate);
2103 /* If the address is a REG, change_address_1 rightfully returns memref,
2104 but this would destroy memref's MEM_ATTRS. */
2105 if (new_rtx == memref && offset != 0)
2106 new_rtx = copy_rtx (new_rtx);
2108 /* Compute the new values of the memory attributes due to this adjustment.
2109 We add the offsets and update the alignment. */
2110 if (attrs.offset_known_p)
2111 attrs.offset += offset;
2113 /* Compute the new alignment by taking the MIN of the alignment and the
2114 lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
2118 max_align = (offset & -offset) * BITS_PER_UNIT;
2119 attrs.align = MIN (attrs.align, max_align);
2122 /* We can compute the size in a number of ways. */
2123 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2124 if (defattrs->size_known_p)
2126 attrs.size_known_p = true;
2127 attrs.size = defattrs->size;
2129 else if (attrs.size_known_p)
2130 attrs.size -= offset;
2132 set_mem_attrs (new_rtx, &attrs);
2134 /* At some point, we should validate that this offset is within the object,
2135 if all the appropriate values are known. */
2139 /* Return a memory reference like MEMREF, but with its mode changed
2140 to MODE and its address changed to ADDR, which is assumed to be
2141 MEMREF offset by OFFSET bytes. If VALIDATE is
2142 nonzero, the memory address is forced to be valid. */
2145 adjust_automodify_address_1 (rtx memref, enum machine_mode mode, rtx addr,
2146 HOST_WIDE_INT offset, int validate)
2148 memref = change_address_1 (memref, VOIDmode, addr, validate);
2149 return adjust_address_1 (memref, mode, offset, validate, 0);
2152 /* Return a memory reference like MEMREF, but whose address is changed by
2153 adding OFFSET, an RTX, to it. POW2 is the highest power of two factor
2154 known to be in OFFSET (possibly 1). */
2157 offset_address (rtx memref, rtx offset, unsigned HOST_WIDE_INT pow2)
2159 rtx new_rtx, addr = XEXP (memref, 0);
2160 enum machine_mode address_mode;
2161 struct mem_attrs attrs, *defattrs;
2163 attrs = *get_mem_attrs (memref);
2164 address_mode = targetm.addr_space.address_mode (attrs.addrspace);
2165 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2167 /* At this point we don't know _why_ the address is invalid. It
2168 could have secondary memory references, multiplies or anything.
2170 However, if we did go and rearrange things, we can wind up not
2171 being able to recognize the magic around pic_offset_table_rtx.
2172 This stuff is fragile, and is yet another example of why it is
2173 bad to expose PIC machinery too early. */
2174 if (! memory_address_addr_space_p (GET_MODE (memref), new_rtx,
2176 && GET_CODE (addr) == PLUS
2177 && XEXP (addr, 0) == pic_offset_table_rtx)
2179 addr = force_reg (GET_MODE (addr), addr);
2180 new_rtx = simplify_gen_binary (PLUS, address_mode, addr, offset);
2183 update_temp_slot_address (XEXP (memref, 0), new_rtx);
2184 new_rtx = change_address_1 (memref, VOIDmode, new_rtx, 1);
2186 /* If there are no changes, just return the original memory reference. */
2187 if (new_rtx == memref)
2190 /* Update the alignment to reflect the offset. Reset the offset, which
2192 defattrs = mode_mem_attrs[(int) GET_MODE (new_rtx)];
2193 attrs.offset_known_p = false;
2194 attrs.size_known_p = defattrs->size_known_p;
2195 attrs.size = defattrs->size;
2196 attrs.align = MIN (attrs.align, pow2 * BITS_PER_UNIT);
2197 set_mem_attrs (new_rtx, &attrs);
2201 /* Return a memory reference like MEMREF, but with its address changed to
2202 ADDR. The caller is asserting that the actual piece of memory pointed
2203 to is the same, just the form of the address is being changed, such as
2204 by putting something into a register. */
2207 replace_equiv_address (rtx memref, rtx addr)
2209 /* change_address_1 copies the memory attribute structure without change
2210 and that's exactly what we want here. */
2211 update_temp_slot_address (XEXP (memref, 0), addr);
2212 return change_address_1 (memref, VOIDmode, addr, 1);
2215 /* Likewise, but the reference is not required to be valid. */
2218 replace_equiv_address_nv (rtx memref, rtx addr)
2220 return change_address_1 (memref, VOIDmode, addr, 0);
2223 /* Return a memory reference like MEMREF, but with its mode widened to
2224 MODE and offset by OFFSET. This would be used by targets that e.g.
2225 cannot issue QImode memory operations and have to use SImode memory
2226 operations plus masking logic. */
2229 widen_memory_access (rtx memref, enum machine_mode mode, HOST_WIDE_INT offset)
2231 rtx new_rtx = adjust_address_1 (memref, mode, offset, 1, 1);
2232 struct mem_attrs attrs;
2233 unsigned int size = GET_MODE_SIZE (mode);
2235 /* If there are no changes, just return the original memory reference. */
2236 if (new_rtx == memref)
2239 attrs = *get_mem_attrs (new_rtx);
2241 /* If we don't know what offset we were at within the expression, then
2242 we can't know if we've overstepped the bounds. */
2243 if (! attrs.offset_known_p)
2244 attrs.expr = NULL_TREE;
2248 if (TREE_CODE (attrs.expr) == COMPONENT_REF)
2250 tree field = TREE_OPERAND (attrs.expr, 1);
2251 tree offset = component_ref_field_offset (attrs.expr);
2253 if (! DECL_SIZE_UNIT (field))
2255 attrs.expr = NULL_TREE;
2259 /* Is the field at least as large as the access? If so, ok,
2260 otherwise strip back to the containing structure. */
2261 if (TREE_CODE (DECL_SIZE_UNIT (field)) == INTEGER_CST
2262 && compare_tree_int (DECL_SIZE_UNIT (field), size) >= 0
2263 && attrs.offset >= 0)
2266 if (! host_integerp (offset, 1))
2268 attrs.expr = NULL_TREE;
2272 attrs.expr = TREE_OPERAND (attrs.expr, 0);
2273 attrs.offset += tree_low_cst (offset, 1);
2274 attrs.offset += (tree_low_cst (DECL_FIELD_BIT_OFFSET (field), 1)
2277 /* Similarly for the decl. */
2278 else if (DECL_P (attrs.expr)
2279 && DECL_SIZE_UNIT (attrs.expr)
2280 && TREE_CODE (DECL_SIZE_UNIT (attrs.expr)) == INTEGER_CST
2281 && compare_tree_int (DECL_SIZE_UNIT (attrs.expr), size) >= 0
2282 && (! attrs.offset_known_p || attrs.offset >= 0))
2286 /* The widened memory access overflows the expression, which means
2287 that it could alias another expression. Zap it. */
2288 attrs.expr = NULL_TREE;
2294 attrs.offset_known_p = false;
2296 /* The widened memory may alias other stuff, so zap the alias set. */
2297 /* ??? Maybe use get_alias_set on any remaining expression. */
2299 attrs.size_known_p = true;
2301 set_mem_attrs (new_rtx, &attrs);
2305 /* A fake decl that is used as the MEM_EXPR of spill slots. */
2306 static GTY(()) tree spill_slot_decl;
2309 get_spill_slot_decl (bool force_build_p)
2311 tree d = spill_slot_decl;
2313 struct mem_attrs attrs;
2315 if (d || !force_build_p)
2318 d = build_decl (DECL_SOURCE_LOCATION (current_function_decl),
2319 VAR_DECL, get_identifier ("%sfp"), void_type_node);
2320 DECL_ARTIFICIAL (d) = 1;
2321 DECL_IGNORED_P (d) = 1;
2323 spill_slot_decl = d;
2325 rd = gen_rtx_MEM (BLKmode, frame_pointer_rtx);
2326 MEM_NOTRAP_P (rd) = 1;
2327 attrs = *mode_mem_attrs[(int) BLKmode];
2328 attrs.alias = new_alias_set ();
2330 set_mem_attrs (rd, &attrs);
2331 SET_DECL_RTL (d, rd);
2336 /* Given MEM, a result from assign_stack_local, fill in the memory
2337 attributes as appropriate for a register allocator spill slot.
2338 These slots are not aliasable by other memory. We arrange for
2339 them all to use a single MEM_EXPR, so that the aliasing code can
2340 work properly in the case of shared spill slots. */
2343 set_mem_attrs_for_spill (rtx mem)
2345 struct mem_attrs attrs;
2348 attrs = *get_mem_attrs (mem);
2349 attrs.expr = get_spill_slot_decl (true);
2350 attrs.alias = MEM_ALIAS_SET (DECL_RTL (attrs.expr));
2351 attrs.addrspace = ADDR_SPACE_GENERIC;
2353 /* We expect the incoming memory to be of the form:
2354 (mem:MODE (plus (reg sfp) (const_int offset)))
2355 with perhaps the plus missing for offset = 0. */
2356 addr = XEXP (mem, 0);
2357 attrs.offset_known_p = true;
2359 if (GET_CODE (addr) == PLUS
2360 && CONST_INT_P (XEXP (addr, 1)))
2361 attrs.offset = INTVAL (XEXP (addr, 1));
2363 set_mem_attrs (mem, &attrs);
2364 MEM_NOTRAP_P (mem) = 1;
2367 /* Return a newly created CODE_LABEL rtx with a unique label number. */
2370 gen_label_rtx (void)
2372 return gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX, NULL_RTX,
2373 NULL, label_num++, NULL);
2376 /* For procedure integration. */
2378 /* Install new pointers to the first and last insns in the chain.
2379 Also, set cur_insn_uid to one higher than the last in use.
2380 Used for an inline-procedure after copying the insn chain. */
2383 set_new_first_and_last_insn (rtx first, rtx last)
2387 set_first_insn (first);
2388 set_last_insn (last);
2391 if (MIN_NONDEBUG_INSN_UID || MAY_HAVE_DEBUG_INSNS)
2393 int debug_count = 0;
2395 cur_insn_uid = MIN_NONDEBUG_INSN_UID - 1;
2396 cur_debug_insn_uid = 0;
2398 for (insn = first; insn; insn = NEXT_INSN (insn))
2399 if (INSN_UID (insn) < MIN_NONDEBUG_INSN_UID)
2400 cur_debug_insn_uid = MAX (cur_debug_insn_uid, INSN_UID (insn));
2403 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2404 if (DEBUG_INSN_P (insn))
2409 cur_debug_insn_uid = MIN_NONDEBUG_INSN_UID + debug_count;
2411 cur_debug_insn_uid++;
2414 for (insn = first; insn; insn = NEXT_INSN (insn))
2415 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
2420 /* Go through all the RTL insn bodies and copy any invalid shared
2421 structure. This routine should only be called once. */
2424 unshare_all_rtl_1 (rtx insn)
2426 /* Unshare just about everything else. */
2427 unshare_all_rtl_in_chain (insn);
2429 /* Make sure the addresses of stack slots found outside the insn chain
2430 (such as, in DECL_RTL of a variable) are not shared
2431 with the insn chain.
2433 This special care is necessary when the stack slot MEM does not
2434 actually appear in the insn chain. If it does appear, its address
2435 is unshared from all else at that point. */
2436 stack_slot_list = copy_rtx_if_shared (stack_slot_list);
2439 /* Go through all the RTL insn bodies and copy any invalid shared
2440 structure, again. This is a fairly expensive thing to do so it
2441 should be done sparingly. */
2444 unshare_all_rtl_again (rtx insn)
2449 for (p = insn; p; p = NEXT_INSN (p))
2452 reset_used_flags (PATTERN (p));
2453 reset_used_flags (REG_NOTES (p));
2455 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2458 /* Make sure that virtual stack slots are not shared. */
2459 set_used_decls (DECL_INITIAL (cfun->decl));
2461 /* Make sure that virtual parameters are not shared. */
2462 for (decl = DECL_ARGUMENTS (cfun->decl); decl; decl = DECL_CHAIN (decl))
2463 set_used_flags (DECL_RTL (decl));
2465 reset_used_flags (stack_slot_list);
2467 unshare_all_rtl_1 (insn);
2471 unshare_all_rtl (void)
2473 unshare_all_rtl_1 (get_insns ());
2477 struct rtl_opt_pass pass_unshare_all_rtl =
2481 "unshare", /* name */
2483 unshare_all_rtl, /* execute */
2486 0, /* static_pass_number */
2487 TV_NONE, /* tv_id */
2488 0, /* properties_required */
2489 0, /* properties_provided */
2490 0, /* properties_destroyed */
2491 0, /* todo_flags_start */
2492 TODO_verify_rtl_sharing /* todo_flags_finish */
2497 /* Check that ORIG is not marked when it should not be and mark ORIG as in use,
2498 Recursively does the same for subexpressions. */
2501 verify_rtx_sharing (rtx orig, rtx insn)
2506 const char *format_ptr;
2511 code = GET_CODE (x);
2513 /* These types may be freely shared. */
2533 /* SCRATCH must be shared because they represent distinct values. */
2535 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2540 if (shared_const_p (orig))
2545 /* A MEM is allowed to be shared if its address is constant. */
2546 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
2547 || reload_completed || reload_in_progress)
2556 /* This rtx may not be shared. If it has already been seen,
2557 replace it with a copy of itself. */
2558 #ifdef ENABLE_CHECKING
2559 if (RTX_FLAG (x, used))
2561 error ("invalid rtl sharing found in the insn");
2563 error ("shared rtx");
2565 internal_error ("internal consistency failure");
2568 gcc_assert (!RTX_FLAG (x, used));
2570 RTX_FLAG (x, used) = 1;
2572 /* Now scan the subexpressions recursively. */
2574 format_ptr = GET_RTX_FORMAT (code);
2576 for (i = 0; i < GET_RTX_LENGTH (code); i++)
2578 switch (*format_ptr++)
2581 verify_rtx_sharing (XEXP (x, i), insn);
2585 if (XVEC (x, i) != NULL)
2588 int len = XVECLEN (x, i);
2590 for (j = 0; j < len; j++)
2592 /* We allow sharing of ASM_OPERANDS inside single
2594 if (j && GET_CODE (XVECEXP (x, i, j)) == SET
2595 && (GET_CODE (SET_SRC (XVECEXP (x, i, j)))
2597 verify_rtx_sharing (SET_DEST (XVECEXP (x, i, j)), insn);
2599 verify_rtx_sharing (XVECEXP (x, i, j), insn);
2608 /* Go through all the RTL insn bodies and check that there is no unexpected
2609 sharing in between the subexpressions. */
2612 verify_rtl_sharing (void)
2616 timevar_push (TV_VERIFY_RTL_SHARING);
2618 for (p = get_insns (); p; p = NEXT_INSN (p))
2621 reset_used_flags (PATTERN (p));
2622 reset_used_flags (REG_NOTES (p));
2624 reset_used_flags (CALL_INSN_FUNCTION_USAGE (p));
2625 if (GET_CODE (PATTERN (p)) == SEQUENCE)
2628 rtx q, sequence = PATTERN (p);
2630 for (i = 0; i < XVECLEN (sequence, 0); i++)
2632 q = XVECEXP (sequence, 0, i);
2633 gcc_assert (INSN_P (q));
2634 reset_used_flags (PATTERN (q));
2635 reset_used_flags (REG_NOTES (q));
2637 reset_used_flags (CALL_INSN_FUNCTION_USAGE (q));
2642 for (p = get_insns (); p; p = NEXT_INSN (p))
2645 verify_rtx_sharing (PATTERN (p), p);
2646 verify_rtx_sharing (REG_NOTES (p), p);
2648 verify_rtx_sharing (CALL_INSN_FUNCTION_USAGE (p), p);
2651 timevar_pop (TV_VERIFY_RTL_SHARING);
2654 /* Go through all the RTL insn bodies and copy any invalid shared structure.
2655 Assumes the mark bits are cleared at entry. */
2658 unshare_all_rtl_in_chain (rtx insn)
2660 for (; insn; insn = NEXT_INSN (insn))
2663 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
2664 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
2666 CALL_INSN_FUNCTION_USAGE (insn)
2667 = copy_rtx_if_shared (CALL_INSN_FUNCTION_USAGE (insn));
2671 /* Go through all virtual stack slots of a function and mark them as
2672 shared. We never replace the DECL_RTLs themselves with a copy,
2673 but expressions mentioned into a DECL_RTL cannot be shared with
2674 expressions in the instruction stream.
2676 Note that reload may convert pseudo registers into memories in-place.
2677 Pseudo registers are always shared, but MEMs never are. Thus if we
2678 reset the used flags on MEMs in the instruction stream, we must set
2679 them again on MEMs that appear in DECL_RTLs. */
2682 set_used_decls (tree blk)
2687 for (t = BLOCK_VARS (blk); t; t = DECL_CHAIN (t))
2688 if (DECL_RTL_SET_P (t))
2689 set_used_flags (DECL_RTL (t));
2691 /* Now process sub-blocks. */
2692 for (t = BLOCK_SUBBLOCKS (blk); t; t = BLOCK_CHAIN (t))
2696 /* Mark ORIG as in use, and return a copy of it if it was already in use.
2697 Recursively does the same for subexpressions. Uses
2698 copy_rtx_if_shared_1 to reduce stack space. */
2701 copy_rtx_if_shared (rtx orig)
2703 copy_rtx_if_shared_1 (&orig);
2707 /* Mark *ORIG1 as in use, and set it to a copy of it if it was already in
2708 use. Recursively does the same for subexpressions. */
2711 copy_rtx_if_shared_1 (rtx *orig1)
2717 const char *format_ptr;
2721 /* Repeat is used to turn tail-recursion into iteration. */
2728 code = GET_CODE (x);
2730 /* These types may be freely shared. */
2749 /* SCRATCH must be shared because they represent distinct values. */
2752 if (REG_P (XEXP (x, 0)) && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)
2757 if (shared_const_p (x))
2767 /* The chain of insns is not being copied. */
2774 /* This rtx may not be shared. If it has already been seen,
2775 replace it with a copy of itself. */
2777 if (RTX_FLAG (x, used))
2779 x = shallow_copy_rtx (x);
2782 RTX_FLAG (x, used) = 1;
2784 /* Now scan the subexpressions recursively.
2785 We can store any replaced subexpressions directly into X
2786 since we know X is not shared! Any vectors in X
2787 must be copied if X was copied. */
2789 format_ptr = GET_RTX_FORMAT (code);
2790 length = GET_RTX_LENGTH (code);
2793 for (i = 0; i < length; i++)
2795 switch (*format_ptr++)
2799 copy_rtx_if_shared_1 (last_ptr);
2800 last_ptr = &XEXP (x, i);
2804 if (XVEC (x, i) != NULL)
2807 int len = XVECLEN (x, i);
2809 /* Copy the vector iff I copied the rtx and the length
2811 if (copied && len > 0)
2812 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
2814 /* Call recursively on all inside the vector. */
2815 for (j = 0; j < len; j++)
2818 copy_rtx_if_shared_1 (last_ptr);
2819 last_ptr = &XVECEXP (x, i, j);
2834 /* Set the USED bit in X and its non-shareable subparts to FLAG. */
2837 mark_used_flags (rtx x, int flag)
2841 const char *format_ptr;
2844 /* Repeat is used to turn tail-recursion into iteration. */
2849 code = GET_CODE (x);
2851 /* These types may be freely shared so we needn't do any resetting
2878 /* The chain of insns is not being copied. */
2885 RTX_FLAG (x, used) = flag;
2887 format_ptr = GET_RTX_FORMAT (code);
2888 length = GET_RTX_LENGTH (code);
2890 for (i = 0; i < length; i++)
2892 switch (*format_ptr++)
2900 mark_used_flags (XEXP (x, i), flag);
2904 for (j = 0; j < XVECLEN (x, i); j++)
2905 mark_used_flags (XVECEXP (x, i, j), flag);
2911 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
2912 to look for shared sub-parts. */
2915 reset_used_flags (rtx x)
2917 mark_used_flags (x, 0);
2920 /* Set all the USED bits in X to allow copy_rtx_if_shared to be used
2921 to look for shared sub-parts. */
2924 set_used_flags (rtx x)
2926 mark_used_flags (x, 1);
2929 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2930 Return X or the rtx for the pseudo reg the value of X was copied into.
2931 OTHER must be valid as a SET_DEST. */
2934 make_safe_from (rtx x, rtx other)
2937 switch (GET_CODE (other))
2940 other = SUBREG_REG (other);
2942 case STRICT_LOW_PART:
2945 other = XEXP (other, 0);
2954 && GET_CODE (x) != SUBREG)
2956 && (REGNO (other) < FIRST_PSEUDO_REGISTER
2957 || reg_mentioned_p (other, x))))
2959 rtx temp = gen_reg_rtx (GET_MODE (x));
2960 emit_move_insn (temp, x);
2966 /* Emission of insns (adding them to the doubly-linked list). */
2968 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2971 get_last_insn_anywhere (void)
2973 struct sequence_stack *stack;
2974 if (get_last_insn ())
2975 return get_last_insn ();
2976 for (stack = seq_stack; stack; stack = stack->next)
2977 if (stack->last != 0)
2982 /* Return the first nonnote insn emitted in current sequence or current
2983 function. This routine looks inside SEQUENCEs. */
2986 get_first_nonnote_insn (void)
2988 rtx insn = get_insns ();
2993 for (insn = next_insn (insn);
2994 insn && NOTE_P (insn);
2995 insn = next_insn (insn))
2999 if (NONJUMP_INSN_P (insn)
3000 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3001 insn = XVECEXP (PATTERN (insn), 0, 0);
3008 /* Return the last nonnote insn emitted in current sequence or current
3009 function. This routine looks inside SEQUENCEs. */
3012 get_last_nonnote_insn (void)
3014 rtx insn = get_last_insn ();
3019 for (insn = previous_insn (insn);
3020 insn && NOTE_P (insn);
3021 insn = previous_insn (insn))
3025 if (NONJUMP_INSN_P (insn)
3026 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3027 insn = XVECEXP (PATTERN (insn), 0,
3028 XVECLEN (PATTERN (insn), 0) - 1);
3035 /* Return the number of actual (non-debug) insns emitted in this
3039 get_max_insn_count (void)
3041 int n = cur_insn_uid;
3043 /* The table size must be stable across -g, to avoid codegen
3044 differences due to debug insns, and not be affected by
3045 -fmin-insn-uid, to avoid excessive table size and to simplify
3046 debugging of -fcompare-debug failures. */
3047 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3048 n -= cur_debug_insn_uid;
3050 n -= MIN_NONDEBUG_INSN_UID;
3056 /* Return the next insn. If it is a SEQUENCE, return the first insn
3060 next_insn (rtx insn)
3064 insn = NEXT_INSN (insn);
3065 if (insn && NONJUMP_INSN_P (insn)
3066 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3067 insn = XVECEXP (PATTERN (insn), 0, 0);
3073 /* Return the previous insn. If it is a SEQUENCE, return the last insn
3077 previous_insn (rtx insn)
3081 insn = PREV_INSN (insn);
3082 if (insn && NONJUMP_INSN_P (insn)
3083 && GET_CODE (PATTERN (insn)) == SEQUENCE)
3084 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
3090 /* Return the next insn after INSN that is not a NOTE. This routine does not
3091 look inside SEQUENCEs. */
3094 next_nonnote_insn (rtx insn)
3098 insn = NEXT_INSN (insn);
3099 if (insn == 0 || !NOTE_P (insn))
3106 /* Return the next insn after INSN that is not a NOTE, but stop the
3107 search before we enter another basic block. This routine does not
3108 look inside SEQUENCEs. */
3111 next_nonnote_insn_bb (rtx insn)
3115 insn = NEXT_INSN (insn);
3116 if (insn == 0 || !NOTE_P (insn))
3118 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3125 /* Return the previous insn before INSN that is not a NOTE. This routine does
3126 not look inside SEQUENCEs. */
3129 prev_nonnote_insn (rtx insn)
3133 insn = PREV_INSN (insn);
3134 if (insn == 0 || !NOTE_P (insn))
3141 /* Return the previous insn before INSN that is not a NOTE, but stop
3142 the search before we enter another basic block. This routine does
3143 not look inside SEQUENCEs. */
3146 prev_nonnote_insn_bb (rtx insn)
3150 insn = PREV_INSN (insn);
3151 if (insn == 0 || !NOTE_P (insn))
3153 if (NOTE_INSN_BASIC_BLOCK_P (insn))
3160 /* Return the next insn after INSN that is not a DEBUG_INSN. This
3161 routine does not look inside SEQUENCEs. */
3164 next_nondebug_insn (rtx insn)
3168 insn = NEXT_INSN (insn);
3169 if (insn == 0 || !DEBUG_INSN_P (insn))
3176 /* Return the previous insn before INSN that is not a DEBUG_INSN.
3177 This routine does not look inside SEQUENCEs. */
3180 prev_nondebug_insn (rtx insn)
3184 insn = PREV_INSN (insn);
3185 if (insn == 0 || !DEBUG_INSN_P (insn))
3192 /* Return the next insn after INSN that is not a NOTE nor DEBUG_INSN.
3193 This routine does not look inside SEQUENCEs. */
3196 next_nonnote_nondebug_insn (rtx insn)
3200 insn = NEXT_INSN (insn);
3201 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3208 /* Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN.
3209 This routine does not look inside SEQUENCEs. */
3212 prev_nonnote_nondebug_insn (rtx insn)
3216 insn = PREV_INSN (insn);
3217 if (insn == 0 || (!NOTE_P (insn) && !DEBUG_INSN_P (insn)))
3224 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
3225 or 0, if there is none. This routine does not look inside
3229 next_real_insn (rtx insn)
3233 insn = NEXT_INSN (insn);
3234 if (insn == 0 || INSN_P (insn))
3241 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
3242 or 0, if there is none. This routine does not look inside
3246 prev_real_insn (rtx insn)
3250 insn = PREV_INSN (insn);
3251 if (insn == 0 || INSN_P (insn))
3258 /* Return the last CALL_INSN in the current list, or 0 if there is none.
3259 This routine does not look inside SEQUENCEs. */
3262 last_call_insn (void)
3266 for (insn = get_last_insn ();
3267 insn && !CALL_P (insn);
3268 insn = PREV_INSN (insn))
3274 /* Find the next insn after INSN that really does something. This routine
3275 does not look inside SEQUENCEs. After reload this also skips over
3276 standalone USE and CLOBBER insn. */
3279 active_insn_p (const_rtx insn)
3281 return (CALL_P (insn) || JUMP_P (insn)
3282 || (NONJUMP_INSN_P (insn)
3283 && (! reload_completed
3284 || (GET_CODE (PATTERN (insn)) != USE
3285 && GET_CODE (PATTERN (insn)) != CLOBBER))));
3289 next_active_insn (rtx insn)
3293 insn = NEXT_INSN (insn);
3294 if (insn == 0 || active_insn_p (insn))
3301 /* Find the last insn before INSN that really does something. This routine
3302 does not look inside SEQUENCEs. After reload this also skips over
3303 standalone USE and CLOBBER insn. */
3306 prev_active_insn (rtx insn)
3310 insn = PREV_INSN (insn);
3311 if (insn == 0 || active_insn_p (insn))
3318 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
3321 next_label (rtx insn)
3325 insn = NEXT_INSN (insn);
3326 if (insn == 0 || LABEL_P (insn))
3333 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
3336 prev_label (rtx insn)
3340 insn = PREV_INSN (insn);
3341 if (insn == 0 || LABEL_P (insn))
3348 /* Return the last label to mark the same position as LABEL. Return LABEL
3349 itself if it is null or any return rtx. */
3352 skip_consecutive_labels (rtx label)
3356 if (label && ANY_RETURN_P (label))
3359 for (insn = label; insn != 0 && !INSN_P (insn); insn = NEXT_INSN (insn))
3367 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
3368 and REG_CC_USER notes so we can find it. */
3371 link_cc0_insns (rtx insn)
3373 rtx user = next_nonnote_insn (insn);
3375 if (NONJUMP_INSN_P (user) && GET_CODE (PATTERN (user)) == SEQUENCE)
3376 user = XVECEXP (PATTERN (user), 0, 0);
3378 add_reg_note (user, REG_CC_SETTER, insn);
3379 add_reg_note (insn, REG_CC_USER, user);
3382 /* Return the next insn that uses CC0 after INSN, which is assumed to
3383 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
3384 applied to the result of this function should yield INSN).
3386 Normally, this is simply the next insn. However, if a REG_CC_USER note
3387 is present, it contains the insn that uses CC0.
3389 Return 0 if we can't find the insn. */
3392 next_cc0_user (rtx insn)
3394 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
3397 return XEXP (note, 0);
3399 insn = next_nonnote_insn (insn);
3400 if (insn && NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
3401 insn = XVECEXP (PATTERN (insn), 0, 0);
3403 if (insn && INSN_P (insn) && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
3409 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
3410 note, it is the previous insn. */
3413 prev_cc0_setter (rtx insn)
3415 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
3418 return XEXP (note, 0);
3420 insn = prev_nonnote_insn (insn);
3421 gcc_assert (sets_cc0_p (PATTERN (insn)));
3428 /* Find a RTX_AUTOINC class rtx which matches DATA. */
3431 find_auto_inc (rtx *xp, void *data)
3434 rtx reg = (rtx) data;
3436 if (GET_RTX_CLASS (GET_CODE (x)) != RTX_AUTOINC)
3439 switch (GET_CODE (x))
3447 if (rtx_equal_p (reg, XEXP (x, 0)))
3458 /* Increment the label uses for all labels present in rtx. */
3461 mark_label_nuses (rtx x)
3467 code = GET_CODE (x);
3468 if (code == LABEL_REF && LABEL_P (XEXP (x, 0)))
3469 LABEL_NUSES (XEXP (x, 0))++;
3471 fmt = GET_RTX_FORMAT (code);
3472 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3475 mark_label_nuses (XEXP (x, i));
3476 else if (fmt[i] == 'E')
3477 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
3478 mark_label_nuses (XVECEXP (x, i, j));
3483 /* Try splitting insns that can be split for better scheduling.
3484 PAT is the pattern which might split.
3485 TRIAL is the insn providing PAT.
3486 LAST is nonzero if we should return the last insn of the sequence produced.
3488 If this routine succeeds in splitting, it returns the first or last
3489 replacement insn depending on the value of LAST. Otherwise, it
3490 returns TRIAL. If the insn to be returned can be split, it will be. */
3493 try_split (rtx pat, rtx trial, int last)
3495 rtx before = PREV_INSN (trial);
3496 rtx after = NEXT_INSN (trial);
3497 int has_barrier = 0;
3500 rtx insn_last, insn;
3503 /* We're not good at redistributing frame information. */
3504 if (RTX_FRAME_RELATED_P (trial))
3507 if (any_condjump_p (trial)
3508 && (note = find_reg_note (trial, REG_BR_PROB, 0)))
3509 split_branch_probability = INTVAL (XEXP (note, 0));
3510 probability = split_branch_probability;
3512 seq = split_insns (pat, trial);
3514 split_branch_probability = -1;
3516 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
3517 We may need to handle this specially. */
3518 if (after && BARRIER_P (after))
3521 after = NEXT_INSN (after);
3527 /* Avoid infinite loop if any insn of the result matches
3528 the original pattern. */
3532 if (INSN_P (insn_last)
3533 && rtx_equal_p (PATTERN (insn_last), pat))
3535 if (!NEXT_INSN (insn_last))
3537 insn_last = NEXT_INSN (insn_last);
3540 /* We will be adding the new sequence to the function. The splitters
3541 may have introduced invalid RTL sharing, so unshare the sequence now. */
3542 unshare_all_rtl_in_chain (seq);
3545 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3549 mark_jump_label (PATTERN (insn), insn, 0);
3551 if (probability != -1
3552 && any_condjump_p (insn)
3553 && !find_reg_note (insn, REG_BR_PROB, 0))
3555 /* We can preserve the REG_BR_PROB notes only if exactly
3556 one jump is created, otherwise the machine description
3557 is responsible for this step using
3558 split_branch_probability variable. */
3559 gcc_assert (njumps == 1);
3560 add_reg_note (insn, REG_BR_PROB, GEN_INT (probability));
3565 /* If we are splitting a CALL_INSN, look for the CALL_INSN
3566 in SEQ and copy any additional information across. */
3569 for (insn = insn_last; insn ; insn = PREV_INSN (insn))
3574 /* Add the old CALL_INSN_FUNCTION_USAGE to whatever the
3575 target may have explicitly specified. */
3576 p = &CALL_INSN_FUNCTION_USAGE (insn);
3579 *p = CALL_INSN_FUNCTION_USAGE (trial);
3581 /* If the old call was a sibling call, the new one must
3583 SIBLING_CALL_P (insn) = SIBLING_CALL_P (trial);
3585 /* If the new call is the last instruction in the sequence,
3586 it will effectively replace the old call in-situ. Otherwise
3587 we must move any following NOTE_INSN_CALL_ARG_LOCATION note
3588 so that it comes immediately after the new call. */
3589 if (NEXT_INSN (insn))
3590 for (next = NEXT_INSN (trial);
3591 next && NOTE_P (next);
3592 next = NEXT_INSN (next))
3593 if (NOTE_KIND (next) == NOTE_INSN_CALL_ARG_LOCATION)
3596 add_insn_after (next, insn, NULL);
3602 /* Copy notes, particularly those related to the CFG. */
3603 for (note = REG_NOTES (trial); note; note = XEXP (note, 1))
3605 switch (REG_NOTE_KIND (note))
3608 copy_reg_eh_region_note_backward (note, insn_last, NULL);
3613 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3616 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3620 case REG_NON_LOCAL_GOTO:
3621 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3624 add_reg_note (insn, REG_NOTE_KIND (note), XEXP (note, 0));
3630 for (insn = insn_last; insn != NULL_RTX; insn = PREV_INSN (insn))
3632 rtx reg = XEXP (note, 0);
3633 if (!FIND_REG_INC_NOTE (insn, reg)
3634 && for_each_rtx (&PATTERN (insn), find_auto_inc, reg) > 0)
3635 add_reg_note (insn, REG_INC, reg);
3641 fixup_args_size_notes (NULL_RTX, insn_last, INTVAL (XEXP (note, 0)));
3649 /* If there are LABELS inside the split insns increment the
3650 usage count so we don't delete the label. */
3654 while (insn != NULL_RTX)
3656 /* JUMP_P insns have already been "marked" above. */
3657 if (NONJUMP_INSN_P (insn))
3658 mark_label_nuses (PATTERN (insn));
3660 insn = PREV_INSN (insn);
3664 tem = emit_insn_after_setloc (seq, trial, INSN_LOCATOR (trial));
3666 delete_insn (trial);
3668 emit_barrier_after (tem);
3670 /* Recursively call try_split for each new insn created; by the
3671 time control returns here that insn will be fully split, so
3672 set LAST and continue from the insn after the one returned.
3673 We can't use next_active_insn here since AFTER may be a note.
3674 Ignore deleted insns, which can be occur if not optimizing. */
3675 for (tem = NEXT_INSN (before); tem != after; tem = NEXT_INSN (tem))
3676 if (! INSN_DELETED_P (tem) && INSN_P (tem))
3677 tem = try_split (PATTERN (tem), tem, 1);
3679 /* Return either the first or the last insn, depending on which was
3682 ? (after ? PREV_INSN (after) : get_last_insn ())
3683 : NEXT_INSN (before);
3686 /* Make and return an INSN rtx, initializing all its slots.
3687 Store PATTERN in the pattern slots. */
3690 make_insn_raw (rtx pattern)
3694 insn = rtx_alloc (INSN);
3696 INSN_UID (insn) = cur_insn_uid++;
3697 PATTERN (insn) = pattern;
3698 INSN_CODE (insn) = -1;
3699 REG_NOTES (insn) = NULL;
3700 INSN_LOCATOR (insn) = curr_insn_locator ();
3701 BLOCK_FOR_INSN (insn) = NULL;
3703 #ifdef ENABLE_RTL_CHECKING
3706 && (returnjump_p (insn)
3707 || (GET_CODE (insn) == SET
3708 && SET_DEST (insn) == pc_rtx)))
3710 warning (0, "ICE: emit_insn used where emit_jump_insn needed:\n");
3718 /* Like `make_insn_raw' but make a DEBUG_INSN instead of an insn. */
3721 make_debug_insn_raw (rtx pattern)
3725 insn = rtx_alloc (DEBUG_INSN);
3726 INSN_UID (insn) = cur_debug_insn_uid++;
3727 if (cur_debug_insn_uid > MIN_NONDEBUG_INSN_UID)
3728 INSN_UID (insn) = cur_insn_uid++;
3730 PATTERN (insn) = pattern;
3731 INSN_CODE (insn) = -1;
3732 REG_NOTES (insn) = NULL;
3733 INSN_LOCATOR (insn) = curr_insn_locator ();
3734 BLOCK_FOR_INSN (insn) = NULL;
3739 /* Like `make_insn_raw' but make a JUMP_INSN instead of an insn. */
3742 make_jump_insn_raw (rtx pattern)
3746 insn = rtx_alloc (JUMP_INSN);
3747 INSN_UID (insn) = cur_insn_uid++;
3749 PATTERN (insn) = pattern;
3750 INSN_CODE (insn) = -1;
3751 REG_NOTES (insn) = NULL;
3752 JUMP_LABEL (insn) = NULL;
3753 INSN_LOCATOR (insn) = curr_insn_locator ();
3754 BLOCK_FOR_INSN (insn) = NULL;
3759 /* Like `make_insn_raw' but make a CALL_INSN instead of an insn. */
3762 make_call_insn_raw (rtx pattern)
3766 insn = rtx_alloc (CALL_INSN);
3767 INSN_UID (insn) = cur_insn_uid++;
3769 PATTERN (insn) = pattern;
3770 INSN_CODE (insn) = -1;
3771 REG_NOTES (insn) = NULL;
3772 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
3773 INSN_LOCATOR (insn) = curr_insn_locator ();
3774 BLOCK_FOR_INSN (insn) = NULL;
3779 /* Add INSN to the end of the doubly-linked list.
3780 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
3785 PREV_INSN (insn) = get_last_insn();
3786 NEXT_INSN (insn) = 0;
3788 if (NULL != get_last_insn())
3789 NEXT_INSN (get_last_insn ()) = insn;
3791 if (NULL == get_insns ())
3792 set_first_insn (insn);
3794 set_last_insn (insn);
3797 /* Add INSN into the doubly-linked list after insn AFTER. This and
3798 the next should be the only functions called to insert an insn once
3799 delay slots have been filled since only they know how to update a
3803 add_insn_after (rtx insn, rtx after, basic_block bb)
3805 rtx next = NEXT_INSN (after);
3807 gcc_assert (!optimize || !INSN_DELETED_P (after));
3809 NEXT_INSN (insn) = next;
3810 PREV_INSN (insn) = after;
3814 PREV_INSN (next) = insn;
3815 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3816 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
3818 else if (get_last_insn () == after)
3819 set_last_insn (insn);
3822 struct sequence_stack *stack = seq_stack;
3823 /* Scan all pending sequences too. */
3824 for (; stack; stack = stack->next)
3825 if (after == stack->last)
3834 if (!BARRIER_P (after)
3835 && !BARRIER_P (insn)
3836 && (bb = BLOCK_FOR_INSN (after)))
3838 set_block_for_insn (insn, bb);
3840 df_insn_rescan (insn);
3841 /* Should not happen as first in the BB is always
3842 either NOTE or LABEL. */
3843 if (BB_END (bb) == after
3844 /* Avoid clobbering of structure when creating new BB. */
3845 && !BARRIER_P (insn)
3846 && !NOTE_INSN_BASIC_BLOCK_P (insn))
3850 NEXT_INSN (after) = insn;
3851 if (NONJUMP_INSN_P (after) && GET_CODE (PATTERN (after)) == SEQUENCE)
3853 rtx sequence = PATTERN (after);
3854 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3858 /* Add INSN into the doubly-linked list before insn BEFORE. This and
3859 the previous should be the only functions called to insert an insn
3860 once delay slots have been filled since only they know how to
3861 update a SEQUENCE. If BB is NULL, an attempt is made to infer the
3865 add_insn_before (rtx insn, rtx before, basic_block bb)
3867 rtx prev = PREV_INSN (before);
3869 gcc_assert (!optimize || !INSN_DELETED_P (before));
3871 PREV_INSN (insn) = prev;
3872 NEXT_INSN (insn) = before;
3876 NEXT_INSN (prev) = insn;
3877 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3879 rtx sequence = PATTERN (prev);
3880 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
3883 else if (get_insns () == before)
3884 set_first_insn (insn);
3887 struct sequence_stack *stack = seq_stack;
3888 /* Scan all pending sequences too. */
3889 for (; stack; stack = stack->next)
3890 if (before == stack->first)
3892 stack->first = insn;
3900 && !BARRIER_P (before)
3901 && !BARRIER_P (insn))
3902 bb = BLOCK_FOR_INSN (before);
3906 set_block_for_insn (insn, bb);
3908 df_insn_rescan (insn);
3909 /* Should not happen as first in the BB is always either NOTE or
3911 gcc_assert (BB_HEAD (bb) != insn
3912 /* Avoid clobbering of structure when creating new BB. */
3914 || NOTE_INSN_BASIC_BLOCK_P (insn));
3917 PREV_INSN (before) = insn;
3918 if (NONJUMP_INSN_P (before) && GET_CODE (PATTERN (before)) == SEQUENCE)
3919 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
3923 /* Replace insn with an deleted instruction note. */
3926 set_insn_deleted (rtx insn)
3928 df_insn_delete (BLOCK_FOR_INSN (insn), INSN_UID (insn));
3929 PUT_CODE (insn, NOTE);
3930 NOTE_KIND (insn) = NOTE_INSN_DELETED;
3934 /* Remove an insn from its doubly-linked list. This function knows how
3935 to handle sequences. */
3937 remove_insn (rtx insn)
3939 rtx next = NEXT_INSN (insn);
3940 rtx prev = PREV_INSN (insn);
3943 /* Later in the code, the block will be marked dirty. */
3944 df_insn_delete (NULL, INSN_UID (insn));
3948 NEXT_INSN (prev) = next;
3949 if (NONJUMP_INSN_P (prev) && GET_CODE (PATTERN (prev)) == SEQUENCE)
3951 rtx sequence = PATTERN (prev);
3952 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
3955 else if (get_insns () == insn)
3958 PREV_INSN (next) = NULL;
3959 set_first_insn (next);
3963 struct sequence_stack *stack = seq_stack;
3964 /* Scan all pending sequences too. */
3965 for (; stack; stack = stack->next)
3966 if (insn == stack->first)
3968 stack->first = next;
3977 PREV_INSN (next) = prev;
3978 if (NONJUMP_INSN_P (next) && GET_CODE (PATTERN (next)) == SEQUENCE)
3979 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
3981 else if (get_last_insn () == insn)
3982 set_last_insn (prev);
3985 struct sequence_stack *stack = seq_stack;
3986 /* Scan all pending sequences too. */
3987 for (; stack; stack = stack->next)
3988 if (insn == stack->last)
3996 if (!BARRIER_P (insn)
3997 && (bb = BLOCK_FOR_INSN (insn)))
3999 if (NONDEBUG_INSN_P (insn))
4000 df_set_bb_dirty (bb);
4001 if (BB_HEAD (bb) == insn)
4003 /* Never ever delete the basic block note without deleting whole
4005 gcc_assert (!NOTE_P (insn));
4006 BB_HEAD (bb) = next;
4008 if (BB_END (bb) == insn)
4013 /* Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN. */
4016 add_function_usage_to (rtx call_insn, rtx call_fusage)
4018 gcc_assert (call_insn && CALL_P (call_insn));
4020 /* Put the register usage information on the CALL. If there is already
4021 some usage information, put ours at the end. */
4022 if (CALL_INSN_FUNCTION_USAGE (call_insn))
4026 for (link = CALL_INSN_FUNCTION_USAGE (call_insn); XEXP (link, 1) != 0;
4027 link = XEXP (link, 1))
4030 XEXP (link, 1) = call_fusage;
4033 CALL_INSN_FUNCTION_USAGE (call_insn) = call_fusage;
4036 /* Delete all insns made since FROM.
4037 FROM becomes the new last instruction. */
4040 delete_insns_since (rtx from)
4045 NEXT_INSN (from) = 0;
4046 set_last_insn (from);
4049 /* This function is deprecated, please use sequences instead.
4051 Move a consecutive bunch of insns to a different place in the chain.
4052 The insns to be moved are those between FROM and TO.
4053 They are moved to a new position after the insn AFTER.
4054 AFTER must not be FROM or TO or any insn in between.
4056 This function does not know about SEQUENCEs and hence should not be
4057 called after delay-slot filling has been done. */
4060 reorder_insns_nobb (rtx from, rtx to, rtx after)
4062 #ifdef ENABLE_CHECKING
4064 for (x = from; x != to; x = NEXT_INSN (x))
4065 gcc_assert (after != x);
4066 gcc_assert (after != to);
4069 /* Splice this bunch out of where it is now. */
4070 if (PREV_INSN (from))
4071 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
4073 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
4074 if (get_last_insn () == to)
4075 set_last_insn (PREV_INSN (from));
4076 if (get_insns () == from)
4077 set_first_insn (NEXT_INSN (to));
4079 /* Make the new neighbors point to it and it to them. */
4080 if (NEXT_INSN (after))
4081 PREV_INSN (NEXT_INSN (after)) = to;
4083 NEXT_INSN (to) = NEXT_INSN (after);
4084 PREV_INSN (from) = after;
4085 NEXT_INSN (after) = from;
4086 if (after == get_last_insn())
4090 /* Same as function above, but take care to update BB boundaries. */
4092 reorder_insns (rtx from, rtx to, rtx after)
4094 rtx prev = PREV_INSN (from);
4095 basic_block bb, bb2;
4097 reorder_insns_nobb (from, to, after);
4099 if (!BARRIER_P (after)
4100 && (bb = BLOCK_FOR_INSN (after)))
4103 df_set_bb_dirty (bb);
4105 if (!BARRIER_P (from)
4106 && (bb2 = BLOCK_FOR_INSN (from)))
4108 if (BB_END (bb2) == to)
4109 BB_END (bb2) = prev;
4110 df_set_bb_dirty (bb2);
4113 if (BB_END (bb) == after)
4116 for (x = from; x != NEXT_INSN (to); x = NEXT_INSN (x))
4118 df_insn_change_bb (x, bb);
4123 /* Emit insn(s) of given code and pattern
4124 at a specified place within the doubly-linked list.
4126 All of the emit_foo global entry points accept an object
4127 X which is either an insn list or a PATTERN of a single
4130 There are thus a few canonical ways to generate code and
4131 emit it at a specific place in the instruction stream. For
4132 example, consider the instruction named SPOT and the fact that
4133 we would like to emit some instructions before SPOT. We might
4137 ... emit the new instructions ...
4138 insns_head = get_insns ();
4141 emit_insn_before (insns_head, SPOT);
4143 It used to be common to generate SEQUENCE rtl instead, but that
4144 is a relic of the past which no longer occurs. The reason is that
4145 SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
4146 generated would almost certainly die right after it was created. */
4149 emit_pattern_before_noloc (rtx x, rtx before, rtx last, basic_block bb,
4150 rtx (*make_raw) (rtx))
4154 gcc_assert (before);
4159 switch (GET_CODE (x))
4171 rtx next = NEXT_INSN (insn);
4172 add_insn_before (insn, before, bb);
4178 #ifdef ENABLE_RTL_CHECKING
4185 last = (*make_raw) (x);
4186 add_insn_before (last, before, bb);
4193 /* Make X be output before the instruction BEFORE. */
4196 emit_insn_before_noloc (rtx x, rtx before, basic_block bb)
4198 return emit_pattern_before_noloc (x, before, before, bb, make_insn_raw);
4201 /* Make an instruction with body X and code JUMP_INSN
4202 and output it before the instruction BEFORE. */
4205 emit_jump_insn_before_noloc (rtx x, rtx before)
4207 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4208 make_jump_insn_raw);
4211 /* Make an instruction with body X and code CALL_INSN
4212 and output it before the instruction BEFORE. */
4215 emit_call_insn_before_noloc (rtx x, rtx before)
4217 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4218 make_call_insn_raw);
4221 /* Make an instruction with body X and code DEBUG_INSN
4222 and output it before the instruction BEFORE. */
4225 emit_debug_insn_before_noloc (rtx x, rtx before)
4227 return emit_pattern_before_noloc (x, before, NULL_RTX, NULL,
4228 make_debug_insn_raw);
4231 /* Make an insn of code BARRIER
4232 and output it before the insn BEFORE. */
4235 emit_barrier_before (rtx before)
4237 rtx insn = rtx_alloc (BARRIER);
4239 INSN_UID (insn) = cur_insn_uid++;
4241 add_insn_before (insn, before, NULL);
4245 /* Emit the label LABEL before the insn BEFORE. */
4248 emit_label_before (rtx label, rtx before)
4250 /* This can be called twice for the same label as a result of the
4251 confusion that follows a syntax error! So make it harmless. */
4252 if (INSN_UID (label) == 0)
4254 INSN_UID (label) = cur_insn_uid++;
4255 add_insn_before (label, before, NULL);
4261 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
4264 emit_note_before (enum insn_note subtype, rtx before)
4266 rtx note = rtx_alloc (NOTE);
4267 INSN_UID (note) = cur_insn_uid++;
4268 NOTE_KIND (note) = subtype;
4269 BLOCK_FOR_INSN (note) = NULL;
4270 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4272 add_insn_before (note, before, NULL);
4276 /* Helper for emit_insn_after, handles lists of instructions
4280 emit_insn_after_1 (rtx first, rtx after, basic_block bb)
4284 if (!bb && !BARRIER_P (after))
4285 bb = BLOCK_FOR_INSN (after);
4289 df_set_bb_dirty (bb);
4290 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4291 if (!BARRIER_P (last))
4293 set_block_for_insn (last, bb);
4294 df_insn_rescan (last);
4296 if (!BARRIER_P (last))
4298 set_block_for_insn (last, bb);
4299 df_insn_rescan (last);
4301 if (BB_END (bb) == after)
4305 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
4308 after_after = NEXT_INSN (after);
4310 NEXT_INSN (after) = first;
4311 PREV_INSN (first) = after;
4312 NEXT_INSN (last) = after_after;
4314 PREV_INSN (after_after) = last;
4316 if (after == get_last_insn())
4317 set_last_insn (last);
4323 emit_pattern_after_noloc (rtx x, rtx after, basic_block bb,
4324 rtx (*make_raw)(rtx))
4333 switch (GET_CODE (x))
4342 last = emit_insn_after_1 (x, after, bb);
4345 #ifdef ENABLE_RTL_CHECKING
4352 last = (*make_raw) (x);
4353 add_insn_after (last, after, bb);
4360 /* Make X be output after the insn AFTER and set the BB of insn. If
4361 BB is NULL, an attempt is made to infer the BB from AFTER. */
4364 emit_insn_after_noloc (rtx x, rtx after, basic_block bb)
4366 return emit_pattern_after_noloc (x, after, bb, make_insn_raw);
4370 /* Make an insn of code JUMP_INSN with body X
4371 and output it after the insn AFTER. */
4374 emit_jump_insn_after_noloc (rtx x, rtx after)
4376 return emit_pattern_after_noloc (x, after, NULL, make_jump_insn_raw);
4379 /* Make an instruction with body X and code CALL_INSN
4380 and output it after the instruction AFTER. */
4383 emit_call_insn_after_noloc (rtx x, rtx after)
4385 return emit_pattern_after_noloc (x, after, NULL, make_call_insn_raw);
4388 /* Make an instruction with body X and code CALL_INSN
4389 and output it after the instruction AFTER. */
4392 emit_debug_insn_after_noloc (rtx x, rtx after)
4394 return emit_pattern_after_noloc (x, after, NULL, make_debug_insn_raw);
4397 /* Make an insn of code BARRIER
4398 and output it after the insn AFTER. */
4401 emit_barrier_after (rtx after)
4403 rtx insn = rtx_alloc (BARRIER);
4405 INSN_UID (insn) = cur_insn_uid++;
4407 add_insn_after (insn, after, NULL);
4411 /* Emit the label LABEL after the insn AFTER. */
4414 emit_label_after (rtx label, rtx after)
4416 /* This can be called twice for the same label
4417 as a result of the confusion that follows a syntax error!
4418 So make it harmless. */
4419 if (INSN_UID (label) == 0)
4421 INSN_UID (label) = cur_insn_uid++;
4422 add_insn_after (label, after, NULL);
4428 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
4431 emit_note_after (enum insn_note subtype, rtx after)
4433 rtx note = rtx_alloc (NOTE);
4434 INSN_UID (note) = cur_insn_uid++;
4435 NOTE_KIND (note) = subtype;
4436 BLOCK_FOR_INSN (note) = NULL;
4437 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4438 add_insn_after (note, after, NULL);
4442 /* Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC.
4443 MAKE_RAW indicates how to turn PATTERN into a real insn. */
4446 emit_pattern_after_setloc (rtx pattern, rtx after, int loc,
4447 rtx (*make_raw) (rtx))
4449 rtx last = emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4451 if (pattern == NULL_RTX || !loc)
4454 after = NEXT_INSN (after);
4457 if (active_insn_p (after) && !INSN_LOCATOR (after))
4458 INSN_LOCATOR (after) = loc;
4461 after = NEXT_INSN (after);
4466 /* Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN
4467 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after
4471 emit_pattern_after (rtx pattern, rtx after, bool skip_debug_insns,
4472 rtx (*make_raw) (rtx))
4476 if (skip_debug_insns)
4477 while (DEBUG_INSN_P (prev))
4478 prev = PREV_INSN (prev);
4481 return emit_pattern_after_setloc (pattern, after, INSN_LOCATOR (prev),
4484 return emit_pattern_after_noloc (pattern, after, NULL, make_raw);
4487 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4489 emit_insn_after_setloc (rtx pattern, rtx after, int loc)
4491 return emit_pattern_after_setloc (pattern, after, loc, make_insn_raw);
4494 /* Like emit_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4496 emit_insn_after (rtx pattern, rtx after)
4498 return emit_pattern_after (pattern, after, true, make_insn_raw);
4501 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4503 emit_jump_insn_after_setloc (rtx pattern, rtx after, int loc)
4505 return emit_pattern_after_setloc (pattern, after, loc, make_jump_insn_raw);
4508 /* Like emit_jump_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4510 emit_jump_insn_after (rtx pattern, rtx after)
4512 return emit_pattern_after (pattern, after, true, make_jump_insn_raw);
4515 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4517 emit_call_insn_after_setloc (rtx pattern, rtx after, int loc)
4519 return emit_pattern_after_setloc (pattern, after, loc, make_call_insn_raw);
4522 /* Like emit_call_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4524 emit_call_insn_after (rtx pattern, rtx after)
4526 return emit_pattern_after (pattern, after, true, make_call_insn_raw);
4529 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to LOC. */
4531 emit_debug_insn_after_setloc (rtx pattern, rtx after, int loc)
4533 return emit_pattern_after_setloc (pattern, after, loc, make_debug_insn_raw);
4536 /* Like emit_debug_insn_after_noloc, but set INSN_LOCATOR according to AFTER. */
4538 emit_debug_insn_after (rtx pattern, rtx after)
4540 return emit_pattern_after (pattern, after, false, make_debug_insn_raw);
4543 /* Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC.
4544 MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP
4545 indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN,
4549 emit_pattern_before_setloc (rtx pattern, rtx before, int loc, bool insnp,
4550 rtx (*make_raw) (rtx))
4552 rtx first = PREV_INSN (before);
4553 rtx last = emit_pattern_before_noloc (pattern, before,
4554 insnp ? before : NULL_RTX,
4557 if (pattern == NULL_RTX || !loc)
4561 first = get_insns ();
4563 first = NEXT_INSN (first);
4566 if (active_insn_p (first) && !INSN_LOCATOR (first))
4567 INSN_LOCATOR (first) = loc;
4570 first = NEXT_INSN (first);
4575 /* Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN
4576 into a real insn. SKIP_DEBUG_INSNS indicates whether to insert
4577 before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an
4578 INSN as opposed to a JUMP_INSN, CALL_INSN, etc. */
4581 emit_pattern_before (rtx pattern, rtx before, bool skip_debug_insns,
4582 bool insnp, rtx (*make_raw) (rtx))
4586 if (skip_debug_insns)
4587 while (DEBUG_INSN_P (next))
4588 next = PREV_INSN (next);
4591 return emit_pattern_before_setloc (pattern, before, INSN_LOCATOR (next),
4594 return emit_pattern_before_noloc (pattern, before,
4595 insnp ? before : NULL_RTX,
4599 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4601 emit_insn_before_setloc (rtx pattern, rtx before, int loc)
4603 return emit_pattern_before_setloc (pattern, before, loc, true,
4607 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4609 emit_insn_before (rtx pattern, rtx before)
4611 return emit_pattern_before (pattern, before, true, true, make_insn_raw);
4614 /* like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4616 emit_jump_insn_before_setloc (rtx pattern, rtx before, int loc)
4618 return emit_pattern_before_setloc (pattern, before, loc, false,
4619 make_jump_insn_raw);
4622 /* Like emit_jump_insn_before_noloc, but set INSN_LOCATOR according to BEFORE. */
4624 emit_jump_insn_before (rtx pattern, rtx before)
4626 return emit_pattern_before (pattern, before, true, false,
4627 make_jump_insn_raw);
4630 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4632 emit_call_insn_before_setloc (rtx pattern, rtx before, int loc)
4634 return emit_pattern_before_setloc (pattern, before, loc, false,
4635 make_call_insn_raw);
4638 /* Like emit_call_insn_before_noloc,
4639 but set insn_locator according to BEFORE. */
4641 emit_call_insn_before (rtx pattern, rtx before)
4643 return emit_pattern_before (pattern, before, true, false,
4644 make_call_insn_raw);
4647 /* Like emit_insn_before_noloc, but set INSN_LOCATOR according to LOC. */
4649 emit_debug_insn_before_setloc (rtx pattern, rtx before, int loc)
4651 return emit_pattern_before_setloc (pattern, before, loc, false,
4652 make_debug_insn_raw);
4655 /* Like emit_debug_insn_before_noloc,
4656 but set insn_locator according to BEFORE. */
4658 emit_debug_insn_before (rtx pattern, rtx before)
4660 return emit_pattern_before (pattern, before, false, false,
4661 make_debug_insn_raw);
4664 /* Take X and emit it at the end of the doubly-linked
4667 Returns the last insn emitted. */
4672 rtx last = get_last_insn();
4678 switch (GET_CODE (x))
4690 rtx next = NEXT_INSN (insn);
4697 #ifdef ENABLE_RTL_CHECKING
4704 last = make_insn_raw (x);
4712 /* Make an insn of code DEBUG_INSN with pattern X
4713 and add it to the end of the doubly-linked list. */
4716 emit_debug_insn (rtx x)
4718 rtx last = get_last_insn();
4724 switch (GET_CODE (x))
4736 rtx next = NEXT_INSN (insn);
4743 #ifdef ENABLE_RTL_CHECKING
4750 last = make_debug_insn_raw (x);
4758 /* Make an insn of code JUMP_INSN with pattern X
4759 and add it to the end of the doubly-linked list. */
4762 emit_jump_insn (rtx x)
4764 rtx last = NULL_RTX, insn;
4766 switch (GET_CODE (x))
4778 rtx next = NEXT_INSN (insn);
4785 #ifdef ENABLE_RTL_CHECKING
4792 last = make_jump_insn_raw (x);
4800 /* Make an insn of code CALL_INSN with pattern X
4801 and add it to the end of the doubly-linked list. */
4804 emit_call_insn (rtx x)
4808 switch (GET_CODE (x))
4817 insn = emit_insn (x);
4820 #ifdef ENABLE_RTL_CHECKING
4827 insn = make_call_insn_raw (x);
4835 /* Add the label LABEL to the end of the doubly-linked list. */
4838 emit_label (rtx label)
4840 /* This can be called twice for the same label
4841 as a result of the confusion that follows a syntax error!
4842 So make it harmless. */
4843 if (INSN_UID (label) == 0)
4845 INSN_UID (label) = cur_insn_uid++;
4851 /* Make an insn of code BARRIER
4852 and add it to the end of the doubly-linked list. */
4857 rtx barrier = rtx_alloc (BARRIER);
4858 INSN_UID (barrier) = cur_insn_uid++;
4863 /* Emit a copy of note ORIG. */
4866 emit_note_copy (rtx orig)
4870 note = rtx_alloc (NOTE);
4872 INSN_UID (note) = cur_insn_uid++;
4873 NOTE_DATA (note) = NOTE_DATA (orig);
4874 NOTE_KIND (note) = NOTE_KIND (orig);
4875 BLOCK_FOR_INSN (note) = NULL;
4881 /* Make an insn of code NOTE or type NOTE_NO
4882 and add it to the end of the doubly-linked list. */
4885 emit_note (enum insn_note kind)
4889 note = rtx_alloc (NOTE);
4890 INSN_UID (note) = cur_insn_uid++;
4891 NOTE_KIND (note) = kind;
4892 memset (&NOTE_DATA (note), 0, sizeof (NOTE_DATA (note)));
4893 BLOCK_FOR_INSN (note) = NULL;
4898 /* Emit a clobber of lvalue X. */
4901 emit_clobber (rtx x)
4903 /* CONCATs should not appear in the insn stream. */
4904 if (GET_CODE (x) == CONCAT)
4906 emit_clobber (XEXP (x, 0));
4907 return emit_clobber (XEXP (x, 1));
4909 return emit_insn (gen_rtx_CLOBBER (VOIDmode, x));
4912 /* Return a sequence of insns to clobber lvalue X. */
4926 /* Emit a use of rvalue X. */
4931 /* CONCATs should not appear in the insn stream. */
4932 if (GET_CODE (x) == CONCAT)
4934 emit_use (XEXP (x, 0));
4935 return emit_use (XEXP (x, 1));
4937 return emit_insn (gen_rtx_USE (VOIDmode, x));
4940 /* Return a sequence of insns to use rvalue X. */
4954 /* Cause next statement to emit a line note even if the line number
4958 force_next_line_note (void)
4963 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
4964 note of this type already exists, remove it first. */
4967 set_unique_reg_note (rtx insn, enum reg_note kind, rtx datum)
4969 rtx note = find_reg_note (insn, kind, NULL_RTX);
4975 /* Don't add REG_EQUAL/REG_EQUIV notes if the insn
4976 has multiple sets (some callers assume single_set
4977 means the insn only has one set, when in fact it
4978 means the insn only has one * useful * set). */
4979 if (GET_CODE (PATTERN (insn)) == PARALLEL && multiple_sets (insn))
4985 /* Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
4986 It serves no useful purpose and breaks eliminate_regs. */
4987 if (GET_CODE (datum) == ASM_OPERANDS)
4992 XEXP (note, 0) = datum;
4993 df_notes_rescan (insn);
5001 XEXP (note, 0) = datum;
5007 add_reg_note (insn, kind, datum);
5013 df_notes_rescan (insn);
5019 return REG_NOTES (insn);
5022 /* Return an indication of which type of insn should have X as a body.
5023 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
5025 static enum rtx_code
5026 classify_insn (rtx x)
5030 if (GET_CODE (x) == CALL)
5032 if (ANY_RETURN_P (x))
5034 if (GET_CODE (x) == SET)
5036 if (SET_DEST (x) == pc_rtx)
5038 else if (GET_CODE (SET_SRC (x)) == CALL)
5043 if (GET_CODE (x) == PARALLEL)
5046 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
5047 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
5049 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5050 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
5052 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
5053 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
5059 /* Emit the rtl pattern X as an appropriate kind of insn.
5060 If X is a label, it is simply added into the insn chain. */
5065 enum rtx_code code = classify_insn (x);
5070 return emit_label (x);
5072 return emit_insn (x);
5075 rtx insn = emit_jump_insn (x);
5076 if (any_uncondjump_p (insn) || GET_CODE (x) == RETURN)
5077 return emit_barrier ();
5081 return emit_call_insn (x);
5083 return emit_debug_insn (x);
5089 /* Space for free sequence stack entries. */
5090 static GTY ((deletable)) struct sequence_stack *free_sequence_stack;
5092 /* Begin emitting insns to a sequence. If this sequence will contain
5093 something that might cause the compiler to pop arguments to function
5094 calls (because those pops have previously been deferred; see
5095 INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
5096 before calling this function. That will ensure that the deferred
5097 pops are not accidentally emitted in the middle of this sequence. */
5100 start_sequence (void)
5102 struct sequence_stack *tem;
5104 if (free_sequence_stack != NULL)
5106 tem = free_sequence_stack;
5107 free_sequence_stack = tem->next;
5110 tem = ggc_alloc_sequence_stack ();
5112 tem->next = seq_stack;
5113 tem->first = get_insns ();
5114 tem->last = get_last_insn ();
5122 /* Set up the insn chain starting with FIRST as the current sequence,
5123 saving the previously current one. See the documentation for
5124 start_sequence for more information about how to use this function. */
5127 push_to_sequence (rtx first)
5133 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last))
5136 set_first_insn (first);
5137 set_last_insn (last);
5140 /* Like push_to_sequence, but take the last insn as an argument to avoid
5141 looping through the list. */
5144 push_to_sequence2 (rtx first, rtx last)
5148 set_first_insn (first);
5149 set_last_insn (last);
5152 /* Set up the outer-level insn chain
5153 as the current sequence, saving the previously current one. */
5156 push_topmost_sequence (void)
5158 struct sequence_stack *stack, *top = NULL;
5162 for (stack = seq_stack; stack; stack = stack->next)
5165 set_first_insn (top->first);
5166 set_last_insn (top->last);
5169 /* After emitting to the outer-level insn chain, update the outer-level
5170 insn chain, and restore the previous saved state. */
5173 pop_topmost_sequence (void)
5175 struct sequence_stack *stack, *top = NULL;
5177 for (stack = seq_stack; stack; stack = stack->next)
5180 top->first = get_insns ();
5181 top->last = get_last_insn ();
5186 /* After emitting to a sequence, restore previous saved state.
5188 To get the contents of the sequence just made, you must call
5189 `get_insns' *before* calling here.
5191 If the compiler might have deferred popping arguments while
5192 generating this sequence, and this sequence will not be immediately
5193 inserted into the instruction stream, use do_pending_stack_adjust
5194 before calling get_insns. That will ensure that the deferred
5195 pops are inserted into this sequence, and not into some random
5196 location in the instruction stream. See INHIBIT_DEFER_POP for more
5197 information about deferred popping of arguments. */
5202 struct sequence_stack *tem = seq_stack;
5204 set_first_insn (tem->first);
5205 set_last_insn (tem->last);
5206 seq_stack = tem->next;
5208 memset (tem, 0, sizeof (*tem));
5209 tem->next = free_sequence_stack;
5210 free_sequence_stack = tem;
5213 /* Return 1 if currently emitting into a sequence. */
5216 in_sequence_p (void)
5218 return seq_stack != 0;
5221 /* Put the various virtual registers into REGNO_REG_RTX. */
5224 init_virtual_regs (void)
5226 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
5227 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
5228 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
5229 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
5230 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
5231 regno_reg_rtx[VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM]
5232 = virtual_preferred_stack_boundary_rtx;
5236 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
5237 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
5238 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
5239 static int copy_insn_n_scratches;
5241 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5242 copied an ASM_OPERANDS.
5243 In that case, it is the original input-operand vector. */
5244 static rtvec orig_asm_operands_vector;
5246 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
5247 copied an ASM_OPERANDS.
5248 In that case, it is the copied input-operand vector. */
5249 static rtvec copy_asm_operands_vector;
5251 /* Likewise for the constraints vector. */
5252 static rtvec orig_asm_constraints_vector;
5253 static rtvec copy_asm_constraints_vector;
5255 /* Recursively create a new copy of an rtx for copy_insn.
5256 This function differs from copy_rtx in that it handles SCRATCHes and
5257 ASM_OPERANDs properly.
5258 Normally, this function is not used directly; use copy_insn as front end.
5259 However, you could first copy an insn pattern with copy_insn and then use
5260 this function afterwards to properly copy any REG_NOTEs containing
5264 copy_insn_1 (rtx orig)
5269 const char *format_ptr;
5274 code = GET_CODE (orig);
5292 if (REG_P (XEXP (orig, 0)) && REGNO (XEXP (orig, 0)) < FIRST_PSEUDO_REGISTER)
5297 for (i = 0; i < copy_insn_n_scratches; i++)
5298 if (copy_insn_scratch_in[i] == orig)
5299 return copy_insn_scratch_out[i];
5303 if (shared_const_p (orig))
5307 /* A MEM with a constant address is not sharable. The problem is that
5308 the constant address may need to be reloaded. If the mem is shared,
5309 then reloading one copy of this mem will cause all copies to appear
5310 to have been reloaded. */
5316 /* Copy the various flags, fields, and other information. We assume
5317 that all fields need copying, and then clear the fields that should
5318 not be copied. That is the sensible default behavior, and forces
5319 us to explicitly document why we are *not* copying a flag. */
5320 copy = shallow_copy_rtx (orig);
5322 /* We do not copy the USED flag, which is used as a mark bit during
5323 walks over the RTL. */
5324 RTX_FLAG (copy, used) = 0;
5326 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
5329 RTX_FLAG (copy, jump) = 0;
5330 RTX_FLAG (copy, call) = 0;
5331 RTX_FLAG (copy, frame_related) = 0;
5334 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
5336 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
5337 switch (*format_ptr++)
5340 if (XEXP (orig, i) != NULL)
5341 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
5346 if (XVEC (orig, i) == orig_asm_constraints_vector)
5347 XVEC (copy, i) = copy_asm_constraints_vector;
5348 else if (XVEC (orig, i) == orig_asm_operands_vector)
5349 XVEC (copy, i) = copy_asm_operands_vector;
5350 else if (XVEC (orig, i) != NULL)
5352 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
5353 for (j = 0; j < XVECLEN (copy, i); j++)
5354 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
5365 /* These are left unchanged. */
5372 if (code == SCRATCH)
5374 i = copy_insn_n_scratches++;
5375 gcc_assert (i < MAX_RECOG_OPERANDS);
5376 copy_insn_scratch_in[i] = orig;
5377 copy_insn_scratch_out[i] = copy;
5379 else if (code == ASM_OPERANDS)
5381 orig_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (orig);
5382 copy_asm_operands_vector = ASM_OPERANDS_INPUT_VEC (copy);
5383 orig_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig);
5384 copy_asm_constraints_vector = ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy);
5390 /* Create a new copy of an rtx.
5391 This function differs from copy_rtx in that it handles SCRATCHes and
5392 ASM_OPERANDs properly.
5393 INSN doesn't really have to be a full INSN; it could be just the
5396 copy_insn (rtx insn)
5398 copy_insn_n_scratches = 0;
5399 orig_asm_operands_vector = 0;
5400 orig_asm_constraints_vector = 0;
5401 copy_asm_operands_vector = 0;
5402 copy_asm_constraints_vector = 0;
5403 return copy_insn_1 (insn);
5406 /* Initialize data structures and variables in this file
5407 before generating rtl for each function. */
5412 set_first_insn (NULL);
5413 set_last_insn (NULL);
5414 if (MIN_NONDEBUG_INSN_UID)
5415 cur_insn_uid = MIN_NONDEBUG_INSN_UID;
5418 cur_debug_insn_uid = 1;
5419 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
5420 last_location = UNKNOWN_LOCATION;
5421 first_label_num = label_num;
5424 /* Init the tables that describe all the pseudo regs. */
5426 crtl->emit.regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
5428 crtl->emit.regno_pointer_align
5429 = XCNEWVEC (unsigned char, crtl->emit.regno_pointer_align_length);
5431 regno_reg_rtx = ggc_alloc_vec_rtx (crtl->emit.regno_pointer_align_length);
5433 /* Put copies of all the hard registers into regno_reg_rtx. */
5434 memcpy (regno_reg_rtx,
5435 initial_regno_reg_rtx,
5436 FIRST_PSEUDO_REGISTER * sizeof (rtx));
5438 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
5439 init_virtual_regs ();
5441 /* Indicate that the virtual registers and stack locations are
5443 REG_POINTER (stack_pointer_rtx) = 1;
5444 REG_POINTER (frame_pointer_rtx) = 1;
5445 REG_POINTER (hard_frame_pointer_rtx) = 1;
5446 REG_POINTER (arg_pointer_rtx) = 1;
5448 REG_POINTER (virtual_incoming_args_rtx) = 1;
5449 REG_POINTER (virtual_stack_vars_rtx) = 1;
5450 REG_POINTER (virtual_stack_dynamic_rtx) = 1;
5451 REG_POINTER (virtual_outgoing_args_rtx) = 1;
5452 REG_POINTER (virtual_cfa_rtx) = 1;
5454 #ifdef STACK_BOUNDARY
5455 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
5456 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5457 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM) = STACK_BOUNDARY;
5458 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY;
5460 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM) = STACK_BOUNDARY;
5461 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM) = STACK_BOUNDARY;
5462 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM) = STACK_BOUNDARY;
5463 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM) = STACK_BOUNDARY;
5464 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = BITS_PER_WORD;
5467 #ifdef INIT_EXPANDERS
5472 /* Generate a vector constant for mode MODE and constant value CONSTANT. */
5475 gen_const_vector (enum machine_mode mode, int constant)
5480 enum machine_mode inner;
5482 units = GET_MODE_NUNITS (mode);
5483 inner = GET_MODE_INNER (mode);
5485 gcc_assert (!DECIMAL_FLOAT_MODE_P (inner));
5487 v = rtvec_alloc (units);
5489 /* We need to call this function after we set the scalar const_tiny_rtx
5491 gcc_assert (const_tiny_rtx[constant][(int) inner]);
5493 for (i = 0; i < units; ++i)
5494 RTVEC_ELT (v, i) = const_tiny_rtx[constant][(int) inner];
5496 tem = gen_rtx_raw_CONST_VECTOR (mode, v);
5500 /* Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when
5501 all elements are zero, and the one vector when all elements are one. */
5503 gen_rtx_CONST_VECTOR (enum machine_mode mode, rtvec v)
5505 enum machine_mode inner = GET_MODE_INNER (mode);
5506 int nunits = GET_MODE_NUNITS (mode);
5510 /* Check to see if all of the elements have the same value. */
5511 x = RTVEC_ELT (v, nunits - 1);
5512 for (i = nunits - 2; i >= 0; i--)
5513 if (RTVEC_ELT (v, i) != x)
5516 /* If the values are all the same, check to see if we can use one of the
5517 standard constant vectors. */
5520 if (x == CONST0_RTX (inner))
5521 return CONST0_RTX (mode);
5522 else if (x == CONST1_RTX (inner))
5523 return CONST1_RTX (mode);
5524 else if (x == CONSTM1_RTX (inner))
5525 return CONSTM1_RTX (mode);
5528 return gen_rtx_raw_CONST_VECTOR (mode, v);
5531 /* Initialise global register information required by all functions. */
5534 init_emit_regs (void)
5537 enum machine_mode mode;
5540 /* Reset register attributes */
5541 htab_empty (reg_attrs_htab);
5543 /* We need reg_raw_mode, so initialize the modes now. */
5544 init_reg_modes_target ();
5546 /* Assign register numbers to the globally defined register rtx. */
5547 pc_rtx = gen_rtx_fmt_ (PC, VOIDmode);
5548 ret_rtx = gen_rtx_fmt_ (RETURN, VOIDmode);
5549 simple_return_rtx = gen_rtx_fmt_ (SIMPLE_RETURN, VOIDmode);
5550 cc0_rtx = gen_rtx_fmt_ (CC0, VOIDmode);
5551 stack_pointer_rtx = gen_raw_REG (Pmode, STACK_POINTER_REGNUM);
5552 frame_pointer_rtx = gen_raw_REG (Pmode, FRAME_POINTER_REGNUM);
5553 hard_frame_pointer_rtx = gen_raw_REG (Pmode, HARD_FRAME_POINTER_REGNUM);
5554 arg_pointer_rtx = gen_raw_REG (Pmode, ARG_POINTER_REGNUM);
5555 virtual_incoming_args_rtx =
5556 gen_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
5557 virtual_stack_vars_rtx =
5558 gen_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
5559 virtual_stack_dynamic_rtx =
5560 gen_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
5561 virtual_outgoing_args_rtx =
5562 gen_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
5563 virtual_cfa_rtx = gen_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
5564 virtual_preferred_stack_boundary_rtx =
5565 gen_raw_REG (Pmode, VIRTUAL_PREFERRED_STACK_BOUNDARY_REGNUM);
5567 /* Initialize RTL for commonly used hard registers. These are
5568 copied into regno_reg_rtx as we begin to compile each function. */
5569 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
5570 initial_regno_reg_rtx[i] = gen_raw_REG (reg_raw_mode[i], i);
5572 #ifdef RETURN_ADDRESS_POINTER_REGNUM
5573 return_address_pointer_rtx
5574 = gen_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
5577 if ((unsigned) PIC_OFFSET_TABLE_REGNUM != INVALID_REGNUM)
5578 pic_offset_table_rtx = gen_raw_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
5580 pic_offset_table_rtx = NULL_RTX;
5582 for (i = 0; i < (int) MAX_MACHINE_MODE; i++)
5584 mode = (enum machine_mode) i;
5585 attrs = ggc_alloc_cleared_mem_attrs ();
5586 attrs->align = BITS_PER_UNIT;
5587 attrs->addrspace = ADDR_SPACE_GENERIC;
5588 if (mode != BLKmode)
5590 attrs->size_known_p = true;
5591 attrs->size = GET_MODE_SIZE (mode);
5592 if (STRICT_ALIGNMENT)
5593 attrs->align = GET_MODE_ALIGNMENT (mode);
5595 mode_mem_attrs[i] = attrs;
5599 /* Create some permanent unique rtl objects shared between all functions. */
5602 init_emit_once (void)
5605 enum machine_mode mode;
5606 enum machine_mode double_mode;
5608 /* Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
5610 const_int_htab = htab_create_ggc (37, const_int_htab_hash,
5611 const_int_htab_eq, NULL);
5613 const_double_htab = htab_create_ggc (37, const_double_htab_hash,
5614 const_double_htab_eq, NULL);
5616 const_fixed_htab = htab_create_ggc (37, const_fixed_htab_hash,
5617 const_fixed_htab_eq, NULL);
5619 mem_attrs_htab = htab_create_ggc (37, mem_attrs_htab_hash,
5620 mem_attrs_htab_eq, NULL);
5621 reg_attrs_htab = htab_create_ggc (37, reg_attrs_htab_hash,
5622 reg_attrs_htab_eq, NULL);
5624 /* Compute the word and byte modes. */
5626 byte_mode = VOIDmode;
5627 word_mode = VOIDmode;
5628 double_mode = VOIDmode;
5630 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5632 mode = GET_MODE_WIDER_MODE (mode))
5634 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
5635 && byte_mode == VOIDmode)
5638 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
5639 && word_mode == VOIDmode)
5643 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5645 mode = GET_MODE_WIDER_MODE (mode))
5647 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
5648 && double_mode == VOIDmode)
5652 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
5654 #ifdef INIT_EXPANDERS
5655 /* This is to initialize {init|mark|free}_machine_status before the first
5656 call to push_function_context_to. This is needed by the Chill front
5657 end which calls push_function_context_to before the first call to
5658 init_function_start. */
5662 /* Create the unique rtx's for certain rtx codes and operand values. */
5664 /* Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
5665 tries to use these variables. */
5666 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
5667 const_int_rtx[i + MAX_SAVED_CONST_INT] =
5668 gen_rtx_raw_CONST_INT (VOIDmode, (HOST_WIDE_INT) i);
5670 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
5671 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
5672 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
5674 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
5676 REAL_VALUE_FROM_INT (dconst0, 0, 0, double_mode);
5677 REAL_VALUE_FROM_INT (dconst1, 1, 0, double_mode);
5678 REAL_VALUE_FROM_INT (dconst2, 2, 0, double_mode);
5683 dconsthalf = dconst1;
5684 SET_REAL_EXP (&dconsthalf, REAL_EXP (&dconsthalf) - 1);
5686 for (i = 0; i < 3; i++)
5688 const REAL_VALUE_TYPE *const r =
5689 (i == 0 ? &dconst0 : i == 1 ? &dconst1 : &dconst2);
5691 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
5693 mode = GET_MODE_WIDER_MODE (mode))
5694 const_tiny_rtx[i][(int) mode] =
5695 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5697 for (mode = GET_CLASS_NARROWEST_MODE (MODE_DECIMAL_FLOAT);
5699 mode = GET_MODE_WIDER_MODE (mode))
5700 const_tiny_rtx[i][(int) mode] =
5701 CONST_DOUBLE_FROM_REAL_VALUE (*r, mode);
5703 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
5705 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5707 mode = GET_MODE_WIDER_MODE (mode))
5708 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5710 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
5712 mode = GET_MODE_WIDER_MODE (mode))
5713 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
5716 const_tiny_rtx[3][(int) VOIDmode] = constm1_rtx;
5718 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
5720 mode = GET_MODE_WIDER_MODE (mode))
5721 const_tiny_rtx[3][(int) mode] = constm1_rtx;
5723 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_INT);
5725 mode = GET_MODE_WIDER_MODE (mode))
5727 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5728 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5731 for (mode = GET_CLASS_NARROWEST_MODE (MODE_COMPLEX_FLOAT);
5733 mode = GET_MODE_WIDER_MODE (mode))
5735 rtx inner = const_tiny_rtx[0][(int)GET_MODE_INNER (mode)];
5736 const_tiny_rtx[0][(int) mode] = gen_rtx_CONCAT (mode, inner, inner);
5739 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
5741 mode = GET_MODE_WIDER_MODE (mode))
5743 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5744 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5745 const_tiny_rtx[3][(int) mode] = gen_const_vector (mode, 3);
5748 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
5750 mode = GET_MODE_WIDER_MODE (mode))
5752 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5753 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5756 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FRACT);
5758 mode = GET_MODE_WIDER_MODE (mode))
5760 FCONST0(mode).data.high = 0;
5761 FCONST0(mode).data.low = 0;
5762 FCONST0(mode).mode = mode;
5763 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5764 FCONST0 (mode), mode);
5767 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UFRACT);
5769 mode = GET_MODE_WIDER_MODE (mode))
5771 FCONST0(mode).data.high = 0;
5772 FCONST0(mode).data.low = 0;
5773 FCONST0(mode).mode = mode;
5774 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5775 FCONST0 (mode), mode);
5778 for (mode = GET_CLASS_NARROWEST_MODE (MODE_ACCUM);
5780 mode = GET_MODE_WIDER_MODE (mode))
5782 FCONST0(mode).data.high = 0;
5783 FCONST0(mode).data.low = 0;
5784 FCONST0(mode).mode = mode;
5785 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5786 FCONST0 (mode), mode);
5788 /* We store the value 1. */
5789 FCONST1(mode).data.high = 0;
5790 FCONST1(mode).data.low = 0;
5791 FCONST1(mode).mode = mode;
5792 lshift_double (1, 0, GET_MODE_FBIT (mode),
5793 2 * HOST_BITS_PER_WIDE_INT,
5794 &FCONST1(mode).data.low,
5795 &FCONST1(mode).data.high,
5796 SIGNED_FIXED_POINT_MODE_P (mode));
5797 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5798 FCONST1 (mode), mode);
5801 for (mode = GET_CLASS_NARROWEST_MODE (MODE_UACCUM);
5803 mode = GET_MODE_WIDER_MODE (mode))
5805 FCONST0(mode).data.high = 0;
5806 FCONST0(mode).data.low = 0;
5807 FCONST0(mode).mode = mode;
5808 const_tiny_rtx[0][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5809 FCONST0 (mode), mode);
5811 /* We store the value 1. */
5812 FCONST1(mode).data.high = 0;
5813 FCONST1(mode).data.low = 0;
5814 FCONST1(mode).mode = mode;
5815 lshift_double (1, 0, GET_MODE_FBIT (mode),
5816 2 * HOST_BITS_PER_WIDE_INT,
5817 &FCONST1(mode).data.low,
5818 &FCONST1(mode).data.high,
5819 SIGNED_FIXED_POINT_MODE_P (mode));
5820 const_tiny_rtx[1][(int) mode] = CONST_FIXED_FROM_FIXED_VALUE (
5821 FCONST1 (mode), mode);
5824 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FRACT);
5826 mode = GET_MODE_WIDER_MODE (mode))
5828 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5831 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UFRACT);
5833 mode = GET_MODE_WIDER_MODE (mode))
5835 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5838 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_ACCUM);
5840 mode = GET_MODE_WIDER_MODE (mode))
5842 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5843 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5846 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_UACCUM);
5848 mode = GET_MODE_WIDER_MODE (mode))
5850 const_tiny_rtx[0][(int) mode] = gen_const_vector (mode, 0);
5851 const_tiny_rtx[1][(int) mode] = gen_const_vector (mode, 1);
5854 for (i = (int) CCmode; i < (int) MAX_MACHINE_MODE; ++i)
5855 if (GET_MODE_CLASS ((enum machine_mode) i) == MODE_CC)
5856 const_tiny_rtx[0][i] = const0_rtx;
5858 const_tiny_rtx[0][(int) BImode] = const0_rtx;
5859 if (STORE_FLAG_VALUE == 1)
5860 const_tiny_rtx[1][(int) BImode] = const1_rtx;
5863 /* Produce exact duplicate of insn INSN after AFTER.
5864 Care updating of libcall regions if present. */
5867 emit_copy_of_insn_after (rtx insn, rtx after)
5871 switch (GET_CODE (insn))
5874 new_rtx = emit_insn_after (copy_insn (PATTERN (insn)), after);
5878 new_rtx = emit_jump_insn_after (copy_insn (PATTERN (insn)), after);
5882 new_rtx = emit_debug_insn_after (copy_insn (PATTERN (insn)), after);
5886 new_rtx = emit_call_insn_after (copy_insn (PATTERN (insn)), after);
5887 if (CALL_INSN_FUNCTION_USAGE (insn))
5888 CALL_INSN_FUNCTION_USAGE (new_rtx)
5889 = copy_insn (CALL_INSN_FUNCTION_USAGE (insn));
5890 SIBLING_CALL_P (new_rtx) = SIBLING_CALL_P (insn);
5891 RTL_CONST_CALL_P (new_rtx) = RTL_CONST_CALL_P (insn);
5892 RTL_PURE_CALL_P (new_rtx) = RTL_PURE_CALL_P (insn);
5893 RTL_LOOPING_CONST_OR_PURE_CALL_P (new_rtx)
5894 = RTL_LOOPING_CONST_OR_PURE_CALL_P (insn);
5901 /* Update LABEL_NUSES. */
5902 mark_jump_label (PATTERN (new_rtx), new_rtx, 0);
5904 INSN_LOCATOR (new_rtx) = INSN_LOCATOR (insn);
5906 /* If the old insn is frame related, then so is the new one. This is
5907 primarily needed for IA-64 unwind info which marks epilogue insns,
5908 which may be duplicated by the basic block reordering code. */
5909 RTX_FRAME_RELATED_P (new_rtx) = RTX_FRAME_RELATED_P (insn);
5911 /* Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
5912 will make them. REG_LABEL_TARGETs are created there too, but are
5913 supposed to be sticky, so we copy them. */
5914 for (link = REG_NOTES (insn); link; link = XEXP (link, 1))
5915 if (REG_NOTE_KIND (link) != REG_LABEL_OPERAND)
5917 if (GET_CODE (link) == EXPR_LIST)
5918 add_reg_note (new_rtx, REG_NOTE_KIND (link),
5919 copy_insn_1 (XEXP (link, 0)));
5921 add_reg_note (new_rtx, REG_NOTE_KIND (link), XEXP (link, 0));
5924 INSN_CODE (new_rtx) = INSN_CODE (insn);
5928 static GTY((deletable)) rtx hard_reg_clobbers [NUM_MACHINE_MODES][FIRST_PSEUDO_REGISTER];
5930 gen_hard_reg_clobber (enum machine_mode mode, unsigned int regno)
5932 if (hard_reg_clobbers[mode][regno])
5933 return hard_reg_clobbers[mode][regno];
5935 return (hard_reg_clobbers[mode][regno] =
5936 gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (mode, regno)));
5939 #include "gt-emit-rtl.h"