1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
49 #include "insn-config.h"
55 #include "bc-opcode.h"
56 #include "bc-typecd.h"
64 #ifdef BCDEBUG_PRINT_CODE
67 #include "bc-opname.h"
74 /* Commonly used modes. */
76 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
77 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
78 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
80 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
81 After rtl generation, it is 1 plus the largest register number used. */
83 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
85 /* This is *not* reset after each function. It gives each CODE_LABEL
86 in the entire compilation a unique label number. */
88 static int label_num = 1;
90 /* Lowest label number in current function. */
92 static int first_label_num;
94 /* Highest label number in current function.
95 Zero means use the value of label_num instead.
96 This is nonzero only when belatedly compiling an inline function. */
98 static int last_label_num;
100 /* Value label_num had when set_new_first_and_last_label_number was called.
101 If label_num has not changed since then, last_label_num is valid. */
103 static int base_label_num;
105 /* Nonzero means do not generate NOTEs for source line numbers. */
107 static int no_line_numbers;
109 /* Commonly used rtx's, so that we only need space for one copy.
110 These are initialized once for the entire compilation.
111 All of these except perhaps the floating-point CONST_DOUBLEs
112 are unique; no other rtx-object will be equal to any of these. */
114 rtx pc_rtx; /* (PC) */
115 rtx cc0_rtx; /* (CC0) */
116 rtx cc1_rtx; /* (CC1) (not actually used nowadays) */
117 rtx const0_rtx; /* (CONST_INT 0) */
118 rtx const1_rtx; /* (CONST_INT 1) */
119 rtx const2_rtx; /* (CONST_INT 2) */
120 rtx constm1_rtx; /* (CONST_INT -1) */
121 rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */
123 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
124 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
125 record a copy of const[012]_rtx. */
127 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
129 REAL_VALUE_TYPE dconst0;
130 REAL_VALUE_TYPE dconst1;
131 REAL_VALUE_TYPE dconst2;
132 REAL_VALUE_TYPE dconstm1;
134 /* All references to the following fixed hard registers go through
135 these unique rtl objects. On machines where the frame-pointer and
136 arg-pointer are the same register, they use the same unique object.
138 After register allocation, other rtl objects which used to be pseudo-regs
139 may be clobbered to refer to the frame-pointer register.
140 But references that were originally to the frame-pointer can be
141 distinguished from the others because they contain frame_pointer_rtx.
143 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
144 tricky: until register elimination has taken place hard_frame_pointer_rtx
145 should be used if it is being set, and frame_pointer_rtx otherwise. After
146 register elimination hard_frame_pointer_rtx should always be used.
147 On machines where the two registers are same (most) then these are the
150 In an inline procedure, the stack and frame pointer rtxs may not be
151 used for anything else. */
152 rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */
153 rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */
154 rtx hard_frame_pointer_rtx; /* (REG:Pmode HARD_FRAME_POINTER_REGNUM) */
155 rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */
156 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
157 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
158 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
159 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
160 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
162 /* This is used to implement __builtin_return_address for some machines.
163 See for instance the MIPS port. */
164 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
166 rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */
167 rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */
168 rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */
169 rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */
171 /* We make one copy of (const_int C) where C is in
172 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
173 to save space during the compilation and simplify comparisons of
176 #define MAX_SAVED_CONST_INT 64
178 static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
180 /* The ends of the doubly-linked chain of rtl for the current function.
181 Both are reset to null at the start of rtl generation for the function.
183 start_sequence saves both of these on `sequence_stack' along with
184 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
186 static rtx first_insn = NULL;
187 static rtx last_insn = NULL;
189 /* RTL_EXPR within which the current sequence will be placed. Use to
190 prevent reuse of any temporaries within the sequence until after the
191 RTL_EXPR is emitted. */
193 tree sequence_rtl_expr = NULL;
195 /* INSN_UID for next insn emitted.
196 Reset to 1 for each function compiled. */
198 static int cur_insn_uid = 1;
200 /* Line number and source file of the last line-number NOTE emitted.
201 This is used to avoid generating duplicates. */
203 static int last_linenum = 0;
204 static char *last_filename = 0;
206 /* A vector indexed by pseudo reg number. The allocated length
207 of this vector is regno_pointer_flag_length. Since this
208 vector is needed during the expansion phase when the total
209 number of registers in the function is not yet known,
210 it is copied and made bigger when necessary. */
212 char *regno_pointer_flag;
213 int regno_pointer_flag_length;
215 /* Indexed by pseudo register number, if nonzero gives the known alignment
216 for that pseudo (if regno_pointer_flag is set).
217 Allocated in parallel with regno_pointer_flag. */
218 char *regno_pointer_align;
220 /* Indexed by pseudo register number, gives the rtx for that pseudo.
221 Allocated in parallel with regno_pointer_flag. */
225 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
226 Each element describes one pending sequence.
227 The main insn-chain is saved in the last element of the chain,
228 unless the chain is empty. */
230 struct sequence_stack *sequence_stack;
232 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
233 shortly thrown away. We use two mechanisms to prevent this waste:
235 First, we keep a list of the expressions used to represent the sequence
236 stack in sequence_element_free_list.
238 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
239 rtvec for use by gen_sequence. One entry for each size is sufficient
240 because most cases are calls to gen_sequence followed by immediately
241 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
242 destructive on the insn in it anyway and hence can't be redone.
244 We do not bother to save this cached data over nested function calls.
245 Instead, we just reinitialize them. */
247 #define SEQUENCE_RESULT_SIZE 5
249 static struct sequence_stack *sequence_element_free_list;
250 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
252 /* During RTL generation, we also keep a list of free INSN rtl codes. */
253 static rtx free_insn;
255 extern int rtx_equal_function_value_matters;
257 /* Filename and line number of last line-number note,
258 whether we actually emitted it or not. */
259 extern char *emit_filename;
260 extern int emit_lineno;
262 rtx change_address ();
265 extern struct obstack *rtl_obstack;
267 extern int stack_depth;
268 extern int max_stack_depth;
270 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
272 ** This routine generates an RTX of the size specified by
273 ** <code>, which is an RTX code. The RTX structure is initialized
274 ** from the arguments <element1> through <elementn>, which are
275 ** interpreted according to the specific RTX type's format. The
276 ** special machine mode associated with the rtx (if any) is specified
279 ** gen_rtx can be invoked in a way which resembles the lisp-like
280 ** rtx it will generate. For example, the following rtx structure:
282 ** (plus:QI (mem:QI (reg:SI 1))
283 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
285 ** ...would be generated by the following C code:
287 ** gen_rtx (PLUS, QImode,
288 ** gen_rtx (MEM, QImode,
289 ** gen_rtx (REG, SImode, 1)),
290 ** gen_rtx (MEM, QImode,
291 ** gen_rtx (PLUS, SImode,
292 ** gen_rtx (REG, SImode, 2),
293 ** gen_rtx (REG, SImode, 3)))),
298 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
302 enum machine_mode mode;
305 register int i; /* Array indices... */
306 register char *fmt; /* Current rtx's format... */
307 register rtx rt_val; /* RTX to return to caller... */
312 code = va_arg (p, enum rtx_code);
313 mode = va_arg (p, enum machine_mode);
316 if (code == CONST_INT)
318 HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT);
320 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
321 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
323 if (const_true_rtx && arg == STORE_FLAG_VALUE)
324 return const_true_rtx;
326 rt_val = rtx_alloc (code);
327 INTVAL (rt_val) = arg;
329 else if (code == REG)
331 int regno = va_arg (p, int);
333 /* In case the MD file explicitly references the frame pointer, have
334 all such references point to the same frame pointer. This is used
335 during frame pointer elimination to distinguish the explicit
336 references to these registers from pseudos that happened to be
339 If we have eliminated the frame pointer or arg pointer, we will
340 be using it as a normal register, for example as a spill register.
341 In such cases, we might be accessing it in a mode that is not
342 Pmode and therefore cannot use the pre-allocated rtx.
344 Also don't do this when we are making new REGs in reload,
345 since we don't want to get confused with the real pointers. */
347 if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode
348 && ! reload_in_progress)
349 return frame_pointer_rtx;
350 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
351 if (hard_frame_pointer_rtx && regno == HARD_FRAME_POINTER_REGNUM
352 && mode == Pmode && ! reload_in_progress)
353 return hard_frame_pointer_rtx;
355 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
356 if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode
357 && ! reload_in_progress)
358 return arg_pointer_rtx;
360 #ifdef RETURN_ADDRESS_POINTER_REGNUM
361 if (return_address_pointer_rtx && regno == RETURN_ADDRESS_POINTER_REGNUM
362 && mode == Pmode && ! reload_in_progress)
363 return return_address_pointer_rtx;
365 if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode
366 && ! reload_in_progress)
367 return stack_pointer_rtx;
370 rt_val = rtx_alloc (code);
372 REGNO (rt_val) = regno;
378 rt_val = rtx_alloc (code); /* Allocate the storage space. */
379 rt_val->mode = mode; /* Store the machine mode... */
381 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
382 for (i = 0; i < GET_RTX_LENGTH (code); i++)
386 case '0': /* Unused field. */
389 case 'i': /* An integer? */
390 XINT (rt_val, i) = va_arg (p, int);
393 case 'w': /* A wide integer? */
394 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
397 case 's': /* A string? */
398 XSTR (rt_val, i) = va_arg (p, char *);
401 case 'e': /* An expression? */
402 case 'u': /* An insn? Same except when printing. */
403 XEXP (rt_val, i) = va_arg (p, rtx);
406 case 'E': /* An RTX vector? */
407 XVEC (rt_val, i) = va_arg (p, rtvec);
416 return rt_val; /* Return the new RTX... */
419 /* gen_rtvec (n, [rt1, ..., rtn])
421 ** This routine creates an rtvec and stores within it the
422 ** pointers to rtx's which are its arguments.
427 gen_rtvec VPROTO((int n, ...))
443 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
445 vector = (rtx *) alloca (n * sizeof (rtx));
447 for (i = 0; i < n; i++)
448 vector[i] = va_arg (p, rtx);
451 return gen_rtvec_v (n, vector);
455 gen_rtvec_v (n, argp)
460 register rtvec rt_val;
463 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
465 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
467 for (i = 0; i < n; i++)
468 rt_val->elem[i].rtx = *argp++;
473 /* Generate a REG rtx for a new pseudo register of mode MODE.
474 This pseudo is assigned the next sequential register number. */
478 enum machine_mode mode;
482 /* Don't let anything called by or after reload create new registers
483 (actually, registers can't be created after flow, but this is a good
486 if (reload_in_progress || reload_completed)
489 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
490 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
492 /* For complex modes, don't make a single pseudo.
493 Instead, make a CONCAT of two pseudos.
494 This allows noncontiguous allocation of the real and imaginary parts,
495 which makes much better code. Besides, allocating DCmode
496 pseudos overstrains reload on some machines like the 386. */
497 rtx realpart, imagpart;
498 int size = GET_MODE_UNIT_SIZE (mode);
499 enum machine_mode partmode
500 = mode_for_size (size * BITS_PER_UNIT,
501 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
502 ? MODE_FLOAT : MODE_INT),
505 realpart = gen_reg_rtx (partmode);
506 imagpart = gen_reg_rtx (partmode);
507 return gen_rtx (CONCAT, mode, realpart, imagpart);
510 /* Make sure regno_pointer_flag and regno_reg_rtx are large
511 enough to have an element for this pseudo reg number. */
513 if (reg_rtx_no == regno_pointer_flag_length)
517 (char *) savealloc (regno_pointer_flag_length * 2);
518 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
519 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
520 regno_pointer_flag = new;
522 new = (char *) savealloc (regno_pointer_flag_length * 2);
523 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
524 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
525 regno_pointer_align = new;
527 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
528 bcopy ((char *) regno_reg_rtx, (char *) new1,
529 regno_pointer_flag_length * sizeof (rtx));
530 bzero ((char *) &new1[regno_pointer_flag_length],
531 regno_pointer_flag_length * sizeof (rtx));
532 regno_reg_rtx = new1;
534 regno_pointer_flag_length *= 2;
537 val = gen_rtx (REG, mode, reg_rtx_no);
538 regno_reg_rtx[reg_rtx_no++] = val;
542 /* Identify REG as a probable pointer register and show its alignment
543 as ALIGN, if nonzero. */
546 mark_reg_pointer (reg, align)
550 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
553 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
556 /* Return 1 plus largest pseudo reg number used in the current function. */
564 /* Return 1 + the largest label number used so far in the current function. */
569 if (last_label_num && label_num == base_label_num)
570 return last_label_num;
574 /* Return first label number used in this function (if any were used). */
577 get_first_label_num ()
579 return first_label_num;
582 /* Return a value representing some low-order bits of X, where the number
583 of low-order bits is given by MODE. Note that no conversion is done
584 between floating-point and fixed-point values, rather, the bit
585 representation is returned.
587 This function handles the cases in common between gen_lowpart, below,
588 and two variants in cse.c and combine.c. These are the cases that can
589 be safely handled at all points in the compilation.
591 If this is not a case we can handle, return 0. */
594 gen_lowpart_common (mode, x)
595 enum machine_mode mode;
600 if (GET_MODE (x) == mode)
603 /* MODE must occupy no more words than the mode of X. */
604 if (GET_MODE (x) != VOIDmode
605 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
606 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
610 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
611 word = ((GET_MODE_SIZE (GET_MODE (x))
612 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
615 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
616 && (GET_MODE_CLASS (mode) == MODE_INT
617 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
619 /* If we are getting the low-order part of something that has been
620 sign- or zero-extended, we can either just use the object being
621 extended or make a narrower extension. If we want an even smaller
622 piece than the size of the object being extended, call ourselves
625 This case is used mostly by combine and cse. */
627 if (GET_MODE (XEXP (x, 0)) == mode)
629 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
630 return gen_lowpart_common (mode, XEXP (x, 0));
631 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
632 return gen_rtx (GET_CODE (x), mode, XEXP (x, 0));
634 else if (GET_CODE (x) == SUBREG
635 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
636 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
637 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
639 : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x)));
640 else if (GET_CODE (x) == REG)
642 /* If the register is not valid for MODE, return 0. If we don't
643 do this, there is no way to fix up the resulting REG later.
644 But we do do this if the current REG is not valid for its
645 mode. This latter is a kludge, but is required due to the
646 way that parameters are passed on some machines, most
648 if (REGNO (x) < FIRST_PSEUDO_REGISTER
649 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
650 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
652 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
653 /* integrate.c can't handle parts of a return value register. */
654 && (! REG_FUNCTION_VALUE_P (x)
655 || ! rtx_equal_function_value_matters)
656 /* We want to keep the stack, frame, and arg pointers
658 && x != frame_pointer_rtx
659 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
660 && x != arg_pointer_rtx
662 && x != stack_pointer_rtx)
663 return gen_rtx (REG, mode, REGNO (x) + word);
665 return gen_rtx (SUBREG, mode, x, word);
667 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
668 from the low-order part of the constant. */
669 else if ((GET_MODE_CLASS (mode) == MODE_INT
670 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
671 && GET_MODE (x) == VOIDmode
672 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
674 /* If MODE is twice the host word size, X is already the desired
675 representation. Otherwise, if MODE is wider than a word, we can't
676 do this. If MODE is exactly a word, return just one CONST_INT.
677 If MODE is smaller than a word, clear the bits that don't belong
678 in our mode, unless they and our sign bit are all one. So we get
679 either a reasonable negative value or a reasonable unsigned value
682 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
684 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
686 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
687 return (GET_CODE (x) == CONST_INT ? x
688 : GEN_INT (CONST_DOUBLE_LOW (x)));
691 /* MODE must be narrower than HOST_BITS_PER_INT. */
692 int width = GET_MODE_BITSIZE (mode);
693 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
694 : CONST_DOUBLE_LOW (x));
696 if (((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
697 != ((HOST_WIDE_INT) (-1) << (width - 1))))
698 val &= ((HOST_WIDE_INT) 1 << width) - 1;
700 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
705 /* If X is an integral constant but we want it in floating-point, it
706 must be the case that we have a union of an integer and a floating-point
707 value. If the machine-parameters allow it, simulate that union here
708 and return the result. The two-word and single-word cases are
711 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
712 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
713 || flag_pretend_float)
714 && GET_MODE_CLASS (mode) == MODE_FLOAT
715 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
716 && GET_CODE (x) == CONST_INT
717 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
718 #ifdef REAL_ARITHMETIC
724 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
725 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
729 union {HOST_WIDE_INT i; float d; } u;
732 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
735 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
736 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
737 || flag_pretend_float)
738 && GET_MODE_CLASS (mode) == MODE_FLOAT
739 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
740 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
741 && GET_MODE (x) == VOIDmode
742 && (sizeof (double) * HOST_BITS_PER_CHAR
743 == 2 * HOST_BITS_PER_WIDE_INT))
744 #ifdef REAL_ARITHMETIC
748 HOST_WIDE_INT low, high;
750 if (GET_CODE (x) == CONST_INT)
751 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
753 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
755 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
757 if (WORDS_BIG_ENDIAN)
758 i[0] = high, i[1] = low;
760 i[0] = low, i[1] = high;
762 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
763 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
767 union {HOST_WIDE_INT i[2]; double d; } u;
768 HOST_WIDE_INT low, high;
770 if (GET_CODE (x) == CONST_INT)
771 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
773 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
775 #ifdef HOST_WORDS_BIG_ENDIAN
776 u.i[0] = high, u.i[1] = low;
778 u.i[0] = low, u.i[1] = high;
781 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
784 /* Similarly, if this is converting a floating-point value into a
785 single-word integer. Only do this is the host and target parameters are
788 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
789 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
790 || flag_pretend_float)
791 && (GET_MODE_CLASS (mode) == MODE_INT
792 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
793 && GET_CODE (x) == CONST_DOUBLE
794 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
795 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
796 return operand_subword (x, 0, 0, GET_MODE (x));
798 /* Similarly, if this is converting a floating-point value into a
799 two-word integer, we can do this one word at a time and make an
800 integer. Only do this is the host and target parameters are
803 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
804 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
805 || flag_pretend_float)
806 && (GET_MODE_CLASS (mode) == MODE_INT
807 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
808 && GET_CODE (x) == CONST_DOUBLE
809 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
810 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
812 rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x));
813 rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
815 if (lowpart && GET_CODE (lowpart) == CONST_INT
816 && highpart && GET_CODE (highpart) == CONST_INT)
817 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
820 /* Otherwise, we can't do this. */
824 /* Return the real part (which has mode MODE) of a complex value X.
825 This always comes at the low address in memory. */
828 gen_realpart (mode, x)
829 enum machine_mode mode;
832 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
834 else if (WORDS_BIG_ENDIAN)
835 return gen_highpart (mode, x);
837 return gen_lowpart (mode, x);
840 /* Return the imaginary part (which has mode MODE) of a complex value X.
841 This always comes at the high address in memory. */
844 gen_imagpart (mode, x)
845 enum machine_mode mode;
848 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
850 else if (WORDS_BIG_ENDIAN)
851 return gen_lowpart (mode, x);
853 return gen_highpart (mode, x);
856 /* Return 1 iff X, assumed to be a SUBREG,
857 refers to the real part of the complex value in its containing reg.
858 Complex values are always stored with the real part in the first word,
859 regardless of WORDS_BIG_ENDIAN. */
862 subreg_realpart_p (x)
865 if (GET_CODE (x) != SUBREG)
868 return SUBREG_WORD (x) == 0;
871 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
872 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
873 least-significant part of X.
874 MODE specifies how big a part of X to return;
875 it usually should not be larger than a word.
876 If X is a MEM whose address is a QUEUED, the value may be so also. */
879 gen_lowpart (mode, x)
880 enum machine_mode mode;
883 rtx result = gen_lowpart_common (mode, x);
887 else if (GET_CODE (x) == REG)
889 /* Must be a hard reg that's not valid in MODE. */
890 result = gen_lowpart_common (mode, copy_to_reg (x));
895 else if (GET_CODE (x) == MEM)
897 /* The only additional case we can do is MEM. */
898 register int offset = 0;
899 if (WORDS_BIG_ENDIAN)
900 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
901 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
903 if (BYTES_BIG_ENDIAN)
904 /* Adjust the address so that the address-after-the-data
906 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
907 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
909 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
915 /* Like `gen_lowpart', but refer to the most significant part.
916 This is used to access the imaginary part of a complex number. */
919 gen_highpart (mode, x)
920 enum machine_mode mode;
923 /* This case loses if X is a subreg. To catch bugs early,
924 complain if an invalid MODE is used even in other cases. */
925 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
926 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
928 if (GET_CODE (x) == CONST_DOUBLE
929 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
930 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
933 return gen_rtx (CONST_INT, VOIDmode,
934 CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
935 else if (GET_CODE (x) == CONST_INT)
937 else if (GET_CODE (x) == MEM)
939 register int offset = 0;
940 if (! WORDS_BIG_ENDIAN)
941 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
942 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
944 if (! BYTES_BIG_ENDIAN
945 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
946 offset -= (GET_MODE_SIZE (mode)
947 - MIN (UNITS_PER_WORD,
948 GET_MODE_SIZE (GET_MODE (x))));
950 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
952 else if (GET_CODE (x) == SUBREG)
954 /* The only time this should occur is when we are looking at a
955 multi-word item with a SUBREG whose mode is the same as that of the
956 item. It isn't clear what we would do if it wasn't. */
957 if (SUBREG_WORD (x) != 0)
959 return gen_highpart (mode, SUBREG_REG (x));
961 else if (GET_CODE (x) == REG)
965 if (! WORDS_BIG_ENDIAN
966 && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
967 word = ((GET_MODE_SIZE (GET_MODE (x))
968 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
972 * ??? This fails miserably for complex values being passed in registers
973 * where the sizeof the real and imaginary part are not equal to the
974 * sizeof SImode. FIXME
977 if (REGNO (x) < FIRST_PSEUDO_REGISTER
978 /* integrate.c can't handle parts of a return value register. */
979 && (! REG_FUNCTION_VALUE_P (x)
980 || ! rtx_equal_function_value_matters)
981 /* We want to keep the stack, frame, and arg pointers special. */
982 && x != frame_pointer_rtx
983 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
984 && x != arg_pointer_rtx
986 && x != stack_pointer_rtx)
987 return gen_rtx (REG, mode, REGNO (x) + word);
989 return gen_rtx (SUBREG, mode, x, word);
995 /* Return 1 iff X, assumed to be a SUBREG,
996 refers to the least significant part of its containing reg.
997 If X is not a SUBREG, always return 1 (it is its own low part!). */
1000 subreg_lowpart_p (x)
1003 if (GET_CODE (x) != SUBREG)
1006 if (WORDS_BIG_ENDIAN
1007 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1008 return (SUBREG_WORD (x)
1009 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1010 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1013 return SUBREG_WORD (x) == 0;
1016 /* Return subword I of operand OP.
1017 The word number, I, is interpreted as the word number starting at the
1018 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1019 otherwise it is the high-order word.
1021 If we cannot extract the required word, we return zero. Otherwise, an
1022 rtx corresponding to the requested word will be returned.
1024 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1025 reload has completed, a valid address will always be returned. After
1026 reload, if a valid address cannot be returned, we return zero.
1028 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1029 it is the responsibility of the caller.
1031 MODE is the mode of OP in case it is a CONST_INT. */
1034 operand_subword (op, i, validate_address, mode)
1037 int validate_address;
1038 enum machine_mode mode;
1041 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1043 if (mode == VOIDmode)
1044 mode = GET_MODE (op);
1046 if (mode == VOIDmode)
1049 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1051 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1052 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1055 /* If OP is already an integer word, return it. */
1056 if (GET_MODE_CLASS (mode) == MODE_INT
1057 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1060 /* If OP is a REG or SUBREG, we can handle it very simply. */
1061 if (GET_CODE (op) == REG)
1063 /* If the register is not valid for MODE, return 0. If we don't
1064 do this, there is no way to fix up the resulting REG later. */
1065 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1066 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1068 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1069 || (REG_FUNCTION_VALUE_P (op)
1070 && rtx_equal_function_value_matters)
1071 /* We want to keep the stack, frame, and arg pointers
1073 || op == frame_pointer_rtx
1074 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1075 || op == arg_pointer_rtx
1077 || op == stack_pointer_rtx)
1078 return gen_rtx (SUBREG, word_mode, op, i);
1080 return gen_rtx (REG, word_mode, REGNO (op) + i);
1082 else if (GET_CODE (op) == SUBREG)
1083 return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1084 else if (GET_CODE (op) == CONCAT)
1086 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1088 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1089 return operand_subword (XEXP (op, 1), i - partwords,
1090 validate_address, mode);
1093 /* Form a new MEM at the requested address. */
1094 if (GET_CODE (op) == MEM)
1096 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1099 if (validate_address)
1101 if (reload_completed)
1103 if (! strict_memory_address_p (word_mode, addr))
1107 addr = memory_address (word_mode, addr);
1110 new = gen_rtx (MEM, word_mode, addr);
1112 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1113 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1114 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1119 /* The only remaining cases are when OP is a constant. If the host and
1120 target floating formats are the same, handling two-word floating
1121 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1122 are defined as returning one or two 32 bit values, respectively,
1123 and not values of BITS_PER_WORD bits. */
1124 #ifdef REAL_ARITHMETIC
1125 /* The output is some bits, the width of the target machine's word.
1126 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1128 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1129 && GET_MODE_CLASS (mode) == MODE_FLOAT
1130 && GET_MODE_BITSIZE (mode) == 64
1131 && GET_CODE (op) == CONST_DOUBLE)
1136 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1137 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1139 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1140 which the words are written depends on the word endianness.
1142 ??? This is a potential portability problem and should
1143 be fixed at some point. */
1144 if (BITS_PER_WORD == 32)
1145 return GEN_INT ((HOST_WIDE_INT) k[i]);
1146 #if HOST_BITS_PER_WIDE_INT > 32
1147 else if (BITS_PER_WORD >= 64 && i == 0)
1148 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1149 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1151 else if (BITS_PER_WORD == 16)
1158 return GEN_INT ((HOST_WIDE_INT) value);
1163 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1164 && GET_MODE_CLASS (mode) == MODE_FLOAT
1165 && GET_MODE_BITSIZE (mode) > 64
1166 && GET_CODE (op) == CONST_DOUBLE)
1171 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1172 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1174 if (BITS_PER_WORD == 32)
1175 return GEN_INT ((HOST_WIDE_INT) k[i]);
1177 #else /* no REAL_ARITHMETIC */
1178 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1179 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1180 || flag_pretend_float)
1181 && GET_MODE_CLASS (mode) == MODE_FLOAT
1182 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1183 && GET_CODE (op) == CONST_DOUBLE)
1185 /* The constant is stored in the host's word-ordering,
1186 but we want to access it in the target's word-ordering. Some
1187 compilers don't like a conditional inside macro args, so we have two
1188 copies of the return. */
1189 #ifdef HOST_WORDS_BIG_ENDIAN
1190 return GEN_INT (i == WORDS_BIG_ENDIAN
1191 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1193 return GEN_INT (i != WORDS_BIG_ENDIAN
1194 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1197 #endif /* no REAL_ARITHMETIC */
1199 /* Single word float is a little harder, since single- and double-word
1200 values often do not have the same high-order bits. We have already
1201 verified that we want the only defined word of the single-word value. */
1202 #ifdef REAL_ARITHMETIC
1203 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1204 && GET_MODE_BITSIZE (mode) == 32
1205 && GET_CODE (op) == CONST_DOUBLE)
1210 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1211 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1212 return GEN_INT ((HOST_WIDE_INT) l);
1215 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1216 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1217 || flag_pretend_float)
1218 && GET_MODE_CLASS (mode) == MODE_FLOAT
1219 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1220 && GET_CODE (op) == CONST_DOUBLE)
1223 union {float f; HOST_WIDE_INT i; } u;
1225 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1228 return GEN_INT (u.i);
1230 #endif /* no REAL_ARITHMETIC */
1232 /* The only remaining cases that we can handle are integers.
1233 Convert to proper endianness now since these cases need it.
1234 At this point, i == 0 means the low-order word.
1236 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1237 in general. However, if OP is (const_int 0), we can just return
1240 if (op == const0_rtx)
1243 if (GET_MODE_CLASS (mode) != MODE_INT
1244 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1245 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1248 if (WORDS_BIG_ENDIAN)
1249 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1251 /* Find out which word on the host machine this value is in and get
1252 it from the constant. */
1253 val = (i / size_ratio == 0
1254 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1255 : (GET_CODE (op) == CONST_INT
1256 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1258 /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */
1259 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1260 val = ((val >> ((i % size_ratio) * BITS_PER_WORD))
1261 & (((HOST_WIDE_INT) 1
1262 << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1));
1264 return GEN_INT (val);
1267 /* Similar to `operand_subword', but never return 0. If we can't extract
1268 the required subword, put OP into a register and try again. If that fails,
1269 abort. We always validate the address in this case. It is not valid
1270 to call this function after reload; it is mostly meant for RTL
1273 MODE is the mode of OP, in case it is CONST_INT. */
1276 operand_subword_force (op, i, mode)
1279 enum machine_mode mode;
1281 rtx result = operand_subword (op, i, 1, mode);
1286 if (mode != BLKmode && mode != VOIDmode)
1287 op = force_reg (mode, op);
1289 result = operand_subword (op, i, 1, mode);
1296 /* Given a compare instruction, swap the operands.
1297 A test instruction is changed into a compare of 0 against the operand. */
1300 reverse_comparison (insn)
1303 rtx body = PATTERN (insn);
1306 if (GET_CODE (body) == SET)
1307 comp = SET_SRC (body);
1309 comp = SET_SRC (XVECEXP (body, 0, 0));
1311 if (GET_CODE (comp) == COMPARE)
1313 rtx op0 = XEXP (comp, 0);
1314 rtx op1 = XEXP (comp, 1);
1315 XEXP (comp, 0) = op1;
1316 XEXP (comp, 1) = op0;
1320 rtx new = gen_rtx (COMPARE, VOIDmode,
1321 CONST0_RTX (GET_MODE (comp)), comp);
1322 if (GET_CODE (body) == SET)
1323 SET_SRC (body) = new;
1325 SET_SRC (XVECEXP (body, 0, 0)) = new;
1329 /* Return a memory reference like MEMREF, but with its mode changed
1330 to MODE and its address changed to ADDR.
1331 (VOIDmode means don't change the mode.
1332 NULL for ADDR means don't change the address.) */
1335 change_address (memref, mode, addr)
1337 enum machine_mode mode;
1342 if (GET_CODE (memref) != MEM)
1344 if (mode == VOIDmode)
1345 mode = GET_MODE (memref);
1347 addr = XEXP (memref, 0);
1349 /* If reload is in progress or has completed, ADDR must be valid.
1350 Otherwise, we can call memory_address to make it valid. */
1351 if (reload_completed || reload_in_progress)
1353 if (! memory_address_p (mode, addr))
1357 addr = memory_address (mode, addr);
1359 new = gen_rtx (MEM, mode, addr);
1360 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1361 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1362 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1366 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1373 label = (output_bytecode
1374 ? gen_rtx (CODE_LABEL, VOIDmode, NULL, bc_get_bytecode_label ())
1375 : gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0, label_num++, NULL_PTR));
1377 LABEL_NUSES (label) = 0;
1381 /* For procedure integration. */
1383 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1384 from a permanent obstack when the opportunity arises. */
1387 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1388 last_labelno, max_parm_regnum, max_regnum, args_size,
1389 pops_args, stack_slots, forced_labels, function_flags,
1390 outgoing_args_size, original_arg_vector,
1391 original_decl_initial, regno_rtx, regno_flag,
1393 rtx first_insn, first_parm_insn;
1394 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1399 int outgoing_args_size;
1400 rtvec original_arg_vector;
1401 rtx original_decl_initial;
1406 rtx header = gen_rtx (INLINE_HEADER, VOIDmode,
1407 cur_insn_uid++, NULL_RTX,
1408 first_insn, first_parm_insn,
1409 first_labelno, last_labelno,
1410 max_parm_regnum, max_regnum, args_size, pops_args,
1411 stack_slots, forced_labels, function_flags,
1412 outgoing_args_size, original_arg_vector,
1413 original_decl_initial,
1414 regno_rtx, regno_flag, regno_align);
1418 /* Install new pointers to the first and last insns in the chain.
1419 Also, set cur_insn_uid to one higher than the last in use.
1420 Used for an inline-procedure after copying the insn chain. */
1423 set_new_first_and_last_insn (first, last)
1432 for (insn = first; insn; insn = NEXT_INSN (insn))
1433 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1438 /* Set the range of label numbers found in the current function.
1439 This is used when belatedly compiling an inline function. */
1442 set_new_first_and_last_label_num (first, last)
1445 base_label_num = label_num;
1446 first_label_num = first;
1447 last_label_num = last;
1450 /* Save all variables describing the current status into the structure *P.
1451 This is used before starting a nested function. */
1454 save_emit_status (p)
1457 p->reg_rtx_no = reg_rtx_no;
1458 p->first_label_num = first_label_num;
1459 p->first_insn = first_insn;
1460 p->last_insn = last_insn;
1461 p->sequence_rtl_expr = sequence_rtl_expr;
1462 p->sequence_stack = sequence_stack;
1463 p->cur_insn_uid = cur_insn_uid;
1464 p->last_linenum = last_linenum;
1465 p->last_filename = last_filename;
1466 p->regno_pointer_flag = regno_pointer_flag;
1467 p->regno_pointer_align = regno_pointer_align;
1468 p->regno_pointer_flag_length = regno_pointer_flag_length;
1469 p->regno_reg_rtx = regno_reg_rtx;
1472 /* Restore all variables describing the current status from the structure *P.
1473 This is used after a nested function. */
1476 restore_emit_status (p)
1481 reg_rtx_no = p->reg_rtx_no;
1482 first_label_num = p->first_label_num;
1484 first_insn = p->first_insn;
1485 last_insn = p->last_insn;
1486 sequence_rtl_expr = p->sequence_rtl_expr;
1487 sequence_stack = p->sequence_stack;
1488 cur_insn_uid = p->cur_insn_uid;
1489 last_linenum = p->last_linenum;
1490 last_filename = p->last_filename;
1491 regno_pointer_flag = p->regno_pointer_flag;
1492 regno_pointer_align = p->regno_pointer_align;
1493 regno_pointer_flag_length = p->regno_pointer_flag_length;
1494 regno_reg_rtx = p->regno_reg_rtx;
1496 /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */
1497 sequence_element_free_list = 0;
1498 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1499 sequence_result[i] = 0;
1504 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1505 It does not work to do this twice, because the mark bits set here
1506 are not cleared afterwards. */
1509 unshare_all_rtl (insn)
1512 for (; insn; insn = NEXT_INSN (insn))
1513 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1514 || GET_CODE (insn) == CALL_INSN)
1516 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1517 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1518 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1521 /* Make sure the addresses of stack slots found outside the insn chain
1522 (such as, in DECL_RTL of a variable) are not shared
1523 with the insn chain.
1525 This special care is necessary when the stack slot MEM does not
1526 actually appear in the insn chain. If it does appear, its address
1527 is unshared from all else at that point. */
1529 copy_rtx_if_shared (stack_slot_list);
1532 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1533 Recursively does the same for subexpressions. */
1536 copy_rtx_if_shared (orig)
1539 register rtx x = orig;
1541 register enum rtx_code code;
1542 register char *format_ptr;
1548 code = GET_CODE (x);
1550 /* These types may be freely shared. */
1563 /* SCRATCH must be shared because they represent distinct values. */
1567 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1568 a LABEL_REF, it isn't sharable. */
1569 if (GET_CODE (XEXP (x, 0)) == PLUS
1570 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1571 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1580 /* The chain of insns is not being copied. */
1584 /* A MEM is allowed to be shared if its address is constant
1585 or is a constant plus one of the special registers. */
1586 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1587 || XEXP (x, 0) == virtual_stack_vars_rtx
1588 || XEXP (x, 0) == virtual_incoming_args_rtx)
1591 if (GET_CODE (XEXP (x, 0)) == PLUS
1592 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1593 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1594 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1596 /* This MEM can appear in more than one place,
1597 but its address better not be shared with anything else. */
1599 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1605 /* This rtx may not be shared. If it has already been seen,
1606 replace it with a copy of itself. */
1612 copy = rtx_alloc (code);
1613 bcopy ((char *) x, (char *) copy,
1614 (sizeof (*copy) - sizeof (copy->fld)
1615 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1621 /* Now scan the subexpressions recursively.
1622 We can store any replaced subexpressions directly into X
1623 since we know X is not shared! Any vectors in X
1624 must be copied if X was copied. */
1626 format_ptr = GET_RTX_FORMAT (code);
1628 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1630 switch (*format_ptr++)
1633 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1637 if (XVEC (x, i) != NULL)
1640 int len = XVECLEN (x, i);
1642 if (copied && len > 0)
1643 XVEC (x, i) = gen_rtvec_v (len, &XVECEXP (x, i, 0));
1644 for (j = 0; j < len; j++)
1645 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1653 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1654 to look for shared sub-parts. */
1657 reset_used_flags (x)
1661 register enum rtx_code code;
1662 register char *format_ptr;
1667 code = GET_CODE (x);
1669 /* These types may be freely shared so we needn't do any resetting
1690 /* The chain of insns is not being copied. */
1696 format_ptr = GET_RTX_FORMAT (code);
1697 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1699 switch (*format_ptr++)
1702 reset_used_flags (XEXP (x, i));
1706 for (j = 0; j < XVECLEN (x, i); j++)
1707 reset_used_flags (XVECEXP (x, i, j));
1713 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1714 Return X or the rtx for the pseudo reg the value of X was copied into.
1715 OTHER must be valid as a SET_DEST. */
1718 make_safe_from (x, other)
1722 switch (GET_CODE (other))
1725 other = SUBREG_REG (other);
1727 case STRICT_LOW_PART:
1730 other = XEXP (other, 0);
1736 if ((GET_CODE (other) == MEM
1738 && GET_CODE (x) != REG
1739 && GET_CODE (x) != SUBREG)
1740 || (GET_CODE (other) == REG
1741 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1742 || reg_mentioned_p (other, x))))
1744 rtx temp = gen_reg_rtx (GET_MODE (x));
1745 emit_move_insn (temp, x);
1751 /* Emission of insns (adding them to the doubly-linked list). */
1753 /* Return the first insn of the current sequence or current function. */
1761 /* Return the last insn emitted in current sequence or current function. */
1769 /* Specify a new insn as the last in the chain. */
1772 set_last_insn (insn)
1775 if (NEXT_INSN (insn) != 0)
1780 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1783 get_last_insn_anywhere ()
1785 struct sequence_stack *stack;
1788 for (stack = sequence_stack; stack; stack = stack->next)
1789 if (stack->last != 0)
1794 /* Return a number larger than any instruction's uid in this function. */
1799 return cur_insn_uid;
1802 /* Return the next insn. If it is a SEQUENCE, return the first insn
1811 insn = NEXT_INSN (insn);
1812 if (insn && GET_CODE (insn) == INSN
1813 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1814 insn = XVECEXP (PATTERN (insn), 0, 0);
1820 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1824 previous_insn (insn)
1829 insn = PREV_INSN (insn);
1830 if (insn && GET_CODE (insn) == INSN
1831 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1832 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1838 /* Return the next insn after INSN that is not a NOTE. This routine does not
1839 look inside SEQUENCEs. */
1842 next_nonnote_insn (insn)
1847 insn = NEXT_INSN (insn);
1848 if (insn == 0 || GET_CODE (insn) != NOTE)
1855 /* Return the previous insn before INSN that is not a NOTE. This routine does
1856 not look inside SEQUENCEs. */
1859 prev_nonnote_insn (insn)
1864 insn = PREV_INSN (insn);
1865 if (insn == 0 || GET_CODE (insn) != NOTE)
1872 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
1873 or 0, if there is none. This routine does not look inside
1877 next_real_insn (insn)
1882 insn = NEXT_INSN (insn);
1883 if (insn == 0 || GET_CODE (insn) == INSN
1884 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
1891 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
1892 or 0, if there is none. This routine does not look inside
1896 prev_real_insn (insn)
1901 insn = PREV_INSN (insn);
1902 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
1903 || GET_CODE (insn) == JUMP_INSN)
1910 /* Find the next insn after INSN that really does something. This routine
1911 does not look inside SEQUENCEs. Until reload has completed, this is the
1912 same as next_real_insn. */
1915 next_active_insn (insn)
1920 insn = NEXT_INSN (insn);
1922 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1923 || (GET_CODE (insn) == INSN
1924 && (! reload_completed
1925 || (GET_CODE (PATTERN (insn)) != USE
1926 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1933 /* Find the last insn before INSN that really does something. This routine
1934 does not look inside SEQUENCEs. Until reload has completed, this is the
1935 same as prev_real_insn. */
1938 prev_active_insn (insn)
1943 insn = PREV_INSN (insn);
1945 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
1946 || (GET_CODE (insn) == INSN
1947 && (! reload_completed
1948 || (GET_CODE (PATTERN (insn)) != USE
1949 && GET_CODE (PATTERN (insn)) != CLOBBER))))
1956 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
1964 insn = NEXT_INSN (insn);
1965 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1972 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
1980 insn = PREV_INSN (insn);
1981 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
1989 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
1990 and REG_CC_USER notes so we can find it. */
1993 link_cc0_insns (insn)
1996 rtx user = next_nonnote_insn (insn);
1998 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
1999 user = XVECEXP (PATTERN (user), 0, 0);
2001 REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn,
2003 REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn));
2006 /* Return the next insn that uses CC0 after INSN, which is assumed to
2007 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2008 applied to the result of this function should yield INSN).
2010 Normally, this is simply the next insn. However, if a REG_CC_USER note
2011 is present, it contains the insn that uses CC0.
2013 Return 0 if we can't find the insn. */
2016 next_cc0_user (insn)
2019 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2022 return XEXP (note, 0);
2024 insn = next_nonnote_insn (insn);
2025 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2026 insn = XVECEXP (PATTERN (insn), 0, 0);
2028 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2029 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2035 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2036 note, it is the previous insn. */
2039 prev_cc0_setter (insn)
2042 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2046 return XEXP (note, 0);
2048 insn = prev_nonnote_insn (insn);
2049 if (! sets_cc0_p (PATTERN (insn)))
2056 /* Try splitting insns that can be split for better scheduling.
2057 PAT is the pattern which might split.
2058 TRIAL is the insn providing PAT.
2059 LAST is non-zero if we should return the last insn of the sequence produced.
2061 If this routine succeeds in splitting, it returns the first or last
2062 replacement insn depending on the value of LAST. Otherwise, it
2063 returns TRIAL. If the insn to be returned can be split, it will be. */
2066 try_split (pat, trial, last)
2070 rtx before = PREV_INSN (trial);
2071 rtx after = NEXT_INSN (trial);
2072 rtx seq = split_insns (pat, trial);
2073 int has_barrier = 0;
2076 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2077 We may need to handle this specially. */
2078 if (after && GET_CODE (after) == BARRIER)
2081 after = NEXT_INSN (after);
2086 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2087 The latter case will normally arise only when being done so that
2088 it, in turn, will be split (SFmode on the 29k is an example). */
2089 if (GET_CODE (seq) == SEQUENCE)
2091 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2092 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2093 increment the usage count so we don't delete the label. */
2096 if (GET_CODE (trial) == JUMP_INSN)
2097 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2098 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2100 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2102 if (JUMP_LABEL (trial))
2103 LABEL_NUSES (JUMP_LABEL (trial))++;
2106 tem = emit_insn_after (seq, before);
2108 delete_insn (trial);
2110 emit_barrier_after (tem);
2112 /* Recursively call try_split for each new insn created; by the
2113 time control returns here that insn will be fully split, so
2114 set LAST and continue from the insn after the one returned.
2115 We can't use next_active_insn here since AFTER may be a note.
2116 Ignore deleted insns, which can be occur if not optimizing. */
2117 for (tem = NEXT_INSN (before); tem != after;
2118 tem = NEXT_INSN (tem))
2119 if (! INSN_DELETED_P (tem))
2120 tem = try_split (PATTERN (tem), tem, 1);
2122 /* Avoid infinite loop if the result matches the original pattern. */
2123 else if (rtx_equal_p (seq, pat))
2127 PATTERN (trial) = seq;
2128 INSN_CODE (trial) = -1;
2129 try_split (seq, trial, last);
2132 /* Return either the first or the last insn, depending on which was
2134 return last ? prev_active_insn (after) : next_active_insn (before);
2140 /* Make and return an INSN rtx, initializing all its slots.
2141 Store PATTERN in the pattern slots. */
2144 make_insn_raw (pattern)
2149 /* If in RTL generation phase, see if FREE_INSN can be used. */
2150 if (free_insn != 0 && rtx_equal_function_value_matters)
2153 free_insn = NEXT_INSN (free_insn);
2154 PUT_CODE (insn, INSN);
2157 insn = rtx_alloc (INSN);
2159 INSN_UID (insn) = cur_insn_uid++;
2160 PATTERN (insn) = pattern;
2161 INSN_CODE (insn) = -1;
2162 LOG_LINKS (insn) = NULL;
2163 REG_NOTES (insn) = NULL;
2168 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2171 make_jump_insn_raw (pattern)
2176 insn = rtx_alloc (JUMP_INSN);
2177 INSN_UID (insn) = cur_insn_uid++;
2179 PATTERN (insn) = pattern;
2180 INSN_CODE (insn) = -1;
2181 LOG_LINKS (insn) = NULL;
2182 REG_NOTES (insn) = NULL;
2183 JUMP_LABEL (insn) = NULL;
2188 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2191 make_call_insn_raw (pattern)
2196 insn = rtx_alloc (CALL_INSN);
2197 INSN_UID (insn) = cur_insn_uid++;
2199 PATTERN (insn) = pattern;
2200 INSN_CODE (insn) = -1;
2201 LOG_LINKS (insn) = NULL;
2202 REG_NOTES (insn) = NULL;
2203 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2208 /* Add INSN to the end of the doubly-linked list.
2209 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2215 PREV_INSN (insn) = last_insn;
2216 NEXT_INSN (insn) = 0;
2218 if (NULL != last_insn)
2219 NEXT_INSN (last_insn) = insn;
2221 if (NULL == first_insn)
2227 /* Add INSN into the doubly-linked list after insn AFTER. This and
2228 the next should be the only functions called to insert an insn once
2229 delay slots have been filled since only they know how to update a
2233 add_insn_after (insn, after)
2236 rtx next = NEXT_INSN (after);
2238 if (optimize && INSN_DELETED_P (after))
2241 NEXT_INSN (insn) = next;
2242 PREV_INSN (insn) = after;
2246 PREV_INSN (next) = insn;
2247 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2248 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2250 else if (last_insn == after)
2254 struct sequence_stack *stack = sequence_stack;
2255 /* Scan all pending sequences too. */
2256 for (; stack; stack = stack->next)
2257 if (after == stack->last)
2267 NEXT_INSN (after) = insn;
2268 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2270 rtx sequence = PATTERN (after);
2271 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2275 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2276 the previous should be the only functions called to insert an insn once
2277 delay slots have been filled since only they know how to update a
2281 add_insn_before (insn, before)
2284 rtx prev = PREV_INSN (before);
2286 if (optimize && INSN_DELETED_P (before))
2289 PREV_INSN (insn) = prev;
2290 NEXT_INSN (insn) = before;
2294 NEXT_INSN (prev) = insn;
2295 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2297 rtx sequence = PATTERN (prev);
2298 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2301 else if (first_insn == before)
2305 struct sequence_stack *stack = sequence_stack;
2306 /* Scan all pending sequences too. */
2307 for (; stack; stack = stack->next)
2308 if (before == stack->first)
2310 stack->first = insn;
2318 PREV_INSN (before) = insn;
2319 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2320 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2323 /* Delete all insns made since FROM.
2324 FROM becomes the new last instruction. */
2327 delete_insns_since (from)
2333 NEXT_INSN (from) = 0;
2337 /* This function is deprecated, please use sequences instead.
2339 Move a consecutive bunch of insns to a different place in the chain.
2340 The insns to be moved are those between FROM and TO.
2341 They are moved to a new position after the insn AFTER.
2342 AFTER must not be FROM or TO or any insn in between.
2344 This function does not know about SEQUENCEs and hence should not be
2345 called after delay-slot filling has been done. */
2348 reorder_insns (from, to, after)
2349 rtx from, to, after;
2351 /* Splice this bunch out of where it is now. */
2352 if (PREV_INSN (from))
2353 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2355 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2356 if (last_insn == to)
2357 last_insn = PREV_INSN (from);
2358 if (first_insn == from)
2359 first_insn = NEXT_INSN (to);
2361 /* Make the new neighbors point to it and it to them. */
2362 if (NEXT_INSN (after))
2363 PREV_INSN (NEXT_INSN (after)) = to;
2365 NEXT_INSN (to) = NEXT_INSN (after);
2366 PREV_INSN (from) = after;
2367 NEXT_INSN (after) = from;
2368 if (after == last_insn)
2372 /* Return the line note insn preceding INSN. */
2375 find_line_note (insn)
2378 if (no_line_numbers)
2381 for (; insn; insn = PREV_INSN (insn))
2382 if (GET_CODE (insn) == NOTE
2383 && NOTE_LINE_NUMBER (insn) >= 0)
2389 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2390 of the moved insns when debugging. This may insert a note between AFTER
2391 and FROM, and another one after TO. */
2394 reorder_insns_with_line_notes (from, to, after)
2395 rtx from, to, after;
2397 rtx from_line = find_line_note (from);
2398 rtx after_line = find_line_note (after);
2400 reorder_insns (from, to, after);
2402 if (from_line == after_line)
2406 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2407 NOTE_LINE_NUMBER (from_line),
2410 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2411 NOTE_LINE_NUMBER (after_line),
2415 /* Emit an insn of given code and pattern
2416 at a specified place within the doubly-linked list. */
2418 /* Make an instruction with body PATTERN
2419 and output it before the instruction BEFORE. */
2422 emit_insn_before (pattern, before)
2423 register rtx pattern, before;
2425 register rtx insn = before;
2427 if (GET_CODE (pattern) == SEQUENCE)
2431 for (i = 0; i < XVECLEN (pattern, 0); i++)
2433 insn = XVECEXP (pattern, 0, i);
2434 add_insn_before (insn, before);
2436 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2437 sequence_result[XVECLEN (pattern, 0)] = pattern;
2441 insn = make_insn_raw (pattern);
2442 add_insn_before (insn, before);
2448 /* Make an instruction with body PATTERN and code JUMP_INSN
2449 and output it before the instruction BEFORE. */
2452 emit_jump_insn_before (pattern, before)
2453 register rtx pattern, before;
2457 if (GET_CODE (pattern) == SEQUENCE)
2458 insn = emit_insn_before (pattern, before);
2461 insn = make_jump_insn_raw (pattern);
2462 add_insn_before (insn, before);
2468 /* Make an instruction with body PATTERN and code CALL_INSN
2469 and output it before the instruction BEFORE. */
2472 emit_call_insn_before (pattern, before)
2473 register rtx pattern, before;
2477 if (GET_CODE (pattern) == SEQUENCE)
2478 insn = emit_insn_before (pattern, before);
2481 insn = make_call_insn_raw (pattern);
2482 add_insn_before (insn, before);
2483 PUT_CODE (insn, CALL_INSN);
2489 /* Make an insn of code BARRIER
2490 and output it before the insn AFTER. */
2493 emit_barrier_before (before)
2494 register rtx before;
2496 register rtx insn = rtx_alloc (BARRIER);
2498 INSN_UID (insn) = cur_insn_uid++;
2500 add_insn_before (insn, before);
2504 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2507 emit_note_before (subtype, before)
2511 register rtx note = rtx_alloc (NOTE);
2512 INSN_UID (note) = cur_insn_uid++;
2513 NOTE_SOURCE_FILE (note) = 0;
2514 NOTE_LINE_NUMBER (note) = subtype;
2516 add_insn_before (note, before);
2520 /* Make an insn of code INSN with body PATTERN
2521 and output it after the insn AFTER. */
2524 emit_insn_after (pattern, after)
2525 register rtx pattern, after;
2527 register rtx insn = after;
2529 if (GET_CODE (pattern) == SEQUENCE)
2533 for (i = 0; i < XVECLEN (pattern, 0); i++)
2535 insn = XVECEXP (pattern, 0, i);
2536 add_insn_after (insn, after);
2539 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2540 sequence_result[XVECLEN (pattern, 0)] = pattern;
2544 insn = make_insn_raw (pattern);
2545 add_insn_after (insn, after);
2551 /* Similar to emit_insn_after, except that line notes are to be inserted so
2552 as to act as if this insn were at FROM. */
2555 emit_insn_after_with_line_notes (pattern, after, from)
2556 rtx pattern, after, from;
2558 rtx from_line = find_line_note (from);
2559 rtx after_line = find_line_note (after);
2560 rtx insn = emit_insn_after (pattern, after);
2563 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2564 NOTE_LINE_NUMBER (from_line),
2568 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2569 NOTE_LINE_NUMBER (after_line),
2573 /* Make an insn of code JUMP_INSN with body PATTERN
2574 and output it after the insn AFTER. */
2577 emit_jump_insn_after (pattern, after)
2578 register rtx pattern, after;
2582 if (GET_CODE (pattern) == SEQUENCE)
2583 insn = emit_insn_after (pattern, after);
2586 insn = make_jump_insn_raw (pattern);
2587 add_insn_after (insn, after);
2593 /* Make an insn of code BARRIER
2594 and output it after the insn AFTER. */
2597 emit_barrier_after (after)
2600 register rtx insn = rtx_alloc (BARRIER);
2602 INSN_UID (insn) = cur_insn_uid++;
2604 add_insn_after (insn, after);
2608 /* Emit the label LABEL after the insn AFTER. */
2611 emit_label_after (label, after)
2614 /* This can be called twice for the same label
2615 as a result of the confusion that follows a syntax error!
2616 So make it harmless. */
2617 if (INSN_UID (label) == 0)
2619 INSN_UID (label) = cur_insn_uid++;
2620 add_insn_after (label, after);
2626 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2629 emit_note_after (subtype, after)
2633 register rtx note = rtx_alloc (NOTE);
2634 INSN_UID (note) = cur_insn_uid++;
2635 NOTE_SOURCE_FILE (note) = 0;
2636 NOTE_LINE_NUMBER (note) = subtype;
2637 add_insn_after (note, after);
2641 /* Emit a line note for FILE and LINE after the insn AFTER. */
2644 emit_line_note_after (file, line, after)
2651 if (no_line_numbers && line > 0)
2657 note = rtx_alloc (NOTE);
2658 INSN_UID (note) = cur_insn_uid++;
2659 NOTE_SOURCE_FILE (note) = file;
2660 NOTE_LINE_NUMBER (note) = line;
2661 add_insn_after (note, after);
2665 /* Make an insn of code INSN with pattern PATTERN
2666 and add it to the end of the doubly-linked list.
2667 If PATTERN is a SEQUENCE, take the elements of it
2668 and emit an insn for each element.
2670 Returns the last insn emitted. */
2676 rtx insn = last_insn;
2678 if (GET_CODE (pattern) == SEQUENCE)
2682 for (i = 0; i < XVECLEN (pattern, 0); i++)
2684 insn = XVECEXP (pattern, 0, i);
2687 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2688 sequence_result[XVECLEN (pattern, 0)] = pattern;
2692 insn = make_insn_raw (pattern);
2699 /* Emit the insns in a chain starting with INSN.
2700 Return the last insn emitted. */
2710 rtx next = NEXT_INSN (insn);
2719 /* Emit the insns in a chain starting with INSN and place them in front of
2720 the insn BEFORE. Return the last insn emitted. */
2723 emit_insns_before (insn, before)
2731 rtx next = NEXT_INSN (insn);
2732 add_insn_before (insn, before);
2740 /* Emit the insns in a chain starting with FIRST and place them in back of
2741 the insn AFTER. Return the last insn emitted. */
2744 emit_insns_after (first, after)
2749 register rtx after_after;
2757 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2760 after_after = NEXT_INSN (after);
2762 NEXT_INSN (after) = first;
2763 PREV_INSN (first) = after;
2764 NEXT_INSN (last) = after_after;
2766 PREV_INSN (after_after) = last;
2768 if (after == last_insn)
2773 /* Make an insn of code JUMP_INSN with pattern PATTERN
2774 and add it to the end of the doubly-linked list. */
2777 emit_jump_insn (pattern)
2780 if (GET_CODE (pattern) == SEQUENCE)
2781 return emit_insn (pattern);
2784 register rtx insn = make_jump_insn_raw (pattern);
2790 /* Make an insn of code CALL_INSN with pattern PATTERN
2791 and add it to the end of the doubly-linked list. */
2794 emit_call_insn (pattern)
2797 if (GET_CODE (pattern) == SEQUENCE)
2798 return emit_insn (pattern);
2801 register rtx insn = make_call_insn_raw (pattern);
2803 PUT_CODE (insn, CALL_INSN);
2808 /* Add the label LABEL to the end of the doubly-linked list. */
2814 /* This can be called twice for the same label
2815 as a result of the confusion that follows a syntax error!
2816 So make it harmless. */
2817 if (INSN_UID (label) == 0)
2819 INSN_UID (label) = cur_insn_uid++;
2825 /* Make an insn of code BARRIER
2826 and add it to the end of the doubly-linked list. */
2831 register rtx barrier = rtx_alloc (BARRIER);
2832 INSN_UID (barrier) = cur_insn_uid++;
2837 /* Make an insn of code NOTE
2838 with data-fields specified by FILE and LINE
2839 and add it to the end of the doubly-linked list,
2840 but only if line-numbers are desired for debugging info. */
2843 emit_line_note (file, line)
2847 if (output_bytecode)
2849 /* FIXME: for now we do nothing, but eventually we will have to deal with
2850 debugging information. */
2854 emit_filename = file;
2858 if (no_line_numbers)
2862 return emit_note (file, line);
2865 /* Make an insn of code NOTE
2866 with data-fields specified by FILE and LINE
2867 and add it to the end of the doubly-linked list.
2868 If it is a line-number NOTE, omit it if it matches the previous one. */
2871 emit_note (file, line)
2879 if (file && last_filename && !strcmp (file, last_filename)
2880 && line == last_linenum)
2882 last_filename = file;
2883 last_linenum = line;
2886 if (no_line_numbers && line > 0)
2892 note = rtx_alloc (NOTE);
2893 INSN_UID (note) = cur_insn_uid++;
2894 NOTE_SOURCE_FILE (note) = file;
2895 NOTE_LINE_NUMBER (note) = line;
2900 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
2903 emit_line_note_force (file, line)
2908 return emit_line_note (file, line);
2911 /* Cause next statement to emit a line note even if the line number
2912 has not changed. This is used at the beginning of a function. */
2915 force_next_line_note ()
2920 /* Return an indication of which type of insn should have X as a body.
2921 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
2927 if (GET_CODE (x) == CODE_LABEL)
2929 if (GET_CODE (x) == CALL)
2931 if (GET_CODE (x) == RETURN)
2933 if (GET_CODE (x) == SET)
2935 if (SET_DEST (x) == pc_rtx)
2937 else if (GET_CODE (SET_SRC (x)) == CALL)
2942 if (GET_CODE (x) == PARALLEL)
2945 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
2946 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
2948 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2949 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
2951 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
2952 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
2958 /* Emit the rtl pattern X as an appropriate kind of insn.
2959 If X is a label, it is simply added into the insn chain. */
2965 enum rtx_code code = classify_insn (x);
2967 if (code == CODE_LABEL)
2968 return emit_label (x);
2969 else if (code == INSN)
2970 return emit_insn (x);
2971 else if (code == JUMP_INSN)
2973 register rtx insn = emit_jump_insn (x);
2974 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
2975 return emit_barrier ();
2978 else if (code == CALL_INSN)
2979 return emit_call_insn (x);
2984 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
2989 struct sequence_stack *tem;
2991 if (sequence_element_free_list)
2993 /* Reuse a previously-saved struct sequence_stack. */
2994 tem = sequence_element_free_list;
2995 sequence_element_free_list = tem->next;
2998 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3000 tem->next = sequence_stack;
3001 tem->first = first_insn;
3002 tem->last = last_insn;
3003 tem->sequence_rtl_expr = sequence_rtl_expr;
3005 sequence_stack = tem;
3011 /* Similarly, but indicate that this sequence will be placed in
3015 start_sequence_for_rtl_expr (t)
3020 sequence_rtl_expr = t;
3023 /* Set up the insn chain starting with FIRST
3024 as the current sequence, saving the previously current one. */
3027 push_to_sequence (first)
3034 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3040 /* Set up the outer-level insn chain
3041 as the current sequence, saving the previously current one. */
3044 push_topmost_sequence ()
3046 struct sequence_stack *stack, *top;
3050 for (stack = sequence_stack; stack; stack = stack->next)
3053 first_insn = top->first;
3054 last_insn = top->last;
3055 sequence_rtl_expr = top->sequence_rtl_expr;
3058 /* After emitting to the outer-level insn chain, update the outer-level
3059 insn chain, and restore the previous saved state. */
3062 pop_topmost_sequence ()
3064 struct sequence_stack *stack, *top;
3066 for (stack = sequence_stack; stack; stack = stack->next)
3069 top->first = first_insn;
3070 top->last = last_insn;
3071 /* ??? Why don't we save sequence_rtl_expr here? */
3076 /* After emitting to a sequence, restore previous saved state.
3078 To get the contents of the sequence just made,
3079 you must call `gen_sequence' *before* calling here. */
3084 struct sequence_stack *tem = sequence_stack;
3086 first_insn = tem->first;
3087 last_insn = tem->last;
3088 sequence_rtl_expr = tem->sequence_rtl_expr;
3089 sequence_stack = tem->next;
3091 tem->next = sequence_element_free_list;
3092 sequence_element_free_list = tem;
3095 /* Return 1 if currently emitting into a sequence. */
3100 return sequence_stack != 0;
3103 /* Generate a SEQUENCE rtx containing the insns already emitted
3104 to the current sequence.
3106 This is how the gen_... function from a DEFINE_EXPAND
3107 constructs the SEQUENCE that it returns. */
3117 /* Count the insns in the chain. */
3119 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3122 /* If only one insn, return its pattern rather than a SEQUENCE.
3123 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3124 the case of an empty list.) */
3126 && (GET_CODE (first_insn) == INSN
3127 || GET_CODE (first_insn) == JUMP_INSN
3128 /* Don't discard the call usage field. */
3129 || (GET_CODE (first_insn) == CALL_INSN
3130 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3132 NEXT_INSN (first_insn) = free_insn;
3133 free_insn = first_insn;
3134 return PATTERN (first_insn);
3137 /* Put them in a vector. See if we already have a SEQUENCE of the
3138 appropriate length around. */
3139 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3140 sequence_result[len] = 0;
3143 /* Ensure that this rtl goes in saveable_obstack, since we may
3145 push_obstacks_nochange ();
3146 rtl_in_saveable_obstack ();
3147 result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len));
3151 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3152 XVECEXP (result, 0, i) = tem;
3157 /* Initialize data structures and variables in this file
3158 before generating rtl for each function. */
3167 sequence_rtl_expr = NULL;
3169 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3172 first_label_num = label_num;
3174 sequence_stack = NULL;
3176 /* Clear the start_sequence/gen_sequence cache. */
3177 sequence_element_free_list = 0;
3178 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3179 sequence_result[i] = 0;
3182 /* Init the tables that describe all the pseudo regs. */
3184 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3187 = (char *) savealloc (regno_pointer_flag_length);
3188 bzero (regno_pointer_flag, regno_pointer_flag_length);
3191 = (char *) savealloc (regno_pointer_flag_length);
3192 bzero (regno_pointer_align, regno_pointer_flag_length);
3195 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3196 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3198 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3199 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3200 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3201 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3202 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3204 /* Indicate that the virtual registers and stack locations are
3206 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3207 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3208 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3209 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3211 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3212 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3213 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3214 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3216 #ifdef STACK_BOUNDARY
3217 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3218 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3219 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3220 = STACK_BOUNDARY / BITS_PER_UNIT;
3221 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3223 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3224 = STACK_BOUNDARY / BITS_PER_UNIT;
3225 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3226 = STACK_BOUNDARY / BITS_PER_UNIT;
3227 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3228 = STACK_BOUNDARY / BITS_PER_UNIT;
3229 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3230 = STACK_BOUNDARY / BITS_PER_UNIT;
3233 #ifdef INIT_EXPANDERS
3238 /* Create some permanent unique rtl objects shared between all functions.
3239 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3242 init_emit_once (line_numbers)
3246 enum machine_mode mode;
3248 no_line_numbers = ! line_numbers;
3250 sequence_stack = NULL;
3252 /* Compute the word and byte modes. */
3254 byte_mode = VOIDmode;
3255 word_mode = VOIDmode;
3257 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3258 mode = GET_MODE_WIDER_MODE (mode))
3260 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3261 && byte_mode == VOIDmode)
3264 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3265 && word_mode == VOIDmode)
3269 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3271 /* Create the unique rtx's for certain rtx codes and operand values. */
3273 pc_rtx = gen_rtx (PC, VOIDmode);
3274 cc0_rtx = gen_rtx (CC0, VOIDmode);
3276 /* Don't use gen_rtx here since gen_rtx in this case
3277 tries to use these variables. */
3278 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3280 const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT);
3281 PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3282 INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3285 /* These four calls obtain some of the rtx expressions made above. */
3286 const0_rtx = GEN_INT (0);
3287 const1_rtx = GEN_INT (1);
3288 const2_rtx = GEN_INT (2);
3289 constm1_rtx = GEN_INT (-1);
3291 /* This will usually be one of the above constants, but may be a new rtx. */
3292 const_true_rtx = GEN_INT (STORE_FLAG_VALUE);
3294 dconst0 = REAL_VALUE_ATOF ("0", DFmode);
3295 dconst1 = REAL_VALUE_ATOF ("1", DFmode);
3296 dconst2 = REAL_VALUE_ATOF ("2", DFmode);
3297 dconstm1 = REAL_VALUE_ATOF ("-1", DFmode);
3299 for (i = 0; i <= 2; i++)
3301 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3302 mode = GET_MODE_WIDER_MODE (mode))
3304 rtx tem = rtx_alloc (CONST_DOUBLE);
3305 union real_extract u;
3307 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3308 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3310 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3311 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3312 PUT_MODE (tem, mode);
3314 const_tiny_rtx[i][(int) mode] = tem;
3317 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3319 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3320 mode = GET_MODE_WIDER_MODE (mode))
3321 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3323 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3325 mode = GET_MODE_WIDER_MODE (mode))
3326 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3329 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3330 mode = GET_MODE_WIDER_MODE (mode))
3331 const_tiny_rtx[0][(int) mode] = const0_rtx;
3333 stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM);
3334 frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM);
3336 if (HARD_FRAME_POINTER_REGNUM == FRAME_POINTER_REGNUM)
3337 hard_frame_pointer_rtx = frame_pointer_rtx;
3339 hard_frame_pointer_rtx = gen_rtx (REG, Pmode, HARD_FRAME_POINTER_REGNUM);
3341 if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3342 arg_pointer_rtx = frame_pointer_rtx;
3343 else if (HARD_FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM)
3344 arg_pointer_rtx = hard_frame_pointer_rtx;
3345 else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM)
3346 arg_pointer_rtx = stack_pointer_rtx;
3348 arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM);
3350 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3351 return_address_pointer_rtx = gen_rtx (REG, Pmode,
3352 RETURN_ADDRESS_POINTER_REGNUM);
3355 /* Create the virtual registers. Do so here since the following objects
3356 might reference them. */
3358 virtual_incoming_args_rtx = gen_rtx (REG, Pmode,
3359 VIRTUAL_INCOMING_ARGS_REGNUM);
3360 virtual_stack_vars_rtx = gen_rtx (REG, Pmode,
3361 VIRTUAL_STACK_VARS_REGNUM);
3362 virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode,
3363 VIRTUAL_STACK_DYNAMIC_REGNUM);
3364 virtual_outgoing_args_rtx = gen_rtx (REG, Pmode,
3365 VIRTUAL_OUTGOING_ARGS_REGNUM);
3368 struct_value_rtx = STRUCT_VALUE;
3370 struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM);
3373 #ifdef STRUCT_VALUE_INCOMING
3374 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3376 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3377 struct_value_incoming_rtx
3378 = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3380 struct_value_incoming_rtx = struct_value_rtx;
3384 #ifdef STATIC_CHAIN_REGNUM
3385 static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM);
3387 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3388 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3389 static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3392 static_chain_incoming_rtx = static_chain_rtx;
3396 static_chain_rtx = STATIC_CHAIN;
3398 #ifdef STATIC_CHAIN_INCOMING
3399 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3401 static_chain_incoming_rtx = static_chain_rtx;
3405 #ifdef PIC_OFFSET_TABLE_REGNUM
3406 pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM);