1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
46 #include "hard-reg-set.h"
47 #include "insn-config.h"
53 /* Commonly used modes. */
55 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
56 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
57 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
58 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
60 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
61 After rtl generation, it is 1 plus the largest register number used. */
63 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
65 /* This is *not* reset after each function. It gives each CODE_LABEL
66 in the entire compilation a unique label number. */
68 static int label_num = 1;
70 /* Lowest label number in current function. */
72 static int first_label_num;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these except perhaps the floating-point CONST_DOUBLEs
92 are unique; no other rtx-object will be equal to any of these. */
94 /* Avoid warnings by initializing the `fld' field. Since its a union,
95 bypass problems with KNR compilers by only doing so when __GNUC__. */
102 struct _global_rtl global_rtl =
104 {PC, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* pc_rtx */
105 {CC0, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* cc0_rtx */
106 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* stack_pointer_rtx */
107 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* frame_pointer_rtx */
108 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* hard_frame_pointer_rtx */
109 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* arg_pointer_rtx */
110 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_incoming_args_rtx */
111 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_vars_rtx */
112 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_dynamic_rtx */
113 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_outgoing_args_rtx */
114 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_cfa_rtx */
117 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
118 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
119 record a copy of const[012]_rtx. */
121 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
125 REAL_VALUE_TYPE dconst0;
126 REAL_VALUE_TYPE dconst1;
127 REAL_VALUE_TYPE dconst2;
128 REAL_VALUE_TYPE dconstm1;
130 /* All references to the following fixed hard registers go through
131 these unique rtl objects. On machines where the frame-pointer and
132 arg-pointer are the same register, they use the same unique object.
134 After register allocation, other rtl objects which used to be pseudo-regs
135 may be clobbered to refer to the frame-pointer register.
136 But references that were originally to the frame-pointer can be
137 distinguished from the others because they contain frame_pointer_rtx.
139 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
140 tricky: until register elimination has taken place hard_frame_pointer_rtx
141 should be used if it is being set, and frame_pointer_rtx otherwise. After
142 register elimination hard_frame_pointer_rtx should always be used.
143 On machines where the two registers are same (most) then these are the
146 In an inline procedure, the stack and frame pointer rtxs may not be
147 used for anything else. */
148 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
149 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
150 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
151 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
152 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
154 /* This is used to implement __builtin_return_address for some machines.
155 See for instance the MIPS port. */
156 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
158 /* We make one copy of (const_int C) where C is in
159 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
160 to save space during the compilation and simplify comparisons of
163 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
165 /* The ends of the doubly-linked chain of rtl for the current function.
166 Both are reset to null at the start of rtl generation for the function.
168 start_sequence saves both of these on `sequence_stack' along with
169 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
171 static rtx first_insn = NULL;
172 static rtx last_insn = NULL;
174 /* RTL_EXPR within which the current sequence will be placed. Use to
175 prevent reuse of any temporaries within the sequence until after the
176 RTL_EXPR is emitted. */
178 tree sequence_rtl_expr = NULL;
180 /* INSN_UID for next insn emitted.
181 Reset to 1 for each function compiled. */
183 static int cur_insn_uid = 1;
185 /* Line number and source file of the last line-number NOTE emitted.
186 This is used to avoid generating duplicates. */
188 static int last_linenum = 0;
189 static char *last_filename = 0;
191 /* A vector indexed by pseudo reg number. The allocated length
192 of this vector is regno_pointer_flag_length. Since this
193 vector is needed during the expansion phase when the total
194 number of registers in the function is not yet known,
195 it is copied and made bigger when necessary. */
197 char *regno_pointer_flag;
198 int regno_pointer_flag_length;
200 /* Indexed by pseudo register number, if nonzero gives the known alignment
201 for that pseudo (if regno_pointer_flag is set).
202 Allocated in parallel with regno_pointer_flag. */
203 char *regno_pointer_align;
205 /* Indexed by pseudo register number, gives the rtx for that pseudo.
206 Allocated in parallel with regno_pointer_flag. */
210 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
211 Each element describes one pending sequence.
212 The main insn-chain is saved in the last element of the chain,
213 unless the chain is empty. */
215 struct sequence_stack *sequence_stack;
217 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
218 shortly thrown away. We use two mechanisms to prevent this waste:
220 First, we keep a list of the expressions used to represent the sequence
221 stack in sequence_element_free_list.
223 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
224 rtvec for use by gen_sequence. One entry for each size is sufficient
225 because most cases are calls to gen_sequence followed by immediately
226 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
227 destructive on the insn in it anyway and hence can't be redone.
229 We do not bother to save this cached data over nested function calls.
230 Instead, we just reinitialize them. */
232 #define SEQUENCE_RESULT_SIZE 5
234 static struct sequence_stack *sequence_element_free_list;
235 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
237 /* During RTL generation, we also keep a list of free INSN rtl codes. */
238 static rtx free_insn;
240 extern int rtx_equal_function_value_matters;
242 /* Filename and line number of last line-number note,
243 whether we actually emitted it or not. */
244 extern char *emit_filename;
245 extern int emit_lineno;
247 static rtx make_jump_insn_raw PROTO((rtx));
248 static rtx make_call_insn_raw PROTO((rtx));
249 static rtx find_line_note PROTO((rtx));
252 gen_rtx_CONST_INT (mode, arg)
253 enum machine_mode mode;
256 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
257 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
259 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
260 if (const_true_rtx && arg == STORE_FLAG_VALUE)
261 return const_true_rtx;
264 return gen_rtx_raw_CONST_INT (mode, arg);
267 /* CONST_DOUBLEs needs special handling because its length is known
270 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
271 enum machine_mode mode;
273 HOST_WIDE_INT arg1, arg2;
275 rtx r = rtx_alloc (CONST_DOUBLE);
280 XEXP (r, 1) = NULL_RTX;
284 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
291 gen_rtx_REG (mode, regno)
292 enum machine_mode mode;
295 /* In case the MD file explicitly references the frame pointer, have
296 all such references point to the same frame pointer. This is
297 used during frame pointer elimination to distinguish the explicit
298 references to these registers from pseudos that happened to be
301 If we have eliminated the frame pointer or arg pointer, we will
302 be using it as a normal register, for example as a spill
303 register. In such cases, we might be accessing it in a mode that
304 is not Pmode and therefore cannot use the pre-allocated rtx.
306 Also don't do this when we are making new REGs in reload, since
307 we don't want to get confused with the real pointers. */
309 if (mode == Pmode && !reload_in_progress)
311 if (regno == FRAME_POINTER_REGNUM)
312 return frame_pointer_rtx;
313 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
314 if (regno == HARD_FRAME_POINTER_REGNUM)
315 return hard_frame_pointer_rtx;
317 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
318 if (regno == ARG_POINTER_REGNUM)
319 return arg_pointer_rtx;
321 #ifdef RETURN_ADDRESS_POINTER_REGNUM
322 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
323 return return_address_pointer_rtx;
325 if (regno == STACK_POINTER_REGNUM)
326 return stack_pointer_rtx;
329 return gen_rtx_raw_REG (mode, regno);
333 gen_rtx_MEM (mode, addr)
334 enum machine_mode mode;
337 rtx rt = gen_rtx_raw_MEM (mode, addr);
339 /* This field is not cleared by the mere allocation of the rtx, so
341 MEM_ALIAS_SET (rt) = 0;
346 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
348 ** This routine generates an RTX of the size specified by
349 ** <code>, which is an RTX code. The RTX structure is initialized
350 ** from the arguments <element1> through <elementn>, which are
351 ** interpreted according to the specific RTX type's format. The
352 ** special machine mode associated with the rtx (if any) is specified
355 ** gen_rtx can be invoked in a way which resembles the lisp-like
356 ** rtx it will generate. For example, the following rtx structure:
358 ** (plus:QI (mem:QI (reg:SI 1))
359 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
361 ** ...would be generated by the following C code:
363 ** gen_rtx (PLUS, QImode,
364 ** gen_rtx (MEM, QImode,
365 ** gen_rtx (REG, SImode, 1)),
366 ** gen_rtx (MEM, QImode,
367 ** gen_rtx (PLUS, SImode,
368 ** gen_rtx (REG, SImode, 2),
369 ** gen_rtx (REG, SImode, 3)))),
374 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
376 #ifndef ANSI_PROTOTYPES
378 enum machine_mode mode;
381 register int i; /* Array indices... */
382 register char *fmt; /* Current rtx's format... */
383 register rtx rt_val; /* RTX to return to caller... */
387 #ifndef ANSI_PROTOTYPES
388 code = va_arg (p, enum rtx_code);
389 mode = va_arg (p, enum machine_mode);
395 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
400 rtx arg0 = va_arg (p, rtx);
401 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
402 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
403 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
408 rt_val = gen_rtx_REG (mode, va_arg (p, int));
412 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
416 rt_val = rtx_alloc (code); /* Allocate the storage space. */
417 rt_val->mode = mode; /* Store the machine mode... */
419 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
420 for (i = 0; i < GET_RTX_LENGTH (code); i++)
424 case '0': /* Unused field. */
427 case 'i': /* An integer? */
428 XINT (rt_val, i) = va_arg (p, int);
431 case 'w': /* A wide integer? */
432 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
435 case 's': /* A string? */
436 XSTR (rt_val, i) = va_arg (p, char *);
439 case 'e': /* An expression? */
440 case 'u': /* An insn? Same except when printing. */
441 XEXP (rt_val, i) = va_arg (p, rtx);
444 case 'E': /* An RTX vector? */
445 XVEC (rt_val, i) = va_arg (p, rtvec);
448 case 'b': /* A bitmap? */
449 XBITMAP (rt_val, i) = va_arg (p, bitmap);
452 case 't': /* A tree? */
453 XTREE (rt_val, i) = va_arg (p, tree);
467 /* gen_rtvec (n, [rt1, ..., rtn])
469 ** This routine creates an rtvec and stores within it the
470 ** pointers to rtx's which are its arguments.
475 gen_rtvec VPROTO((int n, ...))
477 #ifndef ANSI_PROTOTYPES
486 #ifndef ANSI_PROTOTYPES
491 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
493 vector = (rtx *) alloca (n * sizeof (rtx));
495 for (i = 0; i < n; i++)
496 vector[i] = va_arg (p, rtx);
499 return gen_rtvec_v (n, vector);
503 gen_rtvec_v (n, argp)
508 register rtvec rt_val;
511 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
513 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
515 for (i = 0; i < n; i++)
516 rt_val->elem[i].rtx = *argp++;
522 gen_rtvec_vv (n, argp)
527 register rtvec rt_val;
530 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
532 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
534 for (i = 0; i < n; i++)
535 rt_val->elem[i].rtx = (argp++)->rtx;
540 /* Generate a REG rtx for a new pseudo register of mode MODE.
541 This pseudo is assigned the next sequential register number. */
545 enum machine_mode mode;
549 /* Don't let anything called after initial flow analysis create new
554 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
555 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
557 /* For complex modes, don't make a single pseudo.
558 Instead, make a CONCAT of two pseudos.
559 This allows noncontiguous allocation of the real and imaginary parts,
560 which makes much better code. Besides, allocating DCmode
561 pseudos overstrains reload on some machines like the 386. */
562 rtx realpart, imagpart;
563 int size = GET_MODE_UNIT_SIZE (mode);
564 enum machine_mode partmode
565 = mode_for_size (size * BITS_PER_UNIT,
566 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
567 ? MODE_FLOAT : MODE_INT),
570 realpart = gen_reg_rtx (partmode);
571 imagpart = gen_reg_rtx (partmode);
572 return gen_rtx_CONCAT (mode, realpart, imagpart);
575 /* Make sure regno_pointer_flag and regno_reg_rtx are large
576 enough to have an element for this pseudo reg number. */
578 if (reg_rtx_no == regno_pointer_flag_length)
582 (char *) savealloc (regno_pointer_flag_length * 2);
583 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
584 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
585 regno_pointer_flag = new;
587 new = (char *) savealloc (regno_pointer_flag_length * 2);
588 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
589 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
590 regno_pointer_align = new;
592 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
593 bcopy ((char *) regno_reg_rtx, (char *) new1,
594 regno_pointer_flag_length * sizeof (rtx));
595 bzero ((char *) &new1[regno_pointer_flag_length],
596 regno_pointer_flag_length * sizeof (rtx));
597 regno_reg_rtx = new1;
599 regno_pointer_flag_length *= 2;
602 val = gen_rtx_raw_REG (mode, reg_rtx_no);
603 regno_reg_rtx[reg_rtx_no++] = val;
607 /* Identify REG (which may be a CONCAT) as a user register. */
613 if (GET_CODE (reg) == CONCAT)
615 REG_USERVAR_P (XEXP (reg, 0)) = 1;
616 REG_USERVAR_P (XEXP (reg, 1)) = 1;
618 else if (GET_CODE (reg) == REG)
619 REG_USERVAR_P (reg) = 1;
624 /* Identify REG as a probable pointer register and show its alignment
625 as ALIGN, if nonzero. */
628 mark_reg_pointer (reg, align)
632 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
635 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
638 /* Return 1 plus largest pseudo reg number used in the current function. */
646 /* Return 1 + the largest label number used so far in the current function. */
651 if (last_label_num && label_num == base_label_num)
652 return last_label_num;
656 /* Return first label number used in this function (if any were used). */
659 get_first_label_num ()
661 return first_label_num;
664 /* Return a value representing some low-order bits of X, where the number
665 of low-order bits is given by MODE. Note that no conversion is done
666 between floating-point and fixed-point values, rather, the bit
667 representation is returned.
669 This function handles the cases in common between gen_lowpart, below,
670 and two variants in cse.c and combine.c. These are the cases that can
671 be safely handled at all points in the compilation.
673 If this is not a case we can handle, return 0. */
676 gen_lowpart_common (mode, x)
677 enum machine_mode mode;
682 if (GET_MODE (x) == mode)
685 /* MODE must occupy no more words than the mode of X. */
686 if (GET_MODE (x) != VOIDmode
687 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
688 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
692 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
693 word = ((GET_MODE_SIZE (GET_MODE (x))
694 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
697 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
698 && (GET_MODE_CLASS (mode) == MODE_INT
699 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
701 /* If we are getting the low-order part of something that has been
702 sign- or zero-extended, we can either just use the object being
703 extended or make a narrower extension. If we want an even smaller
704 piece than the size of the object being extended, call ourselves
707 This case is used mostly by combine and cse. */
709 if (GET_MODE (XEXP (x, 0)) == mode)
711 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
712 return gen_lowpart_common (mode, XEXP (x, 0));
713 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
714 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
716 else if (GET_CODE (x) == SUBREG
717 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
718 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
719 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
721 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
722 else if (GET_CODE (x) == REG)
724 /* Let the backend decide how many registers to skip. This is needed
725 in particular for Sparc64 where fp regs are smaller than a word. */
726 /* ??? Note that subregs are now ambiguous, in that those against
727 pseudos are sized by the Word Size, while those against hard
728 regs are sized by the underlying register size. Better would be
729 to always interpret the subreg offset parameter as bytes or bits. */
731 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
732 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
733 - HARD_REGNO_NREGS (REGNO (x), mode));
735 /* If the register is not valid for MODE, return 0. If we don't
736 do this, there is no way to fix up the resulting REG later.
737 But we do do this if the current REG is not valid for its
738 mode. This latter is a kludge, but is required due to the
739 way that parameters are passed on some machines, most
741 if (REGNO (x) < FIRST_PSEUDO_REGISTER
742 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
743 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
745 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
746 /* integrate.c can't handle parts of a return value register. */
747 && (! REG_FUNCTION_VALUE_P (x)
748 || ! rtx_equal_function_value_matters)
749 #ifdef CLASS_CANNOT_CHANGE_SIZE
750 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
751 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
752 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
753 && (TEST_HARD_REG_BIT
754 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
757 /* We want to keep the stack, frame, and arg pointers
759 && x != frame_pointer_rtx
760 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
761 && x != arg_pointer_rtx
763 && x != stack_pointer_rtx)
764 return gen_rtx_REG (mode, REGNO (x) + word);
766 return gen_rtx_SUBREG (mode, x, word);
768 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
769 from the low-order part of the constant. */
770 else if ((GET_MODE_CLASS (mode) == MODE_INT
771 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
772 && GET_MODE (x) == VOIDmode
773 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
775 /* If MODE is twice the host word size, X is already the desired
776 representation. Otherwise, if MODE is wider than a word, we can't
777 do this. If MODE is exactly a word, return just one CONST_INT.
778 If MODE is smaller than a word, clear the bits that don't belong
779 in our mode, unless they and our sign bit are all one. So we get
780 either a reasonable negative value or a reasonable unsigned value
783 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
785 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
787 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
788 return (GET_CODE (x) == CONST_INT ? x
789 : GEN_INT (CONST_DOUBLE_LOW (x)));
792 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
793 int width = GET_MODE_BITSIZE (mode);
794 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
795 : CONST_DOUBLE_LOW (x));
797 /* Sign extend to HOST_WIDE_INT. */
798 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
800 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
805 /* If X is an integral constant but we want it in floating-point, it
806 must be the case that we have a union of an integer and a floating-point
807 value. If the machine-parameters allow it, simulate that union here
808 and return the result. The two-word and single-word cases are
811 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
812 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
813 || flag_pretend_float)
814 && GET_MODE_CLASS (mode) == MODE_FLOAT
815 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
816 && GET_CODE (x) == CONST_INT
817 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
818 #ifdef REAL_ARITHMETIC
824 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
825 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
829 union {HOST_WIDE_INT i; float d; } u;
832 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
835 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
836 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
837 || flag_pretend_float)
838 && GET_MODE_CLASS (mode) == MODE_FLOAT
839 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
840 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
841 && GET_MODE (x) == VOIDmode
842 && (sizeof (double) * HOST_BITS_PER_CHAR
843 == 2 * HOST_BITS_PER_WIDE_INT))
844 #ifdef REAL_ARITHMETIC
848 HOST_WIDE_INT low, high;
850 if (GET_CODE (x) == CONST_INT)
851 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
853 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
855 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
857 if (WORDS_BIG_ENDIAN)
858 i[0] = high, i[1] = low;
860 i[0] = low, i[1] = high;
862 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
863 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
867 union {HOST_WIDE_INT i[2]; double d; } u;
868 HOST_WIDE_INT low, high;
870 if (GET_CODE (x) == CONST_INT)
871 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
873 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
875 #ifdef HOST_WORDS_BIG_ENDIAN
876 u.i[0] = high, u.i[1] = low;
878 u.i[0] = low, u.i[1] = high;
881 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
885 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
886 same as sizeof (double) or when sizeof (float) is larger than the
887 size of a word on the target machine. */
888 #ifdef REAL_ARITHMETIC
889 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
895 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
896 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
898 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
899 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
900 || flag_pretend_float)
901 && GET_MODE_CLASS (mode) == MODE_FLOAT
902 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
903 && GET_CODE (x) == CONST_INT
904 && (sizeof (double) * HOST_BITS_PER_CHAR
905 == HOST_BITS_PER_WIDE_INT))
911 r = REAL_VALUE_FROM_TARGET_DOUBLE (&i);
912 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
916 /* Similarly, if this is converting a floating-point value into a
917 single-word integer. Only do this is the host and target parameters are
920 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
921 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
922 || flag_pretend_float)
923 && (GET_MODE_CLASS (mode) == MODE_INT
924 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
925 && GET_CODE (x) == CONST_DOUBLE
926 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
927 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
928 return operand_subword (x, word, 0, GET_MODE (x));
930 /* Similarly, if this is converting a floating-point value into a
931 two-word integer, we can do this one word at a time and make an
932 integer. Only do this is the host and target parameters are
935 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
936 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
937 || flag_pretend_float)
938 && (GET_MODE_CLASS (mode) == MODE_INT
939 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
940 && GET_CODE (x) == CONST_DOUBLE
941 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
942 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
945 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
947 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
949 if (lowpart && GET_CODE (lowpart) == CONST_INT
950 && highpart && GET_CODE (highpart) == CONST_INT)
951 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
954 /* Otherwise, we can't do this. */
958 /* Return the real part (which has mode MODE) of a complex value X.
959 This always comes at the low address in memory. */
962 gen_realpart (mode, x)
963 enum machine_mode mode;
966 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
968 else if (WORDS_BIG_ENDIAN
969 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
971 && REGNO (x) < FIRST_PSEUDO_REGISTER)
972 fatal ("Unable to access real part of complex value in a hard register on this target");
973 else if (WORDS_BIG_ENDIAN)
974 return gen_highpart (mode, x);
976 return gen_lowpart (mode, x);
979 /* Return the imaginary part (which has mode MODE) of a complex value X.
980 This always comes at the high address in memory. */
983 gen_imagpart (mode, x)
984 enum machine_mode mode;
987 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
989 else if (WORDS_BIG_ENDIAN)
990 return gen_lowpart (mode, x);
991 else if (!WORDS_BIG_ENDIAN
992 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
994 && REGNO (x) < FIRST_PSEUDO_REGISTER)
995 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
997 return gen_highpart (mode, x);
1000 /* Return 1 iff X, assumed to be a SUBREG,
1001 refers to the real part of the complex value in its containing reg.
1002 Complex values are always stored with the real part in the first word,
1003 regardless of WORDS_BIG_ENDIAN. */
1006 subreg_realpart_p (x)
1009 if (GET_CODE (x) != SUBREG)
1012 return SUBREG_WORD (x) * UNITS_PER_WORD < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x)));
1015 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1016 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1017 least-significant part of X.
1018 MODE specifies how big a part of X to return;
1019 it usually should not be larger than a word.
1020 If X is a MEM whose address is a QUEUED, the value may be so also. */
1023 gen_lowpart (mode, x)
1024 enum machine_mode mode;
1027 rtx result = gen_lowpart_common (mode, x);
1031 else if (GET_CODE (x) == REG)
1033 /* Must be a hard reg that's not valid in MODE. */
1034 result = gen_lowpart_common (mode, copy_to_reg (x));
1039 else if (GET_CODE (x) == MEM)
1041 /* The only additional case we can do is MEM. */
1042 register int offset = 0;
1043 if (WORDS_BIG_ENDIAN)
1044 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1045 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1047 if (BYTES_BIG_ENDIAN)
1048 /* Adjust the address so that the address-after-the-data
1050 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1051 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
1053 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1055 else if (GET_CODE (x) == ADDRESSOF)
1056 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
1061 /* Like `gen_lowpart', but refer to the most significant part.
1062 This is used to access the imaginary part of a complex number. */
1065 gen_highpart (mode, x)
1066 enum machine_mode mode;
1069 /* This case loses if X is a subreg. To catch bugs early,
1070 complain if an invalid MODE is used even in other cases. */
1071 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1072 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1074 if (GET_CODE (x) == CONST_DOUBLE
1075 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1076 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1079 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1080 else if (GET_CODE (x) == CONST_INT)
1082 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1084 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1086 else if (GET_CODE (x) == MEM)
1088 register int offset = 0;
1089 if (! WORDS_BIG_ENDIAN)
1090 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1091 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1093 if (! BYTES_BIG_ENDIAN
1094 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1095 offset -= (GET_MODE_SIZE (mode)
1096 - MIN (UNITS_PER_WORD,
1097 GET_MODE_SIZE (GET_MODE (x))));
1099 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1101 else if (GET_CODE (x) == SUBREG)
1103 /* The only time this should occur is when we are looking at a
1104 multi-word item with a SUBREG whose mode is the same as that of the
1105 item. It isn't clear what we would do if it wasn't. */
1106 if (SUBREG_WORD (x) != 0)
1108 return gen_highpart (mode, SUBREG_REG (x));
1110 else if (GET_CODE (x) == REG)
1114 /* Let the backend decide how many registers to skip. This is needed
1115 in particular for sparc64 where fp regs are smaller than a word. */
1116 /* ??? Note that subregs are now ambiguous, in that those against
1117 pseudos are sized by the word size, while those against hard
1118 regs are sized by the underlying register size. Better would be
1119 to always interpret the subreg offset parameter as bytes or bits. */
1121 if (WORDS_BIG_ENDIAN)
1123 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1124 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1125 - HARD_REGNO_NREGS (REGNO (x), mode));
1127 word = ((GET_MODE_SIZE (GET_MODE (x))
1128 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1131 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1132 /* integrate.c can't handle parts of a return value register. */
1133 && (! REG_FUNCTION_VALUE_P (x)
1134 || ! rtx_equal_function_value_matters)
1135 /* We want to keep the stack, frame, and arg pointers special. */
1136 && x != frame_pointer_rtx
1137 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1138 && x != arg_pointer_rtx
1140 && x != stack_pointer_rtx)
1141 return gen_rtx_REG (mode, REGNO (x) + word);
1143 return gen_rtx_SUBREG (mode, x, word);
1149 /* Return 1 iff X, assumed to be a SUBREG,
1150 refers to the least significant part of its containing reg.
1151 If X is not a SUBREG, always return 1 (it is its own low part!). */
1154 subreg_lowpart_p (x)
1157 if (GET_CODE (x) != SUBREG)
1159 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1162 if (WORDS_BIG_ENDIAN
1163 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1164 return (SUBREG_WORD (x)
1165 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1166 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1169 return SUBREG_WORD (x) == 0;
1172 /* Return subword I of operand OP.
1173 The word number, I, is interpreted as the word number starting at the
1174 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1175 otherwise it is the high-order word.
1177 If we cannot extract the required word, we return zero. Otherwise, an
1178 rtx corresponding to the requested word will be returned.
1180 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1181 reload has completed, a valid address will always be returned. After
1182 reload, if a valid address cannot be returned, we return zero.
1184 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1185 it is the responsibility of the caller.
1187 MODE is the mode of OP in case it is a CONST_INT. */
1190 operand_subword (op, i, validate_address, mode)
1193 int validate_address;
1194 enum machine_mode mode;
1197 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1198 int bits_per_word = BITS_PER_WORD;
1200 if (mode == VOIDmode)
1201 mode = GET_MODE (op);
1203 if (mode == VOIDmode)
1206 /* If OP is narrower than a word, fail. */
1208 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1211 /* If we want a word outside OP, return zero. */
1213 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1216 /* If OP is already an integer word, return it. */
1217 if (GET_MODE_CLASS (mode) == MODE_INT
1218 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1221 /* If OP is a REG or SUBREG, we can handle it very simply. */
1222 if (GET_CODE (op) == REG)
1224 /* ??? There is a potential problem with this code. It does not
1225 properly handle extractions of a subword from a hard register
1226 that is larger than word_mode. Presumably the check for
1227 HARD_REGNO_MODE_OK catches these most of these cases. */
1229 /* If OP is a hard register, but OP + I is not a hard register,
1230 then extracting a subword is impossible.
1232 For example, consider if OP is the last hard register and it is
1233 larger than word_mode. If we wanted word N (for N > 0) because a
1234 part of that hard register was known to contain a useful value,
1235 then OP + I would refer to a pseudo, not the hard register we
1237 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1238 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1241 /* If the register is not valid for MODE, return 0. Note we
1242 have to check both OP and OP + I since they may refer to
1243 different parts of the register file.
1245 Consider if OP refers to the last 96bit FP register and we want
1246 subword 3 because that subword is known to contain a value we
1248 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1249 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1250 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1252 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1253 || (REG_FUNCTION_VALUE_P (op)
1254 && rtx_equal_function_value_matters)
1255 /* We want to keep the stack, frame, and arg pointers
1257 || op == frame_pointer_rtx
1258 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1259 || op == arg_pointer_rtx
1261 || op == stack_pointer_rtx)
1262 return gen_rtx_SUBREG (word_mode, op, i);
1264 return gen_rtx_REG (word_mode, REGNO (op) + i);
1266 else if (GET_CODE (op) == SUBREG)
1267 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1268 else if (GET_CODE (op) == CONCAT)
1270 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1272 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1273 return operand_subword (XEXP (op, 1), i - partwords,
1274 validate_address, mode);
1277 /* Form a new MEM at the requested address. */
1278 if (GET_CODE (op) == MEM)
1280 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1283 if (validate_address)
1285 if (reload_completed)
1287 if (! strict_memory_address_p (word_mode, addr))
1291 addr = memory_address (word_mode, addr);
1294 new = gen_rtx_MEM (word_mode, addr);
1296 MEM_COPY_ATTRIBUTES (new, op);
1297 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1298 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (op);
1303 /* The only remaining cases are when OP is a constant. If the host and
1304 target floating formats are the same, handling two-word floating
1305 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1306 are defined as returning one or two 32 bit values, respectively,
1307 and not values of BITS_PER_WORD bits. */
1308 #ifdef REAL_ARITHMETIC
1309 /* The output is some bits, the width of the target machine's word.
1310 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1312 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1313 && GET_MODE_CLASS (mode) == MODE_FLOAT
1314 && GET_MODE_BITSIZE (mode) == 64
1315 && GET_CODE (op) == CONST_DOUBLE)
1320 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1321 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1323 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1324 which the words are written depends on the word endianness.
1325 ??? This is a potential portability problem and should
1326 be fixed at some point.
1328 We must excercise caution with the sign bit. By definition there
1329 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1330 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1331 So we explicitly mask and sign-extend as necessary. */
1332 if (BITS_PER_WORD == 32)
1335 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1336 return GEN_INT (val);
1338 #if HOST_BITS_PER_WIDE_INT >= 64
1339 else if (BITS_PER_WORD >= 64 && i == 0)
1341 val = k[! WORDS_BIG_ENDIAN];
1342 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1343 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1344 return GEN_INT (val);
1347 else if (BITS_PER_WORD == 16)
1350 if ((i & 1) == !WORDS_BIG_ENDIAN)
1353 return GEN_INT (val);
1358 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1359 && GET_MODE_CLASS (mode) == MODE_FLOAT
1360 && GET_MODE_BITSIZE (mode) > 64
1361 && GET_CODE (op) == CONST_DOUBLE)
1366 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1367 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1369 if (BITS_PER_WORD == 32)
1372 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1373 return GEN_INT (val);
1378 #else /* no REAL_ARITHMETIC */
1379 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1380 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1381 || flag_pretend_float)
1382 && GET_MODE_CLASS (mode) == MODE_FLOAT
1383 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1384 && GET_CODE (op) == CONST_DOUBLE)
1386 /* The constant is stored in the host's word-ordering,
1387 but we want to access it in the target's word-ordering. Some
1388 compilers don't like a conditional inside macro args, so we have two
1389 copies of the return. */
1390 #ifdef HOST_WORDS_BIG_ENDIAN
1391 return GEN_INT (i == WORDS_BIG_ENDIAN
1392 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1394 return GEN_INT (i != WORDS_BIG_ENDIAN
1395 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1398 #endif /* no REAL_ARITHMETIC */
1400 /* Single word float is a little harder, since single- and double-word
1401 values often do not have the same high-order bits. We have already
1402 verified that we want the only defined word of the single-word value. */
1403 #ifdef REAL_ARITHMETIC
1404 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1405 && GET_MODE_BITSIZE (mode) == 32
1406 && GET_CODE (op) == CONST_DOUBLE)
1411 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1412 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1414 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1416 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1418 if (BITS_PER_WORD == 16)
1420 if ((i & 1) == !WORDS_BIG_ENDIAN)
1425 return GEN_INT (val);
1428 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1429 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1430 || flag_pretend_float)
1431 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1432 && GET_MODE_CLASS (mode) == MODE_FLOAT
1433 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1434 && GET_CODE (op) == CONST_DOUBLE)
1437 union {float f; HOST_WIDE_INT i; } u;
1439 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1442 return GEN_INT (u.i);
1444 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1445 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1446 || flag_pretend_float)
1447 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1448 && GET_MODE_CLASS (mode) == MODE_FLOAT
1449 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1450 && GET_CODE (op) == CONST_DOUBLE)
1453 union {double d; HOST_WIDE_INT i; } u;
1455 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1458 return GEN_INT (u.i);
1460 #endif /* no REAL_ARITHMETIC */
1462 /* The only remaining cases that we can handle are integers.
1463 Convert to proper endianness now since these cases need it.
1464 At this point, i == 0 means the low-order word.
1466 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1467 in general. However, if OP is (const_int 0), we can just return
1470 if (op == const0_rtx)
1473 if (GET_MODE_CLASS (mode) != MODE_INT
1474 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1475 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1478 if (WORDS_BIG_ENDIAN)
1479 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1481 /* Find out which word on the host machine this value is in and get
1482 it from the constant. */
1483 val = (i / size_ratio == 0
1484 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1485 : (GET_CODE (op) == CONST_INT
1486 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1488 /* Get the value we want into the low bits of val. */
1489 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1490 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1492 val = trunc_int_for_mode (val, word_mode);
1494 return GEN_INT (val);
1497 /* Similar to `operand_subword', but never return 0. If we can't extract
1498 the required subword, put OP into a register and try again. If that fails,
1499 abort. We always validate the address in this case. It is not valid
1500 to call this function after reload; it is mostly meant for RTL
1503 MODE is the mode of OP, in case it is CONST_INT. */
1506 operand_subword_force (op, i, mode)
1509 enum machine_mode mode;
1511 rtx result = operand_subword (op, i, 1, mode);
1516 if (mode != BLKmode && mode != VOIDmode)
1518 /* If this is a register which can not be accessed by words, copy it
1519 to a pseudo register. */
1520 if (GET_CODE (op) == REG)
1521 op = copy_to_reg (op);
1523 op = force_reg (mode, op);
1526 result = operand_subword (op, i, 1, mode);
1533 /* Given a compare instruction, swap the operands.
1534 A test instruction is changed into a compare of 0 against the operand. */
1537 reverse_comparison (insn)
1540 rtx body = PATTERN (insn);
1543 if (GET_CODE (body) == SET)
1544 comp = SET_SRC (body);
1546 comp = SET_SRC (XVECEXP (body, 0, 0));
1548 if (GET_CODE (comp) == COMPARE)
1550 rtx op0 = XEXP (comp, 0);
1551 rtx op1 = XEXP (comp, 1);
1552 XEXP (comp, 0) = op1;
1553 XEXP (comp, 1) = op0;
1557 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1558 if (GET_CODE (body) == SET)
1559 SET_SRC (body) = new;
1561 SET_SRC (XVECEXP (body, 0, 0)) = new;
1565 /* Return a memory reference like MEMREF, but with its mode changed
1566 to MODE and its address changed to ADDR.
1567 (VOIDmode means don't change the mode.
1568 NULL for ADDR means don't change the address.) */
1571 change_address (memref, mode, addr)
1573 enum machine_mode mode;
1578 if (GET_CODE (memref) != MEM)
1580 if (mode == VOIDmode)
1581 mode = GET_MODE (memref);
1583 addr = XEXP (memref, 0);
1585 /* If reload is in progress or has completed, ADDR must be valid.
1586 Otherwise, we can call memory_address to make it valid. */
1587 if (reload_completed || reload_in_progress)
1589 if (! memory_address_p (mode, addr))
1593 addr = memory_address (mode, addr);
1595 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1598 new = gen_rtx_MEM (mode, addr);
1599 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1600 MEM_COPY_ATTRIBUTES (new, memref);
1601 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (memref);
1605 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1612 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1613 NULL_RTX, label_num++, NULL_PTR);
1615 LABEL_NUSES (label) = 0;
1619 /* For procedure integration. */
1621 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1622 from a permanent obstack when the opportunity arises. */
1625 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1626 last_labelno, max_parm_regnum, max_regnum, args_size,
1627 pops_args, stack_slots, forced_labels, function_flags,
1628 outgoing_args_size, original_arg_vector,
1629 original_decl_initial, regno_rtx, regno_flag,
1630 regno_align, parm_reg_stack_loc)
1631 rtx first_insn, first_parm_insn;
1632 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1637 int outgoing_args_size;
1638 rtvec original_arg_vector;
1639 rtx original_decl_initial;
1643 rtvec parm_reg_stack_loc;
1645 rtx header = gen_rtx_INLINE_HEADER (VOIDmode,
1646 cur_insn_uid++, NULL_RTX,
1647 first_insn, first_parm_insn,
1648 first_labelno, last_labelno,
1649 max_parm_regnum, max_regnum, args_size,
1650 pops_args, stack_slots, forced_labels,
1651 function_flags, outgoing_args_size,
1652 original_arg_vector,
1653 original_decl_initial,
1654 regno_rtx, regno_flag, regno_align,
1655 parm_reg_stack_loc);
1659 /* Install new pointers to the first and last insns in the chain.
1660 Also, set cur_insn_uid to one higher than the last in use.
1661 Used for an inline-procedure after copying the insn chain. */
1664 set_new_first_and_last_insn (first, last)
1673 for (insn = first; insn; insn = NEXT_INSN (insn))
1674 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1679 /* Set the range of label numbers found in the current function.
1680 This is used when belatedly compiling an inline function. */
1683 set_new_first_and_last_label_num (first, last)
1686 base_label_num = label_num;
1687 first_label_num = first;
1688 last_label_num = last;
1691 /* Save all variables describing the current status into the structure *P.
1692 This is used before starting a nested function. */
1695 save_emit_status (p)
1698 p->reg_rtx_no = reg_rtx_no;
1699 p->first_label_num = first_label_num;
1700 p->first_insn = first_insn;
1701 p->last_insn = last_insn;
1702 p->sequence_rtl_expr = sequence_rtl_expr;
1703 p->sequence_stack = sequence_stack;
1704 p->cur_insn_uid = cur_insn_uid;
1705 p->last_linenum = last_linenum;
1706 p->last_filename = last_filename;
1707 p->regno_pointer_flag = regno_pointer_flag;
1708 p->regno_pointer_align = regno_pointer_align;
1709 p->regno_pointer_flag_length = regno_pointer_flag_length;
1710 p->regno_reg_rtx = regno_reg_rtx;
1713 /* Restore all variables describing the current status from the structure *P.
1714 This is used after a nested function. */
1717 restore_emit_status (p)
1722 reg_rtx_no = p->reg_rtx_no;
1723 first_label_num = p->first_label_num;
1725 first_insn = p->first_insn;
1726 last_insn = p->last_insn;
1727 sequence_rtl_expr = p->sequence_rtl_expr;
1728 sequence_stack = p->sequence_stack;
1729 cur_insn_uid = p->cur_insn_uid;
1730 last_linenum = p->last_linenum;
1731 last_filename = p->last_filename;
1732 regno_pointer_flag = p->regno_pointer_flag;
1733 regno_pointer_align = p->regno_pointer_align;
1734 regno_pointer_flag_length = p->regno_pointer_flag_length;
1735 regno_reg_rtx = p->regno_reg_rtx;
1737 /* Clear our cache of rtx expressions for start_sequence and
1739 sequence_element_free_list = 0;
1740 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1741 sequence_result[i] = 0;
1746 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1747 It does not work to do this twice, because the mark bits set here
1748 are not cleared afterwards. */
1751 unshare_all_rtl (insn)
1754 for (; insn; insn = NEXT_INSN (insn))
1755 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1756 || GET_CODE (insn) == CALL_INSN)
1758 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1759 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1760 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1763 /* Make sure the addresses of stack slots found outside the insn chain
1764 (such as, in DECL_RTL of a variable) are not shared
1765 with the insn chain.
1767 This special care is necessary when the stack slot MEM does not
1768 actually appear in the insn chain. If it does appear, its address
1769 is unshared from all else at that point. */
1771 copy_rtx_if_shared (stack_slot_list);
1774 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1775 Recursively does the same for subexpressions. */
1778 copy_rtx_if_shared (orig)
1781 register rtx x = orig;
1783 register enum rtx_code code;
1784 register char *format_ptr;
1790 code = GET_CODE (x);
1792 /* These types may be freely shared. */
1805 /* SCRATCH must be shared because they represent distinct values. */
1809 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1810 a LABEL_REF, it isn't sharable. */
1811 if (GET_CODE (XEXP (x, 0)) == PLUS
1812 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1813 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1822 /* The chain of insns is not being copied. */
1826 /* A MEM is allowed to be shared if its address is constant
1827 or is a constant plus one of the special registers. */
1828 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1829 || XEXP (x, 0) == virtual_stack_vars_rtx
1830 || XEXP (x, 0) == virtual_incoming_args_rtx)
1833 if (GET_CODE (XEXP (x, 0)) == PLUS
1834 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1835 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1836 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1838 /* This MEM can appear in more than one place,
1839 but its address better not be shared with anything else. */
1841 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1851 /* This rtx may not be shared. If it has already been seen,
1852 replace it with a copy of itself. */
1858 copy = rtx_alloc (code);
1859 bcopy ((char *) x, (char *) copy,
1860 (sizeof (*copy) - sizeof (copy->fld)
1861 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1867 /* Now scan the subexpressions recursively.
1868 We can store any replaced subexpressions directly into X
1869 since we know X is not shared! Any vectors in X
1870 must be copied if X was copied. */
1872 format_ptr = GET_RTX_FORMAT (code);
1874 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1876 switch (*format_ptr++)
1879 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1883 if (XVEC (x, i) != NULL)
1886 int len = XVECLEN (x, i);
1888 if (copied && len > 0)
1889 XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem);
1890 for (j = 0; j < len; j++)
1891 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1899 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1900 to look for shared sub-parts. */
1903 reset_used_flags (x)
1907 register enum rtx_code code;
1908 register char *format_ptr;
1913 code = GET_CODE (x);
1915 /* These types may be freely shared so we needn't do any resetting
1936 /* The chain of insns is not being copied. */
1945 format_ptr = GET_RTX_FORMAT (code);
1946 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1948 switch (*format_ptr++)
1951 reset_used_flags (XEXP (x, i));
1955 for (j = 0; j < XVECLEN (x, i); j++)
1956 reset_used_flags (XVECEXP (x, i, j));
1962 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1963 Return X or the rtx for the pseudo reg the value of X was copied into.
1964 OTHER must be valid as a SET_DEST. */
1967 make_safe_from (x, other)
1971 switch (GET_CODE (other))
1974 other = SUBREG_REG (other);
1976 case STRICT_LOW_PART:
1979 other = XEXP (other, 0);
1985 if ((GET_CODE (other) == MEM
1987 && GET_CODE (x) != REG
1988 && GET_CODE (x) != SUBREG)
1989 || (GET_CODE (other) == REG
1990 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1991 || reg_mentioned_p (other, x))))
1993 rtx temp = gen_reg_rtx (GET_MODE (x));
1994 emit_move_insn (temp, x);
2000 /* Emission of insns (adding them to the doubly-linked list). */
2002 /* Return the first insn of the current sequence or current function. */
2010 /* Return the last insn emitted in current sequence or current function. */
2018 /* Specify a new insn as the last in the chain. */
2021 set_last_insn (insn)
2024 if (NEXT_INSN (insn) != 0)
2029 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2032 get_last_insn_anywhere ()
2034 struct sequence_stack *stack;
2037 for (stack = sequence_stack; stack; stack = stack->next)
2038 if (stack->last != 0)
2043 /* Return a number larger than any instruction's uid in this function. */
2048 return cur_insn_uid;
2051 /* Return the next insn. If it is a SEQUENCE, return the first insn
2060 insn = NEXT_INSN (insn);
2061 if (insn && GET_CODE (insn) == INSN
2062 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2063 insn = XVECEXP (PATTERN (insn), 0, 0);
2069 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2073 previous_insn (insn)
2078 insn = PREV_INSN (insn);
2079 if (insn && GET_CODE (insn) == INSN
2080 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2081 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2087 /* Return the next insn after INSN that is not a NOTE. This routine does not
2088 look inside SEQUENCEs. */
2091 next_nonnote_insn (insn)
2096 insn = NEXT_INSN (insn);
2097 if (insn == 0 || GET_CODE (insn) != NOTE)
2104 /* Return the previous insn before INSN that is not a NOTE. This routine does
2105 not look inside SEQUENCEs. */
2108 prev_nonnote_insn (insn)
2113 insn = PREV_INSN (insn);
2114 if (insn == 0 || GET_CODE (insn) != NOTE)
2121 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2122 or 0, if there is none. This routine does not look inside
2126 next_real_insn (insn)
2131 insn = NEXT_INSN (insn);
2132 if (insn == 0 || GET_CODE (insn) == INSN
2133 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2140 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2141 or 0, if there is none. This routine does not look inside
2145 prev_real_insn (insn)
2150 insn = PREV_INSN (insn);
2151 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2152 || GET_CODE (insn) == JUMP_INSN)
2159 /* Find the next insn after INSN that really does something. This routine
2160 does not look inside SEQUENCEs. Until reload has completed, this is the
2161 same as next_real_insn. */
2164 next_active_insn (insn)
2169 insn = NEXT_INSN (insn);
2171 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2172 || (GET_CODE (insn) == INSN
2173 && (! reload_completed
2174 || (GET_CODE (PATTERN (insn)) != USE
2175 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2182 /* Find the last insn before INSN that really does something. This routine
2183 does not look inside SEQUENCEs. Until reload has completed, this is the
2184 same as prev_real_insn. */
2187 prev_active_insn (insn)
2192 insn = PREV_INSN (insn);
2194 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2195 || (GET_CODE (insn) == INSN
2196 && (! reload_completed
2197 || (GET_CODE (PATTERN (insn)) != USE
2198 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2205 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2213 insn = NEXT_INSN (insn);
2214 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2221 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2229 insn = PREV_INSN (insn);
2230 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2238 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2239 and REG_CC_USER notes so we can find it. */
2242 link_cc0_insns (insn)
2245 rtx user = next_nonnote_insn (insn);
2247 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2248 user = XVECEXP (PATTERN (user), 0, 0);
2250 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2251 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2254 /* Return the next insn that uses CC0 after INSN, which is assumed to
2255 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2256 applied to the result of this function should yield INSN).
2258 Normally, this is simply the next insn. However, if a REG_CC_USER note
2259 is present, it contains the insn that uses CC0.
2261 Return 0 if we can't find the insn. */
2264 next_cc0_user (insn)
2267 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2270 return XEXP (note, 0);
2272 insn = next_nonnote_insn (insn);
2273 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2274 insn = XVECEXP (PATTERN (insn), 0, 0);
2276 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2277 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2283 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2284 note, it is the previous insn. */
2287 prev_cc0_setter (insn)
2290 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2293 return XEXP (note, 0);
2295 insn = prev_nonnote_insn (insn);
2296 if (! sets_cc0_p (PATTERN (insn)))
2303 /* Try splitting insns that can be split for better scheduling.
2304 PAT is the pattern which might split.
2305 TRIAL is the insn providing PAT.
2306 LAST is non-zero if we should return the last insn of the sequence produced.
2308 If this routine succeeds in splitting, it returns the first or last
2309 replacement insn depending on the value of LAST. Otherwise, it
2310 returns TRIAL. If the insn to be returned can be split, it will be. */
2313 try_split (pat, trial, last)
2317 rtx before = PREV_INSN (trial);
2318 rtx after = NEXT_INSN (trial);
2319 rtx seq = split_insns (pat, trial);
2320 int has_barrier = 0;
2323 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2324 We may need to handle this specially. */
2325 if (after && GET_CODE (after) == BARRIER)
2328 after = NEXT_INSN (after);
2333 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2334 The latter case will normally arise only when being done so that
2335 it, in turn, will be split (SFmode on the 29k is an example). */
2336 if (GET_CODE (seq) == SEQUENCE)
2338 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2339 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2340 increment the usage count so we don't delete the label. */
2343 if (GET_CODE (trial) == JUMP_INSN)
2344 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2345 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2347 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2349 if (JUMP_LABEL (trial))
2350 LABEL_NUSES (JUMP_LABEL (trial))++;
2353 tem = emit_insn_after (seq, before);
2355 delete_insn (trial);
2357 emit_barrier_after (tem);
2359 /* Recursively call try_split for each new insn created; by the
2360 time control returns here that insn will be fully split, so
2361 set LAST and continue from the insn after the one returned.
2362 We can't use next_active_insn here since AFTER may be a note.
2363 Ignore deleted insns, which can be occur if not optimizing. */
2364 for (tem = NEXT_INSN (before); tem != after;
2365 tem = NEXT_INSN (tem))
2366 if (! INSN_DELETED_P (tem)
2367 && GET_RTX_CLASS (GET_CODE (tem)) == 'i')
2368 tem = try_split (PATTERN (tem), tem, 1);
2370 /* Avoid infinite loop if the result matches the original pattern. */
2371 else if (rtx_equal_p (seq, pat))
2375 PATTERN (trial) = seq;
2376 INSN_CODE (trial) = -1;
2377 try_split (seq, trial, last);
2380 /* Return either the first or the last insn, depending on which was
2382 return last ? prev_active_insn (after) : next_active_insn (before);
2388 /* Make and return an INSN rtx, initializing all its slots.
2389 Store PATTERN in the pattern slots. */
2392 make_insn_raw (pattern)
2397 /* If in RTL generation phase, see if FREE_INSN can be used. */
2398 if (free_insn != 0 && rtx_equal_function_value_matters)
2401 free_insn = NEXT_INSN (free_insn);
2402 PUT_CODE (insn, INSN);
2405 insn = rtx_alloc (INSN);
2407 INSN_UID (insn) = cur_insn_uid++;
2408 PATTERN (insn) = pattern;
2409 INSN_CODE (insn) = -1;
2410 LOG_LINKS (insn) = NULL;
2411 REG_NOTES (insn) = NULL;
2416 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2419 make_jump_insn_raw (pattern)
2424 insn = rtx_alloc (JUMP_INSN);
2425 INSN_UID (insn) = cur_insn_uid++;
2427 PATTERN (insn) = pattern;
2428 INSN_CODE (insn) = -1;
2429 LOG_LINKS (insn) = NULL;
2430 REG_NOTES (insn) = NULL;
2431 JUMP_LABEL (insn) = NULL;
2436 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2439 make_call_insn_raw (pattern)
2444 insn = rtx_alloc (CALL_INSN);
2445 INSN_UID (insn) = cur_insn_uid++;
2447 PATTERN (insn) = pattern;
2448 INSN_CODE (insn) = -1;
2449 LOG_LINKS (insn) = NULL;
2450 REG_NOTES (insn) = NULL;
2451 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2456 /* Add INSN to the end of the doubly-linked list.
2457 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2463 PREV_INSN (insn) = last_insn;
2464 NEXT_INSN (insn) = 0;
2466 if (NULL != last_insn)
2467 NEXT_INSN (last_insn) = insn;
2469 if (NULL == first_insn)
2475 /* Add INSN into the doubly-linked list after insn AFTER. This and
2476 the next should be the only functions called to insert an insn once
2477 delay slots have been filled since only they know how to update a
2481 add_insn_after (insn, after)
2484 rtx next = NEXT_INSN (after);
2486 if (optimize && INSN_DELETED_P (after))
2489 NEXT_INSN (insn) = next;
2490 PREV_INSN (insn) = after;
2494 PREV_INSN (next) = insn;
2495 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2496 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2498 else if (last_insn == after)
2502 struct sequence_stack *stack = sequence_stack;
2503 /* Scan all pending sequences too. */
2504 for (; stack; stack = stack->next)
2505 if (after == stack->last)
2515 NEXT_INSN (after) = insn;
2516 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2518 rtx sequence = PATTERN (after);
2519 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2523 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2524 the previous should be the only functions called to insert an insn once
2525 delay slots have been filled since only they know how to update a
2529 add_insn_before (insn, before)
2532 rtx prev = PREV_INSN (before);
2534 if (optimize && INSN_DELETED_P (before))
2537 PREV_INSN (insn) = prev;
2538 NEXT_INSN (insn) = before;
2542 NEXT_INSN (prev) = insn;
2543 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2545 rtx sequence = PATTERN (prev);
2546 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2549 else if (first_insn == before)
2553 struct sequence_stack *stack = sequence_stack;
2554 /* Scan all pending sequences too. */
2555 for (; stack; stack = stack->next)
2556 if (before == stack->first)
2558 stack->first = insn;
2566 PREV_INSN (before) = insn;
2567 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2568 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2571 /* Remove an insn from its doubly-linked list. This function knows how
2572 to handle sequences. */
2577 rtx next = NEXT_INSN (insn);
2578 rtx prev = PREV_INSN (insn);
2581 NEXT_INSN (prev) = next;
2582 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2584 rtx sequence = PATTERN (prev);
2585 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2588 else if (first_insn == insn)
2592 struct sequence_stack *stack = sequence_stack;
2593 /* Scan all pending sequences too. */
2594 for (; stack; stack = stack->next)
2595 if (insn == stack->first)
2597 stack->first = next;
2607 PREV_INSN (next) = prev;
2608 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2609 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2611 else if (last_insn == insn)
2615 struct sequence_stack *stack = sequence_stack;
2616 /* Scan all pending sequences too. */
2617 for (; stack; stack = stack->next)
2618 if (insn == stack->last)
2629 /* Delete all insns made since FROM.
2630 FROM becomes the new last instruction. */
2633 delete_insns_since (from)
2639 NEXT_INSN (from) = 0;
2643 /* This function is deprecated, please use sequences instead.
2645 Move a consecutive bunch of insns to a different place in the chain.
2646 The insns to be moved are those between FROM and TO.
2647 They are moved to a new position after the insn AFTER.
2648 AFTER must not be FROM or TO or any insn in between.
2650 This function does not know about SEQUENCEs and hence should not be
2651 called after delay-slot filling has been done. */
2654 reorder_insns (from, to, after)
2655 rtx from, to, after;
2657 /* Splice this bunch out of where it is now. */
2658 if (PREV_INSN (from))
2659 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2661 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2662 if (last_insn == to)
2663 last_insn = PREV_INSN (from);
2664 if (first_insn == from)
2665 first_insn = NEXT_INSN (to);
2667 /* Make the new neighbors point to it and it to them. */
2668 if (NEXT_INSN (after))
2669 PREV_INSN (NEXT_INSN (after)) = to;
2671 NEXT_INSN (to) = NEXT_INSN (after);
2672 PREV_INSN (from) = after;
2673 NEXT_INSN (after) = from;
2674 if (after == last_insn)
2678 /* Return the line note insn preceding INSN. */
2681 find_line_note (insn)
2684 if (no_line_numbers)
2687 for (; insn; insn = PREV_INSN (insn))
2688 if (GET_CODE (insn) == NOTE
2689 && NOTE_LINE_NUMBER (insn) >= 0)
2695 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2696 of the moved insns when debugging. This may insert a note between AFTER
2697 and FROM, and another one after TO. */
2700 reorder_insns_with_line_notes (from, to, after)
2701 rtx from, to, after;
2703 rtx from_line = find_line_note (from);
2704 rtx after_line = find_line_note (after);
2706 reorder_insns (from, to, after);
2708 if (from_line == after_line)
2712 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2713 NOTE_LINE_NUMBER (from_line),
2716 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2717 NOTE_LINE_NUMBER (after_line),
2721 /* Emit an insn of given code and pattern
2722 at a specified place within the doubly-linked list. */
2724 /* Make an instruction with body PATTERN
2725 and output it before the instruction BEFORE. */
2728 emit_insn_before (pattern, before)
2729 register rtx pattern, before;
2731 register rtx insn = before;
2733 if (GET_CODE (pattern) == SEQUENCE)
2737 for (i = 0; i < XVECLEN (pattern, 0); i++)
2739 insn = XVECEXP (pattern, 0, i);
2740 add_insn_before (insn, before);
2742 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2743 sequence_result[XVECLEN (pattern, 0)] = pattern;
2747 insn = make_insn_raw (pattern);
2748 add_insn_before (insn, before);
2754 /* Make an instruction with body PATTERN and code JUMP_INSN
2755 and output it before the instruction BEFORE. */
2758 emit_jump_insn_before (pattern, before)
2759 register rtx pattern, before;
2763 if (GET_CODE (pattern) == SEQUENCE)
2764 insn = emit_insn_before (pattern, before);
2767 insn = make_jump_insn_raw (pattern);
2768 add_insn_before (insn, before);
2774 /* Make an instruction with body PATTERN and code CALL_INSN
2775 and output it before the instruction BEFORE. */
2778 emit_call_insn_before (pattern, before)
2779 register rtx pattern, before;
2783 if (GET_CODE (pattern) == SEQUENCE)
2784 insn = emit_insn_before (pattern, before);
2787 insn = make_call_insn_raw (pattern);
2788 add_insn_before (insn, before);
2789 PUT_CODE (insn, CALL_INSN);
2795 /* Make an insn of code BARRIER
2796 and output it before the insn BEFORE. */
2799 emit_barrier_before (before)
2800 register rtx before;
2802 register rtx insn = rtx_alloc (BARRIER);
2804 INSN_UID (insn) = cur_insn_uid++;
2806 add_insn_before (insn, before);
2810 /* Emit the label LABEL before the insn BEFORE. */
2813 emit_label_before (label, before)
2816 /* This can be called twice for the same label as a result of the
2817 confusion that follows a syntax error! So make it harmless. */
2818 if (INSN_UID (label) == 0)
2820 INSN_UID (label) = cur_insn_uid++;
2821 add_insn_before (label, before);
2827 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2830 emit_note_before (subtype, before)
2834 register rtx note = rtx_alloc (NOTE);
2835 INSN_UID (note) = cur_insn_uid++;
2836 NOTE_SOURCE_FILE (note) = 0;
2837 NOTE_LINE_NUMBER (note) = subtype;
2839 add_insn_before (note, before);
2843 /* Make an insn of code INSN with body PATTERN
2844 and output it after the insn AFTER. */
2847 emit_insn_after (pattern, after)
2848 register rtx pattern, after;
2850 register rtx insn = after;
2852 if (GET_CODE (pattern) == SEQUENCE)
2856 for (i = 0; i < XVECLEN (pattern, 0); i++)
2858 insn = XVECEXP (pattern, 0, i);
2859 add_insn_after (insn, after);
2862 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2863 sequence_result[XVECLEN (pattern, 0)] = pattern;
2867 insn = make_insn_raw (pattern);
2868 add_insn_after (insn, after);
2874 /* Similar to emit_insn_after, except that line notes are to be inserted so
2875 as to act as if this insn were at FROM. */
2878 emit_insn_after_with_line_notes (pattern, after, from)
2879 rtx pattern, after, from;
2881 rtx from_line = find_line_note (from);
2882 rtx after_line = find_line_note (after);
2883 rtx insn = emit_insn_after (pattern, after);
2886 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2887 NOTE_LINE_NUMBER (from_line),
2891 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2892 NOTE_LINE_NUMBER (after_line),
2896 /* Make an insn of code JUMP_INSN with body PATTERN
2897 and output it after the insn AFTER. */
2900 emit_jump_insn_after (pattern, after)
2901 register rtx pattern, after;
2905 if (GET_CODE (pattern) == SEQUENCE)
2906 insn = emit_insn_after (pattern, after);
2909 insn = make_jump_insn_raw (pattern);
2910 add_insn_after (insn, after);
2916 /* Make an insn of code BARRIER
2917 and output it after the insn AFTER. */
2920 emit_barrier_after (after)
2923 register rtx insn = rtx_alloc (BARRIER);
2925 INSN_UID (insn) = cur_insn_uid++;
2927 add_insn_after (insn, after);
2931 /* Emit the label LABEL after the insn AFTER. */
2934 emit_label_after (label, after)
2937 /* This can be called twice for the same label
2938 as a result of the confusion that follows a syntax error!
2939 So make it harmless. */
2940 if (INSN_UID (label) == 0)
2942 INSN_UID (label) = cur_insn_uid++;
2943 add_insn_after (label, after);
2949 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2952 emit_note_after (subtype, after)
2956 register rtx note = rtx_alloc (NOTE);
2957 INSN_UID (note) = cur_insn_uid++;
2958 NOTE_SOURCE_FILE (note) = 0;
2959 NOTE_LINE_NUMBER (note) = subtype;
2960 add_insn_after (note, after);
2964 /* Emit a line note for FILE and LINE after the insn AFTER. */
2967 emit_line_note_after (file, line, after)
2974 if (no_line_numbers && line > 0)
2980 note = rtx_alloc (NOTE);
2981 INSN_UID (note) = cur_insn_uid++;
2982 NOTE_SOURCE_FILE (note) = file;
2983 NOTE_LINE_NUMBER (note) = line;
2984 add_insn_after (note, after);
2988 /* Make an insn of code INSN with pattern PATTERN
2989 and add it to the end of the doubly-linked list.
2990 If PATTERN is a SEQUENCE, take the elements of it
2991 and emit an insn for each element.
2993 Returns the last insn emitted. */
2999 rtx insn = last_insn;
3001 if (GET_CODE (pattern) == SEQUENCE)
3005 for (i = 0; i < XVECLEN (pattern, 0); i++)
3007 insn = XVECEXP (pattern, 0, i);
3010 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
3011 sequence_result[XVECLEN (pattern, 0)] = pattern;
3015 insn = make_insn_raw (pattern);
3022 /* Emit the insns in a chain starting with INSN.
3023 Return the last insn emitted. */
3033 rtx next = NEXT_INSN (insn);
3042 /* Emit the insns in a chain starting with INSN and place them in front of
3043 the insn BEFORE. Return the last insn emitted. */
3046 emit_insns_before (insn, before)
3054 rtx next = NEXT_INSN (insn);
3055 add_insn_before (insn, before);
3063 /* Emit the insns in a chain starting with FIRST and place them in back of
3064 the insn AFTER. Return the last insn emitted. */
3067 emit_insns_after (first, after)
3072 register rtx after_after;
3080 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3083 after_after = NEXT_INSN (after);
3085 NEXT_INSN (after) = first;
3086 PREV_INSN (first) = after;
3087 NEXT_INSN (last) = after_after;
3089 PREV_INSN (after_after) = last;
3091 if (after == last_insn)
3096 /* Make an insn of code JUMP_INSN with pattern PATTERN
3097 and add it to the end of the doubly-linked list. */
3100 emit_jump_insn (pattern)
3103 if (GET_CODE (pattern) == SEQUENCE)
3104 return emit_insn (pattern);
3107 register rtx insn = make_jump_insn_raw (pattern);
3113 /* Make an insn of code CALL_INSN with pattern PATTERN
3114 and add it to the end of the doubly-linked list. */
3117 emit_call_insn (pattern)
3120 if (GET_CODE (pattern) == SEQUENCE)
3121 return emit_insn (pattern);
3124 register rtx insn = make_call_insn_raw (pattern);
3126 PUT_CODE (insn, CALL_INSN);
3131 /* Add the label LABEL to the end of the doubly-linked list. */
3137 /* This can be called twice for the same label
3138 as a result of the confusion that follows a syntax error!
3139 So make it harmless. */
3140 if (INSN_UID (label) == 0)
3142 INSN_UID (label) = cur_insn_uid++;
3148 /* Make an insn of code BARRIER
3149 and add it to the end of the doubly-linked list. */
3154 register rtx barrier = rtx_alloc (BARRIER);
3155 INSN_UID (barrier) = cur_insn_uid++;
3160 /* Make an insn of code NOTE
3161 with data-fields specified by FILE and LINE
3162 and add it to the end of the doubly-linked list,
3163 but only if line-numbers are desired for debugging info. */
3166 emit_line_note (file, line)
3170 emit_filename = file;
3174 if (no_line_numbers)
3178 return emit_note (file, line);
3181 /* Make an insn of code NOTE
3182 with data-fields specified by FILE and LINE
3183 and add it to the end of the doubly-linked list.
3184 If it is a line-number NOTE, omit it if it matches the previous one. */
3187 emit_note (file, line)
3195 if (file && last_filename && !strcmp (file, last_filename)
3196 && line == last_linenum)
3198 last_filename = file;
3199 last_linenum = line;
3202 if (no_line_numbers && line > 0)
3208 note = rtx_alloc (NOTE);
3209 INSN_UID (note) = cur_insn_uid++;
3210 NOTE_SOURCE_FILE (note) = file;
3211 NOTE_LINE_NUMBER (note) = line;
3216 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3219 emit_line_note_force (file, line)
3224 return emit_line_note (file, line);
3227 /* Cause next statement to emit a line note even if the line number
3228 has not changed. This is used at the beginning of a function. */
3231 force_next_line_note ()
3236 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3237 note of this type already exists, remove it first. */
3240 set_unique_reg_note (insn, kind, datum)
3245 rtx note = find_reg_note (insn, kind, NULL_RTX);
3247 /* First remove the note if there already is one. */
3249 remove_note (insn, note);
3251 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3254 /* Return an indication of which type of insn should have X as a body.
3255 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3261 if (GET_CODE (x) == CODE_LABEL)
3263 if (GET_CODE (x) == CALL)
3265 if (GET_CODE (x) == RETURN)
3267 if (GET_CODE (x) == SET)
3269 if (SET_DEST (x) == pc_rtx)
3271 else if (GET_CODE (SET_SRC (x)) == CALL)
3276 if (GET_CODE (x) == PARALLEL)
3279 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3280 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3282 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3283 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3285 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3286 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3292 /* Emit the rtl pattern X as an appropriate kind of insn.
3293 If X is a label, it is simply added into the insn chain. */
3299 enum rtx_code code = classify_insn (x);
3301 if (code == CODE_LABEL)
3302 return emit_label (x);
3303 else if (code == INSN)
3304 return emit_insn (x);
3305 else if (code == JUMP_INSN)
3307 register rtx insn = emit_jump_insn (x);
3308 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3309 return emit_barrier ();
3312 else if (code == CALL_INSN)
3313 return emit_call_insn (x);
3318 /* Begin emitting insns to a sequence which can be packaged in an
3319 RTL_EXPR. If this sequence will contain something that might cause
3320 the compiler to pop arguments to function calls (because those
3321 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3322 details), use do_pending_stack_adjust before calling this function.
3323 That will ensure that the deferred pops are not accidentally
3324 emitted in the middel of this sequence. */
3329 struct sequence_stack *tem;
3331 if (sequence_element_free_list)
3333 /* Reuse a previously-saved struct sequence_stack. */
3334 tem = sequence_element_free_list;
3335 sequence_element_free_list = tem->next;
3338 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3340 tem->next = sequence_stack;
3341 tem->first = first_insn;
3342 tem->last = last_insn;
3343 tem->sequence_rtl_expr = sequence_rtl_expr;
3345 sequence_stack = tem;
3351 /* Similarly, but indicate that this sequence will be placed in T, an
3352 RTL_EXPR. See the documentation for start_sequence for more
3353 information about how to use this function. */
3356 start_sequence_for_rtl_expr (t)
3361 sequence_rtl_expr = t;
3364 /* Set up the insn chain starting with FIRST as the current sequence,
3365 saving the previously current one. See the documentation for
3366 start_sequence for more information about how to use this function. */
3369 push_to_sequence (first)
3376 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3382 /* Set up the outer-level insn chain
3383 as the current sequence, saving the previously current one. */
3386 push_topmost_sequence ()
3388 struct sequence_stack *stack, *top = NULL;
3392 for (stack = sequence_stack; stack; stack = stack->next)
3395 first_insn = top->first;
3396 last_insn = top->last;
3397 sequence_rtl_expr = top->sequence_rtl_expr;
3400 /* After emitting to the outer-level insn chain, update the outer-level
3401 insn chain, and restore the previous saved state. */
3404 pop_topmost_sequence ()
3406 struct sequence_stack *stack, *top = NULL;
3408 for (stack = sequence_stack; stack; stack = stack->next)
3411 top->first = first_insn;
3412 top->last = last_insn;
3413 /* ??? Why don't we save sequence_rtl_expr here? */
3418 /* After emitting to a sequence, restore previous saved state.
3420 To get the contents of the sequence just made, you must call
3421 `gen_sequence' *before* calling here.
3423 If the compiler might have deferred popping arguments while
3424 generating this sequence, and this sequence will not be immediately
3425 inserted into the instruction stream, use do_pending_stack_adjust
3426 before calling gen_sequence. That will ensure that the deferred
3427 pops are inserted into this sequence, and not into some random
3428 location in the instruction stream. See INHIBIT_DEFER_POP for more
3429 information about deferred popping of arguments. */
3434 struct sequence_stack *tem = sequence_stack;
3436 first_insn = tem->first;
3437 last_insn = tem->last;
3438 sequence_rtl_expr = tem->sequence_rtl_expr;
3439 sequence_stack = tem->next;
3441 tem->next = sequence_element_free_list;
3442 sequence_element_free_list = tem;
3445 /* Return 1 if currently emitting into a sequence. */
3450 return sequence_stack != 0;
3453 /* Generate a SEQUENCE rtx containing the insns already emitted
3454 to the current sequence.
3456 This is how the gen_... function from a DEFINE_EXPAND
3457 constructs the SEQUENCE that it returns. */
3467 /* Count the insns in the chain. */
3469 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3472 /* If only one insn, return its pattern rather than a SEQUENCE.
3473 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3474 the case of an empty list.) */
3476 && ! RTX_FRAME_RELATED_P (first_insn)
3477 && (GET_CODE (first_insn) == INSN
3478 || GET_CODE (first_insn) == JUMP_INSN
3479 /* Don't discard the call usage field. */
3480 || (GET_CODE (first_insn) == CALL_INSN
3481 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3483 NEXT_INSN (first_insn) = free_insn;
3484 free_insn = first_insn;
3485 return PATTERN (first_insn);
3488 /* Put them in a vector. See if we already have a SEQUENCE of the
3489 appropriate length around. */
3490 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3491 sequence_result[len] = 0;
3494 /* Ensure that this rtl goes in saveable_obstack, since we may
3496 push_obstacks_nochange ();
3497 rtl_in_saveable_obstack ();
3498 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3502 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3503 XVECEXP (result, 0, i) = tem;
3508 /* Put the various virtual registers into REGNO_REG_RTX. */
3511 init_virtual_regs ()
3513 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3514 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3515 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3516 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3517 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3520 /* Initialize data structures and variables in this file
3521 before generating rtl for each function. */
3530 sequence_rtl_expr = NULL;
3532 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3535 first_label_num = label_num;
3537 sequence_stack = NULL;
3539 /* Clear the start_sequence/gen_sequence cache. */
3540 sequence_element_free_list = 0;
3541 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3542 sequence_result[i] = 0;
3545 /* Init the tables that describe all the pseudo regs. */
3547 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3550 = (char *) savealloc (regno_pointer_flag_length);
3551 bzero (regno_pointer_flag, regno_pointer_flag_length);
3554 = (char *) savealloc (regno_pointer_flag_length);
3555 bzero (regno_pointer_align, regno_pointer_flag_length);
3558 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3559 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3561 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3562 init_virtual_regs ();
3564 /* Indicate that the virtual registers and stack locations are
3566 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3567 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3568 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3569 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3571 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3572 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3573 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3574 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3575 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3577 #ifdef STACK_BOUNDARY
3578 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3579 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3580 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3581 = STACK_BOUNDARY / BITS_PER_UNIT;
3582 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3584 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3585 = STACK_BOUNDARY / BITS_PER_UNIT;
3586 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3587 = STACK_BOUNDARY / BITS_PER_UNIT;
3588 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3589 = STACK_BOUNDARY / BITS_PER_UNIT;
3590 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3591 = STACK_BOUNDARY / BITS_PER_UNIT;
3592 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD;
3595 #ifdef INIT_EXPANDERS
3600 /* Create some permanent unique rtl objects shared between all functions.
3601 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3604 init_emit_once (line_numbers)
3608 enum machine_mode mode;
3609 enum machine_mode double_mode;
3611 no_line_numbers = ! line_numbers;
3613 sequence_stack = NULL;
3615 /* Compute the word and byte modes. */
3617 byte_mode = VOIDmode;
3618 word_mode = VOIDmode;
3619 double_mode = VOIDmode;
3621 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3622 mode = GET_MODE_WIDER_MODE (mode))
3624 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3625 && byte_mode == VOIDmode)
3628 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3629 && word_mode == VOIDmode)
3633 #ifndef DOUBLE_TYPE_SIZE
3634 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3637 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3638 mode = GET_MODE_WIDER_MODE (mode))
3640 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
3641 && double_mode == VOIDmode)
3645 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3647 /* Create the unique rtx's for certain rtx codes and operand values. */
3649 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3651 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3652 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3653 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3656 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3657 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3658 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3660 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3662 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
3663 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
3664 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
3665 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
3667 for (i = 0; i <= 2; i++)
3669 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3670 mode = GET_MODE_WIDER_MODE (mode))
3672 rtx tem = rtx_alloc (CONST_DOUBLE);
3673 union real_extract u;
3675 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3676 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3678 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3679 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3680 PUT_MODE (tem, mode);
3682 const_tiny_rtx[i][(int) mode] = tem;
3685 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3687 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3688 mode = GET_MODE_WIDER_MODE (mode))
3689 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3691 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3693 mode = GET_MODE_WIDER_MODE (mode))
3694 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3697 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3698 mode = GET_MODE_WIDER_MODE (mode))
3699 const_tiny_rtx[0][(int) mode] = const0_rtx;
3702 /* Assign register numbers to the globally defined register rtx.
3703 This must be done at runtime because the register number field
3704 is in a union and some compilers can't initialize unions. */
3706 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3707 PUT_MODE (stack_pointer_rtx, Pmode);
3708 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3709 PUT_MODE (frame_pointer_rtx, Pmode);
3710 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3711 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3712 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3714 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3715 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3716 PUT_MODE (arg_pointer_rtx, Pmode);
3719 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3720 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3721 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3722 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3723 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3724 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3725 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3726 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3727 REGNO (virtual_cfa_rtx) = VIRTUAL_CFA_REGNUM;
3728 PUT_MODE (virtual_cfa_rtx, Pmode);
3730 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3731 return_address_pointer_rtx
3732 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3736 struct_value_rtx = STRUCT_VALUE;
3738 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3741 #ifdef STRUCT_VALUE_INCOMING
3742 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3744 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3745 struct_value_incoming_rtx
3746 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3748 struct_value_incoming_rtx = struct_value_rtx;
3752 #ifdef STATIC_CHAIN_REGNUM
3753 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3755 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3756 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3757 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3760 static_chain_incoming_rtx = static_chain_rtx;
3764 static_chain_rtx = STATIC_CHAIN;
3766 #ifdef STATIC_CHAIN_INCOMING
3767 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3769 static_chain_incoming_rtx = static_chain_rtx;
3773 #ifdef PIC_OFFSET_TABLE_REGNUM
3774 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3777 #ifdef INIT_EXPANDERS
3778 /* This is to initialize save_machine_status and restore_machine_status before
3779 the first call to push_function_context_to. This is needed by the Chill
3780 front end which calls push_function_context_to before the first cal to
3781 init_function_start. */
3786 /* Query and clear/ restore no_line_numbers. This is used by the
3787 switch / case handling in stmt.c to give proper line numbers in
3788 warnings about unreachable code. */
3791 force_line_numbers ()
3793 int old = no_line_numbers;
3795 no_line_numbers = 0;
3797 force_next_line_note ();
3802 restore_line_number_status (old_value)
3805 no_line_numbers = old_value;