1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-99, 2000 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
47 #include "hard-reg-set.h"
48 #include "insn-config.h"
53 #include "basic-block.h"
56 /* Commonly used modes. */
58 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
59 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
60 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
61 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
64 /* This is *not* reset after each function. It gives each CODE_LABEL
65 in the entire compilation a unique label number. */
67 static int label_num = 1;
69 /* Highest label number in current function.
70 Zero means use the value of label_num instead.
71 This is nonzero only when belatedly compiling an inline function. */
73 static int last_label_num;
75 /* Value label_num had when set_new_first_and_last_label_number was called.
76 If label_num has not changed since then, last_label_num is valid. */
78 static int base_label_num;
80 /* Nonzero means do not generate NOTEs for source line numbers. */
82 static int no_line_numbers;
84 /* Commonly used rtx's, so that we only need space for one copy.
85 These are initialized once for the entire compilation.
86 All of these except perhaps the floating-point CONST_DOUBLEs
87 are unique; no other rtx-object will be equal to any of these. */
89 rtx global_rtl[GR_MAX];
91 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
92 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
93 record a copy of const[012]_rtx. */
95 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
99 REAL_VALUE_TYPE dconst0;
100 REAL_VALUE_TYPE dconst1;
101 REAL_VALUE_TYPE dconst2;
102 REAL_VALUE_TYPE dconstm1;
104 /* All references to the following fixed hard registers go through
105 these unique rtl objects. On machines where the frame-pointer and
106 arg-pointer are the same register, they use the same unique object.
108 After register allocation, other rtl objects which used to be pseudo-regs
109 may be clobbered to refer to the frame-pointer register.
110 But references that were originally to the frame-pointer can be
111 distinguished from the others because they contain frame_pointer_rtx.
113 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
114 tricky: until register elimination has taken place hard_frame_pointer_rtx
115 should be used if it is being set, and frame_pointer_rtx otherwise. After
116 register elimination hard_frame_pointer_rtx should always be used.
117 On machines where the two registers are same (most) then these are the
120 In an inline procedure, the stack and frame pointer rtxs may not be
121 used for anything else. */
122 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
123 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
124 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
125 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
126 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
128 /* This is used to implement __builtin_return_address for some machines.
129 See for instance the MIPS port. */
130 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
132 /* We make one copy of (const_int C) where C is in
133 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
134 to save space during the compilation and simplify comparisons of
137 rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
139 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
140 shortly thrown away. We use two mechanisms to prevent this waste:
142 For sizes up to 5 elements, we keep a SEQUENCE and its associated
143 rtvec for use by gen_sequence. One entry for each size is
144 sufficient because most cases are calls to gen_sequence followed by
145 immediately emitting the SEQUENCE. Reuse is safe since emitting a
146 sequence is destructive on the insn in it anyway and hence can't be
149 We do not bother to save this cached data over nested function calls.
150 Instead, we just reinitialize them. */
152 #define SEQUENCE_RESULT_SIZE 5
154 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
156 /* During RTL generation, we also keep a list of free INSN rtl codes. */
157 static rtx free_insn;
159 #define first_insn (cfun->emit->x_first_insn)
160 #define last_insn (cfun->emit->x_last_insn)
161 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
162 #define last_linenum (cfun->emit->x_last_linenum)
163 #define last_filename (cfun->emit->x_last_filename)
164 #define first_label_num (cfun->emit->x_first_label_num)
166 /* This is where the pointer to the obstack being used for RTL is stored. */
167 extern struct obstack *rtl_obstack;
169 static rtx make_jump_insn_raw PARAMS ((rtx));
170 static rtx make_call_insn_raw PARAMS ((rtx));
171 static rtx find_line_note PARAMS ((rtx));
172 static void mark_sequence_stack PARAMS ((struct sequence_stack *));
173 static void unshare_all_rtl_1 PARAMS ((rtx));
175 /* There are some RTL codes that require special attention; the generation
176 functions do the raw handling. If you add to this list, modify
177 special_rtx in gengenrtl.c as well. */
180 gen_rtx_CONST_INT (mode, arg)
181 enum machine_mode mode;
184 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
185 return const_int_rtx[arg + MAX_SAVED_CONST_INT];
187 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
188 if (const_true_rtx && arg == STORE_FLAG_VALUE)
189 return const_true_rtx;
192 return gen_rtx_raw_CONST_INT (mode, arg);
195 /* CONST_DOUBLEs needs special handling because its length is known
198 gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2)
199 enum machine_mode mode;
201 HOST_WIDE_INT arg1, arg2;
203 rtx r = rtx_alloc (CONST_DOUBLE);
208 X0EXP (r, 1) = NULL_RTX;
212 for (i = GET_RTX_LENGTH (CONST_DOUBLE) - 1; i > 3; --i)
219 gen_rtx_REG (mode, regno)
220 enum machine_mode mode;
223 /* In case the MD file explicitly references the frame pointer, have
224 all such references point to the same frame pointer. This is
225 used during frame pointer elimination to distinguish the explicit
226 references to these registers from pseudos that happened to be
229 If we have eliminated the frame pointer or arg pointer, we will
230 be using it as a normal register, for example as a spill
231 register. In such cases, we might be accessing it in a mode that
232 is not Pmode and therefore cannot use the pre-allocated rtx.
234 Also don't do this when we are making new REGs in reload, since
235 we don't want to get confused with the real pointers. */
237 if (mode == Pmode && !reload_in_progress)
239 if (regno == FRAME_POINTER_REGNUM)
240 return frame_pointer_rtx;
241 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
242 if (regno == HARD_FRAME_POINTER_REGNUM)
243 return hard_frame_pointer_rtx;
245 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
246 if (regno == ARG_POINTER_REGNUM)
247 return arg_pointer_rtx;
249 #ifdef RETURN_ADDRESS_POINTER_REGNUM
250 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
251 return return_address_pointer_rtx;
253 if (regno == STACK_POINTER_REGNUM)
254 return stack_pointer_rtx;
257 return gen_rtx_raw_REG (mode, regno);
261 gen_rtx_MEM (mode, addr)
262 enum machine_mode mode;
265 rtx rt = gen_rtx_raw_MEM (mode, addr);
267 /* This field is not cleared by the mere allocation of the rtx, so
269 MEM_ALIAS_SET (rt) = 0;
274 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
276 ** This routine generates an RTX of the size specified by
277 ** <code>, which is an RTX code. The RTX structure is initialized
278 ** from the arguments <element1> through <elementn>, which are
279 ** interpreted according to the specific RTX type's format. The
280 ** special machine mode associated with the rtx (if any) is specified
283 ** gen_rtx can be invoked in a way which resembles the lisp-like
284 ** rtx it will generate. For example, the following rtx structure:
286 ** (plus:QI (mem:QI (reg:SI 1))
287 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
289 ** ...would be generated by the following C code:
291 ** gen_rtx (PLUS, QImode,
292 ** gen_rtx (MEM, QImode,
293 ** gen_rtx (REG, SImode, 1)),
294 ** gen_rtx (MEM, QImode,
295 ** gen_rtx (PLUS, SImode,
296 ** gen_rtx (REG, SImode, 2),
297 ** gen_rtx (REG, SImode, 3)))),
302 gen_rtx VPARAMS ((enum rtx_code code, enum machine_mode mode, ...))
304 #ifndef ANSI_PROTOTYPES
306 enum machine_mode mode;
309 register int i; /* Array indices... */
310 register const char *fmt; /* Current rtx's format... */
311 register rtx rt_val; /* RTX to return to caller... */
315 #ifndef ANSI_PROTOTYPES
316 code = va_arg (p, enum rtx_code);
317 mode = va_arg (p, enum machine_mode);
323 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
328 rtx arg0 = va_arg (p, rtx);
329 HOST_WIDE_INT arg1 = va_arg (p, HOST_WIDE_INT);
330 HOST_WIDE_INT arg2 = va_arg (p, HOST_WIDE_INT);
331 rt_val = gen_rtx_CONST_DOUBLE (mode, arg0, arg1, arg2);
336 rt_val = gen_rtx_REG (mode, va_arg (p, int));
340 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
344 rt_val = rtx_alloc (code); /* Allocate the storage space. */
345 rt_val->mode = mode; /* Store the machine mode... */
347 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
348 for (i = 0; i < GET_RTX_LENGTH (code); i++)
352 case '0': /* Unused field. */
355 case 'i': /* An integer? */
356 XINT (rt_val, i) = va_arg (p, int);
359 case 'w': /* A wide integer? */
360 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
363 case 's': /* A string? */
364 XSTR (rt_val, i) = va_arg (p, char *);
367 case 'e': /* An expression? */
368 case 'u': /* An insn? Same except when printing. */
369 XEXP (rt_val, i) = va_arg (p, rtx);
372 case 'E': /* An RTX vector? */
373 XVEC (rt_val, i) = va_arg (p, rtvec);
376 case 'b': /* A bitmap? */
377 XBITMAP (rt_val, i) = va_arg (p, bitmap);
380 case 't': /* A tree? */
381 XTREE (rt_val, i) = va_arg (p, tree);
395 /* gen_rtvec (n, [rt1, ..., rtn])
397 ** This routine creates an rtvec and stores within it the
398 ** pointers to rtx's which are its arguments.
403 gen_rtvec VPARAMS ((int n, ...))
405 #ifndef ANSI_PROTOTYPES
414 #ifndef ANSI_PROTOTYPES
419 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
421 vector = (rtx *) alloca (n * sizeof (rtx));
423 for (i = 0; i < n; i++)
424 vector[i] = va_arg (p, rtx);
427 return gen_rtvec_v (n, vector);
431 gen_rtvec_v (n, argp)
436 register rtvec rt_val;
439 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
441 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
443 for (i = 0; i < n; i++)
444 rt_val->elem[i] = *argp++;
450 /* Generate a REG rtx for a new pseudo register of mode MODE.
451 This pseudo is assigned the next sequential register number. */
455 enum machine_mode mode;
457 struct function *f = cfun;
460 /* Don't let anything called after initial flow analysis create new
465 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
466 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
468 /* For complex modes, don't make a single pseudo.
469 Instead, make a CONCAT of two pseudos.
470 This allows noncontiguous allocation of the real and imaginary parts,
471 which makes much better code. Besides, allocating DCmode
472 pseudos overstrains reload on some machines like the 386. */
473 rtx realpart, imagpart;
474 int size = GET_MODE_UNIT_SIZE (mode);
475 enum machine_mode partmode
476 = mode_for_size (size * BITS_PER_UNIT,
477 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
478 ? MODE_FLOAT : MODE_INT),
481 realpart = gen_reg_rtx (partmode);
482 imagpart = gen_reg_rtx (partmode);
483 return gen_rtx_CONCAT (mode, realpart, imagpart);
486 /* Make sure regno_pointer_flag and regno_reg_rtx are large
487 enough to have an element for this pseudo reg number. */
489 if (reg_rtx_no == f->emit->regno_pointer_flag_length)
491 int old_size = f->emit->regno_pointer_flag_length;
494 new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
495 memset (new + old_size, 0, old_size);
496 f->emit->regno_pointer_flag = new;
498 new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
499 memset (new + old_size, 0, old_size);
500 f->emit->regno_pointer_align = new;
502 new1 = (rtx *) xrealloc (f->emit->x_regno_reg_rtx,
503 old_size * 2 * sizeof (rtx));
504 memset (new1 + old_size, 0, old_size * sizeof (rtx));
505 regno_reg_rtx = new1;
507 f->emit->regno_pointer_flag_length = old_size * 2;
510 val = gen_rtx_raw_REG (mode, reg_rtx_no);
511 regno_reg_rtx[reg_rtx_no++] = val;
515 /* Identify REG (which may be a CONCAT) as a user register. */
521 if (GET_CODE (reg) == CONCAT)
523 REG_USERVAR_P (XEXP (reg, 0)) = 1;
524 REG_USERVAR_P (XEXP (reg, 1)) = 1;
526 else if (GET_CODE (reg) == REG)
527 REG_USERVAR_P (reg) = 1;
532 /* Identify REG as a probable pointer register and show its alignment
533 as ALIGN, if nonzero. */
536 mark_reg_pointer (reg, align)
540 if (! REGNO_POINTER_FLAG (REGNO (reg)))
542 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
545 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
547 else if (align && align < REGNO_POINTER_ALIGN (REGNO (reg)))
548 /* We can no-longer be sure just how aligned this pointer is */
549 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
552 /* Return 1 plus largest pseudo reg number used in the current function. */
560 /* Return 1 + the largest label number used so far in the current function. */
565 if (last_label_num && label_num == base_label_num)
566 return last_label_num;
570 /* Return first label number used in this function (if any were used). */
573 get_first_label_num ()
575 return first_label_num;
578 /* Return a value representing some low-order bits of X, where the number
579 of low-order bits is given by MODE. Note that no conversion is done
580 between floating-point and fixed-point values, rather, the bit
581 representation is returned.
583 This function handles the cases in common between gen_lowpart, below,
584 and two variants in cse.c and combine.c. These are the cases that can
585 be safely handled at all points in the compilation.
587 If this is not a case we can handle, return 0. */
590 gen_lowpart_common (mode, x)
591 enum machine_mode mode;
596 if (GET_MODE (x) == mode)
599 /* MODE must occupy no more words than the mode of X. */
600 if (GET_MODE (x) != VOIDmode
601 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
602 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
606 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
607 word = ((GET_MODE_SIZE (GET_MODE (x))
608 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
611 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
612 && (GET_MODE_CLASS (mode) == MODE_INT
613 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
615 /* If we are getting the low-order part of something that has been
616 sign- or zero-extended, we can either just use the object being
617 extended or make a narrower extension. If we want an even smaller
618 piece than the size of the object being extended, call ourselves
621 This case is used mostly by combine and cse. */
623 if (GET_MODE (XEXP (x, 0)) == mode)
625 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
626 return gen_lowpart_common (mode, XEXP (x, 0));
627 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
628 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
630 else if (GET_CODE (x) == SUBREG
631 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
632 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
633 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
635 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
636 else if (GET_CODE (x) == REG)
638 /* Let the backend decide how many registers to skip. This is needed
639 in particular for Sparc64 where fp regs are smaller than a word. */
640 /* ??? Note that subregs are now ambiguous, in that those against
641 pseudos are sized by the Word Size, while those against hard
642 regs are sized by the underlying register size. Better would be
643 to always interpret the subreg offset parameter as bytes or bits. */
645 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
646 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
647 - HARD_REGNO_NREGS (REGNO (x), mode));
649 /* If the register is not valid for MODE, return 0. If we don't
650 do this, there is no way to fix up the resulting REG later.
651 But we do do this if the current REG is not valid for its
652 mode. This latter is a kludge, but is required due to the
653 way that parameters are passed on some machines, most
655 if (REGNO (x) < FIRST_PSEUDO_REGISTER
656 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
657 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
659 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
660 /* integrate.c can't handle parts of a return value register. */
661 && (! REG_FUNCTION_VALUE_P (x)
662 || ! rtx_equal_function_value_matters)
663 #ifdef CLASS_CANNOT_CHANGE_SIZE
664 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
665 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
666 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
667 && (TEST_HARD_REG_BIT
668 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
671 /* We want to keep the stack, frame, and arg pointers
673 && x != frame_pointer_rtx
674 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
675 && x != arg_pointer_rtx
677 && x != stack_pointer_rtx)
678 return gen_rtx_REG (mode, REGNO (x) + word);
680 return gen_rtx_SUBREG (mode, x, word);
682 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
683 from the low-order part of the constant. */
684 else if ((GET_MODE_CLASS (mode) == MODE_INT
685 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
686 && GET_MODE (x) == VOIDmode
687 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
689 /* If MODE is twice the host word size, X is already the desired
690 representation. Otherwise, if MODE is wider than a word, we can't
691 do this. If MODE is exactly a word, return just one CONST_INT.
692 If MODE is smaller than a word, clear the bits that don't belong
693 in our mode, unless they and our sign bit are all one. So we get
694 either a reasonable negative value or a reasonable unsigned value
697 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
699 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
701 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
702 return (GET_CODE (x) == CONST_INT ? x
703 : GEN_INT (CONST_DOUBLE_LOW (x)));
706 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
707 int width = GET_MODE_BITSIZE (mode);
708 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
709 : CONST_DOUBLE_LOW (x));
711 /* Sign extend to HOST_WIDE_INT. */
712 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
714 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
719 /* If X is an integral constant but we want it in floating-point, it
720 must be the case that we have a union of an integer and a floating-point
721 value. If the machine-parameters allow it, simulate that union here
722 and return the result. The two-word and single-word cases are
725 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
726 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
727 || flag_pretend_float)
728 && GET_MODE_CLASS (mode) == MODE_FLOAT
729 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
730 && GET_CODE (x) == CONST_INT
731 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
732 #ifdef REAL_ARITHMETIC
738 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
739 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
743 union {HOST_WIDE_INT i; float d; } u;
746 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
749 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
750 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
751 || flag_pretend_float)
752 && GET_MODE_CLASS (mode) == MODE_FLOAT
753 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
754 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
755 && GET_MODE (x) == VOIDmode
756 && (sizeof (double) * HOST_BITS_PER_CHAR
757 == 2 * HOST_BITS_PER_WIDE_INT))
758 #ifdef REAL_ARITHMETIC
762 HOST_WIDE_INT low, high;
764 if (GET_CODE (x) == CONST_INT)
765 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
767 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
769 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
771 if (WORDS_BIG_ENDIAN)
772 i[0] = high, i[1] = low;
774 i[0] = low, i[1] = high;
776 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
777 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
781 union {HOST_WIDE_INT i[2]; double d; } u;
782 HOST_WIDE_INT low, high;
784 if (GET_CODE (x) == CONST_INT)
785 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
787 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
789 #ifdef HOST_WORDS_BIG_ENDIAN
790 u.i[0] = high, u.i[1] = low;
792 u.i[0] = low, u.i[1] = high;
795 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
799 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
800 same as sizeof (double) or when sizeof (float) is larger than the
801 size of a word on the target machine. */
802 #ifdef REAL_ARITHMETIC
803 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
809 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
810 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
812 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
813 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
814 || flag_pretend_float)
815 && GET_MODE_CLASS (mode) == MODE_FLOAT
816 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
817 && GET_CODE (x) == CONST_INT
818 && (sizeof (double) * HOST_BITS_PER_CHAR
819 == HOST_BITS_PER_WIDE_INT))
825 r = REAL_VALUE_FROM_TARGET_DOUBLE (&i);
826 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
830 /* Similarly, if this is converting a floating-point value into a
831 single-word integer. Only do this is the host and target parameters are
834 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
835 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
836 || flag_pretend_float)
837 && (GET_MODE_CLASS (mode) == MODE_INT
838 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
839 && GET_CODE (x) == CONST_DOUBLE
840 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
841 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
842 return operand_subword (x, word, 0, GET_MODE (x));
844 /* Similarly, if this is converting a floating-point value into a
845 two-word integer, we can do this one word at a time and make an
846 integer. Only do this is the host and target parameters are
849 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
850 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
851 || flag_pretend_float)
852 && (GET_MODE_CLASS (mode) == MODE_INT
853 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
854 && GET_CODE (x) == CONST_DOUBLE
855 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
856 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
859 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
861 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
863 if (lowpart && GET_CODE (lowpart) == CONST_INT
864 && highpart && GET_CODE (highpart) == CONST_INT)
865 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
868 /* Otherwise, we can't do this. */
872 /* Return the real part (which has mode MODE) of a complex value X.
873 This always comes at the low address in memory. */
876 gen_realpart (mode, x)
877 enum machine_mode mode;
880 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
882 else if (WORDS_BIG_ENDIAN
883 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
885 && REGNO (x) < FIRST_PSEUDO_REGISTER)
886 fatal ("Unable to access real part of complex value in a hard register on this target");
887 else if (WORDS_BIG_ENDIAN)
888 return gen_highpart (mode, x);
890 return gen_lowpart (mode, x);
893 /* Return the imaginary part (which has mode MODE) of a complex value X.
894 This always comes at the high address in memory. */
897 gen_imagpart (mode, x)
898 enum machine_mode mode;
901 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
903 else if (WORDS_BIG_ENDIAN)
904 return gen_lowpart (mode, x);
905 else if (!WORDS_BIG_ENDIAN
906 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD
908 && REGNO (x) < FIRST_PSEUDO_REGISTER)
909 fatal ("Unable to access imaginary part of complex value in a hard register on this target");
911 return gen_highpart (mode, x);
914 /* Return 1 iff X, assumed to be a SUBREG,
915 refers to the real part of the complex value in its containing reg.
916 Complex values are always stored with the real part in the first word,
917 regardless of WORDS_BIG_ENDIAN. */
920 subreg_realpart_p (x)
923 if (GET_CODE (x) != SUBREG)
926 return SUBREG_WORD (x) * UNITS_PER_WORD < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x)));
929 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
930 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
931 least-significant part of X.
932 MODE specifies how big a part of X to return;
933 it usually should not be larger than a word.
934 If X is a MEM whose address is a QUEUED, the value may be so also. */
937 gen_lowpart (mode, x)
938 enum machine_mode mode;
941 rtx result = gen_lowpart_common (mode, x);
945 else if (GET_CODE (x) == REG)
947 /* Must be a hard reg that's not valid in MODE. */
948 result = gen_lowpart_common (mode, copy_to_reg (x));
953 else if (GET_CODE (x) == MEM)
955 /* The only additional case we can do is MEM. */
956 register int offset = 0;
957 if (WORDS_BIG_ENDIAN)
958 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
959 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
961 if (BYTES_BIG_ENDIAN)
962 /* Adjust the address so that the address-after-the-data
964 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
965 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
967 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
969 else if (GET_CODE (x) == ADDRESSOF)
970 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
975 /* Like `gen_lowpart', but refer to the most significant part.
976 This is used to access the imaginary part of a complex number. */
979 gen_highpart (mode, x)
980 enum machine_mode mode;
983 /* This case loses if X is a subreg. To catch bugs early,
984 complain if an invalid MODE is used even in other cases. */
985 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
986 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
988 if (GET_CODE (x) == CONST_DOUBLE
989 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
990 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
993 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
994 else if (GET_CODE (x) == CONST_INT)
996 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
998 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1000 else if (GET_CODE (x) == MEM)
1002 register int offset = 0;
1003 if (! WORDS_BIG_ENDIAN)
1004 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1005 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1007 if (! BYTES_BIG_ENDIAN
1008 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1009 offset -= (GET_MODE_SIZE (mode)
1010 - MIN (UNITS_PER_WORD,
1011 GET_MODE_SIZE (GET_MODE (x))));
1013 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1015 else if (GET_CODE (x) == SUBREG)
1017 /* The only time this should occur is when we are looking at a
1018 multi-word item with a SUBREG whose mode is the same as that of the
1019 item. It isn't clear what we would do if it wasn't. */
1020 if (SUBREG_WORD (x) != 0)
1022 return gen_highpart (mode, SUBREG_REG (x));
1024 else if (GET_CODE (x) == REG)
1028 /* Let the backend decide how many registers to skip. This is needed
1029 in particular for sparc64 where fp regs are smaller than a word. */
1030 /* ??? Note that subregs are now ambiguous, in that those against
1031 pseudos are sized by the word size, while those against hard
1032 regs are sized by the underlying register size. Better would be
1033 to always interpret the subreg offset parameter as bytes or bits. */
1035 if (WORDS_BIG_ENDIAN)
1037 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1038 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1039 - HARD_REGNO_NREGS (REGNO (x), mode));
1041 word = ((GET_MODE_SIZE (GET_MODE (x))
1042 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1045 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1046 /* integrate.c can't handle parts of a return value register. */
1047 && (! REG_FUNCTION_VALUE_P (x)
1048 || ! rtx_equal_function_value_matters)
1049 /* We want to keep the stack, frame, and arg pointers special. */
1050 && x != frame_pointer_rtx
1051 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1052 && x != arg_pointer_rtx
1054 && x != stack_pointer_rtx)
1055 return gen_rtx_REG (mode, REGNO (x) + word);
1057 return gen_rtx_SUBREG (mode, x, word);
1063 /* Return 1 iff X, assumed to be a SUBREG,
1064 refers to the least significant part of its containing reg.
1065 If X is not a SUBREG, always return 1 (it is its own low part!). */
1068 subreg_lowpart_p (x)
1071 if (GET_CODE (x) != SUBREG)
1073 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1076 if (WORDS_BIG_ENDIAN
1077 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1078 return (SUBREG_WORD (x)
1079 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1080 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1083 return SUBREG_WORD (x) == 0;
1086 /* Return subword I of operand OP.
1087 The word number, I, is interpreted as the word number starting at the
1088 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1089 otherwise it is the high-order word.
1091 If we cannot extract the required word, we return zero. Otherwise, an
1092 rtx corresponding to the requested word will be returned.
1094 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1095 reload has completed, a valid address will always be returned. After
1096 reload, if a valid address cannot be returned, we return zero.
1098 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1099 it is the responsibility of the caller.
1101 MODE is the mode of OP in case it is a CONST_INT. */
1104 operand_subword (op, i, validate_address, mode)
1107 int validate_address;
1108 enum machine_mode mode;
1111 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1113 if (mode == VOIDmode)
1114 mode = GET_MODE (op);
1116 if (mode == VOIDmode)
1119 /* If OP is narrower than a word, fail. */
1121 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD))
1124 /* If we want a word outside OP, return zero. */
1126 && (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))
1129 /* If OP is already an integer word, return it. */
1130 if (GET_MODE_CLASS (mode) == MODE_INT
1131 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1134 /* If OP is a REG or SUBREG, we can handle it very simply. */
1135 if (GET_CODE (op) == REG)
1137 /* ??? There is a potential problem with this code. It does not
1138 properly handle extractions of a subword from a hard register
1139 that is larger than word_mode. Presumably the check for
1140 HARD_REGNO_MODE_OK catches these most of these cases. */
1142 /* If OP is a hard register, but OP + I is not a hard register,
1143 then extracting a subword is impossible.
1145 For example, consider if OP is the last hard register and it is
1146 larger than word_mode. If we wanted word N (for N > 0) because a
1147 part of that hard register was known to contain a useful value,
1148 then OP + I would refer to a pseudo, not the hard register we
1150 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1151 && REGNO (op) + i >= FIRST_PSEUDO_REGISTER)
1154 /* If the register is not valid for MODE, return 0. Note we
1155 have to check both OP and OP + I since they may refer to
1156 different parts of the register file.
1158 Consider if OP refers to the last 96bit FP register and we want
1159 subword 3 because that subword is known to contain a value we
1161 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1162 && (! HARD_REGNO_MODE_OK (REGNO (op), word_mode)
1163 || ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)))
1165 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1166 || (REG_FUNCTION_VALUE_P (op)
1167 && rtx_equal_function_value_matters)
1168 /* We want to keep the stack, frame, and arg pointers
1170 || op == frame_pointer_rtx
1171 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1172 || op == arg_pointer_rtx
1174 || op == stack_pointer_rtx)
1175 return gen_rtx_SUBREG (word_mode, op, i);
1177 return gen_rtx_REG (word_mode, REGNO (op) + i);
1179 else if (GET_CODE (op) == SUBREG)
1180 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1181 else if (GET_CODE (op) == CONCAT)
1183 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1185 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1186 return operand_subword (XEXP (op, 1), i - partwords,
1187 validate_address, mode);
1190 /* Form a new MEM at the requested address. */
1191 if (GET_CODE (op) == MEM)
1193 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1196 if (validate_address)
1198 if (reload_completed)
1200 if (! strict_memory_address_p (word_mode, addr))
1204 addr = memory_address (word_mode, addr);
1207 new = gen_rtx_MEM (word_mode, addr);
1209 MEM_COPY_ATTRIBUTES (new, op);
1210 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1211 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (op);
1216 /* The only remaining cases are when OP is a constant. If the host and
1217 target floating formats are the same, handling two-word floating
1218 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1219 are defined as returning one or two 32 bit values, respectively,
1220 and not values of BITS_PER_WORD bits. */
1221 #ifdef REAL_ARITHMETIC
1222 /* The output is some bits, the width of the target machine's word.
1223 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1225 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1226 && GET_MODE_CLASS (mode) == MODE_FLOAT
1227 && GET_MODE_BITSIZE (mode) == 64
1228 && GET_CODE (op) == CONST_DOUBLE)
1233 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1234 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1236 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1237 which the words are written depends on the word endianness.
1238 ??? This is a potential portability problem and should
1239 be fixed at some point.
1241 We must excercise caution with the sign bit. By definition there
1242 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1243 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1244 So we explicitly mask and sign-extend as necessary. */
1245 if (BITS_PER_WORD == 32)
1248 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1249 return GEN_INT (val);
1251 #if HOST_BITS_PER_WIDE_INT >= 64
1252 else if (BITS_PER_WORD >= 64 && i == 0)
1254 val = k[! WORDS_BIG_ENDIAN];
1255 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1256 val |= (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN] & 0xffffffff;
1257 return GEN_INT (val);
1260 else if (BITS_PER_WORD == 16)
1263 if ((i & 1) == !WORDS_BIG_ENDIAN)
1266 return GEN_INT (val);
1271 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1272 && GET_MODE_CLASS (mode) == MODE_FLOAT
1273 && GET_MODE_BITSIZE (mode) > 64
1274 && GET_CODE (op) == CONST_DOUBLE)
1279 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1280 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1282 if (BITS_PER_WORD == 32)
1285 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1286 return GEN_INT (val);
1288 #if HOST_BITS_PER_WIDE_INT >= 64
1289 else if (BITS_PER_WORD >= 64 && i <= 1)
1291 val = k[i*2 + ! WORDS_BIG_ENDIAN];
1292 val = (((val & 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1293 val |= (HOST_WIDE_INT) k[i*2 + WORDS_BIG_ENDIAN] & 0xffffffff;
1294 return GEN_INT (val);
1300 #else /* no REAL_ARITHMETIC */
1301 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1302 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1303 || flag_pretend_float)
1304 && GET_MODE_CLASS (mode) == MODE_FLOAT
1305 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1306 && GET_CODE (op) == CONST_DOUBLE)
1308 /* The constant is stored in the host's word-ordering,
1309 but we want to access it in the target's word-ordering. Some
1310 compilers don't like a conditional inside macro args, so we have two
1311 copies of the return. */
1312 #ifdef HOST_WORDS_BIG_ENDIAN
1313 return GEN_INT (i == WORDS_BIG_ENDIAN
1314 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1316 return GEN_INT (i != WORDS_BIG_ENDIAN
1317 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1320 #endif /* no REAL_ARITHMETIC */
1322 /* Single word float is a little harder, since single- and double-word
1323 values often do not have the same high-order bits. We have already
1324 verified that we want the only defined word of the single-word value. */
1325 #ifdef REAL_ARITHMETIC
1326 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1327 && GET_MODE_BITSIZE (mode) == 32
1328 && GET_CODE (op) == CONST_DOUBLE)
1333 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1334 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1336 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1338 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
1340 if (BITS_PER_WORD == 16)
1342 if ((i & 1) == !WORDS_BIG_ENDIAN)
1347 return GEN_INT (val);
1350 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1351 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1352 || flag_pretend_float)
1353 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1354 && GET_MODE_CLASS (mode) == MODE_FLOAT
1355 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1356 && GET_CODE (op) == CONST_DOUBLE)
1359 union {float f; HOST_WIDE_INT i; } u;
1361 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1364 return GEN_INT (u.i);
1366 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1367 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1368 || flag_pretend_float)
1369 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1370 && GET_MODE_CLASS (mode) == MODE_FLOAT
1371 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1372 && GET_CODE (op) == CONST_DOUBLE)
1375 union {double d; HOST_WIDE_INT i; } u;
1377 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1380 return GEN_INT (u.i);
1382 #endif /* no REAL_ARITHMETIC */
1384 /* The only remaining cases that we can handle are integers.
1385 Convert to proper endianness now since these cases need it.
1386 At this point, i == 0 means the low-order word.
1388 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1389 in general. However, if OP is (const_int 0), we can just return
1392 if (op == const0_rtx)
1395 if (GET_MODE_CLASS (mode) != MODE_INT
1396 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1397 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1400 if (WORDS_BIG_ENDIAN)
1401 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1403 /* Find out which word on the host machine this value is in and get
1404 it from the constant. */
1405 val = (i / size_ratio == 0
1406 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1407 : (GET_CODE (op) == CONST_INT
1408 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1410 /* Get the value we want into the low bits of val. */
1411 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1412 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1414 val = trunc_int_for_mode (val, word_mode);
1416 return GEN_INT (val);
1419 /* Similar to `operand_subword', but never return 0. If we can't extract
1420 the required subword, put OP into a register and try again. If that fails,
1421 abort. We always validate the address in this case. It is not valid
1422 to call this function after reload; it is mostly meant for RTL
1425 MODE is the mode of OP, in case it is CONST_INT. */
1428 operand_subword_force (op, i, mode)
1431 enum machine_mode mode;
1433 rtx result = operand_subword (op, i, 1, mode);
1438 if (mode != BLKmode && mode != VOIDmode)
1440 /* If this is a register which can not be accessed by words, copy it
1441 to a pseudo register. */
1442 if (GET_CODE (op) == REG)
1443 op = copy_to_reg (op);
1445 op = force_reg (mode, op);
1448 result = operand_subword (op, i, 1, mode);
1455 /* Given a compare instruction, swap the operands.
1456 A test instruction is changed into a compare of 0 against the operand. */
1459 reverse_comparison (insn)
1462 rtx body = PATTERN (insn);
1465 if (GET_CODE (body) == SET)
1466 comp = SET_SRC (body);
1468 comp = SET_SRC (XVECEXP (body, 0, 0));
1470 if (GET_CODE (comp) == COMPARE)
1472 rtx op0 = XEXP (comp, 0);
1473 rtx op1 = XEXP (comp, 1);
1474 XEXP (comp, 0) = op1;
1475 XEXP (comp, 1) = op0;
1479 rtx new = gen_rtx_COMPARE (VOIDmode,
1480 CONST0_RTX (GET_MODE (comp)), comp);
1481 if (GET_CODE (body) == SET)
1482 SET_SRC (body) = new;
1484 SET_SRC (XVECEXP (body, 0, 0)) = new;
1488 /* Return a memory reference like MEMREF, but with its mode changed
1489 to MODE and its address changed to ADDR.
1490 (VOIDmode means don't change the mode.
1491 NULL for ADDR means don't change the address.) */
1494 change_address (memref, mode, addr)
1496 enum machine_mode mode;
1501 if (GET_CODE (memref) != MEM)
1503 if (mode == VOIDmode)
1504 mode = GET_MODE (memref);
1506 addr = XEXP (memref, 0);
1508 /* If reload is in progress or has completed, ADDR must be valid.
1509 Otherwise, we can call memory_address to make it valid. */
1510 if (reload_completed || reload_in_progress)
1512 if (! memory_address_p (mode, addr))
1516 addr = memory_address (mode, addr);
1518 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1521 new = gen_rtx_MEM (mode, addr);
1522 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1523 MEM_COPY_ATTRIBUTES (new, memref);
1524 MEM_ALIAS_SET (new) = MEM_ALIAS_SET (memref);
1528 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1535 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1536 NULL_RTX, label_num++, NULL_PTR, NULL_PTR);
1538 LABEL_NUSES (label) = 0;
1539 LABEL_ALTERNATE_NAME (label) = NULL;
1543 /* For procedure integration. */
1545 /* Install new pointers to the first and last insns in the chain.
1546 Also, set cur_insn_uid to one higher than the last in use.
1547 Used for an inline-procedure after copying the insn chain. */
1550 set_new_first_and_last_insn (first, last)
1559 for (insn = first; insn; insn = NEXT_INSN (insn))
1560 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1565 /* Set the range of label numbers found in the current function.
1566 This is used when belatedly compiling an inline function. */
1569 set_new_first_and_last_label_num (first, last)
1572 base_label_num = label_num;
1573 first_label_num = first;
1574 last_label_num = last;
1577 /* Set the last label number found in the current function.
1578 This is used when belatedly compiling an inline function. */
1581 set_new_last_label_num (last)
1584 base_label_num = label_num;
1585 last_label_num = last;
1588 /* Restore all variables describing the current status from the structure *P.
1589 This is used after a nested function. */
1592 restore_emit_status (p)
1593 struct function *p ATTRIBUTE_UNUSED;
1596 clear_emit_caches ();
1599 /* Clear out all parts of the state in F that can safely be discarded
1600 after the function has been compiled, to let garbage collection
1601 reclaim the memory. */
1604 free_emit_status (f)
1607 free (f->emit->x_regno_reg_rtx);
1608 free (f->emit->regno_pointer_flag);
1609 free (f->emit->regno_pointer_align);
1614 /* Go through all the RTL insn bodies and copy any invalid shared
1615 structure. This routine should only be called once. */
1618 unshare_all_rtl (fndecl, insn)
1624 /* Make sure that virtual parameters are not shared. */
1625 for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl))
1627 copy_rtx_if_shared (DECL_RTL (decl));
1630 /* Unshare just about everything else. */
1631 unshare_all_rtl_1 (insn);
1633 /* Make sure the addresses of stack slots found outside the insn chain
1634 (such as, in DECL_RTL of a variable) are not shared
1635 with the insn chain.
1637 This special care is necessary when the stack slot MEM does not
1638 actually appear in the insn chain. If it does appear, its address
1639 is unshared from all else at that point. */
1640 copy_rtx_if_shared (stack_slot_list);
1643 /* Go through all the RTL insn bodies and copy any invalid shared
1644 structure, again. This is a fairly expensive thing to do so it
1645 should be done sparingly. */
1648 unshare_all_rtl_again (insn)
1652 for (p = insn; p; p = NEXT_INSN (p))
1653 if (GET_RTX_CLASS (GET_CODE (p)) == 'i')
1655 reset_used_flags (PATTERN (p));
1656 reset_used_flags (REG_NOTES (p));
1657 reset_used_flags (LOG_LINKS (p));
1659 unshare_all_rtl_1 (insn);
1662 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1663 Assumes the mark bits are cleared at entry. */
1666 unshare_all_rtl_1 (insn)
1669 for (; insn; insn = NEXT_INSN (insn))
1670 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
1672 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1673 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1674 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1678 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1679 Recursively does the same for subexpressions. */
1682 copy_rtx_if_shared (orig)
1685 register rtx x = orig;
1687 register enum rtx_code code;
1688 register const char *format_ptr;
1694 code = GET_CODE (x);
1696 /* These types may be freely shared. */
1709 /* SCRATCH must be shared because they represent distinct values. */
1713 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1714 a LABEL_REF, it isn't sharable. */
1715 if (GET_CODE (XEXP (x, 0)) == PLUS
1716 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1717 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1726 /* The chain of insns is not being copied. */
1730 /* A MEM is allowed to be shared if its address is constant.
1732 We used to allow sharing of MEMs which referenced
1733 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1734 that can lose. instantiate_virtual_regs will not unshare
1735 the MEMs, and combine may change the structure of the address
1736 because it looks safe and profitable in one context, but
1737 in some other context it creates unrecognizable RTL. */
1738 if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
1747 /* This rtx may not be shared. If it has already been seen,
1748 replace it with a copy of itself. */
1754 copy = rtx_alloc (code);
1755 bcopy ((char *) x, (char *) copy,
1756 (sizeof (*copy) - sizeof (copy->fld)
1757 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1763 /* Now scan the subexpressions recursively.
1764 We can store any replaced subexpressions directly into X
1765 since we know X is not shared! Any vectors in X
1766 must be copied if X was copied. */
1768 format_ptr = GET_RTX_FORMAT (code);
1770 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1772 switch (*format_ptr++)
1775 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1779 if (XVEC (x, i) != NULL)
1782 int len = XVECLEN (x, i);
1784 if (copied && len > 0)
1785 XVEC (x, i) = gen_rtvec_v (len, XVEC (x, i)->elem);
1786 for (j = 0; j < len; j++)
1787 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1795 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1796 to look for shared sub-parts. */
1799 reset_used_flags (x)
1803 register enum rtx_code code;
1804 register const char *format_ptr;
1809 code = GET_CODE (x);
1811 /* These types may be freely shared so we needn't do any resetting
1832 /* The chain of insns is not being copied. */
1841 format_ptr = GET_RTX_FORMAT (code);
1842 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1844 switch (*format_ptr++)
1847 reset_used_flags (XEXP (x, i));
1851 for (j = 0; j < XVECLEN (x, i); j++)
1852 reset_used_flags (XVECEXP (x, i, j));
1858 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1859 Return X or the rtx for the pseudo reg the value of X was copied into.
1860 OTHER must be valid as a SET_DEST. */
1863 make_safe_from (x, other)
1867 switch (GET_CODE (other))
1870 other = SUBREG_REG (other);
1872 case STRICT_LOW_PART:
1875 other = XEXP (other, 0);
1881 if ((GET_CODE (other) == MEM
1883 && GET_CODE (x) != REG
1884 && GET_CODE (x) != SUBREG)
1885 || (GET_CODE (other) == REG
1886 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1887 || reg_mentioned_p (other, x))))
1889 rtx temp = gen_reg_rtx (GET_MODE (x));
1890 emit_move_insn (temp, x);
1896 /* Emission of insns (adding them to the doubly-linked list). */
1898 /* Return the first insn of the current sequence or current function. */
1906 /* Return the last insn emitted in current sequence or current function. */
1914 /* Specify a new insn as the last in the chain. */
1917 set_last_insn (insn)
1920 if (NEXT_INSN (insn) != 0)
1925 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1928 get_last_insn_anywhere ()
1930 struct sequence_stack *stack;
1933 for (stack = seq_stack; stack; stack = stack->next)
1934 if (stack->last != 0)
1939 /* Return a number larger than any instruction's uid in this function. */
1944 return cur_insn_uid;
1947 /* Renumber instructions so that no instruction UIDs are wasted. */
1950 renumber_insns (stream)
1955 /* If we're not supposed to renumber instructions, don't. */
1956 if (!flag_renumber_insns)
1959 /* If there aren't that many instructions, then it's not really
1960 worth renumbering them. */
1961 if (flag_renumber_insns == 1 && get_max_uid () < 25000)
1966 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
1969 fprintf (stream, "Renumbering insn %d to %d\n",
1970 INSN_UID (insn), cur_insn_uid);
1971 INSN_UID (insn) = cur_insn_uid++;
1975 /* Return the next insn. If it is a SEQUENCE, return the first insn
1984 insn = NEXT_INSN (insn);
1985 if (insn && GET_CODE (insn) == INSN
1986 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1987 insn = XVECEXP (PATTERN (insn), 0, 0);
1993 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1997 previous_insn (insn)
2002 insn = PREV_INSN (insn);
2003 if (insn && GET_CODE (insn) == INSN
2004 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2005 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
2011 /* Return the next insn after INSN that is not a NOTE. This routine does not
2012 look inside SEQUENCEs. */
2015 next_nonnote_insn (insn)
2020 insn = NEXT_INSN (insn);
2021 if (insn == 0 || GET_CODE (insn) != NOTE)
2028 /* Return the previous insn before INSN that is not a NOTE. This routine does
2029 not look inside SEQUENCEs. */
2032 prev_nonnote_insn (insn)
2037 insn = PREV_INSN (insn);
2038 if (insn == 0 || GET_CODE (insn) != NOTE)
2045 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2046 or 0, if there is none. This routine does not look inside
2050 next_real_insn (insn)
2055 insn = NEXT_INSN (insn);
2056 if (insn == 0 || GET_CODE (insn) == INSN
2057 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2064 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2065 or 0, if there is none. This routine does not look inside
2069 prev_real_insn (insn)
2074 insn = PREV_INSN (insn);
2075 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2076 || GET_CODE (insn) == JUMP_INSN)
2083 /* Find the next insn after INSN that really does something. This routine
2084 does not look inside SEQUENCEs. Until reload has completed, this is the
2085 same as next_real_insn. */
2088 active_insn_p (insn)
2091 return (GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2092 || (GET_CODE (insn) == INSN
2093 && (! reload_completed
2094 || (GET_CODE (PATTERN (insn)) != USE
2095 && GET_CODE (PATTERN (insn)) != CLOBBER))));
2099 next_active_insn (insn)
2104 insn = NEXT_INSN (insn);
2105 if (insn == 0 || active_insn_p (insn))
2112 /* Find the last insn before INSN that really does something. This routine
2113 does not look inside SEQUENCEs. Until reload has completed, this is the
2114 same as prev_real_insn. */
2117 prev_active_insn (insn)
2122 insn = PREV_INSN (insn);
2123 if (insn == 0 || active_insn_p (insn))
2130 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2138 insn = NEXT_INSN (insn);
2139 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2146 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2154 insn = PREV_INSN (insn);
2155 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2163 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2164 and REG_CC_USER notes so we can find it. */
2167 link_cc0_insns (insn)
2170 rtx user = next_nonnote_insn (insn);
2172 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2173 user = XVECEXP (PATTERN (user), 0, 0);
2175 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn,
2177 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2180 /* Return the next insn that uses CC0 after INSN, which is assumed to
2181 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2182 applied to the result of this function should yield INSN).
2184 Normally, this is simply the next insn. However, if a REG_CC_USER note
2185 is present, it contains the insn that uses CC0.
2187 Return 0 if we can't find the insn. */
2190 next_cc0_user (insn)
2193 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2196 return XEXP (note, 0);
2198 insn = next_nonnote_insn (insn);
2199 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2200 insn = XVECEXP (PATTERN (insn), 0, 0);
2202 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2203 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2209 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2210 note, it is the previous insn. */
2213 prev_cc0_setter (insn)
2216 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2219 return XEXP (note, 0);
2221 insn = prev_nonnote_insn (insn);
2222 if (! sets_cc0_p (PATTERN (insn)))
2229 /* Try splitting insns that can be split for better scheduling.
2230 PAT is the pattern which might split.
2231 TRIAL is the insn providing PAT.
2232 LAST is non-zero if we should return the last insn of the sequence produced.
2234 If this routine succeeds in splitting, it returns the first or last
2235 replacement insn depending on the value of LAST. Otherwise, it
2236 returns TRIAL. If the insn to be returned can be split, it will be. */
2239 try_split (pat, trial, last)
2243 rtx before = PREV_INSN (trial);
2244 rtx after = NEXT_INSN (trial);
2245 rtx seq = split_insns (pat, trial);
2246 int has_barrier = 0;
2249 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2250 We may need to handle this specially. */
2251 if (after && GET_CODE (after) == BARRIER)
2254 after = NEXT_INSN (after);
2259 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2260 The latter case will normally arise only when being done so that
2261 it, in turn, will be split (SFmode on the 29k is an example). */
2262 if (GET_CODE (seq) == SEQUENCE)
2264 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2265 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2266 increment the usage count so we don't delete the label. */
2269 if (GET_CODE (trial) == JUMP_INSN)
2270 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2271 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2273 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2275 if (JUMP_LABEL (trial))
2276 LABEL_NUSES (JUMP_LABEL (trial))++;
2279 tem = emit_insn_after (seq, before);
2281 delete_insn (trial);
2283 emit_barrier_after (tem);
2285 /* Recursively call try_split for each new insn created; by the
2286 time control returns here that insn will be fully split, so
2287 set LAST and continue from the insn after the one returned.
2288 We can't use next_active_insn here since AFTER may be a note.
2289 Ignore deleted insns, which can be occur if not optimizing. */
2290 for (tem = NEXT_INSN (before); tem != after;
2291 tem = NEXT_INSN (tem))
2292 if (! INSN_DELETED_P (tem)
2293 && GET_RTX_CLASS (GET_CODE (tem)) == 'i')
2294 tem = try_split (PATTERN (tem), tem, 1);
2296 /* Avoid infinite loop if the result matches the original pattern. */
2297 else if (rtx_equal_p (seq, pat))
2301 PATTERN (trial) = seq;
2302 INSN_CODE (trial) = -1;
2303 try_split (seq, trial, last);
2306 /* Return either the first or the last insn, depending on which was
2309 ? (after ? prev_active_insn (after) : last_insn)
2310 : next_active_insn (before);
2316 /* Make and return an INSN rtx, initializing all its slots.
2317 Store PATTERN in the pattern slots. */
2320 make_insn_raw (pattern)
2325 /* If in RTL generation phase, see if FREE_INSN can be used. */
2326 if (!ggc_p && free_insn != 0 && rtx_equal_function_value_matters)
2329 free_insn = NEXT_INSN (free_insn);
2330 PUT_CODE (insn, INSN);
2333 insn = rtx_alloc (INSN);
2335 INSN_UID (insn) = cur_insn_uid++;
2336 PATTERN (insn) = pattern;
2337 INSN_CODE (insn) = -1;
2338 LOG_LINKS (insn) = NULL;
2339 REG_NOTES (insn) = NULL;
2344 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2347 make_jump_insn_raw (pattern)
2352 insn = rtx_alloc (JUMP_INSN);
2353 INSN_UID (insn) = cur_insn_uid++;
2355 PATTERN (insn) = pattern;
2356 INSN_CODE (insn) = -1;
2357 LOG_LINKS (insn) = NULL;
2358 REG_NOTES (insn) = NULL;
2359 JUMP_LABEL (insn) = NULL;
2364 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2367 make_call_insn_raw (pattern)
2372 insn = rtx_alloc (CALL_INSN);
2373 INSN_UID (insn) = cur_insn_uid++;
2375 PATTERN (insn) = pattern;
2376 INSN_CODE (insn) = -1;
2377 LOG_LINKS (insn) = NULL;
2378 REG_NOTES (insn) = NULL;
2379 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2384 /* Add INSN to the end of the doubly-linked list.
2385 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2391 PREV_INSN (insn) = last_insn;
2392 NEXT_INSN (insn) = 0;
2394 if (NULL != last_insn)
2395 NEXT_INSN (last_insn) = insn;
2397 if (NULL == first_insn)
2403 /* Add INSN into the doubly-linked list after insn AFTER. This and
2404 the next should be the only functions called to insert an insn once
2405 delay slots have been filled since only they know how to update a
2409 add_insn_after (insn, after)
2412 rtx next = NEXT_INSN (after);
2414 if (optimize && INSN_DELETED_P (after))
2417 NEXT_INSN (insn) = next;
2418 PREV_INSN (insn) = after;
2422 PREV_INSN (next) = insn;
2423 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2424 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2426 else if (last_insn == after)
2430 struct sequence_stack *stack = seq_stack;
2431 /* Scan all pending sequences too. */
2432 for (; stack; stack = stack->next)
2433 if (after == stack->last)
2443 NEXT_INSN (after) = insn;
2444 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2446 rtx sequence = PATTERN (after);
2447 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2451 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2452 the previous should be the only functions called to insert an insn once
2453 delay slots have been filled since only they know how to update a
2457 add_insn_before (insn, before)
2460 rtx prev = PREV_INSN (before);
2462 if (optimize && INSN_DELETED_P (before))
2465 PREV_INSN (insn) = prev;
2466 NEXT_INSN (insn) = before;
2470 NEXT_INSN (prev) = insn;
2471 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2473 rtx sequence = PATTERN (prev);
2474 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2477 else if (first_insn == before)
2481 struct sequence_stack *stack = seq_stack;
2482 /* Scan all pending sequences too. */
2483 for (; stack; stack = stack->next)
2484 if (before == stack->first)
2486 stack->first = insn;
2494 PREV_INSN (before) = insn;
2495 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2496 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2499 /* Remove an insn from its doubly-linked list. This function knows how
2500 to handle sequences. */
2505 rtx next = NEXT_INSN (insn);
2506 rtx prev = PREV_INSN (insn);
2509 NEXT_INSN (prev) = next;
2510 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2512 rtx sequence = PATTERN (prev);
2513 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = next;
2516 else if (first_insn == insn)
2520 struct sequence_stack *stack = seq_stack;
2521 /* Scan all pending sequences too. */
2522 for (; stack; stack = stack->next)
2523 if (insn == stack->first)
2525 stack->first = next;
2535 PREV_INSN (next) = prev;
2536 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2537 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = prev;
2539 else if (last_insn == insn)
2543 struct sequence_stack *stack = seq_stack;
2544 /* Scan all pending sequences too. */
2545 for (; stack; stack = stack->next)
2546 if (insn == stack->last)
2557 /* Delete all insns made since FROM.
2558 FROM becomes the new last instruction. */
2561 delete_insns_since (from)
2567 NEXT_INSN (from) = 0;
2571 /* This function is deprecated, please use sequences instead.
2573 Move a consecutive bunch of insns to a different place in the chain.
2574 The insns to be moved are those between FROM and TO.
2575 They are moved to a new position after the insn AFTER.
2576 AFTER must not be FROM or TO or any insn in between.
2578 This function does not know about SEQUENCEs and hence should not be
2579 called after delay-slot filling has been done. */
2582 reorder_insns (from, to, after)
2583 rtx from, to, after;
2585 /* Splice this bunch out of where it is now. */
2586 if (PREV_INSN (from))
2587 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2589 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2590 if (last_insn == to)
2591 last_insn = PREV_INSN (from);
2592 if (first_insn == from)
2593 first_insn = NEXT_INSN (to);
2595 /* Make the new neighbors point to it and it to them. */
2596 if (NEXT_INSN (after))
2597 PREV_INSN (NEXT_INSN (after)) = to;
2599 NEXT_INSN (to) = NEXT_INSN (after);
2600 PREV_INSN (from) = after;
2601 NEXT_INSN (after) = from;
2602 if (after == last_insn)
2606 /* Return the line note insn preceding INSN. */
2609 find_line_note (insn)
2612 if (no_line_numbers)
2615 for (; insn; insn = PREV_INSN (insn))
2616 if (GET_CODE (insn) == NOTE
2617 && NOTE_LINE_NUMBER (insn) >= 0)
2623 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2624 of the moved insns when debugging. This may insert a note between AFTER
2625 and FROM, and another one after TO. */
2628 reorder_insns_with_line_notes (from, to, after)
2629 rtx from, to, after;
2631 rtx from_line = find_line_note (from);
2632 rtx after_line = find_line_note (after);
2634 reorder_insns (from, to, after);
2636 if (from_line == after_line)
2640 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2641 NOTE_LINE_NUMBER (from_line),
2644 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2645 NOTE_LINE_NUMBER (after_line),
2649 /* Remove unncessary notes from the instruction stream. */
2652 remove_unncessary_notes ()
2657 /* Remove NOTE_INSN_DELETED notes. We must not remove the first
2658 instruction in the function because the compiler depends on the
2659 first instruction being a note. */
2660 for (insn = NEXT_INSN (get_insns ()); insn; insn = next)
2662 /* Remember what's next. */
2663 next = NEXT_INSN (insn);
2665 /* We're only interested in notes. */
2666 if (GET_CODE (insn) != NOTE)
2669 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
2675 /* Emit an insn of given code and pattern
2676 at a specified place within the doubly-linked list. */
2678 /* Make an instruction with body PATTERN
2679 and output it before the instruction BEFORE. */
2682 emit_insn_before (pattern, before)
2683 register rtx pattern, before;
2685 register rtx insn = before;
2687 if (GET_CODE (pattern) == SEQUENCE)
2691 for (i = 0; i < XVECLEN (pattern, 0); i++)
2693 insn = XVECEXP (pattern, 0, i);
2694 add_insn_before (insn, before);
2696 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2697 sequence_result[XVECLEN (pattern, 0)] = pattern;
2701 insn = make_insn_raw (pattern);
2702 add_insn_before (insn, before);
2708 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2711 emit_block_insn_before (pattern, before, block)
2712 rtx pattern, before;
2715 rtx prev = PREV_INSN (before);
2716 rtx r = emit_insn_before (pattern, before);
2717 if (block && block->head == before)
2718 block->head = NEXT_INSN (prev);
2722 /* Make an instruction with body PATTERN and code JUMP_INSN
2723 and output it before the instruction BEFORE. */
2726 emit_jump_insn_before (pattern, before)
2727 register rtx pattern, before;
2731 if (GET_CODE (pattern) == SEQUENCE)
2732 insn = emit_insn_before (pattern, before);
2735 insn = make_jump_insn_raw (pattern);
2736 add_insn_before (insn, before);
2742 /* Make an instruction with body PATTERN and code CALL_INSN
2743 and output it before the instruction BEFORE. */
2746 emit_call_insn_before (pattern, before)
2747 register rtx pattern, before;
2751 if (GET_CODE (pattern) == SEQUENCE)
2752 insn = emit_insn_before (pattern, before);
2755 insn = make_call_insn_raw (pattern);
2756 add_insn_before (insn, before);
2757 PUT_CODE (insn, CALL_INSN);
2763 /* Make an insn of code BARRIER
2764 and output it before the insn BEFORE. */
2767 emit_barrier_before (before)
2768 register rtx before;
2770 register rtx insn = rtx_alloc (BARRIER);
2772 INSN_UID (insn) = cur_insn_uid++;
2774 add_insn_before (insn, before);
2778 /* Emit the label LABEL before the insn BEFORE. */
2781 emit_label_before (label, before)
2784 /* This can be called twice for the same label as a result of the
2785 confusion that follows a syntax error! So make it harmless. */
2786 if (INSN_UID (label) == 0)
2788 INSN_UID (label) = cur_insn_uid++;
2789 add_insn_before (label, before);
2795 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2798 emit_note_before (subtype, before)
2802 register rtx note = rtx_alloc (NOTE);
2803 INSN_UID (note) = cur_insn_uid++;
2804 NOTE_SOURCE_FILE (note) = 0;
2805 NOTE_LINE_NUMBER (note) = subtype;
2807 add_insn_before (note, before);
2811 /* Make an insn of code INSN with body PATTERN
2812 and output it after the insn AFTER. */
2815 emit_insn_after (pattern, after)
2816 register rtx pattern, after;
2818 register rtx insn = after;
2820 if (GET_CODE (pattern) == SEQUENCE)
2824 for (i = 0; i < XVECLEN (pattern, 0); i++)
2826 insn = XVECEXP (pattern, 0, i);
2827 add_insn_after (insn, after);
2830 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2831 sequence_result[XVECLEN (pattern, 0)] = pattern;
2835 insn = make_insn_raw (pattern);
2836 add_insn_after (insn, after);
2842 /* Similar to emit_insn_after, except that line notes are to be inserted so
2843 as to act as if this insn were at FROM. */
2846 emit_insn_after_with_line_notes (pattern, after, from)
2847 rtx pattern, after, from;
2849 rtx from_line = find_line_note (from);
2850 rtx after_line = find_line_note (after);
2851 rtx insn = emit_insn_after (pattern, after);
2854 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2855 NOTE_LINE_NUMBER (from_line),
2859 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2860 NOTE_LINE_NUMBER (after_line),
2864 /* Similar to emit_insn_after, but update basic block boundaries as well. */
2867 emit_block_insn_after (pattern, after, block)
2871 rtx r = emit_insn_after (pattern, after);
2872 if (block && block->end == after)
2877 /* Make an insn of code JUMP_INSN with body PATTERN
2878 and output it after the insn AFTER. */
2881 emit_jump_insn_after (pattern, after)
2882 register rtx pattern, after;
2886 if (GET_CODE (pattern) == SEQUENCE)
2887 insn = emit_insn_after (pattern, after);
2890 insn = make_jump_insn_raw (pattern);
2891 add_insn_after (insn, after);
2897 /* Make an insn of code BARRIER
2898 and output it after the insn AFTER. */
2901 emit_barrier_after (after)
2904 register rtx insn = rtx_alloc (BARRIER);
2906 INSN_UID (insn) = cur_insn_uid++;
2908 add_insn_after (insn, after);
2912 /* Emit the label LABEL after the insn AFTER. */
2915 emit_label_after (label, after)
2918 /* This can be called twice for the same label
2919 as a result of the confusion that follows a syntax error!
2920 So make it harmless. */
2921 if (INSN_UID (label) == 0)
2923 INSN_UID (label) = cur_insn_uid++;
2924 add_insn_after (label, after);
2930 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2933 emit_note_after (subtype, after)
2937 register rtx note = rtx_alloc (NOTE);
2938 INSN_UID (note) = cur_insn_uid++;
2939 NOTE_SOURCE_FILE (note) = 0;
2940 NOTE_LINE_NUMBER (note) = subtype;
2941 add_insn_after (note, after);
2945 /* Emit a line note for FILE and LINE after the insn AFTER. */
2948 emit_line_note_after (file, line, after)
2955 if (no_line_numbers && line > 0)
2961 note = rtx_alloc (NOTE);
2962 INSN_UID (note) = cur_insn_uid++;
2963 NOTE_SOURCE_FILE (note) = file;
2964 NOTE_LINE_NUMBER (note) = line;
2965 add_insn_after (note, after);
2969 /* Make an insn of code INSN with pattern PATTERN
2970 and add it to the end of the doubly-linked list.
2971 If PATTERN is a SEQUENCE, take the elements of it
2972 and emit an insn for each element.
2974 Returns the last insn emitted. */
2980 rtx insn = last_insn;
2982 if (GET_CODE (pattern) == SEQUENCE)
2986 for (i = 0; i < XVECLEN (pattern, 0); i++)
2988 insn = XVECEXP (pattern, 0, i);
2991 if (!ggc_p && XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2992 sequence_result[XVECLEN (pattern, 0)] = pattern;
2996 insn = make_insn_raw (pattern);
3000 #ifdef ENABLE_RTL_CHECKING
3002 && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
3003 && (returnjump_p (insn)
3004 || (GET_CODE (insn) == SET
3005 && SET_DEST (insn) == pc_rtx)))
3007 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
3015 /* Emit the insns in a chain starting with INSN.
3016 Return the last insn emitted. */
3026 rtx next = NEXT_INSN (insn);
3035 /* Emit the insns in a chain starting with INSN and place them in front of
3036 the insn BEFORE. Return the last insn emitted. */
3039 emit_insns_before (insn, before)
3047 rtx next = NEXT_INSN (insn);
3048 add_insn_before (insn, before);
3056 /* Emit the insns in a chain starting with FIRST and place them in back of
3057 the insn AFTER. Return the last insn emitted. */
3060 emit_insns_after (first, after)
3065 register rtx after_after;
3073 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
3076 after_after = NEXT_INSN (after);
3078 NEXT_INSN (after) = first;
3079 PREV_INSN (first) = after;
3080 NEXT_INSN (last) = after_after;
3082 PREV_INSN (after_after) = last;
3084 if (after == last_insn)
3089 /* Make an insn of code JUMP_INSN with pattern PATTERN
3090 and add it to the end of the doubly-linked list. */
3093 emit_jump_insn (pattern)
3096 if (GET_CODE (pattern) == SEQUENCE)
3097 return emit_insn (pattern);
3100 register rtx insn = make_jump_insn_raw (pattern);
3106 /* Make an insn of code CALL_INSN with pattern PATTERN
3107 and add it to the end of the doubly-linked list. */
3110 emit_call_insn (pattern)
3113 if (GET_CODE (pattern) == SEQUENCE)
3114 return emit_insn (pattern);
3117 register rtx insn = make_call_insn_raw (pattern);
3119 PUT_CODE (insn, CALL_INSN);
3124 /* Add the label LABEL to the end of the doubly-linked list. */
3130 /* This can be called twice for the same label
3131 as a result of the confusion that follows a syntax error!
3132 So make it harmless. */
3133 if (INSN_UID (label) == 0)
3135 INSN_UID (label) = cur_insn_uid++;
3141 /* Make an insn of code BARRIER
3142 and add it to the end of the doubly-linked list. */
3147 register rtx barrier = rtx_alloc (BARRIER);
3148 INSN_UID (barrier) = cur_insn_uid++;
3153 /* Make an insn of code NOTE
3154 with data-fields specified by FILE and LINE
3155 and add it to the end of the doubly-linked list,
3156 but only if line-numbers are desired for debugging info. */
3159 emit_line_note (file, line)
3163 set_file_and_line_for_stmt (file, line);
3166 if (no_line_numbers)
3170 return emit_note (file, line);
3173 /* Make an insn of code NOTE
3174 with data-fields specified by FILE and LINE
3175 and add it to the end of the doubly-linked list.
3176 If it is a line-number NOTE, omit it if it matches the previous one. */
3179 emit_note (file, line)
3187 if (file && last_filename && !strcmp (file, last_filename)
3188 && line == last_linenum)
3190 last_filename = file;
3191 last_linenum = line;
3194 if (no_line_numbers && line > 0)
3200 note = rtx_alloc (NOTE);
3201 INSN_UID (note) = cur_insn_uid++;
3202 NOTE_SOURCE_FILE (note) = file;
3203 NOTE_LINE_NUMBER (note) = line;
3208 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3211 emit_line_note_force (file, line)
3216 return emit_line_note (file, line);
3219 /* Cause next statement to emit a line note even if the line number
3220 has not changed. This is used at the beginning of a function. */
3223 force_next_line_note ()
3228 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3229 note of this type already exists, remove it first. */
3232 set_unique_reg_note (insn, kind, datum)
3237 rtx note = find_reg_note (insn, kind, NULL_RTX);
3239 /* First remove the note if there already is one. */
3241 remove_note (insn, note);
3243 REG_NOTES (insn) = gen_rtx_EXPR_LIST (kind, datum, REG_NOTES (insn));
3246 /* Return an indication of which type of insn should have X as a body.
3247 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3253 if (GET_CODE (x) == CODE_LABEL)
3255 if (GET_CODE (x) == CALL)
3257 if (GET_CODE (x) == RETURN)
3259 if (GET_CODE (x) == SET)
3261 if (SET_DEST (x) == pc_rtx)
3263 else if (GET_CODE (SET_SRC (x)) == CALL)
3268 if (GET_CODE (x) == PARALLEL)
3271 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3272 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3274 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3275 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3277 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3278 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3284 /* Emit the rtl pattern X as an appropriate kind of insn.
3285 If X is a label, it is simply added into the insn chain. */
3291 enum rtx_code code = classify_insn (x);
3293 if (code == CODE_LABEL)
3294 return emit_label (x);
3295 else if (code == INSN)
3296 return emit_insn (x);
3297 else if (code == JUMP_INSN)
3299 register rtx insn = emit_jump_insn (x);
3300 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3301 return emit_barrier ();
3304 else if (code == CALL_INSN)
3305 return emit_call_insn (x);
3310 /* Begin emitting insns to a sequence which can be packaged in an
3311 RTL_EXPR. If this sequence will contain something that might cause
3312 the compiler to pop arguments to function calls (because those
3313 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3314 details), use do_pending_stack_adjust before calling this function.
3315 That will ensure that the deferred pops are not accidentally
3316 emitted in the middel of this sequence. */
3321 struct sequence_stack *tem;
3323 tem = (struct sequence_stack *) xmalloc (sizeof (struct sequence_stack));
3325 tem->next = seq_stack;
3326 tem->first = first_insn;
3327 tem->last = last_insn;
3328 tem->sequence_rtl_expr = seq_rtl_expr;
3336 /* Similarly, but indicate that this sequence will be placed in T, an
3337 RTL_EXPR. See the documentation for start_sequence for more
3338 information about how to use this function. */
3341 start_sequence_for_rtl_expr (t)
3349 /* Set up the insn chain starting with FIRST as the current sequence,
3350 saving the previously current one. See the documentation for
3351 start_sequence for more information about how to use this function. */
3354 push_to_sequence (first)
3361 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3367 /* Set up the outer-level insn chain
3368 as the current sequence, saving the previously current one. */
3371 push_topmost_sequence ()
3373 struct sequence_stack *stack, *top = NULL;
3377 for (stack = seq_stack; stack; stack = stack->next)
3380 first_insn = top->first;
3381 last_insn = top->last;
3382 seq_rtl_expr = top->sequence_rtl_expr;
3385 /* After emitting to the outer-level insn chain, update the outer-level
3386 insn chain, and restore the previous saved state. */
3389 pop_topmost_sequence ()
3391 struct sequence_stack *stack, *top = NULL;
3393 for (stack = seq_stack; stack; stack = stack->next)
3396 top->first = first_insn;
3397 top->last = last_insn;
3398 /* ??? Why don't we save seq_rtl_expr here? */
3403 /* After emitting to a sequence, restore previous saved state.
3405 To get the contents of the sequence just made, you must call
3406 `gen_sequence' *before* calling here.
3408 If the compiler might have deferred popping arguments while
3409 generating this sequence, and this sequence will not be immediately
3410 inserted into the instruction stream, use do_pending_stack_adjust
3411 before calling gen_sequence. That will ensure that the deferred
3412 pops are inserted into this sequence, and not into some random
3413 location in the instruction stream. See INHIBIT_DEFER_POP for more
3414 information about deferred popping of arguments. */
3419 struct sequence_stack *tem = seq_stack;
3421 first_insn = tem->first;
3422 last_insn = tem->last;
3423 seq_rtl_expr = tem->sequence_rtl_expr;
3424 seq_stack = tem->next;
3429 /* Return 1 if currently emitting into a sequence. */
3434 return seq_stack != 0;
3437 /* Generate a SEQUENCE rtx containing the insns already emitted
3438 to the current sequence.
3440 This is how the gen_... function from a DEFINE_EXPAND
3441 constructs the SEQUENCE that it returns. */
3451 /* Count the insns in the chain. */
3453 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3456 /* If only one insn, return it rather than a SEQUENCE.
3457 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3458 the case of an empty list.)
3459 We only return the pattern of an insn if its code is INSN and it
3460 has no notes. This ensures that no information gets lost. */
3462 && ! RTX_FRAME_RELATED_P (first_insn)
3463 && GET_CODE (first_insn) == INSN
3464 /* Don't throw away any reg notes. */
3465 && REG_NOTES (first_insn) == 0)
3469 NEXT_INSN (first_insn) = free_insn;
3470 free_insn = first_insn;
3472 return PATTERN (first_insn);
3475 /* Put them in a vector. See if we already have a SEQUENCE of the
3476 appropriate length around. */
3477 if (!ggc_p && len < SEQUENCE_RESULT_SIZE
3478 && (result = sequence_result[len]) != 0)
3479 sequence_result[len] = 0;
3482 /* Ensure that this rtl goes in saveable_obstack, since we may
3484 push_obstacks_nochange ();
3485 rtl_in_saveable_obstack ();
3486 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3490 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3491 XVECEXP (result, 0, i) = tem;
3496 /* Put the various virtual registers into REGNO_REG_RTX. */
3499 init_virtual_regs (es)
3500 struct emit_status *es;
3502 rtx *ptr = es->x_regno_reg_rtx;
3503 ptr[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3504 ptr[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3505 ptr[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3506 ptr[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3507 ptr[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3511 clear_emit_caches ()
3515 /* Clear the start_sequence/gen_sequence cache. */
3516 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3517 sequence_result[i] = 0;
3521 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3522 static rtx copy_insn_scratch_in[MAX_RECOG_OPERANDS];
3523 static rtx copy_insn_scratch_out[MAX_RECOG_OPERANDS];
3524 static int copy_insn_n_scratches;
3526 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3527 copied an ASM_OPERANDS.
3528 In that case, it is the original input-operand vector. */
3529 static rtvec orig_asm_operands_vector;
3531 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3532 copied an ASM_OPERANDS.
3533 In that case, it is the copied input-operand vector. */
3534 static rtvec copy_asm_operands_vector;
3536 /* Likewise for the constraints vector. */
3537 static rtvec orig_asm_constraints_vector;
3538 static rtvec copy_asm_constraints_vector;
3540 /* Recursively create a new copy of an rtx for copy_insn.
3541 This function differs from copy_rtx in that it handles SCRATCHes and
3542 ASM_OPERANDs properly.
3543 Normally, this function is not used directly; use copy_insn as front end.
3544 However, you could first copy an insn pattern with copy_insn and then use
3545 this function afterwards to properly copy any REG_NOTEs containing
3554 register RTX_CODE code;
3555 register const char *format_ptr;
3557 code = GET_CODE (orig);
3573 for (i = 0; i < copy_insn_n_scratches; i++)
3574 if (copy_insn_scratch_in[i] == orig)
3575 return copy_insn_scratch_out[i];
3579 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3580 a LABEL_REF, it isn't sharable. */
3581 if (GET_CODE (XEXP (orig, 0)) == PLUS
3582 && GET_CODE (XEXP (XEXP (orig, 0), 0)) == SYMBOL_REF
3583 && GET_CODE (XEXP (XEXP (orig, 0), 1)) == CONST_INT)
3587 /* A MEM with a constant address is not sharable. The problem is that
3588 the constant address may need to be reloaded. If the mem is shared,
3589 then reloading one copy of this mem will cause all copies to appear
3590 to have been reloaded. */
3596 copy = rtx_alloc (code);
3598 /* Copy the various flags, and other information. We assume that
3599 all fields need copying, and then clear the fields that should
3600 not be copied. That is the sensible default behavior, and forces
3601 us to explicitly document why we are *not* copying a flag. */
3602 memcpy (copy, orig, sizeof (struct rtx_def) - sizeof (rtunion));
3604 /* We do not copy the USED flag, which is used as a mark bit during
3605 walks over the RTL. */
3608 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3609 if (GET_RTX_CLASS (code) == 'i')
3613 copy->frame_related = 0;
3616 format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
3618 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
3620 copy->fld[i] = orig->fld[i];
3621 switch (*format_ptr++)
3624 if (XEXP (orig, i) != NULL)
3625 XEXP (copy, i) = copy_insn_1 (XEXP (orig, i));
3630 if (XVEC (orig, i) == orig_asm_constraints_vector)
3631 XVEC (copy, i) = copy_asm_constraints_vector;
3632 else if (XVEC (orig, i) == orig_asm_operands_vector)
3633 XVEC (copy, i) = copy_asm_operands_vector;
3634 else if (XVEC (orig, i) != NULL)
3636 XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
3637 for (j = 0; j < XVECLEN (copy, i); j++)
3638 XVECEXP (copy, i, j) = copy_insn_1 (XVECEXP (orig, i, j));
3644 bitmap new_bits = BITMAP_OBSTACK_ALLOC (rtl_obstack);
3645 bitmap_copy (new_bits, XBITMAP (orig, i));
3646 XBITMAP (copy, i) = new_bits;
3657 /* These are left unchanged. */
3665 if (code == SCRATCH)
3667 i = copy_insn_n_scratches++;
3668 if (i >= MAX_RECOG_OPERANDS)
3670 copy_insn_scratch_in[i] = orig;
3671 copy_insn_scratch_out[i] = copy;
3673 else if (code == ASM_OPERANDS)
3675 orig_asm_operands_vector = XVEC (orig, 3);
3676 copy_asm_operands_vector = XVEC (copy, 3);
3677 orig_asm_constraints_vector = XVEC (orig, 4);
3678 copy_asm_constraints_vector = XVEC (copy, 4);
3684 /* Create a new copy of an rtx.
3685 This function differs from copy_rtx in that it handles SCRATCHes and
3686 ASM_OPERANDs properly.
3687 INSN doesn't really have to be a full INSN; it could be just the
3693 copy_insn_n_scratches = 0;
3694 orig_asm_operands_vector = 0;
3695 orig_asm_constraints_vector = 0;
3696 copy_asm_operands_vector = 0;
3697 copy_asm_constraints_vector = 0;
3698 return copy_insn_1 (insn);
3701 /* Initialize data structures and variables in this file
3702 before generating rtl for each function. */
3707 struct function *f = cfun;
3709 f->emit = (struct emit_status *) xmalloc (sizeof (struct emit_status));
3712 seq_rtl_expr = NULL;
3714 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3717 first_label_num = label_num;
3721 clear_emit_caches ();
3723 /* Init the tables that describe all the pseudo regs. */
3725 f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3727 f->emit->regno_pointer_flag
3728 = (char *) xcalloc (f->emit->regno_pointer_flag_length, sizeof (char));
3730 f->emit->regno_pointer_align
3731 = (char *) xcalloc (f->emit->regno_pointer_flag_length,
3735 = (rtx *) xcalloc (f->emit->regno_pointer_flag_length * sizeof (rtx),
3738 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3739 init_virtual_regs (f->emit);
3741 /* Indicate that the virtual registers and stack locations are
3743 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3744 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3745 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3746 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3748 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3749 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3750 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3751 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3752 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3754 #ifdef STACK_BOUNDARY
3755 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3756 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3757 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3758 = STACK_BOUNDARY / BITS_PER_UNIT;
3759 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3761 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3762 = STACK_BOUNDARY / BITS_PER_UNIT;
3763 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3764 = STACK_BOUNDARY / BITS_PER_UNIT;
3765 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3766 = STACK_BOUNDARY / BITS_PER_UNIT;
3767 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3768 = STACK_BOUNDARY / BITS_PER_UNIT;
3769 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD;
3772 #ifdef INIT_EXPANDERS
3777 /* Mark SS for GC. */
3780 mark_sequence_stack (ss)
3781 struct sequence_stack *ss;
3785 ggc_mark_rtx (ss->first);
3786 ggc_mark_tree (ss->sequence_rtl_expr);
3791 /* Mark ES for GC. */
3794 mark_emit_status (es)
3795 struct emit_status *es;
3803 for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
3807 mark_sequence_stack (es->sequence_stack);
3808 ggc_mark_tree (es->sequence_rtl_expr);
3809 ggc_mark_rtx (es->x_first_insn);
3812 /* Create some permanent unique rtl objects shared between all functions.
3813 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3816 init_emit_once (line_numbers)
3820 enum machine_mode mode;
3821 enum machine_mode double_mode;
3823 no_line_numbers = ! line_numbers;
3825 /* Compute the word and byte modes. */
3827 byte_mode = VOIDmode;
3828 word_mode = VOIDmode;
3829 double_mode = VOIDmode;
3831 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3832 mode = GET_MODE_WIDER_MODE (mode))
3834 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3835 && byte_mode == VOIDmode)
3838 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3839 && word_mode == VOIDmode)
3843 #ifndef DOUBLE_TYPE_SIZE
3844 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3847 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3848 mode = GET_MODE_WIDER_MODE (mode))
3850 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
3851 && double_mode == VOIDmode)
3855 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3857 /* Assign register numbers to the globally defined register rtx.
3858 This must be done at runtime because the register number field
3859 is in a union and some compilers can't initialize unions. */
3861 pc_rtx = gen_rtx (PC, VOIDmode);
3862 cc0_rtx = gen_rtx (CC0, VOIDmode);
3863 stack_pointer_rtx = gen_rtx_raw_REG (Pmode, STACK_POINTER_REGNUM);
3864 frame_pointer_rtx = gen_rtx_raw_REG (Pmode, FRAME_POINTER_REGNUM);
3865 if (hard_frame_pointer_rtx == 0)
3866 hard_frame_pointer_rtx = gen_rtx_raw_REG (Pmode,
3867 HARD_FRAME_POINTER_REGNUM);
3868 if (arg_pointer_rtx == 0)
3869 arg_pointer_rtx = gen_rtx_raw_REG (Pmode, ARG_POINTER_REGNUM);
3870 virtual_incoming_args_rtx =
3871 gen_rtx_raw_REG (Pmode, VIRTUAL_INCOMING_ARGS_REGNUM);
3872 virtual_stack_vars_rtx =
3873 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_VARS_REGNUM);
3874 virtual_stack_dynamic_rtx =
3875 gen_rtx_raw_REG (Pmode, VIRTUAL_STACK_DYNAMIC_REGNUM);
3876 virtual_outgoing_args_rtx =
3877 gen_rtx_raw_REG (Pmode, VIRTUAL_OUTGOING_ARGS_REGNUM);
3878 virtual_cfa_rtx = gen_rtx_raw_REG (Pmode, VIRTUAL_CFA_REGNUM);
3880 /* These rtx must be roots if GC is enabled. */
3882 ggc_add_rtx_root (global_rtl, GR_MAX);
3884 #ifdef INIT_EXPANDERS
3885 /* This is to initialize save_machine_status and restore_machine_status before
3886 the first call to push_function_context_to. This is needed by the Chill
3887 front end which calls push_function_context_to before the first cal to
3888 init_function_start. */
3892 /* Create the unique rtx's for certain rtx codes and operand values. */
3894 /* Don't use gen_rtx here since gen_rtx in this case
3895 tries to use these variables. */
3896 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3897 const_int_rtx[i + MAX_SAVED_CONST_INT] =
3898 gen_rtx_raw_CONST_INT (VOIDmode, i);
3900 ggc_add_rtx_root (const_int_rtx, 2 * MAX_SAVED_CONST_INT + 1);
3902 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3903 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3904 const_true_rtx = const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3906 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3908 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
3909 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
3910 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
3911 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
3913 for (i = 0; i <= 2; i++)
3915 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3916 mode = GET_MODE_WIDER_MODE (mode))
3918 rtx tem = rtx_alloc (CONST_DOUBLE);
3919 union real_extract u;
3921 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3922 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3924 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3925 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3926 PUT_MODE (tem, mode);
3928 const_tiny_rtx[i][(int) mode] = tem;
3931 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3933 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3934 mode = GET_MODE_WIDER_MODE (mode))
3935 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3937 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3939 mode = GET_MODE_WIDER_MODE (mode))
3940 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3943 for (mode = CCmode; mode < MAX_MACHINE_MODE; ++mode)
3944 if (GET_MODE_CLASS (mode) == MODE_CC)
3945 const_tiny_rtx[0][(int) mode] = const0_rtx;
3947 ggc_add_rtx_root (&const_tiny_rtx[0][0], sizeof(const_tiny_rtx)/sizeof(rtx));
3948 ggc_add_rtx_root (&const_true_rtx, 1);
3950 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3951 return_address_pointer_rtx
3952 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3956 struct_value_rtx = STRUCT_VALUE;
3958 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3961 #ifdef STRUCT_VALUE_INCOMING
3962 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3964 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3965 struct_value_incoming_rtx
3966 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3968 struct_value_incoming_rtx = struct_value_rtx;
3972 #ifdef STATIC_CHAIN_REGNUM
3973 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3975 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3976 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3977 static_chain_incoming_rtx
3978 = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3981 static_chain_incoming_rtx = static_chain_rtx;
3985 static_chain_rtx = STATIC_CHAIN;
3987 #ifdef STATIC_CHAIN_INCOMING
3988 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3990 static_chain_incoming_rtx = static_chain_rtx;
3994 #ifdef PIC_OFFSET_TABLE_REGNUM
3995 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3998 ggc_add_rtx_root (&pic_offset_table_rtx, 1);
3999 ggc_add_rtx_root (&struct_value_rtx, 1);
4000 ggc_add_rtx_root (&struct_value_incoming_rtx, 1);
4001 ggc_add_rtx_root (&static_chain_rtx, 1);
4002 ggc_add_rtx_root (&static_chain_incoming_rtx, 1);
4003 ggc_add_rtx_root (&return_address_pointer_rtx, 1);
4006 /* Query and clear/ restore no_line_numbers. This is used by the
4007 switch / case handling in stmt.c to give proper line numbers in
4008 warnings about unreachable code. */
4011 force_line_numbers ()
4013 int old = no_line_numbers;
4015 no_line_numbers = 0;
4017 force_next_line_note ();
4022 restore_line_number_status (old_value)
4025 no_line_numbers = old_value;