1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 88, 92-97, 1998 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* Middle-to-low level generation of rtx code and insns.
24 This file contains the functions `gen_rtx', `gen_reg_rtx'
25 and `gen_label_rtx' that are the usual ways of creating rtl
26 expressions for most purposes.
28 It also has the functions for creating insns and linking
29 them in the doubly-linked chain.
31 The patterns of the insns are created by machine-dependent
32 routines in insn-emit.c, which is generated automatically from
33 the machine description. These routines use `gen_rtx' to make
34 the individual rtx's of the pattern; what is machine dependent
35 is the kind of rtx's they make and what arguments they use. */
46 #include "hard-reg-set.h"
47 #include "insn-config.h"
53 /* Commonly used modes. */
55 enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT. */
56 enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD. */
57 enum machine_mode double_mode; /* Mode whose width is DOUBLE_TYPE_SIZE. */
58 enum machine_mode ptr_mode; /* Mode whose width is POINTER_SIZE. */
60 /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function.
61 After rtl generation, it is 1 plus the largest register number used. */
63 int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
65 /* This is *not* reset after each function. It gives each CODE_LABEL
66 in the entire compilation a unique label number. */
68 static int label_num = 1;
70 /* Lowest label number in current function. */
72 static int first_label_num;
74 /* Highest label number in current function.
75 Zero means use the value of label_num instead.
76 This is nonzero only when belatedly compiling an inline function. */
78 static int last_label_num;
80 /* Value label_num had when set_new_first_and_last_label_number was called.
81 If label_num has not changed since then, last_label_num is valid. */
83 static int base_label_num;
85 /* Nonzero means do not generate NOTEs for source line numbers. */
87 static int no_line_numbers;
89 /* Commonly used rtx's, so that we only need space for one copy.
90 These are initialized once for the entire compilation.
91 All of these except perhaps the floating-point CONST_DOUBLEs
92 are unique; no other rtx-object will be equal to any of these. */
94 /* Avoid warnings by initializing the `fld' field. Since its a union,
95 bypass problems with KNR compilers by only doing so when __GNUC__. */
102 struct _global_rtl global_rtl =
104 {PC, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* pc_rtx */
105 {CC0, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* cc0_rtx */
106 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* stack_pointer_rtx */
107 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* frame_pointer_rtx */
108 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* hard_frame_pointer_rtx */
109 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* arg_pointer_rtx */
110 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_incoming_args_rtx */
111 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_vars_rtx */
112 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_stack_dynamic_rtx */
113 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_outgoing_args_rtx */
114 {REG, VOIDmode, 0, 0, 0, 0, 0, 0, 0, 0 FLDI }, /* virtual_cfa_rtx */
117 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
118 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
119 record a copy of const[012]_rtx. */
121 rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE];
125 REAL_VALUE_TYPE dconst0;
126 REAL_VALUE_TYPE dconst1;
127 REAL_VALUE_TYPE dconst2;
128 REAL_VALUE_TYPE dconstm1;
130 /* All references to the following fixed hard registers go through
131 these unique rtl objects. On machines where the frame-pointer and
132 arg-pointer are the same register, they use the same unique object.
134 After register allocation, other rtl objects which used to be pseudo-regs
135 may be clobbered to refer to the frame-pointer register.
136 But references that were originally to the frame-pointer can be
137 distinguished from the others because they contain frame_pointer_rtx.
139 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
140 tricky: until register elimination has taken place hard_frame_pointer_rtx
141 should be used if it is being set, and frame_pointer_rtx otherwise. After
142 register elimination hard_frame_pointer_rtx should always be used.
143 On machines where the two registers are same (most) then these are the
146 In an inline procedure, the stack and frame pointer rtxs may not be
147 used for anything else. */
148 rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
149 rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
150 rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
151 rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
152 rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
154 /* This is used to implement __builtin_return_address for some machines.
155 See for instance the MIPS port. */
156 rtx return_address_pointer_rtx; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
158 /* We make one copy of (const_int C) where C is in
159 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
160 to save space during the compilation and simplify comparisons of
163 struct rtx_def const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1];
165 /* The ends of the doubly-linked chain of rtl for the current function.
166 Both are reset to null at the start of rtl generation for the function.
168 start_sequence saves both of these on `sequence_stack' along with
169 `sequence_rtl_expr' and then starts a new, nested sequence of insns. */
171 static rtx first_insn = NULL;
172 static rtx last_insn = NULL;
174 /* RTL_EXPR within which the current sequence will be placed. Use to
175 prevent reuse of any temporaries within the sequence until after the
176 RTL_EXPR is emitted. */
178 tree sequence_rtl_expr = NULL;
180 /* INSN_UID for next insn emitted.
181 Reset to 1 for each function compiled. */
183 static int cur_insn_uid = 1;
185 /* Line number and source file of the last line-number NOTE emitted.
186 This is used to avoid generating duplicates. */
188 static int last_linenum = 0;
189 static char *last_filename = 0;
191 /* A vector indexed by pseudo reg number. The allocated length
192 of this vector is regno_pointer_flag_length. Since this
193 vector is needed during the expansion phase when the total
194 number of registers in the function is not yet known,
195 it is copied and made bigger when necessary. */
197 char *regno_pointer_flag;
198 int regno_pointer_flag_length;
200 /* Indexed by pseudo register number, if nonzero gives the known alignment
201 for that pseudo (if regno_pointer_flag is set).
202 Allocated in parallel with regno_pointer_flag. */
203 char *regno_pointer_align;
205 /* Indexed by pseudo register number, gives the rtx for that pseudo.
206 Allocated in parallel with regno_pointer_flag. */
210 /* Stack of pending (incomplete) sequences saved by `start_sequence'.
211 Each element describes one pending sequence.
212 The main insn-chain is saved in the last element of the chain,
213 unless the chain is empty. */
215 struct sequence_stack *sequence_stack;
217 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
218 shortly thrown away. We use two mechanisms to prevent this waste:
220 First, we keep a list of the expressions used to represent the sequence
221 stack in sequence_element_free_list.
223 Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated
224 rtvec for use by gen_sequence. One entry for each size is sufficient
225 because most cases are calls to gen_sequence followed by immediately
226 emitting the SEQUENCE. Reuse is safe since emitting a sequence is
227 destructive on the insn in it anyway and hence can't be redone.
229 We do not bother to save this cached data over nested function calls.
230 Instead, we just reinitialize them. */
232 #define SEQUENCE_RESULT_SIZE 5
234 static struct sequence_stack *sequence_element_free_list;
235 static rtx sequence_result[SEQUENCE_RESULT_SIZE];
237 /* During RTL generation, we also keep a list of free INSN rtl codes. */
238 static rtx free_insn;
240 extern int rtx_equal_function_value_matters;
242 /* Filename and line number of last line-number note,
243 whether we actually emitted it or not. */
244 extern char *emit_filename;
245 extern int emit_lineno;
247 static rtx make_jump_insn_raw PROTO((rtx));
248 static rtx make_call_insn_raw PROTO((rtx));
249 static rtx find_line_note PROTO((rtx));
252 gen_rtx_CONST_INT (mode, arg)
253 enum machine_mode mode;
256 if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT)
257 return &const_int_rtx[arg + MAX_SAVED_CONST_INT];
259 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
260 if (const_true_rtx && arg == STORE_FLAG_VALUE)
261 return const_true_rtx;
264 return gen_rtx_raw_CONST_INT (mode, arg);
268 gen_rtx_REG (mode, regno)
269 enum machine_mode mode;
272 /* In case the MD file explicitly references the frame pointer, have
273 all such references point to the same frame pointer. This is
274 used during frame pointer elimination to distinguish the explicit
275 references to these registers from pseudos that happened to be
278 If we have eliminated the frame pointer or arg pointer, we will
279 be using it as a normal register, for example as a spill
280 register. In such cases, we might be accessing it in a mode that
281 is not Pmode and therefore cannot use the pre-allocated rtx.
283 Also don't do this when we are making new REGs in reload, since
284 we don't want to get confused with the real pointers. */
286 if (mode == Pmode && !reload_in_progress)
288 if (regno == FRAME_POINTER_REGNUM)
289 return frame_pointer_rtx;
290 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
291 if (regno == HARD_FRAME_POINTER_REGNUM)
292 return hard_frame_pointer_rtx;
294 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
295 if (regno == ARG_POINTER_REGNUM)
296 return arg_pointer_rtx;
298 #ifdef RETURN_ADDRESS_POINTER_REGNUM
299 if (regno == RETURN_ADDRESS_POINTER_REGNUM)
300 return return_address_pointer_rtx;
302 if (regno == STACK_POINTER_REGNUM)
303 return stack_pointer_rtx;
306 return gen_rtx_raw_REG (mode, regno);
310 gen_rtx_MEM (mode, addr)
311 enum machine_mode mode;
314 rtx rt = gen_rtx_raw_MEM (mode, addr);
316 /* This field is not cleared by the mere allocation of the rtx, so
318 MEM_ALIAS_SET (rt) = 0;
323 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
325 ** This routine generates an RTX of the size specified by
326 ** <code>, which is an RTX code. The RTX structure is initialized
327 ** from the arguments <element1> through <elementn>, which are
328 ** interpreted according to the specific RTX type's format. The
329 ** special machine mode associated with the rtx (if any) is specified
332 ** gen_rtx can be invoked in a way which resembles the lisp-like
333 ** rtx it will generate. For example, the following rtx structure:
335 ** (plus:QI (mem:QI (reg:SI 1))
336 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
338 ** ...would be generated by the following C code:
340 ** gen_rtx (PLUS, QImode,
341 ** gen_rtx (MEM, QImode,
342 ** gen_rtx (REG, SImode, 1)),
343 ** gen_rtx (MEM, QImode,
344 ** gen_rtx (PLUS, SImode,
345 ** gen_rtx (REG, SImode, 2),
346 ** gen_rtx (REG, SImode, 3)))),
351 gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...))
353 #ifndef ANSI_PROTOTYPES
355 enum machine_mode mode;
358 register int i; /* Array indices... */
359 register char *fmt; /* Current rtx's format... */
360 register rtx rt_val; /* RTX to return to caller... */
364 #ifndef ANSI_PROTOTYPES
365 code = va_arg (p, enum rtx_code);
366 mode = va_arg (p, enum machine_mode);
369 if (code == CONST_INT)
370 rt_val = gen_rtx_CONST_INT (mode, va_arg (p, HOST_WIDE_INT));
371 else if (code == REG)
372 rt_val = gen_rtx_REG (mode, va_arg (p, int));
373 else if (code == MEM)
374 rt_val = gen_rtx_MEM (mode, va_arg (p, rtx));
377 rt_val = rtx_alloc (code); /* Allocate the storage space. */
378 rt_val->mode = mode; /* Store the machine mode... */
380 fmt = GET_RTX_FORMAT (code); /* Find the right format... */
381 for (i = 0; i < GET_RTX_LENGTH (code); i++)
385 case '0': /* Unused field. */
388 case 'i': /* An integer? */
389 XINT (rt_val, i) = va_arg (p, int);
392 case 'w': /* A wide integer? */
393 XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT);
396 case 's': /* A string? */
397 XSTR (rt_val, i) = va_arg (p, char *);
400 case 'e': /* An expression? */
401 case 'u': /* An insn? Same except when printing. */
402 XEXP (rt_val, i) = va_arg (p, rtx);
405 case 'E': /* An RTX vector? */
406 XVEC (rt_val, i) = va_arg (p, rtvec);
409 case 'b': /* A bitmap? */
410 XBITMAP (rt_val, i) = va_arg (p, bitmap);
413 case 't': /* A tree? */
414 XTREE (rt_val, i) = va_arg (p, tree);
423 return rt_val; /* Return the new RTX... */
426 /* gen_rtvec (n, [rt1, ..., rtn])
428 ** This routine creates an rtvec and stores within it the
429 ** pointers to rtx's which are its arguments.
434 gen_rtvec VPROTO((int n, ...))
436 #ifndef ANSI_PROTOTYPES
445 #ifndef ANSI_PROTOTYPES
450 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
452 vector = (rtx *) alloca (n * sizeof (rtx));
454 for (i = 0; i < n; i++)
455 vector[i] = va_arg (p, rtx);
458 return gen_rtvec_v (n, vector);
462 gen_rtvec_v (n, argp)
467 register rtvec rt_val;
470 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
472 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
474 for (i = 0; i < n; i++)
475 rt_val->elem[i].rtx = *argp++;
481 gen_rtvec_vv (n, argp)
486 register rtvec rt_val;
489 return NULL_RTVEC; /* Don't allocate an empty rtvec... */
491 rt_val = rtvec_alloc (n); /* Allocate an rtvec... */
493 for (i = 0; i < n; i++)
494 rt_val->elem[i].rtx = (argp++)->rtx;
499 /* Generate a REG rtx for a new pseudo register of mode MODE.
500 This pseudo is assigned the next sequential register number. */
504 enum machine_mode mode;
508 /* Don't let anything called after initial flow analysis create new
513 if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
514 || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT)
516 /* For complex modes, don't make a single pseudo.
517 Instead, make a CONCAT of two pseudos.
518 This allows noncontiguous allocation of the real and imaginary parts,
519 which makes much better code. Besides, allocating DCmode
520 pseudos overstrains reload on some machines like the 386. */
521 rtx realpart, imagpart;
522 int size = GET_MODE_UNIT_SIZE (mode);
523 enum machine_mode partmode
524 = mode_for_size (size * BITS_PER_UNIT,
525 (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT
526 ? MODE_FLOAT : MODE_INT),
529 realpart = gen_reg_rtx (partmode);
530 imagpart = gen_reg_rtx (partmode);
531 return gen_rtx_CONCAT (mode, realpart, imagpart);
534 /* Make sure regno_pointer_flag and regno_reg_rtx are large
535 enough to have an element for this pseudo reg number. */
537 if (reg_rtx_no == regno_pointer_flag_length)
541 (char *) savealloc (regno_pointer_flag_length * 2);
542 bcopy (regno_pointer_flag, new, regno_pointer_flag_length);
543 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
544 regno_pointer_flag = new;
546 new = (char *) savealloc (regno_pointer_flag_length * 2);
547 bcopy (regno_pointer_align, new, regno_pointer_flag_length);
548 bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length);
549 regno_pointer_align = new;
551 new1 = (rtx *) savealloc (regno_pointer_flag_length * 2 * sizeof (rtx));
552 bcopy ((char *) regno_reg_rtx, (char *) new1,
553 regno_pointer_flag_length * sizeof (rtx));
554 bzero ((char *) &new1[regno_pointer_flag_length],
555 regno_pointer_flag_length * sizeof (rtx));
556 regno_reg_rtx = new1;
558 regno_pointer_flag_length *= 2;
561 val = gen_rtx_raw_REG (mode, reg_rtx_no);
562 regno_reg_rtx[reg_rtx_no++] = val;
566 /* Identify REG (which may be a CONCAT) as a user register. */
572 if (GET_CODE (reg) == CONCAT)
574 REG_USERVAR_P (XEXP (reg, 0)) = 1;
575 REG_USERVAR_P (XEXP (reg, 1)) = 1;
577 else if (GET_CODE (reg) == REG)
578 REG_USERVAR_P (reg) = 1;
583 /* Identify REG as a probable pointer register and show its alignment
584 as ALIGN, if nonzero. */
587 mark_reg_pointer (reg, align)
591 REGNO_POINTER_FLAG (REGNO (reg)) = 1;
594 REGNO_POINTER_ALIGN (REGNO (reg)) = align;
597 /* Return 1 plus largest pseudo reg number used in the current function. */
605 /* Return 1 + the largest label number used so far in the current function. */
610 if (last_label_num && label_num == base_label_num)
611 return last_label_num;
615 /* Return first label number used in this function (if any were used). */
618 get_first_label_num ()
620 return first_label_num;
623 /* Return a value representing some low-order bits of X, where the number
624 of low-order bits is given by MODE. Note that no conversion is done
625 between floating-point and fixed-point values, rather, the bit
626 representation is returned.
628 This function handles the cases in common between gen_lowpart, below,
629 and two variants in cse.c and combine.c. These are the cases that can
630 be safely handled at all points in the compilation.
632 If this is not a case we can handle, return 0. */
635 gen_lowpart_common (mode, x)
636 enum machine_mode mode;
641 if (GET_MODE (x) == mode)
644 /* MODE must occupy no more words than the mode of X. */
645 if (GET_MODE (x) != VOIDmode
646 && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD
647 > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1))
651 if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD)
652 word = ((GET_MODE_SIZE (GET_MODE (x))
653 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
656 if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND)
657 && (GET_MODE_CLASS (mode) == MODE_INT
658 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT))
660 /* If we are getting the low-order part of something that has been
661 sign- or zero-extended, we can either just use the object being
662 extended or make a narrower extension. If we want an even smaller
663 piece than the size of the object being extended, call ourselves
666 This case is used mostly by combine and cse. */
668 if (GET_MODE (XEXP (x, 0)) == mode)
670 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0))))
671 return gen_lowpart_common (mode, XEXP (x, 0));
672 else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x)))
673 return gen_rtx_fmt_e (GET_CODE (x), mode, XEXP (x, 0));
675 else if (GET_CODE (x) == SUBREG
676 && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
677 || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x))))
678 return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0
680 : gen_rtx_SUBREG (mode, SUBREG_REG (x), SUBREG_WORD (x) + word));
681 else if (GET_CODE (x) == REG)
683 /* Let the backend decide how many registers to skip. This is needed
684 in particular for Sparc64 where fp regs are smaller than a word. */
685 /* ??? Note that subregs are now ambiguous, in that those against
686 pseudos are sized by the Word Size, while those against hard
687 regs are sized by the underlying register size. Better would be
688 to always interpret the subreg offset parameter as bytes or bits. */
690 if (WORDS_BIG_ENDIAN && REGNO (x) < FIRST_PSEUDO_REGISTER)
691 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
692 - HARD_REGNO_NREGS (REGNO (x), mode));
694 /* If the register is not valid for MODE, return 0. If we don't
695 do this, there is no way to fix up the resulting REG later.
696 But we do do this if the current REG is not valid for its
697 mode. This latter is a kludge, but is required due to the
698 way that parameters are passed on some machines, most
700 if (REGNO (x) < FIRST_PSEUDO_REGISTER
701 && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)
702 && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x)))
704 else if (REGNO (x) < FIRST_PSEUDO_REGISTER
705 /* integrate.c can't handle parts of a return value register. */
706 && (! REG_FUNCTION_VALUE_P (x)
707 || ! rtx_equal_function_value_matters)
708 #ifdef CLASS_CANNOT_CHANGE_SIZE
709 && ! (GET_MODE_SIZE (mode) != GET_MODE_SIZE (GET_MODE (x))
710 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_INT
711 && GET_MODE_CLASS (GET_MODE (x)) != MODE_COMPLEX_FLOAT
712 && (TEST_HARD_REG_BIT
713 (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE],
716 /* We want to keep the stack, frame, and arg pointers
718 && x != frame_pointer_rtx
719 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
720 && x != arg_pointer_rtx
722 && x != stack_pointer_rtx)
723 return gen_rtx_REG (mode, REGNO (x) + word);
725 return gen_rtx_SUBREG (mode, x, word);
727 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
728 from the low-order part of the constant. */
729 else if ((GET_MODE_CLASS (mode) == MODE_INT
730 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
731 && GET_MODE (x) == VOIDmode
732 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE))
734 /* If MODE is twice the host word size, X is already the desired
735 representation. Otherwise, if MODE is wider than a word, we can't
736 do this. If MODE is exactly a word, return just one CONST_INT.
737 If MODE is smaller than a word, clear the bits that don't belong
738 in our mode, unless they and our sign bit are all one. So we get
739 either a reasonable negative value or a reasonable unsigned value
742 if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT)
744 else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT)
746 else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT)
747 return (GET_CODE (x) == CONST_INT ? x
748 : GEN_INT (CONST_DOUBLE_LOW (x)));
751 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
752 int width = GET_MODE_BITSIZE (mode);
753 HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x)
754 : CONST_DOUBLE_LOW (x));
756 /* Sign extend to HOST_WIDE_INT. */
757 val = val << (HOST_BITS_PER_WIDE_INT - width) >> (HOST_BITS_PER_WIDE_INT - width);
759 return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x
764 /* If X is an integral constant but we want it in floating-point, it
765 must be the case that we have a union of an integer and a floating-point
766 value. If the machine-parameters allow it, simulate that union here
767 and return the result. The two-word and single-word cases are
770 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
771 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
772 || flag_pretend_float)
773 && GET_MODE_CLASS (mode) == MODE_FLOAT
774 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
775 && GET_CODE (x) == CONST_INT
776 && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT)
777 #ifdef REAL_ARITHMETIC
783 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
784 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
788 union {HOST_WIDE_INT i; float d; } u;
791 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
794 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
795 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
796 || flag_pretend_float)
797 && GET_MODE_CLASS (mode) == MODE_FLOAT
798 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
799 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
800 && GET_MODE (x) == VOIDmode
801 && (sizeof (double) * HOST_BITS_PER_CHAR
802 == 2 * HOST_BITS_PER_WIDE_INT))
803 #ifdef REAL_ARITHMETIC
807 HOST_WIDE_INT low, high;
809 if (GET_CODE (x) == CONST_INT)
810 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
812 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
814 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
816 if (WORDS_BIG_ENDIAN)
817 i[0] = high, i[1] = low;
819 i[0] = low, i[1] = high;
821 r = REAL_VALUE_FROM_TARGET_DOUBLE (i);
822 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
826 union {HOST_WIDE_INT i[2]; double d; } u;
827 HOST_WIDE_INT low, high;
829 if (GET_CODE (x) == CONST_INT)
830 low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1);
832 low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x);
834 #ifdef HOST_WORDS_BIG_ENDIAN
835 u.i[0] = high, u.i[1] = low;
837 u.i[0] = low, u.i[1] = high;
840 return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode);
844 /* We need an extra case for machines where HOST_BITS_PER_WIDE_INT is the
845 same as sizeof (double) or when sizeof (float) is larger than the
846 size of a word on the target machine. */
847 #ifdef REAL_ARITHMETIC
848 else if (mode == SFmode && GET_CODE (x) == CONST_INT)
854 r = REAL_VALUE_FROM_TARGET_SINGLE (i);
855 return CONST_DOUBLE_FROM_REAL_VALUE (r, mode);
859 /* Similarly, if this is converting a floating-point value into a
860 single-word integer. Only do this is the host and target parameters are
863 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
864 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
865 || flag_pretend_float)
866 && (GET_MODE_CLASS (mode) == MODE_INT
867 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
868 && GET_CODE (x) == CONST_DOUBLE
869 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
870 && GET_MODE_BITSIZE (mode) == BITS_PER_WORD)
871 return operand_subword (x, word, 0, GET_MODE (x));
873 /* Similarly, if this is converting a floating-point value into a
874 two-word integer, we can do this one word at a time and make an
875 integer. Only do this is the host and target parameters are
878 else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
879 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
880 || flag_pretend_float)
881 && (GET_MODE_CLASS (mode) == MODE_INT
882 || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)
883 && GET_CODE (x) == CONST_DOUBLE
884 && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT
885 && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD)
888 = operand_subword (x, word + WORDS_BIG_ENDIAN, 0, GET_MODE (x));
890 = operand_subword (x, word + ! WORDS_BIG_ENDIAN, 0, GET_MODE (x));
892 if (lowpart && GET_CODE (lowpart) == CONST_INT
893 && highpart && GET_CODE (highpart) == CONST_INT)
894 return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode);
897 /* Otherwise, we can't do this. */
901 /* Return the real part (which has mode MODE) of a complex value X.
902 This always comes at the low address in memory. */
905 gen_realpart (mode, x)
906 enum machine_mode mode;
909 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
911 else if (WORDS_BIG_ENDIAN)
912 return gen_highpart (mode, x);
914 return gen_lowpart (mode, x);
917 /* Return the imaginary part (which has mode MODE) of a complex value X.
918 This always comes at the high address in memory. */
921 gen_imagpart (mode, x)
922 enum machine_mode mode;
925 if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode)
927 else if (WORDS_BIG_ENDIAN)
928 return gen_lowpart (mode, x);
930 return gen_highpart (mode, x);
933 /* Return 1 iff X, assumed to be a SUBREG,
934 refers to the real part of the complex value in its containing reg.
935 Complex values are always stored with the real part in the first word,
936 regardless of WORDS_BIG_ENDIAN. */
939 subreg_realpart_p (x)
942 if (GET_CODE (x) != SUBREG)
945 return SUBREG_WORD (x) == 0;
948 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
949 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
950 least-significant part of X.
951 MODE specifies how big a part of X to return;
952 it usually should not be larger than a word.
953 If X is a MEM whose address is a QUEUED, the value may be so also. */
956 gen_lowpart (mode, x)
957 enum machine_mode mode;
960 rtx result = gen_lowpart_common (mode, x);
964 else if (GET_CODE (x) == REG)
966 /* Must be a hard reg that's not valid in MODE. */
967 result = gen_lowpart_common (mode, copy_to_reg (x));
972 else if (GET_CODE (x) == MEM)
974 /* The only additional case we can do is MEM. */
975 register int offset = 0;
976 if (WORDS_BIG_ENDIAN)
977 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
978 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
980 if (BYTES_BIG_ENDIAN)
981 /* Adjust the address so that the address-after-the-data
983 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
984 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
986 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
988 else if (GET_CODE (x) == ADDRESSOF)
989 return gen_lowpart (mode, force_reg (GET_MODE (x), x));
994 /* Like `gen_lowpart', but refer to the most significant part.
995 This is used to access the imaginary part of a complex number. */
998 gen_highpart (mode, x)
999 enum machine_mode mode;
1002 /* This case loses if X is a subreg. To catch bugs early,
1003 complain if an invalid MODE is used even in other cases. */
1004 if (GET_MODE_SIZE (mode) > UNITS_PER_WORD
1005 && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x)))
1007 if (GET_CODE (x) == CONST_DOUBLE
1008 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1009 && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT
1012 return GEN_INT (CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode));
1013 else if (GET_CODE (x) == CONST_INT)
1015 if (HOST_BITS_PER_WIDE_INT <= BITS_PER_WORD)
1017 return GEN_INT (INTVAL (x) >> (HOST_BITS_PER_WIDE_INT - BITS_PER_WORD));
1019 else if (GET_CODE (x) == MEM)
1021 register int offset = 0;
1022 if (! WORDS_BIG_ENDIAN)
1023 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
1024 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1026 if (! BYTES_BIG_ENDIAN
1027 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
1028 offset -= (GET_MODE_SIZE (mode)
1029 - MIN (UNITS_PER_WORD,
1030 GET_MODE_SIZE (GET_MODE (x))));
1032 return change_address (x, mode, plus_constant (XEXP (x, 0), offset));
1034 else if (GET_CODE (x) == SUBREG)
1036 /* The only time this should occur is when we are looking at a
1037 multi-word item with a SUBREG whose mode is the same as that of the
1038 item. It isn't clear what we would do if it wasn't. */
1039 if (SUBREG_WORD (x) != 0)
1041 return gen_highpart (mode, SUBREG_REG (x));
1043 else if (GET_CODE (x) == REG)
1047 /* Let the backend decide how many registers to skip. This is needed
1048 in particular for sparc64 where fp regs are smaller than a word. */
1049 /* ??? Note that subregs are now ambiguous, in that those against
1050 pseudos are sized by the word size, while those against hard
1051 regs are sized by the underlying register size. Better would be
1052 to always interpret the subreg offset parameter as bytes or bits. */
1054 if (WORDS_BIG_ENDIAN)
1056 else if (REGNO (x) < FIRST_PSEUDO_REGISTER)
1057 word = (HARD_REGNO_NREGS (REGNO (x), GET_MODE (x))
1058 - HARD_REGNO_NREGS (REGNO (x), mode));
1060 word = ((GET_MODE_SIZE (GET_MODE (x))
1061 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD))
1064 if (REGNO (x) < FIRST_PSEUDO_REGISTER
1065 /* integrate.c can't handle parts of a return value register. */
1066 && (! REG_FUNCTION_VALUE_P (x)
1067 || ! rtx_equal_function_value_matters)
1068 /* We want to keep the stack, frame, and arg pointers special. */
1069 && x != frame_pointer_rtx
1070 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1071 && x != arg_pointer_rtx
1073 && x != stack_pointer_rtx)
1074 return gen_rtx_REG (mode, REGNO (x) + word);
1076 return gen_rtx_SUBREG (mode, x, word);
1082 /* Return 1 iff X, assumed to be a SUBREG,
1083 refers to the least significant part of its containing reg.
1084 If X is not a SUBREG, always return 1 (it is its own low part!). */
1087 subreg_lowpart_p (x)
1090 if (GET_CODE (x) != SUBREG)
1092 else if (GET_MODE (SUBREG_REG (x)) == VOIDmode)
1095 if (WORDS_BIG_ENDIAN
1096 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD)
1097 return (SUBREG_WORD (x)
1098 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))
1099 - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD))
1102 return SUBREG_WORD (x) == 0;
1105 /* Return subword I of operand OP.
1106 The word number, I, is interpreted as the word number starting at the
1107 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1108 otherwise it is the high-order word.
1110 If we cannot extract the required word, we return zero. Otherwise, an
1111 rtx corresponding to the requested word will be returned.
1113 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1114 reload has completed, a valid address will always be returned. After
1115 reload, if a valid address cannot be returned, we return zero.
1117 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1118 it is the responsibility of the caller.
1120 MODE is the mode of OP in case it is a CONST_INT. */
1123 operand_subword (op, i, validate_address, mode)
1126 int validate_address;
1127 enum machine_mode mode;
1130 int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD;
1131 int bits_per_word = BITS_PER_WORD;
1133 if (mode == VOIDmode)
1134 mode = GET_MODE (op);
1136 if (mode == VOIDmode)
1139 /* If OP is narrower than a word or if we want a word outside OP, fail. */
1141 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD
1142 || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode)))
1145 /* If OP is already an integer word, return it. */
1146 if (GET_MODE_CLASS (mode) == MODE_INT
1147 && GET_MODE_SIZE (mode) == UNITS_PER_WORD)
1150 /* If OP is a REG or SUBREG, we can handle it very simply. */
1151 if (GET_CODE (op) == REG)
1153 /* If the register is not valid for MODE, return 0. If we don't
1154 do this, there is no way to fix up the resulting REG later. */
1155 if (REGNO (op) < FIRST_PSEUDO_REGISTER
1156 && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode))
1158 else if (REGNO (op) >= FIRST_PSEUDO_REGISTER
1159 || (REG_FUNCTION_VALUE_P (op)
1160 && rtx_equal_function_value_matters)
1161 /* We want to keep the stack, frame, and arg pointers
1163 || op == frame_pointer_rtx
1164 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1165 || op == arg_pointer_rtx
1167 || op == stack_pointer_rtx)
1168 return gen_rtx_SUBREG (word_mode, op, i);
1170 return gen_rtx_REG (word_mode, REGNO (op) + i);
1172 else if (GET_CODE (op) == SUBREG)
1173 return gen_rtx_SUBREG (word_mode, SUBREG_REG (op), i + SUBREG_WORD (op));
1174 else if (GET_CODE (op) == CONCAT)
1176 int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD;
1178 return operand_subword (XEXP (op, 0), i, validate_address, mode);
1179 return operand_subword (XEXP (op, 1), i - partwords,
1180 validate_address, mode);
1183 /* Form a new MEM at the requested address. */
1184 if (GET_CODE (op) == MEM)
1186 rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD);
1189 if (validate_address)
1191 if (reload_completed)
1193 if (! strict_memory_address_p (word_mode, addr))
1197 addr = memory_address (word_mode, addr);
1200 new = gen_rtx_MEM (word_mode, addr);
1202 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op);
1203 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op);
1204 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op);
1209 /* The only remaining cases are when OP is a constant. If the host and
1210 target floating formats are the same, handling two-word floating
1211 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1212 are defined as returning one or two 32 bit values, respectively,
1213 and not values of BITS_PER_WORD bits. */
1214 #ifdef REAL_ARITHMETIC
1215 /* The output is some bits, the width of the target machine's word.
1216 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1218 if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1219 && GET_MODE_CLASS (mode) == MODE_FLOAT
1220 && GET_MODE_BITSIZE (mode) == 64
1221 && GET_CODE (op) == CONST_DOUBLE)
1226 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1227 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
1229 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1230 which the words are written depends on the word endianness.
1232 ??? This is a potential portability problem and should
1233 be fixed at some point. */
1234 if (BITS_PER_WORD == 32)
1235 return GEN_INT ((HOST_WIDE_INT) k[i]);
1236 #if HOST_BITS_PER_WIDE_INT > 32
1237 else if (BITS_PER_WORD >= 64 && i == 0)
1238 return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32)
1239 | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]);
1241 else if (BITS_PER_WORD == 16)
1245 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1248 return GEN_INT ((HOST_WIDE_INT) value);
1253 else if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD
1254 && GET_MODE_CLASS (mode) == MODE_FLOAT
1255 && GET_MODE_BITSIZE (mode) > 64
1256 && GET_CODE (op) == CONST_DOUBLE)
1261 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1262 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, k);
1264 if (BITS_PER_WORD == 32)
1265 return GEN_INT ((HOST_WIDE_INT) k[i]);
1267 #else /* no REAL_ARITHMETIC */
1268 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1269 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1270 || flag_pretend_float)
1271 && GET_MODE_CLASS (mode) == MODE_FLOAT
1272 && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD
1273 && GET_CODE (op) == CONST_DOUBLE)
1275 /* The constant is stored in the host's word-ordering,
1276 but we want to access it in the target's word-ordering. Some
1277 compilers don't like a conditional inside macro args, so we have two
1278 copies of the return. */
1279 #ifdef HOST_WORDS_BIG_ENDIAN
1280 return GEN_INT (i == WORDS_BIG_ENDIAN
1281 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1283 return GEN_INT (i != WORDS_BIG_ENDIAN
1284 ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op));
1287 #endif /* no REAL_ARITHMETIC */
1289 /* Single word float is a little harder, since single- and double-word
1290 values often do not have the same high-order bits. We have already
1291 verified that we want the only defined word of the single-word value. */
1292 #ifdef REAL_ARITHMETIC
1293 if (GET_MODE_CLASS (mode) == MODE_FLOAT
1294 && GET_MODE_BITSIZE (mode) == 32
1295 && GET_CODE (op) == CONST_DOUBLE)
1300 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
1301 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
1303 if (BITS_PER_WORD == 16)
1305 if ((i & 0x1) == !WORDS_BIG_ENDIAN)
1309 return GEN_INT ((HOST_WIDE_INT) l);
1312 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1313 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1314 || flag_pretend_float)
1315 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1316 && GET_MODE_CLASS (mode) == MODE_FLOAT
1317 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1318 && GET_CODE (op) == CONST_DOUBLE)
1321 union {float f; HOST_WIDE_INT i; } u;
1323 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1326 return GEN_INT (u.i);
1328 if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT
1329 && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD)
1330 || flag_pretend_float)
1331 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1332 && GET_MODE_CLASS (mode) == MODE_FLOAT
1333 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
1334 && GET_CODE (op) == CONST_DOUBLE)
1337 union {double d; HOST_WIDE_INT i; } u;
1339 REAL_VALUE_FROM_CONST_DOUBLE (d, op);
1342 return GEN_INT (u.i);
1344 #endif /* no REAL_ARITHMETIC */
1346 /* The only remaining cases that we can handle are integers.
1347 Convert to proper endianness now since these cases need it.
1348 At this point, i == 0 means the low-order word.
1350 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1351 in general. However, if OP is (const_int 0), we can just return
1354 if (op == const0_rtx)
1357 if (GET_MODE_CLASS (mode) != MODE_INT
1358 || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE)
1359 || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT)
1362 if (WORDS_BIG_ENDIAN)
1363 i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i;
1365 /* Find out which word on the host machine this value is in and get
1366 it from the constant. */
1367 val = (i / size_ratio == 0
1368 ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op))
1369 : (GET_CODE (op) == CONST_INT
1370 ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op)));
1372 /* Get the value we want into the low bits of val. */
1373 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT)
1374 val = ((val >> ((i % size_ratio) * BITS_PER_WORD)));
1376 /* Clear the bits that don't belong in our mode, unless they and our sign
1377 bit are all one. So we get either a reasonable negative value or a
1378 reasonable unsigned value for this mode. */
1379 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1380 && ((val & ((HOST_WIDE_INT) (-1) << (bits_per_word - 1)))
1381 != ((HOST_WIDE_INT) (-1) << (bits_per_word - 1))))
1382 val &= ((HOST_WIDE_INT) 1 << bits_per_word) - 1;
1384 /* If this would be an entire word for the target, but is not for
1385 the host, then sign-extend on the host so that the number will look
1386 the same way on the host that it would on the target.
1388 For example, when building a 64 bit alpha hosted 32 bit sparc
1389 targeted compiler, then we want the 32 bit unsigned value -1 to be
1390 represented as a 64 bit value -1, and not as 0x00000000ffffffff.
1391 The later confuses the sparc backend. */
1393 if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT
1394 && (val & ((HOST_WIDE_INT) 1 << (bits_per_word - 1))))
1395 val |= ((HOST_WIDE_INT) (-1) << bits_per_word);
1397 return GEN_INT (val);
1400 /* Similar to `operand_subword', but never return 0. If we can't extract
1401 the required subword, put OP into a register and try again. If that fails,
1402 abort. We always validate the address in this case. It is not valid
1403 to call this function after reload; it is mostly meant for RTL
1406 MODE is the mode of OP, in case it is CONST_INT. */
1409 operand_subword_force (op, i, mode)
1412 enum machine_mode mode;
1414 rtx result = operand_subword (op, i, 1, mode);
1419 if (mode != BLKmode && mode != VOIDmode)
1421 /* If this is a register which can not be accessed by words, copy it
1422 to a pseudo register. */
1423 if (GET_CODE (op) == REG)
1424 op = copy_to_reg (op);
1426 op = force_reg (mode, op);
1429 result = operand_subword (op, i, 1, mode);
1436 /* Given a compare instruction, swap the operands.
1437 A test instruction is changed into a compare of 0 against the operand. */
1440 reverse_comparison (insn)
1443 rtx body = PATTERN (insn);
1446 if (GET_CODE (body) == SET)
1447 comp = SET_SRC (body);
1449 comp = SET_SRC (XVECEXP (body, 0, 0));
1451 if (GET_CODE (comp) == COMPARE)
1453 rtx op0 = XEXP (comp, 0);
1454 rtx op1 = XEXP (comp, 1);
1455 XEXP (comp, 0) = op1;
1456 XEXP (comp, 1) = op0;
1460 rtx new = gen_rtx_COMPARE (VOIDmode, CONST0_RTX (GET_MODE (comp)), comp);
1461 if (GET_CODE (body) == SET)
1462 SET_SRC (body) = new;
1464 SET_SRC (XVECEXP (body, 0, 0)) = new;
1468 /* Return a memory reference like MEMREF, but with its mode changed
1469 to MODE and its address changed to ADDR.
1470 (VOIDmode means don't change the mode.
1471 NULL for ADDR means don't change the address.) */
1474 change_address (memref, mode, addr)
1476 enum machine_mode mode;
1481 if (GET_CODE (memref) != MEM)
1483 if (mode == VOIDmode)
1484 mode = GET_MODE (memref);
1486 addr = XEXP (memref, 0);
1488 /* If reload is in progress or has completed, ADDR must be valid.
1489 Otherwise, we can call memory_address to make it valid. */
1490 if (reload_completed || reload_in_progress)
1492 if (! memory_address_p (mode, addr))
1496 addr = memory_address (mode, addr);
1498 if (rtx_equal_p (addr, XEXP (memref, 0)) && mode == GET_MODE (memref))
1501 new = gen_rtx_MEM (mode, addr);
1502 MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref);
1503 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref);
1504 MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref);
1508 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1515 label = gen_rtx_CODE_LABEL (VOIDmode, 0, NULL_RTX,
1516 NULL_RTX, label_num++, NULL_PTR);
1518 LABEL_NUSES (label) = 0;
1522 /* For procedure integration. */
1524 /* Return a newly created INLINE_HEADER rtx. Should allocate this
1525 from a permanent obstack when the opportunity arises. */
1528 gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno,
1529 last_labelno, max_parm_regnum, max_regnum, args_size,
1530 pops_args, stack_slots, forced_labels, function_flags,
1531 outgoing_args_size, original_arg_vector,
1532 original_decl_initial, regno_rtx, regno_flag,
1533 regno_align, parm_reg_stack_loc)
1534 rtx first_insn, first_parm_insn;
1535 int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size;
1540 int outgoing_args_size;
1541 rtvec original_arg_vector;
1542 rtx original_decl_initial;
1546 rtvec parm_reg_stack_loc;
1548 rtx header = gen_rtx_INLINE_HEADER (VOIDmode,
1549 cur_insn_uid++, NULL_RTX,
1550 first_insn, first_parm_insn,
1551 first_labelno, last_labelno,
1552 max_parm_regnum, max_regnum, args_size,
1553 pops_args, stack_slots, forced_labels,
1554 function_flags, outgoing_args_size,
1555 original_arg_vector,
1556 original_decl_initial,
1557 regno_rtx, regno_flag, regno_align,
1558 parm_reg_stack_loc);
1562 /* Install new pointers to the first and last insns in the chain.
1563 Also, set cur_insn_uid to one higher than the last in use.
1564 Used for an inline-procedure after copying the insn chain. */
1567 set_new_first_and_last_insn (first, last)
1576 for (insn = first; insn; insn = NEXT_INSN (insn))
1577 cur_insn_uid = MAX (cur_insn_uid, INSN_UID (insn));
1582 /* Set the range of label numbers found in the current function.
1583 This is used when belatedly compiling an inline function. */
1586 set_new_first_and_last_label_num (first, last)
1589 base_label_num = label_num;
1590 first_label_num = first;
1591 last_label_num = last;
1594 /* Save all variables describing the current status into the structure *P.
1595 This is used before starting a nested function. */
1598 save_emit_status (p)
1601 p->reg_rtx_no = reg_rtx_no;
1602 p->first_label_num = first_label_num;
1603 p->first_insn = first_insn;
1604 p->last_insn = last_insn;
1605 p->sequence_rtl_expr = sequence_rtl_expr;
1606 p->sequence_stack = sequence_stack;
1607 p->cur_insn_uid = cur_insn_uid;
1608 p->last_linenum = last_linenum;
1609 p->last_filename = last_filename;
1610 p->regno_pointer_flag = regno_pointer_flag;
1611 p->regno_pointer_align = regno_pointer_align;
1612 p->regno_pointer_flag_length = regno_pointer_flag_length;
1613 p->regno_reg_rtx = regno_reg_rtx;
1616 /* Restore all variables describing the current status from the structure *P.
1617 This is used after a nested function. */
1620 restore_emit_status (p)
1625 reg_rtx_no = p->reg_rtx_no;
1626 first_label_num = p->first_label_num;
1628 first_insn = p->first_insn;
1629 last_insn = p->last_insn;
1630 sequence_rtl_expr = p->sequence_rtl_expr;
1631 sequence_stack = p->sequence_stack;
1632 cur_insn_uid = p->cur_insn_uid;
1633 last_linenum = p->last_linenum;
1634 last_filename = p->last_filename;
1635 regno_pointer_flag = p->regno_pointer_flag;
1636 regno_pointer_align = p->regno_pointer_align;
1637 regno_pointer_flag_length = p->regno_pointer_flag_length;
1638 regno_reg_rtx = p->regno_reg_rtx;
1640 /* Clear our cache of rtx expressions for start_sequence and
1642 sequence_element_free_list = 0;
1643 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
1644 sequence_result[i] = 0;
1649 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1650 It does not work to do this twice, because the mark bits set here
1651 are not cleared afterwards. */
1654 unshare_all_rtl (insn)
1657 for (; insn; insn = NEXT_INSN (insn))
1658 if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
1659 || GET_CODE (insn) == CALL_INSN)
1661 PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn));
1662 REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn));
1663 LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn));
1666 /* Make sure the addresses of stack slots found outside the insn chain
1667 (such as, in DECL_RTL of a variable) are not shared
1668 with the insn chain.
1670 This special care is necessary when the stack slot MEM does not
1671 actually appear in the insn chain. If it does appear, its address
1672 is unshared from all else at that point. */
1674 copy_rtx_if_shared (stack_slot_list);
1677 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1678 Recursively does the same for subexpressions. */
1681 copy_rtx_if_shared (orig)
1684 register rtx x = orig;
1686 register enum rtx_code code;
1687 register char *format_ptr;
1693 code = GET_CODE (x);
1695 /* These types may be freely shared. */
1708 /* SCRATCH must be shared because they represent distinct values. */
1712 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1713 a LABEL_REF, it isn't sharable. */
1714 if (GET_CODE (XEXP (x, 0)) == PLUS
1715 && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF
1716 && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT)
1725 /* The chain of insns is not being copied. */
1729 /* A MEM is allowed to be shared if its address is constant
1730 or is a constant plus one of the special registers. */
1731 if (CONSTANT_ADDRESS_P (XEXP (x, 0))
1732 || XEXP (x, 0) == virtual_stack_vars_rtx
1733 || XEXP (x, 0) == virtual_incoming_args_rtx)
1736 if (GET_CODE (XEXP (x, 0)) == PLUS
1737 && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx
1738 || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx)
1739 && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1741 /* This MEM can appear in more than one place,
1742 but its address better not be shared with anything else. */
1744 XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0));
1754 /* This rtx may not be shared. If it has already been seen,
1755 replace it with a copy of itself. */
1761 copy = rtx_alloc (code);
1762 bcopy ((char *) x, (char *) copy,
1763 (sizeof (*copy) - sizeof (copy->fld)
1764 + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code)));
1770 /* Now scan the subexpressions recursively.
1771 We can store any replaced subexpressions directly into X
1772 since we know X is not shared! Any vectors in X
1773 must be copied if X was copied. */
1775 format_ptr = GET_RTX_FORMAT (code);
1777 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1779 switch (*format_ptr++)
1782 XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i));
1786 if (XVEC (x, i) != NULL)
1789 int len = XVECLEN (x, i);
1791 if (copied && len > 0)
1792 XVEC (x, i) = gen_rtvec_vv (len, XVEC (x, i)->elem);
1793 for (j = 0; j < len; j++)
1794 XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j));
1802 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1803 to look for shared sub-parts. */
1806 reset_used_flags (x)
1810 register enum rtx_code code;
1811 register char *format_ptr;
1816 code = GET_CODE (x);
1818 /* These types may be freely shared so we needn't do any resetting
1839 /* The chain of insns is not being copied. */
1848 format_ptr = GET_RTX_FORMAT (code);
1849 for (i = 0; i < GET_RTX_LENGTH (code); i++)
1851 switch (*format_ptr++)
1854 reset_used_flags (XEXP (x, i));
1858 for (j = 0; j < XVECLEN (x, i); j++)
1859 reset_used_flags (XVECEXP (x, i, j));
1865 /* Copy X if necessary so that it won't be altered by changes in OTHER.
1866 Return X or the rtx for the pseudo reg the value of X was copied into.
1867 OTHER must be valid as a SET_DEST. */
1870 make_safe_from (x, other)
1874 switch (GET_CODE (other))
1877 other = SUBREG_REG (other);
1879 case STRICT_LOW_PART:
1882 other = XEXP (other, 0);
1888 if ((GET_CODE (other) == MEM
1890 && GET_CODE (x) != REG
1891 && GET_CODE (x) != SUBREG)
1892 || (GET_CODE (other) == REG
1893 && (REGNO (other) < FIRST_PSEUDO_REGISTER
1894 || reg_mentioned_p (other, x))))
1896 rtx temp = gen_reg_rtx (GET_MODE (x));
1897 emit_move_insn (temp, x);
1903 /* Emission of insns (adding them to the doubly-linked list). */
1905 /* Return the first insn of the current sequence or current function. */
1913 /* Return the last insn emitted in current sequence or current function. */
1921 /* Specify a new insn as the last in the chain. */
1924 set_last_insn (insn)
1927 if (NEXT_INSN (insn) != 0)
1932 /* Return the last insn emitted, even if it is in a sequence now pushed. */
1935 get_last_insn_anywhere ()
1937 struct sequence_stack *stack;
1940 for (stack = sequence_stack; stack; stack = stack->next)
1941 if (stack->last != 0)
1946 /* Return a number larger than any instruction's uid in this function. */
1951 return cur_insn_uid;
1954 /* Return the next insn. If it is a SEQUENCE, return the first insn
1963 insn = NEXT_INSN (insn);
1964 if (insn && GET_CODE (insn) == INSN
1965 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1966 insn = XVECEXP (PATTERN (insn), 0, 0);
1972 /* Return the previous insn. If it is a SEQUENCE, return the last insn
1976 previous_insn (insn)
1981 insn = PREV_INSN (insn);
1982 if (insn && GET_CODE (insn) == INSN
1983 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1984 insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1);
1990 /* Return the next insn after INSN that is not a NOTE. This routine does not
1991 look inside SEQUENCEs. */
1994 next_nonnote_insn (insn)
1999 insn = NEXT_INSN (insn);
2000 if (insn == 0 || GET_CODE (insn) != NOTE)
2007 /* Return the previous insn before INSN that is not a NOTE. This routine does
2008 not look inside SEQUENCEs. */
2011 prev_nonnote_insn (insn)
2016 insn = PREV_INSN (insn);
2017 if (insn == 0 || GET_CODE (insn) != NOTE)
2024 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2025 or 0, if there is none. This routine does not look inside
2029 next_real_insn (insn)
2034 insn = NEXT_INSN (insn);
2035 if (insn == 0 || GET_CODE (insn) == INSN
2036 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN)
2043 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2044 or 0, if there is none. This routine does not look inside
2048 prev_real_insn (insn)
2053 insn = PREV_INSN (insn);
2054 if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
2055 || GET_CODE (insn) == JUMP_INSN)
2062 /* Find the next insn after INSN that really does something. This routine
2063 does not look inside SEQUENCEs. Until reload has completed, this is the
2064 same as next_real_insn. */
2067 next_active_insn (insn)
2072 insn = NEXT_INSN (insn);
2074 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2075 || (GET_CODE (insn) == INSN
2076 && (! reload_completed
2077 || (GET_CODE (PATTERN (insn)) != USE
2078 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2085 /* Find the last insn before INSN that really does something. This routine
2086 does not look inside SEQUENCEs. Until reload has completed, this is the
2087 same as prev_real_insn. */
2090 prev_active_insn (insn)
2095 insn = PREV_INSN (insn);
2097 || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN
2098 || (GET_CODE (insn) == INSN
2099 && (! reload_completed
2100 || (GET_CODE (PATTERN (insn)) != USE
2101 && GET_CODE (PATTERN (insn)) != CLOBBER))))
2108 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2116 insn = NEXT_INSN (insn);
2117 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2124 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2132 insn = PREV_INSN (insn);
2133 if (insn == 0 || GET_CODE (insn) == CODE_LABEL)
2141 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2142 and REG_CC_USER notes so we can find it. */
2145 link_cc0_insns (insn)
2148 rtx user = next_nonnote_insn (insn);
2150 if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE)
2151 user = XVECEXP (PATTERN (user), 0, 0);
2153 REG_NOTES (user) = gen_rtx_INSN_LIST (REG_CC_SETTER, insn, REG_NOTES (user));
2154 REG_NOTES (insn) = gen_rtx_INSN_LIST (REG_CC_USER, user, REG_NOTES (insn));
2157 /* Return the next insn that uses CC0 after INSN, which is assumed to
2158 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2159 applied to the result of this function should yield INSN).
2161 Normally, this is simply the next insn. However, if a REG_CC_USER note
2162 is present, it contains the insn that uses CC0.
2164 Return 0 if we can't find the insn. */
2167 next_cc0_user (insn)
2170 rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX);
2173 return XEXP (note, 0);
2175 insn = next_nonnote_insn (insn);
2176 if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
2177 insn = XVECEXP (PATTERN (insn), 0, 0);
2179 if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2180 && reg_mentioned_p (cc0_rtx, PATTERN (insn)))
2186 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2187 note, it is the previous insn. */
2190 prev_cc0_setter (insn)
2193 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
2196 return XEXP (note, 0);
2198 insn = prev_nonnote_insn (insn);
2199 if (! sets_cc0_p (PATTERN (insn)))
2206 /* Try splitting insns that can be split for better scheduling.
2207 PAT is the pattern which might split.
2208 TRIAL is the insn providing PAT.
2209 LAST is non-zero if we should return the last insn of the sequence produced.
2211 If this routine succeeds in splitting, it returns the first or last
2212 replacement insn depending on the value of LAST. Otherwise, it
2213 returns TRIAL. If the insn to be returned can be split, it will be. */
2216 try_split (pat, trial, last)
2220 rtx before = PREV_INSN (trial);
2221 rtx after = NEXT_INSN (trial);
2222 rtx seq = split_insns (pat, trial);
2223 int has_barrier = 0;
2226 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2227 We may need to handle this specially. */
2228 if (after && GET_CODE (after) == BARRIER)
2231 after = NEXT_INSN (after);
2236 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2237 The latter case will normally arise only when being done so that
2238 it, in turn, will be split (SFmode on the 29k is an example). */
2239 if (GET_CODE (seq) == SEQUENCE)
2241 /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in
2242 SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero,
2243 increment the usage count so we don't delete the label. */
2246 if (GET_CODE (trial) == JUMP_INSN)
2247 for (i = XVECLEN (seq, 0) - 1; i >= 0; i--)
2248 if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN)
2250 JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial);
2252 if (JUMP_LABEL (trial))
2253 LABEL_NUSES (JUMP_LABEL (trial))++;
2256 tem = emit_insn_after (seq, before);
2258 delete_insn (trial);
2260 emit_barrier_after (tem);
2262 /* Recursively call try_split for each new insn created; by the
2263 time control returns here that insn will be fully split, so
2264 set LAST and continue from the insn after the one returned.
2265 We can't use next_active_insn here since AFTER may be a note.
2266 Ignore deleted insns, which can be occur if not optimizing,
2267 and ignore BARRIERs which can occur if we split the insn
2268 immediately before a BARRIER. */
2269 for (tem = NEXT_INSN (before); tem != after;
2270 tem = NEXT_INSN (tem))
2271 if (! INSN_DELETED_P (tem) && GET_CODE (tem) != BARRIER)
2272 tem = try_split (PATTERN (tem), tem, 1);
2274 /* Avoid infinite loop if the result matches the original pattern. */
2275 else if (rtx_equal_p (seq, pat))
2279 PATTERN (trial) = seq;
2280 INSN_CODE (trial) = -1;
2281 try_split (seq, trial, last);
2284 /* Return either the first or the last insn, depending on which was
2286 return last ? prev_active_insn (after) : next_active_insn (before);
2292 /* Make and return an INSN rtx, initializing all its slots.
2293 Store PATTERN in the pattern slots. */
2296 make_insn_raw (pattern)
2301 /* If in RTL generation phase, see if FREE_INSN can be used. */
2302 if (free_insn != 0 && rtx_equal_function_value_matters)
2305 free_insn = NEXT_INSN (free_insn);
2306 PUT_CODE (insn, INSN);
2309 insn = rtx_alloc (INSN);
2311 INSN_UID (insn) = cur_insn_uid++;
2312 PATTERN (insn) = pattern;
2313 INSN_CODE (insn) = -1;
2314 LOG_LINKS (insn) = NULL;
2315 REG_NOTES (insn) = NULL;
2320 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2323 make_jump_insn_raw (pattern)
2328 insn = rtx_alloc (JUMP_INSN);
2329 INSN_UID (insn) = cur_insn_uid++;
2331 PATTERN (insn) = pattern;
2332 INSN_CODE (insn) = -1;
2333 LOG_LINKS (insn) = NULL;
2334 REG_NOTES (insn) = NULL;
2335 JUMP_LABEL (insn) = NULL;
2340 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2343 make_call_insn_raw (pattern)
2348 insn = rtx_alloc (CALL_INSN);
2349 INSN_UID (insn) = cur_insn_uid++;
2351 PATTERN (insn) = pattern;
2352 INSN_CODE (insn) = -1;
2353 LOG_LINKS (insn) = NULL;
2354 REG_NOTES (insn) = NULL;
2355 CALL_INSN_FUNCTION_USAGE (insn) = NULL;
2360 /* Add INSN to the end of the doubly-linked list.
2361 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2367 PREV_INSN (insn) = last_insn;
2368 NEXT_INSN (insn) = 0;
2370 if (NULL != last_insn)
2371 NEXT_INSN (last_insn) = insn;
2373 if (NULL == first_insn)
2379 /* Add INSN into the doubly-linked list after insn AFTER. This and
2380 the next should be the only functions called to insert an insn once
2381 delay slots have been filled since only they know how to update a
2385 add_insn_after (insn, after)
2388 rtx next = NEXT_INSN (after);
2390 if (optimize && INSN_DELETED_P (after))
2393 NEXT_INSN (insn) = next;
2394 PREV_INSN (insn) = after;
2398 PREV_INSN (next) = insn;
2399 if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE)
2400 PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn;
2402 else if (last_insn == after)
2406 struct sequence_stack *stack = sequence_stack;
2407 /* Scan all pending sequences too. */
2408 for (; stack; stack = stack->next)
2409 if (after == stack->last)
2419 NEXT_INSN (after) = insn;
2420 if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE)
2422 rtx sequence = PATTERN (after);
2423 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2427 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2428 the previous should be the only functions called to insert an insn once
2429 delay slots have been filled since only they know how to update a
2433 add_insn_before (insn, before)
2436 rtx prev = PREV_INSN (before);
2438 if (optimize && INSN_DELETED_P (before))
2441 PREV_INSN (insn) = prev;
2442 NEXT_INSN (insn) = before;
2446 NEXT_INSN (prev) = insn;
2447 if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE)
2449 rtx sequence = PATTERN (prev);
2450 NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn;
2453 else if (first_insn == before)
2457 struct sequence_stack *stack = sequence_stack;
2458 /* Scan all pending sequences too. */
2459 for (; stack; stack = stack->next)
2460 if (before == stack->first)
2462 stack->first = insn;
2470 PREV_INSN (before) = insn;
2471 if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE)
2472 PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn;
2475 /* Delete all insns made since FROM.
2476 FROM becomes the new last instruction. */
2479 delete_insns_since (from)
2485 NEXT_INSN (from) = 0;
2489 /* This function is deprecated, please use sequences instead.
2491 Move a consecutive bunch of insns to a different place in the chain.
2492 The insns to be moved are those between FROM and TO.
2493 They are moved to a new position after the insn AFTER.
2494 AFTER must not be FROM or TO or any insn in between.
2496 This function does not know about SEQUENCEs and hence should not be
2497 called after delay-slot filling has been done. */
2500 reorder_insns (from, to, after)
2501 rtx from, to, after;
2503 /* Splice this bunch out of where it is now. */
2504 if (PREV_INSN (from))
2505 NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to);
2507 PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from);
2508 if (last_insn == to)
2509 last_insn = PREV_INSN (from);
2510 if (first_insn == from)
2511 first_insn = NEXT_INSN (to);
2513 /* Make the new neighbors point to it and it to them. */
2514 if (NEXT_INSN (after))
2515 PREV_INSN (NEXT_INSN (after)) = to;
2517 NEXT_INSN (to) = NEXT_INSN (after);
2518 PREV_INSN (from) = after;
2519 NEXT_INSN (after) = from;
2520 if (after == last_insn)
2524 /* Return the line note insn preceding INSN. */
2527 find_line_note (insn)
2530 if (no_line_numbers)
2533 for (; insn; insn = PREV_INSN (insn))
2534 if (GET_CODE (insn) == NOTE
2535 && NOTE_LINE_NUMBER (insn) >= 0)
2541 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2542 of the moved insns when debugging. This may insert a note between AFTER
2543 and FROM, and another one after TO. */
2546 reorder_insns_with_line_notes (from, to, after)
2547 rtx from, to, after;
2549 rtx from_line = find_line_note (from);
2550 rtx after_line = find_line_note (after);
2552 reorder_insns (from, to, after);
2554 if (from_line == after_line)
2558 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2559 NOTE_LINE_NUMBER (from_line),
2562 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2563 NOTE_LINE_NUMBER (after_line),
2567 /* Emit an insn of given code and pattern
2568 at a specified place within the doubly-linked list. */
2570 /* Make an instruction with body PATTERN
2571 and output it before the instruction BEFORE. */
2574 emit_insn_before (pattern, before)
2575 register rtx pattern, before;
2577 register rtx insn = before;
2579 if (GET_CODE (pattern) == SEQUENCE)
2583 for (i = 0; i < XVECLEN (pattern, 0); i++)
2585 insn = XVECEXP (pattern, 0, i);
2586 add_insn_before (insn, before);
2588 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2589 sequence_result[XVECLEN (pattern, 0)] = pattern;
2593 insn = make_insn_raw (pattern);
2594 add_insn_before (insn, before);
2600 /* Make an instruction with body PATTERN and code JUMP_INSN
2601 and output it before the instruction BEFORE. */
2604 emit_jump_insn_before (pattern, before)
2605 register rtx pattern, before;
2609 if (GET_CODE (pattern) == SEQUENCE)
2610 insn = emit_insn_before (pattern, before);
2613 insn = make_jump_insn_raw (pattern);
2614 add_insn_before (insn, before);
2620 /* Make an instruction with body PATTERN and code CALL_INSN
2621 and output it before the instruction BEFORE. */
2624 emit_call_insn_before (pattern, before)
2625 register rtx pattern, before;
2629 if (GET_CODE (pattern) == SEQUENCE)
2630 insn = emit_insn_before (pattern, before);
2633 insn = make_call_insn_raw (pattern);
2634 add_insn_before (insn, before);
2635 PUT_CODE (insn, CALL_INSN);
2641 /* Make an insn of code BARRIER
2642 and output it before the insn AFTER. */
2645 emit_barrier_before (before)
2646 register rtx before;
2648 register rtx insn = rtx_alloc (BARRIER);
2650 INSN_UID (insn) = cur_insn_uid++;
2652 add_insn_before (insn, before);
2656 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
2659 emit_note_before (subtype, before)
2663 register rtx note = rtx_alloc (NOTE);
2664 INSN_UID (note) = cur_insn_uid++;
2665 NOTE_SOURCE_FILE (note) = 0;
2666 NOTE_LINE_NUMBER (note) = subtype;
2668 add_insn_before (note, before);
2672 /* Make an insn of code INSN with body PATTERN
2673 and output it after the insn AFTER. */
2676 emit_insn_after (pattern, after)
2677 register rtx pattern, after;
2679 register rtx insn = after;
2681 if (GET_CODE (pattern) == SEQUENCE)
2685 for (i = 0; i < XVECLEN (pattern, 0); i++)
2687 insn = XVECEXP (pattern, 0, i);
2688 add_insn_after (insn, after);
2691 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2692 sequence_result[XVECLEN (pattern, 0)] = pattern;
2696 insn = make_insn_raw (pattern);
2697 add_insn_after (insn, after);
2703 /* Similar to emit_insn_after, except that line notes are to be inserted so
2704 as to act as if this insn were at FROM. */
2707 emit_insn_after_with_line_notes (pattern, after, from)
2708 rtx pattern, after, from;
2710 rtx from_line = find_line_note (from);
2711 rtx after_line = find_line_note (after);
2712 rtx insn = emit_insn_after (pattern, after);
2715 emit_line_note_after (NOTE_SOURCE_FILE (from_line),
2716 NOTE_LINE_NUMBER (from_line),
2720 emit_line_note_after (NOTE_SOURCE_FILE (after_line),
2721 NOTE_LINE_NUMBER (after_line),
2725 /* Make an insn of code JUMP_INSN with body PATTERN
2726 and output it after the insn AFTER. */
2729 emit_jump_insn_after (pattern, after)
2730 register rtx pattern, after;
2734 if (GET_CODE (pattern) == SEQUENCE)
2735 insn = emit_insn_after (pattern, after);
2738 insn = make_jump_insn_raw (pattern);
2739 add_insn_after (insn, after);
2745 /* Make an insn of code BARRIER
2746 and output it after the insn AFTER. */
2749 emit_barrier_after (after)
2752 register rtx insn = rtx_alloc (BARRIER);
2754 INSN_UID (insn) = cur_insn_uid++;
2756 add_insn_after (insn, after);
2760 /* Emit the label LABEL after the insn AFTER. */
2763 emit_label_after (label, after)
2766 /* This can be called twice for the same label
2767 as a result of the confusion that follows a syntax error!
2768 So make it harmless. */
2769 if (INSN_UID (label) == 0)
2771 INSN_UID (label) = cur_insn_uid++;
2772 add_insn_after (label, after);
2778 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
2781 emit_note_after (subtype, after)
2785 register rtx note = rtx_alloc (NOTE);
2786 INSN_UID (note) = cur_insn_uid++;
2787 NOTE_SOURCE_FILE (note) = 0;
2788 NOTE_LINE_NUMBER (note) = subtype;
2789 add_insn_after (note, after);
2793 /* Emit a line note for FILE and LINE after the insn AFTER. */
2796 emit_line_note_after (file, line, after)
2803 if (no_line_numbers && line > 0)
2809 note = rtx_alloc (NOTE);
2810 INSN_UID (note) = cur_insn_uid++;
2811 NOTE_SOURCE_FILE (note) = file;
2812 NOTE_LINE_NUMBER (note) = line;
2813 add_insn_after (note, after);
2817 /* Make an insn of code INSN with pattern PATTERN
2818 and add it to the end of the doubly-linked list.
2819 If PATTERN is a SEQUENCE, take the elements of it
2820 and emit an insn for each element.
2822 Returns the last insn emitted. */
2828 rtx insn = last_insn;
2830 if (GET_CODE (pattern) == SEQUENCE)
2834 for (i = 0; i < XVECLEN (pattern, 0); i++)
2836 insn = XVECEXP (pattern, 0, i);
2839 if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE)
2840 sequence_result[XVECLEN (pattern, 0)] = pattern;
2844 insn = make_insn_raw (pattern);
2851 /* Emit the insns in a chain starting with INSN.
2852 Return the last insn emitted. */
2862 rtx next = NEXT_INSN (insn);
2871 /* Emit the insns in a chain starting with INSN and place them in front of
2872 the insn BEFORE. Return the last insn emitted. */
2875 emit_insns_before (insn, before)
2883 rtx next = NEXT_INSN (insn);
2884 add_insn_before (insn, before);
2892 /* Emit the insns in a chain starting with FIRST and place them in back of
2893 the insn AFTER. Return the last insn emitted. */
2896 emit_insns_after (first, after)
2901 register rtx after_after;
2909 for (last = first; NEXT_INSN (last); last = NEXT_INSN (last))
2912 after_after = NEXT_INSN (after);
2914 NEXT_INSN (after) = first;
2915 PREV_INSN (first) = after;
2916 NEXT_INSN (last) = after_after;
2918 PREV_INSN (after_after) = last;
2920 if (after == last_insn)
2925 /* Make an insn of code JUMP_INSN with pattern PATTERN
2926 and add it to the end of the doubly-linked list. */
2929 emit_jump_insn (pattern)
2932 if (GET_CODE (pattern) == SEQUENCE)
2933 return emit_insn (pattern);
2936 register rtx insn = make_jump_insn_raw (pattern);
2942 /* Make an insn of code CALL_INSN with pattern PATTERN
2943 and add it to the end of the doubly-linked list. */
2946 emit_call_insn (pattern)
2949 if (GET_CODE (pattern) == SEQUENCE)
2950 return emit_insn (pattern);
2953 register rtx insn = make_call_insn_raw (pattern);
2955 PUT_CODE (insn, CALL_INSN);
2960 /* Add the label LABEL to the end of the doubly-linked list. */
2966 /* This can be called twice for the same label
2967 as a result of the confusion that follows a syntax error!
2968 So make it harmless. */
2969 if (INSN_UID (label) == 0)
2971 INSN_UID (label) = cur_insn_uid++;
2977 /* Make an insn of code BARRIER
2978 and add it to the end of the doubly-linked list. */
2983 register rtx barrier = rtx_alloc (BARRIER);
2984 INSN_UID (barrier) = cur_insn_uid++;
2989 /* Make an insn of code NOTE
2990 with data-fields specified by FILE and LINE
2991 and add it to the end of the doubly-linked list,
2992 but only if line-numbers are desired for debugging info. */
2995 emit_line_note (file, line)
2999 emit_filename = file;
3003 if (no_line_numbers)
3007 return emit_note (file, line);
3010 /* Make an insn of code NOTE
3011 with data-fields specified by FILE and LINE
3012 and add it to the end of the doubly-linked list.
3013 If it is a line-number NOTE, omit it if it matches the previous one. */
3016 emit_note (file, line)
3024 if (file && last_filename && !strcmp (file, last_filename)
3025 && line == last_linenum)
3027 last_filename = file;
3028 last_linenum = line;
3031 if (no_line_numbers && line > 0)
3037 note = rtx_alloc (NOTE);
3038 INSN_UID (note) = cur_insn_uid++;
3039 NOTE_SOURCE_FILE (note) = file;
3040 NOTE_LINE_NUMBER (note) = line;
3045 /* Emit a NOTE, and don't omit it even if LINE it the previous note. */
3048 emit_line_note_force (file, line)
3053 return emit_line_note (file, line);
3056 /* Cause next statement to emit a line note even if the line number
3057 has not changed. This is used at the beginning of a function. */
3060 force_next_line_note ()
3065 /* Return an indication of which type of insn should have X as a body.
3066 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3072 if (GET_CODE (x) == CODE_LABEL)
3074 if (GET_CODE (x) == CALL)
3076 if (GET_CODE (x) == RETURN)
3078 if (GET_CODE (x) == SET)
3080 if (SET_DEST (x) == pc_rtx)
3082 else if (GET_CODE (SET_SRC (x)) == CALL)
3087 if (GET_CODE (x) == PARALLEL)
3090 for (j = XVECLEN (x, 0) - 1; j >= 0; j--)
3091 if (GET_CODE (XVECEXP (x, 0, j)) == CALL)
3093 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3094 && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx)
3096 else if (GET_CODE (XVECEXP (x, 0, j)) == SET
3097 && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL)
3103 /* Emit the rtl pattern X as an appropriate kind of insn.
3104 If X is a label, it is simply added into the insn chain. */
3110 enum rtx_code code = classify_insn (x);
3112 if (code == CODE_LABEL)
3113 return emit_label (x);
3114 else if (code == INSN)
3115 return emit_insn (x);
3116 else if (code == JUMP_INSN)
3118 register rtx insn = emit_jump_insn (x);
3119 if (simplejump_p (insn) || GET_CODE (x) == RETURN)
3120 return emit_barrier ();
3123 else if (code == CALL_INSN)
3124 return emit_call_insn (x);
3129 /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */
3134 struct sequence_stack *tem;
3136 if (sequence_element_free_list)
3138 /* Reuse a previously-saved struct sequence_stack. */
3139 tem = sequence_element_free_list;
3140 sequence_element_free_list = tem->next;
3143 tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack));
3145 tem->next = sequence_stack;
3146 tem->first = first_insn;
3147 tem->last = last_insn;
3148 tem->sequence_rtl_expr = sequence_rtl_expr;
3150 sequence_stack = tem;
3156 /* Similarly, but indicate that this sequence will be placed in
3160 start_sequence_for_rtl_expr (t)
3165 sequence_rtl_expr = t;
3168 /* Set up the insn chain starting with FIRST
3169 as the current sequence, saving the previously current one. */
3172 push_to_sequence (first)
3179 for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last));
3185 /* Set up the outer-level insn chain
3186 as the current sequence, saving the previously current one. */
3189 push_topmost_sequence ()
3191 struct sequence_stack *stack, *top = NULL;
3195 for (stack = sequence_stack; stack; stack = stack->next)
3198 first_insn = top->first;
3199 last_insn = top->last;
3200 sequence_rtl_expr = top->sequence_rtl_expr;
3203 /* After emitting to the outer-level insn chain, update the outer-level
3204 insn chain, and restore the previous saved state. */
3207 pop_topmost_sequence ()
3209 struct sequence_stack *stack, *top = NULL;
3211 for (stack = sequence_stack; stack; stack = stack->next)
3214 top->first = first_insn;
3215 top->last = last_insn;
3216 /* ??? Why don't we save sequence_rtl_expr here? */
3221 /* After emitting to a sequence, restore previous saved state.
3223 To get the contents of the sequence just made,
3224 you must call `gen_sequence' *before* calling here. */
3229 struct sequence_stack *tem = sequence_stack;
3231 first_insn = tem->first;
3232 last_insn = tem->last;
3233 sequence_rtl_expr = tem->sequence_rtl_expr;
3234 sequence_stack = tem->next;
3236 tem->next = sequence_element_free_list;
3237 sequence_element_free_list = tem;
3240 /* Return 1 if currently emitting into a sequence. */
3245 return sequence_stack != 0;
3248 /* Generate a SEQUENCE rtx containing the insns already emitted
3249 to the current sequence.
3251 This is how the gen_... function from a DEFINE_EXPAND
3252 constructs the SEQUENCE that it returns. */
3262 /* Count the insns in the chain. */
3264 for (tem = first_insn; tem; tem = NEXT_INSN (tem))
3267 /* If only one insn, return its pattern rather than a SEQUENCE.
3268 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3269 the case of an empty list.) */
3271 && ! RTX_FRAME_RELATED_P (first_insn)
3272 && (GET_CODE (first_insn) == INSN
3273 || GET_CODE (first_insn) == JUMP_INSN
3274 /* Don't discard the call usage field. */
3275 || (GET_CODE (first_insn) == CALL_INSN
3276 && CALL_INSN_FUNCTION_USAGE (first_insn) == NULL_RTX)))
3278 NEXT_INSN (first_insn) = free_insn;
3279 free_insn = first_insn;
3280 return PATTERN (first_insn);
3283 /* Put them in a vector. See if we already have a SEQUENCE of the
3284 appropriate length around. */
3285 if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0)
3286 sequence_result[len] = 0;
3289 /* Ensure that this rtl goes in saveable_obstack, since we may
3291 push_obstacks_nochange ();
3292 rtl_in_saveable_obstack ();
3293 result = gen_rtx_SEQUENCE (VOIDmode, rtvec_alloc (len));
3297 for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++)
3298 XVECEXP (result, 0, i) = tem;
3303 /* Put the various virtual registers into REGNO_REG_RTX. */
3306 init_virtual_regs ()
3308 regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx;
3309 regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx;
3310 regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx;
3311 regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx;
3312 regno_reg_rtx[VIRTUAL_CFA_REGNUM] = virtual_cfa_rtx;
3315 /* Initialize data structures and variables in this file
3316 before generating rtl for each function. */
3325 sequence_rtl_expr = NULL;
3327 reg_rtx_no = LAST_VIRTUAL_REGISTER + 1;
3330 first_label_num = label_num;
3332 sequence_stack = NULL;
3334 /* Clear the start_sequence/gen_sequence cache. */
3335 sequence_element_free_list = 0;
3336 for (i = 0; i < SEQUENCE_RESULT_SIZE; i++)
3337 sequence_result[i] = 0;
3340 /* Init the tables that describe all the pseudo regs. */
3342 regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
3345 = (char *) savealloc (regno_pointer_flag_length);
3346 bzero (regno_pointer_flag, regno_pointer_flag_length);
3349 = (char *) savealloc (regno_pointer_flag_length);
3350 bzero (regno_pointer_align, regno_pointer_flag_length);
3353 = (rtx *) savealloc (regno_pointer_flag_length * sizeof (rtx));
3354 bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx));
3356 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3357 init_virtual_regs ();
3359 /* Indicate that the virtual registers and stack locations are
3361 REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
3362 REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
3363 REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
3364 REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
3366 REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
3367 REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
3368 REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
3369 REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
3370 REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
3372 #ifdef STACK_BOUNDARY
3373 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3374 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3375 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM)
3376 = STACK_BOUNDARY / BITS_PER_UNIT;
3377 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM) = STACK_BOUNDARY / BITS_PER_UNIT;
3379 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM)
3380 = STACK_BOUNDARY / BITS_PER_UNIT;
3381 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM)
3382 = STACK_BOUNDARY / BITS_PER_UNIT;
3383 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM)
3384 = STACK_BOUNDARY / BITS_PER_UNIT;
3385 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM)
3386 = STACK_BOUNDARY / BITS_PER_UNIT;
3387 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM) = UNITS_PER_WORD;
3390 #ifdef INIT_EXPANDERS
3395 /* Create some permanent unique rtl objects shared between all functions.
3396 LINE_NUMBERS is nonzero if line numbers are to be generated. */
3399 init_emit_once (line_numbers)
3403 enum machine_mode mode;
3404 enum machine_mode double_mode;
3406 no_line_numbers = ! line_numbers;
3408 sequence_stack = NULL;
3410 /* Compute the word and byte modes. */
3412 byte_mode = VOIDmode;
3413 word_mode = VOIDmode;
3414 double_mode = VOIDmode;
3416 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3417 mode = GET_MODE_WIDER_MODE (mode))
3419 if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT
3420 && byte_mode == VOIDmode)
3423 if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD
3424 && word_mode == VOIDmode)
3428 #ifndef DOUBLE_TYPE_SIZE
3429 #define DOUBLE_TYPE_SIZE (BITS_PER_WORD * 2)
3432 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3433 mode = GET_MODE_WIDER_MODE (mode))
3435 if (GET_MODE_BITSIZE (mode) == DOUBLE_TYPE_SIZE
3436 && double_mode == VOIDmode)
3440 ptr_mode = mode_for_size (POINTER_SIZE, GET_MODE_CLASS (Pmode), 0);
3442 /* Create the unique rtx's for certain rtx codes and operand values. */
3444 for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++)
3446 PUT_CODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], CONST_INT);
3447 PUT_MODE (&const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode);
3448 INTVAL (&const_int_rtx[i + MAX_SAVED_CONST_INT]) = i;
3451 if (STORE_FLAG_VALUE >= - MAX_SAVED_CONST_INT
3452 && STORE_FLAG_VALUE <= MAX_SAVED_CONST_INT)
3453 const_true_rtx = &const_int_rtx[STORE_FLAG_VALUE + MAX_SAVED_CONST_INT];
3455 const_true_rtx = gen_rtx_CONST_INT (VOIDmode, STORE_FLAG_VALUE);
3457 dconst0 = REAL_VALUE_ATOF ("0", double_mode);
3458 dconst1 = REAL_VALUE_ATOF ("1", double_mode);
3459 dconst2 = REAL_VALUE_ATOF ("2", double_mode);
3460 dconstm1 = REAL_VALUE_ATOF ("-1", double_mode);
3462 for (i = 0; i <= 2; i++)
3464 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
3465 mode = GET_MODE_WIDER_MODE (mode))
3467 rtx tem = rtx_alloc (CONST_DOUBLE);
3468 union real_extract u;
3470 bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */
3471 u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2;
3473 bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u);
3474 CONST_DOUBLE_MEM (tem) = cc0_rtx;
3475 PUT_MODE (tem, mode);
3477 const_tiny_rtx[i][(int) mode] = tem;
3480 const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i);
3482 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
3483 mode = GET_MODE_WIDER_MODE (mode))
3484 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3486 for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT);
3488 mode = GET_MODE_WIDER_MODE (mode))
3489 const_tiny_rtx[i][(int) mode] = GEN_INT (i);
3492 for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode;
3493 mode = GET_MODE_WIDER_MODE (mode))
3494 const_tiny_rtx[0][(int) mode] = const0_rtx;
3497 /* Assign register numbers to the globally defined register rtx.
3498 This must be done at runtime because the register number field
3499 is in a union and some compilers can't initialize unions. */
3501 REGNO (stack_pointer_rtx) = STACK_POINTER_REGNUM;
3502 PUT_MODE (stack_pointer_rtx, Pmode);
3503 REGNO (frame_pointer_rtx) = FRAME_POINTER_REGNUM;
3504 PUT_MODE (frame_pointer_rtx, Pmode);
3505 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
3506 REGNO (hard_frame_pointer_rtx) = HARD_FRAME_POINTER_REGNUM;
3507 PUT_MODE (hard_frame_pointer_rtx, Pmode);
3509 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
3510 REGNO (arg_pointer_rtx) = ARG_POINTER_REGNUM;
3511 PUT_MODE (arg_pointer_rtx, Pmode);
3514 REGNO (virtual_incoming_args_rtx) = VIRTUAL_INCOMING_ARGS_REGNUM;
3515 PUT_MODE (virtual_incoming_args_rtx, Pmode);
3516 REGNO (virtual_stack_vars_rtx) = VIRTUAL_STACK_VARS_REGNUM;
3517 PUT_MODE (virtual_stack_vars_rtx, Pmode);
3518 REGNO (virtual_stack_dynamic_rtx) = VIRTUAL_STACK_DYNAMIC_REGNUM;
3519 PUT_MODE (virtual_stack_dynamic_rtx, Pmode);
3520 REGNO (virtual_outgoing_args_rtx) = VIRTUAL_OUTGOING_ARGS_REGNUM;
3521 PUT_MODE (virtual_outgoing_args_rtx, Pmode);
3522 REGNO (virtual_cfa_rtx) = VIRTUAL_CFA_REGNUM;
3523 PUT_MODE (virtual_cfa_rtx, Pmode);
3525 #ifdef RETURN_ADDRESS_POINTER_REGNUM
3526 return_address_pointer_rtx
3527 = gen_rtx_raw_REG (Pmode, RETURN_ADDRESS_POINTER_REGNUM);
3531 struct_value_rtx = STRUCT_VALUE;
3533 struct_value_rtx = gen_rtx_REG (Pmode, STRUCT_VALUE_REGNUM);
3536 #ifdef STRUCT_VALUE_INCOMING
3537 struct_value_incoming_rtx = STRUCT_VALUE_INCOMING;
3539 #ifdef STRUCT_VALUE_INCOMING_REGNUM
3540 struct_value_incoming_rtx
3541 = gen_rtx_REG (Pmode, STRUCT_VALUE_INCOMING_REGNUM);
3543 struct_value_incoming_rtx = struct_value_rtx;
3547 #ifdef STATIC_CHAIN_REGNUM
3548 static_chain_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_REGNUM);
3550 #ifdef STATIC_CHAIN_INCOMING_REGNUM
3551 if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM)
3552 static_chain_incoming_rtx = gen_rtx_REG (Pmode, STATIC_CHAIN_INCOMING_REGNUM);
3555 static_chain_incoming_rtx = static_chain_rtx;
3559 static_chain_rtx = STATIC_CHAIN;
3561 #ifdef STATIC_CHAIN_INCOMING
3562 static_chain_incoming_rtx = STATIC_CHAIN_INCOMING;
3564 static_chain_incoming_rtx = static_chain_rtx;
3568 #ifdef PIC_OFFSET_TABLE_REGNUM
3569 pic_offset_table_rtx = gen_rtx_REG (Pmode, PIC_OFFSET_TABLE_REGNUM);
3572 #ifdef INIT_EXPANDERS
3573 /* This is to initialize save_machine_status and restore_machine_status before
3574 the first call to push_function_context_to. This is needed by the Chill
3575 front end which calls push_function_context_to before the first cal to
3576 init_function_start. */
3581 /* Query and clear/ restore no_line_numbers. This is used by the
3582 switch / case handling in stmt.c to give proper line numbers in
3583 warnings about unreachable code. */
3586 force_line_numbers ()
3588 int old = no_line_numbers;
3590 no_line_numbers = 0;
3592 force_next_line_note ();
3597 restore_line_number_status (old_value)
3600 no_line_numbers = old_value;