1 /* Copyright (C) 2006, 2008 Free Software Foundation, Inc.
3 This file is free software; you can redistribute it and/or modify it under
4 the terms of the GNU General Public License as published by the Free
5 Software Foundation; either version 2 of the License, or (at your option)
8 This file is distributed in the hope that it will be useful, but WITHOUT
9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 You should have received a copy of the GNU General Public License
14 along with this file; see the file COPYING. If not, write to the Free
15 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
18 /* As a special exception, if you include this header file into source files
19 compiled by GCC, this header file does not by itself cause the resulting
20 executable to be covered by the GNU General Public License. This exception
21 does not however invalidate any other reasons why the executable file might be
22 covered by the GNU General Public License. */
24 #ifndef __SPU_MFCIO_H__
25 #define __SPU_MFCIO_H__ 1
27 #include <spu_intrinsics.h>
29 typedef unsigned long long uint64_t;
39 /****************************************************************/
40 /* DMA list element structure*/
41 /****************************************************************/
46 typedef struct mfc_list_element {
47 uint64_t notify : 1; /** Stall-and-notify bit */
48 uint64_t reserved : 16;
49 uint64_t size : 15; /** Transfer size */
50 uint64_t eal : 32; /** Lower word of effective address */
53 /****************************************************************/
54 /* DMA max/min size definitions. */
55 /****************************************************************/
57 #define MFC_MIN_DMA_SIZE_SHIFT 4 /* 16 bytes */
58 #define MFC_MAX_DMA_SIZE_SHIFT 14 /* 16384 bytes */
60 #define MFC_MIN_DMA_SIZE (1 << MFC_MIN_DMA_SIZE_SHIFT)
61 #define MFC_MAX_DMA_SIZE (1 << MFC_MAX_DMA_SIZE_SHIFT)
63 #define MFC_MIN_DMA_SIZE_MASK (MFC_MIN_DMA_SIZE - 1)
64 #define MFC_MAX_DMA_SIZE_MASK (MFC_MAX_DMA_SIZE - 1)
66 #define MFC_MIN_DMA_LIST_ELEMENTS 1
67 #define MFC_MAX_DMA_LIST_ELEMENTS 2048
69 #define MFC_MIN_DMA_LIST_SIZE (MFC_MIN_DMA_LIST_ELEMENTS << 3) /* 8 bytes */
70 #define MFC_MAX_DMA_LIST_SIZE (MFC_MAX_DMA_LIST_ELEMENTS << 3) /* 16K bytes */
72 /****************************************************************/
73 /* MFC DMA command modifiers to identify classes of operations. */
74 /****************************************************************/
76 /* Note: These commands modifier may be used in conjunction with the base
77 command types (i.e. MFC_PUT_CMD, MFC_GET_CMD, and MFC_SNDSIG_CMD)
78 to construct the various command permutations. */
80 #define MFC_BARRIER_ENABLE 0x0001
81 #define MFC_FENCE_ENABLE 0x0002
82 #define MFC_LIST_ENABLE 0x0004
83 #define MFC_RESULT_ENABLE 0x0010
85 /****************************************************************/
86 /* MFC DMA Put Commands */
87 /****************************************************************/
89 #define MFC_PUT_CMD 0x0020
90 #define MFC_PUTB_CMD (MFC_PUT_CMD | MFC_BARRIER_ENABLE)
91 #define MFC_PUTF_CMD (MFC_PUT_CMD | MFC_FENCE_ENABLE)
92 #define MFC_PUTL_CMD (MFC_PUT_CMD | MFC_LIST_ENABLE)
93 #define MFC_PUTLB_CMD (MFC_PUTL_CMD | MFC_BARRIER_ENABLE)
94 #define MFC_PUTLF_CMD (MFC_PUTL_CMD | MFC_FENCE_ENABLE)
96 #define MFC_PUTR_CMD (MFC_PUT_CMD | MFC_RESULT_ENABLE)
97 #define MFC_PUTRB_CMD (MFC_PUTR_CMD | MFC_BARRIER_ENABLE)
98 #define MFC_PUTRF_CMD (MFC_PUTR_CMD | MFC_FENCE_ENABLE)
99 #define MFC_PUTRL_CMD (MFC_PUTR_CMD | MFC_LIST_ENABLE)
100 #define MFC_PUTRLB_CMD (MFC_PUTRL_CMD | MFC_BARRIER_ENABLE)
101 #define MFC_PUTRLF_CMD (MFC_PUTRL_CMD | MFC_FENCE_ENABLE)
103 /****************************************************************/
104 /* MFC DMA Get Commands */
105 /****************************************************************/
107 #define MFC_GET_CMD 0x0040
108 #define MFC_GETB_CMD (MFC_GET_CMD | MFC_BARRIER_ENABLE)
109 #define MFC_GETF_CMD (MFC_GET_CMD | MFC_FENCE_ENABLE)
110 #define MFC_GETL_CMD (MFC_GET_CMD | MFC_LIST_ENABLE)
111 #define MFC_GETLB_CMD (MFC_GETL_CMD | MFC_BARRIER_ENABLE)
112 #define MFC_GETLF_CMD (MFC_GETL_CMD | MFC_FENCE_ENABLE)
114 /****************************************************************/
115 /* MFC Synchronization Commands */
116 /****************************************************************/
118 #define MFC_SNDSIG_CMD 0x00A0
119 #define MFC_SNDSIGB_CMD (MFC_SNDSIG_CMD | MFC_BARRIER_ENABLE)
120 #define MFC_SNDSIGF_CMD (MFC_SNDSIG_CMD | MFC_FENCE_ENABLE)
121 #define MFC_BARRIER_CMD 0x00C0
122 #define MFC_EIEIO_CMD 0x00C8
123 #define MFC_SYNC_CMD 0x00CC
125 /****************************************************************/
126 /* MFC Atomic Commands */
127 /****************************************************************/
129 #define MFC_GETLLAR_CMD 0x00D0
130 #define MFC_PUTLLC_CMD 0x00B4
131 #define MFC_PUTLLUC_CMD 0x00B0
132 #define MFC_PUTQLLUC_CMD 0x00B8
134 /****************************************************************/
135 /* MFC SL1 Storage Control Commands */
136 /****************************************************************/
138 #define MFC_SDCRT_CMD 0x0080
139 #define MFC_SDCRTST_CMD 0x0081
140 #define MFC_SDCRZ_CMD 0x0089
141 #define MFC_SDCRST_CMD 0x008D
142 #define MFC_SDCRF_CMD 0x008F
144 /****************************************************************/
145 /* Channel Defines */
146 /****************************************************************/
148 /* Events Defines for channels
149 * 0 (SPU_RdEventStat),
150 * 1 (SPU_WrEventMask), and
151 * 2 (SPU_WrEventAck).
153 #define MFC_TAG_STATUS_UPDATE_EVENT 0x00000001
154 #define MFC_LIST_STALL_NOTIFY_EVENT 0x00000002
155 #define MFC_COMMAND_QUEUE_AVAILABLE_EVENT 0x00000008
156 #define MFC_IN_MBOX_AVAILABLE_EVENT 0x00000010
157 #define MFC_DECREMENTER_EVENT 0x00000020
158 #define MFC_OUT_INTR_MBOX_AVAILABLE_EVENT 0x00000040
159 #define MFC_OUT_MBOX_AVAILABLE_EVENT 0x00000080
160 #define MFC_SIGNAL_NOTIFY_2_EVENT 0x00000100
161 #define MFC_SIGNAL_NOTIFY_1_EVENT 0x00000200
162 #define MFC_LLR_LOST_EVENT 0x00000400
163 #define MFC_PRIV_ATTN_EVENT 0x00000800
164 #define MFC_MULTI_SRC_SYNC_EVENT 0x00001000
166 /* Tag Status Update defines for channel 23 (MFC_WrTagUpdate) */
167 #define MFC_TAG_UPDATE_IMMEDIATE 0x0
168 #define MFC_TAG_UPDATE_ANY 0x1
169 #define MFC_TAG_UPDATE_ALL 0x2
171 /* Atomic Command Status defines for channel 27 (MFC_RdAtomicStat) */
172 #define MFC_PUTLLC_STATUS 0x00000001
173 #define MFC_PUTLLUC_STATUS 0x00000002
174 #define MFC_GETLLAR_STATUS 0x00000004
177 /****************************************************************/
178 /* Definitions for constructing a 32-bit command word */
179 /* including the transfer and replacement class id and the */
180 /* command opcode. */
181 /****************************************************************/
182 #define MFC_CMD_WORD(_tid, _rid, _cmd) (((_tid)<<24)|((_rid)<<16)|(_cmd))
185 /* Addressing Utilities */
186 #define mfc_ea2h(ea) (unsigned int)((unsigned long long)(ea)>>32)
187 #define mfc_ea2l(ea) (unsigned int)(ea)
188 #define mfc_hl2ea(h,l) si_to_ullong(si_selb(si_from_uint(h),\
189 si_rotqbyi(si_from_uint(l), -4),\
191 #define mfc_ceil128(v) (((v) + 127) & ~127)
194 #define mfc_put( ls,ea,size,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),mfc_ea2l(ea),size,tag,MFC_CMD_WORD(tid,rid,MFC_PUT_CMD))
195 #define mfc_putf( ls,ea,size,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),mfc_ea2l(ea),size,tag,MFC_CMD_WORD(tid,rid,MFC_PUTF_CMD))
196 #define mfc_putb( ls,ea,size,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),mfc_ea2l(ea),size,tag,MFC_CMD_WORD(tid,rid,MFC_PUTB_CMD))
197 #define mfc_get( ls,ea,size,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),mfc_ea2l(ea),size,tag,MFC_CMD_WORD(tid,rid,MFC_GET_CMD))
198 #define mfc_getf( ls,ea,size,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),mfc_ea2l(ea),size,tag,MFC_CMD_WORD(tid,rid,MFC_GETF_CMD))
199 #define mfc_getb( ls,ea,size,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),mfc_ea2l(ea),size,tag,MFC_CMD_WORD(tid,rid,MFC_GETB_CMD))
202 #define mfc_putl( ls,ea,lsa,size,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),(unsigned int)(lsa),size,tag,MFC_CMD_WORD(tid,rid,MFC_PUTL_CMD))
203 #define mfc_putlf( ls,ea,lsa,size,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),(unsigned int)(lsa),size,tag,MFC_CMD_WORD(tid,rid,MFC_PUTLF_CMD))
204 #define mfc_putlb( ls,ea,lsa,size,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),(unsigned int)(lsa),size,tag,MFC_CMD_WORD(tid,rid,MFC_PUTLB_CMD))
205 #define mfc_getl( ls,ea,lsa,size,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),(unsigned int)(lsa),size,tag,MFC_CMD_WORD(tid,rid,MFC_GETL_CMD))
206 #define mfc_getlf( ls,ea,lsa,size,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),(unsigned int)(lsa),size,tag,MFC_CMD_WORD(tid,rid,MFC_GETLF_CMD))
207 #define mfc_getlb( ls,ea,lsa,size,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),(unsigned int)(lsa),size,tag,MFC_CMD_WORD(tid,rid,MFC_GETLB_CMD))
209 /* MFC Atomic Update DMA */
210 #define mfc_getllar( ls,ea,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),mfc_ea2l(ea),128, 0,MFC_CMD_WORD(tid,rid,MFC_GETLLAR_CMD))
211 #define mfc_putllc( ls,ea,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),mfc_ea2l(ea),128, 0,MFC_CMD_WORD(tid,rid,MFC_PUTLLC_CMD))
212 #define mfc_putlluc( ls,ea,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),mfc_ea2l(ea),128, 0,MFC_CMD_WORD(tid,rid,MFC_PUTLLUC_CMD))
213 #define mfc_putqlluc(ls,ea,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),mfc_ea2l(ea),128,tag,MFC_CMD_WORD(tid,rid,MFC_PUTQLLUC_CMD))
215 /* MFC Synchronization Commands */
216 #define mfc_sndsig( ls,ea,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),mfc_ea2l(ea),4,tag,MFC_CMD_WORD(tid,rid,MFC_SNDSIG_CMD))
217 #define mfc_sndsigb(ls,ea,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),mfc_ea2l(ea),4,tag,MFC_CMD_WORD(tid,rid,MFC_SNDSIGB_CMD))
218 #define mfc_sndsigf(ls,ea,tag,tid,rid) spu_mfcdma64(ls,mfc_ea2h(ea),mfc_ea2l(ea),4,tag,MFC_CMD_WORD(tid,rid,MFC_SNDSIGF_CMD))
219 #define mfc_barrier(tag) spu_mfcdma32(0,0,0,tag,MFC_BARRIER_CMD)
220 #define mfc_eieio(tag,tid,rid) spu_mfcdma32(0,0,0,tag,MFC_CMD_WORD(tid,rid,MFC_EIEIO_CMD))
221 #define mfc_sync(tag) spu_mfcdma32(0,0,0,tag,MFC_SYNC_CMD)
223 /* MFC SL1 Storage Control Commands */
224 #define mfc_sdcrt( ea,size,tag,tid,rid) spu_mfcdma64(0,mfc_ea2h(ea),mfc_ea2l(ea),size,tag,MFC_CMD_WORD(tid,rid,MFC_SDCRT_CMD))
225 #define mfc_sdcrtst(ea,size,tag,tid,rid) spu_mfcdma64(0,mfc_ea2h(ea),mfc_ea2l(ea),size,tag,MFC_CMD_WORD(tid,rid,MFC_SDCRTST_CMD))
226 #define mfc_sdcrz( ea,size,tag,tid,rid) spu_mfcdma64(0,mfc_ea2h(ea),mfc_ea2l(ea),size,tag,MFC_CMD_WORD(tid,rid,MFC_SDCRZ_CMD))
227 #define mfc_sdcrst( ea,size,tag,tid,rid) spu_mfcdma64(0,mfc_ea2h(ea),mfc_ea2l(ea),size,tag,MFC_CMD_WORD(tid,rid,MFC_SDCRST_CMD))
228 #define mfc_sdcrf( ea,size,tag,tid,rid) spu_mfcdma64(0,mfc_ea2h(ea),mfc_ea2l(ea),size,tag,MFC_CMD_WORD(tid,rid,MFC_SDCRF_CMD))
231 #define mfc_stat_cmd_queue() spu_readchcnt(MFC_Cmd)
234 #define mfc_write_tag_mask(mask) spu_writech(MFC_WrTagMask,mask)
235 #define mfc_read_tag_mask() spu_readch(MFC_RdTagMask)
237 #define mfc_write_tag_update(ts) spu_writech(MFC_WrTagUpdate,ts)
238 #define mfc_write_tag_update_immediate() mfc_write_tag_update(MFC_TAG_UPDATE_IMMEDIATE)
239 #define mfc_write_tag_update_any() mfc_write_tag_update(MFC_TAG_UPDATE_ANY)
240 #define mfc_write_tag_update_all() mfc_write_tag_update(MFC_TAG_UPDATE_ALL)
241 #define mfc_stat_tag_update() spu_readchcnt(MFC_WrTagUpdate)
243 #define mfc_read_tag_status() spu_readch(MFC_RdTagStat)
244 #define mfc_read_tag_status_immediate() (mfc_write_tag_update_immediate(), mfc_read_tag_status())
245 #define mfc_read_tag_status_any() (mfc_write_tag_update_any(), mfc_read_tag_status())
246 #define mfc_read_tag_status_all() (mfc_write_tag_update_all(), mfc_read_tag_status())
247 #define mfc_stat_tag_status() spu_readchcnt(MFC_RdTagStat)
249 /* MFC List Stall-and-Notify Tag */
250 #define mfc_read_list_stall_status() spu_readch(MFC_RdListStallStat)
251 #define mfc_stat_list_stall_status() spu_readchcnt(MFC_RdListStallStat)
252 #define mfc_write_list_stall_ack(tag) spu_writech(MFC_WrListStallAck,tag)
255 #define mfc_read_atomic_status() spu_readch(MFC_RdAtomicStat)
256 #define mfc_stat_atomic_status() spu_readchcnt(MFC_RdAtomicStat)
258 /* MFC Multi-source Synchronization */
259 #define mfc_write_multi_src_sync_request() spu_writech(MFC_WrMSSyncReq,0)
260 #define mfc_stat_multi_src_sync_request() spu_readchcnt(MFC_WrMSSyncReq)
263 #define spu_read_signal1() spu_readch(SPU_RdSigNotify1)
264 #define spu_stat_signal1() spu_readchcnt(SPU_RdSigNotify1)
265 #define spu_read_signal2() spu_readch(SPU_RdSigNotify2)
266 #define spu_stat_signal2() spu_readchcnt(SPU_RdSigNotify2)
268 /* SPU/PPE Mailbox */
269 #define spu_read_in_mbox() spu_readch(SPU_RdInMbox)
270 #define spu_stat_in_mbox() spu_readchcnt(SPU_RdInMbox)
271 #define spu_write_out_mbox(a) spu_writech(SPU_WrOutMbox,a)
272 #define spu_stat_out_mbox() spu_readchcnt(SPU_WrOutMbox)
273 #define spu_write_out_intr_mbox(a) spu_writech(SPU_WrOutIntrMbox,a)
274 #define spu_stat_out_intr_mbox() spu_readchcnt(SPU_WrOutIntrMbox)
276 /* SPU Decrementer */
277 #define spu_read_decrementer() spu_readch(SPU_RdDec)
278 #define spu_write_decrementer(cnt) spu_writech(SPU_WrDec,(cnt))
281 #define spu_read_event_status() spu_readch(SPU_RdEventStat)
282 #define spu_stat_event_status() spu_readchcnt(SPU_RdEventStat)
283 #define spu_write_event_mask(mask) spu_writech(SPU_WrEventMask,(mask))
284 #define spu_write_event_ack(ack) spu_writech(SPU_WrEventAck,(ack))
285 #define spu_read_event_mask() spu_readch(SPU_RdEventMask)
287 /* SPU State Management */
288 #define spu_read_machine_status() spu_readch(SPU_RdMachStat)
289 #define spu_write_srr0(srr0) spu_writech(SPU_WrSRR0,srr0)
290 #define spu_read_srr0() spu_readch(SPU_RdSRR0)
292 /* Interrupt-Safe Critical Sections */
294 static __inline__ unsigned int mfc_begin_critical_section (void)
295 __attribute__ ((__always_inline__));
297 static __inline__ unsigned int
298 mfc_begin_critical_section (void)
300 #ifdef SPU_MFCIO_INTERRUPT_SAFE
301 unsigned int __status = spu_read_machine_status ();
309 static __inline__ void mfc_end_critical_section (unsigned int)
310 __attribute__ ((__always_inline__));
312 static __inline__ void
313 mfc_end_critical_section (unsigned int __status __attribute__ ((__unused__)))
315 #ifdef SPU_MFCIO_INTERRUPT_SAFE
321 /* MFC Tag Manager */
323 #define MFC_TAG_INVALID 0xFFFFFFFF
324 #define MFC_TAG_VALID 0x00000000
326 #define mfc_tag_reserve() \
328 #define mfc_tag_release(tag) \
329 __mfc_tag_release((tag))
330 #define mfc_multi_tag_reserve(nr_tags) \
331 __mfc_multi_tag_reserve((nr_tags))
332 #define mfc_multi_tag_release(tag, nr_tags) \
333 __mfc_multi_tag_release((tag),(nr_tags))
335 extern unsigned int __mfc_tag_reserve (void);
336 extern unsigned int __mfc_tag_release (unsigned int);
337 extern unsigned int __mfc_multi_tag_reserve (unsigned int);
338 extern unsigned int __mfc_multi_tag_release (unsigned int, unsigned int);
344 #endif /* __SPU_MFCIO_H__ */