1 ;; Scheduling description for Niagara-2.
2 ;; Copyright (C) 2007 Free Software Foundation, Inc.
4 ;; This file is part of GCC.
6 ;; GCC is free software; you can redistribute it and/or modify
7 ;; it under the terms of the GNU General Public License as published by
8 ;; the Free Software Foundation; either version 2, or (at your option)
11 ;; GCC is distributed in the hope that it will be useful,
12 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ;; GNU General Public License for more details.
16 ;; You should have received a copy of the GNU General Public License
17 ;; along with GCC; see the file COPYING. If not, write to
18 ;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
19 ;; Boston, MA 02110-1301, USA.
21 ;; Niagara-2 is a single-issue processor.
23 (define_automaton "niagara2_0")
25 (define_cpu_unit "niag2_pipe" "niagara2_0")
27 (define_insn_reservation "niag2_25cycle" 25
28 (and (eq_attr "cpu" "niagara2")
29 (eq_attr "type" "flushw"))
32 (define_insn_reservation "niag2_5cycle" 5
33 (and (eq_attr "cpu" "niagara2")
34 (eq_attr "type" "multi,flushw,iflush,trap"))
37 (define_insn_reservation "niag2_6cycle" 4
38 (and (eq_attr "cpu" "niagara2")
39 (eq_attr "type" "savew"))
42 /* Most basic operations are single-cycle. */
43 (define_insn_reservation "niag2_ialu" 1
44 (and (eq_attr "cpu" "niagara2")
45 (eq_attr "type" "ialu,shift,compare,cmove"))
48 (define_insn_reservation "niag2_imul" 5
49 (and (eq_attr "cpu" "niagara2")
50 (eq_attr "type" "imul"))
53 (define_insn_reservation "niag2_idiv" 31
54 (and (eq_attr "cpu" "niagara2")
55 (eq_attr "type" "idiv"))
58 (define_insn_reservation "niag2_branch" 5
59 (and (eq_attr "cpu" "niagara2")
60 (eq_attr "type" "call,sibcall,call_no_delay_slot,uncond_branch,branch"))
63 (define_insn_reservation "niag2_3cycle_load" 3
64 (and (eq_attr "cpu" "niagara2")
65 (eq_attr "type" "load,fpload"))
68 (define_insn_reservation "niag2_1cycle_store" 1
69 (and (eq_attr "cpu" "niagara2")
70 (eq_attr "type" "store,fpstore"))
73 (define_insn_reservation "niag2_fp" 3
74 (and (eq_attr "cpu" "niagara2")
75 (eq_attr "type" "fpmove,fpcmove,fpcrmove,fpcmp,fpmul"))
78 (define_insn_reservation "niag2_fdivs" 19
79 (and (eq_attr "cpu" "niagara2")
80 (eq_attr "type" "fpdivs"))
83 (define_insn_reservation "niag2_fdivd" 33
84 (and (eq_attr "cpu" "niagara2")
85 (eq_attr "type" "fpdivd"))
88 (define_insn_reservation "niag2_vis" 6
89 (and (eq_attr "cpu" "niagara2")
90 (eq_attr "type" "fga,fgm_pack,fgm_mul,fgm_cmp,fgm_pdist"))