1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006
3 Free Software Foundation, Inc.
4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 Ulrich Weigand (uweigand@de.ibm.com).
7 This file is part of GCC.
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
27 /* Override the __fixdfdi etc. routines when building libgcc2.
28 ??? This should be done in a cleaner way ... */
29 #if defined (IN_LIBGCC2) && !defined (__s390x__)
30 #include <config/s390/fixdfdi.h>
33 /* Which processor to generate code or schedule for. The cpu attribute
34 defines a list that mirrors this list, so changes to s390.md must be
35 made at the same time. */
43 PROCESSOR_2094_Z9_109,
47 /* Optional architectural facilities supported by the processor. */
53 PF_LONG_DISPLACEMENT = 4,
58 extern enum processor_type s390_tune;
59 extern enum processor_flags s390_tune_flags;
61 extern enum processor_type s390_arch;
62 extern enum processor_flags s390_arch_flags;
64 #define TARGET_CPU_IEEE_FLOAT \
65 (s390_arch_flags & PF_IEEE_FLOAT)
66 #define TARGET_CPU_ZARCH \
67 (s390_arch_flags & PF_ZARCH)
68 #define TARGET_CPU_LONG_DISPLACEMENT \
69 (s390_arch_flags & PF_LONG_DISPLACEMENT)
70 #define TARGET_CPU_EXTIMM \
71 (s390_arch_flags & PF_EXTIMM)
72 #define TARGET_CPU_DFP \
73 (s390_arch_flags & PF_DFP)
75 #define TARGET_LONG_DISPLACEMENT \
76 (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
77 #define TARGET_EXTIMM \
78 (TARGET_ZARCH && TARGET_CPU_EXTIMM)
80 (TARGET_ZARCH && TARGET_CPU_DFP)
82 /* Run-time target specification. */
84 /* Defaults for option flags defined only on some subtargets. */
85 #ifndef TARGET_TPF_PROFILING
86 #define TARGET_TPF_PROFILING 0
89 /* This will be overridden by OS headers. */
92 /* Target CPU builtins. */
93 #define TARGET_CPU_CPP_BUILTINS() \
96 builtin_assert ("cpu=s390"); \
97 builtin_assert ("machine=s390"); \
98 builtin_define ("__s390__"); \
100 builtin_define ("__s390x__"); \
101 if (TARGET_LONG_DOUBLE_128) \
102 builtin_define ("__LONG_DOUBLE_128__"); \
106 #ifdef DEFAULT_TARGET_64BIT
107 #define TARGET_DEFAULT (MASK_64BIT | MASK_ZARCH)
109 #define TARGET_DEFAULT 0
112 /* Support for configure-time defaults. */
113 #define OPTION_DEFAULT_SPECS \
114 { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" }, \
115 { "arch", "%{!march=*:-march=%(VALUE)}" }, \
116 { "tune", "%{!mtune=*:-mtune=%(VALUE)}" }
118 /* Defaulting rules. */
119 #ifdef DEFAULT_TARGET_64BIT
120 #define DRIVER_SELF_SPECS \
121 "%{!m31:%{!m64:-m64}}", \
122 "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
123 "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
125 #define DRIVER_SELF_SPECS \
126 "%{!m31:%{!m64:-m31}}", \
127 "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
128 "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
131 /* Target version string. Overridden by the OS header. */
132 #ifdef DEFAULT_TARGET_64BIT
133 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
135 #define TARGET_VERSION fprintf (stderr, " (S/390)");
138 /* Hooks to override options. */
139 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
140 #define OVERRIDE_OPTIONS override_options ()
142 /* Frame pointer is not used for debugging. */
143 #define CAN_DEBUG_WITHOUT_FP
145 /* Constants needed to control the TEST DATA CLASS (TDC) instruction. */
146 #define S390_TDC_POSITIVE_ZERO (1 << 11)
147 #define S390_TDC_NEGATIVE_ZERO (1 << 10)
148 #define S390_TDC_POSITIVE_NORMALIZED_NUMBER (1 << 9)
149 #define S390_TDC_NEGATIVE_NORMALIZED_NUMBER (1 << 8)
150 #define S390_TDC_POSITIVE_DENORMALIZED_NUMBER (1 << 7)
151 #define S390_TDC_NEGATIVE_DENORMALIZED_NUMBER (1 << 6)
152 #define S390_TDC_POSITIVE_INFINITY (1 << 5)
153 #define S390_TDC_NEGATIVE_INFINITY (1 << 4)
154 #define S390_TDC_POSITIVE_QUIET_NAN (1 << 3)
155 #define S390_TDC_NEGATIVE_QUIET_NAN (1 << 2)
156 #define S390_TDC_POSITIVE_SIGNALING_NAN (1 << 1)
157 #define S390_TDC_NEGATIVE_SIGNALING_NAN (1 << 0)
159 #define S390_TDC_SIGNBIT_SET (S390_TDC_NEGATIVE_ZERO \
160 | S390_TDC_NEGATIVE_NORMALIZED_NUMBER \
161 | S390_TDC_NEGATIVE_DENORMALIZED_NUMBER\
162 | S390_TDC_NEGATIVE_INFINITY \
163 | S390_TDC_NEGATIVE_QUIET_NAN \
164 | S390_TDC_NEGATIVE_SIGNALING_NAN )
166 #define S390_TDC_INFINITY (S390_TDC_POSITIVE_INFINITY \
167 | S390_TDC_NEGATIVE_INFINITY )
169 /* In libgcc2, determine target settings as compile-time constants. */
173 #define TARGET_64BIT 1
175 #define TARGET_64BIT 0
180 /* Target machine storage layout. */
182 /* Everything is big-endian. */
183 #define BITS_BIG_ENDIAN 1
184 #define BYTES_BIG_ENDIAN 1
185 #define WORDS_BIG_ENDIAN 1
187 /* Width of a word, in units (bytes). */
188 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
190 #define MIN_UNITS_PER_WORD 4
192 #define MAX_BITS_PER_WORD 64
194 /* Function arguments and return values are promoted to word size. */
195 #define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE) \
196 if (INTEGRAL_MODE_P (MODE) && \
197 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
201 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
202 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
204 /* Boundary (in *bits*) on which stack pointer should be aligned. */
205 #define STACK_BOUNDARY 64
207 /* Allocation boundary (in *bits*) for the code of a function. */
208 #define FUNCTION_BOUNDARY 32
210 /* There is no point aligning anything to a rounder boundary than this. */
211 #define BIGGEST_ALIGNMENT 64
213 /* Alignment of field after `int : 0' in a structure. */
214 #define EMPTY_FIELD_BOUNDARY 32
216 /* Alignment on even addresses for LARL instruction. */
217 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
218 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
220 /* Alignment is not required by the hardware. */
221 #define STRICT_ALIGNMENT 0
223 /* Mode of stack savearea.
224 FUNCTION is VOIDmode because calling convention maintains SP.
225 BLOCK needs Pmode for SP.
226 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
227 #define STACK_SAVEAREA_MODE(LEVEL) \
228 (LEVEL == SAVE_FUNCTION ? VOIDmode \
229 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
234 /* Sizes in bits of the source language data types. */
235 #define SHORT_TYPE_SIZE 16
236 #define INT_TYPE_SIZE 32
237 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
238 #define LONG_LONG_TYPE_SIZE 64
239 #define FLOAT_TYPE_SIZE 32
240 #define DOUBLE_TYPE_SIZE 64
241 #define LONG_DOUBLE_TYPE_SIZE (TARGET_LONG_DOUBLE_128 ? 128 : 64)
243 /* Define this to set long double type size to use in libgcc2.c, which can
244 not depend on target_flags. */
245 #ifdef __LONG_DOUBLE_128__
246 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 128
248 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
251 /* Work around target_flags dependency in ada/targtyps.c. */
252 #define WIDEST_HARDWARE_FP_SIZE 64
254 /* We use "unsigned char" as default. */
255 #define DEFAULT_SIGNED_CHAR 0
258 /* Register usage. */
260 /* We have 16 general purpose registers (registers 0-15),
261 and 16 floating point registers (registers 16-31).
262 (On non-IEEE machines, we have only 4 fp registers.)
264 Amongst the general purpose registers, some are used
265 for specific purposes:
266 GPR 11: Hard frame pointer (if needed)
267 GPR 12: Global offset table pointer (if needed)
268 GPR 13: Literal pool base register
269 GPR 14: Return address register
270 GPR 15: Stack pointer
272 Registers 32-35 are 'fake' hard registers that do not
273 correspond to actual hardware:
274 Reg 32: Argument pointer
275 Reg 33: Condition code
276 Reg 34: Frame pointer
277 Reg 35: Return address pointer
279 Registers 36 and 37 are mapped to access registers
280 0 and 1, used to implement thread-local storage. */
282 #define FIRST_PSEUDO_REGISTER 38
284 /* Standard register usage. */
285 #define GENERAL_REGNO_P(N) ((int)(N) >= 0 && (N) < 16)
286 #define ADDR_REGNO_P(N) ((N) >= 1 && (N) < 16)
287 #define FP_REGNO_P(N) ((N) >= 16 && (N) < 32)
288 #define CC_REGNO_P(N) ((N) == 33)
289 #define FRAME_REGNO_P(N) ((N) == 32 || (N) == 34 || (N) == 35)
290 #define ACCESS_REGNO_P(N) ((N) == 36 || (N) == 37)
292 #define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
293 #define ADDR_REG_P(X) (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
294 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
295 #define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
296 #define FRAME_REG_P(X) (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
297 #define ACCESS_REG_P(X) (REG_P (X) && ACCESS_REGNO_P (REGNO (X)))
299 /* Set up fixed registers and calling convention:
301 GPRs 0-5 are always call-clobbered,
302 GPRs 6-15 are always call-saved.
303 GPR 12 is fixed if used as GOT pointer.
304 GPR 13 is always fixed (as literal pool pointer).
305 GPR 14 is always fixed on S/390 machines (as return address).
306 GPR 15 is always fixed (as stack pointer).
307 The 'fake' hard registers are call-clobbered and fixed.
308 The access registers are call-saved and fixed.
310 On 31-bit, FPRs 18-19 are call-clobbered;
311 on 64-bit, FPRs 24-31 are call-clobbered.
312 The remaining FPRs are call-saved. */
314 #define FIXED_REGISTERS \
326 #define CALL_USED_REGISTERS \
338 #define CALL_REALLY_USED_REGISTERS \
350 #define CONDITIONAL_REGISTER_USAGE s390_conditional_register_usage ()
352 /* Preferred register allocation order. */
353 #define REG_ALLOC_ORDER \
354 { 1, 2, 3, 4, 5, 0, 12, 11, 10, 9, 8, 7, 6, 14, 13, \
355 16, 17, 18, 19, 20, 21, 22, 23, \
356 24, 25, 26, 27, 28, 29, 30, 31, \
357 15, 32, 33, 34, 35, 36, 37 }
360 /* Fitting values into registers. */
362 /* Integer modes <= word size fit into any GPR.
363 Integer modes > word size fit into successive GPRs, starting with
364 an even-numbered register.
365 SImode and DImode fit into FPRs as well.
367 Floating point modes <= word size fit into any FPR or GPR.
368 Floating point modes > word size (i.e. DFmode on 32-bit) fit
369 into any FPR, or an even-odd GPR pair.
370 TFmode fits only into an even-odd FPR pair.
372 Complex floating point modes fit either into two FPRs, or into
373 successive GPRs (again starting with an even number).
374 TCmode fits only into two successive even-odd FPR pairs.
376 Condition code modes fit only into the CC register. */
378 /* Because all registers in a class have the same size HARD_REGNO_NREGS
379 is equivalent to CLASS_MAX_NREGS. */
380 #define HARD_REGNO_NREGS(REGNO, MODE) \
381 s390_class_max_nregs (REGNO_REG_CLASS (REGNO), (MODE))
383 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
384 s390_hard_regno_mode_ok ((REGNO), (MODE))
386 #define HARD_REGNO_RENAME_OK(FROM, TO) \
387 s390_hard_regno_rename_ok (FROM, TO)
389 #define MODES_TIEABLE_P(MODE1, MODE2) \
390 (((MODE1) == SFmode || (MODE1) == DFmode) \
391 == ((MODE2) == SFmode || (MODE2) == DFmode))
393 /* Maximum number of registers to represent a value of mode MODE
394 in a register of class CLASS. */
395 #define CLASS_MAX_NREGS(CLASS, MODE) \
396 s390_class_max_nregs ((CLASS), (MODE))
398 /* If a 4-byte value is loaded into a FPR, it is placed into the
399 *upper* half of the register, not the lower. Therefore, we
400 cannot use SUBREGs to switch between modes in FP registers.
401 Likewise for access registers, since they have only half the
402 word size on 64-bit. */
403 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
404 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
405 ? ((reg_classes_intersect_p (FP_REGS, CLASS) \
406 && (GET_MODE_SIZE (FROM) < 8 || GET_MODE_SIZE (TO) < 8)) \
407 || reg_classes_intersect_p (ACCESS_REGS, CLASS)) : 0)
409 /* Register classes. */
411 /* We use the following register classes:
412 GENERAL_REGS All general purpose registers
413 ADDR_REGS All general purpose registers except %r0
414 (These registers can be used in address generation)
415 FP_REGS All floating point registers
416 CC_REGS The condition code register
417 ACCESS_REGS The access registers
419 GENERAL_FP_REGS Union of GENERAL_REGS and FP_REGS
420 ADDR_FP_REGS Union of ADDR_REGS and FP_REGS
421 GENERAL_CC_REGS Union of GENERAL_REGS and CC_REGS
422 ADDR_CC_REGS Union of ADDR_REGS and CC_REGS
425 ALL_REGS All registers
427 Note that the 'fake' frame pointer and argument pointer registers
428 are included amongst the address registers here. */
432 NO_REGS, CC_REGS, ADDR_REGS, GENERAL_REGS, ACCESS_REGS,
433 ADDR_CC_REGS, GENERAL_CC_REGS,
434 FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
435 ALL_REGS, LIM_REG_CLASSES
437 #define N_REG_CLASSES (int) LIM_REG_CLASSES
439 #define REG_CLASS_NAMES \
440 { "NO_REGS", "CC_REGS", "ADDR_REGS", "GENERAL_REGS", "ACCESS_REGS", \
441 "ADDR_CC_REGS", "GENERAL_CC_REGS", \
442 "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
444 /* Class -> register mapping. */
445 #define REG_CLASS_CONTENTS \
447 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
448 { 0x00000000, 0x00000002 }, /* CC_REGS */ \
449 { 0x0000fffe, 0x0000000d }, /* ADDR_REGS */ \
450 { 0x0000ffff, 0x0000000d }, /* GENERAL_REGS */ \
451 { 0x00000000, 0x00000030 }, /* ACCESS_REGS */ \
452 { 0x0000fffe, 0x0000000f }, /* ADDR_CC_REGS */ \
453 { 0x0000ffff, 0x0000000f }, /* GENERAL_CC_REGS */ \
454 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
455 { 0xfffffffe, 0x0000000d }, /* ADDR_FP_REGS */ \
456 { 0xffffffff, 0x0000000d }, /* GENERAL_FP_REGS */ \
457 { 0xffffffff, 0x0000003f }, /* ALL_REGS */ \
460 /* Register -> class mapping. */
461 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
462 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
464 /* ADDR_REGS can be used as base or index register. */
465 #define INDEX_REG_CLASS ADDR_REGS
466 #define BASE_REG_CLASS ADDR_REGS
468 /* Check whether REGNO is a hard register of the suitable class
469 or a pseudo register currently allocated to one such. */
470 #define REGNO_OK_FOR_INDEX_P(REGNO) \
471 (((REGNO) < FIRST_PSEUDO_REGISTER \
472 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
473 || ADDR_REGNO_P (reg_renumber[REGNO]))
474 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
477 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
478 return the class of reg to actually use. */
479 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
480 s390_preferred_reload_class ((X), (CLASS))
482 /* We need secondary memory to move data between GPRs and FPRs. */
483 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
484 ((CLASS1) != (CLASS2) \
485 && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS) \
486 && (!TARGET_DFP || GET_MODE_SIZE (MODE) != 8))
488 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
489 because the movsi and movsf patterns don't handle r/f moves. */
490 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
491 (GET_MODE_BITSIZE (MODE) < 32 \
492 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
496 /* Stack layout and calling conventions. */
498 /* Our stack grows from higher to lower addresses. However, local variables
499 are accessed by positive offsets, and function arguments are stored at
500 increasing addresses. */
501 #define STACK_GROWS_DOWNWARD
502 #define FRAME_GROWS_DOWNWARD 1
503 /* #undef ARGS_GROW_DOWNWARD */
505 /* The basic stack layout looks like this: the stack pointer points
506 to the register save area for called functions. Above that area
507 is the location to place outgoing arguments. Above those follow
508 dynamic allocations (alloca), and finally the local variables. */
510 /* Offset from stack-pointer to first location of outgoing args. */
511 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
513 /* Offset within stack frame to start allocating local variables at. */
514 #define STARTING_FRAME_OFFSET 0
516 /* Offset from the stack pointer register to an item dynamically
517 allocated on the stack, e.g., by `alloca'. */
518 extern int current_function_outgoing_args_size;
519 #define STACK_DYNAMIC_OFFSET(FUNDECL) \
520 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
522 /* Offset of first parameter from the argument pointer register value.
523 We have a fake argument pointer register that points directly to
524 the argument area. */
525 #define FIRST_PARM_OFFSET(FNDECL) 0
527 /* Defining this macro makes __builtin_frame_address(0) and
528 __builtin_return_address(0) work with -fomit-frame-pointer. */
529 #define INITIAL_FRAME_ADDRESS_RTX \
530 (TARGET_PACKED_STACK ? \
531 plus_constant (arg_pointer_rtx, -UNITS_PER_WORD) : \
532 plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
534 /* The return address of the current frame is retrieved
535 from the initial value of register RETURN_REGNUM.
536 For frames farther back, we use the stack slot where
537 the corresponding RETURN_REGNUM register was saved. */
538 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
539 (TARGET_PACKED_STACK ? \
540 plus_constant ((FRAME), STACK_POINTER_OFFSET - UNITS_PER_WORD) : (FRAME))
542 #define RETURN_ADDR_RTX(COUNT, FRAME) \
543 s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
545 /* In 31-bit mode, we need to mask off the high bit of return addresses. */
546 #define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
549 /* Exception handling. */
551 /* Describe calling conventions for DWARF-2 exception handling. */
552 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
553 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
554 #define DWARF_FRAME_RETURN_COLUMN 14
556 /* Describe how we implement __builtin_eh_return. */
557 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
558 #define EH_RETURN_HANDLER_RTX gen_rtx_MEM (Pmode, return_address_pointer_rtx)
560 /* Select a format to encode pointers in exception handling data. */
561 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
563 ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
567 /* Frame registers. */
569 #define STACK_POINTER_REGNUM 15
570 #define FRAME_POINTER_REGNUM 34
571 #define HARD_FRAME_POINTER_REGNUM 11
572 #define ARG_POINTER_REGNUM 32
573 #define RETURN_ADDRESS_POINTER_REGNUM 35
575 /* The static chain must be call-clobbered, but not used for
576 function argument passing. As register 1 is clobbered by
577 the trampoline code, we only have one option. */
578 #define STATIC_CHAIN_REGNUM 0
580 /* Number of hardware registers that go into the DWARF-2 unwind info.
581 To avoid ABI incompatibility, this number must not change even as
582 'fake' hard registers are added or removed. */
583 #define DWARF_FRAME_REGISTERS 34
586 /* Frame pointer and argument pointer elimination. */
588 #define FRAME_POINTER_REQUIRED 0
590 #define ELIMINABLE_REGS \
591 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
592 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
593 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
594 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
595 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
596 { RETURN_ADDRESS_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM }, \
597 { BASE_REGNUM, BASE_REGNUM }}
599 #define CAN_ELIMINATE(FROM, TO) \
600 s390_can_eliminate ((FROM), (TO))
602 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
603 (OFFSET) = s390_initial_elimination_offset ((FROM), (TO))
606 /* Stack arguments. */
608 /* We need current_function_outgoing_args to be valid. */
609 #define ACCUMULATE_OUTGOING_ARGS 1
611 /* Return doesn't modify the stack. */
612 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
615 /* Register arguments. */
617 typedef struct s390_arg_structure
619 int gprs; /* gpr so far */
620 int fprs; /* fpr so far */
624 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
625 ((CUM).gprs=0, (CUM).fprs=0)
627 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
628 s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
630 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
631 s390_function_arg (&CUM, MODE, TYPE, NAMED)
633 /* Arguments can be placed in general registers 2 to 6,
634 or in floating point registers 0 and 2. */
635 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
636 (N) == 16 || (N) == 17)
639 /* Scalar return values. */
641 #define FUNCTION_VALUE(VALTYPE, FUNC) \
642 s390_function_value ((VALTYPE), VOIDmode)
644 #define LIBCALL_VALUE(MODE) \
645 s390_function_value (NULL, (MODE))
647 /* Only gpr 2 and fpr 0 are ever used as return registers. */
648 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
651 /* Function entry and exit. */
653 /* When returning from a function, the stack pointer does not matter. */
654 #define EXIT_IGNORE_STACK 1
659 #define FUNCTION_PROFILER(FILE, LABELNO) \
660 s390_function_profiler ((FILE), ((LABELNO)))
662 #define PROFILE_BEFORE_PROLOGUE 1
665 /* Implementing the varargs macros. */
667 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
668 s390_va_start (valist, nextarg)
670 /* Trampolines for nested functions. */
672 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 32 : 16)
674 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
675 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
677 #define TRAMPOLINE_TEMPLATE(FILE) \
678 s390_trampoline_template (FILE)
681 /* Addressing modes, and classification of registers for them. */
683 /* Recognize any constant value that is a valid address. */
684 #define CONSTANT_ADDRESS_P(X) 0
686 /* Maximum number of registers that can appear in a valid memory address. */
687 #define MAX_REGS_PER_ADDRESS 2
689 /* S/390 has no mode dependent addresses. */
690 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
692 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
693 valid memory address for an instruction.
694 The MODE argument is the machine mode for the MEM expression
695 that wants to use this address. */
697 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
699 if (legitimate_address_p (MODE, X, 1)) \
703 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
705 if (legitimate_address_p (MODE, X, 0)) \
710 /* Try machine-dependent ways of modifying an illegitimate address
711 to be legitimate. If we find one, return the new, valid address.
712 This macro is used in only one place: `memory_address' in explow.c. */
713 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
715 (X) = legitimize_address (X, OLDX, MODE); \
716 if (memory_address_p (MODE, X)) \
720 /* Try a machine-dependent way of reloading an illegitimate address
721 operand. If we find one, push the reload and jump to WIN. This
722 macro is used in only one place: `find_reloads_address' in reload.c. */
723 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
725 rtx new = legitimize_reload_address (AD, MODE, OPNUM, (int)(TYPE)); \
733 /* Nonzero if the constant value X is a legitimate general operand.
734 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
735 #define LEGITIMATE_CONSTANT_P(X) \
736 legitimate_constant_p (X)
738 /* Helper macro for s390.c and s390.md to check for symbolic constants. */
739 #define SYMBOLIC_CONST(X) \
740 (GET_CODE (X) == SYMBOL_REF \
741 || GET_CODE (X) == LABEL_REF \
742 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
744 #define TLS_SYMBOLIC_CONST(X) \
745 ((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X)) \
746 || (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
749 /* Condition codes. */
751 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
752 return the mode to be used for the comparison. */
753 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
755 /* Canonicalize a comparison from one we don't have to one we do have. */
756 #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) \
757 s390_canonicalize_comparison (&(CODE), &(OP0), &(OP1))
759 /* Define the information needed to generate branch and scc insns. This is
760 stored from the compare operation. Note that we can't use "rtx" here
761 since it hasn't been defined! */
762 extern struct rtx_def *s390_compare_op0, *s390_compare_op1, *s390_compare_emitted;
765 /* Relative costs of operations. */
767 /* On s390, copy between fprs and gprs is expensive. */
768 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
769 (( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \
770 && reg_classes_intersect_p ((CLASS2), FP_REGS)) \
771 || ( reg_classes_intersect_p ((CLASS1), FP_REGS) \
772 && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
774 /* A C expression for the cost of moving data of mode M between a
775 register and memory. A value of 2 is the default; this cost is
776 relative to those in `REGISTER_MOVE_COST'. */
777 #define MEMORY_MOVE_COST(M, C, I) 1
779 /* A C expression for the cost of a branch instruction. A value of 1
780 is the default; other values are interpreted relative to that. */
781 #define BRANCH_COST 1
783 /* Nonzero if access to memory by bytes is slow and undesirable. */
784 #define SLOW_BYTE_ACCESS 1
786 /* An integer expression for the size in bits of the largest integer machine
787 mode that should actually be used. We allow pairs of registers. */
788 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TARGET_64BIT ? TImode : DImode)
790 /* The maximum number of bytes that a single instruction can move quickly
791 between memory and registers or between two memory locations. */
792 #define MOVE_MAX (TARGET_64BIT ? 16 : 8)
793 #define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4)
794 #define MAX_MOVE_MAX 16
796 /* Determine whether to use move_by_pieces or block move insn. */
797 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
798 ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
799 || (TARGET_64BIT && (SIZE) == 8) )
801 /* Determine whether to use clear_by_pieces or block clear insn. */
802 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
803 ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
804 || (TARGET_64BIT && (SIZE) == 8) )
806 /* This macro is used to determine whether store_by_pieces should be
807 called to "memset" storage with byte values other than zero, or
808 to "memcpy" storage when the source is a constant string. */
809 #define STORE_BY_PIECES_P(SIZE, ALIGN) MOVE_BY_PIECES_P (SIZE, ALIGN)
811 /* Don't perform CSE on function addresses. */
812 #define NO_FUNCTION_CSE
817 /* Output before read-only data. */
818 #define TEXT_SECTION_ASM_OP ".text"
820 /* Output before writable (initialized) data. */
821 #define DATA_SECTION_ASM_OP ".data"
823 /* Output before writable (uninitialized) data. */
824 #define BSS_SECTION_ASM_OP ".bss"
826 /* S/390 constant pool breaks the devices in crtstuff.c to control section
827 in where code resides. We have to write it as asm code. */
829 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
832 0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
834 bas\t%r14,0(%r3,%r2)\n\
839 /* Position independent code. */
843 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
845 #define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X)
848 /* Assembler file format. */
850 /* Character to start a comment. */
851 #define ASM_COMMENT_START "#"
853 /* Declare an uninitialized external linkage data object. */
854 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
855 asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
857 /* Globalizing directive for a label. */
858 #define GLOBAL_ASM_OP ".globl "
860 /* Advance the location counter to a multiple of 2**LOG bytes. */
861 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
862 if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
864 /* Advance the location counter by SIZE bytes. */
865 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
866 fprintf ((FILE), "\t.set\t.,.+"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
868 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h. */
869 #define LOCAL_LABEL_PREFIX "."
871 /* How to refer to registers in assembler output. This sequence is
872 indexed by compiler's hard-register-number (see above). */
873 #define REGISTER_NAMES \
874 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
875 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
876 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
877 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
878 "%ap", "%cc", "%fp", "%rp", "%a0", "%a1" \
881 /* Print operand X (an rtx) in assembler syntax to file FILE. */
882 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
883 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
885 /* Output machine-dependent UNSPECs in address constants. */
886 #define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \
888 if (!s390_output_addr_const_extra (FILE, (X))) \
892 /* Output an element of a case-vector that is absolute. */
893 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
896 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
897 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
898 assemble_name ((FILE), buf); \
899 fputc ('\n', (FILE)); \
902 /* Output an element of a case-vector that is relative. */
903 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
906 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
907 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
908 assemble_name ((FILE), buf); \
909 fputc ('-', (FILE)); \
910 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL)); \
911 assemble_name ((FILE), buf); \
912 fputc ('\n', (FILE)); \
916 /* Miscellaneous parameters. */
918 /* Specify the machine mode that this machine uses for the index in the
919 tablejump instruction. */
920 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
922 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
923 is done just by pretending it is already truncated. */
924 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
926 /* Specify the machine mode that pointers have.
927 After generation of rtl, the compiler makes no further distinction
928 between pointers and any other objects of this machine mode. */
929 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
931 /* This is -1 for "pointer mode" extend. See ptr_extend in s390.md. */
932 #define POINTERS_EXTEND_UNSIGNED -1
934 /* A function address in a call instruction is a byte address (for
935 indexing purposes) so give the MEM rtx a byte's mode. */
936 #define FUNCTION_MODE QImode
938 /* Specify the value which is used when clz operand is zero. */
939 #define CLZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) ((VALUE) = 64, 1)
941 /* Machine-specific symbol_ref flags. */
942 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
944 /* Check whether integer displacement is in range. */
945 #define DISP_IN_RANGE(d) \
946 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
947 : ((d) >= 0 && (d) <= 4095))