1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
31 #include "hard-reg-set.h"
33 #include "insn-config.h"
34 #include "conditions.h"
36 #include "insn-attr.h"
44 #include "basic-block.h"
45 #include "integrate.h"
48 #include "target-def.h"
50 #include "langhooks.h"
53 /* Machine-specific symbol_ref flags. */
54 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
57 static bool s390_assemble_integer (rtx, unsigned int, int);
58 static void s390_select_rtx_section (enum machine_mode, rtx,
59 unsigned HOST_WIDE_INT);
60 static void s390_encode_section_info (tree, rtx, int);
61 static bool s390_cannot_force_const_mem (rtx);
62 static rtx s390_delegitimize_address (rtx);
63 static bool s390_return_in_memory (tree, tree);
64 static void s390_init_builtins (void);
65 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
66 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
68 static enum attr_type s390_safe_attr_type (rtx);
70 static int s390_adjust_cost (rtx, rtx, rtx, int);
71 static int s390_adjust_priority (rtx, int);
72 static int s390_issue_rate (void);
73 static int s390_use_dfa_pipeline_interface (void);
74 static int s390_first_cycle_multipass_dfa_lookahead (void);
75 static int s390_sched_reorder2 (FILE *, int, rtx *, int *, int);
76 static bool s390_rtx_costs (rtx, int, int, int *);
77 static int s390_address_cost (rtx);
78 static void s390_reorg (void);
79 static bool s390_valid_pointer_mode (enum machine_mode);
80 static tree s390_build_builtin_va_list (void);
82 #undef TARGET_ASM_ALIGNED_HI_OP
83 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
84 #undef TARGET_ASM_ALIGNED_DI_OP
85 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
86 #undef TARGET_ASM_INTEGER
87 #define TARGET_ASM_INTEGER s390_assemble_integer
89 #undef TARGET_ASM_OPEN_PAREN
90 #define TARGET_ASM_OPEN_PAREN ""
92 #undef TARGET_ASM_CLOSE_PAREN
93 #define TARGET_ASM_CLOSE_PAREN ""
95 #undef TARGET_ASM_SELECT_RTX_SECTION
96 #define TARGET_ASM_SELECT_RTX_SECTION s390_select_rtx_section
98 #undef TARGET_ENCODE_SECTION_INFO
99 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
102 #undef TARGET_HAVE_TLS
103 #define TARGET_HAVE_TLS true
105 #undef TARGET_CANNOT_FORCE_CONST_MEM
106 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
108 #undef TARGET_DELEGITIMIZE_ADDRESS
109 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
111 #undef TARGET_RETURN_IN_MEMORY
112 #define TARGET_RETURN_IN_MEMORY s390_return_in_memory
114 #undef TARGET_INIT_BUILTINS
115 #define TARGET_INIT_BUILTINS s390_init_builtins
116 #undef TARGET_EXPAND_BUILTIN
117 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
119 #undef TARGET_ASM_OUTPUT_MI_THUNK
120 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
121 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
122 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
124 #undef TARGET_SCHED_ADJUST_COST
125 #define TARGET_SCHED_ADJUST_COST s390_adjust_cost
126 #undef TARGET_SCHED_ADJUST_PRIORITY
127 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
128 #undef TARGET_SCHED_ISSUE_RATE
129 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
130 #undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
131 #define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE s390_use_dfa_pipeline_interface
132 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
133 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
134 #undef TARGET_SCHED_REORDER2
135 #define TARGET_SCHED_REORDER2 s390_sched_reorder2
137 #undef TARGET_RTX_COSTS
138 #define TARGET_RTX_COSTS s390_rtx_costs
139 #undef TARGET_ADDRESS_COST
140 #define TARGET_ADDRESS_COST s390_address_cost
142 #undef TARGET_MACHINE_DEPENDENT_REORG
143 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
145 #undef TARGET_VALID_POINTER_MODE
146 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
148 #undef TARGET_BUILD_BUILTIN_VA_LIST
149 #define TARGET_BUILD_BUILTIN_VA_LIST s390_build_builtin_va_list
151 #undef TARGET_PROMOTE_FUNCTION_ARGS
152 #define TARGET_PROMOTE_FUNCTION_ARGS hook_bool_tree_true
153 #undef TARGET_PROMOTE_FUNCTION_RETURN
154 #define TARGET_PROMOTE_FUNCTION_RETURN hook_bool_tree_true
156 #undef TARGET_STRUCT_VALUE_RTX
157 #define TARGET_STRUCT_VALUE_RTX hook_rtx_tree_int_null
159 struct gcc_target targetm = TARGET_INITIALIZER;
161 extern int reload_completed;
163 /* The alias set for prologue/epilogue register save/restore. */
164 static int s390_sr_alias_set = 0;
166 /* Save information from a "cmpxx" operation until the branch or scc is
168 rtx s390_compare_op0, s390_compare_op1;
170 /* Structure used to hold the components of a S/390 memory
171 address. A legitimate address on S/390 is of the general
173 base + index + displacement
174 where any of the components is optional.
176 base and index are registers of the class ADDR_REGS,
177 displacement is an unsigned 12-bit immediate constant. */
187 /* Which cpu are we tuning for. */
188 enum processor_type s390_tune;
189 enum processor_flags s390_tune_flags;
190 /* Which instruction set architecture to use. */
191 enum processor_type s390_arch;
192 enum processor_flags s390_arch_flags;
194 /* Strings to hold which cpu and instruction set architecture to use. */
195 const char *s390_tune_string; /* for -mtune=<xxx> */
196 const char *s390_arch_string; /* for -march=<xxx> */
198 /* Define the structure for the machine field in struct function. */
200 struct machine_function GTY(())
202 /* Set, if some of the fprs 8-15 need to be saved (64 bit abi). */
205 /* Set if return address needs to be saved. */
206 bool save_return_addr_p;
208 /* Number of first and last gpr to be saved, restored. */
210 int first_restore_gpr;
213 /* Size of stack frame. */
214 HOST_WIDE_INT frame_size;
216 /* Some local-dynamic TLS symbol name. */
217 const char *some_ld_name;
220 static int s390_match_ccmode_set (rtx, enum machine_mode);
221 static int s390_branch_condition_mask (rtx);
222 static const char *s390_branch_condition_mnemonic (rtx, int);
223 static int check_mode (rtx, enum machine_mode *);
224 static int general_s_operand (rtx, enum machine_mode, int);
225 static int s390_short_displacement (rtx);
226 static int s390_decompose_address (rtx, struct s390_address *);
227 static rtx get_thread_pointer (void);
228 static rtx legitimize_tls_address (rtx, rtx);
229 static void print_shift_count_operand (FILE *, rtx);
230 static const char *get_some_local_dynamic_name (void);
231 static int get_some_local_dynamic_name_1 (rtx *, void *);
232 static int reg_used_in_mem_p (int, rtx);
233 static int addr_generation_dependency_p (rtx, rtx);
234 static int s390_split_branches (void);
235 static void find_constant_pool_ref (rtx, rtx *);
236 static void replace_constant_pool_ref (rtx *, rtx, rtx);
237 static rtx find_ltrel_base (rtx);
238 static void replace_ltrel_base (rtx *, rtx);
239 static void s390_optimize_prolog (bool);
240 static int find_unused_clobbered_reg (void);
241 static void s390_frame_info (void);
242 static rtx save_fpr (rtx, int, int);
243 static rtx restore_fpr (rtx, int, int);
244 static rtx save_gprs (rtx, int, int, int);
245 static rtx restore_gprs (rtx, int, int, int);
246 static int s390_function_arg_size (enum machine_mode, tree);
247 static bool s390_function_arg_float (enum machine_mode, tree);
248 static struct machine_function * s390_init_machine_status (void);
250 /* Check whether integer displacement is in range. */
251 #define DISP_IN_RANGE(d) \
252 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
253 : ((d) >= 0 && (d) <= 4095))
255 /* Return true if SET either doesn't set the CC register, or else
256 the source and destination have matching CC modes and that
257 CC mode is at least as constrained as REQ_MODE. */
260 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
262 enum machine_mode set_mode;
264 if (GET_CODE (set) != SET)
267 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
270 set_mode = GET_MODE (SET_DEST (set));
283 if (req_mode != set_mode)
288 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
289 && req_mode != CCSRmode && req_mode != CCURmode)
295 if (req_mode != CCAmode)
303 return (GET_MODE (SET_SRC (set)) == set_mode);
306 /* Return true if every SET in INSN that sets the CC register
307 has source and destination with matching CC modes and that
308 CC mode is at least as constrained as REQ_MODE.
309 If REQ_MODE is VOIDmode, always return false. */
312 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
316 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
317 if (req_mode == VOIDmode)
320 if (GET_CODE (PATTERN (insn)) == SET)
321 return s390_match_ccmode_set (PATTERN (insn), req_mode);
323 if (GET_CODE (PATTERN (insn)) == PARALLEL)
324 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
326 rtx set = XVECEXP (PATTERN (insn), 0, i);
327 if (GET_CODE (set) == SET)
328 if (!s390_match_ccmode_set (set, req_mode))
335 /* If a test-under-mask instruction can be used to implement
336 (compare (and ... OP1) OP2), return the CC mode required
337 to do that. Otherwise, return VOIDmode.
338 MIXED is true if the instruction can distinguish between
339 CC1 and CC2 for mixed selected bits (TMxx), it is false
340 if the instruction cannot (TM). */
343 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
347 /* ??? Fixme: should work on CONST_DOUBLE as well. */
348 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
351 /* Selected bits all zero: CC0. */
352 if (INTVAL (op2) == 0)
355 /* Selected bits all one: CC3. */
356 if (INTVAL (op2) == INTVAL (op1))
359 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. */
362 bit1 = exact_log2 (INTVAL (op2));
363 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
364 if (bit0 != -1 && bit1 != -1)
365 return bit0 > bit1 ? CCT1mode : CCT2mode;
371 /* Given a comparison code OP (EQ, NE, etc.) and the operands
372 OP0 and OP1 of a COMPARE, return the mode to be used for the
376 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
382 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
383 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
385 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
386 || GET_CODE (op1) == NEG)
387 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
390 if (GET_CODE (op0) == AND)
392 /* Check whether we can potentially do it via TM. */
393 enum machine_mode ccmode;
394 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
395 if (ccmode != VOIDmode)
397 /* Relax CCTmode to CCZmode to allow fall-back to AND
398 if that turns out to be beneficial. */
399 return ccmode == CCTmode ? CCZmode : ccmode;
403 if (register_operand (op0, HImode)
404 && GET_CODE (op1) == CONST_INT
405 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
407 if (register_operand (op0, QImode)
408 && GET_CODE (op1) == CONST_INT
409 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
418 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
419 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
421 if (INTVAL (XEXP((op0), 1)) < 0)
434 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
435 && GET_CODE (op1) != CONST_INT)
441 if (GET_CODE (op0) == PLUS
442 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
445 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
446 && GET_CODE (op1) != CONST_INT)
452 if (GET_CODE (op0) == MINUS
453 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
456 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
457 && GET_CODE (op1) != CONST_INT)
466 /* Return nonzero if OP is a valid comparison operator
467 for an ALC condition in mode MODE. */
470 s390_alc_comparison (rtx op, enum machine_mode mode)
472 if (mode != VOIDmode && mode != GET_MODE (op))
475 if (GET_RTX_CLASS (GET_CODE (op)) != '<')
478 if (GET_CODE (XEXP (op, 0)) != REG
479 || REGNO (XEXP (op, 0)) != CC_REGNUM
480 || XEXP (op, 1) != const0_rtx)
483 switch (GET_MODE (XEXP (op, 0)))
486 return GET_CODE (op) == LTU;
489 return GET_CODE (op) == LEU;
492 return GET_CODE (op) == GTU;
495 return GET_CODE (op) == LTU;
498 return GET_CODE (op) == UNGT;
501 return GET_CODE (op) == UNLT;
508 /* Return nonzero if OP is a valid comparison operator
509 for an SLB condition in mode MODE. */
512 s390_slb_comparison (rtx op, enum machine_mode mode)
514 if (mode != VOIDmode && mode != GET_MODE (op))
517 if (GET_RTX_CLASS (GET_CODE (op)) != '<')
520 if (GET_CODE (XEXP (op, 0)) != REG
521 || REGNO (XEXP (op, 0)) != CC_REGNUM
522 || XEXP (op, 1) != const0_rtx)
525 switch (GET_MODE (XEXP (op, 0)))
528 return GET_CODE (op) == GEU;
531 return GET_CODE (op) == GTU;
534 return GET_CODE (op) == LEU;
537 return GET_CODE (op) == GEU;
540 return GET_CODE (op) == LE;
543 return GET_CODE (op) == GE;
550 /* Return branch condition mask to implement a branch
551 specified by CODE. */
554 s390_branch_condition_mask (rtx code)
556 const int CC0 = 1 << 3;
557 const int CC1 = 1 << 2;
558 const int CC2 = 1 << 1;
559 const int CC3 = 1 << 0;
561 if (GET_CODE (XEXP (code, 0)) != REG
562 || REGNO (XEXP (code, 0)) != CC_REGNUM
563 || XEXP (code, 1) != const0_rtx)
566 switch (GET_MODE (XEXP (code, 0)))
569 switch (GET_CODE (code))
572 case NE: return CC1 | CC2 | CC3;
579 switch (GET_CODE (code))
582 case NE: return CC0 | CC2 | CC3;
589 switch (GET_CODE (code))
592 case NE: return CC0 | CC1 | CC3;
599 switch (GET_CODE (code))
602 case NE: return CC0 | CC1 | CC2;
609 switch (GET_CODE (code))
611 case EQ: return CC0 | CC2;
612 case NE: return CC1 | CC3;
619 switch (GET_CODE (code))
621 case LTU: return CC2 | CC3; /* carry */
622 case GEU: return CC0 | CC1; /* no carry */
629 switch (GET_CODE (code))
631 case GTU: return CC0 | CC1; /* borrow */
632 case LEU: return CC2 | CC3; /* no borrow */
639 switch (GET_CODE (code))
642 case NE: return CC1 | CC2 | CC3;
643 case LTU: return CC1;
644 case GTU: return CC2;
645 case LEU: return CC0 | CC1;
646 case GEU: return CC0 | CC2;
653 switch (GET_CODE (code))
656 case NE: return CC2 | CC1 | CC3;
657 case LTU: return CC2;
658 case GTU: return CC1;
659 case LEU: return CC0 | CC2;
660 case GEU: return CC0 | CC1;
667 switch (GET_CODE (code))
670 case NE: return CC1 | CC2 | CC3;
671 case LT: return CC1 | CC3;
673 case LE: return CC0 | CC1 | CC3;
674 case GE: return CC0 | CC2;
681 switch (GET_CODE (code))
684 case NE: return CC1 | CC2 | CC3;
686 case GT: return CC2 | CC3;
687 case LE: return CC0 | CC1;
688 case GE: return CC0 | CC2 | CC3;
695 switch (GET_CODE (code))
698 case NE: return CC1 | CC2 | CC3;
701 case LE: return CC0 | CC1;
702 case GE: return CC0 | CC2;
703 case UNORDERED: return CC3;
704 case ORDERED: return CC0 | CC1 | CC2;
705 case UNEQ: return CC0 | CC3;
706 case UNLT: return CC1 | CC3;
707 case UNGT: return CC2 | CC3;
708 case UNLE: return CC0 | CC1 | CC3;
709 case UNGE: return CC0 | CC2 | CC3;
710 case LTGT: return CC1 | CC2;
717 switch (GET_CODE (code))
720 case NE: return CC2 | CC1 | CC3;
723 case LE: return CC0 | CC2;
724 case GE: return CC0 | CC1;
725 case UNORDERED: return CC3;
726 case ORDERED: return CC0 | CC2 | CC1;
727 case UNEQ: return CC0 | CC3;
728 case UNLT: return CC2 | CC3;
729 case UNGT: return CC1 | CC3;
730 case UNLE: return CC0 | CC2 | CC3;
731 case UNGE: return CC0 | CC1 | CC3;
732 case LTGT: return CC2 | CC1;
743 /* If INV is false, return assembler mnemonic string to implement
744 a branch specified by CODE. If INV is true, return mnemonic
745 for the corresponding inverted branch. */
748 s390_branch_condition_mnemonic (rtx code, int inv)
750 static const char *const mnemonic[16] =
752 NULL, "o", "h", "nle",
753 "l", "nhe", "lh", "ne",
754 "e", "nlh", "he", "nl",
755 "le", "nh", "no", NULL
758 int mask = s390_branch_condition_mask (code);
763 if (mask < 1 || mask > 14)
766 return mnemonic[mask];
769 /* Return the part of op which has a value different from def.
770 The size of the part is determined by mode.
771 Use this function only if you already know that op really
772 contains such a part. */
774 unsigned HOST_WIDE_INT
775 s390_extract_part (rtx op, enum machine_mode mode, int def)
777 unsigned HOST_WIDE_INT value = 0;
778 int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
779 int part_bits = GET_MODE_BITSIZE (mode);
780 unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
783 for (i = 0; i < max_parts; i++)
786 value = (unsigned HOST_WIDE_INT) INTVAL (op);
790 if ((value & part_mask) != (def & part_mask))
791 return value & part_mask;
797 /* If OP is an integer constant of mode MODE with exactly one
798 part of mode PART_MODE unequal to DEF, return the number of that
799 part. Otherwise, return -1. */
802 s390_single_part (rtx op,
803 enum machine_mode mode,
804 enum machine_mode part_mode,
807 unsigned HOST_WIDE_INT value = 0;
808 int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
809 unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
812 if (GET_CODE (op) != CONST_INT)
815 for (i = 0; i < n_parts; i++)
818 value = (unsigned HOST_WIDE_INT) INTVAL (op);
820 value >>= GET_MODE_BITSIZE (part_mode);
822 if ((value & part_mask) != (def & part_mask))
830 return part == -1 ? -1 : n_parts - 1 - part;
833 /* Check whether we can (and want to) split a double-word
834 move in mode MODE from SRC to DST into two single-word
835 moves, moving the subword FIRST_SUBWORD first. */
838 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
840 /* Floating point registers cannot be split. */
841 if (FP_REG_P (src) || FP_REG_P (dst))
844 /* We don't need to split if operands are directly accessible. */
845 if (s_operand (src, mode) || s_operand (dst, mode))
848 /* Non-offsettable memory references cannot be split. */
849 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
850 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
853 /* Moving the first subword must not clobber a register
854 needed to move the second subword. */
855 if (register_operand (dst, mode))
857 rtx subreg = operand_subword (dst, first_subword, 0, mode);
858 if (reg_overlap_mentioned_p (subreg, src))
866 /* Change optimizations to be performed, depending on the
869 LEVEL is the optimization level specified; 2 if `-O2' is
870 specified, 1 if `-O' is specified, and 0 if neither is specified.
872 SIZE is nonzero if `-Os' is specified and zero otherwise. */
875 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
877 /* ??? There are apparently still problems with -fcaller-saves. */
878 flag_caller_saves = 0;
880 /* By default, always emit DWARF-2 unwind info. This allows debugging
881 without maintaining a stack frame back-chain. */
882 flag_asynchronous_unwind_tables = 1;
886 override_options (void)
891 const char *const name; /* processor name or nickname. */
892 const enum processor_type processor;
893 const enum processor_flags flags;
895 const processor_alias_table[] =
897 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
898 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
899 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
900 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
901 | PF_LONG_DISPLACEMENT},
904 int const pta_size = ARRAY_SIZE (processor_alias_table);
906 /* Acquire a unique set number for our register saves and restores. */
907 s390_sr_alias_set = new_alias_set ();
909 /* Set up function hooks. */
910 init_machine_status = s390_init_machine_status;
912 /* Architecture mode defaults according to ABI. */
913 if (!(target_flags_explicit & MASK_ZARCH))
916 target_flags |= MASK_ZARCH;
918 target_flags &= ~MASK_ZARCH;
921 /* Determine processor architectural level. */
922 if (!s390_arch_string)
923 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
925 for (i = 0; i < pta_size; i++)
926 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
928 s390_arch = processor_alias_table[i].processor;
929 s390_arch_flags = processor_alias_table[i].flags;
933 error ("Unknown cpu used in -march=%s.", s390_arch_string);
935 /* Determine processor to tune for. */
936 if (!s390_tune_string)
938 s390_tune = s390_arch;
939 s390_tune_flags = s390_arch_flags;
940 s390_tune_string = s390_arch_string;
944 for (i = 0; i < pta_size; i++)
945 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
947 s390_tune = processor_alias_table[i].processor;
948 s390_tune_flags = processor_alias_table[i].flags;
952 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
956 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
957 error ("z/Architecture mode not supported on %s.", s390_arch_string);
958 if (TARGET_64BIT && !TARGET_ZARCH)
959 error ("64-bit ABI not supported in ESA/390 mode.");
962 /* Map for smallest class containing reg regno. */
964 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
965 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
966 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
967 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
968 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
969 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
970 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
971 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
972 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
973 ADDR_REGS, NO_REGS, ADDR_REGS
976 /* Return attribute type of insn. */
978 static enum attr_type
979 s390_safe_attr_type (rtx insn)
981 if (recog_memoized (insn) >= 0)
982 return get_attr_type (insn);
987 /* Return true if OP a (const_int 0) operand.
988 OP is the current operation.
989 MODE is the current operation mode. */
992 const0_operand (register rtx op, enum machine_mode mode)
994 return op == CONST0_RTX (mode);
997 /* Return true if OP is constant.
998 OP is the current operation.
999 MODE is the current operation mode. */
1002 consttable_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1004 return CONSTANT_P (op);
1007 /* Return true if the mode of operand OP matches MODE.
1008 If MODE is set to VOIDmode, set it to the mode of OP. */
1011 check_mode (register rtx op, enum machine_mode *mode)
1013 if (*mode == VOIDmode)
1014 *mode = GET_MODE (op);
1017 if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode)
1023 /* Return true if OP a valid operand for the LARL instruction.
1024 OP is the current operation.
1025 MODE is the current operation mode. */
1028 larl_operand (register rtx op, enum machine_mode mode)
1030 if (! check_mode (op, &mode))
1033 /* Allow labels and local symbols. */
1034 if (GET_CODE (op) == LABEL_REF)
1036 if (GET_CODE (op) == SYMBOL_REF)
1037 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1038 && SYMBOL_REF_TLS_MODEL (op) == 0
1039 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1041 /* Everything else must have a CONST, so strip it. */
1042 if (GET_CODE (op) != CONST)
1046 /* Allow adding *even* in-range constants. */
1047 if (GET_CODE (op) == PLUS)
1049 if (GET_CODE (XEXP (op, 1)) != CONST_INT
1050 || (INTVAL (XEXP (op, 1)) & 1) != 0)
1052 #if HOST_BITS_PER_WIDE_INT > 32
1053 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
1054 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
1060 /* Labels and local symbols allowed here as well. */
1061 if (GET_CODE (op) == LABEL_REF)
1063 if (GET_CODE (op) == SYMBOL_REF)
1064 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1065 && SYMBOL_REF_TLS_MODEL (op) == 0
1066 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1068 /* Now we must have a @GOTENT offset or @PLT stub
1069 or an @INDNTPOFF TLS offset. */
1070 if (GET_CODE (op) == UNSPEC
1071 && XINT (op, 1) == UNSPEC_GOTENT)
1073 if (GET_CODE (op) == UNSPEC
1074 && XINT (op, 1) == UNSPEC_PLT)
1076 if (GET_CODE (op) == UNSPEC
1077 && XINT (op, 1) == UNSPEC_INDNTPOFF)
1083 /* Helper routine to implement s_operand and s_imm_operand.
1084 OP is the current operation.
1085 MODE is the current operation mode.
1086 ALLOW_IMMEDIATE specifies whether immediate operands should
1087 be accepted or not. */
1090 general_s_operand (register rtx op, enum machine_mode mode,
1091 int allow_immediate)
1093 struct s390_address addr;
1095 /* Call general_operand first, so that we don't have to
1096 check for many special cases. */
1097 if (!general_operand (op, mode))
1100 /* Just like memory_operand, allow (subreg (mem ...))
1102 if (reload_completed
1103 && GET_CODE (op) == SUBREG
1104 && GET_CODE (SUBREG_REG (op)) == MEM)
1105 op = SUBREG_REG (op);
1107 switch (GET_CODE (op))
1109 /* Constants are OK as s-operand if ALLOW_IMMEDIATE
1110 is true and we are still before reload. */
1113 if (!allow_immediate || reload_completed)
1117 /* Memory operands are OK unless they already use an
1120 if (GET_CODE (XEXP (op, 0)) == ADDRESSOF)
1122 if (!s390_decompose_address (XEXP (op, 0), &addr))
1126 /* Do not allow literal pool references unless ALLOW_IMMEDIATE
1127 is true. This prevents compares between two literal pool
1128 entries from being accepted. */
1129 if (!allow_immediate
1130 && addr.base && REGNO (addr.base) == BASE_REGISTER)
1141 /* Return true if OP is a valid S-type operand.
1142 OP is the current operation.
1143 MODE is the current operation mode. */
1146 s_operand (register rtx op, enum machine_mode mode)
1148 return general_s_operand (op, mode, 0);
1151 /* Return true if OP is a valid S-type operand or an immediate
1152 operand that can be addressed as S-type operand by forcing
1153 it into the literal pool.
1154 OP is the current operation.
1155 MODE is the current operation mode. */
1158 s_imm_operand (register rtx op, enum machine_mode mode)
1160 return general_s_operand (op, mode, 1);
1163 /* Return true if OP a valid shift count operand.
1164 OP is the current operation.
1165 MODE is the current operation mode. */
1168 shift_count_operand (rtx op, enum machine_mode mode)
1170 HOST_WIDE_INT offset = 0;
1172 if (! check_mode (op, &mode))
1175 /* We can have an integer constant, an address register,
1176 or a sum of the two. Note that reload already checks
1177 that any register present is an address register, so
1178 we just check for any register here. */
1179 if (GET_CODE (op) == CONST_INT)
1181 offset = INTVAL (op);
1184 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
1186 offset = INTVAL (XEXP (op, 1));
1189 while (op && GET_CODE (op) == SUBREG)
1190 op = SUBREG_REG (op);
1191 if (op && GET_CODE (op) != REG)
1194 /* Unfortunately we have to reject constants that are invalid
1195 for an address, or else reload will get confused. */
1196 if (!DISP_IN_RANGE (offset))
1202 /* Return true if DISP is a valid short displacement. */
1205 s390_short_displacement (rtx disp)
1207 /* No displacement is OK. */
1211 /* Integer displacement in range. */
1212 if (GET_CODE (disp) == CONST_INT)
1213 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1215 /* GOT offset is not OK, the GOT can be large. */
1216 if (GET_CODE (disp) == CONST
1217 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1218 && XINT (XEXP (disp, 0), 1) == UNSPEC_GOT)
1221 /* All other symbolic constants are literal pool references,
1222 which are OK as the literal pool must be small. */
1223 if (GET_CODE (disp) == CONST)
1229 /* Return true if OP is a valid operand for a C constraint. */
1232 s390_extra_constraint_str (rtx op, int c, const char * str)
1234 struct s390_address addr;
1242 if (GET_CODE (op) != MEM)
1244 if (!s390_decompose_address (XEXP (op, 0), &addr))
1249 if (TARGET_LONG_DISPLACEMENT)
1251 if (!s390_short_displacement (addr.disp))
1257 if (GET_CODE (op) != MEM)
1260 if (TARGET_LONG_DISPLACEMENT)
1262 if (!s390_decompose_address (XEXP (op, 0), &addr))
1264 if (!s390_short_displacement (addr.disp))
1270 if (!TARGET_LONG_DISPLACEMENT)
1272 if (GET_CODE (op) != MEM)
1274 if (!s390_decompose_address (XEXP (op, 0), &addr))
1278 if (s390_short_displacement (addr.disp))
1283 if (!TARGET_LONG_DISPLACEMENT)
1285 if (GET_CODE (op) != MEM)
1287 /* Any invalid address here will be fixed up by reload,
1288 so accept it for the most generic constraint. */
1289 if (s390_decompose_address (XEXP (op, 0), &addr)
1290 && s390_short_displacement (addr.disp))
1295 if (TARGET_LONG_DISPLACEMENT)
1297 if (!s390_decompose_address (op, &addr))
1299 if (!s390_short_displacement (addr.disp))
1305 if (!TARGET_LONG_DISPLACEMENT)
1307 /* Any invalid address here will be fixed up by reload,
1308 so accept it for the most generic constraint. */
1309 if (s390_decompose_address (op, &addr)
1310 && s390_short_displacement (addr.disp))
1315 return shift_count_operand (op, VOIDmode);
1324 /* Return true if VALUE matches the constraint STR. */
1327 s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
1331 enum machine_mode mode, part_mode;
1341 return (unsigned int)value < 256;
1344 return (unsigned int)value < 4096;
1347 return value >= -32768 && value < 32768;
1350 return (TARGET_LONG_DISPLACEMENT ?
1351 (value >= -524288 && value <= 524287)
1352 : (value >= 0 && value <= 4095));
1354 return value == 2147483647;
1357 part = str[1] - '0';
1361 case 'H': part_mode = HImode; break;
1362 case 'Q': part_mode = QImode; break;
1368 case 'H': mode = HImode; break;
1369 case 'S': mode = SImode; break;
1370 case 'D': mode = DImode; break;
1376 case '0': def = 0; break;
1377 case 'F': def = -1; break;
1381 if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (part_mode))
1384 if (s390_single_part (GEN_INT (value), mode, part_mode, def) != part)
1396 /* Compute a (partial) cost for rtx X. Return true if the complete
1397 cost has been computed, and false if subexpressions should be
1398 scanned. In either case, *TOTAL contains the cost result. */
1401 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1406 if (GET_CODE (XEXP (x, 0)) == MINUS
1407 && GET_CODE (XEXP (XEXP (x, 0), 1)) != CONST_INT)
1414 /* Force_const_mem does not work out of reload, because the
1415 saveable_obstack is set to reload_obstack, which does not
1416 live long enough. Because of this we cannot use force_const_mem
1417 in addsi3. This leads to problems with gen_add2_insn with a
1418 constant greater than a short. Because of that we give an
1419 addition of greater constants a cost of 3 (reload1.c 10096). */
1420 /* ??? saveable_obstack no longer exists. */
1421 if (outer_code == PLUS
1422 && (INTVAL (x) > 32767 || INTVAL (x) < -32768))
1423 *total = COSTS_N_INSNS (3);
1444 *total = COSTS_N_INSNS (1);
1448 if (GET_MODE (XEXP (x, 0)) == DImode)
1449 *total = COSTS_N_INSNS (40);
1451 *total = COSTS_N_INSNS (7);
1458 *total = COSTS_N_INSNS (33);
1466 /* Return the cost of an address rtx ADDR. */
1469 s390_address_cost (rtx addr)
1471 struct s390_address ad;
1472 if (!s390_decompose_address (addr, &ad))
1475 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
1478 /* Return true if OP is a valid operand for the BRAS instruction.
1479 OP is the current operation.
1480 MODE is the current operation mode. */
1483 bras_sym_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1485 register enum rtx_code code = GET_CODE (op);
1487 /* Allow SYMBOL_REFs. */
1488 if (code == SYMBOL_REF)
1491 /* Allow @PLT stubs. */
1493 && GET_CODE (XEXP (op, 0)) == UNSPEC
1494 && XINT (XEXP (op, 0), 1) == UNSPEC_PLT)
1499 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
1500 otherwise return 0. */
1503 tls_symbolic_operand (register rtx op)
1505 if (GET_CODE (op) != SYMBOL_REF)
1507 return SYMBOL_REF_TLS_MODEL (op);
1510 /* Return true if OP is a load multiple operation. It is known to be a
1511 PARALLEL and the first section will be tested.
1512 OP is the current operation.
1513 MODE is the current operation mode. */
1516 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1518 enum machine_mode elt_mode;
1519 int count = XVECLEN (op, 0);
1520 unsigned int dest_regno;
1525 /* Perform a quick check so we don't blow up below. */
1527 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1528 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1529 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1532 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1533 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1534 elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
1536 /* Check, is base, or base + displacement. */
1538 if (GET_CODE (src_addr) == REG)
1540 else if (GET_CODE (src_addr) == PLUS
1541 && GET_CODE (XEXP (src_addr, 0)) == REG
1542 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
1544 off = INTVAL (XEXP (src_addr, 1));
1545 src_addr = XEXP (src_addr, 0);
1550 if (src_addr == frame_pointer_rtx || src_addr == arg_pointer_rtx)
1553 for (i = 1; i < count; i++)
1555 rtx elt = XVECEXP (op, 0, i);
1557 if (GET_CODE (elt) != SET
1558 || GET_CODE (SET_DEST (elt)) != REG
1559 || GET_MODE (SET_DEST (elt)) != elt_mode
1560 || REGNO (SET_DEST (elt)) != dest_regno + i
1561 || GET_CODE (SET_SRC (elt)) != MEM
1562 || GET_MODE (SET_SRC (elt)) != elt_mode
1563 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1564 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1565 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1566 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
1567 != off + i * GET_MODE_SIZE (elt_mode))
1574 /* Return true if OP is a store multiple operation. It is known to be a
1575 PARALLEL and the first section will be tested.
1576 OP is the current operation.
1577 MODE is the current operation mode. */
1580 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1582 enum machine_mode elt_mode;
1583 int count = XVECLEN (op, 0);
1584 unsigned int src_regno;
1588 /* Perform a quick check so we don't blow up below. */
1590 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1591 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1592 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1595 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1596 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1597 elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
1599 /* Check, is base, or base + displacement. */
1601 if (GET_CODE (dest_addr) == REG)
1603 else if (GET_CODE (dest_addr) == PLUS
1604 && GET_CODE (XEXP (dest_addr, 0)) == REG
1605 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
1607 off = INTVAL (XEXP (dest_addr, 1));
1608 dest_addr = XEXP (dest_addr, 0);
1613 if (dest_addr == frame_pointer_rtx || dest_addr == arg_pointer_rtx)
1616 for (i = 1; i < count; i++)
1618 rtx elt = XVECEXP (op, 0, i);
1620 if (GET_CODE (elt) != SET
1621 || GET_CODE (SET_SRC (elt)) != REG
1622 || GET_MODE (SET_SRC (elt)) != elt_mode
1623 || REGNO (SET_SRC (elt)) != src_regno + i
1624 || GET_CODE (SET_DEST (elt)) != MEM
1625 || GET_MODE (SET_DEST (elt)) != elt_mode
1626 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1627 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1628 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1629 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
1630 != off + i * GET_MODE_SIZE (elt_mode))
1637 /* Return true if OP contains a symbol reference */
1640 symbolic_reference_mentioned_p (rtx op)
1642 register const char *fmt;
1645 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
1648 fmt = GET_RTX_FORMAT (GET_CODE (op));
1649 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1655 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1656 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1660 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
1667 /* Return true if OP contains a reference to a thread-local symbol. */
1670 tls_symbolic_reference_mentioned_p (rtx op)
1672 register const char *fmt;
1675 if (GET_CODE (op) == SYMBOL_REF)
1676 return tls_symbolic_operand (op);
1678 fmt = GET_RTX_FORMAT (GET_CODE (op));
1679 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1685 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1686 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1690 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
1698 /* Return true if OP is a legitimate general operand when
1699 generating PIC code. It is given that flag_pic is on
1700 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1703 legitimate_pic_operand_p (register rtx op)
1705 /* Accept all non-symbolic constants. */
1706 if (!SYMBOLIC_CONST (op))
1709 /* Reject everything else; must be handled
1710 via emit_symbolic_move. */
1714 /* Returns true if the constant value OP is a legitimate general operand.
1715 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1718 legitimate_constant_p (register rtx op)
1720 /* Accept all non-symbolic constants. */
1721 if (!SYMBOLIC_CONST (op))
1724 /* Accept immediate LARL operands. */
1725 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
1728 /* Thread-local symbols are never legal constants. This is
1729 so that emit_call knows that computing such addresses
1730 might require a function call. */
1731 if (TLS_SYMBOLIC_CONST (op))
1734 /* In the PIC case, symbolic constants must *not* be
1735 forced into the literal pool. We accept them here,
1736 so that they will be handled by emit_symbolic_move. */
1740 /* All remaining non-PIC symbolic constants are
1741 forced into the literal pool. */
1745 /* Determine if it's legal to put X into the constant pool. This
1746 is not possible if X contains the address of a symbol that is
1747 not constant (TLS) or not known at final link time (PIC). */
1750 s390_cannot_force_const_mem (rtx x)
1752 switch (GET_CODE (x))
1756 /* Accept all non-symbolic constants. */
1760 /* Labels are OK iff we are non-PIC. */
1761 return flag_pic != 0;
1764 /* 'Naked' TLS symbol references are never OK,
1765 non-TLS symbols are OK iff we are non-PIC. */
1766 if (tls_symbolic_operand (x))
1769 return flag_pic != 0;
1772 return s390_cannot_force_const_mem (XEXP (x, 0));
1775 return s390_cannot_force_const_mem (XEXP (x, 0))
1776 || s390_cannot_force_const_mem (XEXP (x, 1));
1779 switch (XINT (x, 1))
1781 /* Only lt-relative or GOT-relative UNSPECs are OK. */
1782 case UNSPEC_LTREL_OFFSET:
1790 case UNSPEC_GOTNTPOFF:
1791 case UNSPEC_INDNTPOFF:
1804 /* Returns true if the constant value OP is a legitimate general
1805 operand during and after reload. The difference to
1806 legitimate_constant_p is that this function will not accept
1807 a constant that would need to be forced to the literal pool
1808 before it can be used as operand. */
1811 legitimate_reload_constant_p (register rtx op)
1813 /* Accept la(y) operands. */
1814 if (GET_CODE (op) == CONST_INT
1815 && DISP_IN_RANGE (INTVAL (op)))
1818 /* Accept l(g)hi operands. */
1819 if (GET_CODE (op) == CONST_INT
1820 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), 'K', "K"))
1823 /* Accept lliXX operands. */
1825 && s390_single_part (op, DImode, HImode, 0) >= 0)
1828 /* Accept larl operands. */
1829 if (TARGET_CPU_ZARCH
1830 && larl_operand (op, VOIDmode))
1833 /* Everything else cannot be handled without reload. */
1837 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
1838 return the class of reg to actually use. */
1841 s390_preferred_reload_class (rtx op, enum reg_class class)
1843 /* This can happen if a floating point constant is being
1844 reloaded into an integer register. Leave well alone. */
1845 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
1846 && class != FP_REGS)
1849 switch (GET_CODE (op))
1851 /* Constants we cannot reload must be forced into the
1856 if (legitimate_reload_constant_p (op))
1861 /* If a symbolic constant or a PLUS is reloaded,
1862 it is most likely being used as an address, so
1863 prefer ADDR_REGS. If 'class' is not a superset
1864 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
1869 if (reg_class_subset_p (ADDR_REGS, class))
1881 /* Return the register class of a scratch register needed to
1882 load IN into a register of class CLASS in MODE.
1884 We need a temporary when loading a PLUS expression which
1885 is not a legitimate operand of the LOAD ADDRESS instruction. */
1888 s390_secondary_input_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
1889 enum machine_mode mode, rtx in)
1891 if (s390_plus_operand (in, mode))
1897 /* Return the register class of a scratch register needed to
1898 store a register of class CLASS in MODE into OUT:
1900 We need a temporary when storing a double-word to a
1901 non-offsettable memory address. */
1904 s390_secondary_output_reload_class (enum reg_class class,
1905 enum machine_mode mode, rtx out)
1907 if ((TARGET_64BIT ? mode == TImode
1908 : (mode == DImode || mode == DFmode))
1909 && reg_classes_intersect_p (GENERAL_REGS, class)
1910 && GET_CODE (out) == MEM
1911 && !offsettable_memref_p (out)
1912 && !s_operand (out, VOIDmode))
1918 /* Return true if OP is a PLUS that is not a legitimate
1919 operand for the LA instruction.
1920 OP is the current operation.
1921 MODE is the current operation mode. */
1924 s390_plus_operand (register rtx op, enum machine_mode mode)
1926 if (!check_mode (op, &mode) || mode != Pmode)
1929 if (GET_CODE (op) != PLUS)
1932 if (legitimate_la_operand_p (op))
1938 /* Generate code to load SRC, which is PLUS that is not a
1939 legitimate operand for the LA instruction, into TARGET.
1940 SCRATCH may be used as scratch register. */
1943 s390_expand_plus_operand (register rtx target, register rtx src,
1944 register rtx scratch)
1947 struct s390_address ad;
1949 /* src must be a PLUS; get its two operands. */
1950 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
1953 /* Check if any of the two operands is already scheduled
1954 for replacement by reload. This can happen e.g. when
1955 float registers occur in an address. */
1956 sum1 = find_replacement (&XEXP (src, 0));
1957 sum2 = find_replacement (&XEXP (src, 1));
1958 src = gen_rtx_PLUS (Pmode, sum1, sum2);
1960 /* If the address is already strictly valid, there's nothing to do. */
1961 if (!s390_decompose_address (src, &ad)
1962 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
1963 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
1965 /* Otherwise, one of the operands cannot be an address register;
1966 we reload its value into the scratch register. */
1967 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
1969 emit_move_insn (scratch, sum1);
1972 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
1974 emit_move_insn (scratch, sum2);
1978 /* According to the way these invalid addresses are generated
1979 in reload.c, it should never happen (at least on s390) that
1980 *neither* of the PLUS components, after find_replacements
1981 was applied, is an address register. */
1982 if (sum1 == scratch && sum2 == scratch)
1988 src = gen_rtx_PLUS (Pmode, sum1, sum2);
1991 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
1992 is only ever performed on addresses, so we can mark the
1993 sum as legitimate for LA in any case. */
1994 s390_load_address (target, src);
1998 /* Decompose a RTL expression ADDR for a memory address into
1999 its components, returned in OUT.
2001 Returns 0 if ADDR is not a valid memory address, nonzero
2002 otherwise. If OUT is NULL, don't return the components,
2003 but check for validity only.
2005 Note: Only addresses in canonical form are recognized.
2006 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2007 canonical form so that they will be recognized. */
2010 s390_decompose_address (register rtx addr, struct s390_address *out)
2012 rtx base = NULL_RTX;
2013 rtx indx = NULL_RTX;
2014 rtx disp = NULL_RTX;
2015 int pointer = FALSE;
2016 int base_ptr = FALSE;
2017 int indx_ptr = FALSE;
2019 /* Decompose address into base + index + displacement. */
2021 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2024 else if (GET_CODE (addr) == PLUS)
2026 rtx op0 = XEXP (addr, 0);
2027 rtx op1 = XEXP (addr, 1);
2028 enum rtx_code code0 = GET_CODE (op0);
2029 enum rtx_code code1 = GET_CODE (op1);
2031 if (code0 == REG || code0 == UNSPEC)
2033 if (code1 == REG || code1 == UNSPEC)
2035 indx = op0; /* index + base */
2041 base = op0; /* base + displacement */
2046 else if (code0 == PLUS)
2048 indx = XEXP (op0, 0); /* index + base + disp */
2049 base = XEXP (op0, 1);
2060 disp = addr; /* displacement */
2063 /* Validate base register. */
2066 if (GET_CODE (base) == UNSPEC)
2068 if (XVECLEN (base, 0) != 1 || XINT (base, 1) != UNSPEC_LTREL_BASE)
2070 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2073 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2076 if (REGNO (base) == BASE_REGISTER
2077 || REGNO (base) == STACK_POINTER_REGNUM
2078 || REGNO (base) == FRAME_POINTER_REGNUM
2079 || ((reload_completed || reload_in_progress)
2080 && frame_pointer_needed
2081 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2082 || REGNO (base) == ARG_POINTER_REGNUM
2083 || (REGNO (base) >= FIRST_VIRTUAL_REGISTER
2084 && REGNO (base) <= LAST_VIRTUAL_REGISTER)
2086 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2087 pointer = base_ptr = TRUE;
2090 /* Validate index register. */
2093 if (GET_CODE (indx) == UNSPEC)
2095 if (XVECLEN (indx, 0) != 1 || XINT (indx, 1) != UNSPEC_LTREL_BASE)
2097 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2100 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2103 if (REGNO (indx) == BASE_REGISTER
2104 || REGNO (indx) == STACK_POINTER_REGNUM
2105 || REGNO (indx) == FRAME_POINTER_REGNUM
2106 || ((reload_completed || reload_in_progress)
2107 && frame_pointer_needed
2108 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2109 || REGNO (indx) == ARG_POINTER_REGNUM
2110 || (REGNO (indx) >= FIRST_VIRTUAL_REGISTER
2111 && REGNO (indx) <= LAST_VIRTUAL_REGISTER)
2113 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2114 pointer = indx_ptr = TRUE;
2117 /* Prefer to use pointer as base, not index. */
2118 if (base && indx && !base_ptr
2119 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2126 /* Validate displacement. */
2129 /* Allow integer constant in range. */
2130 if (GET_CODE (disp) == CONST_INT)
2132 /* If the argument pointer is involved, the displacement will change
2133 later anyway as the argument pointer gets eliminated. This could
2134 make a valid displacement invalid, but it is more likely to make
2135 an invalid displacement valid, because we sometimes access the
2136 register save area via negative offsets to the arg pointer.
2137 Thus we don't check the displacement for validity here. If after
2138 elimination the displacement turns out to be invalid after all,
2139 this is fixed up by reload in any case. */
2140 if (base != arg_pointer_rtx && indx != arg_pointer_rtx)
2142 if (!DISP_IN_RANGE (INTVAL (disp)))
2147 /* In the small-PIC case, the linker converts @GOT
2148 and @GOTNTPOFF offsets to possible displacements. */
2149 else if (GET_CODE (disp) == CONST
2150 && GET_CODE (XEXP (disp, 0)) == UNSPEC
2151 && (XINT (XEXP (disp, 0), 1) == UNSPEC_GOT
2152 || XINT (XEXP (disp, 0), 1) == UNSPEC_GOTNTPOFF))
2160 /* Accept chunkfied literal pool symbol references. */
2161 else if (GET_CODE (disp) == CONST
2162 && GET_CODE (XEXP (disp, 0)) == MINUS
2163 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == LABEL_REF
2164 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == LABEL_REF)
2169 /* Likewise if a constant offset is present. */
2170 else if (GET_CODE (disp) == CONST
2171 && GET_CODE (XEXP (disp, 0)) == PLUS
2172 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT
2173 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == MINUS
2174 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 0)) == LABEL_REF
2175 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 1)) == LABEL_REF)
2180 /* We can convert literal pool addresses to
2181 displacements by basing them off the base register. */
2184 /* In some cases, we can accept an additional
2185 small constant offset. Split these off here. */
2187 unsigned int offset = 0;
2189 if (GET_CODE (disp) == CONST
2190 && GET_CODE (XEXP (disp, 0)) == PLUS
2191 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2193 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2194 disp = XEXP (XEXP (disp, 0), 0);
2197 /* Now we must have a literal pool address. */
2198 if (GET_CODE (disp) != SYMBOL_REF
2199 || !CONSTANT_POOL_ADDRESS_P (disp))
2202 /* If we have an offset, make sure it does not
2203 exceed the size of the constant pool entry. */
2204 if (offset && offset >= GET_MODE_SIZE (get_pool_mode (disp)))
2207 /* Either base or index must be free to
2208 hold the base register. */
2212 /* Convert the address. */
2214 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2216 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2218 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2219 UNSPEC_LTREL_OFFSET);
2220 disp = gen_rtx_CONST (Pmode, disp);
2223 disp = plus_constant (disp, offset);
2237 out->pointer = pointer;
2243 /* Return nonzero if ADDR is a valid memory address.
2244 STRICT specifies whether strict register checking applies. */
2247 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2248 register rtx addr, int strict)
2250 struct s390_address ad;
2251 if (!s390_decompose_address (addr, &ad))
2256 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2258 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2263 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2265 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2272 /* Return 1 if OP is a valid operand for the LA instruction.
2273 In 31-bit, we need to prove that the result is used as an
2274 address, as LA performs only a 31-bit addition. */
2277 legitimate_la_operand_p (register rtx op)
2279 struct s390_address addr;
2280 if (!s390_decompose_address (op, &addr))
2283 if (TARGET_64BIT || addr.pointer)
2289 /* Return 1 if OP is a valid operand for the LA instruction,
2290 and we prefer to use LA over addition to compute it. */
2293 preferred_la_operand_p (register rtx op)
2295 struct s390_address addr;
2296 if (!s390_decompose_address (op, &addr))
2299 if (!TARGET_64BIT && !addr.pointer)
2305 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2306 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2312 /* Emit a forced load-address operation to load SRC into DST.
2313 This will use the LOAD ADDRESS instruction even in situations
2314 where legitimate_la_operand_p (SRC) returns false. */
2317 s390_load_address (rtx dst, rtx src)
2320 emit_move_insn (dst, src);
2322 emit_insn (gen_force_la_31 (dst, src));
2325 /* Return a legitimate reference for ORIG (an address) using the
2326 register REG. If REG is 0, a new pseudo is generated.
2328 There are two types of references that must be handled:
2330 1. Global data references must load the address from the GOT, via
2331 the PIC reg. An insn is emitted to do this load, and the reg is
2334 2. Static data references, constant pool addresses, and code labels
2335 compute the address as an offset from the GOT, whose base is in
2336 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2337 differentiate them from global data objects. The returned
2338 address is the PIC reg + an unspec constant.
2340 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2341 reg also appears in the address. */
2344 legitimize_pic_address (rtx orig, rtx reg)
2350 if (GET_CODE (addr) == LABEL_REF
2351 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2353 /* This is a local symbol. */
2354 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2356 /* Access local symbols PC-relative via LARL.
2357 This is the same as in the non-PIC case, so it is
2358 handled automatically ... */
2362 /* Access local symbols relative to the GOT. */
2364 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2366 if (reload_in_progress || reload_completed)
2367 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2369 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2370 addr = gen_rtx_CONST (Pmode, addr);
2371 addr = force_const_mem (Pmode, addr);
2372 emit_move_insn (temp, addr);
2374 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2377 emit_move_insn (reg, new);
2382 else if (GET_CODE (addr) == SYMBOL_REF)
2385 reg = gen_reg_rtx (Pmode);
2389 /* Assume GOT offset < 4k. This is handled the same way
2390 in both 31- and 64-bit code (@GOT). */
2392 if (reload_in_progress || reload_completed)
2393 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2395 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2396 new = gen_rtx_CONST (Pmode, new);
2397 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2398 new = gen_rtx_MEM (Pmode, new);
2399 RTX_UNCHANGING_P (new) = 1;
2400 emit_move_insn (reg, new);
2403 else if (TARGET_CPU_ZARCH)
2405 /* If the GOT offset might be >= 4k, we determine the position
2406 of the GOT entry via a PC-relative LARL (@GOTENT). */
2408 rtx temp = gen_reg_rtx (Pmode);
2410 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
2411 new = gen_rtx_CONST (Pmode, new);
2412 emit_move_insn (temp, new);
2414 new = gen_rtx_MEM (Pmode, temp);
2415 RTX_UNCHANGING_P (new) = 1;
2416 emit_move_insn (reg, new);
2421 /* If the GOT offset might be >= 4k, we have to load it
2422 from the literal pool (@GOT). */
2424 rtx temp = gen_reg_rtx (Pmode);
2426 if (reload_in_progress || reload_completed)
2427 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2429 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2430 addr = gen_rtx_CONST (Pmode, addr);
2431 addr = force_const_mem (Pmode, addr);
2432 emit_move_insn (temp, addr);
2434 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2435 new = gen_rtx_MEM (Pmode, new);
2436 RTX_UNCHANGING_P (new) = 1;
2437 emit_move_insn (reg, new);
2443 if (GET_CODE (addr) == CONST)
2445 addr = XEXP (addr, 0);
2446 if (GET_CODE (addr) == UNSPEC)
2448 if (XVECLEN (addr, 0) != 1)
2450 switch (XINT (addr, 1))
2452 /* If someone moved a GOT-relative UNSPEC
2453 out of the literal pool, force them back in. */
2456 new = force_const_mem (Pmode, orig);
2459 /* @GOT is OK as is if small. */
2462 new = force_const_mem (Pmode, orig);
2465 /* @GOTENT is OK as is. */
2469 /* @PLT is OK as is on 64-bit, must be converted to
2470 GOT-relative @PLTOFF on 31-bit. */
2472 if (!TARGET_CPU_ZARCH)
2474 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2476 if (reload_in_progress || reload_completed)
2477 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2479 addr = XVECEXP (addr, 0, 0);
2480 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
2482 addr = gen_rtx_CONST (Pmode, addr);
2483 addr = force_const_mem (Pmode, addr);
2484 emit_move_insn (temp, addr);
2486 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2489 emit_move_insn (reg, new);
2495 /* Everything else cannot happen. */
2500 else if (GET_CODE (addr) != PLUS)
2503 if (GET_CODE (addr) == PLUS)
2505 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
2506 /* Check first to see if this is a constant offset
2507 from a local symbol reference. */
2508 if ((GET_CODE (op0) == LABEL_REF
2509 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
2510 && GET_CODE (op1) == CONST_INT)
2512 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
2514 if (INTVAL (op1) & 1)
2516 /* LARL can't handle odd offsets, so emit a
2517 pair of LARL and LA. */
2518 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2520 if (!DISP_IN_RANGE (INTVAL (op1)))
2522 int even = INTVAL (op1) - 1;
2523 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
2524 op0 = gen_rtx_CONST (Pmode, op0);
2528 emit_move_insn (temp, op0);
2529 new = gen_rtx_PLUS (Pmode, temp, op1);
2533 emit_move_insn (reg, new);
2539 /* If the offset is even, we can just use LARL.
2540 This will happen automatically. */
2545 /* Access local symbols relative to the GOT. */
2547 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2549 if (reload_in_progress || reload_completed)
2550 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2552 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
2554 addr = gen_rtx_PLUS (Pmode, addr, op1);
2555 addr = gen_rtx_CONST (Pmode, addr);
2556 addr = force_const_mem (Pmode, addr);
2557 emit_move_insn (temp, addr);
2559 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2562 emit_move_insn (reg, new);
2568 /* Now, check whether it is a GOT relative symbol plus offset
2569 that was pulled out of the literal pool. Force it back in. */
2571 else if (GET_CODE (op0) == UNSPEC
2572 && GET_CODE (op1) == CONST_INT)
2574 if (XVECLEN (op0, 0) != 1)
2576 if (XINT (op0, 1) != UNSPEC_GOTOFF)
2579 new = force_const_mem (Pmode, orig);
2582 /* Otherwise, compute the sum. */
2585 base = legitimize_pic_address (XEXP (addr, 0), reg);
2586 new = legitimize_pic_address (XEXP (addr, 1),
2587 base == reg ? NULL_RTX : reg);
2588 if (GET_CODE (new) == CONST_INT)
2589 new = plus_constant (base, INTVAL (new));
2592 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
2594 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
2595 new = XEXP (new, 1);
2597 new = gen_rtx_PLUS (Pmode, base, new);
2600 if (GET_CODE (new) == CONST)
2601 new = XEXP (new, 0);
2602 new = force_operand (new, 0);
2609 /* Load the thread pointer into a register. */
2612 get_thread_pointer (void)
2616 tp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
2617 tp = force_reg (Pmode, tp);
2618 mark_reg_pointer (tp, BITS_PER_WORD);
2623 /* Construct the SYMBOL_REF for the tls_get_offset function. */
2625 static GTY(()) rtx s390_tls_symbol;
2627 s390_tls_get_offset (void)
2629 if (!s390_tls_symbol)
2630 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
2632 return s390_tls_symbol;
2635 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
2636 this (thread-local) address. REG may be used as temporary. */
2639 legitimize_tls_address (rtx addr, rtx reg)
2641 rtx new, tls_call, temp, base, r2, insn;
2643 if (GET_CODE (addr) == SYMBOL_REF)
2644 switch (tls_symbolic_operand (addr))
2646 case TLS_MODEL_GLOBAL_DYNAMIC:
2648 r2 = gen_rtx_REG (Pmode, 2);
2649 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
2650 new = gen_rtx_CONST (Pmode, tls_call);
2651 new = force_const_mem (Pmode, new);
2652 emit_move_insn (r2, new);
2653 emit_call_insn (gen_call_value_tls (r2, tls_call));
2654 insn = get_insns ();
2657 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2658 temp = gen_reg_rtx (Pmode);
2659 emit_libcall_block (insn, temp, r2, new);
2661 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2664 s390_load_address (reg, new);
2669 case TLS_MODEL_LOCAL_DYNAMIC:
2671 r2 = gen_rtx_REG (Pmode, 2);
2672 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
2673 new = gen_rtx_CONST (Pmode, tls_call);
2674 new = force_const_mem (Pmode, new);
2675 emit_move_insn (r2, new);
2676 emit_call_insn (gen_call_value_tls (r2, tls_call));
2677 insn = get_insns ();
2680 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
2681 temp = gen_reg_rtx (Pmode);
2682 emit_libcall_block (insn, temp, r2, new);
2684 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2685 base = gen_reg_rtx (Pmode);
2686 s390_load_address (base, new);
2688 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
2689 new = gen_rtx_CONST (Pmode, new);
2690 new = force_const_mem (Pmode, new);
2691 temp = gen_reg_rtx (Pmode);
2692 emit_move_insn (temp, new);
2694 new = gen_rtx_PLUS (Pmode, base, temp);
2697 s390_load_address (reg, new);
2702 case TLS_MODEL_INITIAL_EXEC:
2705 /* Assume GOT offset < 4k. This is handled the same way
2706 in both 31- and 64-bit code. */
2708 if (reload_in_progress || reload_completed)
2709 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2711 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2712 new = gen_rtx_CONST (Pmode, new);
2713 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2714 new = gen_rtx_MEM (Pmode, new);
2715 RTX_UNCHANGING_P (new) = 1;
2716 temp = gen_reg_rtx (Pmode);
2717 emit_move_insn (temp, new);
2719 else if (TARGET_CPU_ZARCH)
2721 /* If the GOT offset might be >= 4k, we determine the position
2722 of the GOT entry via a PC-relative LARL. */
2724 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2725 new = gen_rtx_CONST (Pmode, new);
2726 temp = gen_reg_rtx (Pmode);
2727 emit_move_insn (temp, new);
2729 new = gen_rtx_MEM (Pmode, temp);
2730 RTX_UNCHANGING_P (new) = 1;
2731 temp = gen_reg_rtx (Pmode);
2732 emit_move_insn (temp, new);
2736 /* If the GOT offset might be >= 4k, we have to load it
2737 from the literal pool. */
2739 if (reload_in_progress || reload_completed)
2740 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2742 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2743 new = gen_rtx_CONST (Pmode, new);
2744 new = force_const_mem (Pmode, new);
2745 temp = gen_reg_rtx (Pmode);
2746 emit_move_insn (temp, new);
2748 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2749 new = gen_rtx_MEM (Pmode, new);
2750 RTX_UNCHANGING_P (new) = 1;
2752 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2753 temp = gen_reg_rtx (Pmode);
2754 emit_insn (gen_rtx_SET (Pmode, temp, new));
2758 /* In position-dependent code, load the absolute address of
2759 the GOT entry from the literal pool. */
2761 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2762 new = gen_rtx_CONST (Pmode, new);
2763 new = force_const_mem (Pmode, new);
2764 temp = gen_reg_rtx (Pmode);
2765 emit_move_insn (temp, new);
2768 new = gen_rtx_MEM (Pmode, new);
2769 RTX_UNCHANGING_P (new) = 1;
2771 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2772 temp = gen_reg_rtx (Pmode);
2773 emit_insn (gen_rtx_SET (Pmode, temp, new));
2776 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2779 s390_load_address (reg, new);
2784 case TLS_MODEL_LOCAL_EXEC:
2785 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2786 new = gen_rtx_CONST (Pmode, new);
2787 new = force_const_mem (Pmode, new);
2788 temp = gen_reg_rtx (Pmode);
2789 emit_move_insn (temp, new);
2791 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2794 s390_load_address (reg, new);
2803 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
2805 switch (XINT (XEXP (addr, 0), 1))
2807 case UNSPEC_INDNTPOFF:
2808 if (TARGET_CPU_ZARCH)
2820 abort (); /* for now ... */
2825 /* Emit insns to move operands[1] into operands[0]. */
2828 emit_symbolic_move (rtx *operands)
2830 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
2832 if (GET_CODE (operands[0]) == MEM)
2833 operands[1] = force_reg (Pmode, operands[1]);
2834 else if (TLS_SYMBOLIC_CONST (operands[1]))
2835 operands[1] = legitimize_tls_address (operands[1], temp);
2837 operands[1] = legitimize_pic_address (operands[1], temp);
2840 /* Try machine-dependent ways of modifying an illegitimate address X
2841 to be legitimate. If we find one, return the new, valid address.
2843 OLDX is the address as it was before break_out_memory_refs was called.
2844 In some cases it is useful to look at this to decide what needs to be done.
2846 MODE is the mode of the operand pointed to by X.
2848 When -fpic is used, special handling is needed for symbolic references.
2849 See comments by legitimize_pic_address for details. */
2852 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
2853 enum machine_mode mode ATTRIBUTE_UNUSED)
2855 rtx constant_term = const0_rtx;
2857 if (TLS_SYMBOLIC_CONST (x))
2859 x = legitimize_tls_address (x, 0);
2861 if (legitimate_address_p (mode, x, FALSE))
2866 if (SYMBOLIC_CONST (x)
2867 || (GET_CODE (x) == PLUS
2868 && (SYMBOLIC_CONST (XEXP (x, 0))
2869 || SYMBOLIC_CONST (XEXP (x, 1)))))
2870 x = legitimize_pic_address (x, 0);
2872 if (legitimate_address_p (mode, x, FALSE))
2876 x = eliminate_constant_term (x, &constant_term);
2878 /* Optimize loading of large displacements by splitting them
2879 into the multiple of 4K and the rest; this allows the
2880 former to be CSE'd if possible.
2882 Don't do this if the displacement is added to a register
2883 pointing into the stack frame, as the offsets will
2884 change later anyway. */
2886 if (GET_CODE (constant_term) == CONST_INT
2887 && !TARGET_LONG_DISPLACEMENT
2888 && !DISP_IN_RANGE (INTVAL (constant_term))
2889 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
2891 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
2892 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
2894 rtx temp = gen_reg_rtx (Pmode);
2895 rtx val = force_operand (GEN_INT (upper), temp);
2897 emit_move_insn (temp, val);
2899 x = gen_rtx_PLUS (Pmode, x, temp);
2900 constant_term = GEN_INT (lower);
2903 if (GET_CODE (x) == PLUS)
2905 if (GET_CODE (XEXP (x, 0)) == REG)
2907 register rtx temp = gen_reg_rtx (Pmode);
2908 register rtx val = force_operand (XEXP (x, 1), temp);
2910 emit_move_insn (temp, val);
2912 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
2915 else if (GET_CODE (XEXP (x, 1)) == REG)
2917 register rtx temp = gen_reg_rtx (Pmode);
2918 register rtx val = force_operand (XEXP (x, 0), temp);
2920 emit_move_insn (temp, val);
2922 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
2926 if (constant_term != const0_rtx)
2927 x = gen_rtx_PLUS (Pmode, x, constant_term);
2932 /* Emit code to move LEN bytes from DST to SRC. */
2935 s390_expand_movstr (rtx dst, rtx src, rtx len)
2937 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
2939 if (INTVAL (len) > 0)
2940 emit_insn (gen_movstr_short (dst, src, GEN_INT (INTVAL (len) - 1)));
2943 else if (TARGET_MVCLE)
2945 emit_insn (gen_movstr_long (dst, src, convert_to_mode (Pmode, len, 1)));
2950 rtx dst_addr, src_addr, count, blocks, temp;
2951 rtx end_label = gen_label_rtx ();
2952 enum machine_mode mode;
2955 mode = GET_MODE (len);
2956 if (mode == VOIDmode)
2959 type = lang_hooks.types.type_for_mode (mode, 1);
2963 dst_addr = gen_reg_rtx (Pmode);
2964 src_addr = gen_reg_rtx (Pmode);
2965 count = gen_reg_rtx (mode);
2966 blocks = gen_reg_rtx (mode);
2968 convert_move (count, len, 1);
2969 emit_cmp_and_jump_insns (count, const0_rtx,
2970 EQ, NULL_RTX, mode, 1, end_label);
2972 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
2973 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
2974 dst = change_address (dst, VOIDmode, dst_addr);
2975 src = change_address (src, VOIDmode, src_addr);
2977 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
2979 emit_move_insn (count, temp);
2981 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
2983 emit_move_insn (blocks, temp);
2985 expand_start_loop (1);
2986 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
2987 make_tree (type, blocks),
2988 make_tree (type, const0_rtx)));
2990 emit_insn (gen_movstr_short (dst, src, GEN_INT (255)));
2991 s390_load_address (dst_addr,
2992 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
2993 s390_load_address (src_addr,
2994 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
2996 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
2998 emit_move_insn (blocks, temp);
3002 emit_insn (gen_movstr_short (dst, src,
3003 convert_to_mode (Pmode, count, 1)));
3004 emit_label (end_label);
3008 /* Emit code to clear LEN bytes at DST. */
3011 s390_expand_clrstr (rtx dst, rtx len)
3013 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3015 if (INTVAL (len) > 0)
3016 emit_insn (gen_clrstr_short (dst, GEN_INT (INTVAL (len) - 1)));
3019 else if (TARGET_MVCLE)
3021 emit_insn (gen_clrstr_long (dst, convert_to_mode (Pmode, len, 1)));
3026 rtx dst_addr, src_addr, count, blocks, temp;
3027 rtx end_label = gen_label_rtx ();
3028 enum machine_mode mode;
3031 mode = GET_MODE (len);
3032 if (mode == VOIDmode)
3035 type = lang_hooks.types.type_for_mode (mode, 1);
3039 dst_addr = gen_reg_rtx (Pmode);
3040 src_addr = gen_reg_rtx (Pmode);
3041 count = gen_reg_rtx (mode);
3042 blocks = gen_reg_rtx (mode);
3044 convert_move (count, len, 1);
3045 emit_cmp_and_jump_insns (count, const0_rtx,
3046 EQ, NULL_RTX, mode, 1, end_label);
3048 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3049 dst = change_address (dst, VOIDmode, dst_addr);
3051 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3053 emit_move_insn (count, temp);
3055 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3057 emit_move_insn (blocks, temp);
3059 expand_start_loop (1);
3060 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
3061 make_tree (type, blocks),
3062 make_tree (type, const0_rtx)));
3064 emit_insn (gen_clrstr_short (dst, GEN_INT (255)));
3065 s390_load_address (dst_addr,
3066 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3068 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3070 emit_move_insn (blocks, temp);
3074 emit_insn (gen_clrstr_short (dst, convert_to_mode (Pmode, count, 1)));
3075 emit_label (end_label);
3079 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3080 and return the result in TARGET. */
3083 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3085 rtx (*gen_result) (rtx) =
3086 GET_MODE (target) == DImode ? gen_cmpint_di : gen_cmpint_si;
3088 op0 = protect_from_queue (op0, 0);
3089 op1 = protect_from_queue (op1, 0);
3090 len = protect_from_queue (len, 0);
3092 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3094 if (INTVAL (len) > 0)
3096 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3097 emit_insn (gen_result (target));
3100 emit_move_insn (target, const0_rtx);
3103 else /* if (TARGET_MVCLE) */
3105 emit_insn (gen_cmpmem_long (op0, op1, convert_to_mode (Pmode, len, 1)));
3106 emit_insn (gen_result (target));
3110 /* Deactivate for now as profile code cannot cope with
3111 CC being live across basic block boundaries. */
3114 rtx addr0, addr1, count, blocks, temp;
3115 rtx end_label = gen_label_rtx ();
3116 enum machine_mode mode;
3119 mode = GET_MODE (len);
3120 if (mode == VOIDmode)
3123 type = lang_hooks.types.type_for_mode (mode, 1);
3127 addr0 = gen_reg_rtx (Pmode);
3128 addr1 = gen_reg_rtx (Pmode);
3129 count = gen_reg_rtx (mode);
3130 blocks = gen_reg_rtx (mode);
3132 convert_move (count, len, 1);
3133 emit_cmp_and_jump_insns (count, const0_rtx,
3134 EQ, NULL_RTX, mode, 1, end_label);
3136 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3137 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3138 op0 = change_address (op0, VOIDmode, addr0);
3139 op1 = change_address (op1, VOIDmode, addr1);
3141 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3143 emit_move_insn (count, temp);
3145 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3147 emit_move_insn (blocks, temp);
3149 expand_start_loop (1);
3150 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
3151 make_tree (type, blocks),
3152 make_tree (type, const0_rtx)));
3154 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
3155 temp = gen_rtx_NE (VOIDmode, gen_rtx_REG (CCSmode, 33), const0_rtx);
3156 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3157 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3158 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3159 emit_jump_insn (temp);
3161 s390_load_address (addr0,
3162 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3163 s390_load_address (addr1,
3164 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3166 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3168 emit_move_insn (blocks, temp);
3172 emit_insn (gen_cmpmem_short (op0, op1,
3173 convert_to_mode (Pmode, count, 1)));
3174 emit_label (end_label);
3176 emit_insn (gen_result (target));
3181 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
3182 We need to emit DTP-relative relocations. */
3185 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
3190 fputs ("\t.long\t", file);
3193 fputs ("\t.quad\t", file);
3198 output_addr_const (file, x);
3199 fputs ("@DTPOFF", file);
3202 /* In the name of slightly smaller debug output, and to cater to
3203 general assembler losage, recognize various UNSPEC sequences
3204 and turn them back into a direct symbol reference. */
3207 s390_delegitimize_address (rtx orig_x)
3211 if (GET_CODE (x) != MEM)
3215 if (GET_CODE (x) == PLUS
3216 && GET_CODE (XEXP (x, 1)) == CONST
3217 && GET_CODE (XEXP (x, 0)) == REG
3218 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
3220 y = XEXP (XEXP (x, 1), 0);
3221 if (GET_CODE (y) == UNSPEC
3222 && XINT (y, 1) == UNSPEC_GOT)
3223 return XVECEXP (y, 0, 0);
3227 if (GET_CODE (x) == CONST)
3230 if (GET_CODE (y) == UNSPEC
3231 && XINT (y, 1) == UNSPEC_GOTENT)
3232 return XVECEXP (y, 0, 0);
3239 /* Output shift count operand OP to stdio stream FILE. */
3242 print_shift_count_operand (FILE *file, rtx op)
3244 HOST_WIDE_INT offset = 0;
3246 /* We can have an integer constant, an address register,
3247 or a sum of the two. */
3248 if (GET_CODE (op) == CONST_INT)
3250 offset = INTVAL (op);
3253 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
3255 offset = INTVAL (XEXP (op, 1));
3258 while (op && GET_CODE (op) == SUBREG)
3259 op = SUBREG_REG (op);
3262 if (op && (GET_CODE (op) != REG
3263 || REGNO (op) >= FIRST_PSEUDO_REGISTER
3264 || REGNO_REG_CLASS (REGNO (op)) != ADDR_REGS))
3267 /* Shift counts are truncated to the low six bits anyway. */
3268 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset & 63);
3270 fprintf (file, "(%s)", reg_names[REGNO (op)]);
3273 /* Locate some local-dynamic symbol still in use by this function
3274 so that we can print its name in local-dynamic base patterns. */
3277 get_some_local_dynamic_name (void)
3281 if (cfun->machine->some_ld_name)
3282 return cfun->machine->some_ld_name;
3284 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
3286 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
3287 return cfun->machine->some_ld_name;
3293 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
3297 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
3299 x = get_pool_constant (x);
3300 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
3303 if (GET_CODE (x) == SYMBOL_REF
3304 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
3306 cfun->machine->some_ld_name = XSTR (x, 0);
3313 /* Output symbolic constant X in assembler syntax to
3314 stdio stream FILE. */
3317 s390_output_symbolic_const (FILE *file, rtx x)
3319 switch (GET_CODE (x))
3324 s390_output_symbolic_const (file, XEXP (x, 0));
3328 s390_output_symbolic_const (file, XEXP (x, 0));
3329 fprintf (file, "+");
3330 s390_output_symbolic_const (file, XEXP (x, 1));
3334 s390_output_symbolic_const (file, XEXP (x, 0));
3335 fprintf (file, "-");
3336 s390_output_symbolic_const (file, XEXP (x, 1));
3343 output_addr_const (file, x);
3347 if (XVECLEN (x, 0) != 1)
3348 output_operand_lossage ("invalid UNSPEC as operand (1)");
3349 switch (XINT (x, 1))
3352 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3353 fprintf (file, "@GOTENT");
3356 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3357 fprintf (file, "@GOT");
3360 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3361 fprintf (file, "@GOTOFF");
3364 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3365 fprintf (file, "@PLT");
3368 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3369 fprintf (file, "@PLTOFF");
3372 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3373 fprintf (file, "@TLSGD");
3376 assemble_name (file, get_some_local_dynamic_name ());
3377 fprintf (file, "@TLSLDM");
3380 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3381 fprintf (file, "@DTPOFF");
3384 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3385 fprintf (file, "@NTPOFF");
3387 case UNSPEC_GOTNTPOFF:
3388 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3389 fprintf (file, "@GOTNTPOFF");
3391 case UNSPEC_INDNTPOFF:
3392 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3393 fprintf (file, "@INDNTPOFF");
3396 output_operand_lossage ("invalid UNSPEC as operand (2)");
3402 fatal_insn ("UNKNOWN in s390_output_symbolic_const !?", x);
3407 /* Output address operand ADDR in assembler syntax to
3408 stdio stream FILE. */
3411 print_operand_address (FILE *file, rtx addr)
3413 struct s390_address ad;
3415 if (!s390_decompose_address (addr, &ad)
3416 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3417 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
3418 output_operand_lossage ("Cannot decompose address.");
3421 s390_output_symbolic_const (file, ad.disp);
3423 fprintf (file, "0");
3425 if (ad.base && ad.indx)
3426 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
3427 reg_names[REGNO (ad.base)]);
3429 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3432 /* Output operand X in assembler syntax to stdio stream FILE.
3433 CODE specified the format flag. The following format flags
3436 'C': print opcode suffix for branch condition.
3437 'D': print opcode suffix for inverse branch condition.
3438 'J': print tls_load/tls_gdcall/tls_ldcall suffix
3439 'O': print only the displacement of a memory reference.
3440 'R': print only the base register of a memory reference.
3441 'N': print the second word of a DImode operand.
3442 'M': print the second word of a TImode operand.
3443 'Y': print shift count operand.
3445 'b': print integer X as if it's an unsigned byte.
3446 'x': print integer X as if it's an unsigned word.
3447 'h': print integer X as if it's a signed word.
3448 'i': print the first nonzero HImode part of X.
3449 'j': print the first HImode part unequal to 0xffff of X. */
3452 print_operand (FILE *file, rtx x, int code)
3457 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
3461 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
3465 if (GET_CODE (x) == SYMBOL_REF)
3467 fprintf (file, "%s", ":tls_load:");
3468 output_addr_const (file, x);
3470 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
3472 fprintf (file, "%s", ":tls_gdcall:");
3473 output_addr_const (file, XVECEXP (x, 0, 0));
3475 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
3477 fprintf (file, "%s", ":tls_ldcall:");
3478 assemble_name (file, get_some_local_dynamic_name ());
3486 struct s390_address ad;
3488 if (GET_CODE (x) != MEM
3489 || !s390_decompose_address (XEXP (x, 0), &ad)
3490 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3495 s390_output_symbolic_const (file, ad.disp);
3497 fprintf (file, "0");
3503 struct s390_address ad;
3505 if (GET_CODE (x) != MEM
3506 || !s390_decompose_address (XEXP (x, 0), &ad)
3507 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3512 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
3514 fprintf (file, "0");
3519 if (GET_CODE (x) == REG)
3520 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3521 else if (GET_CODE (x) == MEM)
3522 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
3528 if (GET_CODE (x) == REG)
3529 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3530 else if (GET_CODE (x) == MEM)
3531 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
3537 print_shift_count_operand (file, x);
3541 switch (GET_CODE (x))
3544 fprintf (file, "%s", reg_names[REGNO (x)]);
3548 output_address (XEXP (x, 0));
3555 s390_output_symbolic_const (file, x);
3560 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
3561 else if (code == 'x')
3562 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
3563 else if (code == 'h')
3564 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
3565 else if (code == 'i')
3566 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3567 s390_extract_part (x, HImode, 0));
3568 else if (code == 'j')
3569 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3570 s390_extract_part (x, HImode, -1));
3572 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3576 if (GET_MODE (x) != VOIDmode)
3579 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
3580 else if (code == 'x')
3581 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
3582 else if (code == 'h')
3583 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
3589 fatal_insn ("UNKNOWN in print_operand !?", x);
3594 /* Target hook for assembling integer objects. We need to define it
3595 here to work a round a bug in some versions of GAS, which couldn't
3596 handle values smaller than INT_MIN when printed in decimal. */
3599 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
3601 if (size == 8 && aligned_p
3602 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
3604 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
3608 return default_assemble_integer (x, size, aligned_p);
3611 /* Returns true if register REGNO is used for forming
3612 a memory address in expression X. */
3615 reg_used_in_mem_p (int regno, rtx x)
3617 enum rtx_code code = GET_CODE (x);
3623 if (refers_to_regno_p (regno, regno+1,
3627 else if (code == SET
3628 && GET_CODE (SET_DEST (x)) == PC)
3630 if (refers_to_regno_p (regno, regno+1,
3635 fmt = GET_RTX_FORMAT (code);
3636 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3639 && reg_used_in_mem_p (regno, XEXP (x, i)))
3642 else if (fmt[i] == 'E')
3643 for (j = 0; j < XVECLEN (x, i); j++)
3644 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
3650 /* Returns true if expression DEP_RTX sets an address register
3651 used by instruction INSN to address memory. */
3654 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
3658 if (GET_CODE (dep_rtx) == INSN)
3659 dep_rtx = PATTERN (dep_rtx);
3661 if (GET_CODE (dep_rtx) == SET)
3663 target = SET_DEST (dep_rtx);
3664 if (GET_CODE (target) == STRICT_LOW_PART)
3665 target = XEXP (target, 0);
3666 while (GET_CODE (target) == SUBREG)
3667 target = SUBREG_REG (target);
3669 if (GET_CODE (target) == REG)
3671 int regno = REGNO (target);
3673 if (s390_safe_attr_type (insn) == TYPE_LA)
3675 pat = PATTERN (insn);
3676 if (GET_CODE (pat) == PARALLEL)
3678 if (XVECLEN (pat, 0) != 2)
3680 pat = XVECEXP (pat, 0, 0);
3682 if (GET_CODE (pat) == SET)
3683 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
3687 else if (get_attr_atype (insn) == ATYPE_AGEN)
3688 return reg_used_in_mem_p (regno, PATTERN (insn));
3694 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
3697 s390_agen_dep_p (rtx dep_insn, rtx insn)
3699 rtx dep_rtx = PATTERN (dep_insn);
3702 if (GET_CODE (dep_rtx) == SET
3703 && addr_generation_dependency_p (dep_rtx, insn))
3705 else if (GET_CODE (dep_rtx) == PARALLEL)
3707 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3709 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3716 /* Return the modified cost of the dependency of instruction INSN
3717 on instruction DEP_INSN through the link LINK. COST is the
3718 default cost of that dependency.
3720 Data dependencies are all handled without delay. However, if a
3721 register is modified and subsequently used as base or index
3722 register of a memory reference, at least 4 cycles need to pass
3723 between setting and using the register to avoid pipeline stalls.
3724 An exception is the LA instruction. An address generated by LA can
3725 be used by introducing only a one cycle stall on the pipeline. */
3728 s390_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
3733 /* If the dependence is an anti-dependence, there is no cost. For an
3734 output dependence, there is sometimes a cost, but it doesn't seem
3735 worth handling those few cases. */
3737 if (REG_NOTE_KIND (link) != 0)
3740 /* If we can't recognize the insns, we can't really do anything. */
3741 if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
3744 /* DFA based scheduling checks address dependency in md file. */
3745 if (s390_use_dfa_pipeline_interface ())
3747 /* Operand forward in case of lr, load and la. */
3748 if (s390_tune == PROCESSOR_2084_Z990
3750 && (s390_safe_attr_type (dep_insn) == TYPE_LA
3751 || s390_safe_attr_type (dep_insn) == TYPE_LR
3752 || s390_safe_attr_type (dep_insn) == TYPE_LOAD))
3757 dep_rtx = PATTERN (dep_insn);
3759 if (GET_CODE (dep_rtx) == SET
3760 && addr_generation_dependency_p (dep_rtx, insn))
3761 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3762 else if (GET_CODE (dep_rtx) == PARALLEL)
3764 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3766 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3767 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3773 /* A C statement (sans semicolon) to update the integer scheduling priority
3774 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
3775 reduce the priority to execute INSN later. Do not define this macro if
3776 you do not need to adjust the scheduling priorities of insns.
3778 A STD instruction should be scheduled earlier,
3779 in order to use the bypass. */
3782 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
3784 if (! INSN_P (insn))
3787 if (s390_tune != PROCESSOR_2084_Z990)
3790 switch (s390_safe_attr_type (insn))
3794 priority = priority << 3;
3797 priority = priority << 1;
3805 /* The number of instructions that can be issued per cycle. */
3808 s390_issue_rate (void)
3810 if (s390_tune == PROCESSOR_2084_Z990)
3815 /* If the following function returns TRUE, we will use the the DFA
3819 s390_use_dfa_pipeline_interface (void)
3821 if (s390_tune == PROCESSOR_2064_Z900
3822 || s390_tune == PROCESSOR_2084_Z990)
3829 s390_first_cycle_multipass_dfa_lookahead (void)
3831 return s390_use_dfa_pipeline_interface () ? 4 : 0;
3834 /* Called after issuing each insn.
3835 Triggers default sort algorithm to better slot instructions. */
3838 s390_sched_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
3839 int sched_verbose ATTRIBUTE_UNUSED,
3840 rtx *ready ATTRIBUTE_UNUSED,
3841 int *pn_ready ATTRIBUTE_UNUSED,
3842 int clock_var ATTRIBUTE_UNUSED)
3844 return s390_issue_rate();
3848 /* Split all branches that exceed the maximum distance.
3849 Returns true if this created a new literal pool entry. */
3852 s390_split_branches (void)
3854 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
3855 int new_literal = 0;
3856 rtx insn, pat, tmp, target;
3859 /* We need correct insn addresses. */
3861 shorten_branches (get_insns ());
3863 /* Find all branches that exceed 64KB, and split them. */
3865 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3867 if (GET_CODE (insn) != JUMP_INSN)
3870 pat = PATTERN (insn);
3871 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
3872 pat = XVECEXP (pat, 0, 0);
3873 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
3876 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
3878 label = &SET_SRC (pat);
3880 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
3882 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
3883 label = &XEXP (SET_SRC (pat), 1);
3884 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
3885 label = &XEXP (SET_SRC (pat), 2);
3892 if (get_attr_length (insn) <= 4)
3895 /* We are going to use the return register as scratch register,
3896 make sure it will be saved/restored by the prologue/epilogue. */
3897 cfun->machine->save_return_addr_p = 1;
3902 tmp = force_const_mem (Pmode, *label);
3903 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
3904 INSN_ADDRESSES_NEW (tmp, -1);
3911 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
3912 UNSPEC_LTREL_OFFSET);
3913 target = gen_rtx_CONST (Pmode, target);
3914 target = force_const_mem (Pmode, target);
3915 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
3916 INSN_ADDRESSES_NEW (tmp, -1);
3918 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (target, 0)),
3920 target = gen_rtx_PLUS (Pmode, temp_reg, target);
3923 if (!validate_change (insn, label, target, 0))
3931 /* Find a literal pool symbol referenced in RTX X, and store
3932 it at REF. Will abort if X contains references to more than
3933 one such pool symbol; multiple references to the same symbol
3934 are allowed, however.
3936 The rtx pointed to by REF must be initialized to NULL_RTX
3937 by the caller before calling this routine. */
3940 find_constant_pool_ref (rtx x, rtx *ref)
3945 /* Ignore LTREL_BASE references. */
3946 if (GET_CODE (x) == UNSPEC
3947 && XINT (x, 1) == UNSPEC_LTREL_BASE)
3949 /* Likewise POOL_ENTRY insns. */
3950 if (GET_CODE (x) == UNSPEC_VOLATILE
3951 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
3954 if (GET_CODE (x) == SYMBOL_REF
3955 && CONSTANT_POOL_ADDRESS_P (x))
3957 if (*ref == NULL_RTX)
3963 fmt = GET_RTX_FORMAT (GET_CODE (x));
3964 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
3968 find_constant_pool_ref (XEXP (x, i), ref);
3970 else if (fmt[i] == 'E')
3972 for (j = 0; j < XVECLEN (x, i); j++)
3973 find_constant_pool_ref (XVECEXP (x, i, j), ref);
3978 /* Replace every reference to the literal pool symbol REF
3979 in X by the address ADDR. Fix up MEMs as required. */
3982 replace_constant_pool_ref (rtx *x, rtx ref, rtx addr)
3990 /* Literal pool references can only occur inside a MEM ... */
3991 if (GET_CODE (*x) == MEM)
3993 rtx memref = XEXP (*x, 0);
3997 *x = replace_equiv_address (*x, addr);
4001 if (GET_CODE (memref) == CONST
4002 && GET_CODE (XEXP (memref, 0)) == PLUS
4003 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
4004 && XEXP (XEXP (memref, 0), 0) == ref)
4006 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
4007 *x = replace_equiv_address (*x, plus_constant (addr, off));
4012 /* ... or a load-address type pattern. */
4013 if (GET_CODE (*x) == SET)
4015 rtx addrref = SET_SRC (*x);
4019 SET_SRC (*x) = addr;
4023 if (GET_CODE (addrref) == CONST
4024 && GET_CODE (XEXP (addrref, 0)) == PLUS
4025 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
4026 && XEXP (XEXP (addrref, 0), 0) == ref)
4028 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
4029 SET_SRC (*x) = plus_constant (addr, off);
4034 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4035 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4039 replace_constant_pool_ref (&XEXP (*x, i), ref, addr);
4041 else if (fmt[i] == 'E')
4043 for (j = 0; j < XVECLEN (*x, i); j++)
4044 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, addr);
4049 /* Check whether X contains an UNSPEC_LTREL_BASE.
4050 Return its constant pool symbol if found, NULL_RTX otherwise. */
4053 find_ltrel_base (rtx x)
4058 if (GET_CODE (x) == UNSPEC
4059 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4060 return XVECEXP (x, 0, 0);
4062 fmt = GET_RTX_FORMAT (GET_CODE (x));
4063 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4067 rtx fnd = find_ltrel_base (XEXP (x, i));
4071 else if (fmt[i] == 'E')
4073 for (j = 0; j < XVECLEN (x, i); j++)
4075 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4085 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with BASE. */
4088 replace_ltrel_base (rtx *x, rtx base)
4093 if (GET_CODE (*x) == UNSPEC
4094 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4100 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4101 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4105 replace_ltrel_base (&XEXP (*x, i), base);
4107 else if (fmt[i] == 'E')
4109 for (j = 0; j < XVECLEN (*x, i); j++)
4110 replace_ltrel_base (&XVECEXP (*x, i, j), base);
4116 /* We keep a list of constants which we have to add to internal
4117 constant tables in the middle of large functions. */
4119 #define NR_C_MODES 7
4120 enum machine_mode constant_modes[NR_C_MODES] =
4131 struct constant *next;
4136 struct constant_pool
4138 struct constant_pool *next;
4143 struct constant *constants[NR_C_MODES];
4148 static struct constant_pool * s390_mainpool_start (void);
4149 static void s390_mainpool_finish (struct constant_pool *, rtx base_reg);
4150 static void s390_mainpool_cancel (struct constant_pool *);
4152 static struct constant_pool * s390_chunkify_start (rtx base_reg);
4153 static void s390_chunkify_finish (struct constant_pool *, rtx base_reg);
4154 static void s390_chunkify_cancel (struct constant_pool *);
4156 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4157 static void s390_end_pool (struct constant_pool *, rtx);
4158 static void s390_add_pool_insn (struct constant_pool *, rtx);
4159 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4160 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4161 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4162 static rtx s390_dump_pool (struct constant_pool *, bool);
4163 static struct constant_pool *s390_alloc_pool (void);
4164 static void s390_free_pool (struct constant_pool *);
4166 /* Create new constant pool covering instructions starting at INSN
4167 and chain it to the end of POOL_LIST. */
4169 static struct constant_pool *
4170 s390_start_pool (struct constant_pool **pool_list, rtx insn)
4172 struct constant_pool *pool, **prev;
4174 pool = s390_alloc_pool ();
4175 pool->first_insn = insn;
4177 for (prev = pool_list; *prev; prev = &(*prev)->next)
4184 /* End range of instructions covered by POOL at INSN and emit
4185 placeholder insn representing the pool. */
4188 s390_end_pool (struct constant_pool *pool, rtx insn)
4190 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
4193 insn = get_last_insn ();
4195 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
4196 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4199 /* Add INSN to the list of insns covered by POOL. */
4202 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
4204 bitmap_set_bit (pool->insns, INSN_UID (insn));
4207 /* Return pool out of POOL_LIST that covers INSN. */
4209 static struct constant_pool *
4210 s390_find_pool (struct constant_pool *pool_list, rtx insn)
4212 struct constant_pool *pool;
4214 for (pool = pool_list; pool; pool = pool->next)
4215 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
4221 /* Add constant VAL of mode MODE to the constant pool POOL. */
4224 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
4229 for (i = 0; i < NR_C_MODES; i++)
4230 if (constant_modes[i] == mode)
4232 if (i == NR_C_MODES)
4235 for (c = pool->constants[i]; c != NULL; c = c->next)
4236 if (rtx_equal_p (val, c->value))
4241 c = (struct constant *) xmalloc (sizeof *c);
4243 c->label = gen_label_rtx ();
4244 c->next = pool->constants[i];
4245 pool->constants[i] = c;
4246 pool->size += GET_MODE_SIZE (mode);
4250 /* Find constant VAL of mode MODE in the constant pool POOL.
4251 Return an RTX describing the distance from the start of
4252 the pool to the location of the new constant. */
4255 s390_find_constant (struct constant_pool *pool, rtx val,
4256 enum machine_mode mode)
4262 for (i = 0; i < NR_C_MODES; i++)
4263 if (constant_modes[i] == mode)
4265 if (i == NR_C_MODES)
4268 for (c = pool->constants[i]; c != NULL; c = c->next)
4269 if (rtx_equal_p (val, c->value))
4275 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4276 gen_rtx_LABEL_REF (Pmode, pool->label));
4277 offset = gen_rtx_CONST (Pmode, offset);
4281 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
4282 do not emit the pool base label. */
4285 s390_dump_pool (struct constant_pool *pool, bool remote_label)
4291 /* Pool start insn switches to proper section
4292 and guarantees necessary alignment. */
4293 if (TARGET_CPU_ZARCH)
4294 insn = emit_insn_after (gen_pool_start_64 (), pool->pool_insn);
4296 insn = emit_insn_after (gen_pool_start_31 (), pool->pool_insn);
4297 INSN_ADDRESSES_NEW (insn, -1);
4301 insn = emit_label_after (pool->label, insn);
4302 INSN_ADDRESSES_NEW (insn, -1);
4305 /* Dump constants in descending alignment requirement order,
4306 ensuring proper alignment for every constant. */
4307 for (i = 0; i < NR_C_MODES; i++)
4308 for (c = pool->constants[i]; c; c = c->next)
4310 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
4311 rtx value = c->value;
4312 if (GET_CODE (value) == CONST
4313 && GET_CODE (XEXP (value, 0)) == UNSPEC
4314 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
4315 && XVECLEN (XEXP (value, 0), 0) == 1)
4317 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
4318 gen_rtx_LABEL_REF (VOIDmode, pool->label));
4319 value = gen_rtx_CONST (VOIDmode, value);
4322 insn = emit_label_after (c->label, insn);
4323 INSN_ADDRESSES_NEW (insn, -1);
4325 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
4326 gen_rtvec (1, value),
4327 UNSPECV_POOL_ENTRY);
4328 insn = emit_insn_after (value, insn);
4329 INSN_ADDRESSES_NEW (insn, -1);
4332 /* Pool end insn switches back to previous section
4333 and guarantees necessary alignment. */
4334 if (TARGET_CPU_ZARCH)
4335 insn = emit_insn_after (gen_pool_end_64 (), insn);
4337 insn = emit_insn_after (gen_pool_end_31 (), insn);
4338 INSN_ADDRESSES_NEW (insn, -1);
4340 insn = emit_barrier_after (insn);
4341 INSN_ADDRESSES_NEW (insn, -1);
4343 /* Remove placeholder insn. */
4344 remove_insn (pool->pool_insn);
4349 /* Allocate new constant_pool structure. */
4351 static struct constant_pool *
4352 s390_alloc_pool (void)
4354 struct constant_pool *pool;
4357 pool = (struct constant_pool *) xmalloc (sizeof *pool);
4359 for (i = 0; i < NR_C_MODES; i++)
4360 pool->constants[i] = NULL;
4362 pool->label = gen_label_rtx ();
4363 pool->first_insn = NULL_RTX;
4364 pool->pool_insn = NULL_RTX;
4365 pool->insns = BITMAP_XMALLOC ();
4371 /* Free all memory used by POOL. */
4374 s390_free_pool (struct constant_pool *pool)
4378 for (i = 0; i < NR_C_MODES; i++)
4380 struct constant *c = pool->constants[i];
4383 struct constant *next = c->next;
4389 BITMAP_XFREE (pool->insns);
4394 /* Collect main literal pool. Return NULL on overflow. */
4396 static struct constant_pool *
4397 s390_mainpool_start (void)
4399 struct constant_pool *pool;
4402 pool = s390_alloc_pool ();
4404 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4406 if (GET_CODE (insn) == INSN
4407 && GET_CODE (PATTERN (insn)) == UNSPEC_VOLATILE
4408 && XINT (PATTERN (insn), 1) == UNSPECV_MAIN_POOL)
4410 if (pool->pool_insn)
4412 pool->pool_insn = insn;
4415 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4417 rtx pool_ref = NULL_RTX;
4418 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4421 rtx constant = get_pool_constant (pool_ref);
4422 enum machine_mode mode = get_pool_mode (pool_ref);
4423 s390_add_constant (pool, constant, mode);
4428 if (!pool->pool_insn)
4431 if (pool->size >= 4096)
4433 s390_free_pool (pool);
4440 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4441 Modify the current function to output the pool constants as well as
4442 the pool register setup instruction. BASE_REG is the register to
4443 be used as pool base register. */
4446 s390_mainpool_finish (struct constant_pool *pool, rtx base_reg)
4450 /* If the pool is empty, we're done. */
4451 if (pool->size == 0)
4453 remove_insn (pool->pool_insn);
4454 s390_free_pool (pool);
4458 /* We need correct insn addresses. */
4459 shorten_branches (get_insns ());
4461 /* On zSeries, we use a LARL to load the pool register. The pool is
4462 located in the .rodata section, so we emit it after the function. */
4463 if (TARGET_CPU_ZARCH)
4465 insn = gen_main_base_64 (base_reg, pool->label);
4466 insn = emit_insn_after (insn, pool->pool_insn);
4467 INSN_ADDRESSES_NEW (insn, -1);
4468 remove_insn (pool->pool_insn);
4470 insn = get_last_insn ();
4471 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4472 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4474 s390_dump_pool (pool, 0);
4477 /* On S/390, if the total size of the function's code plus literal pool
4478 does not exceed 4096 bytes, we use BASR to set up a function base
4479 pointer, and emit the literal pool at the end of the function. */
4480 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
4481 + pool->size + 8 /* alignment slop */ < 4096)
4483 insn = gen_main_base_31_small (base_reg, pool->label);
4484 insn = emit_insn_after (insn, pool->pool_insn);
4485 INSN_ADDRESSES_NEW (insn, -1);
4486 remove_insn (pool->pool_insn);
4488 insn = emit_label_after (pool->label, insn);
4489 INSN_ADDRESSES_NEW (insn, -1);
4491 insn = get_last_insn ();
4492 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4493 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4495 s390_dump_pool (pool, 1);
4498 /* Otherwise, we emit an inline literal pool and use BASR to branch
4499 over it, setting up the pool register at the same time. */
4502 rtx pool_end = gen_label_rtx ();
4504 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
4505 insn = emit_insn_after (insn, pool->pool_insn);
4506 INSN_ADDRESSES_NEW (insn, -1);
4507 remove_insn (pool->pool_insn);
4509 insn = emit_label_after (pool->label, insn);
4510 INSN_ADDRESSES_NEW (insn, -1);
4512 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4513 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4515 insn = emit_label_after (pool_end, pool->pool_insn);
4516 INSN_ADDRESSES_NEW (insn, -1);
4518 s390_dump_pool (pool, 1);
4522 /* Replace all literal pool references. */
4524 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4527 replace_ltrel_base (&PATTERN (insn), base_reg);
4529 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4531 rtx addr, pool_ref = NULL_RTX;
4532 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4535 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
4536 get_pool_mode (pool_ref));
4537 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4538 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4539 INSN_CODE (insn) = -1;
4545 /* Free the pool. */
4546 s390_free_pool (pool);
4549 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4550 We have decided we cannot use this pool, so revert all changes
4551 to the current function that were done by s390_mainpool_start. */
4553 s390_mainpool_cancel (struct constant_pool *pool)
4555 /* We didn't actually change the instruction stream, so simply
4556 free the pool memory. */
4557 s390_free_pool (pool);
4561 /* Chunkify the literal pool. BASE_REG is to be used as pool
4564 #define S390_POOL_CHUNK_MIN 0xc00
4565 #define S390_POOL_CHUNK_MAX 0xe00
4567 static struct constant_pool *
4568 s390_chunkify_start (rtx base_reg)
4570 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
4573 rtx pending_ltrel = NULL_RTX;
4576 rtx (*gen_reload_base) (rtx, rtx) =
4577 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
4580 /* We need correct insn addresses. */
4582 shorten_branches (get_insns ());
4584 /* Scan all insns and move literals to pool chunks. */
4586 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4588 /* Check for pending LTREL_BASE. */
4591 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
4594 if (ltrel_base == pending_ltrel)
4595 pending_ltrel = NULL_RTX;
4601 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4603 rtx pool_ref = NULL_RTX;
4604 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4607 rtx constant = get_pool_constant (pool_ref);
4608 enum machine_mode mode = get_pool_mode (pool_ref);
4611 curr_pool = s390_start_pool (&pool_list, insn);
4613 s390_add_constant (curr_pool, constant, mode);
4614 s390_add_pool_insn (curr_pool, insn);
4616 /* Don't split the pool chunk between a LTREL_OFFSET load
4617 and the corresponding LTREL_BASE. */
4618 if (GET_CODE (constant) == CONST
4619 && GET_CODE (XEXP (constant, 0)) == UNSPEC
4620 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
4624 pending_ltrel = pool_ref;
4629 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
4632 s390_add_pool_insn (curr_pool, insn);
4633 /* An LTREL_BASE must follow within the same basic block. */
4639 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
4640 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
4643 if (TARGET_CPU_ZARCH)
4645 if (curr_pool->size < S390_POOL_CHUNK_MAX)
4648 s390_end_pool (curr_pool, NULL_RTX);
4653 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
4654 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
4657 /* We will later have to insert base register reload insns.
4658 Those will have an effect on code size, which we need to
4659 consider here. This calculation makes rather pessimistic
4660 worst-case assumptions. */
4661 if (GET_CODE (insn) == CODE_LABEL)
4664 if (chunk_size < S390_POOL_CHUNK_MIN
4665 && curr_pool->size < S390_POOL_CHUNK_MIN)
4668 /* Pool chunks can only be inserted after BARRIERs ... */
4669 if (GET_CODE (insn) == BARRIER)
4671 s390_end_pool (curr_pool, insn);
4676 /* ... so if we don't find one in time, create one. */
4677 else if ((chunk_size > S390_POOL_CHUNK_MAX
4678 || curr_pool->size > S390_POOL_CHUNK_MAX))
4680 rtx label, jump, barrier;
4682 /* We can insert the barrier only after a 'real' insn. */
4683 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
4685 if (get_attr_length (insn) == 0)
4688 /* Don't separate LTREL_BASE from the corresponding
4689 LTREL_OFFSET load. */
4693 label = gen_label_rtx ();
4694 jump = emit_jump_insn_after (gen_jump (label), insn);
4695 barrier = emit_barrier_after (jump);
4696 insn = emit_label_after (label, barrier);
4697 JUMP_LABEL (jump) = label;
4698 LABEL_NUSES (label) = 1;
4700 INSN_ADDRESSES_NEW (jump, -1);
4701 INSN_ADDRESSES_NEW (barrier, -1);
4702 INSN_ADDRESSES_NEW (insn, -1);
4704 s390_end_pool (curr_pool, barrier);
4712 s390_end_pool (curr_pool, NULL_RTX);
4717 /* Find all labels that are branched into
4718 from an insn belonging to a different chunk. */
4720 far_labels = BITMAP_XMALLOC ();
4722 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4724 /* Labels marked with LABEL_PRESERVE_P can be target
4725 of non-local jumps, so we have to mark them.
4726 The same holds for named labels.
4728 Don't do that, however, if it is the label before
4731 if (GET_CODE (insn) == CODE_LABEL
4732 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
4734 rtx vec_insn = next_real_insn (insn);
4735 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4736 PATTERN (vec_insn) : NULL_RTX;
4738 || !(GET_CODE (vec_pat) == ADDR_VEC
4739 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4740 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
4743 /* If we have a direct jump (conditional or unconditional)
4744 or a casesi jump, check all potential targets. */
4745 else if (GET_CODE (insn) == JUMP_INSN)
4747 rtx pat = PATTERN (insn);
4748 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4749 pat = XVECEXP (pat, 0, 0);
4751 if (GET_CODE (pat) == SET)
4753 rtx label = JUMP_LABEL (insn);
4756 if (s390_find_pool (pool_list, label)
4757 != s390_find_pool (pool_list, insn))
4758 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4761 else if (GET_CODE (pat) == PARALLEL
4762 && XVECLEN (pat, 0) == 2
4763 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
4764 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
4765 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
4767 /* Find the jump table used by this casesi jump. */
4768 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
4769 rtx vec_insn = next_real_insn (vec_label);
4770 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4771 PATTERN (vec_insn) : NULL_RTX;
4773 && (GET_CODE (vec_pat) == ADDR_VEC
4774 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4776 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
4778 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
4780 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
4782 if (s390_find_pool (pool_list, label)
4783 != s390_find_pool (pool_list, insn))
4784 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4791 /* Insert base register reload insns before every pool. */
4793 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4795 rtx new_insn = gen_reload_base (base_reg, curr_pool->label);
4796 rtx insn = curr_pool->first_insn;
4797 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
4800 /* Insert base register reload insns at every far label. */
4802 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4803 if (GET_CODE (insn) == CODE_LABEL
4804 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
4806 struct constant_pool *pool = s390_find_pool (pool_list, insn);
4809 rtx new_insn = gen_reload_base (base_reg, pool->label);
4810 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
4815 BITMAP_XFREE (far_labels);
4818 /* Recompute insn addresses. */
4820 init_insn_lengths ();
4821 shorten_branches (get_insns ());
4826 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4827 After we have decided to use this list, finish implementing
4828 all changes to the current function as required. BASE_REG is
4829 to be used as pool base register. */
4832 s390_chunkify_finish (struct constant_pool *pool_list, rtx base_reg)
4834 struct constant_pool *curr_pool = NULL;
4838 /* Replace all literal pool references. */
4840 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4843 replace_ltrel_base (&PATTERN (insn), base_reg);
4845 curr_pool = s390_find_pool (pool_list, insn);
4849 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4851 rtx addr, pool_ref = NULL_RTX;
4852 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4855 addr = s390_find_constant (curr_pool, get_pool_constant (pool_ref),
4856 get_pool_mode (pool_ref));
4857 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4858 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4859 INSN_CODE (insn) = -1;
4864 /* Dump out all literal pools. */
4866 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4867 s390_dump_pool (curr_pool, 0);
4869 /* Free pool list. */
4873 struct constant_pool *next = pool_list->next;
4874 s390_free_pool (pool_list);
4879 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4880 We have decided we cannot use this list, so revert all changes
4881 to the current function that were done by s390_chunkify_start. */
4884 s390_chunkify_cancel (struct constant_pool *pool_list)
4886 struct constant_pool *curr_pool = NULL;
4889 /* Remove all pool placeholder insns. */
4891 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4893 /* Did we insert an extra barrier? Remove it. */
4894 rtx barrier = PREV_INSN (curr_pool->pool_insn);
4895 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
4896 rtx label = NEXT_INSN (curr_pool->pool_insn);
4898 if (jump && GET_CODE (jump) == JUMP_INSN
4899 && barrier && GET_CODE (barrier) == BARRIER
4900 && label && GET_CODE (label) == CODE_LABEL
4901 && GET_CODE (PATTERN (jump)) == SET
4902 && SET_DEST (PATTERN (jump)) == pc_rtx
4903 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
4904 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
4907 remove_insn (barrier);
4908 remove_insn (label);
4911 remove_insn (curr_pool->pool_insn);
4914 /* Remove all base register reload insns. */
4916 for (insn = get_insns (); insn; )
4918 rtx next_insn = NEXT_INSN (insn);
4920 if (GET_CODE (insn) == INSN
4921 && GET_CODE (PATTERN (insn)) == SET
4922 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
4923 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
4929 /* Free pool list. */
4933 struct constant_pool *next = pool_list->next;
4934 s390_free_pool (pool_list);
4940 /* Output to FILE the constant pool entry EXP in mode MODE
4941 with alignment ALIGN. */
4944 s390_output_pool_entry (FILE *file, rtx exp, enum machine_mode mode,
4949 switch (GET_MODE_CLASS (mode))
4952 if (GET_CODE (exp) != CONST_DOUBLE)
4955 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
4956 assemble_real (r, mode, align);
4960 if (GET_CODE (exp) == CONST
4961 || GET_CODE (exp) == SYMBOL_REF
4962 || GET_CODE (exp) == LABEL_REF)
4964 fputs (integer_asm_op (GET_MODE_SIZE (mode), TRUE), file);
4965 s390_output_symbolic_const (file, exp);
4970 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
4980 /* Rework the prolog/epilog to avoid saving/restoring
4981 registers unnecessarily. BASE_USED specifies whether
4982 the literal pool base register needs to be saved. */
4985 s390_optimize_prolog (bool base_used)
4987 int save_first, save_last, restore_first, restore_last;
4989 rtx insn, new_insn, next_insn;
4991 /* Recompute regs_ever_live data for special registers. */
4992 regs_ever_live[BASE_REGISTER] = base_used;
4993 regs_ever_live[RETURN_REGNUM] = cfun->machine->save_return_addr_p;
4994 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
4997 /* Find first and last gpr to be saved. */
4999 for (i = 6; i < 16; i++)
5000 if (regs_ever_live[i])
5002 || i == STACK_POINTER_REGNUM
5003 || i == RETURN_REGNUM
5004 || i == BASE_REGISTER
5005 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5008 for (j = 15; j > i; j--)
5009 if (regs_ever_live[j])
5011 || j == STACK_POINTER_REGNUM
5012 || j == RETURN_REGNUM
5013 || j == BASE_REGISTER
5014 || (flag_pic && j == (int)PIC_OFFSET_TABLE_REGNUM))
5019 /* Nothing to save/restore. */
5020 save_first = restore_first = -1;
5021 save_last = restore_last = -1;
5025 /* Save/restore from i to j. */
5026 save_first = restore_first = i;
5027 save_last = restore_last = j;
5030 /* Varargs functions need to save gprs 2 to 6. */
5031 if (current_function_stdarg)
5039 /* If all special registers are in fact used, there's nothing we
5040 can do, so no point in walking the insn list. */
5041 if (i <= BASE_REGISTER && j >= BASE_REGISTER
5042 && (TARGET_CPU_ZARCH || (i <= RETURN_REGNUM && j >= RETURN_REGNUM)))
5046 /* Search for prolog/epilog insns and replace them. */
5048 for (insn = get_insns (); insn; insn = next_insn)
5050 int first, last, off;
5051 rtx set, base, offset;
5053 next_insn = NEXT_INSN (insn);
5055 if (GET_CODE (insn) != INSN)
5058 if (GET_CODE (PATTERN (insn)) == PARALLEL
5059 && store_multiple_operation (PATTERN (insn), VOIDmode))
5061 set = XVECEXP (PATTERN (insn), 0, 0);
5062 first = REGNO (SET_SRC (set));
5063 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5064 offset = const0_rtx;
5065 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5066 off = INTVAL (offset) - first * UNITS_PER_WORD;
5068 if (GET_CODE (base) != REG || off < 0)
5070 if (first > BASE_REGISTER || last < BASE_REGISTER)
5073 if (save_first != -1)
5075 new_insn = save_gprs (base, off, save_first, save_last);
5076 new_insn = emit_insn_before (new_insn, insn);
5077 INSN_ADDRESSES_NEW (new_insn, -1);
5084 if (GET_CODE (PATTERN (insn)) == SET
5085 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
5086 && REGNO (SET_SRC (PATTERN (insn))) == BASE_REGISTER
5087 && GET_CODE (SET_DEST (PATTERN (insn))) == MEM)
5089 set = PATTERN (insn);
5090 offset = const0_rtx;
5091 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5092 off = INTVAL (offset) - BASE_REGISTER * UNITS_PER_WORD;
5094 if (GET_CODE (base) != REG || off < 0)
5097 if (save_first != -1)
5099 new_insn = save_gprs (base, off, save_first, save_last);
5100 new_insn = emit_insn_before (new_insn, insn);
5101 INSN_ADDRESSES_NEW (new_insn, -1);
5108 if (GET_CODE (PATTERN (insn)) == PARALLEL
5109 && load_multiple_operation (PATTERN (insn), VOIDmode))
5111 set = XVECEXP (PATTERN (insn), 0, 0);
5112 first = REGNO (SET_DEST (set));
5113 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5114 offset = const0_rtx;
5115 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5116 off = INTVAL (offset) - first * UNITS_PER_WORD;
5118 if (GET_CODE (base) != REG || off < 0)
5120 if (first > BASE_REGISTER || last < BASE_REGISTER)
5123 if (restore_first != -1)
5125 new_insn = restore_gprs (base, off, restore_first, restore_last);
5126 new_insn = emit_insn_before (new_insn, insn);
5127 INSN_ADDRESSES_NEW (new_insn, -1);
5134 if (GET_CODE (PATTERN (insn)) == SET
5135 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
5136 && REGNO (SET_DEST (PATTERN (insn))) == BASE_REGISTER
5137 && GET_CODE (SET_SRC (PATTERN (insn))) == MEM)
5139 set = PATTERN (insn);
5140 offset = const0_rtx;
5141 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5142 off = INTVAL (offset) - BASE_REGISTER * UNITS_PER_WORD;
5144 if (GET_CODE (base) != REG || off < 0)
5147 if (restore_first != -1)
5149 new_insn = restore_gprs (base, off, restore_first, restore_last);
5150 new_insn = emit_insn_before (new_insn, insn);
5151 INSN_ADDRESSES_NEW (new_insn, -1);
5160 /* Perform machine-dependent processing. */
5165 rtx base_reg = gen_rtx_REG (Pmode, BASE_REGISTER);
5166 bool base_used = false;
5167 bool pool_overflow = false;
5169 /* Make sure all splits have been performed; splits after
5170 machine_dependent_reorg might confuse insn length counts. */
5171 split_all_insns_noflow ();
5174 /* In small leaf functions, try to use an unused call-clobbered
5175 register as base register to avoid save/restore overhead. */
5176 if (current_function_is_leaf && !regs_ever_live[5])
5177 base_reg = gen_rtx_REG (Pmode, 5);
5180 /* Install the main literal pool and the associated base
5181 register load insns.
5183 In addition, there are two problematic situations we need
5186 - the literal pool might be > 4096 bytes in size, so that
5187 some of its elements cannot be directly accessed
5189 - a branch target might be > 64K away from the branch, so that
5190 it is not possible to use a PC-relative instruction.
5192 To fix those, we split the single literal pool into multiple
5193 pool chunks, reloading the pool base register at various
5194 points throughout the function to ensure it always points to
5195 the pool chunk the following code expects, and / or replace
5196 PC-relative branches by absolute branches.
5198 However, the two problems are interdependent: splitting the
5199 literal pool can move a branch further away from its target,
5200 causing the 64K limit to overflow, and on the other hand,
5201 replacing a PC-relative branch by an absolute branch means
5202 we need to put the branch target address into the literal
5203 pool, possibly causing it to overflow.
5205 So, we loop trying to fix up both problems until we manage
5206 to satisfy both conditions at the same time. Note that the
5207 loop is guaranteed to terminate as every pass of the loop
5208 strictly decreases the total number of PC-relative branches
5209 in the function. (This is not completely true as there
5210 might be branch-over-pool insns introduced by chunkify_start.
5211 Those never need to be split however.) */
5215 struct constant_pool *pool = NULL;
5217 /* Collect the literal pool. */
5220 pool = s390_mainpool_start ();
5222 pool_overflow = true;
5225 /* If literal pool overflowed, start to chunkify it. */
5227 pool = s390_chunkify_start (base_reg);
5229 /* Split out-of-range branches. If this has created new
5230 literal pool entries, cancel current chunk list and
5231 recompute it. zSeries machines have large branch
5232 instructions, so we never need to split a branch. */
5233 if (!TARGET_CPU_ZARCH && s390_split_branches ())
5236 s390_chunkify_cancel (pool);
5238 s390_mainpool_cancel (pool);
5243 /* If we made it up to here, both conditions are satisfied.
5244 Finish up literal pool related changes. */
5245 if ((pool_overflow || pool->size > 0)
5246 && REGNO (base_reg) == BASE_REGISTER)
5250 s390_chunkify_finish (pool, base_reg);
5252 s390_mainpool_finish (pool, base_reg);
5257 s390_optimize_prolog (base_used);
5261 /* Return an RTL expression representing the value of the return address
5262 for the frame COUNT steps up from the current frame. FRAME is the
5263 frame pointer of that frame. */
5266 s390_return_addr_rtx (int count, rtx frame)
5270 /* For the current frame, we need to make sure the initial
5271 value of RETURN_REGNUM is actually saved. */
5274 cfun->machine->save_return_addr_p = true;
5276 /* To retrieve the return address we read the stack slot where the
5277 corresponding RETURN_REGNUM value was saved. */
5279 addr = plus_constant (frame, RETURN_REGNUM * UNITS_PER_WORD);
5280 addr = memory_address (Pmode, addr);
5281 return gen_rtx_MEM (Pmode, addr);
5284 /* Find first call clobbered register unsused in a function.
5285 This could be used as base register in a leaf function
5286 or for holding the return address before epilogue. */
5289 find_unused_clobbered_reg (void)
5292 for (i = 0; i < 6; i++)
5293 if (!regs_ever_live[i])
5298 /* Fill FRAME with info about frame of current function. */
5301 s390_frame_info (void)
5304 HOST_WIDE_INT fsize = get_frame_size ();
5306 if (!TARGET_64BIT && fsize > 0x7fff0000)
5307 fatal_error ("Total size of local variables exceeds architecture limit.");
5309 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5310 cfun->machine->save_fprs_p = 0;
5312 for (i = 24; i < 32; i++)
5313 if (regs_ever_live[i] && !global_regs[i])
5315 cfun->machine->save_fprs_p = 1;
5319 cfun->machine->frame_size = fsize + cfun->machine->save_fprs_p * 64;
5321 /* Does function need to setup frame and save area. */
5323 if (! current_function_is_leaf
5324 || cfun->machine->frame_size > 0
5325 || current_function_calls_alloca
5326 || current_function_stdarg)
5327 cfun->machine->frame_size += STARTING_FRAME_OFFSET;
5329 /* If we use the return register, we'll need to make sure
5330 it is going to be saved/restored. */
5332 if (!current_function_is_leaf
5333 || regs_ever_live[RETURN_REGNUM])
5334 cfun->machine->save_return_addr_p = 1;
5336 /* Find first and last gpr to be saved. Note that at this point,
5337 we assume the base register and -on S/390- the return register
5338 always need to be saved. This is done because the usage of these
5339 register might change even after the prolog was emitted.
5340 If it turns out later that we really don't need them, the
5341 prolog/epilog code is modified again. */
5343 regs_ever_live[BASE_REGISTER] = 1;
5344 if (!TARGET_CPU_ZARCH || cfun->machine->save_return_addr_p)
5345 regs_ever_live[RETURN_REGNUM] = 1;
5346 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5348 for (i = 6; i < 16; i++)
5349 if (regs_ever_live[i])
5351 || i == STACK_POINTER_REGNUM
5352 || i == RETURN_REGNUM
5353 || i == BASE_REGISTER
5354 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5357 for (j = 15; j > i; j--)
5358 if (regs_ever_live[j])
5360 || j == STACK_POINTER_REGNUM
5361 || j == RETURN_REGNUM
5362 || j == BASE_REGISTER
5363 || (flag_pic && j == (int)PIC_OFFSET_TABLE_REGNUM))
5366 /* Save / Restore from gpr i to j. */
5367 cfun->machine->first_save_gpr = i;
5368 cfun->machine->first_restore_gpr = i;
5369 cfun->machine->last_save_gpr = j;
5371 /* Varargs functions need to save gprs 2 to 6. */
5372 if (current_function_stdarg)
5373 cfun->machine->first_save_gpr = 2;
5376 /* Return offset between argument pointer and frame pointer
5377 initially after prologue. */
5380 s390_arg_frame_offset (void)
5382 HOST_WIDE_INT fsize = get_frame_size ();
5385 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5388 for (i = 24; i < 32; i++)
5389 if (regs_ever_live[i] && !global_regs[i])
5395 fsize = fsize + save_fprs_p * 64;
5397 /* Does function need to setup frame and save area. */
5399 if (! current_function_is_leaf
5401 || current_function_calls_alloca
5402 || current_function_stdarg)
5403 fsize += STARTING_FRAME_OFFSET;
5404 return fsize + STACK_POINTER_OFFSET;
5407 /* Emit insn to save fpr REGNUM at offset OFFSET relative
5408 to register BASE. Return generated insn. */
5411 save_fpr (rtx base, int offset, int regnum)
5414 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5415 set_mem_alias_set (addr, s390_sr_alias_set);
5417 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
5420 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
5421 to register BASE. Return generated insn. */
5424 restore_fpr (rtx base, int offset, int regnum)
5427 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5428 set_mem_alias_set (addr, s390_sr_alias_set);
5430 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
5433 /* Generate insn to save registers FIRST to LAST into
5434 the register save area located at offset OFFSET
5435 relative to register BASE. */
5438 save_gprs (rtx base, int offset, int first, int last)
5440 rtx addr, insn, note;
5443 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5444 addr = gen_rtx_MEM (Pmode, addr);
5445 set_mem_alias_set (addr, s390_sr_alias_set);
5447 /* Special-case single register. */
5451 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
5453 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
5455 RTX_FRAME_RELATED_P (insn) = 1;
5460 insn = gen_store_multiple (addr,
5461 gen_rtx_REG (Pmode, first),
5462 GEN_INT (last - first + 1));
5465 /* We need to set the FRAME_RELATED flag on all SETs
5466 inside the store-multiple pattern.
5468 However, we must not emit DWARF records for registers 2..5
5469 if they are stored for use by variable arguments ...
5471 ??? Unfortunately, it is not enough to simply not the the
5472 FRAME_RELATED flags for those SETs, because the first SET
5473 of the PARALLEL is always treated as if it had the flag
5474 set, even if it does not. Therefore we emit a new pattern
5475 without those registers as REG_FRAME_RELATED_EXPR note. */
5479 rtx pat = PATTERN (insn);
5481 for (i = 0; i < XVECLEN (pat, 0); i++)
5482 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
5483 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
5485 RTX_FRAME_RELATED_P (insn) = 1;
5489 addr = plus_constant (base, offset + 6 * UNITS_PER_WORD);
5490 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
5491 gen_rtx_REG (Pmode, 6),
5492 GEN_INT (last - 6 + 1));
5493 note = PATTERN (note);
5496 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5497 note, REG_NOTES (insn));
5499 for (i = 0; i < XVECLEN (note, 0); i++)
5500 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
5501 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
5503 RTX_FRAME_RELATED_P (insn) = 1;
5509 /* Generate insn to restore registers FIRST to LAST from
5510 the register save area located at offset OFFSET
5511 relative to register BASE. */
5514 restore_gprs (rtx base, int offset, int first, int last)
5518 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5519 addr = gen_rtx_MEM (Pmode, addr);
5520 set_mem_alias_set (addr, s390_sr_alias_set);
5522 /* Special-case single register. */
5526 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
5528 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
5533 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
5535 GEN_INT (last - first + 1));
5539 /* Emit code to load the GOT register. If MAYBE_DEAD is true,
5540 annotate generated insns with REG_MAYBE_DEAD notes. */
5542 static GTY(()) rtx got_symbol;
5544 s390_load_got (int maybe_dead)
5548 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
5549 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
5552 if (TARGET_CPU_ZARCH)
5554 rtx insn = emit_move_insn (pic_offset_table_rtx, got_symbol);
5556 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5563 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
5564 UNSPEC_LTREL_OFFSET);
5565 offset = gen_rtx_CONST (Pmode, offset);
5566 offset = force_const_mem (Pmode, offset);
5568 insn = emit_move_insn (pic_offset_table_rtx, offset);
5570 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5573 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
5575 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
5577 insn = emit_move_insn (pic_offset_table_rtx, offset);
5579 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5584 /* Expand the prologue into a bunch of separate insns. */
5587 s390_emit_prologue (void)
5593 /* Compute frame_info. */
5597 /* Choose best register to use for temp use within prologue.
5598 See below for why TPF must use the register 1. */
5600 if (!current_function_is_leaf
5602 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5604 temp_reg = gen_rtx_REG (Pmode, 1);
5606 /* Save call saved gprs. */
5608 insn = save_gprs (stack_pointer_rtx, 0,
5609 cfun->machine->first_save_gpr, cfun->machine->last_save_gpr);
5612 /* Dummy insn to mark literal pool slot. */
5614 emit_insn (gen_main_pool ());
5616 /* Save fprs for variable args. */
5618 if (current_function_stdarg)
5619 for (i = 16; i < (TARGET_64BIT ? 20 : 18); i++)
5620 save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5622 /* Save fprs 4 and 6 if used (31 bit ABI). */
5625 for (i = 18; i < 20; i++)
5626 if (regs_ever_live[i] && !global_regs[i])
5628 insn = save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5629 RTX_FRAME_RELATED_P (insn) = 1;
5632 /* Decrement stack pointer. */
5634 if (cfun->machine->frame_size > 0)
5636 rtx frame_off = GEN_INT (-cfun->machine->frame_size);
5638 /* Save incoming stack pointer into temp reg. */
5640 if (TARGET_BACKCHAIN || cfun->machine->save_fprs_p)
5642 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
5645 /* Subtract frame size from stack pointer. */
5647 if (DISP_IN_RANGE (INTVAL (frame_off)))
5649 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5650 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5652 insn = emit_insn (insn);
5656 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
5657 frame_off = force_const_mem (Pmode, frame_off);
5659 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
5662 RTX_FRAME_RELATED_P (insn) = 1;
5664 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5665 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5666 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5667 GEN_INT (-cfun->machine->frame_size))),
5670 /* Set backchain. */
5672 if (TARGET_BACKCHAIN)
5674 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
5675 set_mem_alias_set (addr, s390_sr_alias_set);
5676 insn = emit_insn (gen_move_insn (addr, temp_reg));
5679 /* If we support asynchronous exceptions (e.g. for Java),
5680 we need to make sure the backchain pointer is set up
5681 before any possibly trapping memory access. */
5683 if (TARGET_BACKCHAIN && flag_non_call_exceptions)
5685 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
5686 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
5690 /* Save fprs 8 - 15 (64 bit ABI). */
5692 if (cfun->machine->save_fprs_p)
5694 insn = emit_insn (gen_add2_insn (temp_reg, GEN_INT(-64)));
5696 for (i = 24; i < 32; i++)
5697 if (regs_ever_live[i] && !global_regs[i])
5699 rtx addr = plus_constant (stack_pointer_rtx,
5700 cfun->machine->frame_size - 64 + (i-24)*8);
5702 insn = save_fpr (temp_reg, (i-24)*8, i);
5703 RTX_FRAME_RELATED_P (insn) = 1;
5705 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5706 gen_rtx_SET (VOIDmode,
5707 gen_rtx_MEM (DFmode, addr),
5708 gen_rtx_REG (DFmode, i)),
5713 /* Set frame pointer, if needed. */
5715 if (frame_pointer_needed)
5717 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
5718 RTX_FRAME_RELATED_P (insn) = 1;
5721 /* Set up got pointer, if needed. */
5723 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
5724 s390_load_got(true);
5728 /* Generate a BAS instruction to serve as a function
5729 entry intercept to facilitate the use of tracing
5730 algorithms located at the branch target.
5732 This must use register 1. */
5737 addr = GEN_INT (0xfe0);
5738 unkn = CONST0_RTX (SImode);
5739 link = gen_rtx_REG (Pmode, 1);
5741 emit_call_insn (gen_call_exp (gen_rtx_MEM (QImode, addr), unkn, link));
5743 /* Emit a blockage here so that all code
5744 lies between the profiling mechanisms. */
5745 emit_insn (gen_blockage ());
5749 /* Expand the epilogue into a bunch of separate insns. */
5752 s390_emit_epilogue (void)
5754 rtx frame_pointer, return_reg;
5755 int area_bottom, area_top, offset = 0;
5762 /* Generate a BAS instruction to serve as a function
5763 entry intercept to facilitate the use of tracing
5764 algorithms located at the branch target.
5766 This must use register 1. */
5772 addr = GEN_INT (0xfe6);
5773 unkn = CONST0_RTX (SImode);
5774 link = gen_rtx_REG (Pmode, 1);
5776 /* Emit a blockage here so that all code
5777 lies between the profiling mechanisms. */
5778 emit_insn (gen_blockage ());
5780 emit_call_insn (gen_call_exp (gen_rtx_MEM (QImode, addr), unkn, link));
5783 /* Check whether to use frame or stack pointer for restore. */
5785 frame_pointer = frame_pointer_needed ?
5786 hard_frame_pointer_rtx : stack_pointer_rtx;
5788 /* Compute which parts of the save area we need to access. */
5790 if (cfun->machine->first_restore_gpr != -1)
5792 area_bottom = cfun->machine->first_restore_gpr * UNITS_PER_WORD;
5793 area_top = (cfun->machine->last_save_gpr + 1) * UNITS_PER_WORD;
5797 area_bottom = INT_MAX;
5803 if (cfun->machine->save_fprs_p)
5805 if (area_bottom > -64)
5813 for (i = 18; i < 20; i++)
5814 if (regs_ever_live[i] && !global_regs[i])
5816 if (area_bottom > 16*UNITS_PER_WORD + 8*(i-16))
5817 area_bottom = 16*UNITS_PER_WORD + 8*(i-16);
5818 if (area_top < 16*UNITS_PER_WORD + 8*(i-16) + 8)
5819 area_top = 16*UNITS_PER_WORD + 8*(i-16) + 8;
5823 /* Check whether we can access the register save area.
5824 If not, increment the frame pointer as required. */
5826 if (area_top <= area_bottom)
5828 /* Nothing to restore. */
5830 else if (DISP_IN_RANGE (cfun->machine->frame_size + area_bottom)
5831 && DISP_IN_RANGE (cfun->machine->frame_size + area_top-1))
5833 /* Area is in range. */
5834 offset = cfun->machine->frame_size;
5838 rtx insn, frame_off;
5840 offset = area_bottom < 0 ? -area_bottom : 0;
5841 frame_off = GEN_INT (cfun->machine->frame_size - offset);
5843 if (DISP_IN_RANGE (INTVAL (frame_off)))
5845 insn = gen_rtx_SET (VOIDmode, frame_pointer,
5846 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
5847 insn = emit_insn (insn);
5851 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
5852 frame_off = force_const_mem (Pmode, frame_off);
5854 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
5858 /* Restore call saved fprs. */
5862 if (cfun->machine->save_fprs_p)
5863 for (i = 24; i < 32; i++)
5864 if (regs_ever_live[i] && !global_regs[i])
5865 restore_fpr (frame_pointer,
5866 offset - 64 + (i-24) * 8, i);
5870 for (i = 18; i < 20; i++)
5871 if (regs_ever_live[i] && !global_regs[i])
5872 restore_fpr (frame_pointer,
5873 offset + 16*UNITS_PER_WORD + 8*(i-16), i);
5876 /* Return register. */
5878 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5880 /* Restore call saved gprs. */
5882 if (cfun->machine->first_restore_gpr != -1)
5887 /* Check for global register and save them
5888 to stack location from where they get restored. */
5890 for (i = cfun->machine->first_restore_gpr;
5891 i <= cfun->machine->last_save_gpr;
5894 /* These registers are special and need to be
5895 restored in any case. */
5896 if (i == STACK_POINTER_REGNUM
5897 || i == RETURN_REGNUM
5898 || i == BASE_REGISTER
5899 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5904 addr = plus_constant (frame_pointer,
5905 offset + i * UNITS_PER_WORD);
5906 addr = gen_rtx_MEM (Pmode, addr);
5907 set_mem_alias_set (addr, s390_sr_alias_set);
5908 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
5912 /* Fetch return address from stack before load multiple,
5913 this will do good for scheduling. */
5915 if (cfun->machine->save_return_addr_p
5916 || (cfun->machine->first_restore_gpr < BASE_REGISTER
5917 && cfun->machine->last_save_gpr > RETURN_REGNUM))
5919 int return_regnum = find_unused_clobbered_reg();
5922 return_reg = gen_rtx_REG (Pmode, return_regnum);
5924 addr = plus_constant (frame_pointer,
5925 offset + RETURN_REGNUM * UNITS_PER_WORD);
5926 addr = gen_rtx_MEM (Pmode, addr);
5927 set_mem_alias_set (addr, s390_sr_alias_set);
5928 emit_move_insn (return_reg, addr);
5931 /* ??? As references to the base register are not made
5932 explicit in insn RTX code, we have to add a barrier here
5933 to prevent incorrect scheduling. */
5935 emit_insn (gen_blockage());
5937 insn = restore_gprs (frame_pointer, offset,
5938 cfun->machine->first_restore_gpr,
5939 cfun->machine->last_save_gpr);
5943 /* Return to caller. */
5945 p = rtvec_alloc (2);
5947 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
5948 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
5949 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
5953 /* Return the size in bytes of a function argument of
5954 type TYPE and/or mode MODE. At least one of TYPE or
5955 MODE must be specified. */
5958 s390_function_arg_size (enum machine_mode mode, tree type)
5961 return int_size_in_bytes (type);
5963 /* No type info available for some library calls ... */
5964 if (mode != BLKmode)
5965 return GET_MODE_SIZE (mode);
5967 /* If we have neither type nor mode, abort */
5971 /* Return true if a function argument of type TYPE and mode MODE
5972 is to be passed in a floating-point register, if available. */
5975 s390_function_arg_float (enum machine_mode mode, tree type)
5977 int size = s390_function_arg_size (mode, type);
5981 /* Soft-float changes the ABI: no floating-point registers are used. */
5982 if (TARGET_SOFT_FLOAT)
5985 /* No type info available for some library calls ... */
5987 return mode == SFmode || mode == DFmode;
5989 /* The ABI says that record types with a single member are treated
5990 just like that member would be. */
5991 while (TREE_CODE (type) == RECORD_TYPE)
5993 tree field, single = NULL_TREE;
5995 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
5997 if (TREE_CODE (field) != FIELD_DECL)
6000 if (single == NULL_TREE)
6001 single = TREE_TYPE (field);
6006 if (single == NULL_TREE)
6012 return TREE_CODE (type) == REAL_TYPE;
6015 /* Return true if a function argument of type TYPE and mode MODE
6016 is to be passed in an integer register, or a pair of integer
6017 registers, if available. */
6020 s390_function_arg_integer (enum machine_mode mode, tree type)
6022 int size = s390_function_arg_size (mode, type);
6026 /* No type info available for some library calls ... */
6028 return GET_MODE_CLASS (mode) == MODE_INT
6029 || (TARGET_SOFT_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT);
6031 /* We accept small integral (and similar) types. */
6032 if (INTEGRAL_TYPE_P (type)
6033 || POINTER_TYPE_P (type)
6034 || TREE_CODE (type) == OFFSET_TYPE
6035 || (TARGET_SOFT_FLOAT && TREE_CODE (type) == REAL_TYPE))
6038 /* We also accept structs of size 1, 2, 4, 8 that are not
6039 passed in floating-point registers. */
6040 if (AGGREGATE_TYPE_P (type)
6041 && exact_log2 (size) >= 0
6042 && !s390_function_arg_float (mode, type))
6048 /* Return 1 if a function argument of type TYPE and mode MODE
6049 is to be passed by reference. The ABI specifies that only
6050 structures of size 1, 2, 4, or 8 bytes are passed by value,
6051 all other structures (and complex numbers) are passed by
6055 s390_function_arg_pass_by_reference (enum machine_mode mode, tree type)
6057 int size = s390_function_arg_size (mode, type);
6063 if (AGGREGATE_TYPE_P (type) && exact_log2 (size) < 0)
6066 if (TREE_CODE (type) == COMPLEX_TYPE
6067 || TREE_CODE (type) == VECTOR_TYPE)
6074 /* Update the data in CUM to advance over an argument of mode MODE and
6075 data type TYPE. (TYPE is null for libcalls where that information
6076 may not be available.). The boolean NAMED specifies whether the
6077 argument is a named argument (as opposed to an unnamed argument
6078 matching an ellipsis). */
6081 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
6082 tree type, int named ATTRIBUTE_UNUSED)
6084 if (s390_function_arg_pass_by_reference (mode, type))
6088 else if (s390_function_arg_float (mode, type))
6092 else if (s390_function_arg_integer (mode, type))
6094 int size = s390_function_arg_size (mode, type);
6095 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
6101 /* Define where to put the arguments to a function.
6102 Value is zero to push the argument on the stack,
6103 or a hard register in which to store the argument.
6105 MODE is the argument's machine mode.
6106 TYPE is the data type of the argument (as a tree).
6107 This is null for libcalls where that information may
6109 CUM is a variable of type CUMULATIVE_ARGS which gives info about
6110 the preceding args and about the function being called.
6111 NAMED is nonzero if this argument is a named parameter
6112 (otherwise it is an extra parameter matching an ellipsis).
6114 On S/390, we use general purpose registers 2 through 6 to
6115 pass integer, pointer, and certain structure arguments, and
6116 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
6117 to pass floating point arguments. All remaining arguments
6118 are pushed to the stack. */
6121 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
6122 int named ATTRIBUTE_UNUSED)
6124 if (s390_function_arg_pass_by_reference (mode, type))
6127 if (s390_function_arg_float (mode, type))
6129 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
6132 return gen_rtx (REG, mode, cum->fprs + 16);
6134 else if (s390_function_arg_integer (mode, type))
6136 int size = s390_function_arg_size (mode, type);
6137 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
6139 if (cum->gprs + n_gprs > 5)
6142 return gen_rtx (REG, mode, cum->gprs + 2);
6145 /* After the real arguments, expand_call calls us once again
6146 with a void_type_node type. Whatever we return here is
6147 passed as operand 2 to the call expanders.
6149 We don't need this feature ... */
6150 else if (type == void_type_node)
6156 /* Return true if return values of type TYPE should be returned
6157 in a memory buffer whose address is passed by the caller as
6158 hidden first argument. */
6161 s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED)
6163 /* We accept small integral (and similar) types. */
6164 if (INTEGRAL_TYPE_P (type)
6165 || POINTER_TYPE_P (type)
6166 || TREE_CODE (type) == OFFSET_TYPE
6167 || TREE_CODE (type) == REAL_TYPE)
6168 return int_size_in_bytes (type) > 8;
6170 /* Aggregates and similar constructs are always returned
6172 if (AGGREGATE_TYPE_P (type)
6173 || TREE_CODE (type) == COMPLEX_TYPE
6174 || TREE_CODE (type) == VECTOR_TYPE)
6177 /* ??? We get called on all sorts of random stuff from
6178 aggregate_value_p. We can't abort, but it's not clear
6179 what's safe to return. Pretend it's a struct I guess. */
6183 /* Define where to return a (scalar) value of type TYPE.
6184 If TYPE is null, define where to return a (scalar)
6185 value of mode MODE from a libcall. */
6188 s390_function_value (tree type, enum machine_mode mode)
6192 int unsignedp = TREE_UNSIGNED (type);
6193 mode = promote_mode (type, TYPE_MODE (type), &unsignedp, 1);
6196 if (GET_MODE_CLASS (mode) != MODE_INT
6197 && GET_MODE_CLASS (mode) != MODE_FLOAT)
6199 if (GET_MODE_SIZE (mode) > 8)
6202 if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
6203 return gen_rtx_REG (mode, 16);
6205 return gen_rtx_REG (mode, 2);
6209 /* Create and return the va_list datatype.
6211 On S/390, va_list is an array type equivalent to
6213 typedef struct __va_list_tag
6217 void *__overflow_arg_area;
6218 void *__reg_save_area;
6221 where __gpr and __fpr hold the number of general purpose
6222 or floating point arguments used up to now, respectively,
6223 __overflow_arg_area points to the stack location of the
6224 next argument passed on the stack, and __reg_save_area
6225 always points to the start of the register area in the
6226 call frame of the current function. The function prologue
6227 saves all registers used for argument passing into this
6228 area if the function uses variable arguments. */
6231 s390_build_builtin_va_list (void)
6233 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
6235 record = lang_hooks.types.make_type (RECORD_TYPE);
6238 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
6240 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
6241 long_integer_type_node);
6242 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
6243 long_integer_type_node);
6244 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
6246 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
6249 DECL_FIELD_CONTEXT (f_gpr) = record;
6250 DECL_FIELD_CONTEXT (f_fpr) = record;
6251 DECL_FIELD_CONTEXT (f_ovf) = record;
6252 DECL_FIELD_CONTEXT (f_sav) = record;
6254 TREE_CHAIN (record) = type_decl;
6255 TYPE_NAME (record) = type_decl;
6256 TYPE_FIELDS (record) = f_gpr;
6257 TREE_CHAIN (f_gpr) = f_fpr;
6258 TREE_CHAIN (f_fpr) = f_ovf;
6259 TREE_CHAIN (f_ovf) = f_sav;
6261 layout_type (record);
6263 /* The correct type is an array type of one element. */
6264 return build_array_type (record, build_index_type (size_zero_node));
6267 /* Implement va_start by filling the va_list structure VALIST.
6268 STDARG_P is always true, and ignored.
6269 NEXTARG points to the first anonymous stack argument.
6271 The following global variables are used to initialize
6272 the va_list structure:
6274 current_function_args_info:
6275 holds number of gprs and fprs used for named arguments.
6276 current_function_arg_offset_rtx:
6277 holds the offset of the first anonymous stack argument
6278 (relative to the virtual arg pointer). */
6281 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
6283 HOST_WIDE_INT n_gpr, n_fpr;
6285 tree f_gpr, f_fpr, f_ovf, f_sav;
6286 tree gpr, fpr, ovf, sav, t;
6288 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6289 f_fpr = TREE_CHAIN (f_gpr);
6290 f_ovf = TREE_CHAIN (f_fpr);
6291 f_sav = TREE_CHAIN (f_ovf);
6293 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6294 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6295 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6296 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6297 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6299 /* Count number of gp and fp argument registers used. */
6301 n_gpr = current_function_args_info.gprs;
6302 n_fpr = current_function_args_info.fprs;
6304 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr, build_int_2 (n_gpr, 0));
6305 TREE_SIDE_EFFECTS (t) = 1;
6306 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6308 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr, build_int_2 (n_fpr, 0));
6309 TREE_SIDE_EFFECTS (t) = 1;
6310 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6312 /* Find the overflow area. */
6313 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
6315 off = INTVAL (current_function_arg_offset_rtx);
6316 off = off < 0 ? 0 : off;
6317 if (TARGET_DEBUG_ARG)
6318 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
6319 (int)n_gpr, (int)n_fpr, off);
6321 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_2 (off, 0));
6323 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6324 TREE_SIDE_EFFECTS (t) = 1;
6325 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6327 /* Find the register save area. */
6328 t = make_tree (TREE_TYPE (sav), virtual_incoming_args_rtx);
6329 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
6330 build_int_2 (-STACK_POINTER_OFFSET, -1));
6331 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
6332 TREE_SIDE_EFFECTS (t) = 1;
6333 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6336 /* Implement va_arg by updating the va_list structure
6337 VALIST as required to retrieve an argument of type
6338 TYPE, and returning that argument.
6340 Generates code equivalent to:
6342 if (integral value) {
6343 if (size <= 4 && args.gpr < 5 ||
6344 size > 4 && args.gpr < 4 )
6345 ret = args.reg_save_area[args.gpr+8]
6347 ret = *args.overflow_arg_area++;
6348 } else if (float value) {
6350 ret = args.reg_save_area[args.fpr+64]
6352 ret = *args.overflow_arg_area++;
6353 } else if (aggregate value) {
6355 ret = *args.reg_save_area[args.gpr]
6357 ret = **args.overflow_arg_area++;
6361 s390_va_arg (tree valist, tree type)
6363 tree f_gpr, f_fpr, f_ovf, f_sav;
6364 tree gpr, fpr, ovf, sav, reg, t, u;
6365 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
6366 rtx lab_false, lab_over, addr_rtx, r;
6368 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6369 f_fpr = TREE_CHAIN (f_gpr);
6370 f_ovf = TREE_CHAIN (f_fpr);
6371 f_sav = TREE_CHAIN (f_ovf);
6373 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6374 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6375 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6376 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6377 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6379 size = int_size_in_bytes (type);
6381 if (s390_function_arg_pass_by_reference (TYPE_MODE (type), type))
6383 if (TARGET_DEBUG_ARG)
6385 fprintf (stderr, "va_arg: aggregate type");
6389 /* Aggregates are passed by reference. */
6393 sav_ofs = 2 * UNITS_PER_WORD;
6394 sav_scale = UNITS_PER_WORD;
6395 size = UNITS_PER_WORD;
6398 else if (s390_function_arg_float (TYPE_MODE (type), type))
6400 if (TARGET_DEBUG_ARG)
6402 fprintf (stderr, "va_arg: float type");
6406 /* FP args go in FP registers, if present. */
6410 sav_ofs = 16 * UNITS_PER_WORD;
6412 /* TARGET_64BIT has up to 4 parameter in fprs */
6413 max_reg = TARGET_64BIT ? 3 : 1;
6417 if (TARGET_DEBUG_ARG)
6419 fprintf (stderr, "va_arg: other type");
6423 /* Otherwise into GP registers. */
6426 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
6427 sav_ofs = 2 * UNITS_PER_WORD;
6429 if (size < UNITS_PER_WORD)
6430 sav_ofs += UNITS_PER_WORD - size;
6432 sav_scale = UNITS_PER_WORD;
6439 /* Pull the value out of the saved registers ... */
6441 lab_false = gen_label_rtx ();
6442 lab_over = gen_label_rtx ();
6443 addr_rtx = gen_reg_rtx (Pmode);
6445 emit_cmp_and_jump_insns (expand_expr (reg, NULL_RTX, Pmode, EXPAND_NORMAL),
6447 GT, const1_rtx, Pmode, 0, lab_false);
6450 t = build (PLUS_EXPR, ptr_type_node, sav, build_int_2 (sav_ofs, 0));
6454 u = build (MULT_EXPR, long_integer_type_node,
6455 reg, build_int_2 (sav_scale, 0));
6456 TREE_SIDE_EFFECTS (u) = 1;
6458 t = build (PLUS_EXPR, ptr_type_node, t, u);
6459 TREE_SIDE_EFFECTS (t) = 1;
6461 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6463 emit_move_insn (addr_rtx, r);
6466 emit_jump_insn (gen_jump (lab_over));
6468 emit_label (lab_false);
6470 /* ... Otherwise out of the overflow area. */
6472 t = save_expr (ovf);
6475 /* In 64 BIT for each argument on stack, a full 64 bit slot is allocated. */
6476 if (size < UNITS_PER_WORD)
6478 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (UNITS_PER_WORD-size, 0));
6479 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6480 TREE_SIDE_EFFECTS (t) = 1;
6481 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6483 t = save_expr (ovf);
6486 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6488 emit_move_insn (addr_rtx, r);
6490 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (size, 0));
6491 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6492 TREE_SIDE_EFFECTS (t) = 1;
6493 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6495 emit_label (lab_over);
6497 /* If less than max_regs a registers are retrieved out
6498 of register save area, increment. */
6500 u = build (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
6501 build_int_2 (n_reg, 0));
6502 TREE_SIDE_EFFECTS (u) = 1;
6503 expand_expr (u, const0_rtx, VOIDmode, EXPAND_NORMAL);
6507 r = gen_rtx_MEM (Pmode, addr_rtx);
6508 set_mem_alias_set (r, get_varargs_alias_set ());
6509 emit_move_insn (addr_rtx, r);
6521 S390_BUILTIN_THREAD_POINTER,
6522 S390_BUILTIN_SET_THREAD_POINTER,
6527 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
6532 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
6538 s390_init_builtins (void)
6542 ftype = build_function_type (ptr_type_node, void_list_node);
6543 builtin_function ("__builtin_thread_pointer", ftype,
6544 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
6547 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
6548 builtin_function ("__builtin_set_thread_pointer", ftype,
6549 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
6553 /* Expand an expression EXP that calls a built-in function,
6554 with result going to TARGET if that's convenient
6555 (and in mode MODE if that's convenient).
6556 SUBTARGET may be used as the target for computing one of EXP's operands.
6557 IGNORE is nonzero if the value is to be ignored. */
6560 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
6561 enum machine_mode mode ATTRIBUTE_UNUSED,
6562 int ignore ATTRIBUTE_UNUSED)
6566 unsigned int const *code_for_builtin =
6567 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
6569 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6570 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
6571 tree arglist = TREE_OPERAND (exp, 1);
6572 enum insn_code icode;
6573 rtx op[MAX_ARGS], pat;
6577 if (fcode >= S390_BUILTIN_max)
6578 internal_error ("bad builtin fcode");
6579 icode = code_for_builtin[fcode];
6581 internal_error ("bad builtin fcode");
6583 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
6585 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
6587 arglist = TREE_CHAIN (arglist), arity++)
6589 const struct insn_operand_data *insn_op;
6591 tree arg = TREE_VALUE (arglist);
6592 if (arg == error_mark_node)
6594 if (arity > MAX_ARGS)
6597 insn_op = &insn_data[icode].operand[arity + nonvoid];
6599 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
6601 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
6602 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
6607 enum machine_mode tmode = insn_data[icode].operand[0].mode;
6609 || GET_MODE (target) != tmode
6610 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
6611 target = gen_reg_rtx (tmode);
6617 pat = GEN_FCN (icode) (target);
6621 pat = GEN_FCN (icode) (target, op[0]);
6623 pat = GEN_FCN (icode) (op[0]);
6626 pat = GEN_FCN (icode) (target, op[0], op[1]);
6642 /* Output assembly code for the trampoline template to
6645 On S/390, we use gpr 1 internally in the trampoline code;
6646 gpr 0 is used to hold the static chain. */
6649 s390_trampoline_template (FILE *file)
6653 fprintf (file, "larl\t%s,0f\n", reg_names[1]);
6654 fprintf (file, "lg\t%s,0(%s)\n", reg_names[0], reg_names[1]);
6655 fprintf (file, "lg\t%s,8(%s)\n", reg_names[1], reg_names[1]);
6656 fprintf (file, "br\t%s\n", reg_names[1]);
6657 fprintf (file, "0:\t.quad\t0\n");
6658 fprintf (file, ".quad\t0\n");
6662 fprintf (file, "basr\t%s,0\n", reg_names[1]);
6663 fprintf (file, "l\t%s,10(%s)\n", reg_names[0], reg_names[1]);
6664 fprintf (file, "l\t%s,14(%s)\n", reg_names[1], reg_names[1]);
6665 fprintf (file, "br\t%s\n", reg_names[1]);
6666 fprintf (file, ".long\t0\n");
6667 fprintf (file, ".long\t0\n");
6671 /* Emit RTL insns to initialize the variable parts of a trampoline.
6672 FNADDR is an RTX for the address of the function's pure code.
6673 CXT is an RTX for the static chain value for the function. */
6676 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
6678 emit_move_insn (gen_rtx
6680 memory_address (Pmode,
6681 plus_constant (addr, (TARGET_64BIT ? 20 : 12) ))), cxt);
6682 emit_move_insn (gen_rtx
6684 memory_address (Pmode,
6685 plus_constant (addr, (TARGET_64BIT ? 28 : 16) ))), fnaddr);
6688 /* Return rtx for 64-bit constant formed from the 32-bit subwords
6689 LOW and HIGH, independent of the host word size. */
6692 s390_gen_rtx_const_DI (int high, int low)
6694 #if HOST_BITS_PER_WIDE_INT >= 64
6696 val = (HOST_WIDE_INT)high;
6698 val |= (HOST_WIDE_INT)low;
6700 return GEN_INT (val);
6702 #if HOST_BITS_PER_WIDE_INT >= 32
6703 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
6710 /* Output assembler code to FILE to increment profiler label # LABELNO
6711 for profiling a function entry. */
6714 s390_function_profiler (FILE *file, int labelno)
6719 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
6721 fprintf (file, "# function profiler \n");
6723 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
6724 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
6725 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
6727 op[2] = gen_rtx_REG (Pmode, 1);
6728 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
6729 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
6731 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
6734 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
6735 op[4] = gen_rtx_CONST (Pmode, op[4]);
6740 output_asm_insn ("stg\t%0,%1", op);
6741 output_asm_insn ("larl\t%2,%3", op);
6742 output_asm_insn ("brasl\t%0,%4", op);
6743 output_asm_insn ("lg\t%0,%1", op);
6747 op[6] = gen_label_rtx ();
6749 output_asm_insn ("st\t%0,%1", op);
6750 output_asm_insn ("bras\t%2,%l6", op);
6751 output_asm_insn (".long\t%4", op);
6752 output_asm_insn (".long\t%3", op);
6753 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6754 output_asm_insn ("l\t%0,0(%2)", op);
6755 output_asm_insn ("l\t%2,4(%2)", op);
6756 output_asm_insn ("basr\t%0,%0", op);
6757 output_asm_insn ("l\t%0,%1", op);
6761 op[5] = gen_label_rtx ();
6762 op[6] = gen_label_rtx ();
6764 output_asm_insn ("st\t%0,%1", op);
6765 output_asm_insn ("bras\t%2,%l6", op);
6766 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
6767 output_asm_insn (".long\t%4-%l5", op);
6768 output_asm_insn (".long\t%3-%l5", op);
6769 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6770 output_asm_insn ("lr\t%0,%2", op);
6771 output_asm_insn ("a\t%0,0(%2)", op);
6772 output_asm_insn ("a\t%2,4(%2)", op);
6773 output_asm_insn ("basr\t%0,%0", op);
6774 output_asm_insn ("l\t%0,%1", op);
6778 /* Select section for constant in constant pool. In 32-bit mode,
6779 constants go in the function section; in 64-bit mode in .rodata. */
6782 s390_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED,
6783 rtx x ATTRIBUTE_UNUSED,
6784 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
6786 if (TARGET_CPU_ZARCH)
6787 readonly_data_section ();
6789 function_section (current_function_decl);
6792 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
6793 into its SYMBOL_REF_FLAGS. */
6796 s390_encode_section_info (tree decl, rtx rtl, int first)
6798 default_encode_section_info (decl, rtl, first);
6800 /* If a variable has a forced alignment to < 2 bytes, mark it with
6801 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
6802 if (TREE_CODE (decl) == VAR_DECL
6803 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
6804 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
6807 /* Output thunk to FILE that implements a C++ virtual function call (with
6808 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
6809 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
6810 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
6811 relative to the resulting this pointer. */
6814 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
6815 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
6821 /* Operand 0 is the target function. */
6822 op[0] = XEXP (DECL_RTL (function), 0);
6823 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
6826 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
6827 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
6828 op[0] = gen_rtx_CONST (Pmode, op[0]);
6831 /* Operand 1 is the 'this' pointer. */
6832 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
6833 op[1] = gen_rtx_REG (Pmode, 3);
6835 op[1] = gen_rtx_REG (Pmode, 2);
6837 /* Operand 2 is the delta. */
6838 op[2] = GEN_INT (delta);
6840 /* Operand 3 is the vcall_offset. */
6841 op[3] = GEN_INT (vcall_offset);
6843 /* Operand 4 is the temporary register. */
6844 op[4] = gen_rtx_REG (Pmode, 1);
6846 /* Operands 5 to 8 can be used as labels. */
6852 /* Operand 9 can be used for temporary register. */
6855 /* Generate code. */
6858 /* Setup literal pool pointer if required. */
6859 if ((!DISP_IN_RANGE (delta)
6860 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6861 || (!DISP_IN_RANGE (vcall_offset)
6862 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
6864 op[5] = gen_label_rtx ();
6865 output_asm_insn ("larl\t%4,%5", op);
6868 /* Add DELTA to this pointer. */
6871 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
6872 output_asm_insn ("la\t%1,%2(%1)", op);
6873 else if (DISP_IN_RANGE (delta))
6874 output_asm_insn ("lay\t%1,%2(%1)", op);
6875 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6876 output_asm_insn ("aghi\t%1,%2", op);
6879 op[6] = gen_label_rtx ();
6880 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
6884 /* Perform vcall adjustment. */
6887 if (DISP_IN_RANGE (vcall_offset))
6889 output_asm_insn ("lg\t%4,0(%1)", op);
6890 output_asm_insn ("ag\t%1,%3(%4)", op);
6892 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
6894 output_asm_insn ("lghi\t%4,%3", op);
6895 output_asm_insn ("ag\t%4,0(%1)", op);
6896 output_asm_insn ("ag\t%1,0(%4)", op);
6900 op[7] = gen_label_rtx ();
6901 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
6902 output_asm_insn ("ag\t%4,0(%1)", op);
6903 output_asm_insn ("ag\t%1,0(%4)", op);
6907 /* Jump to target. */
6908 output_asm_insn ("jg\t%0", op);
6910 /* Output literal pool if required. */
6913 output_asm_insn (".align\t4", op);
6914 targetm.asm_out.internal_label (file, "L",
6915 CODE_LABEL_NUMBER (op[5]));
6919 targetm.asm_out.internal_label (file, "L",
6920 CODE_LABEL_NUMBER (op[6]));
6921 output_asm_insn (".long\t%2", op);
6925 targetm.asm_out.internal_label (file, "L",
6926 CODE_LABEL_NUMBER (op[7]));
6927 output_asm_insn (".long\t%3", op);
6932 /* Setup base pointer if required. */
6934 || (!DISP_IN_RANGE (delta)
6935 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6936 || (!DISP_IN_RANGE (delta)
6937 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
6939 op[5] = gen_label_rtx ();
6940 output_asm_insn ("basr\t%4,0", op);
6941 targetm.asm_out.internal_label (file, "L",
6942 CODE_LABEL_NUMBER (op[5]));
6945 /* Add DELTA to this pointer. */
6948 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
6949 output_asm_insn ("la\t%1,%2(%1)", op);
6950 else if (DISP_IN_RANGE (delta))
6951 output_asm_insn ("lay\t%1,%2(%1)", op);
6952 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6953 output_asm_insn ("ahi\t%1,%2", op);
6956 op[6] = gen_label_rtx ();
6957 output_asm_insn ("a\t%1,%6-%5(%4)", op);
6961 /* Perform vcall adjustment. */
6964 if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'J', "J"))
6966 output_asm_insn ("lg\t%4,0(%1)", op);
6967 output_asm_insn ("a\t%1,%3(%4)", op);
6969 else if (DISP_IN_RANGE (vcall_offset))
6971 output_asm_insn ("lg\t%4,0(%1)", op);
6972 output_asm_insn ("ay\t%1,%3(%4)", op);
6974 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
6976 output_asm_insn ("lhi\t%4,%3", op);
6977 output_asm_insn ("a\t%4,0(%1)", op);
6978 output_asm_insn ("a\t%1,0(%4)", op);
6982 op[7] = gen_label_rtx ();
6983 output_asm_insn ("l\t%4,%7-%5(%4)", op);
6984 output_asm_insn ("a\t%4,0(%1)", op);
6985 output_asm_insn ("a\t%1,0(%4)", op);
6988 /* We had to clobber the base pointer register.
6989 Re-setup the base pointer (with a different base). */
6990 op[5] = gen_label_rtx ();
6991 output_asm_insn ("basr\t%4,0", op);
6992 targetm.asm_out.internal_label (file, "L",
6993 CODE_LABEL_NUMBER (op[5]));
6996 /* Jump to target. */
6997 op[8] = gen_label_rtx ();
7000 output_asm_insn ("l\t%4,%8-%5(%4)", op);
7002 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7003 /* We cannot call through .plt, since .plt requires %r12 loaded. */
7004 else if (flag_pic == 1)
7006 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7007 output_asm_insn ("l\t%4,%0(%4)", op);
7009 else if (flag_pic == 2)
7011 op[9] = gen_rtx_REG (Pmode, 0);
7012 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
7013 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7014 output_asm_insn ("ar\t%4,%9", op);
7015 output_asm_insn ("l\t%4,0(%4)", op);
7018 output_asm_insn ("br\t%4", op);
7020 /* Output literal pool. */
7021 output_asm_insn (".align\t4", op);
7023 if (nonlocal && flag_pic == 2)
7024 output_asm_insn (".long\t%0", op);
7027 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
7028 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
7031 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
7033 output_asm_insn (".long\t%0", op);
7035 output_asm_insn (".long\t%0-%5", op);
7039 targetm.asm_out.internal_label (file, "L",
7040 CODE_LABEL_NUMBER (op[6]));
7041 output_asm_insn (".long\t%2", op);
7045 targetm.asm_out.internal_label (file, "L",
7046 CODE_LABEL_NUMBER (op[7]));
7047 output_asm_insn (".long\t%3", op);
7053 s390_valid_pointer_mode (enum machine_mode mode)
7055 return (mode == SImode || (TARGET_64BIT && mode == DImode));
7058 /* How to allocate a 'struct machine_function'. */
7060 static struct machine_function *
7061 s390_init_machine_status (void)
7063 return ggc_alloc_cleared (sizeof (struct machine_function));
7066 #include "gt-s390.h"