1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
31 #include "hard-reg-set.h"
33 #include "insn-config.h"
34 #include "conditions.h"
36 #include "insn-attr.h"
44 #include "basic-block.h"
45 #include "integrate.h"
48 #include "target-def.h"
50 #include "langhooks.h"
53 /* Machine-specific symbol_ref flags. */
54 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
57 static bool s390_assemble_integer (rtx, unsigned int, int);
58 static void s390_select_rtx_section (enum machine_mode, rtx,
59 unsigned HOST_WIDE_INT);
60 static void s390_encode_section_info (tree, rtx, int);
61 static bool s390_cannot_force_const_mem (rtx);
62 static rtx s390_delegitimize_address (rtx);
63 static bool s390_return_in_memory (tree, tree);
64 static void s390_init_builtins (void);
65 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
66 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
68 static enum attr_type s390_safe_attr_type (rtx);
70 static int s390_adjust_cost (rtx, rtx, rtx, int);
71 static int s390_adjust_priority (rtx, int);
72 static int s390_issue_rate (void);
73 static int s390_use_dfa_pipeline_interface (void);
74 static int s390_first_cycle_multipass_dfa_lookahead (void);
75 static int s390_sched_reorder2 (FILE *, int, rtx *, int *, int);
76 static bool s390_rtx_costs (rtx, int, int, int *);
77 static int s390_address_cost (rtx);
78 static void s390_reorg (void);
79 static bool s390_valid_pointer_mode (enum machine_mode);
80 static tree s390_build_builtin_va_list (void);
82 #undef TARGET_ASM_ALIGNED_HI_OP
83 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
84 #undef TARGET_ASM_ALIGNED_DI_OP
85 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
86 #undef TARGET_ASM_INTEGER
87 #define TARGET_ASM_INTEGER s390_assemble_integer
89 #undef TARGET_ASM_OPEN_PAREN
90 #define TARGET_ASM_OPEN_PAREN ""
92 #undef TARGET_ASM_CLOSE_PAREN
93 #define TARGET_ASM_CLOSE_PAREN ""
95 #undef TARGET_ASM_SELECT_RTX_SECTION
96 #define TARGET_ASM_SELECT_RTX_SECTION s390_select_rtx_section
98 #undef TARGET_ENCODE_SECTION_INFO
99 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
102 #undef TARGET_HAVE_TLS
103 #define TARGET_HAVE_TLS true
105 #undef TARGET_CANNOT_FORCE_CONST_MEM
106 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
108 #undef TARGET_DELEGITIMIZE_ADDRESS
109 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
111 #undef TARGET_RETURN_IN_MEMORY
112 #define TARGET_RETURN_IN_MEMORY s390_return_in_memory
114 #undef TARGET_INIT_BUILTINS
115 #define TARGET_INIT_BUILTINS s390_init_builtins
116 #undef TARGET_EXPAND_BUILTIN
117 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
119 #undef TARGET_ASM_OUTPUT_MI_THUNK
120 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
121 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
122 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
124 #undef TARGET_SCHED_ADJUST_COST
125 #define TARGET_SCHED_ADJUST_COST s390_adjust_cost
126 #undef TARGET_SCHED_ADJUST_PRIORITY
127 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
128 #undef TARGET_SCHED_ISSUE_RATE
129 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
130 #undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
131 #define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE s390_use_dfa_pipeline_interface
132 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
133 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
134 #undef TARGET_SCHED_REORDER2
135 #define TARGET_SCHED_REORDER2 s390_sched_reorder2
137 #undef TARGET_RTX_COSTS
138 #define TARGET_RTX_COSTS s390_rtx_costs
139 #undef TARGET_ADDRESS_COST
140 #define TARGET_ADDRESS_COST s390_address_cost
141 #undef TARGET_DIRECT_POOL_LOAD_P
142 #define TARGET_DIRECT_POOL_LOAD_P hook_bool_machine_mode_true
144 #undef TARGET_MACHINE_DEPENDENT_REORG
145 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
147 #undef TARGET_VALID_POINTER_MODE
148 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
150 #undef TARGET_BUILD_BUILTIN_VA_LIST
151 #define TARGET_BUILD_BUILTIN_VA_LIST s390_build_builtin_va_list
153 struct gcc_target targetm = TARGET_INITIALIZER;
155 extern int reload_completed;
157 /* The alias set for prologue/epilogue register save/restore. */
158 static int s390_sr_alias_set = 0;
160 /* Save information from a "cmpxx" operation until the branch or scc is
162 rtx s390_compare_op0, s390_compare_op1;
164 /* Structure used to hold the components of a S/390 memory
165 address. A legitimate address on S/390 is of the general
167 base + index + displacement
168 where any of the components is optional.
170 base and index are registers of the class ADDR_REGS,
171 displacement is an unsigned 12-bit immediate constant. */
181 /* Which cpu are we tuning for. */
182 enum processor_type s390_tune;
183 enum processor_flags s390_tune_flags;
184 /* Which instruction set architecture to use. */
185 enum processor_type s390_arch;
186 enum processor_flags s390_arch_flags;
188 /* Strings to hold which cpu and instruction set architecture to use. */
189 const char *s390_tune_string; /* for -mtune=<xxx> */
190 const char *s390_arch_string; /* for -march=<xxx> */
192 /* Define the structure for the machine field in struct function. */
194 struct machine_function GTY(())
196 /* Set, if some of the fprs 8-15 need to be saved (64 bit abi). */
199 /* Set if return address needs to be saved. */
200 bool save_return_addr_p;
202 /* Number of first and last gpr to be saved, restored. */
204 int first_restore_gpr;
207 /* Size of stack frame. */
208 HOST_WIDE_INT frame_size;
210 /* Some local-dynamic TLS symbol name. */
211 const char *some_ld_name;
214 static int s390_match_ccmode_set (rtx, enum machine_mode);
215 static int s390_branch_condition_mask (rtx);
216 static const char *s390_branch_condition_mnemonic (rtx, int);
217 static int check_mode (rtx, enum machine_mode *);
218 static int general_s_operand (rtx, enum machine_mode, int);
219 static int s390_short_displacement (rtx);
220 static int s390_decompose_address (rtx, struct s390_address *);
221 static rtx get_thread_pointer (void);
222 static rtx legitimize_tls_address (rtx, rtx);
223 static void print_shift_count_operand (FILE *, rtx);
224 static const char *get_some_local_dynamic_name (void);
225 static int get_some_local_dynamic_name_1 (rtx *, void *);
226 static int reg_used_in_mem_p (int, rtx);
227 static int addr_generation_dependency_p (rtx, rtx);
228 static int s390_split_branches (void);
229 static void find_constant_pool_ref (rtx, rtx *);
230 static void replace_constant_pool_ref (rtx *, rtx, rtx);
231 static rtx find_ltrel_base (rtx);
232 static void replace_ltrel_base (rtx *, rtx);
233 static void s390_optimize_prolog (bool);
234 static int find_unused_clobbered_reg (void);
235 static void s390_frame_info (void);
236 static rtx save_fpr (rtx, int, int);
237 static rtx restore_fpr (rtx, int, int);
238 static rtx save_gprs (rtx, int, int, int);
239 static rtx restore_gprs (rtx, int, int, int);
240 static int s390_function_arg_size (enum machine_mode, tree);
241 static bool s390_function_arg_float (enum machine_mode, tree);
242 static struct machine_function * s390_init_machine_status (void);
244 /* Check whether integer displacement is in range. */
245 #define DISP_IN_RANGE(d) \
246 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
247 : ((d) >= 0 && (d) <= 4095))
249 /* Return true if SET either doesn't set the CC register, or else
250 the source and destination have matching CC modes and that
251 CC mode is at least as constrained as REQ_MODE. */
254 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
256 enum machine_mode set_mode;
258 if (GET_CODE (set) != SET)
261 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
264 set_mode = GET_MODE (SET_DEST (set));
277 if (req_mode != set_mode)
282 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
283 && req_mode != CCSRmode && req_mode != CCURmode)
289 if (req_mode != CCAmode)
297 return (GET_MODE (SET_SRC (set)) == set_mode);
300 /* Return true if every SET in INSN that sets the CC register
301 has source and destination with matching CC modes and that
302 CC mode is at least as constrained as REQ_MODE.
303 If REQ_MODE is VOIDmode, always return false. */
306 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
310 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
311 if (req_mode == VOIDmode)
314 if (GET_CODE (PATTERN (insn)) == SET)
315 return s390_match_ccmode_set (PATTERN (insn), req_mode);
317 if (GET_CODE (PATTERN (insn)) == PARALLEL)
318 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
320 rtx set = XVECEXP (PATTERN (insn), 0, i);
321 if (GET_CODE (set) == SET)
322 if (!s390_match_ccmode_set (set, req_mode))
329 /* If a test-under-mask instruction can be used to implement
330 (compare (and ... OP1) OP2), return the CC mode required
331 to do that. Otherwise, return VOIDmode.
332 MIXED is true if the instruction can distinguish between
333 CC1 and CC2 for mixed selected bits (TMxx), it is false
334 if the instruction cannot (TM). */
337 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
341 /* ??? Fixme: should work on CONST_DOUBLE as well. */
342 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
345 /* Selected bits all zero: CC0. */
346 if (INTVAL (op2) == 0)
349 /* Selected bits all one: CC3. */
350 if (INTVAL (op2) == INTVAL (op1))
353 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. */
356 bit1 = exact_log2 (INTVAL (op2));
357 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
358 if (bit0 != -1 && bit1 != -1)
359 return bit0 > bit1 ? CCT1mode : CCT2mode;
365 /* Given a comparison code OP (EQ, NE, etc.) and the operands
366 OP0 and OP1 of a COMPARE, return the mode to be used for the
370 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
376 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
377 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
379 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
380 || GET_CODE (op1) == NEG)
381 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
384 if (GET_CODE (op0) == AND)
386 /* Check whether we can potentially do it via TM. */
387 enum machine_mode ccmode;
388 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
389 if (ccmode != VOIDmode)
391 /* Relax CCTmode to CCZmode to allow fall-back to AND
392 if that turns out to be beneficial. */
393 return ccmode == CCTmode ? CCZmode : ccmode;
397 if (register_operand (op0, HImode)
398 && GET_CODE (op1) == CONST_INT
399 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
401 if (register_operand (op0, QImode)
402 && GET_CODE (op1) == CONST_INT
403 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
412 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
413 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (XEXP (op0, 1)), 'K', "K"))
415 if (INTVAL (XEXP((op0), 1)) < 0)
428 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
429 && GET_CODE (op1) != CONST_INT)
435 if (GET_CODE (op0) == PLUS
436 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
439 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
440 && GET_CODE (op1) != CONST_INT)
446 if (GET_CODE (op0) == MINUS
447 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
450 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
451 && GET_CODE (op1) != CONST_INT)
460 /* Return nonzero if OP is a valid comparison operator
461 for an ALC condition in mode MODE. */
464 s390_alc_comparison (rtx op, enum machine_mode mode)
466 if (mode != VOIDmode && mode != GET_MODE (op))
469 if (GET_RTX_CLASS (GET_CODE (op)) != '<')
472 if (GET_CODE (XEXP (op, 0)) != REG
473 || REGNO (XEXP (op, 0)) != CC_REGNUM
474 || XEXP (op, 1) != const0_rtx)
477 switch (GET_MODE (XEXP (op, 0)))
480 return GET_CODE (op) == LTU;
483 return GET_CODE (op) == LEU;
486 return GET_CODE (op) == GTU;
489 return GET_CODE (op) == LTU;
492 return GET_CODE (op) == UNGT;
495 return GET_CODE (op) == UNLT;
502 /* Return nonzero if OP is a valid comparison operator
503 for an SLB condition in mode MODE. */
506 s390_slb_comparison (rtx op, enum machine_mode mode)
508 if (mode != VOIDmode && mode != GET_MODE (op))
511 if (GET_RTX_CLASS (GET_CODE (op)) != '<')
514 if (GET_CODE (XEXP (op, 0)) != REG
515 || REGNO (XEXP (op, 0)) != CC_REGNUM
516 || XEXP (op, 1) != const0_rtx)
519 switch (GET_MODE (XEXP (op, 0)))
522 return GET_CODE (op) == GEU;
525 return GET_CODE (op) == GTU;
528 return GET_CODE (op) == LEU;
531 return GET_CODE (op) == GEU;
534 return GET_CODE (op) == LE;
537 return GET_CODE (op) == GE;
544 /* Return branch condition mask to implement a branch
545 specified by CODE. */
548 s390_branch_condition_mask (rtx code)
550 const int CC0 = 1 << 3;
551 const int CC1 = 1 << 2;
552 const int CC2 = 1 << 1;
553 const int CC3 = 1 << 0;
555 if (GET_CODE (XEXP (code, 0)) != REG
556 || REGNO (XEXP (code, 0)) != CC_REGNUM
557 || XEXP (code, 1) != const0_rtx)
560 switch (GET_MODE (XEXP (code, 0)))
563 switch (GET_CODE (code))
566 case NE: return CC1 | CC2 | CC3;
573 switch (GET_CODE (code))
576 case NE: return CC0 | CC2 | CC3;
583 switch (GET_CODE (code))
586 case NE: return CC0 | CC1 | CC3;
593 switch (GET_CODE (code))
596 case NE: return CC0 | CC1 | CC2;
603 switch (GET_CODE (code))
605 case EQ: return CC0 | CC2;
606 case NE: return CC1 | CC3;
613 switch (GET_CODE (code))
615 case LTU: return CC2 | CC3; /* carry */
616 case GEU: return CC0 | CC1; /* no carry */
623 switch (GET_CODE (code))
625 case GTU: return CC0 | CC1; /* borrow */
626 case LEU: return CC2 | CC3; /* no borrow */
633 switch (GET_CODE (code))
636 case NE: return CC1 | CC2 | CC3;
637 case LTU: return CC1;
638 case GTU: return CC2;
639 case LEU: return CC0 | CC1;
640 case GEU: return CC0 | CC2;
647 switch (GET_CODE (code))
650 case NE: return CC2 | CC1 | CC3;
651 case LTU: return CC2;
652 case GTU: return CC1;
653 case LEU: return CC0 | CC2;
654 case GEU: return CC0 | CC1;
661 switch (GET_CODE (code))
664 case NE: return CC1 | CC2 | CC3;
665 case LT: return CC1 | CC3;
667 case LE: return CC0 | CC1 | CC3;
668 case GE: return CC0 | CC2;
675 switch (GET_CODE (code))
678 case NE: return CC1 | CC2 | CC3;
680 case GT: return CC2 | CC3;
681 case LE: return CC0 | CC1;
682 case GE: return CC0 | CC2 | CC3;
689 switch (GET_CODE (code))
692 case NE: return CC1 | CC2 | CC3;
695 case LE: return CC0 | CC1;
696 case GE: return CC0 | CC2;
697 case UNORDERED: return CC3;
698 case ORDERED: return CC0 | CC1 | CC2;
699 case UNEQ: return CC0 | CC3;
700 case UNLT: return CC1 | CC3;
701 case UNGT: return CC2 | CC3;
702 case UNLE: return CC0 | CC1 | CC3;
703 case UNGE: return CC0 | CC2 | CC3;
704 case LTGT: return CC1 | CC2;
711 switch (GET_CODE (code))
714 case NE: return CC2 | CC1 | CC3;
717 case LE: return CC0 | CC2;
718 case GE: return CC0 | CC1;
719 case UNORDERED: return CC3;
720 case ORDERED: return CC0 | CC2 | CC1;
721 case UNEQ: return CC0 | CC3;
722 case UNLT: return CC2 | CC3;
723 case UNGT: return CC1 | CC3;
724 case UNLE: return CC0 | CC2 | CC3;
725 case UNGE: return CC0 | CC1 | CC3;
726 case LTGT: return CC2 | CC1;
737 /* If INV is false, return assembler mnemonic string to implement
738 a branch specified by CODE. If INV is true, return mnemonic
739 for the corresponding inverted branch. */
742 s390_branch_condition_mnemonic (rtx code, int inv)
744 static const char *const mnemonic[16] =
746 NULL, "o", "h", "nle",
747 "l", "nhe", "lh", "ne",
748 "e", "nlh", "he", "nl",
749 "le", "nh", "no", NULL
752 int mask = s390_branch_condition_mask (code);
757 if (mask < 1 || mask > 14)
760 return mnemonic[mask];
763 /* Return the part of op which has a value different from def.
764 The size of the part is determined by mode.
765 Use this function only if you already know that op really
766 contains such a part. */
768 unsigned HOST_WIDE_INT
769 s390_extract_part (rtx op, enum machine_mode mode, int def)
771 unsigned HOST_WIDE_INT value = 0;
772 int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode);
773 int part_bits = GET_MODE_BITSIZE (mode);
774 unsigned HOST_WIDE_INT part_mask = (1 << part_bits) - 1;
777 for (i = 0; i < max_parts; i++)
780 value = (unsigned HOST_WIDE_INT) INTVAL (op);
784 if ((value & part_mask) != (def & part_mask))
785 return value & part_mask;
791 /* If OP is an integer constant of mode MODE with exactly one
792 part of mode PART_MODE unequal to DEF, return the number of that
793 part. Otherwise, return -1. */
796 s390_single_part (rtx op,
797 enum machine_mode mode,
798 enum machine_mode part_mode,
801 unsigned HOST_WIDE_INT value = 0;
802 int n_parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (part_mode);
803 unsigned HOST_WIDE_INT part_mask = (1 << GET_MODE_BITSIZE (part_mode)) - 1;
806 if (GET_CODE (op) != CONST_INT)
809 for (i = 0; i < n_parts; i++)
812 value = (unsigned HOST_WIDE_INT) INTVAL (op);
814 value >>= GET_MODE_BITSIZE (part_mode);
816 if ((value & part_mask) != (def & part_mask))
824 return part == -1 ? -1 : n_parts - 1 - part;
827 /* Check whether we can (and want to) split a double-word
828 move in mode MODE from SRC to DST into two single-word
829 moves, moving the subword FIRST_SUBWORD first. */
832 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
834 /* Floating point registers cannot be split. */
835 if (FP_REG_P (src) || FP_REG_P (dst))
838 /* We don't need to split if operands are directly accessible. */
839 if (s_operand (src, mode) || s_operand (dst, mode))
842 /* Non-offsettable memory references cannot be split. */
843 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
844 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
847 /* Moving the first subword must not clobber a register
848 needed to move the second subword. */
849 if (register_operand (dst, mode))
851 rtx subreg = operand_subword (dst, first_subword, 0, mode);
852 if (reg_overlap_mentioned_p (subreg, src))
860 /* Change optimizations to be performed, depending on the
863 LEVEL is the optimization level specified; 2 if `-O2' is
864 specified, 1 if `-O' is specified, and 0 if neither is specified.
866 SIZE is nonzero if `-Os' is specified and zero otherwise. */
869 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
871 /* ??? There are apparently still problems with -fcaller-saves. */
872 flag_caller_saves = 0;
874 /* By default, always emit DWARF-2 unwind info. This allows debugging
875 without maintaining a stack frame back-chain. */
876 flag_asynchronous_unwind_tables = 1;
880 override_options (void)
885 const char *const name; /* processor name or nickname. */
886 const enum processor_type processor;
887 const enum processor_flags flags;
889 const processor_alias_table[] =
891 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
892 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
893 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
894 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
895 | PF_LONG_DISPLACEMENT},
898 int const pta_size = ARRAY_SIZE (processor_alias_table);
900 /* Acquire a unique set number for our register saves and restores. */
901 s390_sr_alias_set = new_alias_set ();
903 /* Set up function hooks. */
904 init_machine_status = s390_init_machine_status;
906 /* Architecture mode defaults according to ABI. */
907 if (!(target_flags_explicit & MASK_ZARCH))
910 target_flags |= MASK_ZARCH;
912 target_flags &= ~MASK_ZARCH;
915 /* Determine processor architectural level. */
916 if (!s390_arch_string)
917 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
919 for (i = 0; i < pta_size; i++)
920 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
922 s390_arch = processor_alias_table[i].processor;
923 s390_arch_flags = processor_alias_table[i].flags;
927 error ("Unknown cpu used in -march=%s.", s390_arch_string);
929 /* Determine processor to tune for. */
930 if (!s390_tune_string)
932 s390_tune = s390_arch;
933 s390_tune_flags = s390_arch_flags;
934 s390_tune_string = s390_arch_string;
938 for (i = 0; i < pta_size; i++)
939 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
941 s390_tune = processor_alias_table[i].processor;
942 s390_tune_flags = processor_alias_table[i].flags;
946 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
950 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
951 error ("z/Architecture mode not supported on %s.", s390_arch_string);
952 if (TARGET_64BIT && !TARGET_ZARCH)
953 error ("64-bit ABI not supported in ESA/390 mode.");
956 /* Map for smallest class containing reg regno. */
958 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
959 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
960 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
961 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
962 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
963 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
964 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
965 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
966 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
967 ADDR_REGS, NO_REGS, ADDR_REGS
970 /* Return attribute type of insn. */
972 static enum attr_type
973 s390_safe_attr_type (rtx insn)
975 if (recog_memoized (insn) >= 0)
976 return get_attr_type (insn);
981 /* Return true if OP a (const_int 0) operand.
982 OP is the current operation.
983 MODE is the current operation mode. */
986 const0_operand (register rtx op, enum machine_mode mode)
988 return op == CONST0_RTX (mode);
991 /* Return true if OP is constant.
992 OP is the current operation.
993 MODE is the current operation mode. */
996 consttable_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
998 return CONSTANT_P (op);
1001 /* Return true if the mode of operand OP matches MODE.
1002 If MODE is set to VOIDmode, set it to the mode of OP. */
1005 check_mode (register rtx op, enum machine_mode *mode)
1007 if (*mode == VOIDmode)
1008 *mode = GET_MODE (op);
1011 if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode)
1017 /* Return true if OP a valid operand for the LARL instruction.
1018 OP is the current operation.
1019 MODE is the current operation mode. */
1022 larl_operand (register rtx op, enum machine_mode mode)
1024 if (! check_mode (op, &mode))
1027 /* Allow labels and local symbols. */
1028 if (GET_CODE (op) == LABEL_REF)
1030 if (GET_CODE (op) == SYMBOL_REF)
1031 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1032 && SYMBOL_REF_TLS_MODEL (op) == 0
1033 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1035 /* Everything else must have a CONST, so strip it. */
1036 if (GET_CODE (op) != CONST)
1040 /* Allow adding *even* in-range constants. */
1041 if (GET_CODE (op) == PLUS)
1043 if (GET_CODE (XEXP (op, 1)) != CONST_INT
1044 || (INTVAL (XEXP (op, 1)) & 1) != 0)
1046 #if HOST_BITS_PER_WIDE_INT > 32
1047 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
1048 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
1054 /* Labels and local symbols allowed here as well. */
1055 if (GET_CODE (op) == LABEL_REF)
1057 if (GET_CODE (op) == SYMBOL_REF)
1058 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1059 && SYMBOL_REF_TLS_MODEL (op) == 0
1060 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1062 /* Now we must have a @GOTENT offset or @PLT stub
1063 or an @INDNTPOFF TLS offset. */
1064 if (GET_CODE (op) == UNSPEC
1065 && XINT (op, 1) == UNSPEC_GOTENT)
1067 if (GET_CODE (op) == UNSPEC
1068 && XINT (op, 1) == UNSPEC_PLT)
1070 if (GET_CODE (op) == UNSPEC
1071 && XINT (op, 1) == UNSPEC_INDNTPOFF)
1077 /* Helper routine to implement s_operand and s_imm_operand.
1078 OP is the current operation.
1079 MODE is the current operation mode.
1080 ALLOW_IMMEDIATE specifies whether immediate operands should
1081 be accepted or not. */
1084 general_s_operand (register rtx op, enum machine_mode mode,
1085 int allow_immediate)
1087 struct s390_address addr;
1089 /* Call general_operand first, so that we don't have to
1090 check for many special cases. */
1091 if (!general_operand (op, mode))
1094 /* Just like memory_operand, allow (subreg (mem ...))
1096 if (reload_completed
1097 && GET_CODE (op) == SUBREG
1098 && GET_CODE (SUBREG_REG (op)) == MEM)
1099 op = SUBREG_REG (op);
1101 switch (GET_CODE (op))
1103 /* Constants are OK as s-operand if ALLOW_IMMEDIATE
1104 is true and we are still before reload. */
1107 if (!allow_immediate || reload_completed)
1111 /* Memory operands are OK unless they already use an
1114 if (GET_CODE (XEXP (op, 0)) == ADDRESSOF)
1116 if (!s390_decompose_address (XEXP (op, 0), &addr))
1120 /* Do not allow literal pool references unless ALLOW_IMMEDIATE
1121 is true. This prevents compares between two literal pool
1122 entries from being accepted. */
1123 if (!allow_immediate
1124 && addr.base && REGNO (addr.base) == BASE_REGISTER)
1135 /* Return true if OP is a valid S-type operand.
1136 OP is the current operation.
1137 MODE is the current operation mode. */
1140 s_operand (register rtx op, enum machine_mode mode)
1142 return general_s_operand (op, mode, 0);
1145 /* Return true if OP is a valid S-type operand or an immediate
1146 operand that can be addressed as S-type operand by forcing
1147 it into the literal pool.
1148 OP is the current operation.
1149 MODE is the current operation mode. */
1152 s_imm_operand (register rtx op, enum machine_mode mode)
1154 return general_s_operand (op, mode, 1);
1157 /* Return true if OP a valid shift count operand.
1158 OP is the current operation.
1159 MODE is the current operation mode. */
1162 shift_count_operand (rtx op, enum machine_mode mode)
1164 HOST_WIDE_INT offset = 0;
1166 if (! check_mode (op, &mode))
1169 /* We can have an integer constant, an address register,
1170 or a sum of the two. Note that reload already checks
1171 that any register present is an address register, so
1172 we just check for any register here. */
1173 if (GET_CODE (op) == CONST_INT)
1175 offset = INTVAL (op);
1178 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
1180 offset = INTVAL (XEXP (op, 1));
1183 while (op && GET_CODE (op) == SUBREG)
1184 op = SUBREG_REG (op);
1185 if (op && GET_CODE (op) != REG)
1188 /* Unfortunately we have to reject constants that are invalid
1189 for an address, or else reload will get confused. */
1190 if (!DISP_IN_RANGE (offset))
1196 /* Return true if DISP is a valid short displacement. */
1199 s390_short_displacement (rtx disp)
1201 /* No displacement is OK. */
1205 /* Integer displacement in range. */
1206 if (GET_CODE (disp) == CONST_INT)
1207 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1209 /* GOT offset is not OK, the GOT can be large. */
1210 if (GET_CODE (disp) == CONST
1211 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1212 && XINT (XEXP (disp, 0), 1) == UNSPEC_GOT)
1215 /* All other symbolic constants are literal pool references,
1216 which are OK as the literal pool must be small. */
1217 if (GET_CODE (disp) == CONST)
1223 /* Return true if OP is a valid operand for a C constraint. */
1226 s390_extra_constraint_str (rtx op, int c, const char * str)
1228 struct s390_address addr;
1236 if (GET_CODE (op) != MEM)
1238 if (!s390_decompose_address (XEXP (op, 0), &addr))
1243 if (TARGET_LONG_DISPLACEMENT)
1245 if (!s390_short_displacement (addr.disp))
1251 if (GET_CODE (op) != MEM)
1254 if (TARGET_LONG_DISPLACEMENT)
1256 if (!s390_decompose_address (XEXP (op, 0), &addr))
1258 if (!s390_short_displacement (addr.disp))
1264 if (!TARGET_LONG_DISPLACEMENT)
1266 if (GET_CODE (op) != MEM)
1268 if (!s390_decompose_address (XEXP (op, 0), &addr))
1272 if (s390_short_displacement (addr.disp))
1277 if (!TARGET_LONG_DISPLACEMENT)
1279 if (GET_CODE (op) != MEM)
1281 /* Any invalid address here will be fixed up by reload,
1282 so accept it for the most generic constraint. */
1283 if (s390_decompose_address (XEXP (op, 0), &addr)
1284 && s390_short_displacement (addr.disp))
1289 if (TARGET_LONG_DISPLACEMENT)
1291 if (!s390_decompose_address (op, &addr))
1293 if (!s390_short_displacement (addr.disp))
1299 if (!TARGET_LONG_DISPLACEMENT)
1301 /* Any invalid address here will be fixed up by reload,
1302 so accept it for the most generic constraint. */
1303 if (s390_decompose_address (op, &addr)
1304 && s390_short_displacement (addr.disp))
1309 return shift_count_operand (op, VOIDmode);
1318 /* Return true if VALUE matches the constraint STR. */
1321 s390_const_ok_for_constraint_p (HOST_WIDE_INT value,
1325 enum machine_mode mode, part_mode;
1335 return (unsigned int)value < 256;
1338 return (unsigned int)value < 4096;
1341 return value >= -32768 && value < 32768;
1344 return (TARGET_LONG_DISPLACEMENT ?
1345 (value >= -524288 && value <= 524287)
1346 : (value >= 0 && value <= 4095));
1348 return value == 2147483647;
1351 part = str[1] - '0';
1355 case 'H': part_mode = HImode; break;
1356 case 'Q': part_mode = QImode; break;
1362 case 'H': mode = HImode; break;
1363 case 'S': mode = SImode; break;
1364 case 'D': mode = DImode; break;
1370 case '0': def = 0; break;
1371 case 'F': def = -1; break;
1375 if (GET_MODE_SIZE (mode) <= GET_MODE_SIZE (part_mode))
1378 if (s390_single_part (GEN_INT (value), mode, part_mode, def) != part)
1390 /* Compute a (partial) cost for rtx X. Return true if the complete
1391 cost has been computed, and false if subexpressions should be
1392 scanned. In either case, *TOTAL contains the cost result. */
1395 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1400 if (GET_CODE (XEXP (x, 0)) == MINUS
1401 && GET_CODE (XEXP (XEXP (x, 0), 1)) != CONST_INT)
1408 /* Force_const_mem does not work out of reload, because the
1409 saveable_obstack is set to reload_obstack, which does not
1410 live long enough. Because of this we cannot use force_const_mem
1411 in addsi3. This leads to problems with gen_add2_insn with a
1412 constant greater than a short. Because of that we give an
1413 addition of greater constants a cost of 3 (reload1.c 10096). */
1414 /* ??? saveable_obstack no longer exists. */
1415 if (outer_code == PLUS
1416 && (INTVAL (x) > 32767 || INTVAL (x) < -32768))
1417 *total = COSTS_N_INSNS (3);
1438 *total = COSTS_N_INSNS (1);
1442 if (GET_MODE (XEXP (x, 0)) == DImode)
1443 *total = COSTS_N_INSNS (40);
1445 *total = COSTS_N_INSNS (7);
1452 *total = COSTS_N_INSNS (33);
1460 /* Return the cost of an address rtx ADDR. */
1463 s390_address_cost (rtx addr)
1465 struct s390_address ad;
1466 if (!s390_decompose_address (addr, &ad))
1469 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
1472 /* Return true if OP is a valid operand for the BRAS instruction.
1473 OP is the current operation.
1474 MODE is the current operation mode. */
1477 bras_sym_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1479 register enum rtx_code code = GET_CODE (op);
1481 /* Allow SYMBOL_REFs. */
1482 if (code == SYMBOL_REF)
1485 /* Allow @PLT stubs. */
1487 && GET_CODE (XEXP (op, 0)) == UNSPEC
1488 && XINT (XEXP (op, 0), 1) == UNSPEC_PLT)
1493 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
1494 otherwise return 0. */
1497 tls_symbolic_operand (register rtx op)
1499 if (GET_CODE (op) != SYMBOL_REF)
1501 return SYMBOL_REF_TLS_MODEL (op);
1504 /* Return true if OP is a load multiple operation. It is known to be a
1505 PARALLEL and the first section will be tested.
1506 OP is the current operation.
1507 MODE is the current operation mode. */
1510 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1512 enum machine_mode elt_mode;
1513 int count = XVECLEN (op, 0);
1514 unsigned int dest_regno;
1519 /* Perform a quick check so we don't blow up below. */
1521 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1522 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1523 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1526 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1527 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1528 elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
1530 /* Check, is base, or base + displacement. */
1532 if (GET_CODE (src_addr) == REG)
1534 else if (GET_CODE (src_addr) == PLUS
1535 && GET_CODE (XEXP (src_addr, 0)) == REG
1536 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
1538 off = INTVAL (XEXP (src_addr, 1));
1539 src_addr = XEXP (src_addr, 0);
1544 if (src_addr == frame_pointer_rtx || src_addr == arg_pointer_rtx)
1547 for (i = 1; i < count; i++)
1549 rtx elt = XVECEXP (op, 0, i);
1551 if (GET_CODE (elt) != SET
1552 || GET_CODE (SET_DEST (elt)) != REG
1553 || GET_MODE (SET_DEST (elt)) != elt_mode
1554 || REGNO (SET_DEST (elt)) != dest_regno + i
1555 || GET_CODE (SET_SRC (elt)) != MEM
1556 || GET_MODE (SET_SRC (elt)) != elt_mode
1557 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1558 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1559 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1560 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
1561 != off + i * GET_MODE_SIZE (elt_mode))
1568 /* Return true if OP is a store multiple operation. It is known to be a
1569 PARALLEL and the first section will be tested.
1570 OP is the current operation.
1571 MODE is the current operation mode. */
1574 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1576 enum machine_mode elt_mode;
1577 int count = XVECLEN (op, 0);
1578 unsigned int src_regno;
1582 /* Perform a quick check so we don't blow up below. */
1584 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1585 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1586 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1589 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1590 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1591 elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
1593 /* Check, is base, or base + displacement. */
1595 if (GET_CODE (dest_addr) == REG)
1597 else if (GET_CODE (dest_addr) == PLUS
1598 && GET_CODE (XEXP (dest_addr, 0)) == REG
1599 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
1601 off = INTVAL (XEXP (dest_addr, 1));
1602 dest_addr = XEXP (dest_addr, 0);
1607 if (dest_addr == frame_pointer_rtx || dest_addr == arg_pointer_rtx)
1610 for (i = 1; i < count; i++)
1612 rtx elt = XVECEXP (op, 0, i);
1614 if (GET_CODE (elt) != SET
1615 || GET_CODE (SET_SRC (elt)) != REG
1616 || GET_MODE (SET_SRC (elt)) != elt_mode
1617 || REGNO (SET_SRC (elt)) != src_regno + i
1618 || GET_CODE (SET_DEST (elt)) != MEM
1619 || GET_MODE (SET_DEST (elt)) != elt_mode
1620 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1621 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1622 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1623 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
1624 != off + i * GET_MODE_SIZE (elt_mode))
1631 /* Return true if OP contains a symbol reference */
1634 symbolic_reference_mentioned_p (rtx op)
1636 register const char *fmt;
1639 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
1642 fmt = GET_RTX_FORMAT (GET_CODE (op));
1643 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1649 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1650 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1654 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
1661 /* Return true if OP contains a reference to a thread-local symbol. */
1664 tls_symbolic_reference_mentioned_p (rtx op)
1666 register const char *fmt;
1669 if (GET_CODE (op) == SYMBOL_REF)
1670 return tls_symbolic_operand (op);
1672 fmt = GET_RTX_FORMAT (GET_CODE (op));
1673 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1679 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1680 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1684 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
1692 /* Return true if OP is a legitimate general operand when
1693 generating PIC code. It is given that flag_pic is on
1694 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1697 legitimate_pic_operand_p (register rtx op)
1699 /* Accept all non-symbolic constants. */
1700 if (!SYMBOLIC_CONST (op))
1703 /* Reject everything else; must be handled
1704 via emit_symbolic_move. */
1708 /* Returns true if the constant value OP is a legitimate general operand.
1709 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1712 legitimate_constant_p (register rtx op)
1714 /* Accept all non-symbolic constants. */
1715 if (!SYMBOLIC_CONST (op))
1718 /* Accept immediate LARL operands. */
1719 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
1722 /* Thread-local symbols are never legal constants. This is
1723 so that emit_call knows that computing such addresses
1724 might require a function call. */
1725 if (TLS_SYMBOLIC_CONST (op))
1728 /* In the PIC case, symbolic constants must *not* be
1729 forced into the literal pool. We accept them here,
1730 so that they will be handled by emit_symbolic_move. */
1734 /* All remaining non-PIC symbolic constants are
1735 forced into the literal pool. */
1739 /* Determine if it's legal to put X into the constant pool. This
1740 is not possible if X contains the address of a symbol that is
1741 not constant (TLS) or not known at final link time (PIC). */
1744 s390_cannot_force_const_mem (rtx x)
1746 switch (GET_CODE (x))
1750 /* Accept all non-symbolic constants. */
1754 /* Labels are OK iff we are non-PIC. */
1755 return flag_pic != 0;
1758 /* 'Naked' TLS symbol references are never OK,
1759 non-TLS symbols are OK iff we are non-PIC. */
1760 if (tls_symbolic_operand (x))
1763 return flag_pic != 0;
1766 return s390_cannot_force_const_mem (XEXP (x, 0));
1769 return s390_cannot_force_const_mem (XEXP (x, 0))
1770 || s390_cannot_force_const_mem (XEXP (x, 1));
1773 switch (XINT (x, 1))
1775 /* Only lt-relative or GOT-relative UNSPECs are OK. */
1776 case UNSPEC_LTREL_OFFSET:
1784 case UNSPEC_GOTNTPOFF:
1785 case UNSPEC_INDNTPOFF:
1798 /* Returns true if the constant value OP is a legitimate general
1799 operand during and after reload. The difference to
1800 legitimate_constant_p is that this function will not accept
1801 a constant that would need to be forced to the literal pool
1802 before it can be used as operand. */
1805 legitimate_reload_constant_p (register rtx op)
1807 /* Accept la(y) operands. */
1808 if (GET_CODE (op) == CONST_INT
1809 && DISP_IN_RANGE (INTVAL (op)))
1812 /* Accept l(g)hi operands. */
1813 if (GET_CODE (op) == CONST_INT
1814 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (op), 'K', "K"))
1817 /* Accept lliXX operands. */
1819 && s390_single_part (op, DImode, HImode, 0) >= 0)
1822 /* Accept larl operands. */
1823 if (TARGET_CPU_ZARCH
1824 && larl_operand (op, VOIDmode))
1827 /* Everything else cannot be handled without reload. */
1831 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
1832 return the class of reg to actually use. */
1835 s390_preferred_reload_class (rtx op, enum reg_class class)
1837 /* This can happen if a floating point constant is being
1838 reloaded into an integer register. Leave well alone. */
1839 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
1840 && class != FP_REGS)
1843 switch (GET_CODE (op))
1845 /* Constants we cannot reload must be forced into the
1850 if (legitimate_reload_constant_p (op))
1855 /* If a symbolic constant or a PLUS is reloaded,
1856 it is most likely being used as an address, so
1857 prefer ADDR_REGS. If 'class' is not a superset
1858 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
1863 if (reg_class_subset_p (ADDR_REGS, class))
1875 /* Return the register class of a scratch register needed to
1876 load IN into a register of class CLASS in MODE.
1878 We need a temporary when loading a PLUS expression which
1879 is not a legitimate operand of the LOAD ADDRESS instruction. */
1882 s390_secondary_input_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
1883 enum machine_mode mode, rtx in)
1885 if (s390_plus_operand (in, mode))
1891 /* Return the register class of a scratch register needed to
1892 store a register of class CLASS in MODE into OUT:
1894 We need a temporary when storing a double-word to a
1895 non-offsettable memory address. */
1898 s390_secondary_output_reload_class (enum reg_class class,
1899 enum machine_mode mode, rtx out)
1901 if ((TARGET_64BIT ? mode == TImode
1902 : (mode == DImode || mode == DFmode))
1903 && reg_classes_intersect_p (GENERAL_REGS, class)
1904 && GET_CODE (out) == MEM
1905 && !offsettable_memref_p (out)
1906 && !s_operand (out, VOIDmode))
1912 /* Return true if OP is a PLUS that is not a legitimate
1913 operand for the LA instruction.
1914 OP is the current operation.
1915 MODE is the current operation mode. */
1918 s390_plus_operand (register rtx op, enum machine_mode mode)
1920 if (!check_mode (op, &mode) || mode != Pmode)
1923 if (GET_CODE (op) != PLUS)
1926 if (legitimate_la_operand_p (op))
1932 /* Generate code to load SRC, which is PLUS that is not a
1933 legitimate operand for the LA instruction, into TARGET.
1934 SCRATCH may be used as scratch register. */
1937 s390_expand_plus_operand (register rtx target, register rtx src,
1938 register rtx scratch)
1941 struct s390_address ad;
1943 /* src must be a PLUS; get its two operands. */
1944 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
1947 /* Check if any of the two operands is already scheduled
1948 for replacement by reload. This can happen e.g. when
1949 float registers occur in an address. */
1950 sum1 = find_replacement (&XEXP (src, 0));
1951 sum2 = find_replacement (&XEXP (src, 1));
1952 src = gen_rtx_PLUS (Pmode, sum1, sum2);
1954 /* If the address is already strictly valid, there's nothing to do. */
1955 if (!s390_decompose_address (src, &ad)
1956 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
1957 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
1959 /* Otherwise, one of the operands cannot be an address register;
1960 we reload its value into the scratch register. */
1961 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
1963 emit_move_insn (scratch, sum1);
1966 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
1968 emit_move_insn (scratch, sum2);
1972 /* According to the way these invalid addresses are generated
1973 in reload.c, it should never happen (at least on s390) that
1974 *neither* of the PLUS components, after find_replacements
1975 was applied, is an address register. */
1976 if (sum1 == scratch && sum2 == scratch)
1982 src = gen_rtx_PLUS (Pmode, sum1, sum2);
1985 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
1986 is only ever performed on addresses, so we can mark the
1987 sum as legitimate for LA in any case. */
1988 s390_load_address (target, src);
1992 /* Decompose a RTL expression ADDR for a memory address into
1993 its components, returned in OUT.
1995 Returns 0 if ADDR is not a valid memory address, nonzero
1996 otherwise. If OUT is NULL, don't return the components,
1997 but check for validity only.
1999 Note: Only addresses in canonical form are recognized.
2000 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2001 canonical form so that they will be recognized. */
2004 s390_decompose_address (register rtx addr, struct s390_address *out)
2006 rtx base = NULL_RTX;
2007 rtx indx = NULL_RTX;
2008 rtx disp = NULL_RTX;
2009 int pointer = FALSE;
2010 int base_ptr = FALSE;
2011 int indx_ptr = FALSE;
2013 /* Decompose address into base + index + displacement. */
2015 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2018 else if (GET_CODE (addr) == PLUS)
2020 rtx op0 = XEXP (addr, 0);
2021 rtx op1 = XEXP (addr, 1);
2022 enum rtx_code code0 = GET_CODE (op0);
2023 enum rtx_code code1 = GET_CODE (op1);
2025 if (code0 == REG || code0 == UNSPEC)
2027 if (code1 == REG || code1 == UNSPEC)
2029 indx = op0; /* index + base */
2035 base = op0; /* base + displacement */
2040 else if (code0 == PLUS)
2042 indx = XEXP (op0, 0); /* index + base + disp */
2043 base = XEXP (op0, 1);
2054 disp = addr; /* displacement */
2057 /* Validate base register. */
2060 if (GET_CODE (base) == UNSPEC)
2062 if (XVECLEN (base, 0) != 1 || XINT (base, 1) != UNSPEC_LTREL_BASE)
2064 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2067 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2070 if (REGNO (base) == BASE_REGISTER
2071 || REGNO (base) == STACK_POINTER_REGNUM
2072 || REGNO (base) == FRAME_POINTER_REGNUM
2073 || ((reload_completed || reload_in_progress)
2074 && frame_pointer_needed
2075 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2076 || REGNO (base) == ARG_POINTER_REGNUM
2077 || (REGNO (base) >= FIRST_VIRTUAL_REGISTER
2078 && REGNO (base) <= LAST_VIRTUAL_REGISTER)
2080 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2081 pointer = base_ptr = TRUE;
2084 /* Validate index register. */
2087 if (GET_CODE (indx) == UNSPEC)
2089 if (XVECLEN (indx, 0) != 1 || XINT (indx, 1) != UNSPEC_LTREL_BASE)
2091 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2094 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2097 if (REGNO (indx) == BASE_REGISTER
2098 || REGNO (indx) == STACK_POINTER_REGNUM
2099 || REGNO (indx) == FRAME_POINTER_REGNUM
2100 || ((reload_completed || reload_in_progress)
2101 && frame_pointer_needed
2102 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2103 || REGNO (indx) == ARG_POINTER_REGNUM
2104 || (REGNO (indx) >= FIRST_VIRTUAL_REGISTER
2105 && REGNO (indx) <= LAST_VIRTUAL_REGISTER)
2107 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2108 pointer = indx_ptr = TRUE;
2111 /* Prefer to use pointer as base, not index. */
2112 if (base && indx && !base_ptr
2113 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2120 /* Validate displacement. */
2123 /* Allow integer constant in range. */
2124 if (GET_CODE (disp) == CONST_INT)
2126 /* If the argument pointer is involved, the displacement will change
2127 later anyway as the argument pointer gets eliminated. This could
2128 make a valid displacement invalid, but it is more likely to make
2129 an invalid displacement valid, because we sometimes access the
2130 register save area via negative offsets to the arg pointer.
2131 Thus we don't check the displacement for validity here. If after
2132 elimination the displacement turns out to be invalid after all,
2133 this is fixed up by reload in any case. */
2134 if (base != arg_pointer_rtx && indx != arg_pointer_rtx)
2136 if (!DISP_IN_RANGE (INTVAL (disp)))
2141 /* In the small-PIC case, the linker converts @GOT
2142 and @GOTNTPOFF offsets to possible displacements. */
2143 else if (GET_CODE (disp) == CONST
2144 && GET_CODE (XEXP (disp, 0)) == UNSPEC
2145 && (XINT (XEXP (disp, 0), 1) == UNSPEC_GOT
2146 || XINT (XEXP (disp, 0), 1) == UNSPEC_GOTNTPOFF))
2154 /* Accept chunkfied literal pool symbol references. */
2155 else if (GET_CODE (disp) == CONST
2156 && GET_CODE (XEXP (disp, 0)) == MINUS
2157 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == LABEL_REF
2158 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == LABEL_REF)
2163 /* Likewise if a constant offset is present. */
2164 else if (GET_CODE (disp) == CONST
2165 && GET_CODE (XEXP (disp, 0)) == PLUS
2166 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT
2167 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == MINUS
2168 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 0)) == LABEL_REF
2169 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 1)) == LABEL_REF)
2174 /* We can convert literal pool addresses to
2175 displacements by basing them off the base register. */
2178 /* In some cases, we can accept an additional
2179 small constant offset. Split these off here. */
2181 unsigned int offset = 0;
2183 if (GET_CODE (disp) == CONST
2184 && GET_CODE (XEXP (disp, 0)) == PLUS
2185 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2187 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2188 disp = XEXP (XEXP (disp, 0), 0);
2191 /* Now we must have a literal pool address. */
2192 if (GET_CODE (disp) != SYMBOL_REF
2193 || !CONSTANT_POOL_ADDRESS_P (disp))
2196 /* If we have an offset, make sure it does not
2197 exceed the size of the constant pool entry. */
2198 if (offset && offset >= GET_MODE_SIZE (get_pool_mode (disp)))
2201 /* Either base or index must be free to
2202 hold the base register. */
2206 /* Convert the address. */
2208 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2210 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2212 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2213 UNSPEC_LTREL_OFFSET);
2214 disp = gen_rtx_CONST (Pmode, disp);
2217 disp = plus_constant (disp, offset);
2231 out->pointer = pointer;
2237 /* Return nonzero if ADDR is a valid memory address.
2238 STRICT specifies whether strict register checking applies. */
2241 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2242 register rtx addr, int strict)
2244 struct s390_address ad;
2245 if (!s390_decompose_address (addr, &ad))
2250 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2252 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2257 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2259 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2266 /* Return 1 if OP is a valid operand for the LA instruction.
2267 In 31-bit, we need to prove that the result is used as an
2268 address, as LA performs only a 31-bit addition. */
2271 legitimate_la_operand_p (register rtx op)
2273 struct s390_address addr;
2274 if (!s390_decompose_address (op, &addr))
2277 if (TARGET_64BIT || addr.pointer)
2283 /* Return 1 if OP is a valid operand for the LA instruction,
2284 and we prefer to use LA over addition to compute it. */
2287 preferred_la_operand_p (register rtx op)
2289 struct s390_address addr;
2290 if (!s390_decompose_address (op, &addr))
2293 if (!TARGET_64BIT && !addr.pointer)
2299 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2300 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2306 /* Emit a forced load-address operation to load SRC into DST.
2307 This will use the LOAD ADDRESS instruction even in situations
2308 where legitimate_la_operand_p (SRC) returns false. */
2311 s390_load_address (rtx dst, rtx src)
2314 emit_move_insn (dst, src);
2316 emit_insn (gen_force_la_31 (dst, src));
2319 /* Return a legitimate reference for ORIG (an address) using the
2320 register REG. If REG is 0, a new pseudo is generated.
2322 There are two types of references that must be handled:
2324 1. Global data references must load the address from the GOT, via
2325 the PIC reg. An insn is emitted to do this load, and the reg is
2328 2. Static data references, constant pool addresses, and code labels
2329 compute the address as an offset from the GOT, whose base is in
2330 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2331 differentiate them from global data objects. The returned
2332 address is the PIC reg + an unspec constant.
2334 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2335 reg also appears in the address. */
2338 legitimize_pic_address (rtx orig, rtx reg)
2344 if (GET_CODE (addr) == LABEL_REF
2345 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2347 /* This is a local symbol. */
2348 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2350 /* Access local symbols PC-relative via LARL.
2351 This is the same as in the non-PIC case, so it is
2352 handled automatically ... */
2356 /* Access local symbols relative to the GOT. */
2358 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2360 if (reload_in_progress || reload_completed)
2361 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2363 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2364 addr = gen_rtx_CONST (Pmode, addr);
2365 addr = force_const_mem (Pmode, addr);
2366 emit_move_insn (temp, addr);
2368 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2371 emit_move_insn (reg, new);
2376 else if (GET_CODE (addr) == SYMBOL_REF)
2379 reg = gen_reg_rtx (Pmode);
2383 /* Assume GOT offset < 4k. This is handled the same way
2384 in both 31- and 64-bit code (@GOT). */
2386 if (reload_in_progress || reload_completed)
2387 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2389 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2390 new = gen_rtx_CONST (Pmode, new);
2391 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2392 new = gen_rtx_MEM (Pmode, new);
2393 RTX_UNCHANGING_P (new) = 1;
2394 emit_move_insn (reg, new);
2397 else if (TARGET_CPU_ZARCH)
2399 /* If the GOT offset might be >= 4k, we determine the position
2400 of the GOT entry via a PC-relative LARL (@GOTENT). */
2402 rtx temp = gen_reg_rtx (Pmode);
2404 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
2405 new = gen_rtx_CONST (Pmode, new);
2406 emit_move_insn (temp, new);
2408 new = gen_rtx_MEM (Pmode, temp);
2409 RTX_UNCHANGING_P (new) = 1;
2410 emit_move_insn (reg, new);
2415 /* If the GOT offset might be >= 4k, we have to load it
2416 from the literal pool (@GOT). */
2418 rtx temp = gen_reg_rtx (Pmode);
2420 if (reload_in_progress || reload_completed)
2421 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2423 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2424 addr = gen_rtx_CONST (Pmode, addr);
2425 addr = force_const_mem (Pmode, addr);
2426 emit_move_insn (temp, addr);
2428 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2429 new = gen_rtx_MEM (Pmode, new);
2430 RTX_UNCHANGING_P (new) = 1;
2431 emit_move_insn (reg, new);
2437 if (GET_CODE (addr) == CONST)
2439 addr = XEXP (addr, 0);
2440 if (GET_CODE (addr) == UNSPEC)
2442 if (XVECLEN (addr, 0) != 1)
2444 switch (XINT (addr, 1))
2446 /* If someone moved a GOT-relative UNSPEC
2447 out of the literal pool, force them back in. */
2450 new = force_const_mem (Pmode, orig);
2453 /* @GOT is OK as is if small. */
2456 new = force_const_mem (Pmode, orig);
2459 /* @GOTENT is OK as is. */
2463 /* @PLT is OK as is on 64-bit, must be converted to
2464 GOT-relative @PLTOFF on 31-bit. */
2466 if (!TARGET_CPU_ZARCH)
2468 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2470 if (reload_in_progress || reload_completed)
2471 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2473 addr = XVECEXP (addr, 0, 0);
2474 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
2476 addr = gen_rtx_CONST (Pmode, addr);
2477 addr = force_const_mem (Pmode, addr);
2478 emit_move_insn (temp, addr);
2480 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2483 emit_move_insn (reg, new);
2489 /* Everything else cannot happen. */
2494 else if (GET_CODE (addr) != PLUS)
2497 if (GET_CODE (addr) == PLUS)
2499 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
2500 /* Check first to see if this is a constant offset
2501 from a local symbol reference. */
2502 if ((GET_CODE (op0) == LABEL_REF
2503 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
2504 && GET_CODE (op1) == CONST_INT)
2506 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
2508 if (INTVAL (op1) & 1)
2510 /* LARL can't handle odd offsets, so emit a
2511 pair of LARL and LA. */
2512 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2514 if (!DISP_IN_RANGE (INTVAL (op1)))
2516 int even = INTVAL (op1) - 1;
2517 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
2518 op0 = gen_rtx_CONST (Pmode, op0);
2522 emit_move_insn (temp, op0);
2523 new = gen_rtx_PLUS (Pmode, temp, op1);
2527 emit_move_insn (reg, new);
2533 /* If the offset is even, we can just use LARL.
2534 This will happen automatically. */
2539 /* Access local symbols relative to the GOT. */
2541 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2543 if (reload_in_progress || reload_completed)
2544 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2546 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
2548 addr = gen_rtx_PLUS (Pmode, addr, op1);
2549 addr = gen_rtx_CONST (Pmode, addr);
2550 addr = force_const_mem (Pmode, addr);
2551 emit_move_insn (temp, addr);
2553 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2556 emit_move_insn (reg, new);
2562 /* Now, check whether it is a GOT relative symbol plus offset
2563 that was pulled out of the literal pool. Force it back in. */
2565 else if (GET_CODE (op0) == UNSPEC
2566 && GET_CODE (op1) == CONST_INT)
2568 if (XVECLEN (op0, 0) != 1)
2570 if (XINT (op0, 1) != UNSPEC_GOTOFF)
2573 new = force_const_mem (Pmode, orig);
2576 /* Otherwise, compute the sum. */
2579 base = legitimize_pic_address (XEXP (addr, 0), reg);
2580 new = legitimize_pic_address (XEXP (addr, 1),
2581 base == reg ? NULL_RTX : reg);
2582 if (GET_CODE (new) == CONST_INT)
2583 new = plus_constant (base, INTVAL (new));
2586 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
2588 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
2589 new = XEXP (new, 1);
2591 new = gen_rtx_PLUS (Pmode, base, new);
2594 if (GET_CODE (new) == CONST)
2595 new = XEXP (new, 0);
2596 new = force_operand (new, 0);
2603 /* Load the thread pointer into a register. */
2606 get_thread_pointer (void)
2610 tp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
2611 tp = force_reg (Pmode, tp);
2612 mark_reg_pointer (tp, BITS_PER_WORD);
2617 /* Construct the SYMBOL_REF for the tls_get_offset function. */
2619 static GTY(()) rtx s390_tls_symbol;
2621 s390_tls_get_offset (void)
2623 if (!s390_tls_symbol)
2624 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
2626 return s390_tls_symbol;
2629 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
2630 this (thread-local) address. REG may be used as temporary. */
2633 legitimize_tls_address (rtx addr, rtx reg)
2635 rtx new, tls_call, temp, base, r2, insn;
2637 if (GET_CODE (addr) == SYMBOL_REF)
2638 switch (tls_symbolic_operand (addr))
2640 case TLS_MODEL_GLOBAL_DYNAMIC:
2642 r2 = gen_rtx_REG (Pmode, 2);
2643 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
2644 new = gen_rtx_CONST (Pmode, tls_call);
2645 new = force_const_mem (Pmode, new);
2646 emit_move_insn (r2, new);
2647 emit_call_insn (gen_call_value_tls (r2, tls_call));
2648 insn = get_insns ();
2651 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2652 temp = gen_reg_rtx (Pmode);
2653 emit_libcall_block (insn, temp, r2, new);
2655 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2658 s390_load_address (reg, new);
2663 case TLS_MODEL_LOCAL_DYNAMIC:
2665 r2 = gen_rtx_REG (Pmode, 2);
2666 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
2667 new = gen_rtx_CONST (Pmode, tls_call);
2668 new = force_const_mem (Pmode, new);
2669 emit_move_insn (r2, new);
2670 emit_call_insn (gen_call_value_tls (r2, tls_call));
2671 insn = get_insns ();
2674 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
2675 temp = gen_reg_rtx (Pmode);
2676 emit_libcall_block (insn, temp, r2, new);
2678 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2679 base = gen_reg_rtx (Pmode);
2680 s390_load_address (base, new);
2682 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
2683 new = gen_rtx_CONST (Pmode, new);
2684 new = force_const_mem (Pmode, new);
2685 temp = gen_reg_rtx (Pmode);
2686 emit_move_insn (temp, new);
2688 new = gen_rtx_PLUS (Pmode, base, temp);
2691 s390_load_address (reg, new);
2696 case TLS_MODEL_INITIAL_EXEC:
2699 /* Assume GOT offset < 4k. This is handled the same way
2700 in both 31- and 64-bit code. */
2702 if (reload_in_progress || reload_completed)
2703 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2705 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2706 new = gen_rtx_CONST (Pmode, new);
2707 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2708 new = gen_rtx_MEM (Pmode, new);
2709 RTX_UNCHANGING_P (new) = 1;
2710 temp = gen_reg_rtx (Pmode);
2711 emit_move_insn (temp, new);
2713 else if (TARGET_CPU_ZARCH)
2715 /* If the GOT offset might be >= 4k, we determine the position
2716 of the GOT entry via a PC-relative LARL. */
2718 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2719 new = gen_rtx_CONST (Pmode, new);
2720 temp = gen_reg_rtx (Pmode);
2721 emit_move_insn (temp, new);
2723 new = gen_rtx_MEM (Pmode, temp);
2724 RTX_UNCHANGING_P (new) = 1;
2725 temp = gen_reg_rtx (Pmode);
2726 emit_move_insn (temp, new);
2730 /* If the GOT offset might be >= 4k, we have to load it
2731 from the literal pool. */
2733 if (reload_in_progress || reload_completed)
2734 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2736 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2737 new = gen_rtx_CONST (Pmode, new);
2738 new = force_const_mem (Pmode, new);
2739 temp = gen_reg_rtx (Pmode);
2740 emit_move_insn (temp, new);
2742 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2743 new = gen_rtx_MEM (Pmode, new);
2744 RTX_UNCHANGING_P (new) = 1;
2746 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2747 temp = gen_reg_rtx (Pmode);
2748 emit_insn (gen_rtx_SET (Pmode, temp, new));
2752 /* In position-dependent code, load the absolute address of
2753 the GOT entry from the literal pool. */
2755 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2756 new = gen_rtx_CONST (Pmode, new);
2757 new = force_const_mem (Pmode, new);
2758 temp = gen_reg_rtx (Pmode);
2759 emit_move_insn (temp, new);
2762 new = gen_rtx_MEM (Pmode, new);
2763 RTX_UNCHANGING_P (new) = 1;
2765 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2766 temp = gen_reg_rtx (Pmode);
2767 emit_insn (gen_rtx_SET (Pmode, temp, new));
2770 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2773 s390_load_address (reg, new);
2778 case TLS_MODEL_LOCAL_EXEC:
2779 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2780 new = gen_rtx_CONST (Pmode, new);
2781 new = force_const_mem (Pmode, new);
2782 temp = gen_reg_rtx (Pmode);
2783 emit_move_insn (temp, new);
2785 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2788 s390_load_address (reg, new);
2797 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
2799 switch (XINT (XEXP (addr, 0), 1))
2801 case UNSPEC_INDNTPOFF:
2802 if (TARGET_CPU_ZARCH)
2814 abort (); /* for now ... */
2819 /* Emit insns to move operands[1] into operands[0]. */
2822 emit_symbolic_move (rtx *operands)
2824 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
2826 if (GET_CODE (operands[0]) == MEM)
2827 operands[1] = force_reg (Pmode, operands[1]);
2828 else if (TLS_SYMBOLIC_CONST (operands[1]))
2829 operands[1] = legitimize_tls_address (operands[1], temp);
2831 operands[1] = legitimize_pic_address (operands[1], temp);
2834 /* Try machine-dependent ways of modifying an illegitimate address X
2835 to be legitimate. If we find one, return the new, valid address.
2837 OLDX is the address as it was before break_out_memory_refs was called.
2838 In some cases it is useful to look at this to decide what needs to be done.
2840 MODE is the mode of the operand pointed to by X.
2842 When -fpic is used, special handling is needed for symbolic references.
2843 See comments by legitimize_pic_address for details. */
2846 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
2847 enum machine_mode mode ATTRIBUTE_UNUSED)
2849 rtx constant_term = const0_rtx;
2851 if (TLS_SYMBOLIC_CONST (x))
2853 x = legitimize_tls_address (x, 0);
2855 if (legitimate_address_p (mode, x, FALSE))
2860 if (SYMBOLIC_CONST (x)
2861 || (GET_CODE (x) == PLUS
2862 && (SYMBOLIC_CONST (XEXP (x, 0))
2863 || SYMBOLIC_CONST (XEXP (x, 1)))))
2864 x = legitimize_pic_address (x, 0);
2866 if (legitimate_address_p (mode, x, FALSE))
2870 x = eliminate_constant_term (x, &constant_term);
2872 /* Optimize loading of large displacements by splitting them
2873 into the multiple of 4K and the rest; this allows the
2874 former to be CSE'd if possible.
2876 Don't do this if the displacement is added to a register
2877 pointing into the stack frame, as the offsets will
2878 change later anyway. */
2880 if (GET_CODE (constant_term) == CONST_INT
2881 && !TARGET_LONG_DISPLACEMENT
2882 && !DISP_IN_RANGE (INTVAL (constant_term))
2883 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
2885 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
2886 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
2888 rtx temp = gen_reg_rtx (Pmode);
2889 rtx val = force_operand (GEN_INT (upper), temp);
2891 emit_move_insn (temp, val);
2893 x = gen_rtx_PLUS (Pmode, x, temp);
2894 constant_term = GEN_INT (lower);
2897 if (GET_CODE (x) == PLUS)
2899 if (GET_CODE (XEXP (x, 0)) == REG)
2901 register rtx temp = gen_reg_rtx (Pmode);
2902 register rtx val = force_operand (XEXP (x, 1), temp);
2904 emit_move_insn (temp, val);
2906 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
2909 else if (GET_CODE (XEXP (x, 1)) == REG)
2911 register rtx temp = gen_reg_rtx (Pmode);
2912 register rtx val = force_operand (XEXP (x, 0), temp);
2914 emit_move_insn (temp, val);
2916 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
2920 if (constant_term != const0_rtx)
2921 x = gen_rtx_PLUS (Pmode, x, constant_term);
2926 /* Emit code to move LEN bytes from DST to SRC. */
2929 s390_expand_movstr (rtx dst, rtx src, rtx len)
2931 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
2933 if (INTVAL (len) > 0)
2934 emit_insn (gen_movstr_short (dst, src, GEN_INT (INTVAL (len) - 1)));
2937 else if (TARGET_MVCLE)
2939 emit_insn (gen_movstr_long (dst, src, convert_to_mode (Pmode, len, 1)));
2944 rtx dst_addr, src_addr, count, blocks, temp;
2945 rtx end_label = gen_label_rtx ();
2946 enum machine_mode mode;
2949 mode = GET_MODE (len);
2950 if (mode == VOIDmode)
2953 type = lang_hooks.types.type_for_mode (mode, 1);
2957 dst_addr = gen_reg_rtx (Pmode);
2958 src_addr = gen_reg_rtx (Pmode);
2959 count = gen_reg_rtx (mode);
2960 blocks = gen_reg_rtx (mode);
2962 convert_move (count, len, 1);
2963 emit_cmp_and_jump_insns (count, const0_rtx,
2964 EQ, NULL_RTX, mode, 1, end_label);
2966 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
2967 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
2968 dst = change_address (dst, VOIDmode, dst_addr);
2969 src = change_address (src, VOIDmode, src_addr);
2971 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
2973 emit_move_insn (count, temp);
2975 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
2977 emit_move_insn (blocks, temp);
2979 expand_start_loop (1);
2980 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
2981 make_tree (type, blocks),
2982 make_tree (type, const0_rtx)));
2984 emit_insn (gen_movstr_short (dst, src, GEN_INT (255)));
2985 s390_load_address (dst_addr,
2986 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
2987 s390_load_address (src_addr,
2988 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
2990 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
2992 emit_move_insn (blocks, temp);
2996 emit_insn (gen_movstr_short (dst, src,
2997 convert_to_mode (Pmode, count, 1)));
2998 emit_label (end_label);
3002 /* Emit code to clear LEN bytes at DST. */
3005 s390_expand_clrstr (rtx dst, rtx len)
3007 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3009 if (INTVAL (len) > 0)
3010 emit_insn (gen_clrstr_short (dst, GEN_INT (INTVAL (len) - 1)));
3013 else if (TARGET_MVCLE)
3015 emit_insn (gen_clrstr_long (dst, convert_to_mode (Pmode, len, 1)));
3020 rtx dst_addr, src_addr, count, blocks, temp;
3021 rtx end_label = gen_label_rtx ();
3022 enum machine_mode mode;
3025 mode = GET_MODE (len);
3026 if (mode == VOIDmode)
3029 type = lang_hooks.types.type_for_mode (mode, 1);
3033 dst_addr = gen_reg_rtx (Pmode);
3034 src_addr = gen_reg_rtx (Pmode);
3035 count = gen_reg_rtx (mode);
3036 blocks = gen_reg_rtx (mode);
3038 convert_move (count, len, 1);
3039 emit_cmp_and_jump_insns (count, const0_rtx,
3040 EQ, NULL_RTX, mode, 1, end_label);
3042 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3043 dst = change_address (dst, VOIDmode, dst_addr);
3045 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3047 emit_move_insn (count, temp);
3049 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3051 emit_move_insn (blocks, temp);
3053 expand_start_loop (1);
3054 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
3055 make_tree (type, blocks),
3056 make_tree (type, const0_rtx)));
3058 emit_insn (gen_clrstr_short (dst, GEN_INT (255)));
3059 s390_load_address (dst_addr,
3060 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3062 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3064 emit_move_insn (blocks, temp);
3068 emit_insn (gen_clrstr_short (dst, convert_to_mode (Pmode, count, 1)));
3069 emit_label (end_label);
3073 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3074 and return the result in TARGET. */
3077 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3079 rtx (*gen_result) (rtx) =
3080 GET_MODE (target) == DImode ? gen_cmpint_di : gen_cmpint_si;
3082 op0 = protect_from_queue (op0, 0);
3083 op1 = protect_from_queue (op1, 0);
3084 len = protect_from_queue (len, 0);
3086 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3088 if (INTVAL (len) > 0)
3090 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3091 emit_insn (gen_result (target));
3094 emit_move_insn (target, const0_rtx);
3097 else /* if (TARGET_MVCLE) */
3099 emit_insn (gen_cmpmem_long (op0, op1, convert_to_mode (Pmode, len, 1)));
3100 emit_insn (gen_result (target));
3104 /* Deactivate for now as profile code cannot cope with
3105 CC being live across basic block boundaries. */
3108 rtx addr0, addr1, count, blocks, temp;
3109 rtx end_label = gen_label_rtx ();
3110 enum machine_mode mode;
3113 mode = GET_MODE (len);
3114 if (mode == VOIDmode)
3117 type = lang_hooks.types.type_for_mode (mode, 1);
3121 addr0 = gen_reg_rtx (Pmode);
3122 addr1 = gen_reg_rtx (Pmode);
3123 count = gen_reg_rtx (mode);
3124 blocks = gen_reg_rtx (mode);
3126 convert_move (count, len, 1);
3127 emit_cmp_and_jump_insns (count, const0_rtx,
3128 EQ, NULL_RTX, mode, 1, end_label);
3130 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3131 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3132 op0 = change_address (op0, VOIDmode, addr0);
3133 op1 = change_address (op1, VOIDmode, addr1);
3135 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3137 emit_move_insn (count, temp);
3139 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3141 emit_move_insn (blocks, temp);
3143 expand_start_loop (1);
3144 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
3145 make_tree (type, blocks),
3146 make_tree (type, const0_rtx)));
3148 emit_insn (gen_cmpmem_short (op0, op1, GEN_INT (255)));
3149 temp = gen_rtx_NE (VOIDmode, gen_rtx_REG (CCSmode, 33), const0_rtx);
3150 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3151 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3152 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3153 emit_jump_insn (temp);
3155 s390_load_address (addr0,
3156 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3157 s390_load_address (addr1,
3158 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3160 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3162 emit_move_insn (blocks, temp);
3166 emit_insn (gen_cmpmem_short (op0, op1,
3167 convert_to_mode (Pmode, count, 1)));
3168 emit_label (end_label);
3170 emit_insn (gen_result (target));
3175 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
3176 We need to emit DTP-relative relocations. */
3179 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
3184 fputs ("\t.long\t", file);
3187 fputs ("\t.quad\t", file);
3192 output_addr_const (file, x);
3193 fputs ("@DTPOFF", file);
3196 /* In the name of slightly smaller debug output, and to cater to
3197 general assembler losage, recognize various UNSPEC sequences
3198 and turn them back into a direct symbol reference. */
3201 s390_delegitimize_address (rtx orig_x)
3205 if (GET_CODE (x) != MEM)
3209 if (GET_CODE (x) == PLUS
3210 && GET_CODE (XEXP (x, 1)) == CONST
3211 && GET_CODE (XEXP (x, 0)) == REG
3212 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
3214 y = XEXP (XEXP (x, 1), 0);
3215 if (GET_CODE (y) == UNSPEC
3216 && XINT (y, 1) == UNSPEC_GOT)
3217 return XVECEXP (y, 0, 0);
3221 if (GET_CODE (x) == CONST)
3224 if (GET_CODE (y) == UNSPEC
3225 && XINT (y, 1) == UNSPEC_GOTENT)
3226 return XVECEXP (y, 0, 0);
3233 /* Output shift count operand OP to stdio stream FILE. */
3236 print_shift_count_operand (FILE *file, rtx op)
3238 HOST_WIDE_INT offset = 0;
3240 /* We can have an integer constant, an address register,
3241 or a sum of the two. */
3242 if (GET_CODE (op) == CONST_INT)
3244 offset = INTVAL (op);
3247 if (op && GET_CODE (op) == PLUS && GET_CODE (XEXP (op, 1)) == CONST_INT)
3249 offset = INTVAL (XEXP (op, 1));
3252 while (op && GET_CODE (op) == SUBREG)
3253 op = SUBREG_REG (op);
3256 if (op && (GET_CODE (op) != REG
3257 || REGNO (op) >= FIRST_PSEUDO_REGISTER
3258 || REGNO_REG_CLASS (REGNO (op)) != ADDR_REGS))
3261 /* Shift counts are truncated to the low six bits anyway. */
3262 fprintf (file, HOST_WIDE_INT_PRINT_DEC, offset & 63);
3264 fprintf (file, "(%s)", reg_names[REGNO (op)]);
3267 /* Locate some local-dynamic symbol still in use by this function
3268 so that we can print its name in local-dynamic base patterns. */
3271 get_some_local_dynamic_name (void)
3275 if (cfun->machine->some_ld_name)
3276 return cfun->machine->some_ld_name;
3278 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
3280 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
3281 return cfun->machine->some_ld_name;
3287 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
3291 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
3293 x = get_pool_constant (x);
3294 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
3297 if (GET_CODE (x) == SYMBOL_REF
3298 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
3300 cfun->machine->some_ld_name = XSTR (x, 0);
3307 /* Output symbolic constant X in assembler syntax to
3308 stdio stream FILE. */
3311 s390_output_symbolic_const (FILE *file, rtx x)
3313 switch (GET_CODE (x))
3318 s390_output_symbolic_const (file, XEXP (x, 0));
3322 s390_output_symbolic_const (file, XEXP (x, 0));
3323 fprintf (file, "+");
3324 s390_output_symbolic_const (file, XEXP (x, 1));
3328 s390_output_symbolic_const (file, XEXP (x, 0));
3329 fprintf (file, "-");
3330 s390_output_symbolic_const (file, XEXP (x, 1));
3337 output_addr_const (file, x);
3341 if (XVECLEN (x, 0) != 1)
3342 output_operand_lossage ("invalid UNSPEC as operand (1)");
3343 switch (XINT (x, 1))
3346 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3347 fprintf (file, "@GOTENT");
3350 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3351 fprintf (file, "@GOT");
3354 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3355 fprintf (file, "@GOTOFF");
3358 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3359 fprintf (file, "@PLT");
3362 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3363 fprintf (file, "@PLTOFF");
3366 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3367 fprintf (file, "@TLSGD");
3370 assemble_name (file, get_some_local_dynamic_name ());
3371 fprintf (file, "@TLSLDM");
3374 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3375 fprintf (file, "@DTPOFF");
3378 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3379 fprintf (file, "@NTPOFF");
3381 case UNSPEC_GOTNTPOFF:
3382 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3383 fprintf (file, "@GOTNTPOFF");
3385 case UNSPEC_INDNTPOFF:
3386 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3387 fprintf (file, "@INDNTPOFF");
3390 output_operand_lossage ("invalid UNSPEC as operand (2)");
3396 fatal_insn ("UNKNOWN in s390_output_symbolic_const !?", x);
3401 /* Output address operand ADDR in assembler syntax to
3402 stdio stream FILE. */
3405 print_operand_address (FILE *file, rtx addr)
3407 struct s390_address ad;
3409 if (!s390_decompose_address (addr, &ad)
3410 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3411 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
3412 output_operand_lossage ("Cannot decompose address.");
3415 s390_output_symbolic_const (file, ad.disp);
3417 fprintf (file, "0");
3419 if (ad.base && ad.indx)
3420 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
3421 reg_names[REGNO (ad.base)]);
3423 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3426 /* Output operand X in assembler syntax to stdio stream FILE.
3427 CODE specified the format flag. The following format flags
3430 'C': print opcode suffix for branch condition.
3431 'D': print opcode suffix for inverse branch condition.
3432 'J': print tls_load/tls_gdcall/tls_ldcall suffix
3433 'O': print only the displacement of a memory reference.
3434 'R': print only the base register of a memory reference.
3435 'N': print the second word of a DImode operand.
3436 'M': print the second word of a TImode operand.
3437 'Y': print shift count operand.
3439 'b': print integer X as if it's an unsigned byte.
3440 'x': print integer X as if it's an unsigned word.
3441 'h': print integer X as if it's a signed word.
3442 'i': print the first nonzero HImode part of X.
3443 'j': print the first HImode part unequal to 0xffff of X. */
3446 print_operand (FILE *file, rtx x, int code)
3451 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
3455 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
3459 if (GET_CODE (x) == SYMBOL_REF)
3461 fprintf (file, "%s", ":tls_load:");
3462 output_addr_const (file, x);
3464 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
3466 fprintf (file, "%s", ":tls_gdcall:");
3467 output_addr_const (file, XVECEXP (x, 0, 0));
3469 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
3471 fprintf (file, "%s", ":tls_ldcall:");
3472 assemble_name (file, get_some_local_dynamic_name ());
3480 struct s390_address ad;
3482 if (GET_CODE (x) != MEM
3483 || !s390_decompose_address (XEXP (x, 0), &ad)
3484 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3489 s390_output_symbolic_const (file, ad.disp);
3491 fprintf (file, "0");
3497 struct s390_address ad;
3499 if (GET_CODE (x) != MEM
3500 || !s390_decompose_address (XEXP (x, 0), &ad)
3501 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3506 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
3508 fprintf (file, "0");
3513 if (GET_CODE (x) == REG)
3514 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3515 else if (GET_CODE (x) == MEM)
3516 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
3522 if (GET_CODE (x) == REG)
3523 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3524 else if (GET_CODE (x) == MEM)
3525 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
3531 print_shift_count_operand (file, x);
3535 switch (GET_CODE (x))
3538 fprintf (file, "%s", reg_names[REGNO (x)]);
3542 output_address (XEXP (x, 0));
3549 s390_output_symbolic_const (file, x);
3554 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
3555 else if (code == 'x')
3556 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
3557 else if (code == 'h')
3558 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
3559 else if (code == 'i')
3560 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3561 s390_extract_part (x, HImode, 0));
3562 else if (code == 'j')
3563 fprintf (file, HOST_WIDE_INT_PRINT_DEC,
3564 s390_extract_part (x, HImode, -1));
3566 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3570 if (GET_MODE (x) != VOIDmode)
3573 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
3574 else if (code == 'x')
3575 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
3576 else if (code == 'h')
3577 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
3583 fatal_insn ("UNKNOWN in print_operand !?", x);
3588 /* Target hook for assembling integer objects. We need to define it
3589 here to work a round a bug in some versions of GAS, which couldn't
3590 handle values smaller than INT_MIN when printed in decimal. */
3593 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
3595 if (size == 8 && aligned_p
3596 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
3598 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
3602 return default_assemble_integer (x, size, aligned_p);
3605 /* Returns true if register REGNO is used for forming
3606 a memory address in expression X. */
3609 reg_used_in_mem_p (int regno, rtx x)
3611 enum rtx_code code = GET_CODE (x);
3617 if (refers_to_regno_p (regno, regno+1,
3621 else if (code == SET
3622 && GET_CODE (SET_DEST (x)) == PC)
3624 if (refers_to_regno_p (regno, regno+1,
3629 fmt = GET_RTX_FORMAT (code);
3630 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3633 && reg_used_in_mem_p (regno, XEXP (x, i)))
3636 else if (fmt[i] == 'E')
3637 for (j = 0; j < XVECLEN (x, i); j++)
3638 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
3644 /* Returns true if expression DEP_RTX sets an address register
3645 used by instruction INSN to address memory. */
3648 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
3652 if (GET_CODE (dep_rtx) == INSN)
3653 dep_rtx = PATTERN (dep_rtx);
3655 if (GET_CODE (dep_rtx) == SET)
3657 target = SET_DEST (dep_rtx);
3658 if (GET_CODE (target) == STRICT_LOW_PART)
3659 target = XEXP (target, 0);
3660 while (GET_CODE (target) == SUBREG)
3661 target = SUBREG_REG (target);
3663 if (GET_CODE (target) == REG)
3665 int regno = REGNO (target);
3667 if (s390_safe_attr_type (insn) == TYPE_LA)
3669 pat = PATTERN (insn);
3670 if (GET_CODE (pat) == PARALLEL)
3672 if (XVECLEN (pat, 0) != 2)
3674 pat = XVECEXP (pat, 0, 0);
3676 if (GET_CODE (pat) == SET)
3677 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
3681 else if (get_attr_atype (insn) == ATYPE_AGEN)
3682 return reg_used_in_mem_p (regno, PATTERN (insn));
3688 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
3691 s390_agen_dep_p (rtx dep_insn, rtx insn)
3693 rtx dep_rtx = PATTERN (dep_insn);
3696 if (GET_CODE (dep_rtx) == SET
3697 && addr_generation_dependency_p (dep_rtx, insn))
3699 else if (GET_CODE (dep_rtx) == PARALLEL)
3701 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3703 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3710 /* Return the modified cost of the dependency of instruction INSN
3711 on instruction DEP_INSN through the link LINK. COST is the
3712 default cost of that dependency.
3714 Data dependencies are all handled without delay. However, if a
3715 register is modified and subsequently used as base or index
3716 register of a memory reference, at least 4 cycles need to pass
3717 between setting and using the register to avoid pipeline stalls.
3718 An exception is the LA instruction. An address generated by LA can
3719 be used by introducing only a one cycle stall on the pipeline. */
3722 s390_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
3727 /* If the dependence is an anti-dependence, there is no cost. For an
3728 output dependence, there is sometimes a cost, but it doesn't seem
3729 worth handling those few cases. */
3731 if (REG_NOTE_KIND (link) != 0)
3734 /* If we can't recognize the insns, we can't really do anything. */
3735 if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
3738 /* DFA based scheduling checks address dependency in md file. */
3739 if (s390_use_dfa_pipeline_interface ())
3741 /* Operand forward in case of lr, load and la. */
3742 if (s390_tune == PROCESSOR_2084_Z990
3744 && (s390_safe_attr_type (dep_insn) == TYPE_LA
3745 || s390_safe_attr_type (dep_insn) == TYPE_LR
3746 || s390_safe_attr_type (dep_insn) == TYPE_LOAD))
3751 dep_rtx = PATTERN (dep_insn);
3753 if (GET_CODE (dep_rtx) == SET
3754 && addr_generation_dependency_p (dep_rtx, insn))
3755 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3756 else if (GET_CODE (dep_rtx) == PARALLEL)
3758 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3760 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3761 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3767 /* A C statement (sans semicolon) to update the integer scheduling priority
3768 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
3769 reduce the priority to execute INSN later. Do not define this macro if
3770 you do not need to adjust the scheduling priorities of insns.
3772 A STD instruction should be scheduled earlier,
3773 in order to use the bypass. */
3776 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
3778 if (! INSN_P (insn))
3781 if (s390_tune != PROCESSOR_2084_Z990)
3784 switch (s390_safe_attr_type (insn))
3788 priority = priority << 3;
3791 priority = priority << 1;
3799 /* The number of instructions that can be issued per cycle. */
3802 s390_issue_rate (void)
3804 if (s390_tune == PROCESSOR_2084_Z990)
3809 /* If the following function returns TRUE, we will use the the DFA
3813 s390_use_dfa_pipeline_interface (void)
3815 if (s390_tune == PROCESSOR_2064_Z900
3816 || s390_tune == PROCESSOR_2084_Z990)
3823 s390_first_cycle_multipass_dfa_lookahead (void)
3825 return s390_use_dfa_pipeline_interface () ? 4 : 0;
3828 /* Called after issuing each insn.
3829 Triggers default sort algorithm to better slot instructions. */
3832 s390_sched_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
3833 int sched_verbose ATTRIBUTE_UNUSED,
3834 rtx *ready ATTRIBUTE_UNUSED,
3835 int *pn_ready ATTRIBUTE_UNUSED,
3836 int clock_var ATTRIBUTE_UNUSED)
3838 return s390_issue_rate();
3842 /* Split all branches that exceed the maximum distance.
3843 Returns true if this created a new literal pool entry. */
3846 s390_split_branches (void)
3848 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
3849 int new_literal = 0;
3850 rtx insn, pat, tmp, target;
3853 /* We need correct insn addresses. */
3855 shorten_branches (get_insns ());
3857 /* Find all branches that exceed 64KB, and split them. */
3859 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3861 if (GET_CODE (insn) != JUMP_INSN)
3864 pat = PATTERN (insn);
3865 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
3866 pat = XVECEXP (pat, 0, 0);
3867 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
3870 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
3872 label = &SET_SRC (pat);
3874 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
3876 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
3877 label = &XEXP (SET_SRC (pat), 1);
3878 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
3879 label = &XEXP (SET_SRC (pat), 2);
3886 if (get_attr_length (insn) <= 4)
3889 /* We are going to use the return register as scratch register,
3890 make sure it will be saved/restored by the prologue/epilogue. */
3891 cfun->machine->save_return_addr_p = 1;
3896 tmp = force_const_mem (Pmode, *label);
3897 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
3898 INSN_ADDRESSES_NEW (tmp, -1);
3905 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
3906 UNSPEC_LTREL_OFFSET);
3907 target = gen_rtx_CONST (Pmode, target);
3908 target = force_const_mem (Pmode, target);
3909 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
3910 INSN_ADDRESSES_NEW (tmp, -1);
3912 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (target, 0)),
3914 target = gen_rtx_PLUS (Pmode, temp_reg, target);
3917 if (!validate_change (insn, label, target, 0))
3925 /* Find a literal pool symbol referenced in RTX X, and store
3926 it at REF. Will abort if X contains references to more than
3927 one such pool symbol; multiple references to the same symbol
3928 are allowed, however.
3930 The rtx pointed to by REF must be initialized to NULL_RTX
3931 by the caller before calling this routine. */
3934 find_constant_pool_ref (rtx x, rtx *ref)
3939 /* Ignore LTREL_BASE references. */
3940 if (GET_CODE (x) == UNSPEC
3941 && XINT (x, 1) == UNSPEC_LTREL_BASE)
3943 /* Likewise POOL_ENTRY insns. */
3944 if (GET_CODE (x) == UNSPEC_VOLATILE
3945 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
3948 if (GET_CODE (x) == SYMBOL_REF
3949 && CONSTANT_POOL_ADDRESS_P (x))
3951 if (*ref == NULL_RTX)
3957 fmt = GET_RTX_FORMAT (GET_CODE (x));
3958 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
3962 find_constant_pool_ref (XEXP (x, i), ref);
3964 else if (fmt[i] == 'E')
3966 for (j = 0; j < XVECLEN (x, i); j++)
3967 find_constant_pool_ref (XVECEXP (x, i, j), ref);
3972 /* Replace every reference to the literal pool symbol REF
3973 in X by the address ADDR. Fix up MEMs as required. */
3976 replace_constant_pool_ref (rtx *x, rtx ref, rtx addr)
3984 /* Literal pool references can only occur inside a MEM ... */
3985 if (GET_CODE (*x) == MEM)
3987 rtx memref = XEXP (*x, 0);
3991 *x = replace_equiv_address (*x, addr);
3995 if (GET_CODE (memref) == CONST
3996 && GET_CODE (XEXP (memref, 0)) == PLUS
3997 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
3998 && XEXP (XEXP (memref, 0), 0) == ref)
4000 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
4001 *x = replace_equiv_address (*x, plus_constant (addr, off));
4006 /* ... or a load-address type pattern. */
4007 if (GET_CODE (*x) == SET)
4009 rtx addrref = SET_SRC (*x);
4013 SET_SRC (*x) = addr;
4017 if (GET_CODE (addrref) == CONST
4018 && GET_CODE (XEXP (addrref, 0)) == PLUS
4019 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
4020 && XEXP (XEXP (addrref, 0), 0) == ref)
4022 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
4023 SET_SRC (*x) = plus_constant (addr, off);
4028 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4029 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4033 replace_constant_pool_ref (&XEXP (*x, i), ref, addr);
4035 else if (fmt[i] == 'E')
4037 for (j = 0; j < XVECLEN (*x, i); j++)
4038 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, addr);
4043 /* Check whether X contains an UNSPEC_LTREL_BASE.
4044 Return its constant pool symbol if found, NULL_RTX otherwise. */
4047 find_ltrel_base (rtx x)
4052 if (GET_CODE (x) == UNSPEC
4053 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4054 return XVECEXP (x, 0, 0);
4056 fmt = GET_RTX_FORMAT (GET_CODE (x));
4057 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4061 rtx fnd = find_ltrel_base (XEXP (x, i));
4065 else if (fmt[i] == 'E')
4067 for (j = 0; j < XVECLEN (x, i); j++)
4069 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4079 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with BASE. */
4082 replace_ltrel_base (rtx *x, rtx base)
4087 if (GET_CODE (*x) == UNSPEC
4088 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4094 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4095 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4099 replace_ltrel_base (&XEXP (*x, i), base);
4101 else if (fmt[i] == 'E')
4103 for (j = 0; j < XVECLEN (*x, i); j++)
4104 replace_ltrel_base (&XVECEXP (*x, i, j), base);
4110 /* We keep a list of constants which we have to add to internal
4111 constant tables in the middle of large functions. */
4113 #define NR_C_MODES 7
4114 enum machine_mode constant_modes[NR_C_MODES] =
4125 struct constant *next;
4130 struct constant_pool
4132 struct constant_pool *next;
4137 struct constant *constants[NR_C_MODES];
4142 static struct constant_pool * s390_mainpool_start (void);
4143 static void s390_mainpool_finish (struct constant_pool *, rtx base_reg);
4144 static void s390_mainpool_cancel (struct constant_pool *);
4146 static struct constant_pool * s390_chunkify_start (rtx base_reg);
4147 static void s390_chunkify_finish (struct constant_pool *, rtx base_reg);
4148 static void s390_chunkify_cancel (struct constant_pool *);
4150 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4151 static void s390_end_pool (struct constant_pool *, rtx);
4152 static void s390_add_pool_insn (struct constant_pool *, rtx);
4153 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4154 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4155 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4156 static rtx s390_dump_pool (struct constant_pool *, bool);
4157 static struct constant_pool *s390_alloc_pool (void);
4158 static void s390_free_pool (struct constant_pool *);
4160 /* Create new constant pool covering instructions starting at INSN
4161 and chain it to the end of POOL_LIST. */
4163 static struct constant_pool *
4164 s390_start_pool (struct constant_pool **pool_list, rtx insn)
4166 struct constant_pool *pool, **prev;
4168 pool = s390_alloc_pool ();
4169 pool->first_insn = insn;
4171 for (prev = pool_list; *prev; prev = &(*prev)->next)
4178 /* End range of instructions covered by POOL at INSN and emit
4179 placeholder insn representing the pool. */
4182 s390_end_pool (struct constant_pool *pool, rtx insn)
4184 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
4187 insn = get_last_insn ();
4189 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
4190 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4193 /* Add INSN to the list of insns covered by POOL. */
4196 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
4198 bitmap_set_bit (pool->insns, INSN_UID (insn));
4201 /* Return pool out of POOL_LIST that covers INSN. */
4203 static struct constant_pool *
4204 s390_find_pool (struct constant_pool *pool_list, rtx insn)
4206 struct constant_pool *pool;
4208 for (pool = pool_list; pool; pool = pool->next)
4209 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
4215 /* Add constant VAL of mode MODE to the constant pool POOL. */
4218 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
4223 for (i = 0; i < NR_C_MODES; i++)
4224 if (constant_modes[i] == mode)
4226 if (i == NR_C_MODES)
4229 for (c = pool->constants[i]; c != NULL; c = c->next)
4230 if (rtx_equal_p (val, c->value))
4235 c = (struct constant *) xmalloc (sizeof *c);
4237 c->label = gen_label_rtx ();
4238 c->next = pool->constants[i];
4239 pool->constants[i] = c;
4240 pool->size += GET_MODE_SIZE (mode);
4244 /* Find constant VAL of mode MODE in the constant pool POOL.
4245 Return an RTX describing the distance from the start of
4246 the pool to the location of the new constant. */
4249 s390_find_constant (struct constant_pool *pool, rtx val,
4250 enum machine_mode mode)
4256 for (i = 0; i < NR_C_MODES; i++)
4257 if (constant_modes[i] == mode)
4259 if (i == NR_C_MODES)
4262 for (c = pool->constants[i]; c != NULL; c = c->next)
4263 if (rtx_equal_p (val, c->value))
4269 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4270 gen_rtx_LABEL_REF (Pmode, pool->label));
4271 offset = gen_rtx_CONST (Pmode, offset);
4275 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
4276 do not emit the pool base label. */
4279 s390_dump_pool (struct constant_pool *pool, bool remote_label)
4285 /* Pool start insn switches to proper section
4286 and guarantees necessary alignment. */
4287 if (TARGET_CPU_ZARCH)
4288 insn = emit_insn_after (gen_pool_start_64 (), pool->pool_insn);
4290 insn = emit_insn_after (gen_pool_start_31 (), pool->pool_insn);
4291 INSN_ADDRESSES_NEW (insn, -1);
4295 insn = emit_label_after (pool->label, insn);
4296 INSN_ADDRESSES_NEW (insn, -1);
4299 /* Dump constants in descending alignment requirement order,
4300 ensuring proper alignment for every constant. */
4301 for (i = 0; i < NR_C_MODES; i++)
4302 for (c = pool->constants[i]; c; c = c->next)
4304 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
4305 rtx value = c->value;
4306 if (GET_CODE (value) == CONST
4307 && GET_CODE (XEXP (value, 0)) == UNSPEC
4308 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
4309 && XVECLEN (XEXP (value, 0), 0) == 1)
4311 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
4312 gen_rtx_LABEL_REF (VOIDmode, pool->label));
4313 value = gen_rtx_CONST (VOIDmode, value);
4316 insn = emit_label_after (c->label, insn);
4317 INSN_ADDRESSES_NEW (insn, -1);
4319 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
4320 gen_rtvec (1, value),
4321 UNSPECV_POOL_ENTRY);
4322 insn = emit_insn_after (value, insn);
4323 INSN_ADDRESSES_NEW (insn, -1);
4326 /* Pool end insn switches back to previous section
4327 and guarantees necessary alignment. */
4328 if (TARGET_CPU_ZARCH)
4329 insn = emit_insn_after (gen_pool_end_64 (), insn);
4331 insn = emit_insn_after (gen_pool_end_31 (), insn);
4332 INSN_ADDRESSES_NEW (insn, -1);
4334 insn = emit_barrier_after (insn);
4335 INSN_ADDRESSES_NEW (insn, -1);
4337 /* Remove placeholder insn. */
4338 remove_insn (pool->pool_insn);
4343 /* Allocate new constant_pool structure. */
4345 static struct constant_pool *
4346 s390_alloc_pool (void)
4348 struct constant_pool *pool;
4351 pool = (struct constant_pool *) xmalloc (sizeof *pool);
4353 for (i = 0; i < NR_C_MODES; i++)
4354 pool->constants[i] = NULL;
4356 pool->label = gen_label_rtx ();
4357 pool->first_insn = NULL_RTX;
4358 pool->pool_insn = NULL_RTX;
4359 pool->insns = BITMAP_XMALLOC ();
4365 /* Free all memory used by POOL. */
4368 s390_free_pool (struct constant_pool *pool)
4372 for (i = 0; i < NR_C_MODES; i++)
4374 struct constant *c = pool->constants[i];
4377 struct constant *next = c->next;
4383 BITMAP_XFREE (pool->insns);
4388 /* Collect main literal pool. Return NULL on overflow. */
4390 static struct constant_pool *
4391 s390_mainpool_start (void)
4393 struct constant_pool *pool;
4396 pool = s390_alloc_pool ();
4398 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4400 if (GET_CODE (insn) == INSN
4401 && GET_CODE (PATTERN (insn)) == UNSPEC_VOLATILE
4402 && XINT (PATTERN (insn), 1) == UNSPECV_MAIN_POOL)
4404 if (pool->pool_insn)
4406 pool->pool_insn = insn;
4409 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4411 rtx pool_ref = NULL_RTX;
4412 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4415 rtx constant = get_pool_constant (pool_ref);
4416 enum machine_mode mode = get_pool_mode (pool_ref);
4417 s390_add_constant (pool, constant, mode);
4422 if (!pool->pool_insn)
4425 if (pool->size >= 4096)
4427 s390_free_pool (pool);
4434 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4435 Modify the current function to output the pool constants as well as
4436 the pool register setup instruction. BASE_REG is the register to
4437 be used as pool base register. */
4440 s390_mainpool_finish (struct constant_pool *pool, rtx base_reg)
4444 /* If the pool is empty, we're done. */
4445 if (pool->size == 0)
4447 remove_insn (pool->pool_insn);
4448 s390_free_pool (pool);
4452 /* We need correct insn addresses. */
4453 shorten_branches (get_insns ());
4455 /* On zSeries, we use a LARL to load the pool register. The pool is
4456 located in the .rodata section, so we emit it after the function. */
4457 if (TARGET_CPU_ZARCH)
4459 insn = gen_main_base_64 (base_reg, pool->label);
4460 insn = emit_insn_after (insn, pool->pool_insn);
4461 INSN_ADDRESSES_NEW (insn, -1);
4462 remove_insn (pool->pool_insn);
4464 insn = get_last_insn ();
4465 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4466 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4468 s390_dump_pool (pool, 0);
4471 /* On S/390, if the total size of the function's code plus literal pool
4472 does not exceed 4096 bytes, we use BASR to set up a function base
4473 pointer, and emit the literal pool at the end of the function. */
4474 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
4475 + pool->size + 8 /* alignment slop */ < 4096)
4477 insn = gen_main_base_31_small (base_reg, pool->label);
4478 insn = emit_insn_after (insn, pool->pool_insn);
4479 INSN_ADDRESSES_NEW (insn, -1);
4480 remove_insn (pool->pool_insn);
4482 insn = emit_label_after (pool->label, insn);
4483 INSN_ADDRESSES_NEW (insn, -1);
4485 insn = get_last_insn ();
4486 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4487 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4489 s390_dump_pool (pool, 1);
4492 /* Otherwise, we emit an inline literal pool and use BASR to branch
4493 over it, setting up the pool register at the same time. */
4496 rtx pool_end = gen_label_rtx ();
4498 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
4499 insn = emit_insn_after (insn, pool->pool_insn);
4500 INSN_ADDRESSES_NEW (insn, -1);
4501 remove_insn (pool->pool_insn);
4503 insn = emit_label_after (pool->label, insn);
4504 INSN_ADDRESSES_NEW (insn, -1);
4506 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4507 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4509 insn = emit_label_after (pool_end, pool->pool_insn);
4510 INSN_ADDRESSES_NEW (insn, -1);
4512 s390_dump_pool (pool, 1);
4516 /* Replace all literal pool references. */
4518 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4521 replace_ltrel_base (&PATTERN (insn), base_reg);
4523 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4525 rtx addr, pool_ref = NULL_RTX;
4526 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4529 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
4530 get_pool_mode (pool_ref));
4531 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4532 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4533 INSN_CODE (insn) = -1;
4539 /* Free the pool. */
4540 s390_free_pool (pool);
4543 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4544 We have decided we cannot use this pool, so revert all changes
4545 to the current function that were done by s390_mainpool_start. */
4547 s390_mainpool_cancel (struct constant_pool *pool)
4549 /* We didn't actually change the instruction stream, so simply
4550 free the pool memory. */
4551 s390_free_pool (pool);
4555 /* Chunkify the literal pool. BASE_REG is to be used as pool
4558 #define S390_POOL_CHUNK_MIN 0xc00
4559 #define S390_POOL_CHUNK_MAX 0xe00
4561 static struct constant_pool *
4562 s390_chunkify_start (rtx base_reg)
4564 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
4567 rtx pending_ltrel = NULL_RTX;
4570 rtx (*gen_reload_base) (rtx, rtx) =
4571 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
4574 /* We need correct insn addresses. */
4576 shorten_branches (get_insns ());
4578 /* Scan all insns and move literals to pool chunks. */
4580 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4582 /* Check for pending LTREL_BASE. */
4585 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
4588 if (ltrel_base == pending_ltrel)
4589 pending_ltrel = NULL_RTX;
4595 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4597 rtx pool_ref = NULL_RTX;
4598 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4601 rtx constant = get_pool_constant (pool_ref);
4602 enum machine_mode mode = get_pool_mode (pool_ref);
4605 curr_pool = s390_start_pool (&pool_list, insn);
4607 s390_add_constant (curr_pool, constant, mode);
4608 s390_add_pool_insn (curr_pool, insn);
4610 /* Don't split the pool chunk between a LTREL_OFFSET load
4611 and the corresponding LTREL_BASE. */
4612 if (GET_CODE (constant) == CONST
4613 && GET_CODE (XEXP (constant, 0)) == UNSPEC
4614 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
4618 pending_ltrel = pool_ref;
4623 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
4626 s390_add_pool_insn (curr_pool, insn);
4627 /* An LTREL_BASE must follow within the same basic block. */
4633 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
4634 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
4637 if (TARGET_CPU_ZARCH)
4639 if (curr_pool->size < S390_POOL_CHUNK_MAX)
4642 s390_end_pool (curr_pool, NULL_RTX);
4647 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
4648 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
4651 /* We will later have to insert base register reload insns.
4652 Those will have an effect on code size, which we need to
4653 consider here. This calculation makes rather pessimistic
4654 worst-case assumptions. */
4655 if (GET_CODE (insn) == CODE_LABEL)
4658 if (chunk_size < S390_POOL_CHUNK_MIN
4659 && curr_pool->size < S390_POOL_CHUNK_MIN)
4662 /* Pool chunks can only be inserted after BARRIERs ... */
4663 if (GET_CODE (insn) == BARRIER)
4665 s390_end_pool (curr_pool, insn);
4670 /* ... so if we don't find one in time, create one. */
4671 else if ((chunk_size > S390_POOL_CHUNK_MAX
4672 || curr_pool->size > S390_POOL_CHUNK_MAX))
4674 rtx label, jump, barrier;
4676 /* We can insert the barrier only after a 'real' insn. */
4677 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
4679 if (get_attr_length (insn) == 0)
4682 /* Don't separate LTREL_BASE from the corresponding
4683 LTREL_OFFSET load. */
4687 label = gen_label_rtx ();
4688 jump = emit_jump_insn_after (gen_jump (label), insn);
4689 barrier = emit_barrier_after (jump);
4690 insn = emit_label_after (label, barrier);
4691 JUMP_LABEL (jump) = label;
4692 LABEL_NUSES (label) = 1;
4694 INSN_ADDRESSES_NEW (jump, -1);
4695 INSN_ADDRESSES_NEW (barrier, -1);
4696 INSN_ADDRESSES_NEW (insn, -1);
4698 s390_end_pool (curr_pool, barrier);
4706 s390_end_pool (curr_pool, NULL_RTX);
4711 /* Find all labels that are branched into
4712 from an insn belonging to a different chunk. */
4714 far_labels = BITMAP_XMALLOC ();
4716 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4718 /* Labels marked with LABEL_PRESERVE_P can be target
4719 of non-local jumps, so we have to mark them.
4720 The same holds for named labels.
4722 Don't do that, however, if it is the label before
4725 if (GET_CODE (insn) == CODE_LABEL
4726 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
4728 rtx vec_insn = next_real_insn (insn);
4729 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4730 PATTERN (vec_insn) : NULL_RTX;
4732 || !(GET_CODE (vec_pat) == ADDR_VEC
4733 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4734 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
4737 /* If we have a direct jump (conditional or unconditional)
4738 or a casesi jump, check all potential targets. */
4739 else if (GET_CODE (insn) == JUMP_INSN)
4741 rtx pat = PATTERN (insn);
4742 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4743 pat = XVECEXP (pat, 0, 0);
4745 if (GET_CODE (pat) == SET)
4747 rtx label = JUMP_LABEL (insn);
4750 if (s390_find_pool (pool_list, label)
4751 != s390_find_pool (pool_list, insn))
4752 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4755 else if (GET_CODE (pat) == PARALLEL
4756 && XVECLEN (pat, 0) == 2
4757 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
4758 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
4759 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
4761 /* Find the jump table used by this casesi jump. */
4762 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
4763 rtx vec_insn = next_real_insn (vec_label);
4764 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4765 PATTERN (vec_insn) : NULL_RTX;
4767 && (GET_CODE (vec_pat) == ADDR_VEC
4768 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4770 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
4772 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
4774 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
4776 if (s390_find_pool (pool_list, label)
4777 != s390_find_pool (pool_list, insn))
4778 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4785 /* Insert base register reload insns before every pool. */
4787 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4789 rtx new_insn = gen_reload_base (base_reg, curr_pool->label);
4790 rtx insn = curr_pool->first_insn;
4791 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
4794 /* Insert base register reload insns at every far label. */
4796 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4797 if (GET_CODE (insn) == CODE_LABEL
4798 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
4800 struct constant_pool *pool = s390_find_pool (pool_list, insn);
4803 rtx new_insn = gen_reload_base (base_reg, pool->label);
4804 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
4809 BITMAP_XFREE (far_labels);
4812 /* Recompute insn addresses. */
4814 init_insn_lengths ();
4815 shorten_branches (get_insns ());
4820 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4821 After we have decided to use this list, finish implementing
4822 all changes to the current function as required. BASE_REG is
4823 to be used as pool base register. */
4826 s390_chunkify_finish (struct constant_pool *pool_list, rtx base_reg)
4828 struct constant_pool *curr_pool = NULL;
4832 /* Replace all literal pool references. */
4834 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4837 replace_ltrel_base (&PATTERN (insn), base_reg);
4839 curr_pool = s390_find_pool (pool_list, insn);
4843 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4845 rtx addr, pool_ref = NULL_RTX;
4846 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4849 addr = s390_find_constant (curr_pool, get_pool_constant (pool_ref),
4850 get_pool_mode (pool_ref));
4851 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4852 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4853 INSN_CODE (insn) = -1;
4858 /* Dump out all literal pools. */
4860 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4861 s390_dump_pool (curr_pool, 0);
4863 /* Free pool list. */
4867 struct constant_pool *next = pool_list->next;
4868 s390_free_pool (pool_list);
4873 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4874 We have decided we cannot use this list, so revert all changes
4875 to the current function that were done by s390_chunkify_start. */
4878 s390_chunkify_cancel (struct constant_pool *pool_list)
4880 struct constant_pool *curr_pool = NULL;
4883 /* Remove all pool placeholder insns. */
4885 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4887 /* Did we insert an extra barrier? Remove it. */
4888 rtx barrier = PREV_INSN (curr_pool->pool_insn);
4889 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
4890 rtx label = NEXT_INSN (curr_pool->pool_insn);
4892 if (jump && GET_CODE (jump) == JUMP_INSN
4893 && barrier && GET_CODE (barrier) == BARRIER
4894 && label && GET_CODE (label) == CODE_LABEL
4895 && GET_CODE (PATTERN (jump)) == SET
4896 && SET_DEST (PATTERN (jump)) == pc_rtx
4897 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
4898 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
4901 remove_insn (barrier);
4902 remove_insn (label);
4905 remove_insn (curr_pool->pool_insn);
4908 /* Remove all base register reload insns. */
4910 for (insn = get_insns (); insn; )
4912 rtx next_insn = NEXT_INSN (insn);
4914 if (GET_CODE (insn) == INSN
4915 && GET_CODE (PATTERN (insn)) == SET
4916 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
4917 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
4923 /* Free pool list. */
4927 struct constant_pool *next = pool_list->next;
4928 s390_free_pool (pool_list);
4934 /* Output to FILE the constant pool entry EXP in mode MODE
4935 with alignment ALIGN. */
4938 s390_output_pool_entry (FILE *file, rtx exp, enum machine_mode mode,
4943 switch (GET_MODE_CLASS (mode))
4946 if (GET_CODE (exp) != CONST_DOUBLE)
4949 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
4950 assemble_real (r, mode, align);
4954 if (GET_CODE (exp) == CONST
4955 || GET_CODE (exp) == SYMBOL_REF
4956 || GET_CODE (exp) == LABEL_REF)
4958 fputs (integer_asm_op (GET_MODE_SIZE (mode), TRUE), file);
4959 s390_output_symbolic_const (file, exp);
4964 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
4974 /* Rework the prolog/epilog to avoid saving/restoring
4975 registers unnecessarily. BASE_USED specifies whether
4976 the literal pool base register needs to be saved. */
4979 s390_optimize_prolog (bool base_used)
4981 int save_first, save_last, restore_first, restore_last;
4983 rtx insn, new_insn, next_insn;
4985 /* Recompute regs_ever_live data for special registers. */
4986 regs_ever_live[BASE_REGISTER] = base_used;
4987 regs_ever_live[RETURN_REGNUM] = cfun->machine->save_return_addr_p;
4988 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
4991 /* Find first and last gpr to be saved. */
4993 for (i = 6; i < 16; i++)
4994 if (regs_ever_live[i])
4996 || i == STACK_POINTER_REGNUM
4997 || i == RETURN_REGNUM
4998 || i == BASE_REGISTER
4999 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5002 for (j = 15; j > i; j--)
5003 if (regs_ever_live[j])
5005 || j == STACK_POINTER_REGNUM
5006 || j == RETURN_REGNUM
5007 || j == BASE_REGISTER
5008 || (flag_pic && j == (int)PIC_OFFSET_TABLE_REGNUM))
5013 /* Nothing to save/restore. */
5014 save_first = restore_first = -1;
5015 save_last = restore_last = -1;
5019 /* Save/restore from i to j. */
5020 save_first = restore_first = i;
5021 save_last = restore_last = j;
5024 /* Varargs functions need to save gprs 2 to 6. */
5025 if (current_function_stdarg)
5033 /* If all special registers are in fact used, there's nothing we
5034 can do, so no point in walking the insn list. */
5035 if (i <= BASE_REGISTER && j >= BASE_REGISTER
5036 && (TARGET_CPU_ZARCH || (i <= RETURN_REGNUM && j >= RETURN_REGNUM)))
5040 /* Search for prolog/epilog insns and replace them. */
5042 for (insn = get_insns (); insn; insn = next_insn)
5044 int first, last, off;
5045 rtx set, base, offset;
5047 next_insn = NEXT_INSN (insn);
5049 if (GET_CODE (insn) != INSN)
5052 if (GET_CODE (PATTERN (insn)) == PARALLEL
5053 && store_multiple_operation (PATTERN (insn), VOIDmode))
5055 set = XVECEXP (PATTERN (insn), 0, 0);
5056 first = REGNO (SET_SRC (set));
5057 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5058 offset = const0_rtx;
5059 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5060 off = INTVAL (offset) - first * UNITS_PER_WORD;
5062 if (GET_CODE (base) != REG || off < 0)
5064 if (first > BASE_REGISTER || last < BASE_REGISTER)
5067 if (save_first != -1)
5069 new_insn = save_gprs (base, off, save_first, save_last);
5070 new_insn = emit_insn_before (new_insn, insn);
5071 INSN_ADDRESSES_NEW (new_insn, -1);
5078 if (GET_CODE (PATTERN (insn)) == SET
5079 && GET_CODE (SET_SRC (PATTERN (insn))) == REG
5080 && REGNO (SET_SRC (PATTERN (insn))) == BASE_REGISTER
5081 && GET_CODE (SET_DEST (PATTERN (insn))) == MEM)
5083 set = PATTERN (insn);
5084 offset = const0_rtx;
5085 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5086 off = INTVAL (offset) - BASE_REGISTER * UNITS_PER_WORD;
5088 if (GET_CODE (base) != REG || off < 0)
5091 if (save_first != -1)
5093 new_insn = save_gprs (base, off, save_first, save_last);
5094 new_insn = emit_insn_before (new_insn, insn);
5095 INSN_ADDRESSES_NEW (new_insn, -1);
5102 if (GET_CODE (PATTERN (insn)) == PARALLEL
5103 && load_multiple_operation (PATTERN (insn), VOIDmode))
5105 set = XVECEXP (PATTERN (insn), 0, 0);
5106 first = REGNO (SET_DEST (set));
5107 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5108 offset = const0_rtx;
5109 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5110 off = INTVAL (offset) - first * UNITS_PER_WORD;
5112 if (GET_CODE (base) != REG || off < 0)
5114 if (first > BASE_REGISTER || last < BASE_REGISTER)
5117 if (restore_first != -1)
5119 new_insn = restore_gprs (base, off, restore_first, restore_last);
5120 new_insn = emit_insn_before (new_insn, insn);
5121 INSN_ADDRESSES_NEW (new_insn, -1);
5128 if (GET_CODE (PATTERN (insn)) == SET
5129 && GET_CODE (SET_DEST (PATTERN (insn))) == REG
5130 && REGNO (SET_DEST (PATTERN (insn))) == BASE_REGISTER
5131 && GET_CODE (SET_SRC (PATTERN (insn))) == MEM)
5133 set = PATTERN (insn);
5134 offset = const0_rtx;
5135 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5136 off = INTVAL (offset) - BASE_REGISTER * UNITS_PER_WORD;
5138 if (GET_CODE (base) != REG || off < 0)
5141 if (restore_first != -1)
5143 new_insn = restore_gprs (base, off, restore_first, restore_last);
5144 new_insn = emit_insn_before (new_insn, insn);
5145 INSN_ADDRESSES_NEW (new_insn, -1);
5154 /* Perform machine-dependent processing. */
5159 rtx base_reg = gen_rtx_REG (Pmode, BASE_REGISTER);
5160 bool base_used = false;
5161 bool pool_overflow = false;
5163 /* Make sure all splits have been performed; splits after
5164 machine_dependent_reorg might confuse insn length counts. */
5165 split_all_insns_noflow ();
5168 /* In small leaf functions, try to use an unused call-clobbered
5169 register as base register to avoid save/restore overhead. */
5170 if (current_function_is_leaf && !regs_ever_live[5])
5171 base_reg = gen_rtx_REG (Pmode, 5);
5174 /* Install the main literal pool and the associated base
5175 register load insns.
5177 In addition, there are two problematic situations we need
5180 - the literal pool might be > 4096 bytes in size, so that
5181 some of its elements cannot be directly accessed
5183 - a branch target might be > 64K away from the branch, so that
5184 it is not possible to use a PC-relative instruction.
5186 To fix those, we split the single literal pool into multiple
5187 pool chunks, reloading the pool base register at various
5188 points throughout the function to ensure it always points to
5189 the pool chunk the following code expects, and / or replace
5190 PC-relative branches by absolute branches.
5192 However, the two problems are interdependent: splitting the
5193 literal pool can move a branch further away from its target,
5194 causing the 64K limit to overflow, and on the other hand,
5195 replacing a PC-relative branch by an absolute branch means
5196 we need to put the branch target address into the literal
5197 pool, possibly causing it to overflow.
5199 So, we loop trying to fix up both problems until we manage
5200 to satisfy both conditions at the same time. Note that the
5201 loop is guaranteed to terminate as every pass of the loop
5202 strictly decreases the total number of PC-relative branches
5203 in the function. (This is not completely true as there
5204 might be branch-over-pool insns introduced by chunkify_start.
5205 Those never need to be split however.) */
5209 struct constant_pool *pool = NULL;
5211 /* Collect the literal pool. */
5214 pool = s390_mainpool_start ();
5216 pool_overflow = true;
5219 /* If literal pool overflowed, start to chunkify it. */
5221 pool = s390_chunkify_start (base_reg);
5223 /* Split out-of-range branches. If this has created new
5224 literal pool entries, cancel current chunk list and
5225 recompute it. zSeries machines have large branch
5226 instructions, so we never need to split a branch. */
5227 if (!TARGET_CPU_ZARCH && s390_split_branches ())
5230 s390_chunkify_cancel (pool);
5232 s390_mainpool_cancel (pool);
5237 /* If we made it up to here, both conditions are satisfied.
5238 Finish up literal pool related changes. */
5239 if ((pool_overflow || pool->size > 0)
5240 && REGNO (base_reg) == BASE_REGISTER)
5244 s390_chunkify_finish (pool, base_reg);
5246 s390_mainpool_finish (pool, base_reg);
5251 s390_optimize_prolog (base_used);
5255 /* Return an RTL expression representing the value of the return address
5256 for the frame COUNT steps up from the current frame. FRAME is the
5257 frame pointer of that frame. */
5260 s390_return_addr_rtx (int count, rtx frame)
5264 /* For the current frame, we need to make sure the initial
5265 value of RETURN_REGNUM is actually saved. */
5268 cfun->machine->save_return_addr_p = true;
5270 /* To retrieve the return address we read the stack slot where the
5271 corresponding RETURN_REGNUM value was saved. */
5273 addr = plus_constant (frame, RETURN_REGNUM * UNITS_PER_WORD);
5274 addr = memory_address (Pmode, addr);
5275 return gen_rtx_MEM (Pmode, addr);
5278 /* Find first call clobbered register unsused in a function.
5279 This could be used as base register in a leaf function
5280 or for holding the return address before epilogue. */
5283 find_unused_clobbered_reg (void)
5286 for (i = 0; i < 6; i++)
5287 if (!regs_ever_live[i])
5292 /* Fill FRAME with info about frame of current function. */
5295 s390_frame_info (void)
5298 HOST_WIDE_INT fsize = get_frame_size ();
5300 if (fsize > 0x7fff0000)
5301 fatal_error ("Total size of local variables exceeds architecture limit.");
5303 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5304 cfun->machine->save_fprs_p = 0;
5306 for (i = 24; i < 32; i++)
5307 if (regs_ever_live[i] && !global_regs[i])
5309 cfun->machine->save_fprs_p = 1;
5313 cfun->machine->frame_size = fsize + cfun->machine->save_fprs_p * 64;
5315 /* Does function need to setup frame and save area. */
5317 if (! current_function_is_leaf
5318 || cfun->machine->frame_size > 0
5319 || current_function_calls_alloca
5320 || current_function_stdarg)
5321 cfun->machine->frame_size += STARTING_FRAME_OFFSET;
5323 /* If we use the return register, we'll need to make sure
5324 it is going to be saved/restored. */
5326 if (!current_function_is_leaf
5327 || regs_ever_live[RETURN_REGNUM])
5328 cfun->machine->save_return_addr_p = 1;
5330 /* Find first and last gpr to be saved. Note that at this point,
5331 we assume the base register and -on S/390- the return register
5332 always need to be saved. This is done because the usage of these
5333 register might change even after the prolog was emitted.
5334 If it turns out later that we really don't need them, the
5335 prolog/epilog code is modified again. */
5337 regs_ever_live[BASE_REGISTER] = 1;
5338 if (!TARGET_CPU_ZARCH || cfun->machine->save_return_addr_p)
5339 regs_ever_live[RETURN_REGNUM] = 1;
5340 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5342 for (i = 6; i < 16; i++)
5343 if (regs_ever_live[i])
5345 || i == STACK_POINTER_REGNUM
5346 || i == RETURN_REGNUM
5347 || i == BASE_REGISTER
5348 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5351 for (j = 15; j > i; j--)
5352 if (regs_ever_live[j])
5354 || j == STACK_POINTER_REGNUM
5355 || j == RETURN_REGNUM
5356 || j == BASE_REGISTER
5357 || (flag_pic && j == (int)PIC_OFFSET_TABLE_REGNUM))
5360 /* Save / Restore from gpr i to j. */
5361 cfun->machine->first_save_gpr = i;
5362 cfun->machine->first_restore_gpr = i;
5363 cfun->machine->last_save_gpr = j;
5365 /* Varargs functions need to save gprs 2 to 6. */
5366 if (current_function_stdarg)
5367 cfun->machine->first_save_gpr = 2;
5370 /* Return offset between argument pointer and frame pointer
5371 initially after prologue. */
5374 s390_arg_frame_offset (void)
5376 HOST_WIDE_INT fsize = get_frame_size ();
5379 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5382 for (i = 24; i < 32; i++)
5383 if (regs_ever_live[i] && !global_regs[i])
5389 fsize = fsize + save_fprs_p * 64;
5391 /* Does function need to setup frame and save area. */
5393 if (! current_function_is_leaf
5395 || current_function_calls_alloca
5396 || current_function_stdarg)
5397 fsize += STARTING_FRAME_OFFSET;
5398 return fsize + STACK_POINTER_OFFSET;
5401 /* Emit insn to save fpr REGNUM at offset OFFSET relative
5402 to register BASE. Return generated insn. */
5405 save_fpr (rtx base, int offset, int regnum)
5408 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5409 set_mem_alias_set (addr, s390_sr_alias_set);
5411 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
5414 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
5415 to register BASE. Return generated insn. */
5418 restore_fpr (rtx base, int offset, int regnum)
5421 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5422 set_mem_alias_set (addr, s390_sr_alias_set);
5424 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
5427 /* Generate insn to save registers FIRST to LAST into
5428 the register save area located at offset OFFSET
5429 relative to register BASE. */
5432 save_gprs (rtx base, int offset, int first, int last)
5434 rtx addr, insn, note;
5437 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5438 addr = gen_rtx_MEM (Pmode, addr);
5439 set_mem_alias_set (addr, s390_sr_alias_set);
5441 /* Special-case single register. */
5445 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
5447 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
5449 RTX_FRAME_RELATED_P (insn) = 1;
5454 insn = gen_store_multiple (addr,
5455 gen_rtx_REG (Pmode, first),
5456 GEN_INT (last - first + 1));
5459 /* We need to set the FRAME_RELATED flag on all SETs
5460 inside the store-multiple pattern.
5462 However, we must not emit DWARF records for registers 2..5
5463 if they are stored for use by variable arguments ...
5465 ??? Unfortunately, it is not enough to simply not the the
5466 FRAME_RELATED flags for those SETs, because the first SET
5467 of the PARALLEL is always treated as if it had the flag
5468 set, even if it does not. Therefore we emit a new pattern
5469 without those registers as REG_FRAME_RELATED_EXPR note. */
5473 rtx pat = PATTERN (insn);
5475 for (i = 0; i < XVECLEN (pat, 0); i++)
5476 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
5477 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
5479 RTX_FRAME_RELATED_P (insn) = 1;
5483 addr = plus_constant (base, offset + 6 * UNITS_PER_WORD);
5484 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
5485 gen_rtx_REG (Pmode, 6),
5486 GEN_INT (last - 6 + 1));
5487 note = PATTERN (note);
5490 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5491 note, REG_NOTES (insn));
5493 for (i = 0; i < XVECLEN (note, 0); i++)
5494 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
5495 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
5497 RTX_FRAME_RELATED_P (insn) = 1;
5503 /* Generate insn to restore registers FIRST to LAST from
5504 the register save area located at offset OFFSET
5505 relative to register BASE. */
5508 restore_gprs (rtx base, int offset, int first, int last)
5512 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5513 addr = gen_rtx_MEM (Pmode, addr);
5514 set_mem_alias_set (addr, s390_sr_alias_set);
5516 /* Special-case single register. */
5520 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
5522 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
5527 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
5529 GEN_INT (last - first + 1));
5533 /* Emit code to load the GOT register. If MAYBE_DEAD is true,
5534 annotate generated insns with REG_MAYBE_DEAD notes. */
5536 static GTY(()) rtx got_symbol;
5538 s390_load_got (int maybe_dead)
5542 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
5543 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
5546 if (TARGET_CPU_ZARCH)
5548 rtx insn = emit_move_insn (pic_offset_table_rtx, got_symbol);
5550 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5557 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
5558 UNSPEC_LTREL_OFFSET);
5559 offset = gen_rtx_CONST (Pmode, offset);
5560 offset = force_const_mem (Pmode, offset);
5562 insn = emit_move_insn (pic_offset_table_rtx, offset);
5564 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5567 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
5569 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
5571 insn = emit_move_insn (pic_offset_table_rtx, offset);
5573 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5578 /* Expand the prologue into a bunch of separate insns. */
5581 s390_emit_prologue (void)
5587 /* Compute frame_info. */
5591 /* Choose best register to use for temp use within prologue.
5592 See below for why TPF must use the register 1. */
5594 if (!current_function_is_leaf
5596 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5598 temp_reg = gen_rtx_REG (Pmode, 1);
5600 /* Save call saved gprs. */
5602 insn = save_gprs (stack_pointer_rtx, 0,
5603 cfun->machine->first_save_gpr, cfun->machine->last_save_gpr);
5606 /* Dummy insn to mark literal pool slot. */
5608 emit_insn (gen_main_pool ());
5610 /* Save fprs for variable args. */
5612 if (current_function_stdarg)
5613 for (i = 16; i < (TARGET_64BIT ? 20 : 18); i++)
5614 save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5616 /* Save fprs 4 and 6 if used (31 bit ABI). */
5619 for (i = 18; i < 20; i++)
5620 if (regs_ever_live[i] && !global_regs[i])
5622 insn = save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5623 RTX_FRAME_RELATED_P (insn) = 1;
5626 /* Decrement stack pointer. */
5628 if (cfun->machine->frame_size > 0)
5630 rtx frame_off = GEN_INT (-cfun->machine->frame_size);
5632 /* Save incoming stack pointer into temp reg. */
5634 if (TARGET_BACKCHAIN || cfun->machine->save_fprs_p)
5636 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
5639 /* Subtract frame size from stack pointer. */
5641 if (DISP_IN_RANGE (INTVAL (frame_off)))
5643 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5644 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5646 insn = emit_insn (insn);
5650 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
5651 frame_off = force_const_mem (Pmode, frame_off);
5653 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
5656 RTX_FRAME_RELATED_P (insn) = 1;
5658 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5659 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5660 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5661 GEN_INT (-cfun->machine->frame_size))),
5664 /* Set backchain. */
5666 if (TARGET_BACKCHAIN)
5668 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
5669 set_mem_alias_set (addr, s390_sr_alias_set);
5670 insn = emit_insn (gen_move_insn (addr, temp_reg));
5673 /* If we support asynchronous exceptions (e.g. for Java),
5674 we need to make sure the backchain pointer is set up
5675 before any possibly trapping memory access. */
5677 if (TARGET_BACKCHAIN && flag_non_call_exceptions)
5679 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
5680 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
5684 /* Save fprs 8 - 15 (64 bit ABI). */
5686 if (cfun->machine->save_fprs_p)
5688 insn = emit_insn (gen_add2_insn (temp_reg, GEN_INT(-64)));
5690 for (i = 24; i < 32; i++)
5691 if (regs_ever_live[i] && !global_regs[i])
5693 rtx addr = plus_constant (stack_pointer_rtx,
5694 cfun->machine->frame_size - 64 + (i-24)*8);
5696 insn = save_fpr (temp_reg, (i-24)*8, i);
5697 RTX_FRAME_RELATED_P (insn) = 1;
5699 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5700 gen_rtx_SET (VOIDmode,
5701 gen_rtx_MEM (DFmode, addr),
5702 gen_rtx_REG (DFmode, i)),
5707 /* Set frame pointer, if needed. */
5709 if (frame_pointer_needed)
5711 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
5712 RTX_FRAME_RELATED_P (insn) = 1;
5715 /* Set up got pointer, if needed. */
5717 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
5718 s390_load_got(true);
5722 /* Generate a BAS instruction to serve as a function
5723 entry intercept to facilitate the use of tracing
5724 algorithms located at the branch target.
5726 This must use register 1. */
5731 addr = GEN_INT (0xfe0);
5732 unkn = CONST0_RTX (SImode);
5733 link = gen_rtx_REG (Pmode, 1);
5735 emit_call_insn (gen_call_exp (gen_rtx_MEM (QImode, addr), unkn, link));
5737 /* Emit a blockage here so that all code
5738 lies between the profiling mechanisms. */
5739 emit_insn (gen_blockage ());
5743 /* Expand the epilogue into a bunch of separate insns. */
5746 s390_emit_epilogue (void)
5748 rtx frame_pointer, return_reg;
5749 int area_bottom, area_top, offset = 0;
5756 /* Generate a BAS instruction to serve as a function
5757 entry intercept to facilitate the use of tracing
5758 algorithms located at the branch target.
5760 This must use register 1. */
5766 addr = GEN_INT (0xfe6);
5767 unkn = CONST0_RTX (SImode);
5768 link = gen_rtx_REG (Pmode, 1);
5770 /* Emit a blockage here so that all code
5771 lies between the profiling mechanisms. */
5772 emit_insn (gen_blockage ());
5774 emit_call_insn (gen_call_exp (gen_rtx_MEM (QImode, addr), unkn, link));
5777 /* Check whether to use frame or stack pointer for restore. */
5779 frame_pointer = frame_pointer_needed ?
5780 hard_frame_pointer_rtx : stack_pointer_rtx;
5782 /* Compute which parts of the save area we need to access. */
5784 if (cfun->machine->first_restore_gpr != -1)
5786 area_bottom = cfun->machine->first_restore_gpr * UNITS_PER_WORD;
5787 area_top = (cfun->machine->last_save_gpr + 1) * UNITS_PER_WORD;
5791 area_bottom = INT_MAX;
5797 if (cfun->machine->save_fprs_p)
5799 if (area_bottom > -64)
5807 for (i = 18; i < 20; i++)
5808 if (regs_ever_live[i] && !global_regs[i])
5810 if (area_bottom > 16*UNITS_PER_WORD + 8*(i-16))
5811 area_bottom = 16*UNITS_PER_WORD + 8*(i-16);
5812 if (area_top < 16*UNITS_PER_WORD + 8*(i-16) + 8)
5813 area_top = 16*UNITS_PER_WORD + 8*(i-16) + 8;
5817 /* Check whether we can access the register save area.
5818 If not, increment the frame pointer as required. */
5820 if (area_top <= area_bottom)
5822 /* Nothing to restore. */
5824 else if (DISP_IN_RANGE (cfun->machine->frame_size + area_bottom)
5825 && DISP_IN_RANGE (cfun->machine->frame_size + area_top-1))
5827 /* Area is in range. */
5828 offset = cfun->machine->frame_size;
5832 rtx insn, frame_off;
5834 offset = area_bottom < 0 ? -area_bottom : 0;
5835 frame_off = GEN_INT (cfun->machine->frame_size - offset);
5837 if (DISP_IN_RANGE (INTVAL (frame_off)))
5839 insn = gen_rtx_SET (VOIDmode, frame_pointer,
5840 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
5841 insn = emit_insn (insn);
5845 if (!CONST_OK_FOR_CONSTRAINT_P (INTVAL (frame_off), 'K', "K"))
5846 frame_off = force_const_mem (Pmode, frame_off);
5848 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
5852 /* Restore call saved fprs. */
5856 if (cfun->machine->save_fprs_p)
5857 for (i = 24; i < 32; i++)
5858 if (regs_ever_live[i] && !global_regs[i])
5859 restore_fpr (frame_pointer,
5860 offset - 64 + (i-24) * 8, i);
5864 for (i = 18; i < 20; i++)
5865 if (regs_ever_live[i] && !global_regs[i])
5866 restore_fpr (frame_pointer,
5867 offset + 16*UNITS_PER_WORD + 8*(i-16), i);
5870 /* Return register. */
5872 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5874 /* Restore call saved gprs. */
5876 if (cfun->machine->first_restore_gpr != -1)
5881 /* Check for global register and save them
5882 to stack location from where they get restored. */
5884 for (i = cfun->machine->first_restore_gpr;
5885 i <= cfun->machine->last_save_gpr;
5888 /* These registers are special and need to be
5889 restored in any case. */
5890 if (i == STACK_POINTER_REGNUM
5891 || i == RETURN_REGNUM
5892 || i == BASE_REGISTER
5893 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5898 addr = plus_constant (frame_pointer,
5899 offset + i * UNITS_PER_WORD);
5900 addr = gen_rtx_MEM (Pmode, addr);
5901 set_mem_alias_set (addr, s390_sr_alias_set);
5902 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
5906 /* Fetch return address from stack before load multiple,
5907 this will do good for scheduling. */
5909 if (cfun->machine->save_return_addr_p
5910 || (cfun->machine->first_restore_gpr < BASE_REGISTER
5911 && cfun->machine->last_save_gpr > RETURN_REGNUM))
5913 int return_regnum = find_unused_clobbered_reg();
5916 return_reg = gen_rtx_REG (Pmode, return_regnum);
5918 addr = plus_constant (frame_pointer,
5919 offset + RETURN_REGNUM * UNITS_PER_WORD);
5920 addr = gen_rtx_MEM (Pmode, addr);
5921 set_mem_alias_set (addr, s390_sr_alias_set);
5922 emit_move_insn (return_reg, addr);
5925 /* ??? As references to the base register are not made
5926 explicit in insn RTX code, we have to add a barrier here
5927 to prevent incorrect scheduling. */
5929 emit_insn (gen_blockage());
5931 insn = restore_gprs (frame_pointer, offset,
5932 cfun->machine->first_restore_gpr,
5933 cfun->machine->last_save_gpr);
5937 /* Return to caller. */
5939 p = rtvec_alloc (2);
5941 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
5942 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
5943 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
5947 /* Return the size in bytes of a function argument of
5948 type TYPE and/or mode MODE. At least one of TYPE or
5949 MODE must be specified. */
5952 s390_function_arg_size (enum machine_mode mode, tree type)
5955 return int_size_in_bytes (type);
5957 /* No type info available for some library calls ... */
5958 if (mode != BLKmode)
5959 return GET_MODE_SIZE (mode);
5961 /* If we have neither type nor mode, abort */
5965 /* Return true if a function argument of type TYPE and mode MODE
5966 is to be passed in a floating-point register, if available. */
5969 s390_function_arg_float (enum machine_mode mode, tree type)
5971 int size = s390_function_arg_size (mode, type);
5975 /* Soft-float changes the ABI: no floating-point registers are used. */
5976 if (TARGET_SOFT_FLOAT)
5979 /* No type info available for some library calls ... */
5981 return mode == SFmode || mode == DFmode;
5983 /* The ABI says that record types with a single member are treated
5984 just like that member would be. */
5985 while (TREE_CODE (type) == RECORD_TYPE)
5987 tree field, single = NULL_TREE;
5989 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
5991 if (TREE_CODE (field) != FIELD_DECL)
5994 if (single == NULL_TREE)
5995 single = TREE_TYPE (field);
6000 if (single == NULL_TREE)
6006 return TREE_CODE (type) == REAL_TYPE;
6009 /* Return true if a function argument of type TYPE and mode MODE
6010 is to be passed in an integer register, or a pair of integer
6011 registers, if available. */
6014 s390_function_arg_integer (enum machine_mode mode, tree type)
6016 int size = s390_function_arg_size (mode, type);
6020 /* No type info available for some library calls ... */
6022 return GET_MODE_CLASS (mode) == MODE_INT
6023 || (TARGET_SOFT_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT);
6025 /* We accept small integral (and similar) types. */
6026 if (INTEGRAL_TYPE_P (type)
6027 || POINTER_TYPE_P (type)
6028 || TREE_CODE (type) == OFFSET_TYPE
6029 || (TARGET_SOFT_FLOAT && TREE_CODE (type) == REAL_TYPE))
6032 /* We also accept structs of size 1, 2, 4, 8 that are not
6033 passed in floating-point registers. */
6034 if (AGGREGATE_TYPE_P (type)
6035 && exact_log2 (size) >= 0
6036 && !s390_function_arg_float (mode, type))
6042 /* Return 1 if a function argument of type TYPE and mode MODE
6043 is to be passed by reference. The ABI specifies that only
6044 structures of size 1, 2, 4, or 8 bytes are passed by value,
6045 all other structures (and complex numbers) are passed by
6049 s390_function_arg_pass_by_reference (enum machine_mode mode, tree type)
6051 int size = s390_function_arg_size (mode, type);
6057 if (AGGREGATE_TYPE_P (type) && exact_log2 (size) < 0)
6060 if (TREE_CODE (type) == COMPLEX_TYPE
6061 || TREE_CODE (type) == VECTOR_TYPE)
6068 /* Update the data in CUM to advance over an argument of mode MODE and
6069 data type TYPE. (TYPE is null for libcalls where that information
6070 may not be available.). The boolean NAMED specifies whether the
6071 argument is a named argument (as opposed to an unnamed argument
6072 matching an ellipsis). */
6075 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
6076 tree type, int named ATTRIBUTE_UNUSED)
6078 if (s390_function_arg_pass_by_reference (mode, type))
6082 else if (s390_function_arg_float (mode, type))
6086 else if (s390_function_arg_integer (mode, type))
6088 int size = s390_function_arg_size (mode, type);
6089 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
6095 /* Define where to put the arguments to a function.
6096 Value is zero to push the argument on the stack,
6097 or a hard register in which to store the argument.
6099 MODE is the argument's machine mode.
6100 TYPE is the data type of the argument (as a tree).
6101 This is null for libcalls where that information may
6103 CUM is a variable of type CUMULATIVE_ARGS which gives info about
6104 the preceding args and about the function being called.
6105 NAMED is nonzero if this argument is a named parameter
6106 (otherwise it is an extra parameter matching an ellipsis).
6108 On S/390, we use general purpose registers 2 through 6 to
6109 pass integer, pointer, and certain structure arguments, and
6110 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
6111 to pass floating point arguments. All remaining arguments
6112 are pushed to the stack. */
6115 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
6116 int named ATTRIBUTE_UNUSED)
6118 if (s390_function_arg_pass_by_reference (mode, type))
6121 if (s390_function_arg_float (mode, type))
6123 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
6126 return gen_rtx (REG, mode, cum->fprs + 16);
6128 else if (s390_function_arg_integer (mode, type))
6130 int size = s390_function_arg_size (mode, type);
6131 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
6133 if (cum->gprs + n_gprs > 5)
6136 return gen_rtx (REG, mode, cum->gprs + 2);
6139 /* After the real arguments, expand_call calls us once again
6140 with a void_type_node type. Whatever we return here is
6141 passed as operand 2 to the call expanders.
6143 We don't need this feature ... */
6144 else if (type == void_type_node)
6150 /* Return true if return values of type TYPE should be returned
6151 in a memory buffer whose address is passed by the caller as
6152 hidden first argument. */
6155 s390_return_in_memory (tree type, tree fundecl ATTRIBUTE_UNUSED)
6157 /* We accept small integral (and similar) types. */
6158 if (INTEGRAL_TYPE_P (type)
6159 || POINTER_TYPE_P (type)
6160 || TREE_CODE (type) == OFFSET_TYPE
6161 || TREE_CODE (type) == REAL_TYPE)
6162 return int_size_in_bytes (type) > 8;
6164 /* Aggregates and similar constructs are always returned
6166 if (AGGREGATE_TYPE_P (type)
6167 || TREE_CODE (type) == COMPLEX_TYPE
6168 || TREE_CODE (type) == VECTOR_TYPE)
6171 /* ??? We get called on all sorts of random stuff from
6172 aggregate_value_p. We can't abort, but it's not clear
6173 what's safe to return. Pretend it's a struct I guess. */
6177 /* Define where to return a (scalar) value of type TYPE.
6178 If TYPE is null, define where to return a (scalar)
6179 value of mode MODE from a libcall. */
6182 s390_function_value (tree type, enum machine_mode mode)
6186 int unsignedp = TREE_UNSIGNED (type);
6187 mode = promote_mode (type, TYPE_MODE (type), &unsignedp, 1);
6190 if (GET_MODE_CLASS (mode) != MODE_INT
6191 && GET_MODE_CLASS (mode) != MODE_FLOAT)
6193 if (GET_MODE_SIZE (mode) > 8)
6196 if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT)
6197 return gen_rtx_REG (mode, 16);
6199 return gen_rtx_REG (mode, 2);
6203 /* Create and return the va_list datatype.
6205 On S/390, va_list is an array type equivalent to
6207 typedef struct __va_list_tag
6211 void *__overflow_arg_area;
6212 void *__reg_save_area;
6215 where __gpr and __fpr hold the number of general purpose
6216 or floating point arguments used up to now, respectively,
6217 __overflow_arg_area points to the stack location of the
6218 next argument passed on the stack, and __reg_save_area
6219 always points to the start of the register area in the
6220 call frame of the current function. The function prologue
6221 saves all registers used for argument passing into this
6222 area if the function uses variable arguments. */
6225 s390_build_builtin_va_list (void)
6227 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
6229 record = lang_hooks.types.make_type (RECORD_TYPE);
6232 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
6234 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
6235 long_integer_type_node);
6236 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
6237 long_integer_type_node);
6238 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
6240 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
6243 DECL_FIELD_CONTEXT (f_gpr) = record;
6244 DECL_FIELD_CONTEXT (f_fpr) = record;
6245 DECL_FIELD_CONTEXT (f_ovf) = record;
6246 DECL_FIELD_CONTEXT (f_sav) = record;
6248 TREE_CHAIN (record) = type_decl;
6249 TYPE_NAME (record) = type_decl;
6250 TYPE_FIELDS (record) = f_gpr;
6251 TREE_CHAIN (f_gpr) = f_fpr;
6252 TREE_CHAIN (f_fpr) = f_ovf;
6253 TREE_CHAIN (f_ovf) = f_sav;
6255 layout_type (record);
6257 /* The correct type is an array type of one element. */
6258 return build_array_type (record, build_index_type (size_zero_node));
6261 /* Implement va_start by filling the va_list structure VALIST.
6262 STDARG_P is always true, and ignored.
6263 NEXTARG points to the first anonymous stack argument.
6265 The following global variables are used to initialize
6266 the va_list structure:
6268 current_function_args_info:
6269 holds number of gprs and fprs used for named arguments.
6270 current_function_arg_offset_rtx:
6271 holds the offset of the first anonymous stack argument
6272 (relative to the virtual arg pointer). */
6275 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
6277 HOST_WIDE_INT n_gpr, n_fpr;
6279 tree f_gpr, f_fpr, f_ovf, f_sav;
6280 tree gpr, fpr, ovf, sav, t;
6282 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6283 f_fpr = TREE_CHAIN (f_gpr);
6284 f_ovf = TREE_CHAIN (f_fpr);
6285 f_sav = TREE_CHAIN (f_ovf);
6287 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6288 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6289 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6290 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6291 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6293 /* Count number of gp and fp argument registers used. */
6295 n_gpr = current_function_args_info.gprs;
6296 n_fpr = current_function_args_info.fprs;
6298 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr, build_int_2 (n_gpr, 0));
6299 TREE_SIDE_EFFECTS (t) = 1;
6300 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6302 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr, build_int_2 (n_fpr, 0));
6303 TREE_SIDE_EFFECTS (t) = 1;
6304 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6306 /* Find the overflow area. */
6307 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
6309 off = INTVAL (current_function_arg_offset_rtx);
6310 off = off < 0 ? 0 : off;
6311 if (TARGET_DEBUG_ARG)
6312 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
6313 (int)n_gpr, (int)n_fpr, off);
6315 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_2 (off, 0));
6317 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6318 TREE_SIDE_EFFECTS (t) = 1;
6319 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6321 /* Find the register save area. */
6322 t = make_tree (TREE_TYPE (sav), virtual_incoming_args_rtx);
6323 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
6324 build_int_2 (-STACK_POINTER_OFFSET, -1));
6325 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
6326 TREE_SIDE_EFFECTS (t) = 1;
6327 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6330 /* Implement va_arg by updating the va_list structure
6331 VALIST as required to retrieve an argument of type
6332 TYPE, and returning that argument.
6334 Generates code equivalent to:
6336 if (integral value) {
6337 if (size <= 4 && args.gpr < 5 ||
6338 size > 4 && args.gpr < 4 )
6339 ret = args.reg_save_area[args.gpr+8]
6341 ret = *args.overflow_arg_area++;
6342 } else if (float value) {
6344 ret = args.reg_save_area[args.fpr+64]
6346 ret = *args.overflow_arg_area++;
6347 } else if (aggregate value) {
6349 ret = *args.reg_save_area[args.gpr]
6351 ret = **args.overflow_arg_area++;
6355 s390_va_arg (tree valist, tree type)
6357 tree f_gpr, f_fpr, f_ovf, f_sav;
6358 tree gpr, fpr, ovf, sav, reg, t, u;
6359 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
6360 rtx lab_false, lab_over, addr_rtx, r;
6362 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6363 f_fpr = TREE_CHAIN (f_gpr);
6364 f_ovf = TREE_CHAIN (f_fpr);
6365 f_sav = TREE_CHAIN (f_ovf);
6367 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6368 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6369 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6370 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6371 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6373 size = int_size_in_bytes (type);
6375 if (s390_function_arg_pass_by_reference (TYPE_MODE (type), type))
6377 if (TARGET_DEBUG_ARG)
6379 fprintf (stderr, "va_arg: aggregate type");
6383 /* Aggregates are passed by reference. */
6387 sav_ofs = 2 * UNITS_PER_WORD;
6388 sav_scale = UNITS_PER_WORD;
6389 size = UNITS_PER_WORD;
6392 else if (s390_function_arg_float (TYPE_MODE (type), type))
6394 if (TARGET_DEBUG_ARG)
6396 fprintf (stderr, "va_arg: float type");
6400 /* FP args go in FP registers, if present. */
6404 sav_ofs = 16 * UNITS_PER_WORD;
6406 /* TARGET_64BIT has up to 4 parameter in fprs */
6407 max_reg = TARGET_64BIT ? 3 : 1;
6411 if (TARGET_DEBUG_ARG)
6413 fprintf (stderr, "va_arg: other type");
6417 /* Otherwise into GP registers. */
6420 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
6421 sav_ofs = 2 * UNITS_PER_WORD;
6423 if (size < UNITS_PER_WORD)
6424 sav_ofs += UNITS_PER_WORD - size;
6426 sav_scale = UNITS_PER_WORD;
6433 /* Pull the value out of the saved registers ... */
6435 lab_false = gen_label_rtx ();
6436 lab_over = gen_label_rtx ();
6437 addr_rtx = gen_reg_rtx (Pmode);
6439 emit_cmp_and_jump_insns (expand_expr (reg, NULL_RTX, Pmode, EXPAND_NORMAL),
6441 GT, const1_rtx, Pmode, 0, lab_false);
6444 t = build (PLUS_EXPR, ptr_type_node, sav, build_int_2 (sav_ofs, 0));
6448 u = build (MULT_EXPR, long_integer_type_node,
6449 reg, build_int_2 (sav_scale, 0));
6450 TREE_SIDE_EFFECTS (u) = 1;
6452 t = build (PLUS_EXPR, ptr_type_node, t, u);
6453 TREE_SIDE_EFFECTS (t) = 1;
6455 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6457 emit_move_insn (addr_rtx, r);
6460 emit_jump_insn (gen_jump (lab_over));
6462 emit_label (lab_false);
6464 /* ... Otherwise out of the overflow area. */
6466 t = save_expr (ovf);
6469 /* In 64 BIT for each argument on stack, a full 64 bit slot is allocated. */
6470 if (size < UNITS_PER_WORD)
6472 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (UNITS_PER_WORD-size, 0));
6473 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6474 TREE_SIDE_EFFECTS (t) = 1;
6475 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6477 t = save_expr (ovf);
6480 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6482 emit_move_insn (addr_rtx, r);
6484 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (size, 0));
6485 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6486 TREE_SIDE_EFFECTS (t) = 1;
6487 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6489 emit_label (lab_over);
6491 /* If less than max_regs a registers are retrieved out
6492 of register save area, increment. */
6494 u = build (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
6495 build_int_2 (n_reg, 0));
6496 TREE_SIDE_EFFECTS (u) = 1;
6497 expand_expr (u, const0_rtx, VOIDmode, EXPAND_NORMAL);
6501 r = gen_rtx_MEM (Pmode, addr_rtx);
6502 set_mem_alias_set (r, get_varargs_alias_set ());
6503 emit_move_insn (addr_rtx, r);
6515 S390_BUILTIN_THREAD_POINTER,
6516 S390_BUILTIN_SET_THREAD_POINTER,
6521 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
6526 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
6532 s390_init_builtins (void)
6536 ftype = build_function_type (ptr_type_node, void_list_node);
6537 builtin_function ("__builtin_thread_pointer", ftype,
6538 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
6541 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
6542 builtin_function ("__builtin_set_thread_pointer", ftype,
6543 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
6547 /* Expand an expression EXP that calls a built-in function,
6548 with result going to TARGET if that's convenient
6549 (and in mode MODE if that's convenient).
6550 SUBTARGET may be used as the target for computing one of EXP's operands.
6551 IGNORE is nonzero if the value is to be ignored. */
6554 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
6555 enum machine_mode mode ATTRIBUTE_UNUSED,
6556 int ignore ATTRIBUTE_UNUSED)
6560 unsigned int const *code_for_builtin =
6561 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
6563 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6564 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
6565 tree arglist = TREE_OPERAND (exp, 1);
6566 enum insn_code icode;
6567 rtx op[MAX_ARGS], pat;
6571 if (fcode >= S390_BUILTIN_max)
6572 internal_error ("bad builtin fcode");
6573 icode = code_for_builtin[fcode];
6575 internal_error ("bad builtin fcode");
6577 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
6579 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
6581 arglist = TREE_CHAIN (arglist), arity++)
6583 const struct insn_operand_data *insn_op;
6585 tree arg = TREE_VALUE (arglist);
6586 if (arg == error_mark_node)
6588 if (arity > MAX_ARGS)
6591 insn_op = &insn_data[icode].operand[arity + nonvoid];
6593 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
6595 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
6596 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
6601 enum machine_mode tmode = insn_data[icode].operand[0].mode;
6603 || GET_MODE (target) != tmode
6604 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
6605 target = gen_reg_rtx (tmode);
6611 pat = GEN_FCN (icode) (target);
6615 pat = GEN_FCN (icode) (target, op[0]);
6617 pat = GEN_FCN (icode) (op[0]);
6620 pat = GEN_FCN (icode) (target, op[0], op[1]);
6636 /* Output assembly code for the trampoline template to
6639 On S/390, we use gpr 1 internally in the trampoline code;
6640 gpr 0 is used to hold the static chain. */
6643 s390_trampoline_template (FILE *file)
6647 fprintf (file, "larl\t%s,0f\n", reg_names[1]);
6648 fprintf (file, "lg\t%s,0(%s)\n", reg_names[0], reg_names[1]);
6649 fprintf (file, "lg\t%s,8(%s)\n", reg_names[1], reg_names[1]);
6650 fprintf (file, "br\t%s\n", reg_names[1]);
6651 fprintf (file, "0:\t.quad\t0\n");
6652 fprintf (file, ".quad\t0\n");
6656 fprintf (file, "basr\t%s,0\n", reg_names[1]);
6657 fprintf (file, "l\t%s,10(%s)\n", reg_names[0], reg_names[1]);
6658 fprintf (file, "l\t%s,14(%s)\n", reg_names[1], reg_names[1]);
6659 fprintf (file, "br\t%s\n", reg_names[1]);
6660 fprintf (file, ".long\t0\n");
6661 fprintf (file, ".long\t0\n");
6665 /* Emit RTL insns to initialize the variable parts of a trampoline.
6666 FNADDR is an RTX for the address of the function's pure code.
6667 CXT is an RTX for the static chain value for the function. */
6670 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
6672 emit_move_insn (gen_rtx
6674 memory_address (Pmode,
6675 plus_constant (addr, (TARGET_64BIT ? 20 : 12) ))), cxt);
6676 emit_move_insn (gen_rtx
6678 memory_address (Pmode,
6679 plus_constant (addr, (TARGET_64BIT ? 28 : 16) ))), fnaddr);
6682 /* Return rtx for 64-bit constant formed from the 32-bit subwords
6683 LOW and HIGH, independent of the host word size. */
6686 s390_gen_rtx_const_DI (int high, int low)
6688 #if HOST_BITS_PER_WIDE_INT >= 64
6690 val = (HOST_WIDE_INT)high;
6692 val |= (HOST_WIDE_INT)low;
6694 return GEN_INT (val);
6696 #if HOST_BITS_PER_WIDE_INT >= 32
6697 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
6704 /* Output assembler code to FILE to increment profiler label # LABELNO
6705 for profiling a function entry. */
6708 s390_function_profiler (FILE *file, int labelno)
6713 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
6715 fprintf (file, "# function profiler \n");
6717 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
6718 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
6719 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
6721 op[2] = gen_rtx_REG (Pmode, 1);
6722 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
6723 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
6725 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
6728 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
6729 op[4] = gen_rtx_CONST (Pmode, op[4]);
6734 output_asm_insn ("stg\t%0,%1", op);
6735 output_asm_insn ("larl\t%2,%3", op);
6736 output_asm_insn ("brasl\t%0,%4", op);
6737 output_asm_insn ("lg\t%0,%1", op);
6741 op[6] = gen_label_rtx ();
6743 output_asm_insn ("st\t%0,%1", op);
6744 output_asm_insn ("bras\t%2,%l6", op);
6745 output_asm_insn (".long\t%4", op);
6746 output_asm_insn (".long\t%3", op);
6747 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6748 output_asm_insn ("l\t%0,0(%2)", op);
6749 output_asm_insn ("l\t%2,4(%2)", op);
6750 output_asm_insn ("basr\t%0,%0", op);
6751 output_asm_insn ("l\t%0,%1", op);
6755 op[5] = gen_label_rtx ();
6756 op[6] = gen_label_rtx ();
6758 output_asm_insn ("st\t%0,%1", op);
6759 output_asm_insn ("bras\t%2,%l6", op);
6760 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
6761 output_asm_insn (".long\t%4-%l5", op);
6762 output_asm_insn (".long\t%3-%l5", op);
6763 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6764 output_asm_insn ("lr\t%0,%2", op);
6765 output_asm_insn ("a\t%0,0(%2)", op);
6766 output_asm_insn ("a\t%2,4(%2)", op);
6767 output_asm_insn ("basr\t%0,%0", op);
6768 output_asm_insn ("l\t%0,%1", op);
6772 /* Select section for constant in constant pool. In 32-bit mode,
6773 constants go in the function section; in 64-bit mode in .rodata. */
6776 s390_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED,
6777 rtx x ATTRIBUTE_UNUSED,
6778 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
6780 if (TARGET_CPU_ZARCH)
6781 readonly_data_section ();
6783 function_section (current_function_decl);
6786 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
6787 into its SYMBOL_REF_FLAGS. */
6790 s390_encode_section_info (tree decl, rtx rtl, int first)
6792 default_encode_section_info (decl, rtl, first);
6794 /* If a variable has a forced alignment to < 2 bytes, mark it with
6795 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
6796 if (TREE_CODE (decl) == VAR_DECL
6797 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
6798 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
6801 /* Output thunk to FILE that implements a C++ virtual function call (with
6802 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
6803 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
6804 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
6805 relative to the resulting this pointer. */
6808 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
6809 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
6815 /* Operand 0 is the target function. */
6816 op[0] = XEXP (DECL_RTL (function), 0);
6817 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
6820 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
6821 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
6822 op[0] = gen_rtx_CONST (Pmode, op[0]);
6825 /* Operand 1 is the 'this' pointer. */
6826 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
6827 op[1] = gen_rtx_REG (Pmode, 3);
6829 op[1] = gen_rtx_REG (Pmode, 2);
6831 /* Operand 2 is the delta. */
6832 op[2] = GEN_INT (delta);
6834 /* Operand 3 is the vcall_offset. */
6835 op[3] = GEN_INT (vcall_offset);
6837 /* Operand 4 is the temporary register. */
6838 op[4] = gen_rtx_REG (Pmode, 1);
6840 /* Operands 5 to 8 can be used as labels. */
6846 /* Operand 9 can be used for temporary register. */
6849 /* Generate code. */
6852 /* Setup literal pool pointer if required. */
6853 if ((!DISP_IN_RANGE (delta)
6854 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6855 || (!DISP_IN_RANGE (vcall_offset)
6856 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
6858 op[5] = gen_label_rtx ();
6859 output_asm_insn ("larl\t%4,%5", op);
6862 /* Add DELTA to this pointer. */
6865 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
6866 output_asm_insn ("la\t%1,%2(%1)", op);
6867 else if (DISP_IN_RANGE (delta))
6868 output_asm_insn ("lay\t%1,%2(%1)", op);
6869 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6870 output_asm_insn ("aghi\t%1,%2", op);
6873 op[6] = gen_label_rtx ();
6874 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
6878 /* Perform vcall adjustment. */
6881 if (DISP_IN_RANGE (vcall_offset))
6883 output_asm_insn ("lg\t%4,0(%1)", op);
6884 output_asm_insn ("ag\t%1,%3(%4)", op);
6886 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
6888 output_asm_insn ("lghi\t%4,%3", op);
6889 output_asm_insn ("ag\t%4,0(%1)", op);
6890 output_asm_insn ("ag\t%1,0(%4)", op);
6894 op[7] = gen_label_rtx ();
6895 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
6896 output_asm_insn ("ag\t%4,0(%1)", op);
6897 output_asm_insn ("ag\t%1,0(%4)", op);
6901 /* Jump to target. */
6902 output_asm_insn ("jg\t%0", op);
6904 /* Output literal pool if required. */
6907 output_asm_insn (".align\t4", op);
6908 targetm.asm_out.internal_label (file, "L",
6909 CODE_LABEL_NUMBER (op[5]));
6913 targetm.asm_out.internal_label (file, "L",
6914 CODE_LABEL_NUMBER (op[6]));
6915 output_asm_insn (".long\t%2", op);
6919 targetm.asm_out.internal_label (file, "L",
6920 CODE_LABEL_NUMBER (op[7]));
6921 output_asm_insn (".long\t%3", op);
6926 /* Setup base pointer if required. */
6928 || (!DISP_IN_RANGE (delta)
6929 && !CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6930 || (!DISP_IN_RANGE (delta)
6931 && !CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K")))
6933 op[5] = gen_label_rtx ();
6934 output_asm_insn ("basr\t%4,0", op);
6935 targetm.asm_out.internal_label (file, "L",
6936 CODE_LABEL_NUMBER (op[5]));
6939 /* Add DELTA to this pointer. */
6942 if (CONST_OK_FOR_CONSTRAINT_P (delta, 'J', "J"))
6943 output_asm_insn ("la\t%1,%2(%1)", op);
6944 else if (DISP_IN_RANGE (delta))
6945 output_asm_insn ("lay\t%1,%2(%1)", op);
6946 else if (CONST_OK_FOR_CONSTRAINT_P (delta, 'K', "K"))
6947 output_asm_insn ("ahi\t%1,%2", op);
6950 op[6] = gen_label_rtx ();
6951 output_asm_insn ("a\t%1,%6-%5(%4)", op);
6955 /* Perform vcall adjustment. */
6958 if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'J', "J"))
6960 output_asm_insn ("lg\t%4,0(%1)", op);
6961 output_asm_insn ("a\t%1,%3(%4)", op);
6963 else if (DISP_IN_RANGE (vcall_offset))
6965 output_asm_insn ("lg\t%4,0(%1)", op);
6966 output_asm_insn ("ay\t%1,%3(%4)", op);
6968 else if (CONST_OK_FOR_CONSTRAINT_P (vcall_offset, 'K', "K"))
6970 output_asm_insn ("lhi\t%4,%3", op);
6971 output_asm_insn ("a\t%4,0(%1)", op);
6972 output_asm_insn ("a\t%1,0(%4)", op);
6976 op[7] = gen_label_rtx ();
6977 output_asm_insn ("l\t%4,%7-%5(%4)", op);
6978 output_asm_insn ("a\t%4,0(%1)", op);
6979 output_asm_insn ("a\t%1,0(%4)", op);
6982 /* We had to clobber the base pointer register.
6983 Re-setup the base pointer (with a different base). */
6984 op[5] = gen_label_rtx ();
6985 output_asm_insn ("basr\t%4,0", op);
6986 targetm.asm_out.internal_label (file, "L",
6987 CODE_LABEL_NUMBER (op[5]));
6990 /* Jump to target. */
6991 op[8] = gen_label_rtx ();
6994 output_asm_insn ("l\t%4,%8-%5(%4)", op);
6996 output_asm_insn ("a\t%4,%8-%5(%4)", op);
6997 /* We cannot call through .plt, since .plt requires %r12 loaded. */
6998 else if (flag_pic == 1)
7000 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7001 output_asm_insn ("l\t%4,%0(%4)", op);
7003 else if (flag_pic == 2)
7005 op[9] = gen_rtx_REG (Pmode, 0);
7006 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
7007 output_asm_insn ("a\t%4,%8-%5(%4)", op);
7008 output_asm_insn ("ar\t%4,%9", op);
7009 output_asm_insn ("l\t%4,0(%4)", op);
7012 output_asm_insn ("br\t%4", op);
7014 /* Output literal pool. */
7015 output_asm_insn (".align\t4", op);
7017 if (nonlocal && flag_pic == 2)
7018 output_asm_insn (".long\t%0", op);
7021 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
7022 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
7025 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
7027 output_asm_insn (".long\t%0", op);
7029 output_asm_insn (".long\t%0-%5", op);
7033 targetm.asm_out.internal_label (file, "L",
7034 CODE_LABEL_NUMBER (op[6]));
7035 output_asm_insn (".long\t%2", op);
7039 targetm.asm_out.internal_label (file, "L",
7040 CODE_LABEL_NUMBER (op[7]));
7041 output_asm_insn (".long\t%3", op);
7047 s390_valid_pointer_mode (enum machine_mode mode)
7049 return (mode == SImode || (TARGET_64BIT && mode == DImode));
7052 /* How to allocate a 'struct machine_function'. */
7054 static struct machine_function *
7055 s390_init_machine_status (void)
7057 return ggc_alloc_cleared (sizeof (struct machine_function));
7060 #include "gt-s390.h"