1 /* Subroutines used for code generation on IBM S/390 and zSeries
2 Copyright (C) 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
4 Ulrich Weigand (uweigand@de.ibm.com).
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
25 #include "coretypes.h"
31 #include "hard-reg-set.h"
33 #include "insn-config.h"
34 #include "conditions.h"
36 #include "insn-attr.h"
44 #include "basic-block.h"
45 #include "integrate.h"
48 #include "target-def.h"
50 #include "langhooks.h"
53 /* Machine-specific symbol_ref flags. */
54 #define SYMBOL_FLAG_ALIGN1 (SYMBOL_FLAG_MACH_DEP << 0)
57 static bool s390_assemble_integer (rtx, unsigned int, int);
58 static void s390_select_rtx_section (enum machine_mode, rtx,
59 unsigned HOST_WIDE_INT);
60 static void s390_encode_section_info (tree, rtx, int);
61 static bool s390_cannot_force_const_mem (rtx);
62 static rtx s390_delegitimize_address (rtx);
63 static void s390_init_builtins (void);
64 static rtx s390_expand_builtin (tree, rtx, rtx, enum machine_mode, int);
65 static void s390_output_mi_thunk (FILE *, tree, HOST_WIDE_INT,
67 static enum attr_type s390_safe_attr_type (rtx);
69 static int s390_adjust_cost (rtx, rtx, rtx, int);
70 static int s390_adjust_priority (rtx, int);
71 static int s390_issue_rate (void);
72 static int s390_use_dfa_pipeline_interface (void);
73 static int s390_first_cycle_multipass_dfa_lookahead (void);
74 static int s390_sched_reorder2 (FILE *, int, rtx *, int *, int);
75 static bool s390_rtx_costs (rtx, int, int, int *);
76 static int s390_address_cost (rtx);
77 static void s390_reorg (void);
78 static bool s390_valid_pointer_mode (enum machine_mode);
80 #undef TARGET_ASM_ALIGNED_HI_OP
81 #define TARGET_ASM_ALIGNED_HI_OP "\t.word\t"
82 #undef TARGET_ASM_ALIGNED_DI_OP
83 #define TARGET_ASM_ALIGNED_DI_OP "\t.quad\t"
84 #undef TARGET_ASM_INTEGER
85 #define TARGET_ASM_INTEGER s390_assemble_integer
87 #undef TARGET_ASM_OPEN_PAREN
88 #define TARGET_ASM_OPEN_PAREN ""
90 #undef TARGET_ASM_CLOSE_PAREN
91 #define TARGET_ASM_CLOSE_PAREN ""
93 #undef TARGET_ASM_SELECT_RTX_SECTION
94 #define TARGET_ASM_SELECT_RTX_SECTION s390_select_rtx_section
96 #undef TARGET_ENCODE_SECTION_INFO
97 #define TARGET_ENCODE_SECTION_INFO s390_encode_section_info
100 #undef TARGET_HAVE_TLS
101 #define TARGET_HAVE_TLS true
103 #undef TARGET_CANNOT_FORCE_CONST_MEM
104 #define TARGET_CANNOT_FORCE_CONST_MEM s390_cannot_force_const_mem
106 #undef TARGET_DELEGITIMIZE_ADDRESS
107 #define TARGET_DELEGITIMIZE_ADDRESS s390_delegitimize_address
109 #undef TARGET_INIT_BUILTINS
110 #define TARGET_INIT_BUILTINS s390_init_builtins
111 #undef TARGET_EXPAND_BUILTIN
112 #define TARGET_EXPAND_BUILTIN s390_expand_builtin
114 #undef TARGET_ASM_OUTPUT_MI_THUNK
115 #define TARGET_ASM_OUTPUT_MI_THUNK s390_output_mi_thunk
116 #undef TARGET_ASM_CAN_OUTPUT_MI_THUNK
117 #define TARGET_ASM_CAN_OUTPUT_MI_THUNK hook_bool_tree_hwi_hwi_tree_true
119 #undef TARGET_SCHED_ADJUST_COST
120 #define TARGET_SCHED_ADJUST_COST s390_adjust_cost
121 #undef TARGET_SCHED_ADJUST_PRIORITY
122 #define TARGET_SCHED_ADJUST_PRIORITY s390_adjust_priority
123 #undef TARGET_SCHED_ISSUE_RATE
124 #define TARGET_SCHED_ISSUE_RATE s390_issue_rate
125 #undef TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE
126 #define TARGET_SCHED_USE_DFA_PIPELINE_INTERFACE s390_use_dfa_pipeline_interface
127 #undef TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
128 #define TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD s390_first_cycle_multipass_dfa_lookahead
129 #undef TARGET_SCHED_REORDER2
130 #define TARGET_SCHED_REORDER2 s390_sched_reorder2
132 #undef TARGET_RTX_COSTS
133 #define TARGET_RTX_COSTS s390_rtx_costs
134 #undef TARGET_ADDRESS_COST
135 #define TARGET_ADDRESS_COST s390_address_cost
137 #undef TARGET_MACHINE_DEPENDENT_REORG
138 #define TARGET_MACHINE_DEPENDENT_REORG s390_reorg
140 #undef TARGET_VALID_POINTER_MODE
141 #define TARGET_VALID_POINTER_MODE s390_valid_pointer_mode
143 struct gcc_target targetm = TARGET_INITIALIZER;
145 extern int reload_completed;
147 /* The alias set for prologue/epilogue register save/restore. */
148 static int s390_sr_alias_set = 0;
150 /* Save information from a "cmpxx" operation until the branch or scc is
152 rtx s390_compare_op0, s390_compare_op1;
154 /* Structure used to hold the components of a S/390 memory
155 address. A legitimate address on S/390 is of the general
157 base + index + displacement
158 where any of the components is optional.
160 base and index are registers of the class ADDR_REGS,
161 displacement is an unsigned 12-bit immediate constant. */
171 /* Which cpu are we tuning for. */
172 enum processor_type s390_tune;
173 enum processor_flags s390_tune_flags;
174 /* Which instruction set architecture to use. */
175 enum processor_type s390_arch;
176 enum processor_flags s390_arch_flags;
178 /* Strings to hold which cpu and instruction set architecture to use. */
179 const char *s390_tune_string; /* for -mtune=<xxx> */
180 const char *s390_arch_string; /* for -march=<xxx> */
182 /* Define the structure for the machine field in struct function. */
184 struct machine_function GTY(())
186 /* Set, if some of the fprs 8-15 need to be saved (64 bit abi). */
189 /* Set if return address needs to be saved because the current
190 function uses __builtin_return_addr (0). */
191 bool save_return_addr_p;
193 /* Number of first and last gpr to be saved, restored. */
195 int first_restore_gpr;
198 /* Size of stack frame. */
199 HOST_WIDE_INT frame_size;
201 /* Some local-dynamic TLS symbol name. */
202 const char *some_ld_name;
205 static int s390_match_ccmode_set (rtx, enum machine_mode);
206 static int s390_branch_condition_mask (rtx);
207 static const char *s390_branch_condition_mnemonic (rtx, int);
208 static int check_mode (rtx, enum machine_mode *);
209 static int general_s_operand (rtx, enum machine_mode, int);
210 static int s390_short_displacement (rtx);
211 static int s390_decompose_address (rtx, struct s390_address *);
212 static rtx get_thread_pointer (void);
213 static rtx legitimize_tls_address (rtx, rtx);
214 static const char *get_some_local_dynamic_name (void);
215 static int get_some_local_dynamic_name_1 (rtx *, void *);
216 static int reg_used_in_mem_p (int, rtx);
217 static int addr_generation_dependency_p (rtx, rtx);
218 static int s390_split_branches (rtx, bool *);
219 static void find_constant_pool_ref (rtx, rtx *);
220 static void replace_constant_pool_ref (rtx *, rtx, rtx);
221 static rtx find_ltrel_base (rtx);
222 static void replace_ltrel_base (rtx *, rtx);
223 static void s390_optimize_prolog (bool, bool);
224 static int find_unused_clobbered_reg (void);
225 static void s390_frame_info (void);
226 static rtx save_fpr (rtx, int, int);
227 static rtx restore_fpr (rtx, int, int);
228 static rtx save_gprs (rtx, int, int, int);
229 static rtx restore_gprs (rtx, int, int, int);
230 static int s390_function_arg_size (enum machine_mode, tree);
231 static bool s390_function_arg_float (enum machine_mode, tree);
232 static struct machine_function * s390_init_machine_status (void);
234 /* Check whether integer displacement is in range. */
235 #define DISP_IN_RANGE(d) \
236 (TARGET_LONG_DISPLACEMENT? ((d) >= -524288 && (d) <= 524287) \
237 : ((d) >= 0 && (d) <= 4095))
239 /* Return true if SET either doesn't set the CC register, or else
240 the source and destination have matching CC modes and that
241 CC mode is at least as constrained as REQ_MODE. */
244 s390_match_ccmode_set (rtx set, enum machine_mode req_mode)
246 enum machine_mode set_mode;
248 if (GET_CODE (set) != SET)
251 if (GET_CODE (SET_DEST (set)) != REG || !CC_REGNO_P (REGNO (SET_DEST (set))))
254 set_mode = GET_MODE (SET_DEST (set));
267 if (req_mode != set_mode)
272 if (req_mode != CCSmode && req_mode != CCUmode && req_mode != CCTmode
273 && req_mode != CCSRmode && req_mode != CCURmode)
279 if (req_mode != CCAmode)
287 return (GET_MODE (SET_SRC (set)) == set_mode);
290 /* Return true if every SET in INSN that sets the CC register
291 has source and destination with matching CC modes and that
292 CC mode is at least as constrained as REQ_MODE.
293 If REQ_MODE is VOIDmode, always return false. */
296 s390_match_ccmode (rtx insn, enum machine_mode req_mode)
300 /* s390_tm_ccmode returns VOIDmode to indicate failure. */
301 if (req_mode == VOIDmode)
304 if (GET_CODE (PATTERN (insn)) == SET)
305 return s390_match_ccmode_set (PATTERN (insn), req_mode);
307 if (GET_CODE (PATTERN (insn)) == PARALLEL)
308 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
310 rtx set = XVECEXP (PATTERN (insn), 0, i);
311 if (GET_CODE (set) == SET)
312 if (!s390_match_ccmode_set (set, req_mode))
319 /* If a test-under-mask instruction can be used to implement
320 (compare (and ... OP1) OP2), return the CC mode required
321 to do that. Otherwise, return VOIDmode.
322 MIXED is true if the instruction can distinguish between
323 CC1 and CC2 for mixed selected bits (TMxx), it is false
324 if the instruction cannot (TM). */
327 s390_tm_ccmode (rtx op1, rtx op2, int mixed)
331 /* ??? Fixme: should work on CONST_DOUBLE as well. */
332 if (GET_CODE (op1) != CONST_INT || GET_CODE (op2) != CONST_INT)
335 /* Selected bits all zero: CC0. */
336 if (INTVAL (op2) == 0)
339 /* Selected bits all one: CC3. */
340 if (INTVAL (op2) == INTVAL (op1))
343 /* Exactly two bits selected, mixed zeroes and ones: CC1 or CC2. */
346 bit1 = exact_log2 (INTVAL (op2));
347 bit0 = exact_log2 (INTVAL (op1) ^ INTVAL (op2));
348 if (bit0 != -1 && bit1 != -1)
349 return bit0 > bit1 ? CCT1mode : CCT2mode;
355 /* Given a comparison code OP (EQ, NE, etc.) and the operands
356 OP0 and OP1 of a COMPARE, return the mode to be used for the
360 s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1)
366 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
367 && CONST_OK_FOR_LETTER_P (INTVAL (XEXP (op0, 1)), 'K'))
369 if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
370 || GET_CODE (op1) == NEG)
371 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
374 if (GET_CODE (op0) == AND)
376 /* Check whether we can potentially do it via TM. */
377 enum machine_mode ccmode;
378 ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1);
379 if (ccmode != VOIDmode)
381 /* Relax CCTmode to CCZmode to allow fall-back to AND
382 if that turns out to be beneficial. */
383 return ccmode == CCTmode ? CCZmode : ccmode;
387 if (register_operand (op0, HImode)
388 && GET_CODE (op1) == CONST_INT
389 && (INTVAL (op1) == -1 || INTVAL (op1) == 65535))
391 if (register_operand (op0, QImode)
392 && GET_CODE (op1) == CONST_INT
393 && (INTVAL (op1) == -1 || INTVAL (op1) == 255))
402 if (GET_CODE (op0) == PLUS && GET_CODE (XEXP (op0, 1)) == CONST_INT
403 && CONST_OK_FOR_LETTER_P (INTVAL (XEXP (op0, 1)), 'K'))
405 if (INTVAL (XEXP((op0), 1)) < 0)
418 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
419 && GET_CODE (op1) != CONST_INT)
425 if (GET_CODE (op0) == PLUS
426 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
429 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
430 && GET_CODE (op1) != CONST_INT)
436 if (GET_CODE (op0) == MINUS
437 && GET_MODE_CLASS (GET_MODE (op0)) == MODE_INT)
440 if ((GET_CODE (op0) == SIGN_EXTEND || GET_CODE (op0) == ZERO_EXTEND)
441 && GET_CODE (op1) != CONST_INT)
450 /* Return nonzero if OP is a valid comparison operator
451 for an ALC condition in mode MODE. */
454 s390_alc_comparison (rtx op, enum machine_mode mode)
456 if (mode != VOIDmode && mode != GET_MODE (op))
459 if (GET_RTX_CLASS (GET_CODE (op)) != '<')
462 if (GET_CODE (XEXP (op, 0)) != REG
463 || REGNO (XEXP (op, 0)) != CC_REGNUM
464 || XEXP (op, 1) != const0_rtx)
467 switch (GET_MODE (XEXP (op, 0)))
470 return GET_CODE (op) == LTU;
473 return GET_CODE (op) == LEU;
476 return GET_CODE (op) == GTU;
479 return GET_CODE (op) == LTU;
482 return GET_CODE (op) == UNGT;
485 return GET_CODE (op) == UNLT;
492 /* Return nonzero if OP is a valid comparison operator
493 for an SLB condition in mode MODE. */
496 s390_slb_comparison (rtx op, enum machine_mode mode)
498 if (mode != VOIDmode && mode != GET_MODE (op))
501 if (GET_RTX_CLASS (GET_CODE (op)) != '<')
504 if (GET_CODE (XEXP (op, 0)) != REG
505 || REGNO (XEXP (op, 0)) != CC_REGNUM
506 || XEXP (op, 1) != const0_rtx)
509 switch (GET_MODE (XEXP (op, 0)))
512 return GET_CODE (op) == GEU;
515 return GET_CODE (op) == GTU;
518 return GET_CODE (op) == LEU;
521 return GET_CODE (op) == GEU;
524 return GET_CODE (op) == LE;
527 return GET_CODE (op) == GE;
534 /* Return branch condition mask to implement a branch
535 specified by CODE. */
538 s390_branch_condition_mask (rtx code)
540 const int CC0 = 1 << 3;
541 const int CC1 = 1 << 2;
542 const int CC2 = 1 << 1;
543 const int CC3 = 1 << 0;
545 if (GET_CODE (XEXP (code, 0)) != REG
546 || REGNO (XEXP (code, 0)) != CC_REGNUM
547 || XEXP (code, 1) != const0_rtx)
550 switch (GET_MODE (XEXP (code, 0)))
553 switch (GET_CODE (code))
556 case NE: return CC1 | CC2 | CC3;
563 switch (GET_CODE (code))
566 case NE: return CC0 | CC2 | CC3;
573 switch (GET_CODE (code))
576 case NE: return CC0 | CC1 | CC3;
583 switch (GET_CODE (code))
586 case NE: return CC0 | CC1 | CC2;
593 switch (GET_CODE (code))
595 case EQ: return CC0 | CC2;
596 case NE: return CC1 | CC3;
603 switch (GET_CODE (code))
605 case LTU: return CC2 | CC3; /* carry */
606 case GEU: return CC0 | CC1; /* no carry */
613 switch (GET_CODE (code))
615 case GTU: return CC0 | CC1; /* borrow */
616 case LEU: return CC2 | CC3; /* no borrow */
623 switch (GET_CODE (code))
626 case NE: return CC1 | CC2 | CC3;
627 case LTU: return CC1;
628 case GTU: return CC2;
629 case LEU: return CC0 | CC1;
630 case GEU: return CC0 | CC2;
637 switch (GET_CODE (code))
640 case NE: return CC2 | CC1 | CC3;
641 case LTU: return CC2;
642 case GTU: return CC1;
643 case LEU: return CC0 | CC2;
644 case GEU: return CC0 | CC1;
651 switch (GET_CODE (code))
654 case NE: return CC1 | CC2 | CC3;
655 case LT: return CC1 | CC3;
657 case LE: return CC0 | CC1 | CC3;
658 case GE: return CC0 | CC2;
665 switch (GET_CODE (code))
668 case NE: return CC1 | CC2 | CC3;
670 case GT: return CC2 | CC3;
671 case LE: return CC0 | CC1;
672 case GE: return CC0 | CC2 | CC3;
679 switch (GET_CODE (code))
682 case NE: return CC1 | CC2 | CC3;
685 case LE: return CC0 | CC1;
686 case GE: return CC0 | CC2;
687 case UNORDERED: return CC3;
688 case ORDERED: return CC0 | CC1 | CC2;
689 case UNEQ: return CC0 | CC3;
690 case UNLT: return CC1 | CC3;
691 case UNGT: return CC2 | CC3;
692 case UNLE: return CC0 | CC1 | CC3;
693 case UNGE: return CC0 | CC2 | CC3;
694 case LTGT: return CC1 | CC2;
701 switch (GET_CODE (code))
704 case NE: return CC2 | CC1 | CC3;
707 case LE: return CC0 | CC2;
708 case GE: return CC0 | CC1;
709 case UNORDERED: return CC3;
710 case ORDERED: return CC0 | CC2 | CC1;
711 case UNEQ: return CC0 | CC3;
712 case UNLT: return CC2 | CC3;
713 case UNGT: return CC1 | CC3;
714 case UNLE: return CC0 | CC2 | CC3;
715 case UNGE: return CC0 | CC1 | CC3;
716 case LTGT: return CC2 | CC1;
727 /* If INV is false, return assembler mnemonic string to implement
728 a branch specified by CODE. If INV is true, return mnemonic
729 for the corresponding inverted branch. */
732 s390_branch_condition_mnemonic (rtx code, int inv)
734 static const char *const mnemonic[16] =
736 NULL, "o", "h", "nle",
737 "l", "nhe", "lh", "ne",
738 "e", "nlh", "he", "nl",
739 "le", "nh", "no", NULL
742 int mask = s390_branch_condition_mask (code);
747 if (mask < 1 || mask > 14)
750 return mnemonic[mask];
753 /* If OP is an integer constant of mode MODE with exactly one
754 HImode subpart unequal to DEF, return the number of that
755 subpart. As a special case, all HImode subparts of OP are
756 equal to DEF, return zero. Otherwise, return -1. */
759 s390_single_hi (rtx op, enum machine_mode mode, int def)
761 if (GET_CODE (op) == CONST_INT)
763 unsigned HOST_WIDE_INT value = 0;
764 int n_parts = GET_MODE_SIZE (mode) / 2;
767 for (i = 0; i < n_parts; i++)
770 value = (unsigned HOST_WIDE_INT) INTVAL (op);
774 if ((value & 0xffff) != (unsigned)(def & 0xffff))
783 return part == -1 ? 0 : (n_parts - 1 - part);
786 else if (GET_CODE (op) == CONST_DOUBLE
787 && GET_MODE (op) == VOIDmode)
789 unsigned HOST_WIDE_INT value = 0;
790 int n_parts = GET_MODE_SIZE (mode) / 2;
793 for (i = 0; i < n_parts; i++)
796 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
797 else if (i == HOST_BITS_PER_WIDE_INT / 16)
798 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (op);
802 if ((value & 0xffff) != (unsigned)(def & 0xffff))
811 return part == -1 ? 0 : (n_parts - 1 - part);
817 /* Extract the HImode part number PART from integer
818 constant OP of mode MODE. */
821 s390_extract_hi (rtx op, enum machine_mode mode, int part)
823 int n_parts = GET_MODE_SIZE (mode) / 2;
824 if (part < 0 || part >= n_parts)
827 part = n_parts - 1 - part;
829 if (GET_CODE (op) == CONST_INT)
831 unsigned HOST_WIDE_INT value = (unsigned HOST_WIDE_INT) INTVAL (op);
832 return ((value >> (16 * part)) & 0xffff);
834 else if (GET_CODE (op) == CONST_DOUBLE
835 && GET_MODE (op) == VOIDmode)
837 unsigned HOST_WIDE_INT value;
838 if (part < HOST_BITS_PER_WIDE_INT / 16)
839 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
841 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (op),
842 part -= HOST_BITS_PER_WIDE_INT / 16;
844 return ((value >> (16 * part)) & 0xffff);
850 /* If OP is an integer constant of mode MODE with exactly one
851 QImode subpart unequal to DEF, return the number of that
852 subpart. As a special case, all QImode subparts of OP are
853 equal to DEF, return zero. Otherwise, return -1. */
856 s390_single_qi (rtx op, enum machine_mode mode, int def)
858 if (GET_CODE (op) == CONST_INT)
860 unsigned HOST_WIDE_INT value = 0;
861 int n_parts = GET_MODE_SIZE (mode);
864 for (i = 0; i < n_parts; i++)
867 value = (unsigned HOST_WIDE_INT) INTVAL (op);
871 if ((value & 0xff) != (unsigned)(def & 0xff))
880 return part == -1 ? 0 : (n_parts - 1 - part);
883 else if (GET_CODE (op) == CONST_DOUBLE
884 && GET_MODE (op) == VOIDmode)
886 unsigned HOST_WIDE_INT value = 0;
887 int n_parts = GET_MODE_SIZE (mode);
890 for (i = 0; i < n_parts; i++)
893 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
894 else if (i == HOST_BITS_PER_WIDE_INT / 8)
895 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (op);
899 if ((value & 0xff) != (unsigned)(def & 0xff))
908 return part == -1 ? 0 : (n_parts - 1 - part);
914 /* Extract the QImode part number PART from integer
915 constant OP of mode MODE. */
918 s390_extract_qi (rtx op, enum machine_mode mode, int part)
920 int n_parts = GET_MODE_SIZE (mode);
921 if (part < 0 || part >= n_parts)
924 part = n_parts - 1 - part;
926 if (GET_CODE (op) == CONST_INT)
928 unsigned HOST_WIDE_INT value = (unsigned HOST_WIDE_INT) INTVAL (op);
929 return ((value >> (8 * part)) & 0xff);
931 else if (GET_CODE (op) == CONST_DOUBLE
932 && GET_MODE (op) == VOIDmode)
934 unsigned HOST_WIDE_INT value;
935 if (part < HOST_BITS_PER_WIDE_INT / 8)
936 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
938 value = (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (op),
939 part -= HOST_BITS_PER_WIDE_INT / 8;
941 return ((value >> (8 * part)) & 0xff);
947 /* Check whether we can (and want to) split a double-word
948 move in mode MODE from SRC to DST into two single-word
949 moves, moving the subword FIRST_SUBWORD first. */
952 s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword)
954 /* Floating point registers cannot be split. */
955 if (FP_REG_P (src) || FP_REG_P (dst))
958 /* We don't need to split if operands are directly accessible. */
959 if (s_operand (src, mode) || s_operand (dst, mode))
962 /* Non-offsettable memory references cannot be split. */
963 if ((GET_CODE (src) == MEM && !offsettable_memref_p (src))
964 || (GET_CODE (dst) == MEM && !offsettable_memref_p (dst)))
967 /* Moving the first subword must not clobber a register
968 needed to move the second subword. */
969 if (register_operand (dst, mode))
971 rtx subreg = operand_subword (dst, first_subword, 0, mode);
972 if (reg_overlap_mentioned_p (subreg, src))
980 /* Change optimizations to be performed, depending on the
983 LEVEL is the optimization level specified; 2 if `-O2' is
984 specified, 1 if `-O' is specified, and 0 if neither is specified.
986 SIZE is nonzero if `-Os' is specified and zero otherwise. */
989 optimization_options (int level ATTRIBUTE_UNUSED, int size ATTRIBUTE_UNUSED)
991 /* ??? There are apparently still problems with -fcaller-saves. */
992 flag_caller_saves = 0;
994 /* By default, always emit DWARF-2 unwind info. This allows debugging
995 without maintaining a stack frame back-chain. */
996 flag_asynchronous_unwind_tables = 1;
1000 override_options (void)
1005 const char *const name; /* processor name or nickname. */
1006 const enum processor_type processor;
1007 const enum processor_flags flags;
1009 const processor_alias_table[] =
1011 {"g5", PROCESSOR_9672_G5, PF_IEEE_FLOAT},
1012 {"g6", PROCESSOR_9672_G6, PF_IEEE_FLOAT},
1013 {"z900", PROCESSOR_2064_Z900, PF_IEEE_FLOAT | PF_ZARCH},
1014 {"z990", PROCESSOR_2084_Z990, PF_IEEE_FLOAT | PF_ZARCH
1015 | PF_LONG_DISPLACEMENT},
1018 int const pta_size = ARRAY_SIZE (processor_alias_table);
1020 /* Acquire a unique set number for our register saves and restores. */
1021 s390_sr_alias_set = new_alias_set ();
1023 /* Set up function hooks. */
1024 init_machine_status = s390_init_machine_status;
1026 /* Architecture mode defaults according to ABI. */
1027 if (!(target_flags_explicit & MASK_ZARCH))
1030 target_flags |= MASK_ZARCH;
1032 target_flags &= ~MASK_ZARCH;
1035 /* Determine processor architectural level. */
1036 if (!s390_arch_string)
1037 s390_arch_string = TARGET_ZARCH? "z900" : "g5";
1039 for (i = 0; i < pta_size; i++)
1040 if (! strcmp (s390_arch_string, processor_alias_table[i].name))
1042 s390_arch = processor_alias_table[i].processor;
1043 s390_arch_flags = processor_alias_table[i].flags;
1047 error ("Unknown cpu used in -march=%s.", s390_arch_string);
1049 /* Determine processor to tune for. */
1050 if (!s390_tune_string)
1052 s390_tune = s390_arch;
1053 s390_tune_flags = s390_arch_flags;
1054 s390_tune_string = s390_arch_string;
1058 for (i = 0; i < pta_size; i++)
1059 if (! strcmp (s390_tune_string, processor_alias_table[i].name))
1061 s390_tune = processor_alias_table[i].processor;
1062 s390_tune_flags = processor_alias_table[i].flags;
1066 error ("Unknown cpu used in -mtune=%s.", s390_tune_string);
1069 /* Sanity checks. */
1070 if (TARGET_ZARCH && !(s390_arch_flags & PF_ZARCH))
1071 error ("z/Architecture mode not supported on %s.", s390_arch_string);
1072 if (TARGET_64BIT && !TARGET_ZARCH)
1073 error ("64-bit ABI not supported in ESA/390 mode.");
1076 /* Map for smallest class containing reg regno. */
1078 const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] =
1079 { GENERAL_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1080 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1081 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1082 ADDR_REGS, ADDR_REGS, ADDR_REGS, ADDR_REGS,
1083 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1084 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1085 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1086 FP_REGS, FP_REGS, FP_REGS, FP_REGS,
1087 ADDR_REGS, NO_REGS, ADDR_REGS
1090 /* Return attribute type of insn. */
1092 static enum attr_type
1093 s390_safe_attr_type (rtx insn)
1095 if (recog_memoized (insn) >= 0)
1096 return get_attr_type (insn);
1101 /* Return true if OP a (const_int 0) operand.
1102 OP is the current operation.
1103 MODE is the current operation mode. */
1106 const0_operand (register rtx op, enum machine_mode mode)
1108 return op == CONST0_RTX (mode);
1111 /* Return true if OP is constant.
1112 OP is the current operation.
1113 MODE is the current operation mode. */
1116 consttable_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1118 return CONSTANT_P (op);
1121 /* Return true if the mode of operand OP matches MODE.
1122 If MODE is set to VOIDmode, set it to the mode of OP. */
1125 check_mode (register rtx op, enum machine_mode *mode)
1127 if (*mode == VOIDmode)
1128 *mode = GET_MODE (op);
1131 if (GET_MODE (op) != VOIDmode && GET_MODE (op) != *mode)
1137 /* Return true if OP a valid operand for the LARL instruction.
1138 OP is the current operation.
1139 MODE is the current operation mode. */
1142 larl_operand (register rtx op, enum machine_mode mode)
1144 if (! check_mode (op, &mode))
1147 /* Allow labels and local symbols. */
1148 if (GET_CODE (op) == LABEL_REF)
1150 if (GET_CODE (op) == SYMBOL_REF)
1151 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1152 && SYMBOL_REF_TLS_MODEL (op) == 0
1153 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1155 /* Everything else must have a CONST, so strip it. */
1156 if (GET_CODE (op) != CONST)
1160 /* Allow adding *even* in-range constants. */
1161 if (GET_CODE (op) == PLUS)
1163 if (GET_CODE (XEXP (op, 1)) != CONST_INT
1164 || (INTVAL (XEXP (op, 1)) & 1) != 0)
1166 #if HOST_BITS_PER_WIDE_INT > 32
1167 if (INTVAL (XEXP (op, 1)) >= (HOST_WIDE_INT)1 << 32
1168 || INTVAL (XEXP (op, 1)) < -((HOST_WIDE_INT)1 << 32))
1174 /* Labels and local symbols allowed here as well. */
1175 if (GET_CODE (op) == LABEL_REF)
1177 if (GET_CODE (op) == SYMBOL_REF)
1178 return ((SYMBOL_REF_FLAGS (op) & SYMBOL_FLAG_ALIGN1) == 0
1179 && SYMBOL_REF_TLS_MODEL (op) == 0
1180 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
1182 /* Now we must have a @GOTENT offset or @PLT stub
1183 or an @INDNTPOFF TLS offset. */
1184 if (GET_CODE (op) == UNSPEC
1185 && XINT (op, 1) == UNSPEC_GOTENT)
1187 if (GET_CODE (op) == UNSPEC
1188 && XINT (op, 1) == UNSPEC_PLT)
1190 if (GET_CODE (op) == UNSPEC
1191 && XINT (op, 1) == UNSPEC_INDNTPOFF)
1197 /* Helper routine to implement s_operand and s_imm_operand.
1198 OP is the current operation.
1199 MODE is the current operation mode.
1200 ALLOW_IMMEDIATE specifies whether immediate operands should
1201 be accepted or not. */
1204 general_s_operand (register rtx op, enum machine_mode mode,
1205 int allow_immediate)
1207 struct s390_address addr;
1209 /* Call general_operand first, so that we don't have to
1210 check for many special cases. */
1211 if (!general_operand (op, mode))
1214 /* Just like memory_operand, allow (subreg (mem ...))
1216 if (reload_completed
1217 && GET_CODE (op) == SUBREG
1218 && GET_CODE (SUBREG_REG (op)) == MEM)
1219 op = SUBREG_REG (op);
1221 switch (GET_CODE (op))
1223 /* Constants are OK as s-operand if ALLOW_IMMEDIATE
1224 is true and we are still before reload. */
1227 if (!allow_immediate || reload_completed)
1231 /* Memory operands are OK unless they already use an
1234 if (GET_CODE (XEXP (op, 0)) == ADDRESSOF)
1236 if (!s390_decompose_address (XEXP (op, 0), &addr))
1240 /* Do not allow literal pool references unless ALLOW_IMMEDIATE
1241 is true. This prevents compares between two literal pool
1242 entries from being accepted. */
1243 if (!allow_immediate
1244 && addr.base && REGNO (addr.base) == BASE_REGISTER)
1255 /* Return true if OP is a valid S-type operand.
1256 OP is the current operation.
1257 MODE is the current operation mode. */
1260 s_operand (register rtx op, enum machine_mode mode)
1262 return general_s_operand (op, mode, 0);
1265 /* Return true if OP is a valid S-type operand or an immediate
1266 operand that can be addressed as S-type operand by forcing
1267 it into the literal pool.
1268 OP is the current operation.
1269 MODE is the current operation mode. */
1272 s_imm_operand (register rtx op, enum machine_mode mode)
1274 return general_s_operand (op, mode, 1);
1277 /* Return true if DISP is a valid short displacement. */
1280 s390_short_displacement (rtx disp)
1282 /* No displacement is OK. */
1286 /* Integer displacement in range. */
1287 if (GET_CODE (disp) == CONST_INT)
1288 return INTVAL (disp) >= 0 && INTVAL (disp) < 4096;
1290 /* GOT offset is not OK, the GOT can be large. */
1291 if (GET_CODE (disp) == CONST
1292 && GET_CODE (XEXP (disp, 0)) == UNSPEC
1293 && XINT (XEXP (disp, 0), 1) == UNSPEC_GOT)
1296 /* All other symbolic constants are literal pool references,
1297 which are OK as the literal pool must be small. */
1298 if (GET_CODE (disp) == CONST)
1304 /* Return true if OP is a valid operand for a C constraint. */
1307 s390_extra_constraint (rtx op, int c)
1309 struct s390_address addr;
1314 if (GET_CODE (op) != MEM)
1316 if (!s390_decompose_address (XEXP (op, 0), &addr))
1321 if (TARGET_LONG_DISPLACEMENT)
1323 if (!s390_short_displacement (addr.disp))
1329 if (GET_CODE (op) != MEM)
1332 if (TARGET_LONG_DISPLACEMENT)
1334 if (!s390_decompose_address (XEXP (op, 0), &addr))
1336 if (!s390_short_displacement (addr.disp))
1342 if (!TARGET_LONG_DISPLACEMENT)
1344 if (GET_CODE (op) != MEM)
1346 if (!s390_decompose_address (XEXP (op, 0), &addr))
1350 if (s390_short_displacement (addr.disp))
1355 if (!TARGET_LONG_DISPLACEMENT)
1357 if (GET_CODE (op) != MEM)
1359 /* Any invalid address here will be fixed up by reload,
1360 so accept it for the most generic constraint. */
1361 if (s390_decompose_address (XEXP (op, 0), &addr)
1362 && s390_short_displacement (addr.disp))
1367 if (TARGET_LONG_DISPLACEMENT)
1369 if (!s390_decompose_address (op, &addr))
1371 if (!s390_short_displacement (addr.disp))
1377 if (!TARGET_LONG_DISPLACEMENT)
1379 /* Any invalid address here will be fixed up by reload,
1380 so accept it for the most generic constraint. */
1381 if (s390_decompose_address (op, &addr)
1382 && s390_short_displacement (addr.disp))
1393 /* Compute a (partial) cost for rtx X. Return true if the complete
1394 cost has been computed, and false if subexpressions should be
1395 scanned. In either case, *TOTAL contains the cost result. */
1398 s390_rtx_costs (rtx x, int code, int outer_code, int *total)
1403 if (GET_CODE (XEXP (x, 0)) == MINUS
1404 && GET_CODE (XEXP (XEXP (x, 0), 1)) != CONST_INT)
1411 /* Force_const_mem does not work out of reload, because the
1412 saveable_obstack is set to reload_obstack, which does not
1413 live long enough. Because of this we cannot use force_const_mem
1414 in addsi3. This leads to problems with gen_add2_insn with a
1415 constant greater than a short. Because of that we give an
1416 addition of greater constants a cost of 3 (reload1.c 10096). */
1417 /* ??? saveable_obstack no longer exists. */
1418 if (outer_code == PLUS
1419 && (INTVAL (x) > 32767 || INTVAL (x) < -32768))
1420 *total = COSTS_N_INSNS (3);
1441 *total = COSTS_N_INSNS (1);
1445 if (GET_MODE (XEXP (x, 0)) == DImode)
1446 *total = COSTS_N_INSNS (40);
1448 *total = COSTS_N_INSNS (7);
1455 *total = COSTS_N_INSNS (33);
1463 /* Return the cost of an address rtx ADDR. */
1466 s390_address_cost (rtx addr)
1468 struct s390_address ad;
1469 if (!s390_decompose_address (addr, &ad))
1472 return ad.indx? COSTS_N_INSNS (1) + 1 : COSTS_N_INSNS (1);
1475 /* Return true if OP is a valid operand for the BRAS instruction.
1476 OP is the current operation.
1477 MODE is the current operation mode. */
1480 bras_sym_operand (register rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1482 register enum rtx_code code = GET_CODE (op);
1484 /* Allow SYMBOL_REFs. */
1485 if (code == SYMBOL_REF)
1488 /* Allow @PLT stubs. */
1490 && GET_CODE (XEXP (op, 0)) == UNSPEC
1491 && XINT (XEXP (op, 0), 1) == UNSPEC_PLT)
1496 /* If OP is a SYMBOL_REF of a thread-local symbol, return its TLS mode,
1497 otherwise return 0. */
1500 tls_symbolic_operand (register rtx op)
1502 if (GET_CODE (op) != SYMBOL_REF)
1504 return SYMBOL_REF_TLS_MODEL (op);
1507 /* Return true if OP is a load multiple operation. It is known to be a
1508 PARALLEL and the first section will be tested.
1509 OP is the current operation.
1510 MODE is the current operation mode. */
1513 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1515 int count = XVECLEN (op, 0);
1516 unsigned int dest_regno;
1521 /* Perform a quick check so we don't blow up below. */
1523 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1524 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1525 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1528 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1529 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1531 /* Check, is base, or base + displacement. */
1533 if (GET_CODE (src_addr) == REG)
1535 else if (GET_CODE (src_addr) == PLUS
1536 && GET_CODE (XEXP (src_addr, 0)) == REG
1537 && GET_CODE (XEXP (src_addr, 1)) == CONST_INT)
1539 off = INTVAL (XEXP (src_addr, 1));
1540 src_addr = XEXP (src_addr, 0);
1545 if (src_addr == frame_pointer_rtx || src_addr == arg_pointer_rtx)
1548 for (i = 1; i < count; i++)
1550 rtx elt = XVECEXP (op, 0, i);
1552 if (GET_CODE (elt) != SET
1553 || GET_CODE (SET_DEST (elt)) != REG
1554 || GET_MODE (SET_DEST (elt)) != Pmode
1555 || REGNO (SET_DEST (elt)) != dest_regno + i
1556 || GET_CODE (SET_SRC (elt)) != MEM
1557 || GET_MODE (SET_SRC (elt)) != Pmode
1558 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1559 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1560 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1561 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
1562 != off + i * UNITS_PER_WORD)
1569 /* Return true if OP is a store multiple operation. It is known to be a
1570 PARALLEL and the first section will be tested.
1571 OP is the current operation.
1572 MODE is the current operation mode. */
1575 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
1577 int count = XVECLEN (op, 0);
1578 unsigned int src_regno;
1582 /* Perform a quick check so we don't blow up below. */
1584 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1585 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1586 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1589 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1590 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1592 /* Check, is base, or base + displacement. */
1594 if (GET_CODE (dest_addr) == REG)
1596 else if (GET_CODE (dest_addr) == PLUS
1597 && GET_CODE (XEXP (dest_addr, 0)) == REG
1598 && GET_CODE (XEXP (dest_addr, 1)) == CONST_INT)
1600 off = INTVAL (XEXP (dest_addr, 1));
1601 dest_addr = XEXP (dest_addr, 0);
1606 if (dest_addr == frame_pointer_rtx || dest_addr == arg_pointer_rtx)
1609 for (i = 1; i < count; i++)
1611 rtx elt = XVECEXP (op, 0, i);
1613 if (GET_CODE (elt) != SET
1614 || GET_CODE (SET_SRC (elt)) != REG
1615 || GET_MODE (SET_SRC (elt)) != Pmode
1616 || REGNO (SET_SRC (elt)) != src_regno + i
1617 || GET_CODE (SET_DEST (elt)) != MEM
1618 || GET_MODE (SET_DEST (elt)) != Pmode
1619 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1620 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1621 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1622 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
1623 != off + i * UNITS_PER_WORD)
1630 /* Return true if OP contains a symbol reference */
1633 symbolic_reference_mentioned_p (rtx op)
1635 register const char *fmt;
1638 if (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF)
1641 fmt = GET_RTX_FORMAT (GET_CODE (op));
1642 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1648 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1649 if (symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1653 else if (fmt[i] == 'e' && symbolic_reference_mentioned_p (XEXP (op, i)))
1660 /* Return true if OP contains a reference to a thread-local symbol. */
1663 tls_symbolic_reference_mentioned_p (rtx op)
1665 register const char *fmt;
1668 if (GET_CODE (op) == SYMBOL_REF)
1669 return tls_symbolic_operand (op);
1671 fmt = GET_RTX_FORMAT (GET_CODE (op));
1672 for (i = GET_RTX_LENGTH (GET_CODE (op)) - 1; i >= 0; i--)
1678 for (j = XVECLEN (op, i) - 1; j >= 0; j--)
1679 if (tls_symbolic_reference_mentioned_p (XVECEXP (op, i, j)))
1683 else if (fmt[i] == 'e' && tls_symbolic_reference_mentioned_p (XEXP (op, i)))
1691 /* Return true if OP is a legitimate general operand when
1692 generating PIC code. It is given that flag_pic is on
1693 and that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1696 legitimate_pic_operand_p (register rtx op)
1698 /* Accept all non-symbolic constants. */
1699 if (!SYMBOLIC_CONST (op))
1702 /* Reject everything else; must be handled
1703 via emit_symbolic_move. */
1707 /* Returns true if the constant value OP is a legitimate general operand.
1708 It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */
1711 legitimate_constant_p (register rtx op)
1713 /* Accept all non-symbolic constants. */
1714 if (!SYMBOLIC_CONST (op))
1717 /* Accept immediate LARL operands. */
1718 if (TARGET_CPU_ZARCH && larl_operand (op, VOIDmode))
1721 /* Thread-local symbols are never legal constants. This is
1722 so that emit_call knows that computing such addresses
1723 might require a function call. */
1724 if (TLS_SYMBOLIC_CONST (op))
1727 /* In the PIC case, symbolic constants must *not* be
1728 forced into the literal pool. We accept them here,
1729 so that they will be handled by emit_symbolic_move. */
1733 /* All remaining non-PIC symbolic constants are
1734 forced into the literal pool. */
1738 /* Determine if it's legal to put X into the constant pool. This
1739 is not possible if X contains the address of a symbol that is
1740 not constant (TLS) or not known at final link time (PIC). */
1743 s390_cannot_force_const_mem (rtx x)
1745 switch (GET_CODE (x))
1749 /* Accept all non-symbolic constants. */
1753 /* Labels are OK iff we are non-PIC. */
1754 return flag_pic != 0;
1757 /* 'Naked' TLS symbol references are never OK,
1758 non-TLS symbols are OK iff we are non-PIC. */
1759 if (tls_symbolic_operand (x))
1762 return flag_pic != 0;
1765 return s390_cannot_force_const_mem (XEXP (x, 0));
1768 return s390_cannot_force_const_mem (XEXP (x, 0))
1769 || s390_cannot_force_const_mem (XEXP (x, 1));
1772 switch (XINT (x, 1))
1774 /* Only lt-relative or GOT-relative UNSPECs are OK. */
1775 case UNSPEC_LTREL_OFFSET:
1783 case UNSPEC_GOTNTPOFF:
1784 case UNSPEC_INDNTPOFF:
1797 /* Returns true if the constant value OP is a legitimate general
1798 operand during and after reload. The difference to
1799 legitimate_constant_p is that this function will not accept
1800 a constant that would need to be forced to the literal pool
1801 before it can be used as operand. */
1804 legitimate_reload_constant_p (register rtx op)
1806 /* Accept la(y) operands. */
1807 if (GET_CODE (op) == CONST_INT
1808 && DISP_IN_RANGE (INTVAL (op)))
1811 /* Accept l(g)hi operands. */
1812 if (GET_CODE (op) == CONST_INT
1813 && CONST_OK_FOR_LETTER_P (INTVAL (op), 'K'))
1816 /* Accept lliXX operands. */
1818 && s390_single_hi (op, DImode, 0) >= 0)
1821 /* Accept larl operands. */
1822 if (TARGET_CPU_ZARCH
1823 && larl_operand (op, VOIDmode))
1826 /* Everything else cannot be handled without reload. */
1830 /* Given an rtx OP being reloaded into a reg required to be in class CLASS,
1831 return the class of reg to actually use. */
1834 s390_preferred_reload_class (rtx op, enum reg_class class)
1836 /* This can happen if a floating point constant is being
1837 reloaded into an integer register. Leave well alone. */
1838 if (GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT
1839 && class != FP_REGS)
1842 switch (GET_CODE (op))
1844 /* Constants we cannot reload must be forced into the
1849 if (legitimate_reload_constant_p (op))
1854 /* If a symbolic constant or a PLUS is reloaded,
1855 it is most likely being used as an address, so
1856 prefer ADDR_REGS. If 'class' is not a superset
1857 of ADDR_REGS, e.g. FP_REGS, reject this reload. */
1862 if (reg_class_subset_p (ADDR_REGS, class))
1874 /* Return the register class of a scratch register needed to
1875 load IN into a register of class CLASS in MODE.
1877 We need a temporary when loading a PLUS expression which
1878 is not a legitimate operand of the LOAD ADDRESS instruction. */
1881 s390_secondary_input_reload_class (enum reg_class class ATTRIBUTE_UNUSED,
1882 enum machine_mode mode, rtx in)
1884 if (s390_plus_operand (in, mode))
1890 /* Return the register class of a scratch register needed to
1891 store a register of class CLASS in MODE into OUT:
1893 We need a temporary when storing a double-word to a
1894 non-offsettable memory address. */
1897 s390_secondary_output_reload_class (enum reg_class class,
1898 enum machine_mode mode, rtx out)
1900 if ((TARGET_64BIT ? mode == TImode
1901 : (mode == DImode || mode == DFmode))
1902 && reg_classes_intersect_p (GENERAL_REGS, class)
1903 && GET_CODE (out) == MEM
1904 && !offsettable_memref_p (out)
1905 && !s_operand (out, VOIDmode))
1911 /* Return true if OP is a PLUS that is not a legitimate
1912 operand for the LA instruction.
1913 OP is the current operation.
1914 MODE is the current operation mode. */
1917 s390_plus_operand (register rtx op, enum machine_mode mode)
1919 if (!check_mode (op, &mode) || mode != Pmode)
1922 if (GET_CODE (op) != PLUS)
1925 if (legitimate_la_operand_p (op))
1931 /* Generate code to load SRC, which is PLUS that is not a
1932 legitimate operand for the LA instruction, into TARGET.
1933 SCRATCH may be used as scratch register. */
1936 s390_expand_plus_operand (register rtx target, register rtx src,
1937 register rtx scratch)
1940 struct s390_address ad;
1942 /* src must be a PLUS; get its two operands. */
1943 if (GET_CODE (src) != PLUS || GET_MODE (src) != Pmode)
1946 /* Check if any of the two operands is already scheduled
1947 for replacement by reload. This can happen e.g. when
1948 float registers occur in an address. */
1949 sum1 = find_replacement (&XEXP (src, 0));
1950 sum2 = find_replacement (&XEXP (src, 1));
1951 src = gen_rtx_PLUS (Pmode, sum1, sum2);
1953 /* If the address is already strictly valid, there's nothing to do. */
1954 if (!s390_decompose_address (src, &ad)
1955 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
1956 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
1958 /* Otherwise, one of the operands cannot be an address register;
1959 we reload its value into the scratch register. */
1960 if (true_regnum (sum1) < 1 || true_regnum (sum1) > 15)
1962 emit_move_insn (scratch, sum1);
1965 if (true_regnum (sum2) < 1 || true_regnum (sum2) > 15)
1967 emit_move_insn (scratch, sum2);
1971 /* According to the way these invalid addresses are generated
1972 in reload.c, it should never happen (at least on s390) that
1973 *neither* of the PLUS components, after find_replacements
1974 was applied, is an address register. */
1975 if (sum1 == scratch && sum2 == scratch)
1981 src = gen_rtx_PLUS (Pmode, sum1, sum2);
1984 /* Emit the LOAD ADDRESS pattern. Note that reload of PLUS
1985 is only ever performed on addresses, so we can mark the
1986 sum as legitimate for LA in any case. */
1987 s390_load_address (target, src);
1991 /* Decompose a RTL expression ADDR for a memory address into
1992 its components, returned in OUT.
1994 Returns 0 if ADDR is not a valid memory address, nonzero
1995 otherwise. If OUT is NULL, don't return the components,
1996 but check for validity only.
1998 Note: Only addresses in canonical form are recognized.
1999 LEGITIMIZE_ADDRESS should convert non-canonical forms to the
2000 canonical form so that they will be recognized. */
2003 s390_decompose_address (register rtx addr, struct s390_address *out)
2005 rtx base = NULL_RTX;
2006 rtx indx = NULL_RTX;
2007 rtx disp = NULL_RTX;
2008 int pointer = FALSE;
2009 int base_ptr = FALSE;
2010 int indx_ptr = FALSE;
2012 /* Decompose address into base + index + displacement. */
2014 if (GET_CODE (addr) == REG || GET_CODE (addr) == UNSPEC)
2017 else if (GET_CODE (addr) == PLUS)
2019 rtx op0 = XEXP (addr, 0);
2020 rtx op1 = XEXP (addr, 1);
2021 enum rtx_code code0 = GET_CODE (op0);
2022 enum rtx_code code1 = GET_CODE (op1);
2024 if (code0 == REG || code0 == UNSPEC)
2026 if (code1 == REG || code1 == UNSPEC)
2028 indx = op0; /* index + base */
2034 base = op0; /* base + displacement */
2039 else if (code0 == PLUS)
2041 indx = XEXP (op0, 0); /* index + base + disp */
2042 base = XEXP (op0, 1);
2053 disp = addr; /* displacement */
2056 /* Validate base register. */
2059 if (GET_CODE (base) == UNSPEC)
2061 if (XVECLEN (base, 0) != 1 || XINT (base, 1) != UNSPEC_LTREL_BASE)
2063 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2066 if (GET_CODE (base) != REG || GET_MODE (base) != Pmode)
2069 if (REGNO (base) == BASE_REGISTER
2070 || REGNO (base) == STACK_POINTER_REGNUM
2071 || REGNO (base) == FRAME_POINTER_REGNUM
2072 || ((reload_completed || reload_in_progress)
2073 && frame_pointer_needed
2074 && REGNO (base) == HARD_FRAME_POINTER_REGNUM)
2075 || REGNO (base) == ARG_POINTER_REGNUM
2076 || (REGNO (base) >= FIRST_VIRTUAL_REGISTER
2077 && REGNO (base) <= LAST_VIRTUAL_REGISTER)
2079 && REGNO (base) == PIC_OFFSET_TABLE_REGNUM))
2080 pointer = base_ptr = TRUE;
2083 /* Validate index register. */
2086 if (GET_CODE (indx) == UNSPEC)
2088 if (XVECLEN (indx, 0) != 1 || XINT (indx, 1) != UNSPEC_LTREL_BASE)
2090 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2093 if (GET_CODE (indx) != REG || GET_MODE (indx) != Pmode)
2096 if (REGNO (indx) == BASE_REGISTER
2097 || REGNO (indx) == STACK_POINTER_REGNUM
2098 || REGNO (indx) == FRAME_POINTER_REGNUM
2099 || ((reload_completed || reload_in_progress)
2100 && frame_pointer_needed
2101 && REGNO (indx) == HARD_FRAME_POINTER_REGNUM)
2102 || REGNO (indx) == ARG_POINTER_REGNUM
2103 || (REGNO (indx) >= FIRST_VIRTUAL_REGISTER
2104 && REGNO (indx) <= LAST_VIRTUAL_REGISTER)
2106 && REGNO (indx) == PIC_OFFSET_TABLE_REGNUM))
2107 pointer = indx_ptr = TRUE;
2110 /* Prefer to use pointer as base, not index. */
2111 if (base && indx && !base_ptr
2112 && (indx_ptr || (!REG_POINTER (base) && REG_POINTER (indx))))
2119 /* Validate displacement. */
2122 /* Allow integer constant in range. */
2123 if (GET_CODE (disp) == CONST_INT)
2125 /* If the argument pointer is involved, the displacement will change
2126 later anyway as the argument pointer gets eliminated. This could
2127 make a valid displacement invalid, but it is more likely to make
2128 an invalid displacement valid, because we sometimes access the
2129 register save area via negative offsets to the arg pointer.
2130 Thus we don't check the displacement for validity here. If after
2131 elimination the displacement turns out to be invalid after all,
2132 this is fixed up by reload in any case. */
2133 if (base != arg_pointer_rtx && indx != arg_pointer_rtx)
2135 if (!DISP_IN_RANGE (INTVAL (disp)))
2140 /* In the small-PIC case, the linker converts @GOT
2141 and @GOTNTPOFF offsets to possible displacements. */
2142 else if (GET_CODE (disp) == CONST
2143 && GET_CODE (XEXP (disp, 0)) == UNSPEC
2144 && (XINT (XEXP (disp, 0), 1) == UNSPEC_GOT
2145 || XINT (XEXP (disp, 0), 1) == UNSPEC_GOTNTPOFF))
2153 /* Accept chunkfied literal pool symbol references. */
2154 else if (GET_CODE (disp) == CONST
2155 && GET_CODE (XEXP (disp, 0)) == MINUS
2156 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == LABEL_REF
2157 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == LABEL_REF)
2162 /* Likewise if a constant offset is present. */
2163 else if (GET_CODE (disp) == CONST
2164 && GET_CODE (XEXP (disp, 0)) == PLUS
2165 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT
2166 && GET_CODE (XEXP (XEXP (disp, 0), 0)) == MINUS
2167 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 0)) == LABEL_REF
2168 && GET_CODE (XEXP (XEXP (XEXP (disp, 0), 0), 1)) == LABEL_REF)
2173 /* We can convert literal pool addresses to
2174 displacements by basing them off the base register. */
2177 /* In some cases, we can accept an additional
2178 small constant offset. Split these off here. */
2180 unsigned int offset = 0;
2182 if (GET_CODE (disp) == CONST
2183 && GET_CODE (XEXP (disp, 0)) == PLUS
2184 && GET_CODE (XEXP (XEXP (disp, 0), 1)) == CONST_INT)
2186 offset = INTVAL (XEXP (XEXP (disp, 0), 1));
2187 disp = XEXP (XEXP (disp, 0), 0);
2190 /* Now we must have a literal pool address. */
2191 if (GET_CODE (disp) != SYMBOL_REF
2192 || !CONSTANT_POOL_ADDRESS_P (disp))
2195 /* If we have an offset, make sure it does not
2196 exceed the size of the constant pool entry. */
2197 if (offset && offset >= GET_MODE_SIZE (get_pool_mode (disp)))
2200 /* Either base or index must be free to
2201 hold the base register. */
2205 /* Convert the address. */
2207 indx = gen_rtx_REG (Pmode, BASE_REGISTER);
2209 base = gen_rtx_REG (Pmode, BASE_REGISTER);
2211 disp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, disp),
2212 UNSPEC_LTREL_OFFSET);
2213 disp = gen_rtx_CONST (Pmode, disp);
2216 disp = plus_constant (disp, offset);
2230 out->pointer = pointer;
2236 /* Return nonzero if ADDR is a valid memory address.
2237 STRICT specifies whether strict register checking applies. */
2240 legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED,
2241 register rtx addr, int strict)
2243 struct s390_address ad;
2244 if (!s390_decompose_address (addr, &ad))
2249 if (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
2251 if (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx))
2256 if (ad.base && !REG_OK_FOR_BASE_NONSTRICT_P (ad.base))
2258 if (ad.indx && !REG_OK_FOR_INDEX_NONSTRICT_P (ad.indx))
2265 /* Return 1 if OP is a valid operand for the LA instruction.
2266 In 31-bit, we need to prove that the result is used as an
2267 address, as LA performs only a 31-bit addition. */
2270 legitimate_la_operand_p (register rtx op)
2272 struct s390_address addr;
2273 if (!s390_decompose_address (op, &addr))
2276 if (TARGET_64BIT || addr.pointer)
2282 /* Return 1 if OP is a valid operand for the LA instruction,
2283 and we prefer to use LA over addition to compute it. */
2286 preferred_la_operand_p (register rtx op)
2288 struct s390_address addr;
2289 if (!s390_decompose_address (op, &addr))
2292 if (!TARGET_64BIT && !addr.pointer)
2298 if ((addr.base && REG_P (addr.base) && REG_POINTER (addr.base))
2299 || (addr.indx && REG_P (addr.indx) && REG_POINTER (addr.indx)))
2305 /* Emit a forced load-address operation to load SRC into DST.
2306 This will use the LOAD ADDRESS instruction even in situations
2307 where legitimate_la_operand_p (SRC) returns false. */
2310 s390_load_address (rtx dst, rtx src)
2313 emit_move_insn (dst, src);
2315 emit_insn (gen_force_la_31 (dst, src));
2318 /* Return a legitimate reference for ORIG (an address) using the
2319 register REG. If REG is 0, a new pseudo is generated.
2321 There are two types of references that must be handled:
2323 1. Global data references must load the address from the GOT, via
2324 the PIC reg. An insn is emitted to do this load, and the reg is
2327 2. Static data references, constant pool addresses, and code labels
2328 compute the address as an offset from the GOT, whose base is in
2329 the PIC reg. Static data objects have SYMBOL_FLAG_LOCAL set to
2330 differentiate them from global data objects. The returned
2331 address is the PIC reg + an unspec constant.
2333 GO_IF_LEGITIMATE_ADDRESS rejects symbolic references unless the PIC
2334 reg also appears in the address. */
2337 legitimize_pic_address (rtx orig, rtx reg)
2343 if (GET_CODE (addr) == LABEL_REF
2344 || (GET_CODE (addr) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (addr)))
2346 /* This is a local symbol. */
2347 if (TARGET_CPU_ZARCH && larl_operand (addr, VOIDmode))
2349 /* Access local symbols PC-relative via LARL.
2350 This is the same as in the non-PIC case, so it is
2351 handled automatically ... */
2355 /* Access local symbols relative to the GOT. */
2357 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2359 if (reload_in_progress || reload_completed)
2360 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2362 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTOFF);
2363 addr = gen_rtx_CONST (Pmode, addr);
2364 addr = force_const_mem (Pmode, addr);
2365 emit_move_insn (temp, addr);
2367 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2370 emit_move_insn (reg, new);
2375 else if (GET_CODE (addr) == SYMBOL_REF)
2378 reg = gen_reg_rtx (Pmode);
2382 /* Assume GOT offset < 4k. This is handled the same way
2383 in both 31- and 64-bit code (@GOT). */
2385 if (reload_in_progress || reload_completed)
2386 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2388 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2389 new = gen_rtx_CONST (Pmode, new);
2390 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2391 new = gen_rtx_MEM (Pmode, new);
2392 RTX_UNCHANGING_P (new) = 1;
2393 emit_move_insn (reg, new);
2396 else if (TARGET_CPU_ZARCH)
2398 /* If the GOT offset might be >= 4k, we determine the position
2399 of the GOT entry via a PC-relative LARL (@GOTENT). */
2401 rtx temp = gen_reg_rtx (Pmode);
2403 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTENT);
2404 new = gen_rtx_CONST (Pmode, new);
2405 emit_move_insn (temp, new);
2407 new = gen_rtx_MEM (Pmode, temp);
2408 RTX_UNCHANGING_P (new) = 1;
2409 emit_move_insn (reg, new);
2414 /* If the GOT offset might be >= 4k, we have to load it
2415 from the literal pool (@GOT). */
2417 rtx temp = gen_reg_rtx (Pmode);
2419 if (reload_in_progress || reload_completed)
2420 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2422 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOT);
2423 addr = gen_rtx_CONST (Pmode, addr);
2424 addr = force_const_mem (Pmode, addr);
2425 emit_move_insn (temp, addr);
2427 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2428 new = gen_rtx_MEM (Pmode, new);
2429 RTX_UNCHANGING_P (new) = 1;
2430 emit_move_insn (reg, new);
2436 if (GET_CODE (addr) == CONST)
2438 addr = XEXP (addr, 0);
2439 if (GET_CODE (addr) == UNSPEC)
2441 if (XVECLEN (addr, 0) != 1)
2443 switch (XINT (addr, 1))
2445 /* If someone moved a GOT-relative UNSPEC
2446 out of the literal pool, force them back in. */
2449 new = force_const_mem (Pmode, orig);
2452 /* @GOT is OK as is if small. */
2455 new = force_const_mem (Pmode, orig);
2458 /* @GOTENT is OK as is. */
2462 /* @PLT is OK as is on 64-bit, must be converted to
2463 GOT-relative @PLTOFF on 31-bit. */
2465 if (!TARGET_CPU_ZARCH)
2467 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2469 if (reload_in_progress || reload_completed)
2470 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2472 addr = XVECEXP (addr, 0, 0);
2473 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr),
2475 addr = gen_rtx_CONST (Pmode, addr);
2476 addr = force_const_mem (Pmode, addr);
2477 emit_move_insn (temp, addr);
2479 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2482 emit_move_insn (reg, new);
2488 /* Everything else cannot happen. */
2493 else if (GET_CODE (addr) != PLUS)
2496 if (GET_CODE (addr) == PLUS)
2498 rtx op0 = XEXP (addr, 0), op1 = XEXP (addr, 1);
2499 /* Check first to see if this is a constant offset
2500 from a local symbol reference. */
2501 if ((GET_CODE (op0) == LABEL_REF
2502 || (GET_CODE (op0) == SYMBOL_REF && SYMBOL_REF_LOCAL_P (op0)))
2503 && GET_CODE (op1) == CONST_INT)
2505 if (TARGET_CPU_ZARCH && larl_operand (op0, VOIDmode))
2507 if (INTVAL (op1) & 1)
2509 /* LARL can't handle odd offsets, so emit a
2510 pair of LARL and LA. */
2511 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2513 if (!DISP_IN_RANGE (INTVAL (op1)))
2515 int even = INTVAL (op1) - 1;
2516 op0 = gen_rtx_PLUS (Pmode, op0, GEN_INT (even));
2517 op0 = gen_rtx_CONST (Pmode, op0);
2521 emit_move_insn (temp, op0);
2522 new = gen_rtx_PLUS (Pmode, temp, op1);
2526 emit_move_insn (reg, new);
2532 /* If the offset is even, we can just use LARL.
2533 This will happen automatically. */
2538 /* Access local symbols relative to the GOT. */
2540 rtx temp = reg? reg : gen_reg_rtx (Pmode);
2542 if (reload_in_progress || reload_completed)
2543 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2545 addr = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op0),
2547 addr = gen_rtx_PLUS (Pmode, addr, op1);
2548 addr = gen_rtx_CONST (Pmode, addr);
2549 addr = force_const_mem (Pmode, addr);
2550 emit_move_insn (temp, addr);
2552 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2555 emit_move_insn (reg, new);
2561 /* Now, check whether it is a GOT relative symbol plus offset
2562 that was pulled out of the literal pool. Force it back in. */
2564 else if (GET_CODE (op0) == UNSPEC
2565 && GET_CODE (op1) == CONST_INT)
2567 if (XVECLEN (op0, 0) != 1)
2569 if (XINT (op0, 1) != UNSPEC_GOTOFF)
2572 new = force_const_mem (Pmode, orig);
2575 /* Otherwise, compute the sum. */
2578 base = legitimize_pic_address (XEXP (addr, 0), reg);
2579 new = legitimize_pic_address (XEXP (addr, 1),
2580 base == reg ? NULL_RTX : reg);
2581 if (GET_CODE (new) == CONST_INT)
2582 new = plus_constant (base, INTVAL (new));
2585 if (GET_CODE (new) == PLUS && CONSTANT_P (XEXP (new, 1)))
2587 base = gen_rtx_PLUS (Pmode, base, XEXP (new, 0));
2588 new = XEXP (new, 1);
2590 new = gen_rtx_PLUS (Pmode, base, new);
2593 if (GET_CODE (new) == CONST)
2594 new = XEXP (new, 0);
2595 new = force_operand (new, 0);
2602 /* Load the thread pointer into a register. */
2605 get_thread_pointer (void)
2609 tp = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TP);
2610 tp = force_reg (Pmode, tp);
2611 mark_reg_pointer (tp, BITS_PER_WORD);
2616 /* Construct the SYMBOL_REF for the tls_get_offset function. */
2618 static GTY(()) rtx s390_tls_symbol;
2620 s390_tls_get_offset (void)
2622 if (!s390_tls_symbol)
2623 s390_tls_symbol = gen_rtx_SYMBOL_REF (Pmode, "__tls_get_offset");
2625 return s390_tls_symbol;
2628 /* ADDR contains a thread-local SYMBOL_REF. Generate code to compute
2629 this (thread-local) address. REG may be used as temporary. */
2632 legitimize_tls_address (rtx addr, rtx reg)
2634 rtx new, tls_call, temp, base, r2, insn;
2636 if (GET_CODE (addr) == SYMBOL_REF)
2637 switch (tls_symbolic_operand (addr))
2639 case TLS_MODEL_GLOBAL_DYNAMIC:
2641 r2 = gen_rtx_REG (Pmode, 2);
2642 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_TLSGD);
2643 new = gen_rtx_CONST (Pmode, tls_call);
2644 new = force_const_mem (Pmode, new);
2645 emit_move_insn (r2, new);
2646 emit_call_insn (gen_call_value_tls (r2, tls_call));
2647 insn = get_insns ();
2650 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2651 temp = gen_reg_rtx (Pmode);
2652 emit_libcall_block (insn, temp, r2, new);
2654 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2657 s390_load_address (reg, new);
2662 case TLS_MODEL_LOCAL_DYNAMIC:
2664 r2 = gen_rtx_REG (Pmode, 2);
2665 tls_call = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM);
2666 new = gen_rtx_CONST (Pmode, tls_call);
2667 new = force_const_mem (Pmode, new);
2668 emit_move_insn (r2, new);
2669 emit_call_insn (gen_call_value_tls (r2, tls_call));
2670 insn = get_insns ();
2673 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, const0_rtx), UNSPEC_TLSLDM_NTPOFF);
2674 temp = gen_reg_rtx (Pmode);
2675 emit_libcall_block (insn, temp, r2, new);
2677 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2678 base = gen_reg_rtx (Pmode);
2679 s390_load_address (base, new);
2681 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_DTPOFF);
2682 new = gen_rtx_CONST (Pmode, new);
2683 new = force_const_mem (Pmode, new);
2684 temp = gen_reg_rtx (Pmode);
2685 emit_move_insn (temp, new);
2687 new = gen_rtx_PLUS (Pmode, base, temp);
2690 s390_load_address (reg, new);
2695 case TLS_MODEL_INITIAL_EXEC:
2698 /* Assume GOT offset < 4k. This is handled the same way
2699 in both 31- and 64-bit code. */
2701 if (reload_in_progress || reload_completed)
2702 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2704 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2705 new = gen_rtx_CONST (Pmode, new);
2706 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, new);
2707 new = gen_rtx_MEM (Pmode, new);
2708 RTX_UNCHANGING_P (new) = 1;
2709 temp = gen_reg_rtx (Pmode);
2710 emit_move_insn (temp, new);
2712 else if (TARGET_CPU_ZARCH)
2714 /* If the GOT offset might be >= 4k, we determine the position
2715 of the GOT entry via a PC-relative LARL. */
2717 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2718 new = gen_rtx_CONST (Pmode, new);
2719 temp = gen_reg_rtx (Pmode);
2720 emit_move_insn (temp, new);
2722 new = gen_rtx_MEM (Pmode, temp);
2723 RTX_UNCHANGING_P (new) = 1;
2724 temp = gen_reg_rtx (Pmode);
2725 emit_move_insn (temp, new);
2729 /* If the GOT offset might be >= 4k, we have to load it
2730 from the literal pool. */
2732 if (reload_in_progress || reload_completed)
2733 regs_ever_live[PIC_OFFSET_TABLE_REGNUM] = 1;
2735 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_GOTNTPOFF);
2736 new = gen_rtx_CONST (Pmode, new);
2737 new = force_const_mem (Pmode, new);
2738 temp = gen_reg_rtx (Pmode);
2739 emit_move_insn (temp, new);
2741 new = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, temp);
2742 new = gen_rtx_MEM (Pmode, new);
2743 RTX_UNCHANGING_P (new) = 1;
2745 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2746 temp = gen_reg_rtx (Pmode);
2747 emit_insn (gen_rtx_SET (Pmode, temp, new));
2751 /* In position-dependent code, load the absolute address of
2752 the GOT entry from the literal pool. */
2754 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_INDNTPOFF);
2755 new = gen_rtx_CONST (Pmode, new);
2756 new = force_const_mem (Pmode, new);
2757 temp = gen_reg_rtx (Pmode);
2758 emit_move_insn (temp, new);
2761 new = gen_rtx_MEM (Pmode, new);
2762 RTX_UNCHANGING_P (new) = 1;
2764 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (2, new, addr), UNSPEC_TLS_LOAD);
2765 temp = gen_reg_rtx (Pmode);
2766 emit_insn (gen_rtx_SET (Pmode, temp, new));
2769 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2772 s390_load_address (reg, new);
2777 case TLS_MODEL_LOCAL_EXEC:
2778 new = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, addr), UNSPEC_NTPOFF);
2779 new = gen_rtx_CONST (Pmode, new);
2780 new = force_const_mem (Pmode, new);
2781 temp = gen_reg_rtx (Pmode);
2782 emit_move_insn (temp, new);
2784 new = gen_rtx_PLUS (Pmode, get_thread_pointer (), temp);
2787 s390_load_address (reg, new);
2796 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == UNSPEC)
2798 switch (XINT (XEXP (addr, 0), 1))
2800 case UNSPEC_INDNTPOFF:
2801 if (TARGET_CPU_ZARCH)
2813 abort (); /* for now ... */
2818 /* Emit insns to move operands[1] into operands[0]. */
2821 emit_symbolic_move (rtx *operands)
2823 rtx temp = no_new_pseudos ? operands[0] : gen_reg_rtx (Pmode);
2825 if (GET_CODE (operands[0]) == MEM)
2826 operands[1] = force_reg (Pmode, operands[1]);
2827 else if (TLS_SYMBOLIC_CONST (operands[1]))
2828 operands[1] = legitimize_tls_address (operands[1], temp);
2830 operands[1] = legitimize_pic_address (operands[1], temp);
2833 /* Try machine-dependent ways of modifying an illegitimate address X
2834 to be legitimate. If we find one, return the new, valid address.
2836 OLDX is the address as it was before break_out_memory_refs was called.
2837 In some cases it is useful to look at this to decide what needs to be done.
2839 MODE is the mode of the operand pointed to by X.
2841 When -fpic is used, special handling is needed for symbolic references.
2842 See comments by legitimize_pic_address for details. */
2845 legitimize_address (register rtx x, register rtx oldx ATTRIBUTE_UNUSED,
2846 enum machine_mode mode ATTRIBUTE_UNUSED)
2848 rtx constant_term = const0_rtx;
2850 if (TLS_SYMBOLIC_CONST (x))
2852 x = legitimize_tls_address (x, 0);
2854 if (legitimate_address_p (mode, x, FALSE))
2859 if (SYMBOLIC_CONST (x)
2860 || (GET_CODE (x) == PLUS
2861 && (SYMBOLIC_CONST (XEXP (x, 0))
2862 || SYMBOLIC_CONST (XEXP (x, 1)))))
2863 x = legitimize_pic_address (x, 0);
2865 if (legitimate_address_p (mode, x, FALSE))
2869 x = eliminate_constant_term (x, &constant_term);
2871 /* Optimize loading of large displacements by splitting them
2872 into the multiple of 4K and the rest; this allows the
2873 former to be CSE'd if possible.
2875 Don't do this if the displacement is added to a register
2876 pointing into the stack frame, as the offsets will
2877 change later anyway. */
2879 if (GET_CODE (constant_term) == CONST_INT
2880 && !TARGET_LONG_DISPLACEMENT
2881 && !DISP_IN_RANGE (INTVAL (constant_term))
2882 && !(REG_P (x) && REGNO_PTR_FRAME_P (REGNO (x))))
2884 HOST_WIDE_INT lower = INTVAL (constant_term) & 0xfff;
2885 HOST_WIDE_INT upper = INTVAL (constant_term) ^ lower;
2887 rtx temp = gen_reg_rtx (Pmode);
2888 rtx val = force_operand (GEN_INT (upper), temp);
2890 emit_move_insn (temp, val);
2892 x = gen_rtx_PLUS (Pmode, x, temp);
2893 constant_term = GEN_INT (lower);
2896 if (GET_CODE (x) == PLUS)
2898 if (GET_CODE (XEXP (x, 0)) == REG)
2900 register rtx temp = gen_reg_rtx (Pmode);
2901 register rtx val = force_operand (XEXP (x, 1), temp);
2903 emit_move_insn (temp, val);
2905 x = gen_rtx_PLUS (Pmode, XEXP (x, 0), temp);
2908 else if (GET_CODE (XEXP (x, 1)) == REG)
2910 register rtx temp = gen_reg_rtx (Pmode);
2911 register rtx val = force_operand (XEXP (x, 0), temp);
2913 emit_move_insn (temp, val);
2915 x = gen_rtx_PLUS (Pmode, temp, XEXP (x, 1));
2919 if (constant_term != const0_rtx)
2920 x = gen_rtx_PLUS (Pmode, x, constant_term);
2925 /* Emit code to move LEN bytes from DST to SRC. */
2928 s390_expand_movstr (rtx dst, rtx src, rtx len)
2930 rtx (*gen_short) (rtx, rtx, rtx) =
2931 TARGET_64BIT ? gen_movstr_short_64 : gen_movstr_short_31;
2932 rtx (*gen_long) (rtx, rtx, rtx, rtx) =
2933 TARGET_64BIT ? gen_movstr_long_64 : gen_movstr_long_31;
2936 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
2938 if (INTVAL (len) > 0)
2939 emit_insn (gen_short (dst, src, GEN_INT (INTVAL (len) - 1)));
2942 else if (TARGET_MVCLE)
2944 enum machine_mode double_mode = TARGET_64BIT ? TImode : DImode;
2945 enum machine_mode single_mode = TARGET_64BIT ? DImode : SImode;
2946 rtx reg0 = gen_reg_rtx (double_mode);
2947 rtx reg1 = gen_reg_rtx (double_mode);
2949 emit_move_insn (gen_highpart (single_mode, reg0),
2950 force_operand (XEXP (dst, 0), NULL_RTX));
2951 emit_move_insn (gen_highpart (single_mode, reg1),
2952 force_operand (XEXP (src, 0), NULL_RTX));
2954 convert_move (gen_lowpart (single_mode, reg0), len, 1);
2955 convert_move (gen_lowpart (single_mode, reg1), len, 1);
2957 emit_insn (gen_long (reg0, reg1, reg0, reg1));
2962 rtx dst_addr, src_addr, count, blocks, temp;
2963 rtx end_label = gen_label_rtx ();
2964 enum machine_mode mode;
2967 mode = GET_MODE (len);
2968 if (mode == VOIDmode)
2971 type = lang_hooks.types.type_for_mode (mode, 1);
2975 dst_addr = gen_reg_rtx (Pmode);
2976 src_addr = gen_reg_rtx (Pmode);
2977 count = gen_reg_rtx (mode);
2978 blocks = gen_reg_rtx (mode);
2980 convert_move (count, len, 1);
2981 emit_cmp_and_jump_insns (count, const0_rtx,
2982 EQ, NULL_RTX, mode, 1, end_label);
2984 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
2985 emit_move_insn (src_addr, force_operand (XEXP (src, 0), NULL_RTX));
2986 dst = change_address (dst, VOIDmode, dst_addr);
2987 src = change_address (src, VOIDmode, src_addr);
2989 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
2991 emit_move_insn (count, temp);
2993 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
2995 emit_move_insn (blocks, temp);
2997 expand_start_loop (1);
2998 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
2999 make_tree (type, blocks),
3000 make_tree (type, const0_rtx)));
3002 emit_insn (gen_short (dst, src, GEN_INT (255)));
3003 s390_load_address (dst_addr,
3004 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3005 s390_load_address (src_addr,
3006 gen_rtx_PLUS (Pmode, src_addr, GEN_INT (256)));
3008 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3010 emit_move_insn (blocks, temp);
3014 emit_insn (gen_short (dst, src, convert_to_mode (word_mode, count, 1)));
3015 emit_label (end_label);
3019 /* Emit code to clear LEN bytes at DST. */
3022 s390_expand_clrstr (rtx dst, rtx len)
3024 rtx (*gen_short) (rtx, rtx) =
3025 TARGET_64BIT ? gen_clrstr_short_64 : gen_clrstr_short_31;
3026 rtx (*gen_long) (rtx, rtx, rtx) =
3027 TARGET_64BIT ? gen_clrstr_long_64 : gen_clrstr_long_31;
3030 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3032 if (INTVAL (len) > 0)
3033 emit_insn (gen_short (dst, GEN_INT (INTVAL (len) - 1)));
3036 else if (TARGET_MVCLE)
3038 enum machine_mode double_mode = TARGET_64BIT ? TImode : DImode;
3039 enum machine_mode single_mode = TARGET_64BIT ? DImode : SImode;
3040 rtx reg0 = gen_reg_rtx (double_mode);
3041 rtx reg1 = gen_reg_rtx (double_mode);
3043 emit_move_insn (gen_highpart (single_mode, reg0),
3044 force_operand (XEXP (dst, 0), NULL_RTX));
3045 convert_move (gen_lowpart (single_mode, reg0), len, 1);
3047 emit_move_insn (gen_highpart (single_mode, reg1), const0_rtx);
3048 emit_move_insn (gen_lowpart (single_mode, reg1), const0_rtx);
3050 emit_insn (gen_long (reg0, reg1, reg0));
3055 rtx dst_addr, src_addr, count, blocks, temp;
3056 rtx end_label = gen_label_rtx ();
3057 enum machine_mode mode;
3060 mode = GET_MODE (len);
3061 if (mode == VOIDmode)
3064 type = lang_hooks.types.type_for_mode (mode, 1);
3068 dst_addr = gen_reg_rtx (Pmode);
3069 src_addr = gen_reg_rtx (Pmode);
3070 count = gen_reg_rtx (mode);
3071 blocks = gen_reg_rtx (mode);
3073 convert_move (count, len, 1);
3074 emit_cmp_and_jump_insns (count, const0_rtx,
3075 EQ, NULL_RTX, mode, 1, end_label);
3077 emit_move_insn (dst_addr, force_operand (XEXP (dst, 0), NULL_RTX));
3078 dst = change_address (dst, VOIDmode, dst_addr);
3080 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3082 emit_move_insn (count, temp);
3084 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3086 emit_move_insn (blocks, temp);
3088 expand_start_loop (1);
3089 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
3090 make_tree (type, blocks),
3091 make_tree (type, const0_rtx)));
3093 emit_insn (gen_short (dst, GEN_INT (255)));
3094 s390_load_address (dst_addr,
3095 gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
3097 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3099 emit_move_insn (blocks, temp);
3103 emit_insn (gen_short (dst, convert_to_mode (word_mode, count, 1)));
3104 emit_label (end_label);
3108 /* Emit code to compare LEN bytes at OP0 with those at OP1,
3109 and return the result in TARGET. */
3112 s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len)
3114 rtx (*gen_short) (rtx, rtx, rtx) =
3115 TARGET_64BIT ? gen_cmpmem_short_64 : gen_cmpmem_short_31;
3116 rtx (*gen_long) (rtx, rtx, rtx, rtx) =
3117 TARGET_64BIT ? gen_cmpmem_long_64 : gen_cmpmem_long_31;
3118 rtx (*gen_result) (rtx) =
3119 GET_MODE (target) == DImode ? gen_cmpint_di : gen_cmpint_si;
3121 op0 = protect_from_queue (op0, 0);
3122 op1 = protect_from_queue (op1, 0);
3123 len = protect_from_queue (len, 0);
3125 if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
3127 if (INTVAL (len) > 0)
3129 emit_insn (gen_short (op0, op1, GEN_INT (INTVAL (len) - 1)));
3130 emit_insn (gen_result (target));
3133 emit_move_insn (target, const0_rtx);
3136 else /* if (TARGET_MVCLE) */
3138 enum machine_mode double_mode = TARGET_64BIT ? TImode : DImode;
3139 enum machine_mode single_mode = TARGET_64BIT ? DImode : SImode;
3140 rtx reg0 = gen_reg_rtx (double_mode);
3141 rtx reg1 = gen_reg_rtx (double_mode);
3143 emit_move_insn (gen_highpart (single_mode, reg0),
3144 force_operand (XEXP (op0, 0), NULL_RTX));
3145 emit_move_insn (gen_highpart (single_mode, reg1),
3146 force_operand (XEXP (op1, 0), NULL_RTX));
3148 convert_move (gen_lowpart (single_mode, reg0), len, 1);
3149 convert_move (gen_lowpart (single_mode, reg1), len, 1);
3151 emit_insn (gen_long (reg0, reg1, reg0, reg1));
3152 emit_insn (gen_result (target));
3156 /* Deactivate for now as profile code cannot cope with
3157 CC being live across basic block boundaries. */
3160 rtx addr0, addr1, count, blocks, temp;
3161 rtx end_label = gen_label_rtx ();
3162 enum machine_mode mode;
3165 mode = GET_MODE (len);
3166 if (mode == VOIDmode)
3169 type = lang_hooks.types.type_for_mode (mode, 1);
3173 addr0 = gen_reg_rtx (Pmode);
3174 addr1 = gen_reg_rtx (Pmode);
3175 count = gen_reg_rtx (mode);
3176 blocks = gen_reg_rtx (mode);
3178 convert_move (count, len, 1);
3179 emit_cmp_and_jump_insns (count, const0_rtx,
3180 EQ, NULL_RTX, mode, 1, end_label);
3182 emit_move_insn (addr0, force_operand (XEXP (op0, 0), NULL_RTX));
3183 emit_move_insn (addr1, force_operand (XEXP (op1, 0), NULL_RTX));
3184 op0 = change_address (op0, VOIDmode, addr0);
3185 op1 = change_address (op1, VOIDmode, addr1);
3187 temp = expand_binop (mode, add_optab, count, constm1_rtx, count, 1, 0);
3189 emit_move_insn (count, temp);
3191 temp = expand_binop (mode, ashr_optab, count, GEN_INT (8), blocks, 1, 0);
3193 emit_move_insn (blocks, temp);
3195 expand_start_loop (1);
3196 expand_exit_loop_top_cond (0, build (NE_EXPR, type,
3197 make_tree (type, blocks),
3198 make_tree (type, const0_rtx)));
3200 emit_insn (gen_short (op0, op1, GEN_INT (255)));
3201 temp = gen_rtx_NE (VOIDmode, gen_rtx_REG (CCSmode, 33), const0_rtx);
3202 temp = gen_rtx_IF_THEN_ELSE (VOIDmode, temp,
3203 gen_rtx_LABEL_REF (VOIDmode, end_label), pc_rtx);
3204 temp = gen_rtx_SET (VOIDmode, pc_rtx, temp);
3205 emit_jump_insn (temp);
3207 s390_load_address (addr0,
3208 gen_rtx_PLUS (Pmode, addr0, GEN_INT (256)));
3209 s390_load_address (addr1,
3210 gen_rtx_PLUS (Pmode, addr1, GEN_INT (256)));
3212 temp = expand_binop (mode, add_optab, blocks, constm1_rtx, blocks, 1, 0);
3214 emit_move_insn (blocks, temp);
3218 emit_insn (gen_short (op0, op1, convert_to_mode (word_mode, count, 1)));
3219 emit_label (end_label);
3221 emit_insn (gen_result (target));
3226 /* This is called from dwarf2out.c via ASM_OUTPUT_DWARF_DTPREL.
3227 We need to emit DTP-relative relocations. */
3230 s390_output_dwarf_dtprel (FILE *file, int size, rtx x)
3235 fputs ("\t.long\t", file);
3238 fputs ("\t.quad\t", file);
3243 output_addr_const (file, x);
3244 fputs ("@DTPOFF", file);
3247 /* In the name of slightly smaller debug output, and to cater to
3248 general assembler losage, recognize various UNSPEC sequences
3249 and turn them back into a direct symbol reference. */
3252 s390_delegitimize_address (rtx orig_x)
3256 if (GET_CODE (x) != MEM)
3260 if (GET_CODE (x) == PLUS
3261 && GET_CODE (XEXP (x, 1)) == CONST
3262 && GET_CODE (XEXP (x, 0)) == REG
3263 && REGNO (XEXP (x, 0)) == PIC_OFFSET_TABLE_REGNUM)
3265 y = XEXP (XEXP (x, 1), 0);
3266 if (GET_CODE (y) == UNSPEC
3267 && XINT (y, 1) == UNSPEC_GOT)
3268 return XVECEXP (y, 0, 0);
3272 if (GET_CODE (x) == CONST)
3275 if (GET_CODE (y) == UNSPEC
3276 && XINT (y, 1) == UNSPEC_GOTENT)
3277 return XVECEXP (y, 0, 0);
3284 /* Locate some local-dynamic symbol still in use by this function
3285 so that we can print its name in local-dynamic base patterns. */
3288 get_some_local_dynamic_name (void)
3292 if (cfun->machine->some_ld_name)
3293 return cfun->machine->some_ld_name;
3295 for (insn = get_insns (); insn ; insn = NEXT_INSN (insn))
3297 && for_each_rtx (&PATTERN (insn), get_some_local_dynamic_name_1, 0))
3298 return cfun->machine->some_ld_name;
3304 get_some_local_dynamic_name_1 (rtx *px, void *data ATTRIBUTE_UNUSED)
3308 if (GET_CODE (x) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (x))
3310 x = get_pool_constant (x);
3311 return for_each_rtx (&x, get_some_local_dynamic_name_1, 0);
3314 if (GET_CODE (x) == SYMBOL_REF
3315 && tls_symbolic_operand (x) == TLS_MODEL_LOCAL_DYNAMIC)
3317 cfun->machine->some_ld_name = XSTR (x, 0);
3324 /* Output symbolic constant X in assembler syntax to
3325 stdio stream FILE. */
3328 s390_output_symbolic_const (FILE *file, rtx x)
3330 switch (GET_CODE (x))
3335 s390_output_symbolic_const (file, XEXP (x, 0));
3339 s390_output_symbolic_const (file, XEXP (x, 0));
3340 fprintf (file, "+");
3341 s390_output_symbolic_const (file, XEXP (x, 1));
3345 s390_output_symbolic_const (file, XEXP (x, 0));
3346 fprintf (file, "-");
3347 s390_output_symbolic_const (file, XEXP (x, 1));
3354 output_addr_const (file, x);
3358 if (XVECLEN (x, 0) != 1)
3359 output_operand_lossage ("invalid UNSPEC as operand (1)");
3360 switch (XINT (x, 1))
3363 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3364 fprintf (file, "@GOTENT");
3367 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3368 fprintf (file, "@GOT");
3371 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3372 fprintf (file, "@GOTOFF");
3375 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3376 fprintf (file, "@PLT");
3379 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3380 fprintf (file, "@PLTOFF");
3383 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3384 fprintf (file, "@TLSGD");
3387 assemble_name (file, get_some_local_dynamic_name ());
3388 fprintf (file, "@TLSLDM");
3391 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3392 fprintf (file, "@DTPOFF");
3395 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3396 fprintf (file, "@NTPOFF");
3398 case UNSPEC_GOTNTPOFF:
3399 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3400 fprintf (file, "@GOTNTPOFF");
3402 case UNSPEC_INDNTPOFF:
3403 s390_output_symbolic_const (file, XVECEXP (x, 0, 0));
3404 fprintf (file, "@INDNTPOFF");
3407 output_operand_lossage ("invalid UNSPEC as operand (2)");
3413 fatal_insn ("UNKNOWN in s390_output_symbolic_const !?", x);
3418 /* Output address operand ADDR in assembler syntax to
3419 stdio stream FILE. */
3422 print_operand_address (FILE *file, rtx addr)
3424 struct s390_address ad;
3426 if (!s390_decompose_address (addr, &ad)
3427 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3428 || (ad.indx && !REG_OK_FOR_INDEX_STRICT_P (ad.indx)))
3429 output_operand_lossage ("Cannot decompose address.");
3432 s390_output_symbolic_const (file, ad.disp);
3434 fprintf (file, "0");
3436 if (ad.base && ad.indx)
3437 fprintf (file, "(%s,%s)", reg_names[REGNO (ad.indx)],
3438 reg_names[REGNO (ad.base)]);
3440 fprintf (file, "(%s)", reg_names[REGNO (ad.base)]);
3443 /* Output operand X in assembler syntax to stdio stream FILE.
3444 CODE specified the format flag. The following format flags
3447 'C': print opcode suffix for branch condition.
3448 'D': print opcode suffix for inverse branch condition.
3449 'J': print tls_load/tls_gdcall/tls_ldcall suffix
3450 'O': print only the displacement of a memory reference.
3451 'R': print only the base register of a memory reference.
3452 'N': print the second word of a DImode operand.
3453 'M': print the second word of a TImode operand.
3455 'b': print integer X as if it's an unsigned byte.
3456 'x': print integer X as if it's an unsigned word.
3457 'h': print integer X as if it's a signed word. */
3460 print_operand (FILE *file, rtx x, int code)
3465 fprintf (file, s390_branch_condition_mnemonic (x, FALSE));
3469 fprintf (file, s390_branch_condition_mnemonic (x, TRUE));
3473 if (GET_CODE (x) == SYMBOL_REF)
3475 fprintf (file, "%s", ":tls_load:");
3476 output_addr_const (file, x);
3478 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSGD)
3480 fprintf (file, "%s", ":tls_gdcall:");
3481 output_addr_const (file, XVECEXP (x, 0, 0));
3483 else if (GET_CODE (x) == UNSPEC && XINT (x, 1) == UNSPEC_TLSLDM)
3485 fprintf (file, "%s", ":tls_ldcall:");
3486 assemble_name (file, get_some_local_dynamic_name ());
3494 struct s390_address ad;
3496 if (GET_CODE (x) != MEM
3497 || !s390_decompose_address (XEXP (x, 0), &ad)
3498 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3503 s390_output_symbolic_const (file, ad.disp);
3505 fprintf (file, "0");
3511 struct s390_address ad;
3513 if (GET_CODE (x) != MEM
3514 || !s390_decompose_address (XEXP (x, 0), &ad)
3515 || (ad.base && !REG_OK_FOR_BASE_STRICT_P (ad.base))
3520 fprintf (file, "%s", reg_names[REGNO (ad.base)]);
3522 fprintf (file, "0");
3527 if (GET_CODE (x) == REG)
3528 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3529 else if (GET_CODE (x) == MEM)
3530 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 4));
3536 if (GET_CODE (x) == REG)
3537 x = gen_rtx_REG (GET_MODE (x), REGNO (x) + 1);
3538 else if (GET_CODE (x) == MEM)
3539 x = change_address (x, VOIDmode, plus_constant (XEXP (x, 0), 8));
3545 switch (GET_CODE (x))
3548 fprintf (file, "%s", reg_names[REGNO (x)]);
3552 output_address (XEXP (x, 0));
3559 s390_output_symbolic_const (file, x);
3564 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xff);
3565 else if (code == 'x')
3566 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x) & 0xffff);
3567 else if (code == 'h')
3568 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((INTVAL (x) & 0xffff) ^ 0x8000) - 0x8000);
3570 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3574 if (GET_MODE (x) != VOIDmode)
3577 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xff);
3578 else if (code == 'x')
3579 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x) & 0xffff);
3580 else if (code == 'h')
3581 fprintf (file, HOST_WIDE_INT_PRINT_DEC, ((CONST_DOUBLE_LOW (x) & 0xffff) ^ 0x8000) - 0x8000);
3587 fatal_insn ("UNKNOWN in print_operand !?", x);
3592 /* Target hook for assembling integer objects. We need to define it
3593 here to work a round a bug in some versions of GAS, which couldn't
3594 handle values smaller than INT_MIN when printed in decimal. */
3597 s390_assemble_integer (rtx x, unsigned int size, int aligned_p)
3599 if (size == 8 && aligned_p
3600 && GET_CODE (x) == CONST_INT && INTVAL (x) < INT_MIN)
3602 fprintf (asm_out_file, "\t.quad\t" HOST_WIDE_INT_PRINT_HEX "\n",
3606 return default_assemble_integer (x, size, aligned_p);
3609 /* Returns true if register REGNO is used for forming
3610 a memory address in expression X. */
3613 reg_used_in_mem_p (int regno, rtx x)
3615 enum rtx_code code = GET_CODE (x);
3621 if (refers_to_regno_p (regno, regno+1,
3625 else if (code == SET
3626 && GET_CODE (SET_DEST (x)) == PC)
3628 if (refers_to_regno_p (regno, regno+1,
3633 fmt = GET_RTX_FORMAT (code);
3634 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3637 && reg_used_in_mem_p (regno, XEXP (x, i)))
3640 else if (fmt[i] == 'E')
3641 for (j = 0; j < XVECLEN (x, i); j++)
3642 if (reg_used_in_mem_p (regno, XVECEXP (x, i, j)))
3648 /* Returns true if expression DEP_RTX sets an address register
3649 used by instruction INSN to address memory. */
3652 addr_generation_dependency_p (rtx dep_rtx, rtx insn)
3656 if (GET_CODE (dep_rtx) == INSN)
3657 dep_rtx = PATTERN (dep_rtx);
3659 if (GET_CODE (dep_rtx) == SET)
3661 target = SET_DEST (dep_rtx);
3662 if (GET_CODE (target) == STRICT_LOW_PART)
3663 target = XEXP (target, 0);
3664 while (GET_CODE (target) == SUBREG)
3665 target = SUBREG_REG (target);
3667 if (GET_CODE (target) == REG)
3669 int regno = REGNO (target);
3671 if (s390_safe_attr_type (insn) == TYPE_LA)
3673 pat = PATTERN (insn);
3674 if (GET_CODE (pat) == PARALLEL)
3676 if (XVECLEN (pat, 0) != 2)
3678 pat = XVECEXP (pat, 0, 0);
3680 if (GET_CODE (pat) == SET)
3681 return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
3685 else if (get_attr_atype (insn) == ATYPE_AGEN)
3686 return reg_used_in_mem_p (regno, PATTERN (insn));
3692 /* Return 1, if dep_insn sets register used in insn in the agen unit. */
3695 s390_agen_dep_p (rtx dep_insn, rtx insn)
3697 rtx dep_rtx = PATTERN (dep_insn);
3700 if (GET_CODE (dep_rtx) == SET
3701 && addr_generation_dependency_p (dep_rtx, insn))
3703 else if (GET_CODE (dep_rtx) == PARALLEL)
3705 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3707 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3714 /* Return the modified cost of the dependency of instruction INSN
3715 on instruction DEP_INSN through the link LINK. COST is the
3716 default cost of that dependency.
3718 Data dependencies are all handled without delay. However, if a
3719 register is modified and subsequently used as base or index
3720 register of a memory reference, at least 4 cycles need to pass
3721 between setting and using the register to avoid pipeline stalls.
3722 An exception is the LA instruction. An address generated by LA can
3723 be used by introducing only a one cycle stall on the pipeline. */
3726 s390_adjust_cost (rtx insn, rtx link, rtx dep_insn, int cost)
3731 /* If the dependence is an anti-dependence, there is no cost. For an
3732 output dependence, there is sometimes a cost, but it doesn't seem
3733 worth handling those few cases. */
3735 if (REG_NOTE_KIND (link) != 0)
3738 /* If we can't recognize the insns, we can't really do anything. */
3739 if (recog_memoized (insn) < 0 || recog_memoized (dep_insn) < 0)
3742 /* DFA based scheduling checks address dependency in md file. */
3743 if (s390_use_dfa_pipeline_interface ())
3745 /* Operand forward in case of lr, load and la. */
3746 if (s390_tune == PROCESSOR_2084_Z990
3748 && (s390_safe_attr_type (dep_insn) == TYPE_LA
3749 || s390_safe_attr_type (dep_insn) == TYPE_LR
3750 || s390_safe_attr_type (dep_insn) == TYPE_LOAD))
3755 dep_rtx = PATTERN (dep_insn);
3757 if (GET_CODE (dep_rtx) == SET
3758 && addr_generation_dependency_p (dep_rtx, insn))
3759 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3760 else if (GET_CODE (dep_rtx) == PARALLEL)
3762 for (i = 0; i < XVECLEN (dep_rtx, 0); i++)
3764 if (addr_generation_dependency_p (XVECEXP (dep_rtx, 0, i), insn))
3765 cost += (s390_safe_attr_type (dep_insn) == TYPE_LA) ? 1 : 4;
3771 /* A C statement (sans semicolon) to update the integer scheduling priority
3772 INSN_PRIORITY (INSN). Increase the priority to execute the INSN earlier,
3773 reduce the priority to execute INSN later. Do not define this macro if
3774 you do not need to adjust the scheduling priorities of insns.
3776 A STD instruction should be scheduled earlier,
3777 in order to use the bypass. */
3780 s390_adjust_priority (rtx insn ATTRIBUTE_UNUSED, int priority)
3782 if (! INSN_P (insn))
3785 if (s390_tune != PROCESSOR_2084_Z990)
3788 switch (s390_safe_attr_type (insn))
3792 priority = priority << 3;
3795 priority = priority << 1;
3803 /* The number of instructions that can be issued per cycle. */
3806 s390_issue_rate (void)
3808 if (s390_tune == PROCESSOR_2084_Z990)
3813 /* If the following function returns TRUE, we will use the the DFA
3817 s390_use_dfa_pipeline_interface (void)
3819 if (s390_tune == PROCESSOR_2064_Z900
3820 || s390_tune == PROCESSOR_2084_Z990)
3827 s390_first_cycle_multipass_dfa_lookahead (void)
3829 return s390_use_dfa_pipeline_interface () ? 4 : 0;
3832 /* Called after issuing each insn.
3833 Triggers default sort algorithm to better slot instructions. */
3836 s390_sched_reorder2 (FILE *dump ATTRIBUTE_UNUSED,
3837 int sched_verbose ATTRIBUTE_UNUSED,
3838 rtx *ready ATTRIBUTE_UNUSED,
3839 int *pn_ready ATTRIBUTE_UNUSED,
3840 int clock_var ATTRIBUTE_UNUSED)
3842 return s390_issue_rate();
3846 /* Split all branches that exceed the maximum distance.
3847 Returns true if this created a new literal pool entry.
3849 Code generated by this routine is allowed to use
3850 TEMP_REG as temporary scratch register. If this is
3851 done, TEMP_USED is set to true. */
3854 s390_split_branches (rtx temp_reg, bool *temp_used)
3856 int new_literal = 0;
3857 rtx insn, pat, tmp, target;
3860 /* We need correct insn addresses. */
3862 shorten_branches (get_insns ());
3864 /* Find all branches that exceed 64KB, and split them. */
3866 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3868 if (GET_CODE (insn) != JUMP_INSN)
3871 pat = PATTERN (insn);
3872 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
3873 pat = XVECEXP (pat, 0, 0);
3874 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
3877 if (GET_CODE (SET_SRC (pat)) == LABEL_REF)
3879 label = &SET_SRC (pat);
3881 else if (GET_CODE (SET_SRC (pat)) == IF_THEN_ELSE)
3883 if (GET_CODE (XEXP (SET_SRC (pat), 1)) == LABEL_REF)
3884 label = &XEXP (SET_SRC (pat), 1);
3885 else if (GET_CODE (XEXP (SET_SRC (pat), 2)) == LABEL_REF)
3886 label = &XEXP (SET_SRC (pat), 2);
3893 if (get_attr_length (insn) <= (TARGET_CPU_ZARCH ? 6 : 4))
3898 if (TARGET_CPU_ZARCH)
3900 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, *label), insn);
3901 INSN_ADDRESSES_NEW (tmp, -1);
3908 tmp = force_const_mem (Pmode, *label);
3909 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, tmp), insn);
3910 INSN_ADDRESSES_NEW (tmp, -1);
3917 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, *label),
3918 UNSPEC_LTREL_OFFSET);
3919 target = gen_rtx_CONST (Pmode, target);
3920 target = force_const_mem (Pmode, target);
3921 tmp = emit_insn_before (gen_rtx_SET (Pmode, temp_reg, target), insn);
3922 INSN_ADDRESSES_NEW (tmp, -1);
3924 target = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (target, 0)),
3926 target = gen_rtx_PLUS (Pmode, temp_reg, target);
3929 if (!validate_change (insn, label, target, 0))
3937 /* Find a literal pool symbol referenced in RTX X, and store
3938 it at REF. Will abort if X contains references to more than
3939 one such pool symbol; multiple references to the same symbol
3940 are allowed, however.
3942 The rtx pointed to by REF must be initialized to NULL_RTX
3943 by the caller before calling this routine. */
3946 find_constant_pool_ref (rtx x, rtx *ref)
3951 /* Ignore LTREL_BASE references. */
3952 if (GET_CODE (x) == UNSPEC
3953 && XINT (x, 1) == UNSPEC_LTREL_BASE)
3955 /* Likewise POOL_ENTRY insns. */
3956 if (GET_CODE (x) == UNSPEC_VOLATILE
3957 && XINT (x, 1) == UNSPECV_POOL_ENTRY)
3960 if (GET_CODE (x) == SYMBOL_REF
3961 && CONSTANT_POOL_ADDRESS_P (x))
3963 if (*ref == NULL_RTX)
3969 fmt = GET_RTX_FORMAT (GET_CODE (x));
3970 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
3974 find_constant_pool_ref (XEXP (x, i), ref);
3976 else if (fmt[i] == 'E')
3978 for (j = 0; j < XVECLEN (x, i); j++)
3979 find_constant_pool_ref (XVECEXP (x, i, j), ref);
3984 /* Replace every reference to the literal pool symbol REF
3985 in X by the address ADDR. Fix up MEMs as required. */
3988 replace_constant_pool_ref (rtx *x, rtx ref, rtx addr)
3996 /* Literal pool references can only occur inside a MEM ... */
3997 if (GET_CODE (*x) == MEM)
3999 rtx memref = XEXP (*x, 0);
4003 *x = replace_equiv_address (*x, addr);
4007 if (GET_CODE (memref) == CONST
4008 && GET_CODE (XEXP (memref, 0)) == PLUS
4009 && GET_CODE (XEXP (XEXP (memref, 0), 1)) == CONST_INT
4010 && XEXP (XEXP (memref, 0), 0) == ref)
4012 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (memref, 0), 1));
4013 *x = replace_equiv_address (*x, plus_constant (addr, off));
4018 /* ... or a load-address type pattern. */
4019 if (GET_CODE (*x) == SET)
4021 rtx addrref = SET_SRC (*x);
4025 SET_SRC (*x) = addr;
4029 if (GET_CODE (addrref) == CONST
4030 && GET_CODE (XEXP (addrref, 0)) == PLUS
4031 && GET_CODE (XEXP (XEXP (addrref, 0), 1)) == CONST_INT
4032 && XEXP (XEXP (addrref, 0), 0) == ref)
4034 HOST_WIDE_INT off = INTVAL (XEXP (XEXP (addrref, 0), 1));
4035 SET_SRC (*x) = plus_constant (addr, off);
4040 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4041 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4045 replace_constant_pool_ref (&XEXP (*x, i), ref, addr);
4047 else if (fmt[i] == 'E')
4049 for (j = 0; j < XVECLEN (*x, i); j++)
4050 replace_constant_pool_ref (&XVECEXP (*x, i, j), ref, addr);
4055 /* Check whether X contains an UNSPEC_LTREL_BASE.
4056 Return its constant pool symbol if found, NULL_RTX otherwise. */
4059 find_ltrel_base (rtx x)
4064 if (GET_CODE (x) == UNSPEC
4065 && XINT (x, 1) == UNSPEC_LTREL_BASE)
4066 return XVECEXP (x, 0, 0);
4068 fmt = GET_RTX_FORMAT (GET_CODE (x));
4069 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
4073 rtx fnd = find_ltrel_base (XEXP (x, i));
4077 else if (fmt[i] == 'E')
4079 for (j = 0; j < XVECLEN (x, i); j++)
4081 rtx fnd = find_ltrel_base (XVECEXP (x, i, j));
4091 /* Replace any occurrence of UNSPEC_LTREL_BASE in X with BASE. */
4094 replace_ltrel_base (rtx *x, rtx base)
4099 if (GET_CODE (*x) == UNSPEC
4100 && XINT (*x, 1) == UNSPEC_LTREL_BASE)
4106 fmt = GET_RTX_FORMAT (GET_CODE (*x));
4107 for (i = GET_RTX_LENGTH (GET_CODE (*x)) - 1; i >= 0; i--)
4111 replace_ltrel_base (&XEXP (*x, i), base);
4113 else if (fmt[i] == 'E')
4115 for (j = 0; j < XVECLEN (*x, i); j++)
4116 replace_ltrel_base (&XVECEXP (*x, i, j), base);
4122 /* We keep a list of constants which we have to add to internal
4123 constant tables in the middle of large functions. */
4125 #define NR_C_MODES 7
4126 enum machine_mode constant_modes[NR_C_MODES] =
4137 struct constant *next;
4142 struct constant_pool
4144 struct constant_pool *next;
4149 struct constant *constants[NR_C_MODES];
4154 static struct constant_pool * s390_mainpool_start (void);
4155 static void s390_mainpool_finish (struct constant_pool *, rtx base_reg);
4156 static void s390_mainpool_cancel (struct constant_pool *);
4158 static struct constant_pool * s390_chunkify_start (rtx base_reg);
4159 static void s390_chunkify_finish (struct constant_pool *, rtx base_reg);
4160 static void s390_chunkify_cancel (struct constant_pool *);
4162 static struct constant_pool *s390_start_pool (struct constant_pool **, rtx);
4163 static void s390_end_pool (struct constant_pool *, rtx);
4164 static void s390_add_pool_insn (struct constant_pool *, rtx);
4165 static struct constant_pool *s390_find_pool (struct constant_pool *, rtx);
4166 static void s390_add_constant (struct constant_pool *, rtx, enum machine_mode);
4167 static rtx s390_find_constant (struct constant_pool *, rtx, enum machine_mode);
4168 static rtx s390_dump_pool (struct constant_pool *, bool);
4169 static struct constant_pool *s390_alloc_pool (void);
4170 static void s390_free_pool (struct constant_pool *);
4172 /* Create new constant pool covering instructions starting at INSN
4173 and chain it to the end of POOL_LIST. */
4175 static struct constant_pool *
4176 s390_start_pool (struct constant_pool **pool_list, rtx insn)
4178 struct constant_pool *pool, **prev;
4180 pool = s390_alloc_pool ();
4181 pool->first_insn = insn;
4183 for (prev = pool_list; *prev; prev = &(*prev)->next)
4190 /* End range of instructions covered by POOL at INSN and emit
4191 placeholder insn representing the pool. */
4194 s390_end_pool (struct constant_pool *pool, rtx insn)
4196 rtx pool_size = GEN_INT (pool->size + 8 /* alignment slop */);
4199 insn = get_last_insn ();
4201 pool->pool_insn = emit_insn_after (gen_pool (pool_size), insn);
4202 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4205 /* Add INSN to the list of insns covered by POOL. */
4208 s390_add_pool_insn (struct constant_pool *pool, rtx insn)
4210 bitmap_set_bit (pool->insns, INSN_UID (insn));
4213 /* Return pool out of POOL_LIST that covers INSN. */
4215 static struct constant_pool *
4216 s390_find_pool (struct constant_pool *pool_list, rtx insn)
4218 struct constant_pool *pool;
4220 for (pool = pool_list; pool; pool = pool->next)
4221 if (bitmap_bit_p (pool->insns, INSN_UID (insn)))
4227 /* Add constant VAL of mode MODE to the constant pool POOL. */
4230 s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode)
4235 for (i = 0; i < NR_C_MODES; i++)
4236 if (constant_modes[i] == mode)
4238 if (i == NR_C_MODES)
4241 for (c = pool->constants[i]; c != NULL; c = c->next)
4242 if (rtx_equal_p (val, c->value))
4247 c = (struct constant *) xmalloc (sizeof *c);
4249 c->label = gen_label_rtx ();
4250 c->next = pool->constants[i];
4251 pool->constants[i] = c;
4252 pool->size += GET_MODE_SIZE (mode);
4256 /* Find constant VAL of mode MODE in the constant pool POOL.
4257 Return an RTX describing the distance from the start of
4258 the pool to the location of the new constant. */
4261 s390_find_constant (struct constant_pool *pool, rtx val,
4262 enum machine_mode mode)
4268 for (i = 0; i < NR_C_MODES; i++)
4269 if (constant_modes[i] == mode)
4271 if (i == NR_C_MODES)
4274 for (c = pool->constants[i]; c != NULL; c = c->next)
4275 if (rtx_equal_p (val, c->value))
4281 offset = gen_rtx_MINUS (Pmode, gen_rtx_LABEL_REF (Pmode, c->label),
4282 gen_rtx_LABEL_REF (Pmode, pool->label));
4283 offset = gen_rtx_CONST (Pmode, offset);
4287 /* Dump out the constants in POOL. If REMOTE_LABEL is true,
4288 do not emit the pool base label. */
4291 s390_dump_pool (struct constant_pool *pool, bool remote_label)
4297 /* Pool start insn switches to proper section
4298 and guarantees necessary alignment. */
4299 if (TARGET_CPU_ZARCH)
4300 insn = emit_insn_after (gen_pool_start_64 (), pool->pool_insn);
4302 insn = emit_insn_after (gen_pool_start_31 (), pool->pool_insn);
4303 INSN_ADDRESSES_NEW (insn, -1);
4307 insn = emit_label_after (pool->label, insn);
4308 INSN_ADDRESSES_NEW (insn, -1);
4311 /* Dump constants in descending alignment requirement order,
4312 ensuring proper alignment for every constant. */
4313 for (i = 0; i < NR_C_MODES; i++)
4314 for (c = pool->constants[i]; c; c = c->next)
4316 /* Convert UNSPEC_LTREL_OFFSET unspecs to pool-relative references. */
4317 rtx value = c->value;
4318 if (GET_CODE (value) == CONST
4319 && GET_CODE (XEXP (value, 0)) == UNSPEC
4320 && XINT (XEXP (value, 0), 1) == UNSPEC_LTREL_OFFSET
4321 && XVECLEN (XEXP (value, 0), 0) == 1)
4323 value = gen_rtx_MINUS (Pmode, XVECEXP (XEXP (value, 0), 0, 0),
4324 gen_rtx_LABEL_REF (VOIDmode, pool->label));
4325 value = gen_rtx_CONST (VOIDmode, value);
4328 insn = emit_label_after (c->label, insn);
4329 INSN_ADDRESSES_NEW (insn, -1);
4331 value = gen_rtx_UNSPEC_VOLATILE (constant_modes[i],
4332 gen_rtvec (1, value),
4333 UNSPECV_POOL_ENTRY);
4334 insn = emit_insn_after (value, insn);
4335 INSN_ADDRESSES_NEW (insn, -1);
4338 /* Pool end insn switches back to previous section
4339 and guarantees necessary alignment. */
4340 if (TARGET_CPU_ZARCH)
4341 insn = emit_insn_after (gen_pool_end_64 (), insn);
4343 insn = emit_insn_after (gen_pool_end_31 (), insn);
4344 INSN_ADDRESSES_NEW (insn, -1);
4346 insn = emit_barrier_after (insn);
4347 INSN_ADDRESSES_NEW (insn, -1);
4349 /* Remove placeholder insn. */
4350 remove_insn (pool->pool_insn);
4355 /* Allocate new constant_pool structure. */
4357 static struct constant_pool *
4358 s390_alloc_pool (void)
4360 struct constant_pool *pool;
4363 pool = (struct constant_pool *) xmalloc (sizeof *pool);
4365 for (i = 0; i < NR_C_MODES; i++)
4366 pool->constants[i] = NULL;
4368 pool->label = gen_label_rtx ();
4369 pool->first_insn = NULL_RTX;
4370 pool->pool_insn = NULL_RTX;
4371 pool->insns = BITMAP_XMALLOC ();
4377 /* Free all memory used by POOL. */
4380 s390_free_pool (struct constant_pool *pool)
4384 for (i = 0; i < NR_C_MODES; i++)
4386 struct constant *c = pool->constants[i];
4389 struct constant *next = c->next;
4395 BITMAP_XFREE (pool->insns);
4400 /* Collect main literal pool. Return NULL on overflow. */
4402 static struct constant_pool *
4403 s390_mainpool_start (void)
4405 struct constant_pool *pool;
4408 pool = s390_alloc_pool ();
4410 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4412 if (GET_CODE (insn) == INSN
4413 && GET_CODE (PATTERN (insn)) == UNSPEC_VOLATILE
4414 && XINT (PATTERN (insn), 1) == UNSPECV_MAIN_POOL)
4416 if (pool->pool_insn)
4418 pool->pool_insn = insn;
4421 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4423 rtx pool_ref = NULL_RTX;
4424 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4427 rtx constant = get_pool_constant (pool_ref);
4428 enum machine_mode mode = get_pool_mode (pool_ref);
4429 s390_add_constant (pool, constant, mode);
4434 if (!pool->pool_insn)
4437 if (pool->size >= 4096)
4439 s390_free_pool (pool);
4446 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4447 Modify the current function to output the pool constants as well as
4448 the pool register setup instruction. BASE_REG is the register to
4449 be used as pool base register. */
4452 s390_mainpool_finish (struct constant_pool *pool, rtx base_reg)
4456 /* If the pool is empty, we're done. */
4457 if (pool->size == 0)
4459 remove_insn (pool->pool_insn);
4460 s390_free_pool (pool);
4464 /* We need correct insn addresses. */
4465 shorten_branches (get_insns ());
4467 /* On zSeries, we use a LARL to load the pool register. The pool is
4468 located in the .rodata section, so we emit it after the function. */
4469 if (TARGET_CPU_ZARCH)
4471 insn = gen_main_base_64 (base_reg, pool->label);
4472 insn = emit_insn_after (insn, pool->pool_insn);
4473 INSN_ADDRESSES_NEW (insn, -1);
4474 remove_insn (pool->pool_insn);
4476 insn = get_last_insn ();
4477 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4478 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4480 s390_dump_pool (pool, 0);
4483 /* On S/390, if the total size of the function's code plus literal pool
4484 does not exceed 4096 bytes, we use BASR to set up a function base
4485 pointer, and emit the literal pool at the end of the function. */
4486 else if (INSN_ADDRESSES (INSN_UID (get_last_insn ()))
4487 + pool->size + 8 /* alignment slop */ < 4096)
4489 insn = gen_main_base_31_small (base_reg, pool->label);
4490 insn = emit_insn_after (insn, pool->pool_insn);
4491 INSN_ADDRESSES_NEW (insn, -1);
4492 remove_insn (pool->pool_insn);
4494 insn = emit_label_after (pool->label, insn);
4495 INSN_ADDRESSES_NEW (insn, -1);
4497 insn = get_last_insn ();
4498 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4499 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4501 s390_dump_pool (pool, 1);
4504 /* Otherwise, we emit an inline literal pool and use BASR to branch
4505 over it, setting up the pool register at the same time. */
4508 rtx pool_end = gen_label_rtx ();
4510 insn = gen_main_base_31_large (base_reg, pool->label, pool_end);
4511 insn = emit_insn_after (insn, pool->pool_insn);
4512 INSN_ADDRESSES_NEW (insn, -1);
4513 remove_insn (pool->pool_insn);
4515 insn = emit_label_after (pool->label, insn);
4516 INSN_ADDRESSES_NEW (insn, -1);
4518 pool->pool_insn = emit_insn_after (gen_pool (const0_rtx), insn);
4519 INSN_ADDRESSES_NEW (pool->pool_insn, -1);
4521 insn = emit_label_after (pool_end, pool->pool_insn);
4522 INSN_ADDRESSES_NEW (insn, -1);
4524 s390_dump_pool (pool, 1);
4528 /* Replace all literal pool references. */
4530 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4533 replace_ltrel_base (&PATTERN (insn), base_reg);
4535 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4537 rtx addr, pool_ref = NULL_RTX;
4538 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4541 addr = s390_find_constant (pool, get_pool_constant (pool_ref),
4542 get_pool_mode (pool_ref));
4543 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4544 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4545 INSN_CODE (insn) = -1;
4551 /* Free the pool. */
4552 s390_free_pool (pool);
4555 /* POOL holds the main literal pool as collected by s390_mainpool_start.
4556 We have decided we cannot use this pool, so revert all changes
4557 to the current function that were done by s390_mainpool_start. */
4559 s390_mainpool_cancel (struct constant_pool *pool)
4561 /* We didn't actually change the instruction stream, so simply
4562 free the pool memory. */
4563 s390_free_pool (pool);
4567 /* Chunkify the literal pool. BASE_REG is to be used as pool
4570 #define S390_POOL_CHUNK_MIN 0xc00
4571 #define S390_POOL_CHUNK_MAX 0xe00
4573 static struct constant_pool *
4574 s390_chunkify_start (rtx base_reg)
4576 struct constant_pool *curr_pool = NULL, *pool_list = NULL;
4579 rtx pending_ltrel = NULL_RTX;
4582 rtx (*gen_reload_base) (rtx, rtx) =
4583 TARGET_CPU_ZARCH? gen_reload_base_64 : gen_reload_base_31;
4586 /* We need correct insn addresses. */
4588 shorten_branches (get_insns ());
4590 /* Scan all insns and move literals to pool chunks. */
4592 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4594 /* Check for pending LTREL_BASE. */
4597 rtx ltrel_base = find_ltrel_base (PATTERN (insn));
4600 if (ltrel_base == pending_ltrel)
4601 pending_ltrel = NULL_RTX;
4607 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4609 rtx pool_ref = NULL_RTX;
4610 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4613 rtx constant = get_pool_constant (pool_ref);
4614 enum machine_mode mode = get_pool_mode (pool_ref);
4617 curr_pool = s390_start_pool (&pool_list, insn);
4619 s390_add_constant (curr_pool, constant, mode);
4620 s390_add_pool_insn (curr_pool, insn);
4622 /* Don't split the pool chunk between a LTREL_OFFSET load
4623 and the corresponding LTREL_BASE. */
4624 if (GET_CODE (constant) == CONST
4625 && GET_CODE (XEXP (constant, 0)) == UNSPEC
4626 && XINT (XEXP (constant, 0), 1) == UNSPEC_LTREL_OFFSET)
4630 pending_ltrel = pool_ref;
4635 if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CODE_LABEL)
4638 s390_add_pool_insn (curr_pool, insn);
4639 /* An LTREL_BASE must follow within the same basic block. */
4645 || INSN_ADDRESSES_SIZE () <= (size_t) INSN_UID (insn)
4646 || INSN_ADDRESSES (INSN_UID (insn)) == -1)
4649 if (TARGET_CPU_ZARCH)
4651 if (curr_pool->size < S390_POOL_CHUNK_MAX)
4654 s390_end_pool (curr_pool, NULL_RTX);
4659 int chunk_size = INSN_ADDRESSES (INSN_UID (insn))
4660 - INSN_ADDRESSES (INSN_UID (curr_pool->first_insn))
4663 /* We will later have to insert base register reload insns.
4664 Those will have an effect on code size, which we need to
4665 consider here. This calculation makes rather pessimistic
4666 worst-case assumptions. */
4667 if (GET_CODE (insn) == CODE_LABEL)
4670 if (chunk_size < S390_POOL_CHUNK_MIN
4671 && curr_pool->size < S390_POOL_CHUNK_MIN)
4674 /* Pool chunks can only be inserted after BARRIERs ... */
4675 if (GET_CODE (insn) == BARRIER)
4677 s390_end_pool (curr_pool, insn);
4682 /* ... so if we don't find one in time, create one. */
4683 else if ((chunk_size > S390_POOL_CHUNK_MAX
4684 || curr_pool->size > S390_POOL_CHUNK_MAX))
4686 rtx label, jump, barrier;
4688 /* We can insert the barrier only after a 'real' insn. */
4689 if (GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
4691 if (get_attr_length (insn) == 0)
4694 /* Don't separate LTREL_BASE from the corresponding
4695 LTREL_OFFSET load. */
4699 label = gen_label_rtx ();
4700 jump = emit_jump_insn_after (gen_jump (label), insn);
4701 barrier = emit_barrier_after (jump);
4702 insn = emit_label_after (label, barrier);
4703 JUMP_LABEL (jump) = label;
4704 LABEL_NUSES (label) = 1;
4706 INSN_ADDRESSES_NEW (jump, -1);
4707 INSN_ADDRESSES_NEW (barrier, -1);
4708 INSN_ADDRESSES_NEW (insn, -1);
4710 s390_end_pool (curr_pool, barrier);
4718 s390_end_pool (curr_pool, NULL_RTX);
4723 /* Find all labels that are branched into
4724 from an insn belonging to a different chunk. */
4726 far_labels = BITMAP_XMALLOC ();
4728 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4730 /* Labels marked with LABEL_PRESERVE_P can be target
4731 of non-local jumps, so we have to mark them.
4732 The same holds for named labels.
4734 Don't do that, however, if it is the label before
4737 if (GET_CODE (insn) == CODE_LABEL
4738 && (LABEL_PRESERVE_P (insn) || LABEL_NAME (insn)))
4740 rtx vec_insn = next_real_insn (insn);
4741 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4742 PATTERN (vec_insn) : NULL_RTX;
4744 || !(GET_CODE (vec_pat) == ADDR_VEC
4745 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4746 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (insn));
4749 /* If we have a direct jump (conditional or unconditional)
4750 or a casesi jump, check all potential targets. */
4751 else if (GET_CODE (insn) == JUMP_INSN)
4753 rtx pat = PATTERN (insn);
4754 if (GET_CODE (pat) == PARALLEL && XVECLEN (pat, 0) > 2)
4755 pat = XVECEXP (pat, 0, 0);
4757 if (GET_CODE (pat) == SET)
4759 rtx label = JUMP_LABEL (insn);
4762 if (s390_find_pool (pool_list, label)
4763 != s390_find_pool (pool_list, insn))
4764 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4767 else if (GET_CODE (pat) == PARALLEL
4768 && XVECLEN (pat, 0) == 2
4769 && GET_CODE (XVECEXP (pat, 0, 0)) == SET
4770 && GET_CODE (XVECEXP (pat, 0, 1)) == USE
4771 && GET_CODE (XEXP (XVECEXP (pat, 0, 1), 0)) == LABEL_REF)
4773 /* Find the jump table used by this casesi jump. */
4774 rtx vec_label = XEXP (XEXP (XVECEXP (pat, 0, 1), 0), 0);
4775 rtx vec_insn = next_real_insn (vec_label);
4776 rtx vec_pat = vec_insn && GET_CODE (vec_insn) == JUMP_INSN ?
4777 PATTERN (vec_insn) : NULL_RTX;
4779 && (GET_CODE (vec_pat) == ADDR_VEC
4780 || GET_CODE (vec_pat) == ADDR_DIFF_VEC))
4782 int i, diff_p = GET_CODE (vec_pat) == ADDR_DIFF_VEC;
4784 for (i = 0; i < XVECLEN (vec_pat, diff_p); i++)
4786 rtx label = XEXP (XVECEXP (vec_pat, diff_p, i), 0);
4788 if (s390_find_pool (pool_list, label)
4789 != s390_find_pool (pool_list, insn))
4790 bitmap_set_bit (far_labels, CODE_LABEL_NUMBER (label));
4797 /* Insert base register reload insns before every pool. */
4799 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4801 rtx new_insn = gen_reload_base (base_reg, curr_pool->label);
4802 rtx insn = curr_pool->first_insn;
4803 INSN_ADDRESSES_NEW (emit_insn_before (new_insn, insn), -1);
4806 /* Insert base register reload insns at every far label. */
4808 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4809 if (GET_CODE (insn) == CODE_LABEL
4810 && bitmap_bit_p (far_labels, CODE_LABEL_NUMBER (insn)))
4812 struct constant_pool *pool = s390_find_pool (pool_list, insn);
4815 rtx new_insn = gen_reload_base (base_reg, pool->label);
4816 INSN_ADDRESSES_NEW (emit_insn_after (new_insn, insn), -1);
4821 BITMAP_XFREE (far_labels);
4824 /* Recompute insn addresses. */
4826 init_insn_lengths ();
4827 shorten_branches (get_insns ());
4832 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4833 After we have decided to use this list, finish implementing
4834 all changes to the current function as required. BASE_REG is
4835 to be used as pool base register. */
4838 s390_chunkify_finish (struct constant_pool *pool_list, rtx base_reg)
4840 struct constant_pool *curr_pool = NULL;
4844 /* Replace all literal pool references. */
4846 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
4849 replace_ltrel_base (&PATTERN (insn), base_reg);
4851 curr_pool = s390_find_pool (pool_list, insn);
4855 if (GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN)
4857 rtx addr, pool_ref = NULL_RTX;
4858 find_constant_pool_ref (PATTERN (insn), &pool_ref);
4861 addr = s390_find_constant (curr_pool, get_pool_constant (pool_ref),
4862 get_pool_mode (pool_ref));
4863 addr = gen_rtx_PLUS (Pmode, base_reg, addr);
4864 replace_constant_pool_ref (&PATTERN (insn), pool_ref, addr);
4865 INSN_CODE (insn) = -1;
4870 /* Dump out all literal pools. */
4872 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4873 s390_dump_pool (curr_pool, 0);
4875 /* Free pool list. */
4879 struct constant_pool *next = pool_list->next;
4880 s390_free_pool (pool_list);
4885 /* POOL_LIST is a chunk list as prepared by s390_chunkify_start.
4886 We have decided we cannot use this list, so revert all changes
4887 to the current function that were done by s390_chunkify_start. */
4890 s390_chunkify_cancel (struct constant_pool *pool_list)
4892 struct constant_pool *curr_pool = NULL;
4895 /* Remove all pool placeholder insns. */
4897 for (curr_pool = pool_list; curr_pool; curr_pool = curr_pool->next)
4899 /* Did we insert an extra barrier? Remove it. */
4900 rtx barrier = PREV_INSN (curr_pool->pool_insn);
4901 rtx jump = barrier? PREV_INSN (barrier) : NULL_RTX;
4902 rtx label = NEXT_INSN (curr_pool->pool_insn);
4904 if (jump && GET_CODE (jump) == JUMP_INSN
4905 && barrier && GET_CODE (barrier) == BARRIER
4906 && label && GET_CODE (label) == CODE_LABEL
4907 && GET_CODE (PATTERN (jump)) == SET
4908 && SET_DEST (PATTERN (jump)) == pc_rtx
4909 && GET_CODE (SET_SRC (PATTERN (jump))) == LABEL_REF
4910 && XEXP (SET_SRC (PATTERN (jump)), 0) == label)
4913 remove_insn (barrier);
4914 remove_insn (label);
4917 remove_insn (curr_pool->pool_insn);
4920 /* Remove all base register reload insns. */
4922 for (insn = get_insns (); insn; )
4924 rtx next_insn = NEXT_INSN (insn);
4926 if (GET_CODE (insn) == INSN
4927 && GET_CODE (PATTERN (insn)) == SET
4928 && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC
4929 && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPEC_RELOAD_BASE)
4935 /* Free pool list. */
4939 struct constant_pool *next = pool_list->next;
4940 s390_free_pool (pool_list);
4946 /* Output to FILE the constant pool entry EXP in mode MODE
4947 with alignment ALIGN. */
4950 s390_output_pool_entry (FILE *file, rtx exp, enum machine_mode mode,
4955 switch (GET_MODE_CLASS (mode))
4958 if (GET_CODE (exp) != CONST_DOUBLE)
4961 REAL_VALUE_FROM_CONST_DOUBLE (r, exp);
4962 assemble_real (r, mode, align);
4966 if (GET_CODE (exp) == CONST
4967 || GET_CODE (exp) == SYMBOL_REF
4968 || GET_CODE (exp) == LABEL_REF)
4970 fputs (integer_asm_op (GET_MODE_SIZE (mode), TRUE), file);
4971 s390_output_symbolic_const (file, exp);
4976 assemble_integer (exp, GET_MODE_SIZE (mode), align, 1);
4986 /* Rework the prolog/epilog to avoid saving/restoring
4987 registers unnecessarily. BASE_USED specifies whether
4988 the literal pool base register needs to be saved,
4989 TEMP_USED specifies whether the return register needs
4993 s390_optimize_prolog (bool base_used, bool temp_used)
4995 int save_first, save_last, restore_first, restore_last;
4997 rtx insn, new_insn, next_insn;
4999 /* Recompute regs_ever_live data for special registers. */
5000 regs_ever_live[BASE_REGISTER] = base_used;
5001 regs_ever_live[RETURN_REGNUM] = temp_used;
5002 regs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5004 /* In non-leaf functions, the prolog/epilog code relies
5005 on RETURN_REGNUM being saved in any case. We also need
5006 to save the return register if __builtin_return_address (0)
5007 was used in the current function. */
5008 if (!current_function_is_leaf
5009 || cfun->machine->save_return_addr_p)
5010 regs_ever_live[RETURN_REGNUM] = 1;
5013 /* Find first and last gpr to be saved. */
5015 for (i = 6; i < 16; i++)
5016 if (regs_ever_live[i])
5018 || i == STACK_POINTER_REGNUM
5019 || i == RETURN_REGNUM
5020 || i == BASE_REGISTER
5021 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5024 for (j = 15; j > i; j--)
5025 if (regs_ever_live[j])
5027 || j == STACK_POINTER_REGNUM
5028 || j == RETURN_REGNUM
5029 || j == BASE_REGISTER
5030 || (flag_pic && j == (int)PIC_OFFSET_TABLE_REGNUM))
5035 /* Nothing to save/restore. */
5036 save_first = restore_first = -1;
5037 save_last = restore_last = -1;
5041 /* Save/restore from i to j. */
5042 save_first = restore_first = i;
5043 save_last = restore_last = j;
5046 /* Varargs functions need to save gprs 2 to 6. */
5047 if (current_function_stdarg)
5055 /* If all special registers are in fact used, there's nothing we
5056 can do, so no point in walking the insn list. */
5057 if (i <= BASE_REGISTER && j >= BASE_REGISTER
5058 && i <= RETURN_REGNUM && j >= RETURN_REGNUM)
5062 /* Search for prolog/epilog insns and replace them. */
5064 for (insn = get_insns (); insn; insn = next_insn)
5066 int first, last, off;
5067 rtx set, base, offset;
5069 next_insn = NEXT_INSN (insn);
5071 if (GET_CODE (insn) != INSN)
5073 if (GET_CODE (PATTERN (insn)) != PARALLEL)
5076 if (store_multiple_operation (PATTERN (insn), VOIDmode))
5078 set = XVECEXP (PATTERN (insn), 0, 0);
5079 first = REGNO (SET_SRC (set));
5080 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5081 offset = const0_rtx;
5082 base = eliminate_constant_term (XEXP (SET_DEST (set), 0), &offset);
5083 off = INTVAL (offset) - first * UNITS_PER_WORD;
5085 if (GET_CODE (base) != REG || off < 0)
5087 if (first > BASE_REGISTER && first > RETURN_REGNUM)
5089 if (last < BASE_REGISTER && last < RETURN_REGNUM)
5092 if (save_first != -1)
5094 new_insn = save_gprs (base, off, save_first, save_last);
5095 new_insn = emit_insn_before (new_insn, insn);
5096 INSN_ADDRESSES_NEW (new_insn, -1);
5102 if (load_multiple_operation (PATTERN (insn), VOIDmode))
5104 set = XVECEXP (PATTERN (insn), 0, 0);
5105 first = REGNO (SET_DEST (set));
5106 last = first + XVECLEN (PATTERN (insn), 0) - 1;
5107 offset = const0_rtx;
5108 base = eliminate_constant_term (XEXP (SET_SRC (set), 0), &offset);
5109 off = INTVAL (offset) - first * UNITS_PER_WORD;
5111 if (GET_CODE (base) != REG || off < 0)
5113 if (first > BASE_REGISTER && first > RETURN_REGNUM)
5115 if (last < BASE_REGISTER && last < RETURN_REGNUM)
5118 if (restore_first != -1)
5120 new_insn = restore_gprs (base, off, restore_first, restore_last);
5121 new_insn = emit_insn_before (new_insn, insn);
5122 INSN_ADDRESSES_NEW (new_insn, -1);
5130 /* Perform machine-dependent processing. */
5135 rtx temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5136 rtx base_reg = gen_rtx_REG (Pmode, BASE_REGISTER);
5137 bool temp_used = false;
5138 bool base_used = false;
5139 bool pool_overflow = false;
5141 /* Make sure all splits have been performed; splits after
5142 machine_dependent_reorg might confuse insn length counts. */
5143 split_all_insns_noflow ();
5146 /* In small leaf functions, try to use an unused call-clobbered
5147 register as base register to avoid save/restore overhead. */
5148 if (current_function_is_leaf && !regs_ever_live[5])
5149 base_reg = gen_rtx_REG (Pmode, 5);
5152 /* Install the main literal pool and the associated base
5153 register load insns.
5155 In addition, there are two problematic situations we need
5158 - the literal pool might be > 4096 bytes in size, so that
5159 some of its elements cannot be directly accessed
5161 - a branch target might be > 64K away from the branch, so that
5162 it is not possible to use a PC-relative instruction.
5164 To fix those, we split the single literal pool into multiple
5165 pool chunks, reloading the pool base register at various
5166 points throughout the function to ensure it always points to
5167 the pool chunk the following code expects, and / or replace
5168 PC-relative branches by absolute branches.
5170 However, the two problems are interdependent: splitting the
5171 literal pool can move a branch further away from its target,
5172 causing the 64K limit to overflow, and on the other hand,
5173 replacing a PC-relative branch by an absolute branch means
5174 we need to put the branch target address into the literal
5175 pool, possibly causing it to overflow.
5177 So, we loop trying to fix up both problems until we manage
5178 to satisfy both conditions at the same time. Note that the
5179 loop is guaranteed to terminate as every pass of the loop
5180 strictly decreases the total number of PC-relative branches
5181 in the function. (This is not completely true as there
5182 might be branch-over-pool insns introduced by chunkify_start.
5183 Those never need to be split however.) */
5187 struct constant_pool *pool = NULL;
5189 /* Collect the literal pool. */
5192 pool = s390_mainpool_start ();
5194 pool_overflow = true;
5197 /* If literal pool overflowed, start to chunkify it. */
5199 pool = s390_chunkify_start (base_reg);
5201 /* Split out-of-range branches. If this has created new
5202 literal pool entries, cancel current chunk list and
5204 if (s390_split_branches (temp_reg, &temp_used))
5207 s390_chunkify_cancel (pool);
5209 s390_mainpool_cancel (pool);
5214 /* If we made it up to here, both conditions are satisfied.
5215 Finish up literal pool related changes. */
5216 if ((pool_overflow || pool->size > 0)
5217 && REGNO (base_reg) == BASE_REGISTER)
5221 s390_chunkify_finish (pool, base_reg);
5223 s390_mainpool_finish (pool, base_reg);
5228 s390_optimize_prolog (base_used, temp_used);
5232 /* Return an RTL expression representing the value of the return address
5233 for the frame COUNT steps up from the current frame. FRAME is the
5234 frame pointer of that frame. */
5237 s390_return_addr_rtx (int count, rtx frame)
5241 /* For the current frame, we need to make sure the initial
5242 value of RETURN_REGNUM is actually saved. */
5245 cfun->machine->save_return_addr_p = true;
5247 /* To retrieve the return address we read the stack slot where the
5248 corresponding RETURN_REGNUM value was saved. */
5250 addr = plus_constant (frame, RETURN_REGNUM * UNITS_PER_WORD);
5251 addr = memory_address (Pmode, addr);
5252 return gen_rtx_MEM (Pmode, addr);
5255 /* Find first call clobbered register unsused in a function.
5256 This could be used as base register in a leaf function
5257 or for holding the return address before epilogue. */
5260 find_unused_clobbered_reg (void)
5263 for (i = 0; i < 6; i++)
5264 if (!regs_ever_live[i])
5269 /* Fill FRAME with info about frame of current function. */
5272 s390_frame_info (void)
5274 char gprs_ever_live[16];
5276 HOST_WIDE_INT fsize = get_frame_size ();
5278 if (fsize > 0x7fff0000)
5279 fatal_error ("Total size of local variables exceeds architecture limit.");
5281 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5282 cfun->machine->save_fprs_p = 0;
5284 for (i = 24; i < 32; i++)
5285 if (regs_ever_live[i] && !global_regs[i])
5287 cfun->machine->save_fprs_p = 1;
5291 cfun->machine->frame_size = fsize + cfun->machine->save_fprs_p * 64;
5293 /* Does function need to setup frame and save area. */
5295 if (! current_function_is_leaf
5296 || cfun->machine->frame_size > 0
5297 || current_function_calls_alloca
5298 || current_function_stdarg)
5299 cfun->machine->frame_size += STARTING_FRAME_OFFSET;
5301 /* Find first and last gpr to be saved. Note that at this point,
5302 we assume the return register and the base register always
5303 need to be saved. This is done because the usage of these
5304 register might change even after the prolog was emitted.
5305 If it turns out later that we really don't need them, the
5306 prolog/epilog code is modified again. */
5308 for (i = 0; i < 16; i++)
5309 gprs_ever_live[i] = regs_ever_live[i] && !global_regs[i];
5312 gprs_ever_live[PIC_OFFSET_TABLE_REGNUM] =
5313 regs_ever_live[PIC_OFFSET_TABLE_REGNUM];
5314 gprs_ever_live[BASE_REGISTER] = 1;
5315 gprs_ever_live[RETURN_REGNUM] = 1;
5316 gprs_ever_live[STACK_POINTER_REGNUM] = cfun->machine->frame_size > 0;
5318 for (i = 6; i < 16; i++)
5319 if (gprs_ever_live[i])
5322 for (j = 15; j > i; j--)
5323 if (gprs_ever_live[j])
5327 /* Save / Restore from gpr i to j. */
5328 cfun->machine->first_save_gpr = i;
5329 cfun->machine->first_restore_gpr = i;
5330 cfun->machine->last_save_gpr = j;
5332 /* Varargs functions need to save gprs 2 to 6. */
5333 if (current_function_stdarg)
5334 cfun->machine->first_save_gpr = 2;
5337 /* Return offset between argument pointer and frame pointer
5338 initially after prologue. */
5341 s390_arg_frame_offset (void)
5343 HOST_WIDE_INT fsize = get_frame_size ();
5346 /* fprs 8 - 15 are caller saved for 64 Bit ABI. */
5349 for (i = 24; i < 32; i++)
5350 if (regs_ever_live[i] && !global_regs[i])
5356 fsize = fsize + save_fprs_p * 64;
5358 /* Does function need to setup frame and save area. */
5360 if (! current_function_is_leaf
5362 || current_function_calls_alloca
5363 || current_function_stdarg)
5364 fsize += STARTING_FRAME_OFFSET;
5365 return fsize + STACK_POINTER_OFFSET;
5368 /* Emit insn to save fpr REGNUM at offset OFFSET relative
5369 to register BASE. Return generated insn. */
5372 save_fpr (rtx base, int offset, int regnum)
5375 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5376 set_mem_alias_set (addr, s390_sr_alias_set);
5378 return emit_move_insn (addr, gen_rtx_REG (DFmode, regnum));
5381 /* Emit insn to restore fpr REGNUM from offset OFFSET relative
5382 to register BASE. Return generated insn. */
5385 restore_fpr (rtx base, int offset, int regnum)
5388 addr = gen_rtx_MEM (DFmode, plus_constant (base, offset));
5389 set_mem_alias_set (addr, s390_sr_alias_set);
5391 return emit_move_insn (gen_rtx_REG (DFmode, regnum), addr);
5394 /* Generate insn to save registers FIRST to LAST into
5395 the register save area located at offset OFFSET
5396 relative to register BASE. */
5399 save_gprs (rtx base, int offset, int first, int last)
5401 rtx addr, insn, note;
5404 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5405 addr = gen_rtx_MEM (Pmode, addr);
5406 set_mem_alias_set (addr, s390_sr_alias_set);
5408 /* Special-case single register. */
5412 insn = gen_movdi (addr, gen_rtx_REG (Pmode, first));
5414 insn = gen_movsi (addr, gen_rtx_REG (Pmode, first));
5416 RTX_FRAME_RELATED_P (insn) = 1;
5421 insn = gen_store_multiple (addr,
5422 gen_rtx_REG (Pmode, first),
5423 GEN_INT (last - first + 1));
5426 /* We need to set the FRAME_RELATED flag on all SETs
5427 inside the store-multiple pattern.
5429 However, we must not emit DWARF records for registers 2..5
5430 if they are stored for use by variable arguments ...
5432 ??? Unfortunately, it is not enough to simply not the the
5433 FRAME_RELATED flags for those SETs, because the first SET
5434 of the PARALLEL is always treated as if it had the flag
5435 set, even if it does not. Therefore we emit a new pattern
5436 without those registers as REG_FRAME_RELATED_EXPR note. */
5440 rtx pat = PATTERN (insn);
5442 for (i = 0; i < XVECLEN (pat, 0); i++)
5443 if (GET_CODE (XVECEXP (pat, 0, i)) == SET)
5444 RTX_FRAME_RELATED_P (XVECEXP (pat, 0, i)) = 1;
5446 RTX_FRAME_RELATED_P (insn) = 1;
5450 addr = plus_constant (base, offset + 6 * UNITS_PER_WORD);
5451 note = gen_store_multiple (gen_rtx_MEM (Pmode, addr),
5452 gen_rtx_REG (Pmode, 6),
5453 GEN_INT (last - 6 + 1));
5454 note = PATTERN (note);
5457 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5458 note, REG_NOTES (insn));
5460 for (i = 0; i < XVECLEN (note, 0); i++)
5461 if (GET_CODE (XVECEXP (note, 0, i)) == SET)
5462 RTX_FRAME_RELATED_P (XVECEXP (note, 0, i)) = 1;
5464 RTX_FRAME_RELATED_P (insn) = 1;
5470 /* Generate insn to restore registers FIRST to LAST from
5471 the register save area located at offset OFFSET
5472 relative to register BASE. */
5475 restore_gprs (rtx base, int offset, int first, int last)
5479 addr = plus_constant (base, offset + first * UNITS_PER_WORD);
5480 addr = gen_rtx_MEM (Pmode, addr);
5481 set_mem_alias_set (addr, s390_sr_alias_set);
5483 /* Special-case single register. */
5487 insn = gen_movdi (gen_rtx_REG (Pmode, first), addr);
5489 insn = gen_movsi (gen_rtx_REG (Pmode, first), addr);
5494 insn = gen_load_multiple (gen_rtx_REG (Pmode, first),
5496 GEN_INT (last - first + 1));
5500 /* Emit code to load the GOT register. If MAYBE_DEAD is true,
5501 annotate generated insns with REG_MAYBE_DEAD notes. */
5503 static GTY(()) rtx got_symbol;
5505 s390_load_got (int maybe_dead)
5509 got_symbol = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
5510 SYMBOL_REF_FLAGS (got_symbol) = SYMBOL_FLAG_LOCAL;
5513 if (TARGET_CPU_ZARCH)
5515 rtx insn = emit_move_insn (pic_offset_table_rtx, got_symbol);
5517 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5524 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, got_symbol),
5525 UNSPEC_LTREL_OFFSET);
5526 offset = gen_rtx_CONST (Pmode, offset);
5527 offset = force_const_mem (Pmode, offset);
5529 insn = emit_move_insn (pic_offset_table_rtx, offset);
5531 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5534 offset = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, XEXP (offset, 0)),
5536 offset = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, offset);
5538 insn = emit_move_insn (pic_offset_table_rtx, offset);
5540 REG_NOTES(insn) = gen_rtx_EXPR_LIST (REG_MAYBE_DEAD, NULL_RTX,
5545 /* Expand the prologue into a bunch of separate insns. */
5548 s390_emit_prologue (void)
5554 /* Compute frame_info. */
5558 /* Choose best register to use for temp use within prologue.
5559 See below for why TPF must use the register 1. */
5561 if (!current_function_is_leaf
5563 temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5565 temp_reg = gen_rtx_REG (Pmode, 1);
5567 /* Save call saved gprs. */
5569 insn = save_gprs (stack_pointer_rtx, 0,
5570 cfun->machine->first_save_gpr, cfun->machine->last_save_gpr);
5573 /* Dummy insn to mark literal pool slot. */
5575 emit_insn (gen_main_pool ());
5577 /* Save fprs for variable args. */
5579 if (current_function_stdarg)
5580 for (i = 16; i < (TARGET_64BIT ? 20 : 18); i++)
5581 save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5583 /* Save fprs 4 and 6 if used (31 bit ABI). */
5586 for (i = 18; i < 20; i++)
5587 if (regs_ever_live[i] && !global_regs[i])
5589 insn = save_fpr (stack_pointer_rtx, 16*UNITS_PER_WORD + 8*(i-16), i);
5590 RTX_FRAME_RELATED_P (insn) = 1;
5593 /* Decrement stack pointer. */
5595 if (cfun->machine->frame_size > 0)
5597 rtx frame_off = GEN_INT (-cfun->machine->frame_size);
5599 /* Save incoming stack pointer into temp reg. */
5601 if (TARGET_BACKCHAIN || cfun->machine->save_fprs_p)
5603 insn = emit_insn (gen_move_insn (temp_reg, stack_pointer_rtx));
5606 /* Subtract frame size from stack pointer. */
5608 if (DISP_IN_RANGE (INTVAL (frame_off)))
5610 insn = gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5611 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5613 insn = emit_insn (insn);
5617 if (!CONST_OK_FOR_LETTER_P (INTVAL (frame_off), 'K'))
5618 frame_off = force_const_mem (Pmode, frame_off);
5620 insn = emit_insn (gen_add2_insn (stack_pointer_rtx, frame_off));
5623 RTX_FRAME_RELATED_P (insn) = 1;
5625 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5626 gen_rtx_SET (VOIDmode, stack_pointer_rtx,
5627 gen_rtx_PLUS (Pmode, stack_pointer_rtx,
5628 GEN_INT (-cfun->machine->frame_size))),
5631 /* Set backchain. */
5633 if (TARGET_BACKCHAIN)
5635 addr = gen_rtx_MEM (Pmode, stack_pointer_rtx);
5636 set_mem_alias_set (addr, s390_sr_alias_set);
5637 insn = emit_insn (gen_move_insn (addr, temp_reg));
5640 /* If we support asynchronous exceptions (e.g. for Java),
5641 we need to make sure the backchain pointer is set up
5642 before any possibly trapping memory access. */
5644 if (TARGET_BACKCHAIN && flag_non_call_exceptions)
5646 addr = gen_rtx_MEM (BLKmode, gen_rtx_SCRATCH (VOIDmode));
5647 emit_insn (gen_rtx_CLOBBER (VOIDmode, addr));
5651 /* Save fprs 8 - 15 (64 bit ABI). */
5653 if (cfun->machine->save_fprs_p)
5655 insn = emit_insn (gen_add2_insn (temp_reg, GEN_INT(-64)));
5657 for (i = 24; i < 32; i++)
5658 if (regs_ever_live[i] && !global_regs[i])
5660 rtx addr = plus_constant (stack_pointer_rtx,
5661 cfun->machine->frame_size - 64 + (i-24)*8);
5663 insn = save_fpr (temp_reg, (i-24)*8, i);
5664 RTX_FRAME_RELATED_P (insn) = 1;
5666 gen_rtx_EXPR_LIST (REG_FRAME_RELATED_EXPR,
5667 gen_rtx_SET (VOIDmode,
5668 gen_rtx_MEM (DFmode, addr),
5669 gen_rtx_REG (DFmode, i)),
5674 /* Set frame pointer, if needed. */
5676 if (frame_pointer_needed)
5678 insn = emit_move_insn (hard_frame_pointer_rtx, stack_pointer_rtx);
5679 RTX_FRAME_RELATED_P (insn) = 1;
5682 /* Set up got pointer, if needed. */
5684 if (flag_pic && regs_ever_live[PIC_OFFSET_TABLE_REGNUM])
5685 s390_load_got(true);
5689 /* Generate a BAS instruction to serve as a function
5690 entry intercept to facilitate the use of tracing
5691 algorithms located at the branch target.
5693 This must use register 1. */
5698 addr = GEN_INT (0xfe0);
5699 unkn = CONST0_RTX (SImode);
5700 link = gen_rtx_REG (Pmode, 1);
5702 emit_call_insn (gen_call_exp (gen_rtx_MEM (QImode, addr), unkn, link));
5704 /* Emit a blockage here so that all code
5705 lies between the profiling mechanisms. */
5706 emit_insn (gen_blockage ());
5710 /* Expand the epilogue into a bunch of separate insns. */
5713 s390_emit_epilogue (void)
5715 rtx frame_pointer, return_reg;
5716 int area_bottom, area_top, offset = 0;
5723 /* Generate a BAS instruction to serve as a function
5724 entry intercept to facilitate the use of tracing
5725 algorithms located at the branch target.
5727 This must use register 1. */
5733 addr = GEN_INT (0xfe6);
5734 unkn = CONST0_RTX (SImode);
5735 link = gen_rtx_REG (Pmode, 1);
5737 /* Emit a blockage here so that all code
5738 lies between the profiling mechanisms. */
5739 emit_insn (gen_blockage ());
5741 emit_call_insn (gen_call_exp (gen_rtx_MEM (QImode, addr), unkn, link));
5744 /* Check whether to use frame or stack pointer for restore. */
5746 frame_pointer = frame_pointer_needed ?
5747 hard_frame_pointer_rtx : stack_pointer_rtx;
5749 /* Compute which parts of the save area we need to access. */
5751 if (cfun->machine->first_restore_gpr != -1)
5753 area_bottom = cfun->machine->first_restore_gpr * UNITS_PER_WORD;
5754 area_top = (cfun->machine->last_save_gpr + 1) * UNITS_PER_WORD;
5758 area_bottom = INT_MAX;
5764 if (cfun->machine->save_fprs_p)
5766 if (area_bottom > -64)
5774 for (i = 18; i < 20; i++)
5775 if (regs_ever_live[i] && !global_regs[i])
5777 if (area_bottom > 16*UNITS_PER_WORD + 8*(i-16))
5778 area_bottom = 16*UNITS_PER_WORD + 8*(i-16);
5779 if (area_top < 16*UNITS_PER_WORD + 8*(i-16) + 8)
5780 area_top = 16*UNITS_PER_WORD + 8*(i-16) + 8;
5784 /* Check whether we can access the register save area.
5785 If not, increment the frame pointer as required. */
5787 if (area_top <= area_bottom)
5789 /* Nothing to restore. */
5791 else if (DISP_IN_RANGE (cfun->machine->frame_size + area_bottom)
5792 && DISP_IN_RANGE (cfun->machine->frame_size + area_top-1))
5794 /* Area is in range. */
5795 offset = cfun->machine->frame_size;
5799 rtx insn, frame_off;
5801 offset = area_bottom < 0 ? -area_bottom : 0;
5802 frame_off = GEN_INT (cfun->machine->frame_size - offset);
5804 if (DISP_IN_RANGE (INTVAL (frame_off)))
5806 insn = gen_rtx_SET (VOIDmode, frame_pointer,
5807 gen_rtx_PLUS (Pmode, frame_pointer, frame_off));
5808 insn = emit_insn (insn);
5812 if (!CONST_OK_FOR_LETTER_P (INTVAL (frame_off), 'K'))
5813 frame_off = force_const_mem (Pmode, frame_off);
5815 insn = emit_insn (gen_add2_insn (frame_pointer, frame_off));
5819 /* Restore call saved fprs. */
5823 if (cfun->machine->save_fprs_p)
5824 for (i = 24; i < 32; i++)
5825 if (regs_ever_live[i] && !global_regs[i])
5826 restore_fpr (frame_pointer,
5827 offset - 64 + (i-24) * 8, i);
5831 for (i = 18; i < 20; i++)
5832 if (regs_ever_live[i] && !global_regs[i])
5833 restore_fpr (frame_pointer,
5834 offset + 16*UNITS_PER_WORD + 8*(i-16), i);
5837 /* Return register. */
5839 return_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
5841 /* Restore call saved gprs. */
5843 if (cfun->machine->first_restore_gpr != -1)
5848 /* Check for global register and save them
5849 to stack location from where they get restored. */
5851 for (i = cfun->machine->first_restore_gpr;
5852 i <= cfun->machine->last_save_gpr;
5855 /* These registers are special and need to be
5856 restored in any case. */
5857 if (i == STACK_POINTER_REGNUM
5858 || i == RETURN_REGNUM
5859 || i == BASE_REGISTER
5860 || (flag_pic && i == (int)PIC_OFFSET_TABLE_REGNUM))
5865 addr = plus_constant (frame_pointer,
5866 offset + i * UNITS_PER_WORD);
5867 addr = gen_rtx_MEM (Pmode, addr);
5868 set_mem_alias_set (addr, s390_sr_alias_set);
5869 emit_move_insn (addr, gen_rtx_REG (Pmode, i));
5873 /* Fetch return address from stack before load multiple,
5874 this will do good for scheduling. */
5876 if (!current_function_is_leaf)
5878 int return_regnum = find_unused_clobbered_reg();
5881 return_reg = gen_rtx_REG (Pmode, return_regnum);
5883 addr = plus_constant (frame_pointer,
5884 offset + RETURN_REGNUM * UNITS_PER_WORD);
5885 addr = gen_rtx_MEM (Pmode, addr);
5886 set_mem_alias_set (addr, s390_sr_alias_set);
5887 emit_move_insn (return_reg, addr);
5890 /* ??? As references to the base register are not made
5891 explicit in insn RTX code, we have to add a barrier here
5892 to prevent incorrect scheduling. */
5894 emit_insn (gen_blockage());
5896 insn = restore_gprs (frame_pointer, offset,
5897 cfun->machine->first_restore_gpr,
5898 cfun->machine->last_save_gpr);
5902 /* Return to caller. */
5904 p = rtvec_alloc (2);
5906 RTVEC_ELT (p, 0) = gen_rtx_RETURN (VOIDmode);
5907 RTVEC_ELT (p, 1) = gen_rtx_USE (VOIDmode, return_reg);
5908 emit_jump_insn (gen_rtx_PARALLEL (VOIDmode, p));
5912 /* Return the size in bytes of a function argument of
5913 type TYPE and/or mode MODE. At least one of TYPE or
5914 MODE must be specified. */
5917 s390_function_arg_size (enum machine_mode mode, tree type)
5920 return int_size_in_bytes (type);
5922 /* No type info available for some library calls ... */
5923 if (mode != BLKmode)
5924 return GET_MODE_SIZE (mode);
5926 /* If we have neither type nor mode, abort */
5930 /* Return true if a function argument of type TYPE and mode MODE
5931 is to be passed in a floating-point register, if available. */
5934 s390_function_arg_float (enum machine_mode mode, tree type)
5936 /* Soft-float changes the ABI: no floating-point registers are used. */
5937 if (TARGET_SOFT_FLOAT)
5940 /* No type info available for some library calls ... */
5942 return mode == SFmode || mode == DFmode;
5944 /* The ABI says that record types with a single member are treated
5945 just like that member would be. */
5946 while (TREE_CODE (type) == RECORD_TYPE)
5948 tree field, single = NULL_TREE;
5950 for (field = TYPE_FIELDS (type); field; field = TREE_CHAIN (field))
5952 if (TREE_CODE (field) != FIELD_DECL)
5955 if (single == NULL_TREE)
5956 single = TREE_TYPE (field);
5961 if (single == NULL_TREE)
5967 return TREE_CODE (type) == REAL_TYPE;
5970 /* Return 1 if a function argument of type TYPE and mode MODE
5971 is to be passed by reference. The ABI specifies that only
5972 structures of size 1, 2, 4, or 8 bytes are passed by value,
5973 all other structures (and complex numbers) are passed by
5977 s390_function_arg_pass_by_reference (enum machine_mode mode, tree type)
5979 int size = s390_function_arg_size (mode, type);
5983 if (AGGREGATE_TYPE_P (type) &&
5984 size != 1 && size != 2 && size != 4 && size != 8
5985 && !s390_function_arg_float (mode, type))
5988 if (TREE_CODE (type) == COMPLEX_TYPE)
5995 /* Update the data in CUM to advance over an argument of mode MODE and
5996 data type TYPE. (TYPE is null for libcalls where that information
5997 may not be available.). The boolean NAMED specifies whether the
5998 argument is a named argument (as opposed to an unnamed argument
5999 matching an ellipsis). */
6002 s390_function_arg_advance (CUMULATIVE_ARGS *cum, enum machine_mode mode,
6003 tree type, int named ATTRIBUTE_UNUSED)
6005 if (s390_function_arg_pass_by_reference (mode, type))
6009 else if (s390_function_arg_float (mode, type))
6015 int size = s390_function_arg_size (mode, type);
6016 cum->gprs += ((size + UNITS_PER_WORD-1) / UNITS_PER_WORD);
6020 /* Define where to put the arguments to a function.
6021 Value is zero to push the argument on the stack,
6022 or a hard register in which to store the argument.
6024 MODE is the argument's machine mode.
6025 TYPE is the data type of the argument (as a tree).
6026 This is null for libcalls where that information may
6028 CUM is a variable of type CUMULATIVE_ARGS which gives info about
6029 the preceding args and about the function being called.
6030 NAMED is nonzero if this argument is a named parameter
6031 (otherwise it is an extra parameter matching an ellipsis).
6033 On S/390, we use general purpose registers 2 through 6 to
6034 pass integer, pointer, and certain structure arguments, and
6035 floating point registers 0 and 2 (0, 2, 4, and 6 on 64-bit)
6036 to pass floating point arguments. All remaining arguments
6037 are pushed to the stack. */
6040 s390_function_arg (CUMULATIVE_ARGS *cum, enum machine_mode mode, tree type,
6041 int named ATTRIBUTE_UNUSED)
6043 if (s390_function_arg_pass_by_reference (mode, type))
6046 if (s390_function_arg_float (mode, type))
6048 if (cum->fprs + 1 > (TARGET_64BIT? 4 : 2))
6051 return gen_rtx (REG, mode, cum->fprs + 16);
6055 int size = s390_function_arg_size (mode, type);
6056 int n_gprs = (size + UNITS_PER_WORD-1) / UNITS_PER_WORD;
6058 if (cum->gprs + n_gprs > 5)
6061 return gen_rtx (REG, mode, cum->gprs + 2);
6066 /* Create and return the va_list datatype.
6068 On S/390, va_list is an array type equivalent to
6070 typedef struct __va_list_tag
6074 void *__overflow_arg_area;
6075 void *__reg_save_area;
6079 where __gpr and __fpr hold the number of general purpose
6080 or floating point arguments used up to now, respectively,
6081 __overflow_arg_area points to the stack location of the
6082 next argument passed on the stack, and __reg_save_area
6083 always points to the start of the register area in the
6084 call frame of the current function. The function prologue
6085 saves all registers used for argument passing into this
6086 area if the function uses variable arguments. */
6089 s390_build_va_list (void)
6091 tree f_gpr, f_fpr, f_ovf, f_sav, record, type_decl;
6093 record = lang_hooks.types.make_type (RECORD_TYPE);
6096 build_decl (TYPE_DECL, get_identifier ("__va_list_tag"), record);
6098 f_gpr = build_decl (FIELD_DECL, get_identifier ("__gpr"),
6099 long_integer_type_node);
6100 f_fpr = build_decl (FIELD_DECL, get_identifier ("__fpr"),
6101 long_integer_type_node);
6102 f_ovf = build_decl (FIELD_DECL, get_identifier ("__overflow_arg_area"),
6104 f_sav = build_decl (FIELD_DECL, get_identifier ("__reg_save_area"),
6107 DECL_FIELD_CONTEXT (f_gpr) = record;
6108 DECL_FIELD_CONTEXT (f_fpr) = record;
6109 DECL_FIELD_CONTEXT (f_ovf) = record;
6110 DECL_FIELD_CONTEXT (f_sav) = record;
6112 TREE_CHAIN (record) = type_decl;
6113 TYPE_NAME (record) = type_decl;
6114 TYPE_FIELDS (record) = f_gpr;
6115 TREE_CHAIN (f_gpr) = f_fpr;
6116 TREE_CHAIN (f_fpr) = f_ovf;
6117 TREE_CHAIN (f_ovf) = f_sav;
6119 layout_type (record);
6121 /* The correct type is an array type of one element. */
6122 return build_array_type (record, build_index_type (size_zero_node));
6125 /* Implement va_start by filling the va_list structure VALIST.
6126 STDARG_P is always true, and ignored.
6127 NEXTARG points to the first anonymous stack argument.
6129 The following global variables are used to initialize
6130 the va_list structure:
6132 current_function_args_info:
6133 holds number of gprs and fprs used for named arguments.
6134 current_function_arg_offset_rtx:
6135 holds the offset of the first anonymous stack argument
6136 (relative to the virtual arg pointer). */
6139 s390_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED)
6141 HOST_WIDE_INT n_gpr, n_fpr;
6143 tree f_gpr, f_fpr, f_ovf, f_sav;
6144 tree gpr, fpr, ovf, sav, t;
6146 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6147 f_fpr = TREE_CHAIN (f_gpr);
6148 f_ovf = TREE_CHAIN (f_fpr);
6149 f_sav = TREE_CHAIN (f_ovf);
6151 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6152 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6153 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6154 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6155 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6157 /* Count number of gp and fp argument registers used. */
6159 n_gpr = current_function_args_info.gprs;
6160 n_fpr = current_function_args_info.fprs;
6162 t = build (MODIFY_EXPR, TREE_TYPE (gpr), gpr, build_int_2 (n_gpr, 0));
6163 TREE_SIDE_EFFECTS (t) = 1;
6164 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6166 t = build (MODIFY_EXPR, TREE_TYPE (fpr), fpr, build_int_2 (n_fpr, 0));
6167 TREE_SIDE_EFFECTS (t) = 1;
6168 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6170 /* Find the overflow area. */
6171 t = make_tree (TREE_TYPE (ovf), virtual_incoming_args_rtx);
6173 off = INTVAL (current_function_arg_offset_rtx);
6174 off = off < 0 ? 0 : off;
6175 if (TARGET_DEBUG_ARG)
6176 fprintf (stderr, "va_start: n_gpr = %d, n_fpr = %d off %d\n",
6177 (int)n_gpr, (int)n_fpr, off);
6179 t = build (PLUS_EXPR, TREE_TYPE (ovf), t, build_int_2 (off, 0));
6181 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6182 TREE_SIDE_EFFECTS (t) = 1;
6183 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6185 /* Find the register save area. */
6186 t = make_tree (TREE_TYPE (sav), virtual_incoming_args_rtx);
6187 t = build (PLUS_EXPR, TREE_TYPE (sav), t,
6188 build_int_2 (-STACK_POINTER_OFFSET, -1));
6189 t = build (MODIFY_EXPR, TREE_TYPE (sav), sav, t);
6190 TREE_SIDE_EFFECTS (t) = 1;
6191 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6194 /* Implement va_arg by updating the va_list structure
6195 VALIST as required to retrieve an argument of type
6196 TYPE, and returning that argument.
6198 Generates code equivalent to:
6200 if (integral value) {
6201 if (size <= 4 && args.gpr < 5 ||
6202 size > 4 && args.gpr < 4 )
6203 ret = args.reg_save_area[args.gpr+8]
6205 ret = *args.overflow_arg_area++;
6206 } else if (float value) {
6208 ret = args.reg_save_area[args.fpr+64]
6210 ret = *args.overflow_arg_area++;
6211 } else if (aggregate value) {
6213 ret = *args.reg_save_area[args.gpr]
6215 ret = **args.overflow_arg_area++;
6219 s390_va_arg (tree valist, tree type)
6221 tree f_gpr, f_fpr, f_ovf, f_sav;
6222 tree gpr, fpr, ovf, sav, reg, t, u;
6223 int indirect_p, size, n_reg, sav_ofs, sav_scale, max_reg;
6224 rtx lab_false, lab_over, addr_rtx, r;
6226 f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
6227 f_fpr = TREE_CHAIN (f_gpr);
6228 f_ovf = TREE_CHAIN (f_fpr);
6229 f_sav = TREE_CHAIN (f_ovf);
6231 valist = build1 (INDIRECT_REF, TREE_TYPE (TREE_TYPE (valist)), valist);
6232 gpr = build (COMPONENT_REF, TREE_TYPE (f_gpr), valist, f_gpr);
6233 fpr = build (COMPONENT_REF, TREE_TYPE (f_fpr), valist, f_fpr);
6234 ovf = build (COMPONENT_REF, TREE_TYPE (f_ovf), valist, f_ovf);
6235 sav = build (COMPONENT_REF, TREE_TYPE (f_sav), valist, f_sav);
6237 size = int_size_in_bytes (type);
6239 if (s390_function_arg_pass_by_reference (TYPE_MODE (type), type))
6241 if (TARGET_DEBUG_ARG)
6243 fprintf (stderr, "va_arg: aggregate type");
6247 /* Aggregates are passed by reference. */
6251 sav_ofs = 2 * UNITS_PER_WORD;
6252 sav_scale = UNITS_PER_WORD;
6253 size = UNITS_PER_WORD;
6256 else if (s390_function_arg_float (TYPE_MODE (type), type))
6258 if (TARGET_DEBUG_ARG)
6260 fprintf (stderr, "va_arg: float type");
6264 /* FP args go in FP registers, if present. */
6268 sav_ofs = 16 * UNITS_PER_WORD;
6270 /* TARGET_64BIT has up to 4 parameter in fprs */
6271 max_reg = TARGET_64BIT ? 3 : 1;
6275 if (TARGET_DEBUG_ARG)
6277 fprintf (stderr, "va_arg: other type");
6281 /* Otherwise into GP registers. */
6284 n_reg = (size + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
6285 sav_ofs = 2 * UNITS_PER_WORD;
6287 if (size < UNITS_PER_WORD)
6288 sav_ofs += UNITS_PER_WORD - size;
6290 sav_scale = UNITS_PER_WORD;
6297 /* Pull the value out of the saved registers ... */
6299 lab_false = gen_label_rtx ();
6300 lab_over = gen_label_rtx ();
6301 addr_rtx = gen_reg_rtx (Pmode);
6303 emit_cmp_and_jump_insns (expand_expr (reg, NULL_RTX, Pmode, EXPAND_NORMAL),
6305 GT, const1_rtx, Pmode, 0, lab_false);
6308 t = build (PLUS_EXPR, ptr_type_node, sav, build_int_2 (sav_ofs, 0));
6312 u = build (MULT_EXPR, long_integer_type_node,
6313 reg, build_int_2 (sav_scale, 0));
6314 TREE_SIDE_EFFECTS (u) = 1;
6316 t = build (PLUS_EXPR, ptr_type_node, t, u);
6317 TREE_SIDE_EFFECTS (t) = 1;
6319 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6321 emit_move_insn (addr_rtx, r);
6324 emit_jump_insn (gen_jump (lab_over));
6326 emit_label (lab_false);
6328 /* ... Otherwise out of the overflow area. */
6330 t = save_expr (ovf);
6333 /* In 64 BIT for each argument on stack, a full 64 bit slot is allocated. */
6334 if (size < UNITS_PER_WORD)
6336 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (UNITS_PER_WORD-size, 0));
6337 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6338 TREE_SIDE_EFFECTS (t) = 1;
6339 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6341 t = save_expr (ovf);
6344 r = expand_expr (t, addr_rtx, Pmode, EXPAND_NORMAL);
6346 emit_move_insn (addr_rtx, r);
6348 t = build (PLUS_EXPR, TREE_TYPE (t), t, build_int_2 (size, 0));
6349 t = build (MODIFY_EXPR, TREE_TYPE (ovf), ovf, t);
6350 TREE_SIDE_EFFECTS (t) = 1;
6351 expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
6353 emit_label (lab_over);
6355 /* If less than max_regs a registers are retrieved out
6356 of register save area, increment. */
6358 u = build (PREINCREMENT_EXPR, TREE_TYPE (reg), reg,
6359 build_int_2 (n_reg, 0));
6360 TREE_SIDE_EFFECTS (u) = 1;
6361 expand_expr (u, const0_rtx, VOIDmode, EXPAND_NORMAL);
6365 r = gen_rtx_MEM (Pmode, addr_rtx);
6366 set_mem_alias_set (r, get_varargs_alias_set ());
6367 emit_move_insn (addr_rtx, r);
6379 S390_BUILTIN_THREAD_POINTER,
6380 S390_BUILTIN_SET_THREAD_POINTER,
6385 static unsigned int const code_for_builtin_64[S390_BUILTIN_max] = {
6390 static unsigned int const code_for_builtin_31[S390_BUILTIN_max] = {
6396 s390_init_builtins (void)
6400 ftype = build_function_type (ptr_type_node, void_list_node);
6401 builtin_function ("__builtin_thread_pointer", ftype,
6402 S390_BUILTIN_THREAD_POINTER, BUILT_IN_MD,
6405 ftype = build_function_type_list (void_type_node, ptr_type_node, NULL_TREE);
6406 builtin_function ("__builtin_set_thread_pointer", ftype,
6407 S390_BUILTIN_SET_THREAD_POINTER, BUILT_IN_MD,
6411 /* Expand an expression EXP that calls a built-in function,
6412 with result going to TARGET if that's convenient
6413 (and in mode MODE if that's convenient).
6414 SUBTARGET may be used as the target for computing one of EXP's operands.
6415 IGNORE is nonzero if the value is to be ignored. */
6418 s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED,
6419 enum machine_mode mode ATTRIBUTE_UNUSED,
6420 int ignore ATTRIBUTE_UNUSED)
6424 unsigned int const *code_for_builtin =
6425 TARGET_64BIT ? code_for_builtin_64 : code_for_builtin_31;
6427 tree fndecl = TREE_OPERAND (TREE_OPERAND (exp, 0), 0);
6428 unsigned int fcode = DECL_FUNCTION_CODE (fndecl);
6429 tree arglist = TREE_OPERAND (exp, 1);
6430 enum insn_code icode;
6431 rtx op[MAX_ARGS], pat;
6435 if (fcode >= S390_BUILTIN_max)
6436 internal_error ("bad builtin fcode");
6437 icode = code_for_builtin[fcode];
6439 internal_error ("bad builtin fcode");
6441 nonvoid = TREE_TYPE (TREE_TYPE (fndecl)) != void_type_node;
6443 for (arglist = TREE_OPERAND (exp, 1), arity = 0;
6445 arglist = TREE_CHAIN (arglist), arity++)
6447 const struct insn_operand_data *insn_op;
6449 tree arg = TREE_VALUE (arglist);
6450 if (arg == error_mark_node)
6452 if (arity > MAX_ARGS)
6455 insn_op = &insn_data[icode].operand[arity + nonvoid];
6457 op[arity] = expand_expr (arg, NULL_RTX, insn_op->mode, 0);
6459 if (!(*insn_op->predicate) (op[arity], insn_op->mode))
6460 op[arity] = copy_to_mode_reg (insn_op->mode, op[arity]);
6465 enum machine_mode tmode = insn_data[icode].operand[0].mode;
6467 || GET_MODE (target) != tmode
6468 || !(*insn_data[icode].operand[0].predicate) (target, tmode))
6469 target = gen_reg_rtx (tmode);
6475 pat = GEN_FCN (icode) (target);
6479 pat = GEN_FCN (icode) (target, op[0]);
6481 pat = GEN_FCN (icode) (op[0]);
6484 pat = GEN_FCN (icode) (target, op[0], op[1]);
6500 /* Output assembly code for the trampoline template to
6503 On S/390, we use gpr 1 internally in the trampoline code;
6504 gpr 0 is used to hold the static chain. */
6507 s390_trampoline_template (FILE *file)
6511 fprintf (file, "larl\t%s,0f\n", reg_names[1]);
6512 fprintf (file, "lg\t%s,0(%s)\n", reg_names[0], reg_names[1]);
6513 fprintf (file, "lg\t%s,8(%s)\n", reg_names[1], reg_names[1]);
6514 fprintf (file, "br\t%s\n", reg_names[1]);
6515 fprintf (file, "0:\t.quad\t0\n");
6516 fprintf (file, ".quad\t0\n");
6520 fprintf (file, "basr\t%s,0\n", reg_names[1]);
6521 fprintf (file, "l\t%s,10(%s)\n", reg_names[0], reg_names[1]);
6522 fprintf (file, "l\t%s,14(%s)\n", reg_names[1], reg_names[1]);
6523 fprintf (file, "br\t%s\n", reg_names[1]);
6524 fprintf (file, ".long\t0\n");
6525 fprintf (file, ".long\t0\n");
6529 /* Emit RTL insns to initialize the variable parts of a trampoline.
6530 FNADDR is an RTX for the address of the function's pure code.
6531 CXT is an RTX for the static chain value for the function. */
6534 s390_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
6536 emit_move_insn (gen_rtx
6538 memory_address (Pmode,
6539 plus_constant (addr, (TARGET_64BIT ? 20 : 12) ))), cxt);
6540 emit_move_insn (gen_rtx
6542 memory_address (Pmode,
6543 plus_constant (addr, (TARGET_64BIT ? 28 : 16) ))), fnaddr);
6546 /* Return rtx for 64-bit constant formed from the 32-bit subwords
6547 LOW and HIGH, independent of the host word size. */
6550 s390_gen_rtx_const_DI (int high, int low)
6552 #if HOST_BITS_PER_WIDE_INT >= 64
6554 val = (HOST_WIDE_INT)high;
6556 val |= (HOST_WIDE_INT)low;
6558 return GEN_INT (val);
6560 #if HOST_BITS_PER_WIDE_INT >= 32
6561 return immed_double_const ((HOST_WIDE_INT)low, (HOST_WIDE_INT)high, DImode);
6568 /* Output assembler code to FILE to increment profiler label # LABELNO
6569 for profiling a function entry. */
6572 s390_function_profiler (FILE *file, int labelno)
6577 ASM_GENERATE_INTERNAL_LABEL (label, "LP", labelno);
6579 fprintf (file, "# function profiler \n");
6581 op[0] = gen_rtx_REG (Pmode, RETURN_REGNUM);
6582 op[1] = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM);
6583 op[1] = gen_rtx_MEM (Pmode, plus_constant (op[1], UNITS_PER_WORD));
6585 op[2] = gen_rtx_REG (Pmode, 1);
6586 op[3] = gen_rtx_SYMBOL_REF (Pmode, label);
6587 SYMBOL_REF_FLAGS (op[3]) = SYMBOL_FLAG_LOCAL;
6589 op[4] = gen_rtx_SYMBOL_REF (Pmode, "_mcount");
6592 op[4] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[4]), UNSPEC_PLT);
6593 op[4] = gen_rtx_CONST (Pmode, op[4]);
6598 output_asm_insn ("stg\t%0,%1", op);
6599 output_asm_insn ("larl\t%2,%3", op);
6600 output_asm_insn ("brasl\t%0,%4", op);
6601 output_asm_insn ("lg\t%0,%1", op);
6605 op[6] = gen_label_rtx ();
6607 output_asm_insn ("st\t%0,%1", op);
6608 output_asm_insn ("bras\t%2,%l6", op);
6609 output_asm_insn (".long\t%4", op);
6610 output_asm_insn (".long\t%3", op);
6611 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6612 output_asm_insn ("l\t%0,0(%2)", op);
6613 output_asm_insn ("l\t%2,4(%2)", op);
6614 output_asm_insn ("basr\t%0,%0", op);
6615 output_asm_insn ("l\t%0,%1", op);
6619 op[5] = gen_label_rtx ();
6620 op[6] = gen_label_rtx ();
6622 output_asm_insn ("st\t%0,%1", op);
6623 output_asm_insn ("bras\t%2,%l6", op);
6624 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[5]));
6625 output_asm_insn (".long\t%4-%l5", op);
6626 output_asm_insn (".long\t%3-%l5", op);
6627 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[6]));
6628 output_asm_insn ("lr\t%0,%2", op);
6629 output_asm_insn ("a\t%0,0(%2)", op);
6630 output_asm_insn ("a\t%2,4(%2)", op);
6631 output_asm_insn ("basr\t%0,%0", op);
6632 output_asm_insn ("l\t%0,%1", op);
6636 /* Select section for constant in constant pool. In 32-bit mode,
6637 constants go in the function section; in 64-bit mode in .rodata. */
6640 s390_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED,
6641 rtx x ATTRIBUTE_UNUSED,
6642 unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED)
6644 if (TARGET_CPU_ZARCH)
6645 readonly_data_section ();
6647 function_section (current_function_decl);
6650 /* Encode symbol attributes (local vs. global, tls model) of a SYMBOL_REF
6651 into its SYMBOL_REF_FLAGS. */
6654 s390_encode_section_info (tree decl, rtx rtl, int first)
6656 default_encode_section_info (decl, rtl, first);
6658 /* If a variable has a forced alignment to < 2 bytes, mark it with
6659 SYMBOL_FLAG_ALIGN1 to prevent it from being used as LARL operand. */
6660 if (TREE_CODE (decl) == VAR_DECL
6661 && DECL_USER_ALIGN (decl) && DECL_ALIGN (decl) < 16)
6662 SYMBOL_REF_FLAGS (XEXP (rtl, 0)) |= SYMBOL_FLAG_ALIGN1;
6665 /* Output thunk to FILE that implements a C++ virtual function call (with
6666 multiple inheritance) to FUNCTION. The thunk adjusts the this pointer
6667 by DELTA, and unless VCALL_OFFSET is zero, applies an additional adjustment
6668 stored at VCALL_OFFSET in the vtable whose address is located at offset 0
6669 relative to the resulting this pointer. */
6672 s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED,
6673 HOST_WIDE_INT delta, HOST_WIDE_INT vcall_offset,
6679 /* Operand 0 is the target function. */
6680 op[0] = XEXP (DECL_RTL (function), 0);
6681 if (flag_pic && !SYMBOL_REF_LOCAL_P (op[0]))
6684 op[0] = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op[0]),
6685 TARGET_64BIT ? UNSPEC_PLT : UNSPEC_GOT);
6686 op[0] = gen_rtx_CONST (Pmode, op[0]);
6689 /* Operand 1 is the 'this' pointer. */
6690 if (aggregate_value_p (TREE_TYPE (TREE_TYPE (function)), function))
6691 op[1] = gen_rtx_REG (Pmode, 3);
6693 op[1] = gen_rtx_REG (Pmode, 2);
6695 /* Operand 2 is the delta. */
6696 op[2] = GEN_INT (delta);
6698 /* Operand 3 is the vcall_offset. */
6699 op[3] = GEN_INT (vcall_offset);
6701 /* Operand 4 is the temporary register. */
6702 op[4] = gen_rtx_REG (Pmode, 1);
6704 /* Operands 5 to 8 can be used as labels. */
6710 /* Operand 9 can be used for temporary register. */
6713 /* Generate code. */
6716 /* Setup literal pool pointer if required. */
6717 if ((!DISP_IN_RANGE (delta)
6718 && !CONST_OK_FOR_LETTER_P (delta, 'K'))
6719 || (!DISP_IN_RANGE (vcall_offset)
6720 && !CONST_OK_FOR_LETTER_P (vcall_offset, 'K')))
6722 op[5] = gen_label_rtx ();
6723 output_asm_insn ("larl\t%4,%5", op);
6726 /* Add DELTA to this pointer. */
6729 if (CONST_OK_FOR_LETTER_P (delta, 'J'))
6730 output_asm_insn ("la\t%1,%2(%1)", op);
6731 else if (DISP_IN_RANGE (delta))
6732 output_asm_insn ("lay\t%1,%2(%1)", op);
6733 else if (CONST_OK_FOR_LETTER_P (delta, 'K'))
6734 output_asm_insn ("aghi\t%1,%2", op);
6737 op[6] = gen_label_rtx ();
6738 output_asm_insn ("agf\t%1,%6-%5(%4)", op);
6742 /* Perform vcall adjustment. */
6745 if (DISP_IN_RANGE (vcall_offset))
6747 output_asm_insn ("lg\t%4,0(%1)", op);
6748 output_asm_insn ("ag\t%1,%3(%4)", op);
6750 else if (CONST_OK_FOR_LETTER_P (vcall_offset, 'K'))
6752 output_asm_insn ("lghi\t%4,%3", op);
6753 output_asm_insn ("ag\t%4,0(%1)", op);
6754 output_asm_insn ("ag\t%1,0(%4)", op);
6758 op[7] = gen_label_rtx ();
6759 output_asm_insn ("llgf\t%4,%7-%5(%4)", op);
6760 output_asm_insn ("ag\t%4,0(%1)", op);
6761 output_asm_insn ("ag\t%1,0(%4)", op);
6765 /* Jump to target. */
6766 output_asm_insn ("jg\t%0", op);
6768 /* Output literal pool if required. */
6771 output_asm_insn (".align\t4", op);
6772 targetm.asm_out.internal_label (file, "L",
6773 CODE_LABEL_NUMBER (op[5]));
6777 targetm.asm_out.internal_label (file, "L",
6778 CODE_LABEL_NUMBER (op[6]));
6779 output_asm_insn (".long\t%2", op);
6783 targetm.asm_out.internal_label (file, "L",
6784 CODE_LABEL_NUMBER (op[7]));
6785 output_asm_insn (".long\t%3", op);
6790 /* Setup base pointer if required. */
6792 || (!DISP_IN_RANGE (delta)
6793 && !CONST_OK_FOR_LETTER_P (delta, 'K'))
6794 || (!DISP_IN_RANGE (delta)
6795 && !CONST_OK_FOR_LETTER_P (vcall_offset, 'K')))
6797 op[5] = gen_label_rtx ();
6798 output_asm_insn ("basr\t%4,0", op);
6799 targetm.asm_out.internal_label (file, "L",
6800 CODE_LABEL_NUMBER (op[5]));
6803 /* Add DELTA to this pointer. */
6806 if (CONST_OK_FOR_LETTER_P (delta, 'J'))
6807 output_asm_insn ("la\t%1,%2(%1)", op);
6808 else if (DISP_IN_RANGE (delta))
6809 output_asm_insn ("lay\t%1,%2(%1)", op);
6810 else if (CONST_OK_FOR_LETTER_P (delta, 'K'))
6811 output_asm_insn ("ahi\t%1,%2", op);
6814 op[6] = gen_label_rtx ();
6815 output_asm_insn ("a\t%1,%6-%5(%4)", op);
6819 /* Perform vcall adjustment. */
6822 if (CONST_OK_FOR_LETTER_P (vcall_offset, 'J'))
6824 output_asm_insn ("lg\t%4,0(%1)", op);
6825 output_asm_insn ("a\t%1,%3(%4)", op);
6827 else if (DISP_IN_RANGE (vcall_offset))
6829 output_asm_insn ("lg\t%4,0(%1)", op);
6830 output_asm_insn ("ay\t%1,%3(%4)", op);
6832 else if (CONST_OK_FOR_LETTER_P (vcall_offset, 'K'))
6834 output_asm_insn ("lhi\t%4,%3", op);
6835 output_asm_insn ("a\t%4,0(%1)", op);
6836 output_asm_insn ("a\t%1,0(%4)", op);
6840 op[7] = gen_label_rtx ();
6841 output_asm_insn ("l\t%4,%7-%5(%4)", op);
6842 output_asm_insn ("a\t%4,0(%1)", op);
6843 output_asm_insn ("a\t%1,0(%4)", op);
6846 /* We had to clobber the base pointer register.
6847 Re-setup the base pointer (with a different base). */
6848 op[5] = gen_label_rtx ();
6849 output_asm_insn ("basr\t%4,0", op);
6850 targetm.asm_out.internal_label (file, "L",
6851 CODE_LABEL_NUMBER (op[5]));
6854 /* Jump to target. */
6855 op[8] = gen_label_rtx ();
6858 output_asm_insn ("l\t%4,%8-%5(%4)", op);
6860 output_asm_insn ("a\t%4,%8-%5(%4)", op);
6861 /* We cannot call through .plt, since .plt requires %r12 loaded. */
6862 else if (flag_pic == 1)
6864 output_asm_insn ("a\t%4,%8-%5(%4)", op);
6865 output_asm_insn ("l\t%4,%0(%4)", op);
6867 else if (flag_pic == 2)
6869 op[9] = gen_rtx_REG (Pmode, 0);
6870 output_asm_insn ("l\t%9,%8-4-%5(%4)", op);
6871 output_asm_insn ("a\t%4,%8-%5(%4)", op);
6872 output_asm_insn ("ar\t%4,%9", op);
6873 output_asm_insn ("l\t%4,0(%4)", op);
6876 output_asm_insn ("br\t%4", op);
6878 /* Output literal pool. */
6879 output_asm_insn (".align\t4", op);
6881 if (nonlocal && flag_pic == 2)
6882 output_asm_insn (".long\t%0", op);
6885 op[0] = gen_rtx_SYMBOL_REF (Pmode, "_GLOBAL_OFFSET_TABLE_");
6886 SYMBOL_REF_FLAGS (op[0]) = SYMBOL_FLAG_LOCAL;
6889 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (op[8]));
6891 output_asm_insn (".long\t%0", op);
6893 output_asm_insn (".long\t%0-%5", op);
6897 targetm.asm_out.internal_label (file, "L",
6898 CODE_LABEL_NUMBER (op[6]));
6899 output_asm_insn (".long\t%2", op);
6903 targetm.asm_out.internal_label (file, "L",
6904 CODE_LABEL_NUMBER (op[7]));
6905 output_asm_insn (".long\t%3", op);
6911 s390_valid_pointer_mode (enum machine_mode mode)
6913 return (mode == SImode || (TARGET_64BIT && mode == DImode));
6916 /* How to allocate a 'struct machine_function'. */
6918 static struct machine_function *
6919 s390_init_machine_status (void)
6921 return ggc_alloc_cleared (sizeof (struct machine_function));
6924 #include "gt-s390.h"