1 /* GCC backend definitions for the Renesas RX processor.
2 Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
3 Contributed by Red Hat.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
22 #define TARGET_CPU_CPP_BUILTINS() \
25 builtin_define ("__RX__"); \
26 builtin_assert ("cpu=RX"); \
27 if (rx_cpu_type == RX610) \
28 builtin_assert ("machine=RX610"); \
30 builtin_assert ("machine=RX600"); \
32 if (TARGET_BIG_ENDIAN_DATA) \
33 builtin_define ("__RX_BIG_ENDIAN__"); \
35 builtin_define ("__RX_LITTLE_ENDIAN__");\
37 if (TARGET_64BIT_DOUBLES) \
38 builtin_define ("__RX_64BIT_DOUBLES__");\
40 builtin_define ("__RX_32BIT_DOUBLES__");\
42 if (ALLOW_RX_FPU_INSNS) \
43 builtin_define ("__RX_FPU_INSNS__"); \
45 if (TARGET_AS100_SYNTAX) \
46 builtin_define ("__RX_AS100_SYNTAX__"); \
48 builtin_define ("__RX_GAS_SYNTAX__"); \
59 extern enum rx_cpu_types rx_cpu_type;
63 %{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}} \
64 %{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}"
67 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
70 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
74 %{mbig-endian-data:-mbig-endian-data} \
75 %{m64bit-doubles:-m64bit-doubles} \
76 %{!m64bit-doubles:-m32bit-doubles} \
77 %{msmall-data-limit*:-msmall-data-limit} \
85 %{msim*:-lsim}%{!msim*:-lnosys} \
86 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \
88 %{!T*: %{msim*:%Trx-sim.ld}%{!msim*:%Trx.ld}} \
92 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
95 #define BITS_BIG_ENDIAN 0
96 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
97 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
99 #ifdef __RX_BIG_ENDIAN__
100 #define LIBGCC2_WORDS_BIG_ENDIAN 1
102 #define LIBGCC2_WORDS_BIG_ENDIAN 0
105 #define UNITS_PER_WORD 4
107 #define INT_TYPE_SIZE 32
108 #define LONG_TYPE_SIZE 32
109 #define LONG_LONG_TYPE_SIZE 64
111 #define FLOAT_TYPE_SIZE 32
112 #define DOUBLE_TYPE_SIZE (TARGET_64BIT_DOUBLES ? 64 : 32)
113 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
115 #ifdef __RX_32BIT_DOUBLES__
116 #define LIBGCC2_HAS_DF_MODE 0
117 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32
118 #define LIBGCC2_DOUBLE_TYPE_SIZE 32
120 #define LIBGCC2_HAS_DF_MODE 1
121 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
122 #define LIBGCC2_DOUBLE_TYPE_SIZE 64
125 #define DEFAULT_SIGNED_CHAR 0
127 #define STRICT_ALIGNMENT 1
128 #define FUNCTION_BOUNDARY 8
129 #define BIGGEST_ALIGNMENT 32
130 #define STACK_BOUNDARY 32
131 #define PARM_BOUNDARY 8
133 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) 32
135 #define STACK_GROWS_DOWNWARD 1
136 #define FRAME_GROWS_DOWNWARD 0
137 #define FIRST_PARM_OFFSET(FNDECL) 0
139 #define MAX_REGS_PER_ADDRESS 2
142 #define POINTER_SIZE 32
144 #define SIZE_TYPE "long unsigned int"
146 #define PTRDIFF_TYPE "long int"
147 #define POINTERS_EXTEND_UNSIGNED 1
148 #define FUNCTION_MODE QImode
149 #define CASE_VECTOR_MODE Pmode
150 #define WORD_REGISTER_OPERATIONS 1
151 #define HAS_LONG_COND_BRANCH 0
152 #define HAS_LONG_UNCOND_BRANCH 0
155 #define STARTING_FRAME_OFFSET 0
157 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
159 #define LEGITIMATE_CONSTANT_P(X) rx_is_legitimate_constant (X)
161 #define HANDLE_PRAGMA_PACK_PUSH_POP 1
163 #define HAVE_PRE_DECCREMENT 1
164 #define HAVE_POST_INCREMENT 1
166 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
167 #define SLOW_BYTE_ACCESS 1
169 #define STORE_FLAG_VALUE 1
170 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
171 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
175 NO_REGS, /* No registers in set. */
176 GR_REGS, /* Integer registers. */
177 ALL_REGS, /* All registers. */
178 LIM_REG_CLASSES /* Max value + 1. */
181 #define REG_CLASS_NAMES \
188 #define REG_CLASS_CONTENTS \
190 { 0x00000000 }, /* No registers, */ \
191 { 0x0000ffff }, /* Integer registers. */ \
192 { 0x0000ffff } /* All registers. */ \
195 #define IRA_COVER_CLASSES \
197 GR_REGS, LIM_REG_CLASSES \
200 #define SMALL_REGISTER_CLASSES 0
201 #define N_REG_CLASSES (int) LIM_REG_CLASSES
202 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
203 + UNITS_PER_WORD - 1) \
206 #define GENERAL_REGS GR_REGS
207 #define BASE_REG_CLASS GR_REGS
208 #define INDEX_REG_CLASS GR_REGS
210 #define FIRST_PSEUDO_REGISTER 17
212 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
215 #define STACK_POINTER_REGNUM 0
216 #define FUNC_RETURN_REGNUM 1
217 #define FRAME_POINTER_REGNUM 6
218 #define ARG_POINTER_REGNUM 7
219 #define STATIC_CHAIN_REGNUM 8
220 #define TRAMPOLINE_TEMP_REGNUM 9
221 #define STRUCT_VAL_REGNUM 15
224 /* This is the register which is used to hold the address of the start
225 of the small data area, if that feature is being used. Note - this
226 register must not be call_used because otherwise library functions
227 that are compiled without small data support might clobber it.
229 FIXME: The function gcc/config/rx/rx.c:rx_gen_move_template() has a
230 built in copy of this register's name, rather than constructing the
231 name from this #define. */
232 #define GP_BASE_REGNUM 13
234 #define ELIMINABLE_REGS \
235 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
236 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
237 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
239 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
240 (OFFSET) = rx_initial_elimination_offset ((FROM), (TO))
243 #define FUNCTION_ARG_REGNO_P(N) (((N) >= 1) && ((N) <= 4))
244 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM)
245 #define DEFAULT_PCC_STRUCT_RETURN 0
247 #define FIXED_REGISTERS \
249 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 \
252 #define CALL_USED_REGISTERS \
254 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1 \
257 #define CONDITIONAL_REGISTER_USAGE \
258 rx_conditional_register_usage ()
260 #define LIBCALL_VALUE(MODE) \
261 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
262 || GET_MODE_SIZE (MODE) >= 4) \
267 /* Order of allocation of registers. */
269 #define REG_ALLOC_ORDER \
270 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
273 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
275 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \
276 (IN_RANGE ((REGNO), (MIN), (MAX)) \
277 || (reg_renumber != NULL \
278 && reg_renumber[(REGNO)] >= (MIN) \
279 && reg_renumber[(REGNO)] <= (MAX)))
282 #define REGNO_OK_FOR_BASE_P(regno) REGNO_IN_RANGE (regno, 0, 15)
284 #define REGNO_OK_FOR_BASE_P(regno) 1
287 #define REGNO_OK_FOR_INDEX_P(regno) REGNO_OK_FOR_BASE_P (regno)
289 #define RTX_OK_FOR_BASE(X, STRICT) \
292 && REGNO_IN_RANGE (REGNO (X), 0, 15)) \
293 || (GET_CODE (X) == SUBREG \
294 && REG_P (SUBREG_REG (X)) \
295 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \
298 || (GET_CODE (X) == SUBREG \
299 && REG_P (SUBREG_REG (X))))))
301 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
304 if (rx_is_mode_dependent_addr (ADDR)) \
310 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
312 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \
315 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, stack_pointer_rtx)
317 #define ACCUMULATE_OUTGOING_ARGS 1
319 typedef unsigned int CUMULATIVE_ARGS;
321 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
325 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
326 #define TRAMPOLINE_ALIGNMENT 32
328 #define NO_PROFILE_COUNTERS 1
329 #define PROFILE_BEFORE_PROLOGUE 1
331 #define FUNCTION_PROFILER(FILE, LABELNO) \
332 fprintf (FILE, "\tbsr\t__mcount\n");
335 #define HARD_REGNO_NREGS(REGNO, MODE) CLASS_MAX_NREGS (0, MODE)
337 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
338 REGNO_REG_CLASS (REGNO) == GR_REGS
340 #define MODES_TIEABLE_P(MODE1, MODE2) \
341 ( ( GET_MODE_CLASS (MODE1) == MODE_FLOAT \
342 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
343 == ( GET_MODE_CLASS (MODE2) == MODE_FLOAT \
344 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
347 #define REGISTER_NAMES \
349 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
350 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "cc" \
353 #define ADDITIONAL_REGISTER_NAMES \
355 { "sp", STACK_POINTER_REGNUM } \
356 , { "fp", FRAME_POINTER_REGNUM } \
357 , { "arg", ARG_POINTER_REGNUM } \
358 , { "chain", STATIC_CHAIN_REGNUM } \
361 #define DATA_SECTION_ASM_OP \
362 (TARGET_AS100_SYNTAX ? "\t.SECTION D,DATA" \
363 : "\t.section D,\"aw\",@progbits\n\t.p2align 2")
365 #define SDATA_SECTION_ASM_OP \
366 (TARGET_AS100_SYNTAX ? "\t.SECTION D_2,DATA,ALIGN=2" \
367 : "\t.section D_2,\"aw\",@progbits\n\t.p2align 1")
369 #undef READONLY_DATA_SECTION_ASM_OP
370 #define READONLY_DATA_SECTION_ASM_OP \
371 (TARGET_AS100_SYNTAX ? "\t.SECTION C,ROMDATA,ALIGN=4" \
372 : "\t.section C,\"a\",@progbits\n\t.p2align 2")
374 #define BSS_SECTION_ASM_OP \
375 (TARGET_AS100_SYNTAX ? "\t.SECTION B,DATA,ALIGN=4" \
376 : "\t.section B,\"w\",@nobits\n\t.p2align 2")
378 #define SBSS_SECTION_ASM_OP \
379 (TARGET_AS100_SYNTAX ? "\t.SECTION B_2,DATA,ALIGN=2" \
380 : "\t.section B_2,\"w\",@nobits\n\t.p2align 1")
382 /* The following definitions are conditional depending upon whether the
383 compiler is being built or crtstuff.c is being compiled by the built
385 #if defined CRT_BEGIN || defined CRT_END
386 # ifdef __RX_AS100_SYNTAX
387 # define TEXT_SECTION_ASM_OP "\t.SECTION P,CODE"
388 # define CTORS_SECTION_ASM_OP "\t.SECTION init_array,CODE"
389 # define DTORS_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
390 # define INIT_ARRAY_SECTION_ASM_OP "\t.SECTION init_array,CODE"
391 # define FINI_ARRAY_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
393 # define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
394 # define CTORS_SECTION_ASM_OP \
395 "\t.section\t.init_array,\"aw\",@init_array"
396 # define DTORS_SECTION_ASM_OP \
397 "\t.section\t.fini_array,\"aw\",@fini_array"
398 # define INIT_ARRAY_SECTION_ASM_OP \
399 "\t.section\t.init_array,\"aw\",@init_array"
400 # define FINI_ARRAY_SECTION_ASM_OP \
401 "\t.section\t.fini_array,\"aw\",@fini_array"
404 # define TEXT_SECTION_ASM_OP \
405 (TARGET_AS100_SYNTAX ? "\t.SECTION P,CODE" : "\t.section P,\"ax\"")
407 # define CTORS_SECTION_ASM_OP \
408 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
409 : "\t.section\t.init_array,\"aw\",@init_array")
411 # define DTORS_SECTION_ASM_OP \
412 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
413 : "\t.section\t.fini_array,\"aw\",@fini_array")
415 # define INIT_ARRAY_SECTION_ASM_OP \
416 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
417 : "\t.section\t.init_array,\"aw\",@init_array")
419 # define FINI_ARRAY_SECTION_ASM_OP \
420 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
421 : "\t.section\t.fini_array,\"aw\",@fini_array")
424 #define GLOBAL_ASM_OP \
425 (TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
426 #define ASM_COMMENT_START " ;"
427 #define ASM_APP_ON ""
428 #define ASM_APP_OFF ""
429 #define LOCAL_LABEL_PREFIX "L"
430 #undef USER_LABEL_PREFIX
431 #define USER_LABEL_PREFIX "_"
433 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
438 if (TARGET_AS100_SYNTAX) \
441 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
443 fprintf (STREAM, "\t.ALIGN 2\n"); \
446 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
450 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
451 fprintf (FILE, TARGET_AS100_SYNTAX ? "\t.LWORD L%d\n" : "\t.long .L%d\n", \
454 /* This is how to output an element of a case-vector that is relative.
455 Note: The local label referenced by the "3b" below is emitted by
456 the tablejump insn. */
458 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
459 fprintf (FILE, TARGET_AS100_SYNTAX \
460 ? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
462 #define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
465 HOST_WIDE_INT size_ = (SIZE); \
467 /* The as100 assembler does not have an equivalent of the SVR4 \
468 .size pseudo-op. */ \
469 if (TARGET_AS100_SYNTAX) \
472 fputs (SIZE_ASM_OP, STREAM); \
473 assemble_name (STREAM, NAME); \
474 fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
478 #define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
481 /* The as100 assembler does not have an equivalent of the SVR4 \
482 .size pseudo-op. */ \
483 if (TARGET_AS100_SYNTAX) \
485 fputs (SIZE_ASM_OP, STREAM); \
486 assemble_name (STREAM, NAME); \
487 fputs (", .-", STREAM); \
488 assemble_name (STREAM, NAME); \
489 putc ('\n', STREAM); \
493 #define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
496 /* The as100 assembler does not have an equivalent of the SVR4 \
497 .size pseudo-op. */ \
498 if (TARGET_AS100_SYNTAX) \
500 fputs (TYPE_ASM_OP, STREAM); \
501 assemble_name (STREAM, NAME); \
502 fputs (", ", STREAM); \
503 fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
504 putc ('\n', STREAM); \
508 #undef ASM_GENERATE_INTERNAL_LABEL
509 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
512 sprintf (LABEL, TARGET_AS100_SYNTAX ? "*%s%u" : "*.%s%u", \
513 PREFIX, (unsigned) (NUM)); \
517 #undef ASM_OUTPUT_EXTERNAL
518 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
521 if (TARGET_AS100_SYNTAX) \
522 targetm.asm_out.globalize_label (FILE, NAME); \
523 default_elf_asm_output_external (FILE, DECL, NAME); \
527 #undef ASM_OUTPUT_ALIGNED_COMMON
528 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
531 if (TARGET_AS100_SYNTAX) \
533 fprintf ((FILE), "\t.GLB\t"); \
534 assemble_name ((FILE), (NAME)); \
535 fprintf ((FILE), "\n"); \
536 assemble_name ((FILE), (NAME)); \
537 switch ((ALIGN) / BITS_PER_UNIT) \
540 fprintf ((FILE), ":\t.BLKL\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
544 fprintf ((FILE), ":\t.BLKW\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
548 fprintf ((FILE), ":\t.BLKB\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
555 fprintf ((FILE), "%s", COMMON_ASM_OP); \
556 assemble_name ((FILE), (NAME)); \
557 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
558 (SIZE), (ALIGN) / BITS_PER_UNIT); \
564 #define SKIP_ASM_OP (TARGET_AS100_SYNTAX ? "\t.BLKB\t" : "\t.zero\t")
566 #undef ASM_OUTPUT_LIMITED_STRING
567 #define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
570 const unsigned char *_limited_str = \
571 (const unsigned char *) (STR); \
574 fprintf ((FILE), TARGET_AS100_SYNTAX \
575 ? "\t.BYTE\t\"" : "\t.string\t\""); \
577 for (; (ch = *_limited_str); _limited_str++) \
581 switch (escape = ESCAPES[ch]) \
587 fprintf ((FILE), "\\%03o", ch); \
590 putc ('\\', (FILE)); \
591 putc (escape, (FILE)); \
596 fprintf ((FILE), TARGET_AS100_SYNTAX ? "\"\n\t.BYTE\t0\n" : "\"\n");\
601 #define IDENT_ASM_OP (TARGET_AS100_SYNTAX \
602 ? "\t.END\t; Built by: ": "\t.ident\t")
604 /* For PIC put jump tables into the text section so that the offsets that
605 they contain are always computed between two same-section symbols. */
606 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
608 extern int rx_float_compare_mode;
610 /* This is a version of REG_P that also returns TRUE for SUBREGs. */
611 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
613 /* Like REG_P except that this macro is true for SET expressions. */
614 #define SET_P(rtl) (GET_CODE (rtl) == SET)
616 #define CAN_DEBUG_WITHOUT_FP 1
618 /* The AS100 assembler does not support .leb128 and .uleb128, but
619 the compiler-build-time configure tests will have enabled their
620 use because GAS supports them. So default to generating STABS
621 debug information instead of DWARF2 when generating AS100
622 compatible output. */
623 #undef PREFERRED_DEBUGGING_TYPE
624 #define PREFERRED_DEBUGGING_TYPE (TARGET_AS100_SYNTAX \
625 ? DBX_DEBUG : DWARF2_DEBUG)
627 #define INCOMING_FRAME_SP_OFFSET 4
628 #define ARG_POINTER_CFA_OFFSET(FNDECL) 4
629 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 4
631 /* Translate -nofpu into -mnofpu so that it gets passed from gcc to cc1. */
632 #define TARGET_OPTION_TRANSLATE_TABLE \
633 {"-nofpu", "-mnofpu" }
635 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
636 rx_set_optimization_options ()
638 #define TARGET_USE_FPU (! TARGET_NO_USE_FPU)
640 /* This macro is used to decide when RX FPU instructions can be used. */
641 #define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU)
643 #define BRANCH_COST(SPEED,PREDICT) 1
644 #define REGISTER_MOVE_COST(MODE,FROM,TO) 2
646 #define SELECT_CC_MODE(OP,X,Y) \
647 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CC_ZSmode : \
648 (GET_CODE (X) == PLUS || GET_CODE (X) == MINUS ? CC_ZSCmode : \
649 (GET_CODE (X) == ABS ? CC_ZSOmode : \
650 (GET_CODE (X) == AND || GET_CODE (X) == NOT || GET_CODE (X) == IOR \
651 || GET_CODE (X) == XOR || GET_CODE (X) == ROTATE \
652 || GET_CODE (X) == ROTATERT || GET_CODE (X) == ASHIFTRT \
653 || GET_CODE (X) == LSHIFTRT || GET_CODE (X) == ASHIFT ? CC_ZSmode : \