1 ;; e500 SPE description
2 ;; Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc.
3 ;; Contributed by Aldy Hernandez (aldy@quesejoda.com)
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify it
8 ;; under the terms of the GNU General Public License as published
9 ;; by the Free Software Foundation; either version 2, or (at your
10 ;; option) any later version.
12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ;; License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING. If not, write to the
19 ;; Free Software Foundation, 59 Temple Place - Suite 330, Boston,
20 ;; MA 02111-1307, USA.
34 (define_insn "*negsf2_gpr"
35 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
36 (neg:SF (match_operand:SF 1 "gpc_reg_operand" "r")))]
37 "TARGET_HARD_FLOAT && !TARGET_FPRS"
39 [(set_attr "type" "fpsimple")])
41 (define_insn "*abssf2_gpr"
42 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
43 (abs:SF (match_operand:SF 1 "gpc_reg_operand" "r")))]
44 "TARGET_HARD_FLOAT && !TARGET_FPRS"
46 [(set_attr "type" "fpsimple")])
48 (define_insn "*nabssf2_gpr"
49 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
50 (neg:SF (abs:SF (match_operand:SF 1 "gpc_reg_operand" "r"))))]
51 "TARGET_HARD_FLOAT && !TARGET_FPRS"
53 [(set_attr "type" "fpsimple")])
55 (define_insn "*addsf3_gpr"
56 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
57 (plus:SF (match_operand:SF 1 "gpc_reg_operand" "%r")
58 (match_operand:SF 2 "gpc_reg_operand" "r")))]
59 "TARGET_HARD_FLOAT && !TARGET_FPRS"
61 [(set_attr "type" "fp")])
63 (define_insn "*subsf3_gpr"
64 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
65 (minus:SF (match_operand:SF 1 "gpc_reg_operand" "r")
66 (match_operand:SF 2 "gpc_reg_operand" "r")))]
67 "TARGET_HARD_FLOAT && !TARGET_FPRS"
69 [(set_attr "type" "fp")])
71 (define_insn "*mulsf3_gpr"
72 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
73 (mult:SF (match_operand:SF 1 "gpc_reg_operand" "%r")
74 (match_operand:SF 2 "gpc_reg_operand" "r")))]
75 "TARGET_HARD_FLOAT && !TARGET_FPRS"
77 [(set_attr "type" "fp")])
79 (define_insn "*divsf3_gpr"
80 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
81 (div:SF (match_operand:SF 1 "gpc_reg_operand" "r")
82 (match_operand:SF 2 "gpc_reg_operand" "r")))]
83 "TARGET_HARD_FLOAT && !TARGET_FPRS"
85 [(set_attr "type" "vecfdiv")])
87 ;; Floating point conversion instructions.
89 (define_insn "fixuns_truncdfsi2"
90 [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
91 (unsigned_fix:SI (match_operand:DF 1 "gpc_reg_operand" "r")))]
92 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE"
94 [(set_attr "type" "fp")])
96 ;; FIXME: fix expander.
97 (define_insn "spe_extendsfdf2"
98 [(set (match_operand:DF 0 "gpc_reg_operand" "=r")
99 (float_extend:DF (match_operand:SF 1 "gpc_reg_operand" "r")))]
100 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE"
102 [(set_attr "type" "fp")])
104 (define_insn "spe_fixuns_truncsfsi2"
105 [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
106 (unsigned_fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))]
107 "TARGET_HARD_FLOAT && !TARGET_FPRS"
109 [(set_attr "type" "fp")])
111 (define_insn "spe_fix_truncsfsi2"
112 [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
113 (fix:SI (match_operand:SF 1 "gpc_reg_operand" "r")))]
114 "TARGET_HARD_FLOAT && !TARGET_FPRS"
116 [(set_attr "type" "fp")])
118 ;; FIXME: fix expander.
119 (define_insn "spe_fix_truncdfsi2"
120 [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
121 (fix:SI (match_operand:DF 1 "gpc_reg_operand" "r")))]
122 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE"
124 [(set_attr "type" "fp")])
126 (define_insn "spe_floatunssisf2"
127 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
128 (unsigned_float:SF (match_operand:SI 1 "gpc_reg_operand" "r")))]
129 "TARGET_HARD_FLOAT && !TARGET_FPRS"
131 [(set_attr "type" "fp")])
133 ;; FIXME: fix expander.
134 (define_insn "spe_floatunssidf2"
135 [(set (match_operand:DF 0 "gpc_reg_operand" "=r")
136 (unsigned_float:DF (match_operand:SI 1 "gpc_reg_operand" "r")))]
137 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE"
139 [(set_attr "type" "fp")])
141 (define_insn "spe_floatsisf2"
142 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
143 (float:SF (match_operand:SI 1 "gpc_reg_operand" "r")))]
144 "TARGET_HARD_FLOAT && !TARGET_FPRS"
146 [(set_attr "type" "fp")])
148 ;; FIXME: fix expander.
149 (define_insn "spe_floatsidf2"
150 [(set (match_operand:DF 0 "gpc_reg_operand" "=r")
151 (float:DF (match_operand:SI 1 "gpc_reg_operand" "r")))]
152 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE"
154 [(set_attr "type" "fp")])
156 ;; SPE SIMD instructions
158 (define_insn "spe_evabs"
159 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
160 (abs:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")))]
163 [(set_attr "type" "vecsimple")
164 (set_attr "length" "4")])
166 (define_insn "spe_evandc"
167 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
168 (and:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
169 (not:V2SI (match_operand:V2SI 2 "gpc_reg_operand" "r"))))]
172 [(set_attr "type" "vecsimple")
173 (set_attr "length" "4")])
175 (define_insn "spe_evand"
176 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
177 (and:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
178 (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
181 [(set_attr "type" "vecsimple")
182 (set_attr "length" "4")])
184 ;; Vector compare instructions
186 (define_insn "spe_evcmpeq"
187 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
188 (unspec:CC [(match_operand:V2SI 1 "gpc_reg_operand" "r")
189 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 500))]
192 [(set_attr "type" "veccmp")
193 (set_attr "length" "4")])
195 (define_insn "spe_evcmpgts"
196 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
197 (unspec:CC [(match_operand:V2SI 1 "gpc_reg_operand" "r")
198 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 501))]
201 [(set_attr "type" "veccmp")
202 (set_attr "length" "4")])
204 (define_insn "spe_evcmpgtu"
205 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
206 (unspec:CC [(match_operand:V2SI 1 "gpc_reg_operand" "r")
207 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 502))]
210 [(set_attr "type" "veccmp")
211 (set_attr "length" "4")])
213 (define_insn "spe_evcmplts"
214 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
215 (unspec:CC [(match_operand:V2SI 1 "gpc_reg_operand" "r")
216 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 503))]
219 [(set_attr "type" "veccmp")
220 (set_attr "length" "4")])
222 (define_insn "spe_evcmpltu"
223 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
224 (unspec:CC [(match_operand:V2SI 1 "gpc_reg_operand" "r")
225 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 504))]
228 [(set_attr "type" "veccmp")
229 (set_attr "length" "4")])
231 ;; Floating point vector compare instructions
233 (define_insn "spe_evfscmpeq"
234 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
235 (unspec:CC [(match_operand:V2SF 1 "gpc_reg_operand" "r")
236 (match_operand:V2SF 2 "gpc_reg_operand" "r")] 538))
237 (clobber (reg:SI SPEFSCR_REGNO))]
240 [(set_attr "type" "veccmp")
241 (set_attr "length" "4")])
243 (define_insn "spe_evfscmpgt"
244 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
245 (unspec:CC [(match_operand:V2SF 1 "gpc_reg_operand" "r")
246 (match_operand:V2SF 2 "gpc_reg_operand" "r")] 539))
247 (clobber (reg:SI SPEFSCR_REGNO))]
250 [(set_attr "type" "veccmp")
251 (set_attr "length" "4")])
253 (define_insn "spe_evfscmplt"
254 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
255 (unspec:CC [(match_operand:V2SF 1 "gpc_reg_operand" "r")
256 (match_operand:V2SF 2 "gpc_reg_operand" "r")] 540))
257 (clobber (reg:SI SPEFSCR_REGNO))]
260 [(set_attr "type" "veccmp")
261 (set_attr "length" "4")])
263 (define_insn "spe_evfststeq"
264 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
265 (unspec:CC [(match_operand:V2SF 1 "gpc_reg_operand" "r")
266 (match_operand:V2SF 2 "gpc_reg_operand" "r")] 541))]
269 [(set_attr "type" "veccmp")
270 (set_attr "length" "4")])
272 (define_insn "spe_evfststgt"
273 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
274 (unspec:CC [(match_operand:V2SF 1 "gpc_reg_operand" "r")
275 (match_operand:V2SF 2 "gpc_reg_operand" "r")] 542))]
278 [(set_attr "type" "veccmp")
279 (set_attr "length" "4")])
281 (define_insn "spe_evfststlt"
282 [(set (match_operand:CC 0 "cc_reg_operand" "=y")
283 (unspec:CC [(match_operand:V2SF 1 "gpc_reg_operand" "r")
284 (match_operand:V2SF 2 "gpc_reg_operand" "r")] 543))]
287 [(set_attr "type" "veccmp")
288 (set_attr "length" "4")])
290 ;; End of vector compare instructions
292 (define_insn "spe_evcntlsw"
293 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
294 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")] 505))]
297 [(set_attr "type" "vecsimple")
298 (set_attr "length" "4")])
300 (define_insn "spe_evcntlzw"
301 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
302 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")] 506))]
305 [(set_attr "type" "vecsimple")
306 (set_attr "length" "4")])
308 (define_insn "spe_eveqv"
309 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
310 (not:V2SI (xor:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
311 (match_operand:V2SI 2 "gpc_reg_operand" "r"))))]
314 [(set_attr "type" "vecsimple")
315 (set_attr "length" "4")])
317 (define_insn "spe_evextsb"
318 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
319 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")] 507))]
322 [(set_attr "type" "vecsimple")
323 (set_attr "length" "4")])
325 (define_insn "spe_evextsh"
326 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
327 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")] 508))]
330 [(set_attr "type" "vecsimple")
331 (set_attr "length" "4")])
333 (define_insn "spe_evlhhesplat"
334 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
335 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
336 (match_operand:QI 2 "immediate_operand" "i"))))
337 (unspec [(const_int 0)] 509)]
338 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
339 "evlhhesplat %0,%2*2(%1)"
340 [(set_attr "type" "vecload")
341 (set_attr "length" "4")])
343 (define_insn "spe_evlhhesplatx"
344 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
345 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
346 (match_operand:SI 2 "gpc_reg_operand" "r"))))
347 (unspec [(const_int 0)] 510)]
349 "evlhhesplatx %0,%1,%2"
350 [(set_attr "type" "vecload")
351 (set_attr "length" "4")])
353 (define_insn "spe_evlhhossplat"
354 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
355 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
356 (match_operand:QI 2 "immediate_operand" "i"))))
357 (unspec [(const_int 0)] 511)]
358 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
359 "evlhhossplat %0,%2*2(%1)"
360 [(set_attr "type" "vecload")
361 (set_attr "length" "4")])
363 (define_insn "spe_evlhhossplatx"
364 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
365 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
366 (match_operand:SI 2 "gpc_reg_operand" "r"))))
367 (unspec [(const_int 0)] 512)]
369 "evlhhossplatx %0,%1,%2"
370 [(set_attr "type" "vecload")
371 (set_attr "length" "4")])
373 (define_insn "spe_evlhhousplat"
374 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
375 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
376 (match_operand:QI 2 "immediate_operand" "i"))))
377 (unspec [(const_int 0)] 513)]
378 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
379 "evlhhousplat %0,%2*2(%1)"
380 [(set_attr "type" "vecload")
381 (set_attr "length" "4")])
383 (define_insn "spe_evlhhousplatx"
384 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
385 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
386 (match_operand:SI 2 "gpc_reg_operand" "r"))))
387 (unspec [(const_int 0)] 514)]
389 "evlhhousplatx %0,%1,%2"
390 [(set_attr "type" "vecload")
391 (set_attr "length" "4")])
393 (define_insn "spe_evlwhsplat"
394 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
395 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
396 (match_operand:QI 2 "immediate_operand" "i"))))
397 (unspec [(const_int 0)] 515)]
398 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
399 "evlwhsplat %0,%2*4(%1)"
400 [(set_attr "type" "vecload")
401 (set_attr "length" "4")])
403 (define_insn "spe_evlwhsplatx"
404 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
405 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
406 (match_operand:SI 2 "gpc_reg_operand" "r"))))
407 (unspec [(const_int 0)] 516)]
409 "evlwhsplatx %0,%1,%2"
410 [(set_attr "type" "vecload")
411 (set_attr "length" "4")])
413 (define_insn "spe_evlwwsplat"
414 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
415 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
416 (match_operand:QI 2 "immediate_operand" "i"))))
417 (unspec [(const_int 0)] 517)]
418 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
419 "evlwwsplat %0,%2*4(%1)"
420 [(set_attr "type" "vecload")
421 (set_attr "length" "4")])
423 (define_insn "spe_evlwwsplatx"
424 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
425 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
426 (match_operand:SI 2 "gpc_reg_operand" "r"))))
427 (unspec [(const_int 0)] 518)]
429 "evlwwsplatx %0,%1,%2"
430 [(set_attr "type" "vecload")
431 (set_attr "length" "4")])
433 (define_insn "spe_evmergehi"
434 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
435 (vec_merge:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
437 (match_operand:V2SI 2 "gpc_reg_operand" "r")
438 (parallel [(const_int 1)
443 [(set_attr "type" "vecsimple")
444 (set_attr "length" "4")])
446 (define_insn "spe_evmergehilo"
447 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
448 (vec_merge:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
449 (match_operand:V2SI 2 "gpc_reg_operand" "r")
452 "evmergehilo %0,%1,%2"
453 [(set_attr "type" "vecsimple")
454 (set_attr "length" "4")])
456 (define_insn "spe_evmergelo"
457 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
458 (vec_merge:V2SI (vec_select:V2SI
459 (match_operand:V2SI 1 "gpc_reg_operand" "r")
460 (parallel [(const_int 1)
462 (match_operand:V2SI 2 "gpc_reg_operand" "r")
466 [(set_attr "type" "vecsimple")
467 (set_attr "length" "4")])
469 (define_insn "spe_evmergelohi"
470 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
471 (vec_merge:V2SI (vec_select:V2SI
472 (match_operand:V2SI 1 "gpc_reg_operand" "r")
473 (parallel [(const_int 1)
476 (match_operand:V2SI 2 "gpc_reg_operand" "r")
477 (parallel [(const_int 1)
481 "evmergelohi %0,%1,%2"
482 [(set_attr "type" "vecsimple")
483 (set_attr "length" "4")])
485 (define_insn "spe_evnand"
486 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
487 (not:V2SI (and:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
488 (match_operand:V2SI 2 "gpc_reg_operand" "r"))))]
491 [(set_attr "type" "vecsimple")
492 (set_attr "length" "4")])
494 (define_insn "negv2si2"
495 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
496 (neg:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")))]
499 [(set_attr "type" "vecsimple")
500 (set_attr "length" "4")])
502 (define_insn "spe_evnor"
503 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
504 (not:V2SI (ior:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
505 (match_operand:V2SI 2 "gpc_reg_operand" "r"))))]
508 [(set_attr "type" "vecsimple")
509 (set_attr "length" "4")])
511 (define_insn "spe_evorc"
512 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
513 (ior:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
514 (not:V2SI (match_operand:V2SI 2 "gpc_reg_operand" "r"))))]
517 [(set_attr "type" "vecsimple")
518 (set_attr "length" "4")])
520 (define_insn "spe_evor"
521 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
522 (ior:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
523 (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
526 [(set_attr "type" "vecsimple")
527 (set_attr "length" "4")])
529 (define_insn "spe_evrlwi"
530 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
531 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
532 (match_operand:QI 2 "immediate_operand" "i")] 519))]
535 [(set_attr "type" "vecsimple")
536 (set_attr "length" "4")])
538 (define_insn "spe_evrlw"
539 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
540 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
541 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 520))]
544 [(set_attr "type" "veccomplex")
545 (set_attr "length" "4")])
547 (define_insn "spe_evrndw"
548 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
549 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")] 521))]
552 [(set_attr "type" "vecsimple")
553 (set_attr "length" "4")])
555 (define_insn "spe_evsel"
556 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
557 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
558 (match_operand:V2SI 2 "gpc_reg_operand" "r")
559 (match_operand:CC 3 "cc_reg_operand" "y")] 522))]
562 [(set_attr "type" "veccmp")
563 (set_attr "length" "4")])
565 (define_insn "spe_evsel_fs"
566 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
567 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "r")
568 (match_operand:V2SF 2 "gpc_reg_operand" "r")
569 (match_operand:CC 3 "cc_reg_operand" "y")] 725))]
572 [(set_attr "type" "veccmp")
573 (set_attr "length" "4")])
575 (define_insn "spe_evslwi"
576 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
577 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
578 (match_operand:QI 2 "immediate_operand" "i")]
582 [(set_attr "type" "vecsimple")
583 (set_attr "length" "4")])
585 (define_insn "spe_evslw"
586 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
587 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
588 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 524))]
591 [(set_attr "type" "vecsimple")
592 (set_attr "length" "4")])
594 (define_insn "spe_evsrwis"
595 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
596 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
597 (match_operand:QI 2 "immediate_operand" "i")]
601 [(set_attr "type" "vecsimple")
602 (set_attr "length" "4")])
604 (define_insn "spe_evsrwiu"
605 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
606 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
607 (match_operand:QI 2 "immediate_operand" "i")]
611 [(set_attr "type" "vecsimple")
612 (set_attr "length" "4")])
614 (define_insn "spe_evsrws"
615 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
616 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
617 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 527))]
620 [(set_attr "type" "vecsimple")
621 (set_attr "length" "4")])
623 (define_insn "spe_evsrwu"
624 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
625 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
626 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 528))]
629 [(set_attr "type" "vecsimple")
630 (set_attr "length" "4")])
634 (define_insn "xorv2si3"
635 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
636 (xor:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
637 (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
640 [(set_attr "type" "vecsimple")
641 (set_attr "length" "4")])
643 (define_insn "xorv4hi3"
644 [(set (match_operand:V4HI 0 "gpc_reg_operand" "=r")
645 (xor:V4HI (match_operand:V4HI 1 "gpc_reg_operand" "r")
646 (match_operand:V4HI 2 "gpc_reg_operand" "r")))]
649 [(set_attr "type" "vecsimple")
650 (set_attr "length" "4")])
652 (define_insn "xorv1di3"
653 [(set (match_operand:V1DI 0 "gpc_reg_operand" "=r")
654 (xor:V1DI (match_operand:V1DI 1 "gpc_reg_operand" "r")
655 (match_operand:V1DI 2 "gpc_reg_operand" "r")))]
658 [(set_attr "type" "vecsimple")
659 (set_attr "length" "4")])
661 ;; end of vector xors
663 (define_insn "spe_evfsabs"
664 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
665 (abs:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "r")))]
668 [(set_attr "type" "vecsimple")
669 (set_attr "length" "4")])
671 (define_insn "spe_evfsadd"
672 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
673 (plus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "r")
674 (match_operand:V2SF 2 "gpc_reg_operand" "r")))
675 (clobber (reg:SI SPEFSCR_REGNO))]
678 [(set_attr "type" "vecfloat")
679 (set_attr "length" "4")])
681 (define_insn "spe_evfscfsf"
682 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
683 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 529))]
686 [(set_attr "type" "vecfloat")
687 (set_attr "length" "4")])
689 (define_insn "spe_evfscfsi"
690 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
691 (float:V2SF (match_operand:V2SI 1 "gpc_reg_operand" "r")))]
694 [(set_attr "type" "vecfloat")
695 (set_attr "length" "4")])
697 (define_insn "spe_evfscfuf"
698 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
699 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 530))]
702 [(set_attr "type" "vecfloat")
703 (set_attr "length" "4")])
705 (define_insn "spe_evfscfui"
706 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
707 (unspec:V2SF [(match_operand:V2SI 1 "gpc_reg_operand" "r")] 701))]
710 [(set_attr "type" "vecfloat")
711 (set_attr "length" "4")])
713 (define_insn "spe_evfsctsf"
714 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
715 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 531))]
718 [(set_attr "type" "vecfloat")
719 (set_attr "length" "4")])
721 (define_insn "spe_evfsctsi"
722 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
723 (unspec:V2SI [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 532))]
726 [(set_attr "type" "vecfloat")
727 (set_attr "length" "4")])
729 (define_insn "spe_evfsctsiz"
730 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
731 (unspec:V2SI [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 533))]
734 [(set_attr "type" "vecfloat")
735 (set_attr "length" "4")])
737 (define_insn "spe_evfsctuf"
738 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
739 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 534))]
742 [(set_attr "type" "vecfloat")
743 (set_attr "length" "4")])
745 (define_insn "spe_evfsctui"
746 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
747 (unspec:V2SI [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 535))]
750 [(set_attr "type" "vecfloat")
751 (set_attr "length" "4")])
753 (define_insn "spe_evfsctuiz"
754 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
755 (unspec:V2SI [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 536))]
758 [(set_attr "type" "vecfloat")
759 (set_attr "length" "4")])
761 (define_insn "spe_evfsdiv"
762 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
763 (div:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "r")
764 (match_operand:V2SF 2 "gpc_reg_operand" "r")))
765 (clobber (reg:SI SPEFSCR_REGNO))]
768 [(set_attr "type" "vecfdiv")
769 (set_attr "length" "4")])
771 (define_insn "spe_evfsmul"
772 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
773 (mult:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "r")
774 (match_operand:V2SF 2 "gpc_reg_operand" "r")))
775 (clobber (reg:SI SPEFSCR_REGNO))]
778 [(set_attr "type" "vecfloat")
779 (set_attr "length" "4")])
781 (define_insn "spe_evfsnabs"
782 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
783 (unspec:V2SF [(match_operand:V2SF 1 "gpc_reg_operand" "r")] 537))]
786 [(set_attr "type" "vecsimple")
787 (set_attr "length" "4")])
789 (define_insn "spe_evfsneg"
790 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
791 (neg:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "r")))]
794 [(set_attr "type" "vecsimple")
795 (set_attr "length" "4")])
797 (define_insn "spe_evfssub"
798 [(set (match_operand:V2SF 0 "gpc_reg_operand" "=r")
799 (minus:V2SF (match_operand:V2SF 1 "gpc_reg_operand" "r")
800 (match_operand:V2SF 2 "gpc_reg_operand" "r")))
801 (clobber (reg:SI SPEFSCR_REGNO))]
804 [(set_attr "type" "vecfloat")
805 (set_attr "length" "4")])
807 ;; SPE SIMD load instructions.
809 ;; Only the hardware engineer who designed the SPE understands the
810 ;; plethora of load and store instructions ;-). We have no way of
811 ;; differentiating between them with RTL so use an unspec of const_int 0
812 ;; to avoid identical RTL.
814 (define_insn "spe_evldd"
815 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
816 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
817 (match_operand:QI 2 "immediate_operand" "i"))))
818 (unspec [(const_int 0)] 544)]
819 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
821 [(set_attr "type" "vecload")
822 (set_attr "length" "4")])
824 (define_insn "spe_evlddx"
825 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
826 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
827 (match_operand:SI 2 "gpc_reg_operand" "r"))))
828 (unspec [(const_int 0)] 545)]
831 [(set_attr "type" "vecload")
832 (set_attr "length" "4")])
834 (define_insn "spe_evldh"
835 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
836 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
837 (match_operand:QI 2 "immediate_operand" "i"))))
838 (unspec [(const_int 0)] 546)]
839 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
841 [(set_attr "type" "vecload")
842 (set_attr "length" "4")])
844 (define_insn "spe_evldhx"
845 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
846 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
847 (match_operand:SI 2 "gpc_reg_operand" "r"))))
848 (unspec [(const_int 0)] 547)]
851 [(set_attr "type" "vecload")
852 (set_attr "length" "4")])
854 (define_insn "spe_evldw"
855 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
856 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
857 (match_operand:QI 2 "immediate_operand" "i"))))
858 (unspec [(const_int 0)] 548)]
859 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
861 [(set_attr "type" "vecload")
862 (set_attr "length" "4")])
864 (define_insn "spe_evldwx"
865 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
866 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
867 (match_operand:SI 2 "gpc_reg_operand" "r"))))
868 (unspec [(const_int 0)] 549)]
871 [(set_attr "type" "vecload")
872 (set_attr "length" "4")])
874 (define_insn "spe_evlwhe"
875 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
876 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
877 (match_operand:QI 2 "immediate_operand" "i"))))
878 (unspec [(const_int 0)] 550)]
879 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
881 [(set_attr "type" "vecload")
882 (set_attr "length" "4")])
884 (define_insn "spe_evlwhex"
885 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
886 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
887 (match_operand:SI 2 "gpc_reg_operand" "r"))))
888 (unspec [(const_int 0)] 551)]
891 [(set_attr "type" "vecload")
892 (set_attr "length" "4")])
894 (define_insn "spe_evlwhos"
895 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
896 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
897 (match_operand:QI 2 "immediate_operand" "i"))))
898 (unspec [(const_int 0)] 552)]
899 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
900 "evlwhos %0,%2*4(%1)"
901 [(set_attr "type" "vecload")
902 (set_attr "length" "4")])
904 (define_insn "spe_evlwhosx"
905 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
906 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
907 (match_operand:SI 2 "gpc_reg_operand" "r"))))
908 (unspec [(const_int 0)] 553)]
911 [(set_attr "type" "vecload")
912 (set_attr "length" "4")])
914 (define_insn "spe_evlwhou"
915 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
916 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
917 (match_operand:QI 2 "immediate_operand" "i"))))
918 (unspec [(const_int 0)] 554)]
919 "TARGET_SPE && INTVAL (operands[2]) >= 0 && INTVAL (operands[2]) <= 31"
920 "evlwhou %0,%2*4(%1)"
921 [(set_attr "type" "vecload")
922 (set_attr "length" "4")])
924 (define_insn "spe_evlwhoux"
925 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
926 (mem:V2SI (plus:SI (match_operand:SI 1 "gpc_reg_operand" "b")
927 (match_operand:SI 2 "gpc_reg_operand" "r"))))
928 (unspec [(const_int 0)] 555)]
931 [(set_attr "type" "vecload")
932 (set_attr "length" "4")])
934 (define_insn "spe_brinc"
935 [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
936 (unspec:SI [(match_operand:SI 1 "gpc_reg_operand" "r")
937 (match_operand:SI 2 "gpc_reg_operand" "r")] 556))]
940 [(set_attr "type" "brinc")
941 (set_attr "length" "4")])
943 (define_insn "spe_evmhegsmfaa"
944 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
945 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
946 (match_operand:V2SI 2 "gpc_reg_operand" "r")
947 (reg:V2SI SPE_ACC_REGNO)] 557))
948 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
950 "evmhegsmfaa %0,%1,%2"
951 [(set_attr "type" "veccomplex")
952 (set_attr "length" "4")])
954 (define_insn "spe_evmhegsmfan"
955 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
956 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
957 (match_operand:V2SI 2 "gpc_reg_operand" "r")
958 (reg:V2SI SPE_ACC_REGNO)] 558))
959 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
961 "evmhegsmfan %0,%1,%2"
962 [(set_attr "type" "veccomplex")
963 (set_attr "length" "4")])
965 (define_insn "spe_evmhegsmiaa"
966 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
967 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
968 (match_operand:V2SI 2 "gpc_reg_operand" "r")
969 (reg:V2SI SPE_ACC_REGNO)] 559))
970 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
972 "evmhegsmiaa %0,%1,%2"
973 [(set_attr "type" "veccomplex")
974 (set_attr "length" "4")])
976 (define_insn "spe_evmhegsmian"
977 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
978 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
979 (match_operand:V2SI 2 "gpc_reg_operand" "r")
980 (reg:V2SI SPE_ACC_REGNO)] 560))
981 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
983 "evmhegsmian %0,%1,%2"
984 [(set_attr "type" "veccomplex")
985 (set_attr "length" "4")])
987 (define_insn "spe_evmhegumiaa"
988 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
989 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
990 (match_operand:V2SI 2 "gpc_reg_operand" "r")
991 (reg:V2SI SPE_ACC_REGNO)] 561))
992 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
994 "evmhegumiaa %0,%1,%2"
995 [(set_attr "type" "veccomplex")
996 (set_attr "length" "4")])
998 (define_insn "spe_evmhegumian"
999 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1000 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1001 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1002 (reg:V2SI SPE_ACC_REGNO)] 562))
1003 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1005 "evmhegumian %0,%1,%2"
1006 [(set_attr "type" "veccomplex")
1007 (set_attr "length" "4")])
1009 (define_insn "spe_evmhesmfaaw"
1010 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1011 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1012 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1013 (reg:V2SI SPE_ACC_REGNO)] 563))
1014 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1016 "evmhesmfaaw %0,%1,%2"
1017 [(set_attr "type" "veccomplex")
1018 (set_attr "length" "4")])
1020 (define_insn "spe_evmhesmfanw"
1021 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1022 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1023 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1024 (reg:V2SI SPE_ACC_REGNO)] 564))
1025 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1027 "evmhesmfanw %0,%1,%2"
1028 [(set_attr "type" "veccomplex")
1029 (set_attr "length" "4")])
1031 (define_insn "spe_evmhesmfa"
1032 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1033 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1034 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 565))
1035 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1037 "evmhesmfa %0,%1,%2"
1038 [(set_attr "type" "veccomplex")
1039 (set_attr "length" "4")])
1041 (define_insn "spe_evmhesmf"
1042 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1043 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1044 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 566))]
1047 [(set_attr "type" "veccomplex")
1048 (set_attr "length" "4")])
1050 (define_insn "spe_evmhesmiaaw"
1051 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1052 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1053 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1054 (reg:V2SI SPE_ACC_REGNO)] 567))
1055 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1057 "evmhesmiaaw %0,%1,%2"
1058 [(set_attr "type" "veccomplex")
1059 (set_attr "length" "4")])
1061 (define_insn "spe_evmhesmianw"
1062 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1063 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1064 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1065 (reg:V2SI SPE_ACC_REGNO)] 568))
1066 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1068 "evmhesmianw %0,%1,%2"
1069 [(set_attr "type" "veccomplex")
1070 (set_attr "length" "4")])
1072 (define_insn "spe_evmhesmia"
1073 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1074 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1075 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 569))
1076 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1078 "evmhesmia %0,%1,%2"
1079 [(set_attr "type" "veccomplex")
1080 (set_attr "length" "4")])
1082 (define_insn "spe_evmhesmi"
1083 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1084 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1085 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 570))]
1088 [(set_attr "type" "veccomplex")
1089 (set_attr "length" "4")])
1091 (define_insn "spe_evmhessfaaw"
1092 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1093 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1094 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1095 (reg:V2SI SPE_ACC_REGNO)] 571))
1096 (clobber (reg:SI SPEFSCR_REGNO))
1097 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1099 "evmhessfaaw %0,%1,%2"
1100 [(set_attr "type" "veccomplex")
1101 (set_attr "length" "4")])
1103 (define_insn "spe_evmhessfanw"
1104 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1105 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1106 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1107 (reg:V2SI SPE_ACC_REGNO)] 572))
1108 (clobber (reg:SI SPEFSCR_REGNO))
1109 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1111 "evmhessfanw %0,%1,%2"
1112 [(set_attr "type" "veccomplex")
1113 (set_attr "length" "4")])
1115 (define_insn "spe_evmhessfa"
1116 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1117 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1118 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 573))
1119 (clobber (reg:SI SPEFSCR_REGNO))
1120 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1122 "evmhessfa %0,%1,%2"
1123 [(set_attr "type" "veccomplex")
1124 (set_attr "length" "4")])
1126 (define_insn "spe_evmhessf"
1127 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1128 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1129 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 574))
1130 (clobber (reg:SI SPEFSCR_REGNO))]
1133 [(set_attr "type" "veccomplex")
1134 (set_attr "length" "4")])
1136 (define_insn "spe_evmhessiaaw"
1137 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1138 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1139 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1140 (reg:V2SI SPE_ACC_REGNO)] 575))
1141 (clobber (reg:SI SPEFSCR_REGNO))
1142 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1144 "evmhessiaaw %0,%1,%2"
1145 [(set_attr "type" "veccomplex")
1146 (set_attr "length" "4")])
1148 (define_insn "spe_evmhessianw"
1149 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1150 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1151 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1152 (reg:V2SI SPE_ACC_REGNO)] 576))
1153 (clobber (reg:SI SPEFSCR_REGNO))
1154 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1156 "evmhessianw %0,%1,%2"
1157 [(set_attr "type" "veccomplex")
1158 (set_attr "length" "4")])
1160 (define_insn "spe_evmheumiaaw"
1161 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1162 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1163 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1164 (reg:V2SI SPE_ACC_REGNO)] 577))
1165 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1167 "evmheumiaaw %0,%1,%2"
1168 [(set_attr "type" "veccomplex")
1169 (set_attr "length" "4")])
1171 (define_insn "spe_evmheumianw"
1172 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1173 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1174 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1175 (reg:V2SI SPE_ACC_REGNO)] 578))
1176 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1178 "evmheumianw %0,%1,%2"
1179 [(set_attr "type" "veccomplex")
1180 (set_attr "length" "4")])
1182 (define_insn "spe_evmheumia"
1183 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1184 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1185 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 579))
1186 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1188 "evmheumia %0,%1,%2"
1189 [(set_attr "type" "veccomplex")
1190 (set_attr "length" "4")])
1192 (define_insn "spe_evmheumi"
1193 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1194 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1195 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 580))]
1198 [(set_attr "type" "veccomplex")
1199 (set_attr "length" "4")])
1201 (define_insn "spe_evmheusiaaw"
1202 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1203 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1204 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1205 (reg:V2SI SPE_ACC_REGNO)] 581))
1206 (clobber (reg:SI SPEFSCR_REGNO))
1207 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1209 "evmheusiaaw %0,%1,%2"
1210 [(set_attr "type" "veccomplex")
1211 (set_attr "length" "4")])
1213 (define_insn "spe_evmheusianw"
1214 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1215 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1216 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1217 (reg:V2SI SPE_ACC_REGNO)] 582))
1218 (clobber (reg:SI SPEFSCR_REGNO))
1219 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1221 "evmheusianw %0,%1,%2"
1222 [(set_attr "type" "veccomplex")
1223 (set_attr "length" "4")])
1225 (define_insn "spe_evmhogsmfaa"
1226 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1227 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1228 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1229 (reg:V2SI SPE_ACC_REGNO)] 583))
1230 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1232 "evmhogsmfaa %0,%1,%2"
1233 [(set_attr "type" "veccomplex")
1234 (set_attr "length" "4")])
1236 (define_insn "spe_evmhogsmfan"
1237 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1238 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1239 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1240 (reg:V2SI SPE_ACC_REGNO)] 584))
1241 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1243 "evmhogsmfan %0,%1,%2"
1244 [(set_attr "type" "veccomplex")
1245 (set_attr "length" "4")])
1247 (define_insn "spe_evmhogsmiaa"
1248 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1249 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1250 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1251 (reg:V2SI SPE_ACC_REGNO)] 585))
1252 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1254 "evmhogsmiaa %0,%1,%2"
1255 [(set_attr "type" "veccomplex")
1256 (set_attr "length" "4")])
1258 (define_insn "spe_evmhogsmian"
1259 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1260 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1261 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1262 (reg:V2SI SPE_ACC_REGNO)] 586))
1263 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1265 "evmhogsmian %0,%1,%2"
1266 [(set_attr "type" "veccomplex")
1267 (set_attr "length" "4")])
1269 (define_insn "spe_evmhogumiaa"
1270 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1271 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1272 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1273 (reg:V2SI SPE_ACC_REGNO)] 587))
1274 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1276 "evmhogumiaa %0,%1,%2"
1277 [(set_attr "type" "veccomplex")
1278 (set_attr "length" "4")])
1280 (define_insn "spe_evmhogumian"
1281 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1282 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1283 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1284 (reg:V2SI SPE_ACC_REGNO)] 588))
1285 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1287 "evmhogumian %0,%1,%2"
1288 [(set_attr "type" "veccomplex")
1289 (set_attr "length" "4")])
1291 (define_insn "spe_evmhosmfaaw"
1292 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1293 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1294 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1295 (reg:V2SI SPE_ACC_REGNO)] 589))
1296 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1298 "evmhosmfaaw %0,%1,%2"
1299 [(set_attr "type" "veccomplex")
1300 (set_attr "length" "4")])
1302 (define_insn "spe_evmhosmfanw"
1303 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1304 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1305 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1306 (reg:V2SI SPE_ACC_REGNO)] 590))
1307 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1309 "evmhosmfanw %0,%1,%2"
1310 [(set_attr "type" "veccomplex")
1311 (set_attr "length" "4")])
1313 (define_insn "spe_evmhosmfa"
1314 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1315 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1316 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 591))]
1318 "evmhosmfa %0,%1,%2"
1319 [(set_attr "type" "veccomplex")
1320 (set_attr "length" "4")])
1322 (define_insn "spe_evmhosmf"
1323 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1324 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1325 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 592))
1326 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1329 [(set_attr "type" "veccomplex")
1330 (set_attr "length" "4")])
1332 (define_insn "spe_evmhosmiaaw"
1333 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1334 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1335 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1336 (reg:V2SI SPE_ACC_REGNO)] 593))
1337 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1339 "evmhosmiaaw %0,%1,%2"
1340 [(set_attr "type" "veccomplex")
1341 (set_attr "length" "4")])
1343 (define_insn "spe_evmhosmianw"
1344 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1345 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1346 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1347 (reg:V2SI SPE_ACC_REGNO)] 594))
1348 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1350 "evmhosmianw %0,%1,%2"
1351 [(set_attr "type" "veccomplex")
1352 (set_attr "length" "4")])
1354 (define_insn "spe_evmhosmia"
1355 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1356 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1357 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 595))
1358 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1360 "evmhosmia %0,%1,%2"
1361 [(set_attr "type" "veccomplex")
1362 (set_attr "length" "4")])
1364 (define_insn "spe_evmhosmi"
1365 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1366 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1367 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 596))]
1370 [(set_attr "type" "veccomplex")
1371 (set_attr "length" "4")])
1373 (define_insn "spe_evmhossfaaw"
1374 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1375 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1376 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1377 (reg:V2SI SPE_ACC_REGNO)] 597))
1378 (clobber (reg:SI SPEFSCR_REGNO))
1379 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1381 "evmhossfaaw %0,%1,%2"
1382 [(set_attr "type" "veccomplex")
1383 (set_attr "length" "4")])
1385 (define_insn "spe_evmhossfanw"
1386 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1387 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1388 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1389 (reg:V2SI SPE_ACC_REGNO)] 598))
1390 (clobber (reg:SI SPEFSCR_REGNO))
1391 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1393 "evmhossfanw %0,%1,%2"
1394 [(set_attr "type" "veccomplex")
1395 (set_attr "length" "4")])
1397 (define_insn "spe_evmhossfa"
1398 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1399 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1400 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1401 (reg:V2SI SPE_ACC_REGNO)] 599))
1402 (clobber (reg:SI SPEFSCR_REGNO))
1403 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1405 "evmhossfa %0,%1,%2"
1406 [(set_attr "type" "veccomplex")
1407 (set_attr "length" "4")])
1409 (define_insn "spe_evmhossf"
1410 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1411 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1412 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 600))
1413 (clobber (reg:SI SPEFSCR_REGNO))]
1416 [(set_attr "type" "veccomplex")
1417 (set_attr "length" "4")])
1419 (define_insn "spe_evmhossiaaw"
1420 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1421 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1422 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1423 (reg:V2SI SPE_ACC_REGNO)] 601))
1424 (clobber (reg:SI SPEFSCR_REGNO))
1425 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1427 "evmhossiaaw %0,%1,%2"
1428 [(set_attr "type" "veccomplex")
1429 (set_attr "length" "4")])
1431 (define_insn "spe_evmhossianw"
1432 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1433 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1434 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1435 (reg:V2SI SPE_ACC_REGNO)] 602))
1436 (clobber (reg:SI SPEFSCR_REGNO))
1437 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1439 "evmhossianw %0,%1,%2"
1440 [(set_attr "type" "veccomplex")
1441 (set_attr "length" "4")])
1443 (define_insn "spe_evmhoumiaaw"
1444 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1445 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1446 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1447 (reg:V2SI SPE_ACC_REGNO)] 603))
1448 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1450 "evmhoumiaaw %0,%1,%2"
1451 [(set_attr "type" "veccomplex")
1452 (set_attr "length" "4")])
1454 (define_insn "spe_evmhoumianw"
1455 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1456 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1457 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1458 (reg:V2SI SPE_ACC_REGNO)] 604))
1459 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1461 "evmhoumianw %0,%1,%2"
1462 [(set_attr "type" "veccomplex")
1463 (set_attr "length" "4")])
1465 (define_insn "spe_evmhoumia"
1466 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1467 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1468 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 605))
1469 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1471 "evmhoumia %0,%1,%2"
1472 [(set_attr "type" "veccomplex")
1473 (set_attr "length" "4")])
1475 (define_insn "spe_evmhoumi"
1476 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1477 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1478 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 606))]
1481 [(set_attr "type" "veccomplex")
1482 (set_attr "length" "4")])
1484 (define_insn "spe_evmhousiaaw"
1485 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1486 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1487 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1488 (reg:V2SI SPE_ACC_REGNO)] 607))
1489 (clobber (reg:SI SPEFSCR_REGNO))
1490 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1492 "evmhousiaaw %0,%1,%2"
1493 [(set_attr "type" "veccomplex")
1494 (set_attr "length" "4")])
1496 (define_insn "spe_evmhousianw"
1497 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1498 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1499 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1500 (reg:V2SI SPE_ACC_REGNO)] 608))
1501 (clobber (reg:SI SPEFSCR_REGNO))
1502 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1504 "evmhousianw %0,%1,%2"
1505 [(set_attr "type" "veccomplex")
1506 (set_attr "length" "4")])
1508 (define_insn "spe_evmmlssfa"
1509 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1510 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1511 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 609))]
1513 "evmmlssfa %0,%1,%2"
1514 [(set_attr "type" "veccomplex")
1515 (set_attr "length" "4")])
1517 (define_insn "spe_evmmlssf"
1518 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1519 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1520 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 610))]
1523 [(set_attr "type" "veccomplex")
1524 (set_attr "length" "4")])
1526 (define_insn "spe_evmwhsmfa"
1527 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1528 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1529 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 611))
1530 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1532 "evmwhsmfa %0,%1,%2"
1533 [(set_attr "type" "veccomplex")
1534 (set_attr "length" "4")])
1536 (define_insn "spe_evmwhsmf"
1537 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1538 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1539 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 612))]
1542 [(set_attr "type" "veccomplex")
1543 (set_attr "length" "4")])
1545 (define_insn "spe_evmwhsmia"
1546 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1547 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1548 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 613))
1549 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1551 "evmwhsmia %0,%1,%2"
1552 [(set_attr "type" "veccomplex")
1553 (set_attr "length" "4")])
1555 (define_insn "spe_evmwhsmi"
1556 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1557 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1558 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 614))]
1561 [(set_attr "type" "veccomplex")
1562 (set_attr "length" "4")])
1564 (define_insn "spe_evmwhssfa"
1565 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1566 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1567 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 615))
1568 (clobber (reg:SI SPEFSCR_REGNO))
1569 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1571 "evmwhssfa %0,%1,%2"
1572 [(set_attr "type" "veccomplex")
1573 (set_attr "length" "4")])
1575 (define_insn "spe_evmwhusian"
1576 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1577 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1578 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 626))]
1580 "evmwhusian %0,%1,%2"
1581 [(set_attr "type" "veccomplex")
1582 (set_attr "length" "4")])
1584 (define_insn "spe_evmwhssf"
1585 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1586 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1587 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 628))
1588 (clobber (reg:SI SPEFSCR_REGNO))]
1591 [(set_attr "type" "veccomplex")
1592 (set_attr "length" "4")])
1594 (define_insn "spe_evmwhumia"
1595 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1596 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1597 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 629))
1598 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1600 "evmwhumia %0,%1,%2"
1601 [(set_attr "type" "veccomplex")
1602 (set_attr "length" "4")])
1604 (define_insn "spe_evmwhumi"
1605 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1606 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1607 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 630))]
1610 [(set_attr "type" "veccomplex")
1611 (set_attr "length" "4")])
1613 (define_insn "spe_evmwlsmiaaw"
1614 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1615 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1616 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1617 (reg:V2SI SPE_ACC_REGNO)] 635))
1618 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1620 "evmwlsmiaaw %0,%1,%2"
1621 [(set_attr "type" "veccomplex")
1622 (set_attr "length" "4")])
1624 (define_insn "spe_evmwlsmianw"
1625 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1626 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1627 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1628 (reg:V2SI SPE_ACC_REGNO)] 636))
1629 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1631 "evmwlsmianw %0,%1,%2"
1632 [(set_attr "type" "veccomplex")
1633 (set_attr "length" "4")])
1635 (define_insn "spe_evmwlssiaaw"
1636 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1637 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1638 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1639 (reg:V2SI SPE_ACC_REGNO)] 641))
1640 (clobber (reg:SI SPEFSCR_REGNO))
1641 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1643 "evmwlssiaaw %0,%1,%2"
1644 [(set_attr "type" "veccomplex")
1645 (set_attr "length" "4")])
1647 (define_insn "spe_evmwlssianw"
1648 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1649 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1650 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1651 (reg:V2SI SPE_ACC_REGNO)] 642))
1652 (clobber (reg:SI SPEFSCR_REGNO))
1653 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1655 "evmwlssianw %0,%1,%2"
1656 [(set_attr "type" "veccomplex")
1657 (set_attr "length" "4")])
1659 (define_insn "spe_evmwlumiaaw"
1660 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1661 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1662 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1663 (reg:V2SI SPE_ACC_REGNO)] 643))
1664 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1666 "evmwlumiaaw %0,%1,%2"
1667 [(set_attr "type" "veccomplex")
1668 (set_attr "length" "4")])
1670 (define_insn "spe_evmwlumianw"
1671 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1672 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1673 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1674 (reg:V2SI SPE_ACC_REGNO)] 644))
1675 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1677 "evmwlumianw %0,%1,%2"
1678 [(set_attr "type" "veccomplex")
1679 (set_attr "length" "4")])
1681 (define_insn "spe_evmwlumia"
1682 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1683 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1684 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 645))
1685 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1687 "evmwlumia %0,%1,%2"
1688 [(set_attr "type" "veccomplex")
1689 (set_attr "length" "4")])
1691 (define_insn "spe_evmwlumi"
1692 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1693 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1694 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 646))]
1697 [(set_attr "type" "veccomplex")
1698 (set_attr "length" "4")])
1700 (define_insn "spe_evmwlusiaaw"
1701 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1702 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1703 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1704 (reg:V2SI SPE_ACC_REGNO)] 647))
1705 (clobber (reg:SI SPEFSCR_REGNO))
1706 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1708 "evmwlusiaaw %0,%1,%2"
1709 [(set_attr "type" "veccomplex")
1710 (set_attr "length" "4")])
1712 (define_insn "spe_evmwlusianw"
1713 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1714 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1715 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1716 (reg:V2SI SPE_ACC_REGNO)] 648))
1717 (clobber (reg:SI SPEFSCR_REGNO))
1718 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1720 "evmwlusianw %0,%1,%2"
1721 [(set_attr "type" "veccomplex")
1722 (set_attr "length" "4")])
1724 (define_insn "spe_evmwsmfaa"
1725 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1726 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1727 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1728 (reg:V2SI SPE_ACC_REGNO)] 649))
1729 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1731 "evmwsmfaa %0,%1,%2"
1732 [(set_attr "type" "veccomplex")
1733 (set_attr "length" "4")])
1735 (define_insn "spe_evmwsmfan"
1736 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1737 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1738 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1739 (reg:V2SI SPE_ACC_REGNO)] 650))
1740 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1742 "evmwsmfan %0,%1,%2"
1743 [(set_attr "type" "veccomplex")
1744 (set_attr "length" "4")])
1746 (define_insn "spe_evmwsmfa"
1747 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1748 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1749 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 651))
1750 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1753 [(set_attr "type" "veccomplex")
1754 (set_attr "length" "4")])
1756 (define_insn "spe_evmwsmf"
1757 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1758 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1759 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 652))]
1762 [(set_attr "type" "veccomplex")
1763 (set_attr "length" "4")])
1765 (define_insn "spe_evmwsmiaa"
1766 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1767 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1768 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1769 (reg:V2SI SPE_ACC_REGNO)] 653))
1770 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1772 "evmwsmiaa %0,%1,%2"
1773 [(set_attr "type" "veccomplex")
1774 (set_attr "length" "4")])
1776 (define_insn "spe_evmwsmian"
1777 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1778 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1779 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1780 (reg:V2SI SPE_ACC_REGNO)] 654))
1781 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1783 "evmwsmian %0,%1,%2"
1784 [(set_attr "type" "veccomplex")
1785 (set_attr "length" "4")])
1787 (define_insn "spe_evmwsmia"
1788 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1789 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1790 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 655))
1791 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1794 [(set_attr "type" "veccomplex")
1795 (set_attr "length" "4")])
1797 (define_insn "spe_evmwsmi"
1798 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1799 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1800 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 656))]
1803 [(set_attr "type" "veccomplex")
1804 (set_attr "length" "4")])
1806 (define_insn "spe_evmwssfaa"
1807 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1808 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1809 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1810 (reg:V2SI SPE_ACC_REGNO)] 657))
1811 (clobber (reg:SI SPEFSCR_REGNO))
1812 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1814 "evmwssfaa %0,%1,%2"
1815 [(set_attr "type" "veccomplex")
1816 (set_attr "length" "4")])
1818 (define_insn "spe_evmwssfan"
1819 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1820 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1821 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1822 (reg:V2SI SPE_ACC_REGNO)] 658))
1823 (clobber (reg:SI SPEFSCR_REGNO))
1824 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1826 "evmwssfan %0,%1,%2"
1827 [(set_attr "type" "veccomplex")
1828 (set_attr "length" "4")])
1830 (define_insn "spe_evmwssfa"
1831 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1832 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1833 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 659))
1834 (clobber (reg:SI SPEFSCR_REGNO))
1835 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1838 [(set_attr "type" "veccomplex")
1839 (set_attr "length" "4")])
1841 (define_insn "spe_evmwssf"
1842 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1843 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1844 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 660))
1845 (clobber (reg:SI SPEFSCR_REGNO))]
1848 [(set_attr "type" "veccomplex")
1849 (set_attr "length" "4")])
1851 (define_insn "spe_evmwumiaa"
1852 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1853 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1854 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1855 (reg:V2SI SPE_ACC_REGNO)] 661))
1856 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1858 "evmwumiaa %0,%1,%2"
1859 [(set_attr "type" "veccomplex")
1860 (set_attr "length" "4")])
1862 (define_insn "spe_evmwumian"
1863 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1864 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1865 (match_operand:V2SI 2 "gpc_reg_operand" "r")
1866 (reg:V2SI SPE_ACC_REGNO)] 662))
1867 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1869 "evmwumian %0,%1,%2"
1870 [(set_attr "type" "veccomplex")
1871 (set_attr "length" "4")])
1873 (define_insn "spe_evmwumia"
1874 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1875 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1876 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 663))
1877 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1880 [(set_attr "type" "veccomplex")
1881 (set_attr "length" "4")])
1883 (define_insn "spe_evmwumi"
1884 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1885 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1886 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 664))]
1889 [(set_attr "type" "veccomplex")
1890 (set_attr "length" "4")])
1892 (define_insn "spe_evaddw"
1893 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1894 (plus:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
1895 (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
1898 [(set_attr "type" "vecsimple")
1899 (set_attr "length" "4")])
1901 (define_insn "spe_evaddusiaaw"
1902 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1903 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1904 (reg:V2SI SPE_ACC_REGNO)] 673))
1905 (clobber (reg:SI SPEFSCR_REGNO))
1906 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1909 [(set_attr "type" "veccomplex")
1910 (set_attr "length" "4")])
1912 (define_insn "spe_evaddumiaaw"
1913 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1914 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1915 (reg:V2SI SPE_ACC_REGNO)] 674))
1916 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1919 [(set_attr "type" "veccomplex")
1920 (set_attr "length" "4")])
1922 (define_insn "spe_evaddssiaaw"
1923 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1924 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1925 (reg:V2SI SPE_ACC_REGNO)] 675))
1926 (clobber (reg:SI SPEFSCR_REGNO))
1927 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1930 [(set_attr "type" "veccomplex")
1931 (set_attr "length" "4")])
1933 (define_insn "spe_evaddsmiaaw"
1934 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1935 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1936 (reg:V2SI SPE_ACC_REGNO)] 676))
1937 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1940 [(set_attr "type" "veccomplex")
1941 (set_attr "length" "4")])
1943 (define_insn "spe_evaddiw"
1944 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1945 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1946 (match_operand:QI 2 "immediate_operand" "i")] 677))]
1949 [(set_attr "type" "vecsimple")
1950 (set_attr "length" "4")])
1952 (define_insn "spe_evsubifw"
1953 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1954 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1955 (match_operand:QI 2 "immediate_operand" "i")] 678))]
1958 [(set_attr "type" "veccomplex")
1959 (set_attr "length" "4")])
1961 (define_insn "spe_evsubfw"
1962 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1963 (minus:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
1964 (match_operand:V2SI 2 "gpc_reg_operand" "r")))]
1967 [(set_attr "type" "veccomplex")
1968 (set_attr "length" "4")])
1970 (define_insn "spe_evsubfusiaaw"
1971 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1972 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1973 (reg:V2SI SPE_ACC_REGNO)] 679))
1974 (clobber (reg:SI SPEFSCR_REGNO))
1975 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1977 "evsubfusiaaw %0,%1"
1978 [(set_attr "type" "veccomplex")
1979 (set_attr "length" "4")])
1981 (define_insn "spe_evsubfumiaaw"
1982 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1983 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1984 (reg:V2SI SPE_ACC_REGNO)] 680))
1985 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1987 "evsubfumiaaw %0,%1"
1988 [(set_attr "type" "veccomplex")
1989 (set_attr "length" "4")])
1991 (define_insn "spe_evsubfssiaaw"
1992 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
1993 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
1994 (reg:V2SI SPE_ACC_REGNO)] 681))
1995 (clobber (reg:SI SPEFSCR_REGNO))
1996 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
1998 "evsubfssiaaw %0,%1"
1999 [(set_attr "type" "veccomplex")
2000 (set_attr "length" "4")])
2002 (define_insn "spe_evsubfsmiaaw"
2003 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2004 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2005 (reg:V2SI SPE_ACC_REGNO)] 682))
2006 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2008 "evsubfsmiaaw %0,%1"
2009 [(set_attr "type" "veccomplex")
2010 (set_attr "length" "4")])
2012 (define_insn "spe_evmra"
2013 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2014 (match_operand:V2SI 1 "gpc_reg_operand" "r"))
2015 (set (reg:V2SI SPE_ACC_REGNO)
2016 (unspec:V2SI [(match_dup 1)] 726))]
2019 [(set_attr "type" "veccomplex")
2020 (set_attr "length" "4")])
2022 (define_insn "spe_evdivws"
2023 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2024 (div:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
2025 (match_operand:V2SI 2 "gpc_reg_operand" "r")))
2026 (clobber (reg:SI SPEFSCR_REGNO))]
2029 [(set_attr "type" "vecdiv")
2030 (set_attr "length" "4")])
2032 (define_insn "spe_evdivwu"
2033 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2034 (udiv:V2SI (match_operand:V2SI 1 "gpc_reg_operand" "r")
2035 (match_operand:V2SI 2 "gpc_reg_operand" "r")))
2036 (clobber (reg:SI SPEFSCR_REGNO))]
2039 [(set_attr "type" "vecdiv")
2040 (set_attr "length" "4")])
2042 (define_insn "spe_evsplatfi"
2043 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2044 (unspec:V2SI [(match_operand:QI 1 "immediate_operand" "i")] 684))]
2047 [(set_attr "type" "vecperm")
2048 (set_attr "length" "4")])
2050 (define_insn "spe_evsplati"
2051 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2052 (unspec:V2SI [(match_operand:QI 1 "immediate_operand" "i")] 685))]
2055 [(set_attr "type" "vecperm")
2056 (set_attr "length" "4")])
2058 (define_insn "spe_evstdd"
2059 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2060 (match_operand:QI 1 "immediate_operand" "i")))
2061 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2062 (unspec [(const_int 0)] 686)]
2063 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2064 "evstdd %2,%1*8(%0)"
2065 [(set_attr "type" "vecstore")
2066 (set_attr "length" "4")])
2068 (define_insn "spe_evstddx"
2069 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2070 (match_operand:SI 1 "gpc_reg_operand" "r")))
2071 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2072 (unspec [(const_int 0)] 687)]
2075 [(set_attr "type" "vecstore")
2076 (set_attr "length" "4")])
2078 (define_insn "spe_evstdh"
2079 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2080 (match_operand:QI 1 "immediate_operand" "i")))
2081 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2082 (unspec [(const_int 0)] 688)]
2083 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2084 "evstdh %2,%1*8(%0)"
2085 [(set_attr "type" "vecstore")
2086 (set_attr "length" "4")])
2088 (define_insn "spe_evstdhx"
2089 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2090 (match_operand:SI 1 "gpc_reg_operand" "r")))
2091 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2092 (unspec [(const_int 0)] 689)]
2095 [(set_attr "type" "vecstore")
2096 (set_attr "length" "4")])
2098 (define_insn "spe_evstdw"
2099 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2100 (match_operand:QI 1 "immediate_operand" "i")))
2101 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2102 (unspec [(const_int 0)] 690)]
2103 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2104 "evstdw %2,%1*8(%0)"
2105 [(set_attr "type" "vecstore")
2106 (set_attr "length" "4")])
2108 (define_insn "spe_evstdwx"
2109 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2110 (match_operand:SI 1 "gpc_reg_operand" "r")))
2111 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2112 (unspec [(const_int 0)] 691)]
2115 [(set_attr "type" "vecstore")
2116 (set_attr "length" "4")])
2118 (define_insn "spe_evstwhe"
2119 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2120 (match_operand:QI 1 "immediate_operand" "i")))
2121 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2122 (unspec [(const_int 0)] 692)]
2123 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2124 "evstwhe %2,%1*4(%0)"
2125 [(set_attr "type" "vecstore")
2126 (set_attr "length" "4")])
2128 (define_insn "spe_evstwhex"
2129 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2130 (match_operand:SI 1 "gpc_reg_operand" "r")))
2131 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2132 (unspec [(const_int 0)] 693)]
2135 [(set_attr "type" "vecstore")
2136 (set_attr "length" "4")])
2138 (define_insn "spe_evstwho"
2139 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2140 (match_operand:QI 1 "immediate_operand" "i")))
2141 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2142 (unspec [(const_int 0)] 694)]
2143 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2144 "evstwho %2,%1*4(%0)"
2145 [(set_attr "type" "vecstore")
2146 (set_attr "length" "4")])
2148 (define_insn "spe_evstwhox"
2149 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2150 (match_operand:SI 1 "gpc_reg_operand" "r")))
2151 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2152 (unspec [(const_int 0)] 695)]
2155 [(set_attr "type" "vecstore")
2156 (set_attr "length" "4")])
2158 (define_insn "spe_evstwwe"
2159 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2160 (match_operand:QI 1 "immediate_operand" "i")))
2161 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2162 (unspec [(const_int 0)] 696)]
2163 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2164 "evstwwe %2,%1*4(%0)"
2165 [(set_attr "type" "vecstore")
2166 (set_attr "length" "4")])
2168 (define_insn "spe_evstwwex"
2169 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2170 (match_operand:SI 1 "gpc_reg_operand" "r")))
2171 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2172 (unspec [(const_int 0)] 697)]
2175 [(set_attr "type" "vecstore")
2176 (set_attr "length" "4")])
2178 (define_insn "spe_evstwwo"
2179 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2180 (match_operand:QI 1 "immediate_operand" "i")))
2181 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2182 (unspec [(const_int 0)] 698)]
2183 "TARGET_SPE && INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) <= 31"
2184 "evstwwo %2,%1*4(%0)"
2185 [(set_attr "type" "vecstore")
2186 (set_attr "length" "4")])
2188 (define_insn "spe_evstwwox"
2189 [(set (mem:V2SI (plus:SI (match_operand:SI 0 "gpc_reg_operand" "b")
2190 (match_operand:SI 1 "gpc_reg_operand" "r")))
2191 (match_operand:V2SI 2 "gpc_reg_operand" "r"))
2192 (unspec [(const_int 0)] 699)]
2195 [(set_attr "type" "vecstore")
2196 (set_attr "length" "4")])
2198 ;; Double-precision floating point instructions.
2199 (define_insn "*movdf_e500_double"
2200 [(set (match_operand:DF 0 "nonimmediate_operand" "=r,r,m")
2201 (match_operand:DF 1 "input_operand" "r,m,r"))]
2202 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE
2203 && (gpc_reg_operand (operands[0], DFmode)
2204 || gpc_reg_operand (operands[1], DFmode))"
2207 switch (which_alternative)
2210 return \"evor %0,%1,%1\";
2212 return \"evldd%X1 %0,%y1\";
2214 return \"evstdd%X0 %1,%y0\";
2219 [(set_attr "type" "*,vecload,vecstore")
2220 (set_attr "length" "*,*,*")])
2222 (define_insn "spe_truncdfsf2"
2223 [(set (match_operand:SF 0 "gpc_reg_operand" "=r")
2224 (float_truncate:SF (match_operand:DF 1 "gpc_reg_operand" "r")))]
2225 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE"
2228 (define_insn "spe_absdf2"
2229 [(set (match_operand:DF 0 "gpc_reg_operand" "=r")
2230 (abs:DF (match_operand:DF 1 "gpc_reg_operand" "r")))]
2231 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE"
2234 (define_insn "spe_nabsdf2"
2235 [(set (match_operand:DF 0 "gpc_reg_operand" "=r")
2236 (neg:DF (abs:DF (match_operand:DF 1 "gpc_reg_operand" "r"))))]
2237 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE"
2240 (define_insn "spe_negdf2"
2241 [(set (match_operand:DF 0 "gpc_reg_operand" "=r")
2242 (neg:DF (match_operand:DF 1 "gpc_reg_operand" "r")))]
2243 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE"
2246 (define_insn "spe_adddf3"
2247 [(set (match_operand:DF 0 "gpc_reg_operand" "=r")
2248 (plus:DF (match_operand:DF 1 "gpc_reg_operand" "r")
2249 (match_operand:DF 2 "gpc_reg_operand" "r")))]
2250 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE"
2253 (define_insn "spe_subdf3"
2254 [(set (match_operand:DF 0 "gpc_reg_operand" "=r")
2255 (minus:DF (match_operand:DF 1 "gpc_reg_operand" "r")
2256 (match_operand:DF 2 "gpc_reg_operand" "r")))]
2257 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE"
2260 (define_insn "spe_muldf3"
2261 [(set (match_operand:DF 0 "gpc_reg_operand" "=r")
2262 (mult:DF (match_operand:DF 1 "gpc_reg_operand" "r")
2263 (match_operand:DF 2 "gpc_reg_operand" "r")))]
2264 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE"
2267 (define_insn "spe_divdf3"
2268 [(set (match_operand:DF 0 "gpc_reg_operand" "=r")
2269 (div:DF (match_operand:DF 1 "gpc_reg_operand" "r")
2270 (match_operand:DF 2 "gpc_reg_operand" "r")))]
2271 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE"
2274 ;; Vector move instructions.
2276 (define_expand "movv2si"
2277 [(set (match_operand:V2SI 0 "nonimmediate_operand" "")
2278 (match_operand:V2SI 1 "any_operand" ""))]
2280 "{ rs6000_emit_move (operands[0], operands[1], V2SImode); DONE; }")
2282 (define_insn "*movv2si_internal"
2283 [(set (match_operand:V2SI 0 "nonimmediate_operand" "=m,r,r,r")
2284 (match_operand:V2SI 1 "input_operand" "r,m,r,W"))]
2286 && (gpc_reg_operand (operands[0], V2SImode)
2287 || gpc_reg_operand (operands[1], V2SImode))"
2290 switch (which_alternative)
2292 case 0: return \"evstdd%X0 %1,%y0\";
2293 case 1: return \"evldd%X1 %0,%y1\";
2294 case 2: return \"evor %0,%1,%1\";
2295 case 3: return output_vec_const_move (operands);
2299 [(set_attr "type" "vecload,vecstore,*,*")
2300 (set_attr "length" "*,*,*,12")])
2303 [(set (match_operand:V2SI 0 "register_operand" "")
2304 (match_operand:V2SI 1 "zero_constant" ""))]
2305 "TARGET_SPE && reload_completed"
2307 (xor:V2SI (match_dup 0) (match_dup 0)))]
2310 (define_expand "movv1di"
2311 [(set (match_operand:V1DI 0 "nonimmediate_operand" "")
2312 (match_operand:V1DI 1 "any_operand" ""))]
2314 "{ rs6000_emit_move (operands[0], operands[1], V1DImode); DONE; }")
2316 (define_insn "*movv1di_internal"
2317 [(set (match_operand:V1DI 0 "nonimmediate_operand" "=m,r,r,r")
2318 (match_operand:V1DI 1 "input_operand" "r,m,r,W"))]
2320 && (gpc_reg_operand (operands[0], V1DImode)
2321 || gpc_reg_operand (operands[1], V1DImode))"
2327 [(set_attr "type" "vecload,vecstore,*,*")
2328 (set_attr "length" "*,*,*,*")])
2330 (define_expand "movv4hi"
2331 [(set (match_operand:V4HI 0 "nonimmediate_operand" "")
2332 (match_operand:V4HI 1 "any_operand" ""))]
2334 "{ rs6000_emit_move (operands[0], operands[1], V4HImode); DONE; }")
2336 (define_insn "*movv4hi_internal"
2337 [(set (match_operand:V4HI 0 "nonimmediate_operand" "=m,r,r")
2338 (match_operand:V4HI 1 "input_operand" "r,m,r"))]
2340 && (gpc_reg_operand (operands[0], V4HImode)
2341 || gpc_reg_operand (operands[1], V4HImode))"
2346 [(set_attr "type" "vecload")])
2348 (define_expand "movv2sf"
2349 [(set (match_operand:V2SF 0 "nonimmediate_operand" "")
2350 (match_operand:V2SF 1 "any_operand" ""))]
2352 "{ rs6000_emit_move (operands[0], operands[1], V2SFmode); DONE; }")
2354 (define_insn "*movv2sf_internal"
2355 [(set (match_operand:V2SF 0 "nonimmediate_operand" "=m,r,r,r")
2356 (match_operand:V2SF 1 "input_operand" "r,m,r,W"))]
2358 && (gpc_reg_operand (operands[0], V2SFmode)
2359 || gpc_reg_operand (operands[1], V2SFmode))"
2365 [(set_attr "type" "vecload,vecstore,*,*")
2366 (set_attr "length" "*,*,*,*")])
2368 ;; End of vector move instructions.
2370 (define_insn "spe_evmwhssfaa"
2371 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2372 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2373 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 702))
2374 (clobber (reg:SI SPEFSCR_REGNO))
2375 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2377 "evmwhssfaa %0,%1,%2"
2378 [(set_attr "type" "veccomplex")
2379 (set_attr "length" "4")])
2381 (define_insn "spe_evmwhssmaa"
2382 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2383 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2384 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 703))
2385 (clobber (reg:SI SPEFSCR_REGNO))
2386 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2388 "evmwhssmaa %0,%1,%2"
2389 [(set_attr "type" "veccomplex")
2390 (set_attr "length" "4")])
2392 (define_insn "spe_evmwhsmfaa"
2393 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2394 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2395 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 704))
2396 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2398 "evmwhsmfaa %0,%1,%2"
2399 [(set_attr "type" "veccomplex")
2400 (set_attr "length" "4")])
2402 (define_insn "spe_evmwhsmiaa"
2403 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2404 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2405 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 705))
2406 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2408 "evmwhsmiaa %0,%1,%2"
2409 [(set_attr "type" "veccomplex")
2410 (set_attr "length" "4")])
2412 (define_insn "spe_evmwhusiaa"
2413 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2414 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2415 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 706))
2416 (clobber (reg:SI SPEFSCR_REGNO))
2417 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2419 "evmwhusiaa %0,%1,%2"
2420 [(set_attr "type" "veccomplex")
2421 (set_attr "length" "4")])
2423 (define_insn "spe_evmwhumiaa"
2424 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2425 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2426 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 707))
2427 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2429 "evmwhumiaa %0,%1,%2"
2430 [(set_attr "type" "veccomplex")
2431 (set_attr "length" "4")])
2433 (define_insn "spe_evmwhssfan"
2434 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2435 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2436 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 708))
2437 (clobber (reg:SI SPEFSCR_REGNO))
2438 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2440 "evmwhssfan %0,%1,%2"
2441 [(set_attr "type" "veccomplex")
2442 (set_attr "length" "4")])
2444 (define_insn "spe_evmwhssian"
2445 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2446 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2447 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 709))
2448 (clobber (reg:SI SPEFSCR_REGNO))
2449 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2451 "evmwhssian %0,%1,%2"
2452 [(set_attr "type" "veccomplex")
2453 (set_attr "length" "4")])
2455 (define_insn "spe_evmwhsmfan"
2456 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2457 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2458 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 710))
2459 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2461 "evmwhsmfan %0,%1,%2"
2462 [(set_attr "type" "veccomplex")
2463 (set_attr "length" "4")])
2465 (define_insn "spe_evmwhsmian"
2466 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2467 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2468 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 711))
2469 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2471 "evmwhsmian %0,%1,%2"
2472 [(set_attr "type" "veccomplex")
2473 (set_attr "length" "4")])
2475 (define_insn "spe_evmwhumian"
2476 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2477 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2478 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 713))
2479 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2481 "evmwhumian %0,%1,%2"
2482 [(set_attr "type" "veccomplex")
2483 (set_attr "length" "4")])
2485 (define_insn "spe_evmwhgssfaa"
2486 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2487 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2488 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 714))
2489 (clobber (reg:SI SPEFSCR_REGNO))
2490 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2492 "evmwhgssfaa %0,%1,%2"
2493 [(set_attr "type" "veccomplex")
2494 (set_attr "length" "4")])
2496 (define_insn "spe_evmwhgsmfaa"
2497 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2498 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2499 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 715))
2500 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2502 "evmwhgsmfaa %0,%1,%2"
2503 [(set_attr "type" "veccomplex")
2504 (set_attr "length" "4")])
2506 (define_insn "spe_evmwhgsmiaa"
2507 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2508 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2509 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 716))
2510 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2512 "evmwhgsmiaa %0,%1,%2"
2513 [(set_attr "type" "veccomplex")
2514 (set_attr "length" "4")])
2516 (define_insn "spe_evmwhgumiaa"
2517 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2518 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2519 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 717))
2520 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2522 "evmwhgumiaa %0,%1,%2"
2523 [(set_attr "type" "veccomplex")
2524 (set_attr "length" "4")])
2526 (define_insn "spe_evmwhgssfan"
2527 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2528 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2529 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 718))
2530 (clobber (reg:SI SPEFSCR_REGNO))
2531 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2533 "evmwhgssfan %0,%1,%2"
2534 [(set_attr "type" "veccomplex")
2535 (set_attr "length" "4")])
2537 (define_insn "spe_evmwhgsmfan"
2538 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2539 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2540 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 719))
2541 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2543 "evmwhgsmfan %0,%1,%2"
2544 [(set_attr "type" "veccomplex")
2545 (set_attr "length" "4")])
2547 (define_insn "spe_evmwhgsmian"
2548 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2549 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2550 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 720))
2551 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2553 "evmwhgsmian %0,%1,%2"
2554 [(set_attr "type" "veccomplex")
2555 (set_attr "length" "4")])
2557 (define_insn "spe_evmwhgumian"
2558 [(set (match_operand:V2SI 0 "gpc_reg_operand" "=r")
2559 (unspec:V2SI [(match_operand:V2SI 1 "gpc_reg_operand" "r")
2560 (match_operand:V2SI 2 "gpc_reg_operand" "r")] 721))
2561 (set (reg:V2SI SPE_ACC_REGNO) (unspec:V2SI [(const_int 0)] 0))]
2563 "evmwhgumian %0,%1,%2"
2564 [(set_attr "type" "veccomplex")
2565 (set_attr "length" "4")])
2567 (define_insn "spe_mtspefscr"
2568 [(set (reg:SI SPEFSCR_REGNO)
2569 (unspec_volatile:SI [(match_operand:SI 0 "register_operand" "r")]
2573 [(set_attr "type" "vecsimple")])
2575 (define_insn "spe_mfspefscr"
2576 [(set (match_operand:SI 0 "register_operand" "=r")
2577 (unspec_volatile:SI [(reg:SI SPEFSCR_REGNO)] 723))]
2580 [(set_attr "type" "vecsimple")])
2582 ;; FP comparison stuff.
2585 (define_insn "e500_flip_eq_bit"
2586 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2588 [(match_operand:CCFP 1 "cc_reg_operand" "y")] 999))]
2589 "!TARGET_FPRS && TARGET_HARD_FLOAT"
2592 return output_e500_flip_eq_bit (operands[0], operands[1]);
2594 [(set_attr "type" "cr_logical")])
2596 ;; MPC8540 single-precision FP instructions on GPRs.
2597 ;; We have 2 variants for each. One for IEEE compliant math and one
2598 ;; for non IEEE compliant math.
2600 (define_insn "cmpsfeq_gpr"
2601 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2603 [(compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "r")
2604 (match_operand:SF 2 "gpc_reg_operand" "r"))]
2606 "TARGET_HARD_FLOAT && !TARGET_FPRS && !flag_unsafe_math_optimizations"
2608 [(set_attr "type" "veccmp")])
2610 (define_insn "tstsfeq_gpr"
2611 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2613 [(compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "r")
2614 (match_operand:SF 2 "gpc_reg_operand" "r"))]
2616 "TARGET_HARD_FLOAT && !TARGET_FPRS && flag_unsafe_math_optimizations"
2618 [(set_attr "type" "veccmpsimple")])
2620 (define_insn "cmpsfgt_gpr"
2621 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2623 [(compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "r")
2624 (match_operand:SF 2 "gpc_reg_operand" "r"))]
2626 "TARGET_HARD_FLOAT && !TARGET_FPRS && !flag_unsafe_math_optimizations"
2628 [(set_attr "type" "veccmp")])
2630 (define_insn "tstsfgt_gpr"
2631 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2633 [(compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "r")
2634 (match_operand:SF 2 "gpc_reg_operand" "r"))]
2636 "TARGET_HARD_FLOAT && !TARGET_FPRS && flag_unsafe_math_optimizations"
2638 [(set_attr "type" "veccmpsimple")])
2640 (define_insn "cmpsflt_gpr"
2641 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2643 [(compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "r")
2644 (match_operand:SF 2 "gpc_reg_operand" "r"))]
2646 "TARGET_HARD_FLOAT && !TARGET_FPRS && !flag_unsafe_math_optimizations"
2648 [(set_attr "type" "veccmp")])
2650 (define_insn "tstsflt_gpr"
2651 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2653 [(compare:CCFP (match_operand:SF 1 "gpc_reg_operand" "r")
2654 (match_operand:SF 2 "gpc_reg_operand" "r"))]
2656 "TARGET_HARD_FLOAT && !TARGET_FPRS && flag_unsafe_math_optimizations"
2658 [(set_attr "type" "veccmpsimple")])
2660 ;; Same thing, but for double-precision.
2662 (define_insn "cmpdfeq_gpr"
2663 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2665 [(compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "r")
2666 (match_operand:DF 2 "gpc_reg_operand" "r"))]
2668 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && !flag_unsafe_math_optimizations"
2670 [(set_attr "type" "veccmp")])
2672 (define_insn "tstdfeq_gpr"
2673 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2675 [(compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "r")
2676 (match_operand:DF 2 "gpc_reg_operand" "r"))]
2678 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && flag_unsafe_math_optimizations"
2680 [(set_attr "type" "veccmpsimple")])
2682 (define_insn "cmpdfgt_gpr"
2683 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2685 [(compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "r")
2686 (match_operand:DF 2 "gpc_reg_operand" "r"))]
2688 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && !flag_unsafe_math_optimizations"
2690 [(set_attr "type" "veccmp")])
2692 (define_insn "tstdfgt_gpr"
2693 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2695 [(compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "r")
2696 (match_operand:DF 2 "gpc_reg_operand" "r"))]
2698 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && flag_unsafe_math_optimizations"
2700 [(set_attr "type" "veccmpsimple")])
2702 (define_insn "cmpdflt_gpr"
2703 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2705 [(compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "r")
2706 (match_operand:DF 2 "gpc_reg_operand" "r"))]
2708 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && !flag_unsafe_math_optimizations"
2710 [(set_attr "type" "veccmp")])
2712 (define_insn "tstdflt_gpr"
2713 [(set (match_operand:CCFP 0 "cc_reg_operand" "=y")
2715 [(compare:CCFP (match_operand:DF 1 "gpc_reg_operand" "r")
2716 (match_operand:DF 2 "gpc_reg_operand" "r"))]
2718 "TARGET_HARD_FLOAT && TARGET_E500_DOUBLE && flag_unsafe_math_optimizations"
2720 [(set_attr "type" "veccmpsimple")])