1 /* Subroutines used for code generation on IBM RS/6000.
2 Copyright (C) 1991, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "hard-reg-set.h"
29 #include "insn-config.h"
30 #include "conditions.h"
31 #include "insn-flags.h"
33 #include "insn-attr.h"
41 #ifndef TARGET_NO_PROTOTYPE
42 #define TARGET_NO_PROTOTYPE 0
45 extern char *language_string;
46 extern int profile_block_flag;
48 #define min(A,B) ((A) < (B) ? (A) : (B))
49 #define max(A,B) ((A) > (B) ? (A) : (B))
53 enum processor_type rs6000_cpu;
54 struct rs6000_cpu_select rs6000_select[3] =
56 /* switch name, tune arch */
57 { (char *)0, "--with-cpu=", 1, 1 },
58 { (char *)0, "-mcpu=", 1, 1 },
59 { (char *)0, "-mtune=", 1, 0 },
62 /* Set to non-zero by "fix" operation to indicate that itrunc and
63 uitrunc must be defined. */
65 int rs6000_trunc_used;
67 /* Set to non-zero once they have been defined. */
69 static int trunc_defined;
71 /* Set to non-zero once AIX common-mode calls have been defined. */
72 static int common_mode_defined;
74 /* Save information from a "cmpxx" operation until the branch or scc is
76 rtx rs6000_compare_op0, rs6000_compare_op1;
77 int rs6000_compare_fp_p;
80 /* Label number of label created for -mrelocatable, to call to so we can
81 get the address of the GOT section */
82 int rs6000_pic_labelno;
84 /* Which abi to adhere to */
85 char *rs6000_abi_name = RS6000_ABI_NAME;
87 /* Semantics of the small data area */
88 enum rs6000_sdata_type rs6000_sdata = SDATA_DATA;
90 /* Which small data model to use */
91 char *rs6000_sdata_name = (char *)0;
94 /* Whether a System V.4 varargs area was created. */
95 int rs6000_sysv_varargs_p;
97 /* Whether we need to save the TOC register. */
98 int rs6000_save_toc_p;
100 /* ABI enumeration available for subtarget to use. */
101 enum rs6000_abi rs6000_current_abi;
103 /* Offset & size for fpmem stack locations used for converting between
104 float and integral types. */
105 int rs6000_fpmem_offset;
106 int rs6000_fpmem_size;
109 /* Default register names. */
110 char rs6000_reg_names[][8] =
112 "0", "1", "2", "3", "4", "5", "6", "7",
113 "8", "9", "10", "11", "12", "13", "14", "15",
114 "16", "17", "18", "19", "20", "21", "22", "23",
115 "24", "25", "26", "27", "28", "29", "30", "31",
116 "0", "1", "2", "3", "4", "5", "6", "7",
117 "8", "9", "10", "11", "12", "13", "14", "15",
118 "16", "17", "18", "19", "20", "21", "22", "23",
119 "24", "25", "26", "27", "28", "29", "30", "31",
120 "mq", "lr", "ctr","ap",
121 "0", "1", "2", "3", "4", "5", "6", "7",
125 #ifdef TARGET_REGNAMES
126 static char alt_reg_names[][8] =
128 "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7",
129 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15",
130 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23",
131 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31",
132 "%f0", "%f1", "%f2", "%f3", "%f4", "%f5", "%f6", "%f7",
133 "%f8", "%f9", "%f10", "%f11", "%f12", "%f13", "%f14", "%f15",
134 "%f16", "%f17", "%f18", "%f19", "%f20", "%f21", "%f22", "%f23",
135 "%f24", "%f25", "%f26", "%f27", "%f28", "%f29", "%f30", "%f31",
136 "mq", "lr", "ctr", "ap",
137 "%cr0", "%cr1", "%cr2", "%cr3", "%cr4", "%cr5", "%cr6", "%cr7",
142 /* Override command line options. Mostly we process the processor
143 type and sometimes adjust other TARGET_ options. */
146 rs6000_override_options (default_cpu)
150 struct rs6000_cpu_select *ptr;
152 /* Simplify the entries below by making a mask for any POWER
153 variant and any PowerPC variant. */
155 #define POWER_MASKS (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING)
156 #define POWERPC_MASKS (MASK_POWERPC | MASK_PPC_GPOPT \
157 | MASK_PPC_GFXOPT | MASK_POWERPC64)
158 #define POWERPC_OPT_MASKS (MASK_PPC_GPOPT | MASK_PPC_GFXOPT)
162 char *name; /* Canonical processor name. */
163 enum processor_type processor; /* Processor type enum value. */
164 int target_enable; /* Target flags to enable. */
165 int target_disable; /* Target flags to disable. */
166 } processor_target_table[]
167 = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS,
168 POWER_MASKS | POWERPC_MASKS},
169 {"power", PROCESSOR_POWER,
170 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
171 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
172 {"power2", PROCESSOR_POWER,
173 MASK_POWER | MASK_POWER2 | MASK_MULTIPLE | MASK_STRING,
174 POWERPC_MASKS | MASK_NEW_MNEMONICS},
175 {"powerpc", PROCESSOR_POWERPC,
176 MASK_POWERPC | MASK_NEW_MNEMONICS,
177 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
178 {"rios", PROCESSOR_RIOS1,
179 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
180 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
181 {"rios1", PROCESSOR_RIOS1,
182 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
183 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
184 {"rsc", PROCESSOR_PPC601,
185 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
186 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
187 {"rsc1", PROCESSOR_PPC601,
188 MASK_POWER | MASK_MULTIPLE | MASK_STRING,
189 MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
190 {"rios2", PROCESSOR_RIOS2,
191 MASK_POWER | MASK_MULTIPLE | MASK_STRING | MASK_POWER2,
192 POWERPC_MASKS | MASK_NEW_MNEMONICS},
193 {"403", PROCESSOR_PPC403,
194 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
195 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
196 {"505", PROCESSOR_MPCCORE,
197 MASK_POWERPC | MASK_NEW_MNEMONICS,
198 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
199 {"601", PROCESSOR_PPC601,
200 MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING,
201 MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64},
202 {"602", PROCESSOR_PPC603,
203 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
204 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
205 {"603", PROCESSOR_PPC603,
206 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
207 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
208 {"603e", PROCESSOR_PPC603,
209 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
210 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
211 {"604", PROCESSOR_PPC604,
212 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
213 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
214 {"620", PROCESSOR_PPC620,
215 MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
216 POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
217 {"821", PROCESSOR_MPCCORE,
218 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
219 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
220 {"860", PROCESSOR_MPCCORE,
221 MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
222 POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}};
224 int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt);
226 int multiple = TARGET_MULTIPLE; /* save current -mmultiple/-mno-multiple status */
227 int string = TARGET_STRING; /* save current -mstring/-mno-string status */
229 profile_block_flag = 0;
231 /* Identify the processor type */
232 rs6000_select[0].string = default_cpu;
233 rs6000_cpu = PROCESSOR_DEFAULT;
235 for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++)
237 ptr = &rs6000_select[i];
238 if (ptr->string != (char *)0 && ptr->string[0] != '\0')
240 for (j = 0; j < ptt_size; j++)
241 if (! strcmp (ptr->string, processor_target_table[j].name))
244 rs6000_cpu = processor_target_table[j].processor;
248 target_flags |= processor_target_table[j].target_enable;
249 target_flags &= ~processor_target_table[j].target_disable;
255 error ("bad value (%s) for %s switch", ptr->string, ptr->name);
259 /* If -mmultiple or -mno-multiple was explicitly used, don't
260 override with the processor default */
261 if (TARGET_MULTIPLE_SET)
262 target_flags = (target_flags & ~MASK_MULTIPLE) | multiple;
264 /* If -mstring or -mno-string was explicitly used, don't
265 override with the processor default */
266 if (TARGET_STRING_SET)
267 target_flags = (target_flags & ~MASK_STRING) | string;
269 /* Don't allow -mmultiple or -mstring on little endian systems, because the
270 hardware doesn't support the instructions used in little endian mode */
271 if (!BYTES_BIG_ENDIAN)
275 target_flags &= ~MASK_MULTIPLE;
276 if (TARGET_MULTIPLE_SET)
277 warning ("-mmultiple is not supported on little endian systems");
282 target_flags &= ~MASK_STRING;
283 if (TARGET_STRING_SET)
284 warning ("-mstring is not supported on little endian systems");
288 #ifdef TARGET_REGNAMES
289 /* If the user desires alternate register names, copy in the alternate names
292 bcopy ((char *)alt_reg_names, (char *)rs6000_reg_names, sizeof (rs6000_reg_names));
295 #ifdef SUBTARGET_OVERRIDE_OPTIONS
296 SUBTARGET_OVERRIDE_OPTIONS;
300 /* Do anything needed at the start of the asm file. */
303 rs6000_file_start (file, default_cpu)
309 char *start = buffer;
310 struct rs6000_cpu_select *ptr;
312 if (flag_verbose_asm)
314 sprintf (buffer, "\n%s rs6000/powerpc options:", ASM_COMMENT_START);
315 rs6000_select[0].string = default_cpu;
317 for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++)
319 ptr = &rs6000_select[i];
320 if (ptr->string != (char *)0 && ptr->string[0] != '\0')
322 fprintf (file, "%s %s%s", start, ptr->name, ptr->string);
328 switch (rs6000_sdata)
330 case SDATA_NONE: fprintf (file, "%s -msdata=none", start); start = ""; break;
331 case SDATA_DATA: fprintf (file, "%s -msdata=data", start); start = ""; break;
332 case SDATA_SYSV: fprintf (file, "%s -msdata=sysv", start); start = ""; break;
333 case SDATA_EABI: fprintf (file, "%s -msdata=eabi", start); start = ""; break;
336 if (rs6000_sdata && g_switch_value)
338 fprintf (file, "%s -G %d", start, g_switch_value);
349 /* Create a CONST_DOUBLE from a string. */
352 rs6000_float_const (string, mode)
354 enum machine_mode mode;
356 REAL_VALUE_TYPE value = REAL_VALUE_ATOF (string, mode);
357 return immed_real_const_1 (value, mode);
361 /* Create a CONST_DOUBLE like immed_double_const, except reverse the
362 two parts of the constant if the target is little endian. */
365 rs6000_immed_double_const (i0, i1, mode)
366 HOST_WIDE_INT i0, i1;
367 enum machine_mode mode;
369 if (! WORDS_BIG_ENDIAN)
370 return immed_double_const (i1, i0, mode);
372 return immed_double_const (i0, i1, mode);
376 /* Return non-zero if this function is known to have a null epilogue. */
381 if (reload_completed)
383 rs6000_stack_t *info = rs6000_stack_info ();
385 if (info->first_gp_reg_save == 32
386 && info->first_fp_reg_save == 64
396 /* Returns 1 always. */
399 any_operand (op, mode)
401 enum machine_mode mode;
406 /* Returns 1 if op is the count register */
407 int count_register_operand(op, mode)
409 enum machine_mode mode;
411 if (GET_CODE (op) != REG)
414 if (REGNO (op) == COUNT_REGISTER_REGNUM)
417 if (REGNO (op) > FIRST_PSEUDO_REGISTER)
423 /* Returns 1 if op is memory location for float/int conversions that masquerades
425 int fpmem_operand(op, mode)
427 enum machine_mode mode;
429 if (GET_CODE (op) != REG)
432 if (FPMEM_REGNO_P (REGNO (op)))
436 if (REGNO (op) > FIRST_PSEUDO_REGISTER)
443 /* Return 1 if OP is a constant that can fit in a D field. */
446 short_cint_operand (op, mode)
448 enum machine_mode mode;
450 return (GET_CODE (op) == CONST_INT
451 && (unsigned) (INTVAL (op) + 0x8000) < 0x10000);
454 /* Similar for a unsigned D field. */
457 u_short_cint_operand (op, mode)
459 enum machine_mode mode;
461 return (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff0000) == 0);
464 /* Return 1 if OP is a CONST_INT that cannot fit in a signed D field. */
467 non_short_cint_operand (op, mode)
469 enum machine_mode mode;
471 return (GET_CODE (op) == CONST_INT
472 && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000);
475 /* Returns 1 if OP is a register that is not special (i.e., not MQ,
479 gpc_reg_operand (op, mode)
481 enum machine_mode mode;
483 return (register_operand (op, mode)
484 && (GET_CODE (op) != REG
485 || (REGNO (op) >= 67 && !FPMEM_REGNO_P (REGNO (op)))
486 || REGNO (op) < 64));
489 /* Returns 1 if OP is either a pseudo-register or a register denoting a
493 cc_reg_operand (op, mode)
495 enum machine_mode mode;
497 return (register_operand (op, mode)
498 && (GET_CODE (op) != REG
499 || REGNO (op) >= FIRST_PSEUDO_REGISTER
500 || CR_REGNO_P (REGNO (op))));
503 /* Returns 1 if OP is either a constant integer valid for a D-field or a
504 non-special register. If a register, it must be in the proper mode unless
508 reg_or_short_operand (op, mode)
510 enum machine_mode mode;
512 return short_cint_operand (op, mode) || gpc_reg_operand (op, mode);
515 /* Similar, except check if the negation of the constant would be valid for
519 reg_or_neg_short_operand (op, mode)
521 enum machine_mode mode;
523 if (GET_CODE (op) == CONST_INT)
524 return CONST_OK_FOR_LETTER_P (INTVAL (op), 'P');
526 return gpc_reg_operand (op, mode);
529 /* Return 1 if the operand is either a register or an integer whose high-order
533 reg_or_u_short_operand (op, mode)
535 enum machine_mode mode;
537 if (GET_CODE (op) == CONST_INT
538 && (INTVAL (op) & 0xffff0000) == 0)
541 return gpc_reg_operand (op, mode);
544 /* Return 1 is the operand is either a non-special register or ANY
548 reg_or_cint_operand (op, mode)
550 enum machine_mode mode;
552 return GET_CODE (op) == CONST_INT || gpc_reg_operand (op, mode);
555 /* Return 1 if the operand is an operand that can be loaded via the GOT */
558 got_operand (op, mode)
560 enum machine_mode mode;
562 return (GET_CODE (op) == SYMBOL_REF
563 || GET_CODE (op) == CONST
564 || GET_CODE (op) == LABEL_REF);
567 /* Return the number of instructions it takes to form a constant in an
571 num_insns_constant_wide (value)
574 /* signed constant loadable with {cal|addi} */
575 if (((unsigned HOST_WIDE_INT)value + 0x8000) < 0x10000)
578 #if HOST_BITS_PER_WIDE_INT == 32
579 /* constant loadable with {cau|addis} */
580 else if ((value & 0xffff) == 0)
584 /* constant loadable with {cau|addis} */
585 else if ((value & 0xffff) == 0 && (value & ~0xffffffff) == 0)
588 else if (TARGET_64BIT)
590 HOST_WIDE_INT low = value & 0xffffffff;
591 HOST_WIDE_INT high = value >> 32;
593 if (high == 0 && (low & 0x80000000) == 0)
596 else if (high == 0xffffffff && (low & 0x80000000) != 0)
600 return num_insns_constant_wide (high) + 1;
603 return (num_insns_constant_wide (high)
604 + num_insns_constant_wide (low) + 1);
613 num_insns_constant (op, mode)
615 enum machine_mode mode;
617 if (GET_CODE (op) == CONST_INT)
618 return num_insns_constant_wide (INTVAL (op));
620 else if (GET_CODE (op) == CONST_DOUBLE && mode == SFmode)
625 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
626 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
627 return num_insns_constant_wide ((HOST_WIDE_INT)l);
630 else if (GET_CODE (op) == CONST_DOUBLE && TARGET_32BIT)
631 return (num_insns_constant_wide (CONST_DOUBLE_LOW (op))
632 + num_insns_constant_wide (CONST_DOUBLE_HIGH (op)));
634 else if (GET_CODE (op) == CONST_DOUBLE && TARGET_64BIT)
636 HOST_WIDE_INT low = CONST_DOUBLE_LOW (op);
637 HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op);
639 if (high == 0 && (low & 0x80000000) == 0)
640 return num_insns_constant_wide (low);
642 else if (((high & 0xffffffff) == 0xffffffff)
643 && ((low & 0x80000000) != 0))
644 return num_insns_constant_wide (low);
647 return num_insns_constant_wide (high) + 1;
650 return (num_insns_constant_wide (high)
651 + num_insns_constant_wide (low) + 1);
658 /* Return 1 if the operand is a CONST_DOUBLE and it can be put into a register
659 with one instruction per word. We only do this if we can safely read
660 CONST_DOUBLE_{LOW,HIGH}. */
663 easy_fp_constant (op, mode)
665 register enum machine_mode mode;
667 if (GET_CODE (op) != CONST_DOUBLE
668 || GET_MODE (op) != mode
669 || (GET_MODE_CLASS (mode) != MODE_FLOAT && mode != DImode))
672 /* Consider all constants with -msoft-float to be easy */
673 if (TARGET_SOFT_FLOAT && mode != DImode)
676 /* If we are using V.4 style PIC, consider all constants to be hard */
677 if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS))
685 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
686 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
688 return (num_insns_constant_wide ((HOST_WIDE_INT)k[0]) == 1
689 && num_insns_constant_wide ((HOST_WIDE_INT)k[1]) == 1);
692 else if (mode == SFmode)
697 REAL_VALUE_FROM_CONST_DOUBLE (rv, op);
698 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
700 return num_insns_constant_wide (l) == 1;
703 else if (mode == DImode && TARGET_32BIT)
704 return num_insns_constant (op, DImode) == 2;
710 /* Return 1 if the operand is in volatile memory. Note that during the
711 RTL generation phase, memory_operand does not return TRUE for
712 volatile memory references. So this function allows us to
713 recognize volatile references where its safe. */
716 volatile_mem_operand (op, mode)
718 enum machine_mode mode;
720 if (GET_CODE (op) != MEM)
723 if (!MEM_VOLATILE_P (op))
726 if (mode != GET_MODE (op))
729 if (reload_completed)
730 return memory_operand (op, mode);
732 if (reload_in_progress)
733 return strict_memory_address_p (mode, XEXP (op, 0));
735 return memory_address_p (mode, XEXP (op, 0));
738 /* Return 1 if the operand is an offsettable memory address. */
741 offsettable_addr_operand (op, mode)
743 enum machine_mode mode;
745 return offsettable_address_p (reload_completed | reload_in_progress,
749 /* Return 1 if the operand is either a floating-point register, a pseudo
750 register, or memory. */
753 fp_reg_or_mem_operand (op, mode)
755 enum machine_mode mode;
757 return (memory_operand (op, mode)
758 || volatile_mem_operand (op, mode)
759 || (register_operand (op, mode)
760 && (GET_CODE (op) != REG
761 || REGNO (op) >= FIRST_PSEUDO_REGISTER
762 || FP_REGNO_P (REGNO (op)))));
765 /* Return 1 if the operand is either an easy FP constant (see above) or
769 mem_or_easy_const_operand (op, mode)
771 enum machine_mode mode;
773 return memory_operand (op, mode) || easy_fp_constant (op, mode);
776 /* Return 1 if the operand is either a non-special register or an item
777 that can be used as the operand of an SI add insn. */
780 add_operand (op, mode)
782 enum machine_mode mode;
784 return (reg_or_short_operand (op, mode)
785 || (GET_CODE (op) == CONST_INT && (INTVAL (op) & 0xffff) == 0));
788 /* Return 1 if OP is a constant but not a valid add_operand. */
791 non_add_cint_operand (op, mode)
793 enum machine_mode mode;
795 return (GET_CODE (op) == CONST_INT
796 && (unsigned) (INTVAL (op) + 0x8000) >= 0x10000
797 && (INTVAL (op) & 0xffff) != 0);
800 /* Return 1 if the operand is a non-special register or a constant that
801 can be used as the operand of an OR or XOR insn on the RS/6000. */
804 logical_operand (op, mode)
806 enum machine_mode mode;
808 return (gpc_reg_operand (op, mode)
809 || (GET_CODE (op) == CONST_INT
810 && ((INTVAL (op) & 0xffff0000) == 0
811 || (INTVAL (op) & 0xffff) == 0)));
814 /* Return 1 if C is a constant that is not a logical operand (as
818 non_logical_cint_operand (op, mode)
820 enum machine_mode mode;
822 return (GET_CODE (op) == CONST_INT
823 && (INTVAL (op) & 0xffff0000) != 0
824 && (INTVAL (op) & 0xffff) != 0);
827 /* Return 1 if C is a constant that can be encoded in a mask on the
828 RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
829 Reject all ones and all zeros, since these should have been optimized
830 away and confuse the making of MB and ME. */
840 if (c == 0 || c == ~0)
843 last_bit_value = c & 1;
845 for (i = 1; i < 32; i++)
846 if (((c >>= 1) & 1) != last_bit_value)
847 last_bit_value ^= 1, transitions++;
849 return transitions <= 2;
852 /* Return 1 if the operand is a constant that is a mask on the RS/6000. */
855 mask_operand (op, mode)
857 enum machine_mode mode;
859 return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op));
862 /* Return 1 if the operand is either a non-special register or a
863 constant that can be used as the operand of an RS/6000 logical AND insn. */
866 and_operand (op, mode)
868 enum machine_mode mode;
870 return (reg_or_short_operand (op, mode)
871 || logical_operand (op, mode)
872 || mask_operand (op, mode));
875 /* Return 1 if the operand is a constant but not a valid operand for an AND
879 non_and_cint_operand (op, mode)
881 enum machine_mode mode;
883 return GET_CODE (op) == CONST_INT && ! and_operand (op, mode);
886 /* Return 1 if the operand is a general register or memory operand. */
889 reg_or_mem_operand (op, mode)
891 register enum machine_mode mode;
893 return (gpc_reg_operand (op, mode)
894 || memory_operand (op, mode)
895 || volatile_mem_operand (op, mode));
898 /* Return 1 if the operand is a general register or memory operand without
899 pre-inc or pre_dec which produces invalid form of PowerPC lwa
903 lwa_operand (op, mode)
905 register enum machine_mode mode;
909 if (reload_completed && GET_CODE (inner) == SUBREG)
910 inner = SUBREG_REG (inner);
912 return gpc_reg_operand (inner, mode)
913 || (memory_operand (inner, mode)
914 && GET_CODE (XEXP (inner, 0)) != PRE_INC
915 && GET_CODE (XEXP (inner, 0)) != PRE_DEC);
918 /* Return 1 if the operand, used inside a MEM, is a valid first argument
919 to CALL. This is a SYMBOL_REF or a pseudo-register, which will be
923 call_operand (op, mode)
925 enum machine_mode mode;
927 if (mode != VOIDmode && GET_MODE (op) != mode)
930 return (GET_CODE (op) == SYMBOL_REF
931 || (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER));
935 /* Return 1 if the operand is a SYMBOL_REF for a function known to be in
939 current_file_function_operand (op, mode)
941 enum machine_mode mode;
943 return (GET_CODE (op) == SYMBOL_REF
944 && (SYMBOL_REF_FLAG (op)
945 || op == XEXP (DECL_RTL (current_function_decl), 0)));
949 /* Return 1 if this operand is a valid input for a move insn. */
952 input_operand (op, mode)
954 enum machine_mode mode;
956 /* Memory is always valid. */
957 if (memory_operand (op, mode))
960 /* For floating-point, easy constants are valid. */
961 if (GET_MODE_CLASS (mode) == MODE_FLOAT
963 && easy_fp_constant (op, mode))
966 /* Allow any integer constant. */
967 if (GET_MODE_CLASS (mode) == MODE_INT
968 && (GET_CODE (op) == CONST_INT || GET_CODE (op) == CONST_DOUBLE))
971 /* For floating-point or multi-word mode, the only remaining valid type
973 if (GET_MODE_CLASS (mode) == MODE_FLOAT
974 || GET_MODE_SIZE (mode) > UNITS_PER_WORD)
975 return register_operand (op, mode);
977 /* The only cases left are integral modes one word or smaller (we
978 do not get called for MODE_CC values). These can be in any
980 if (register_operand (op, mode))
983 /* A SYMBOL_REF referring to the TOC is valid. */
984 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (op))
987 /* Windows NT allows SYMBOL_REFs and LABEL_REFs against the TOC
988 directly in the instruction stream */
989 if (DEFAULT_ABI == ABI_NT
990 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == LABEL_REF))
993 /* V.4 allows SYMBOL_REFs and CONSTs that are in the small data region
995 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
996 && (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST)
997 && small_data_operand (op, Pmode))
1003 /* Return 1 for an operand in small memory on V.4/eabi */
1006 small_data_operand (op, mode)
1008 enum machine_mode mode;
1011 rtx sym_ref, const_part;
1013 if (rs6000_sdata == SDATA_NONE || rs6000_sdata == SDATA_DATA)
1016 if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS)
1019 if (GET_CODE (op) == SYMBOL_REF)
1022 else if (GET_CODE (op) != CONST
1023 || GET_CODE (XEXP (op, 0)) != PLUS
1024 || GET_CODE (XEXP (XEXP (op, 0), 0)) != SYMBOL_REF
1025 || GET_CODE (XEXP (XEXP (op, 0), 1)) != CONST_INT)
1029 sym_ref = XEXP (XEXP (op, 0), 0);
1031 if (*XSTR (sym_ref, 0) != '@')
1042 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1043 for a call to a function whose data type is FNTYPE.
1044 For a library call, FNTYPE is 0.
1046 For incoming args we set the number of arguments in the prototype large
1047 so we never return a PARALLEL. */
1050 init_cumulative_args (cum, fntype, libname, incoming)
1051 CUMULATIVE_ARGS *cum;
1056 static CUMULATIVE_ARGS zero_cumulative;
1057 enum rs6000_abi abi = DEFAULT_ABI;
1059 *cum = zero_cumulative;
1061 cum->fregno = FP_ARG_MIN_REG;
1062 cum->prototype = (fntype && TYPE_ARG_TYPES (fntype));
1063 cum->call_cookie = CALL_NORMAL;
1067 cum->nargs_prototype = 1000; /* don't return a PARALLEL */
1068 if (abi == ABI_V4 || abi == ABI_SOLARIS)
1069 cum->varargs_offset = RS6000_VARARGS_OFFSET;
1072 else if (cum->prototype)
1073 cum->nargs_prototype = (list_length (TYPE_ARG_TYPES (fntype)) - 1
1074 + (TYPE_MODE (TREE_TYPE (fntype)) == BLKmode
1075 || RETURN_IN_MEMORY (TREE_TYPE (fntype))));
1078 cum->nargs_prototype = 0;
1080 cum->orig_nargs = cum->nargs_prototype;
1082 /* Check for DLL import functions */
1085 && lookup_attribute ("dllimport", TYPE_ATTRIBUTES (fntype)))
1086 cum->call_cookie = CALL_NT_DLLIMPORT;
1088 /* Also check for longcall's */
1089 else if (fntype && lookup_attribute ("longcall", TYPE_ATTRIBUTES (fntype)))
1090 cum->call_cookie = CALL_LONG;
1092 if (TARGET_DEBUG_ARG)
1094 fprintf (stderr, "\ninit_cumulative_args:");
1097 tree ret_type = TREE_TYPE (fntype);
1098 fprintf (stderr, " ret code = %s,",
1099 tree_code_name[ (int)TREE_CODE (ret_type) ]);
1102 if ((abi == ABI_V4 || abi == ABI_SOLARIS) && incoming)
1103 fprintf (stderr, " varargs = %d, ", cum->varargs_offset);
1105 if (cum->call_cookie & CALL_NT_DLLIMPORT)
1106 fprintf (stderr, " dllimport,");
1108 if (cum->call_cookie & CALL_LONG)
1109 fprintf (stderr, " longcall,");
1111 fprintf (stderr, " proto = %d, nargs = %d\n",
1112 cum->prototype, cum->nargs_prototype);
1116 /* If defined, a C expression that gives the alignment boundary, in bits,
1117 of an argument with the specified mode and type. If it is not defined,
1118 PARM_BOUNDARY is used for all arguments.
1120 Windows NT wants anything >= 8 bytes to be double word aligned.
1122 V.4 wants long longs to be double word aligned. */
1125 function_arg_boundary (mode, type)
1126 enum machine_mode mode;
1129 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && mode == DImode)
1132 if (DEFAULT_ABI != ABI_NT || TARGET_64BIT)
1133 return PARM_BOUNDARY;
1135 if (mode != BLKmode)
1136 return (GET_MODE_SIZE (mode)) >= 8 ? 64 : 32;
1138 return (int_size_in_bytes (type) >= 8) ? 64 : 32;
1141 /* Update the data in CUM to advance over an argument
1142 of mode MODE and data type TYPE.
1143 (TYPE is null for libcalls where that information may not be available.) */
1146 function_arg_advance (cum, mode, type, named)
1147 CUMULATIVE_ARGS *cum;
1148 enum machine_mode mode;
1152 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
1153 cum->words += align;
1154 cum->nargs_prototype--;
1156 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1158 /* Long longs must not be split between registers and stack */
1159 if ((GET_MODE_CLASS (mode) != MODE_FLOAT || TARGET_SOFT_FLOAT)
1160 && type && !AGGREGATE_TYPE_P (type)
1161 && cum->words < GP_ARG_NUM_REG
1162 && cum->words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG)
1164 cum->words = GP_ARG_NUM_REG;
1167 /* Aggregates get passed as pointers */
1168 if (type && AGGREGATE_TYPE_P (type))
1171 /* Floats go in registers, & don't occupy space in the GP registers
1172 like they do for AIX unless software floating point. */
1173 else if (GET_MODE_CLASS (mode) == MODE_FLOAT
1174 && TARGET_HARD_FLOAT
1175 && cum->fregno <= FP_ARG_V4_MAX_REG)
1179 cum->words += RS6000_ARG_SIZE (mode, type, 1);
1184 cum->words += RS6000_ARG_SIZE (mode, type, named);
1185 if (GET_MODE_CLASS (mode) == MODE_FLOAT && TARGET_HARD_FLOAT)
1189 if (TARGET_DEBUG_ARG)
1191 "function_adv: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1192 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
1195 /* Determine where to put an argument to a function.
1196 Value is zero to push the argument on the stack,
1197 or a hard register in which to store the argument.
1199 MODE is the argument's machine mode.
1200 TYPE is the data type of the argument (as a tree).
1201 This is null for libcalls where that information may
1203 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1204 the preceding args and about the function being called.
1205 NAMED is nonzero if this argument is a named parameter
1206 (otherwise it is an extra parameter matching an ellipsis).
1208 On RS/6000 the first eight words of non-FP are normally in registers
1209 and the rest are pushed. Under AIX, the first 13 FP args are in registers.
1210 Under V.4, the first 8 FP args are in registers.
1212 If this is floating-point and no prototype is specified, we use
1213 both an FP and integer register (or possibly FP reg and stack). Library
1214 functions (when TYPE is zero) always have the proper types for args,
1215 so we can pass the FP value just in one register. emit_library_function
1216 doesn't support PARALLEL anyway. */
1219 function_arg (cum, mode, type, named)
1220 CUMULATIVE_ARGS *cum;
1221 enum machine_mode mode;
1225 int align = ((cum->words & 1) != 0 && function_arg_boundary (mode, type) == 64) ? 1 : 0;
1226 int align_words = cum->words + align;
1228 if (TARGET_DEBUG_ARG)
1230 "function_arg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, named = %d, align = %d\n",
1231 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), named, align);
1233 /* Return a marker to indicate whether CR1 needs to set or clear the bit that V.4
1234 uses to say fp args were passed in registers. Assume that we don't need the
1235 marker for software floating point, or compiler generated library calls. */
1236 if (mode == VOIDmode)
1238 enum rs6000_abi abi = DEFAULT_ABI;
1240 if ((abi == ABI_V4 || abi == ABI_SOLARIS)
1241 && TARGET_HARD_FLOAT
1242 && cum->nargs_prototype < 0
1243 && type && (cum->prototype || TARGET_NO_PROTOTYPE))
1245 return GEN_INT (cum->call_cookie
1246 | ((cum->fregno == FP_ARG_MIN_REG)
1247 ? CALL_V4_SET_FP_ARGS
1248 : CALL_V4_CLEAR_FP_ARGS));
1251 return GEN_INT (cum->call_cookie);
1256 if (DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS)
1260 if (type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST)
1263 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1265 if (DEFAULT_ABI == ABI_V4 /* V.4 never passes FP values in GP registers */
1266 || DEFAULT_ABI == ABI_SOLARIS
1268 || ((cum->nargs_prototype > 0)
1269 /* IBM AIX extended its linkage convention definition always to
1270 require FP args after register save area hole on the stack. */
1271 && (DEFAULT_ABI != ABI_AIX
1273 || (align_words < GP_ARG_NUM_REG))))
1274 return gen_rtx (REG, mode, cum->fregno);
1276 return gen_rtx (PARALLEL, mode,
1279 gen_rtx (EXPR_LIST, VOIDmode,
1280 ((align_words >= GP_ARG_NUM_REG)
1283 + RS6000_ARG_SIZE (mode, type, named)
1285 /* If this is partially on the stack, then
1286 we only include the portion actually
1287 in registers here. */
1288 ? gen_rtx (REG, SImode,
1289 GP_ARG_MIN_REG + align_words)
1290 : gen_rtx (REG, mode,
1291 GP_ARG_MIN_REG + align_words))),
1293 gen_rtx (EXPR_LIST, VOIDmode,
1294 gen_rtx (REG, mode, cum->fregno),
1298 /* Long longs won't be split between register and stack */
1299 else if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) &&
1300 align_words + RS6000_ARG_SIZE (mode, type, named) > GP_ARG_NUM_REG)
1305 else if (align_words < GP_ARG_NUM_REG)
1306 return gen_rtx (REG, mode, GP_ARG_MIN_REG + align_words);
1311 /* For an arg passed partly in registers and partly in memory,
1312 this is the number of registers used.
1313 For args passed entirely in registers or entirely in memory, zero. */
1316 function_arg_partial_nregs (cum, mode, type, named)
1317 CUMULATIVE_ARGS *cum;
1318 enum machine_mode mode;
1325 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1328 if (USE_FP_FOR_ARG_P (*cum, mode, type))
1330 if (cum->nargs_prototype >= 0)
1334 if (cum->words < GP_ARG_NUM_REG
1335 && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type, named)))
1337 int ret = GP_ARG_NUM_REG - cum->words;
1338 if (ret && TARGET_DEBUG_ARG)
1339 fprintf (stderr, "function_arg_partial_nregs: %d\n", ret);
1347 /* A C expression that indicates when an argument must be passed by
1348 reference. If nonzero for an argument, a copy of that argument is
1349 made in memory and a pointer to the argument is passed instead of
1350 the argument itself. The pointer is passed in whatever way is
1351 appropriate for passing a pointer to that type.
1353 Under V.4, structures and unions are passed by reference. */
1356 function_arg_pass_by_reference (cum, mode, type, named)
1357 CUMULATIVE_ARGS *cum;
1358 enum machine_mode mode;
1362 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
1363 && type && AGGREGATE_TYPE_P (type))
1365 if (TARGET_DEBUG_ARG)
1366 fprintf (stderr, "function_arg_pass_by_reference: aggregate\n");
1375 /* Perform any needed actions needed for a function that is receiving a
1376 variable number of arguments.
1380 MODE and TYPE are the mode and type of the current parameter.
1382 PRETEND_SIZE is a variable that should be set to the amount of stack
1383 that must be pushed by the prolog to pretend that our caller pushed
1386 Normally, this macro will push all remaining incoming registers on the
1387 stack and set PRETEND_SIZE to the length of the registers pushed. */
1390 setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
1391 CUMULATIVE_ARGS *cum;
1392 enum machine_mode mode;
1398 rtx save_area = virtual_incoming_args_rtx;
1399 int reg_size = (TARGET_64BIT) ? 8 : 4;
1401 if (TARGET_DEBUG_ARG)
1403 "setup_vararg: words = %2d, fregno = %2d, nargs = %4d, proto = %d, mode = %4s, no_rtl= %d\n",
1404 cum->words, cum->fregno, cum->nargs_prototype, cum->prototype, GET_MODE_NAME (mode), no_rtl);
1406 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && !no_rtl)
1408 rs6000_sysv_varargs_p = 1;
1409 save_area = plus_constant (frame_pointer_rtx, RS6000_VARARGS_OFFSET);
1414 int first_reg_offset = cum->words;
1416 if (MUST_PASS_IN_STACK (mode, type))
1417 first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type, 1);
1419 if (first_reg_offset > GP_ARG_NUM_REG)
1420 first_reg_offset = GP_ARG_NUM_REG;
1422 if (!no_rtl && first_reg_offset != GP_ARG_NUM_REG)
1424 (GP_ARG_MIN_REG + first_reg_offset,
1425 gen_rtx (MEM, BLKmode,
1426 plus_constant (save_area, first_reg_offset * reg_size)),
1427 GP_ARG_NUM_REG - first_reg_offset,
1428 (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD);
1430 *pretend_size = (GP_ARG_NUM_REG - first_reg_offset) * UNITS_PER_WORD;
1433 /* Save FP registers if needed. */
1434 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) && TARGET_HARD_FLOAT && !no_rtl)
1436 int fregno = cum->fregno;
1437 int num_fp_reg = FP_ARG_V4_MAX_REG + 1 - fregno;
1439 if (num_fp_reg >= 0)
1441 rtx cr1 = gen_rtx (REG, CCmode, 69);
1442 rtx lab = gen_label_rtx ();
1443 int off = (GP_ARG_NUM_REG * reg_size) + ((fregno - FP_ARG_MIN_REG) * 8);
1445 emit_jump_insn (gen_rtx (SET, VOIDmode,
1447 gen_rtx (IF_THEN_ELSE, VOIDmode,
1448 gen_rtx (NE, VOIDmode, cr1, const0_rtx),
1449 gen_rtx (LABEL_REF, VOIDmode, lab),
1452 while ( num_fp_reg-- >= 0)
1454 emit_move_insn (gen_rtx (MEM, DFmode, plus_constant (save_area, off)),
1455 gen_rtx (REG, DFmode, fregno++));
1464 /* If defined, is a C expression that produces the machine-specific
1465 code for a call to `__builtin_saveregs'. This code will be moved
1466 to the very beginning of the function, before any parameter access
1467 are made. The return value of this function should be an RTX that
1468 contains the value to use as the return of `__builtin_saveregs'.
1470 The argument ARGS is a `tree_list' containing the arguments that
1471 were passed to `__builtin_saveregs'.
1473 If this macro is not defined, the compiler will output an ordinary
1474 call to the library function `__builtin_saveregs'.
1476 On the Power/PowerPC return the address of the area on the stack
1477 used to hold arguments. Under AIX, this includes the 8 word register
1478 save area. Under V.4 this does not. */
1481 expand_builtin_saveregs (args)
1484 return virtual_incoming_args_rtx;
1488 /* Generate a memory reference for expand_block_move, copying volatile,
1489 and other bits from an original memory reference. */
1492 expand_block_move_mem (mode, addr, orig_mem)
1493 enum machine_mode mode;
1497 rtx mem = gen_rtx (MEM, mode, addr);
1499 RTX_UNCHANGING_P (mem) = RTX_UNCHANGING_P (orig_mem);
1500 MEM_VOLATILE_P (mem) = MEM_VOLATILE_P (orig_mem);
1501 MEM_IN_STRUCT_P (mem) = MEM_IN_STRUCT_P (orig_mem);
1502 #ifdef MEM_UNALIGNED_P
1503 MEM_UNALIGNED_P (mem) = MEM_UNALIGNED_P (orig_mem);
1508 /* Expand a block move operation, and return 1 if successful. Return 0
1509 if we should let the compiler generate normal code.
1511 operands[0] is the destination
1512 operands[1] is the source
1513 operands[2] is the length
1514 operands[3] is the alignment */
1516 #define MAX_MOVE_REG 4
1519 expand_block_move (operands)
1522 rtx orig_dest = operands[0];
1523 rtx orig_src = operands[1];
1524 rtx bytes_rtx = operands[2];
1525 rtx align_rtx = operands[3];
1526 int constp = (GET_CODE (bytes_rtx) == CONST_INT);
1527 int align = XINT (align_rtx, 0);
1537 rtx stores[MAX_MOVE_REG];
1540 /* If this is not a fixed size move, just call memcpy */
1544 /* Anything to move? */
1545 bytes = INTVAL (bytes_rtx);
1549 /* Don't support real large moves. If string instructions are not used,
1550 then don't generate more than 8 loads. */
1556 else if (!STRICT_ALIGNMENT)
1561 else if (bytes > 8*align)
1564 /* Move the address into scratch registers. */
1565 dest_reg = copy_addr_to_reg (XEXP (orig_dest, 0));
1566 src_reg = copy_addr_to_reg (XEXP (orig_src, 0));
1568 if (TARGET_STRING) /* string instructions are available */
1570 for ( ; bytes > 0; bytes -= move_bytes)
1572 if (bytes > 24 /* move up to 32 bytes at a time */
1582 move_bytes = (bytes > 32) ? 32 : bytes;
1583 emit_insn (gen_movstrsi_8reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1584 expand_block_move_mem (BLKmode, src_reg, orig_src),
1585 GEN_INT ((move_bytes == 32) ? 0 : move_bytes),
1588 else if (bytes > 16 /* move up to 24 bytes at a time */
1596 move_bytes = (bytes > 24) ? 24 : bytes;
1597 emit_insn (gen_movstrsi_6reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1598 expand_block_move_mem (BLKmode, src_reg, orig_src),
1599 GEN_INT (move_bytes),
1602 else if (bytes > 8 /* move up to 16 bytes at a time */
1608 move_bytes = (bytes > 16) ? 16 : bytes;
1609 emit_insn (gen_movstrsi_4reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1610 expand_block_move_mem (BLKmode, src_reg, orig_src),
1611 GEN_INT (move_bytes),
1614 else if (bytes > 4 && !TARGET_64BIT)
1615 { /* move up to 8 bytes at a time */
1616 move_bytes = (bytes > 8) ? 8 : bytes;
1617 emit_insn (gen_movstrsi_2reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1618 expand_block_move_mem (BLKmode, src_reg, orig_src),
1619 GEN_INT (move_bytes),
1622 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1623 { /* move 4 bytes */
1625 tmp_reg = gen_reg_rtx (SImode);
1626 emit_move_insn (tmp_reg, expand_block_move_mem (SImode, src_reg, orig_src));
1627 emit_move_insn (expand_block_move_mem (SImode, dest_reg, orig_dest), tmp_reg);
1629 else if (bytes == 2 && (align >= 2 || !STRICT_ALIGNMENT))
1630 { /* move 2 bytes */
1632 tmp_reg = gen_reg_rtx (HImode);
1633 emit_move_insn (tmp_reg, expand_block_move_mem (HImode, src_reg, orig_src));
1634 emit_move_insn (expand_block_move_mem (HImode, dest_reg, orig_dest), tmp_reg);
1636 else if (bytes == 1) /* move 1 byte */
1639 tmp_reg = gen_reg_rtx (QImode);
1640 emit_move_insn (tmp_reg, expand_block_move_mem (QImode, src_reg, orig_src));
1641 emit_move_insn (expand_block_move_mem (QImode, dest_reg, orig_dest), tmp_reg);
1644 { /* move up to 4 bytes at a time */
1645 move_bytes = (bytes > 4) ? 4 : bytes;
1646 emit_insn (gen_movstrsi_1reg (expand_block_move_mem (BLKmode, dest_reg, orig_dest),
1647 expand_block_move_mem (BLKmode, src_reg, orig_src),
1648 GEN_INT (move_bytes),
1652 if (bytes > move_bytes)
1654 emit_insn (gen_addsi3 (src_reg, src_reg, GEN_INT (move_bytes)));
1655 emit_insn (gen_addsi3 (dest_reg, dest_reg, GEN_INT (move_bytes)));
1660 else /* string instructions not available */
1662 num_reg = offset = 0;
1663 for ( ; bytes > 0; (bytes -= move_bytes), (offset += move_bytes))
1665 /* Calculate the correct offset for src/dest */
1669 dest_addr = dest_reg;
1673 src_addr = gen_rtx (PLUS, Pmode, src_reg, GEN_INT (offset));
1674 dest_addr = gen_rtx (PLUS, Pmode, dest_reg, GEN_INT (offset));
1677 /* Generate the appropriate load and store, saving the stores for later */
1678 if (bytes >= 8 && TARGET_64BIT && (align >= 8 || !STRICT_ALIGNMENT))
1681 tmp_reg = gen_reg_rtx (DImode);
1682 emit_insn (gen_movdi (tmp_reg, expand_block_move_mem (DImode, src_addr, orig_src)));
1683 stores[ num_reg++ ] = gen_movdi (expand_block_move_mem (DImode, dest_addr, orig_dest), tmp_reg);
1685 else if (bytes >= 4 && (align >= 4 || !STRICT_ALIGNMENT))
1688 tmp_reg = gen_reg_rtx (SImode);
1689 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (SImode, src_addr, orig_src)));
1690 stores[ num_reg++ ] = gen_movsi (expand_block_move_mem (SImode, dest_addr, orig_dest), tmp_reg);
1692 else if (bytes >= 2 && (align >= 2 || !STRICT_ALIGNMENT))
1695 tmp_reg = gen_reg_rtx (HImode);
1696 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (HImode, src_addr, orig_src)));
1697 stores[ num_reg++ ] = gen_movhi (expand_block_move_mem (HImode, dest_addr, orig_dest), tmp_reg);
1702 tmp_reg = gen_reg_rtx (QImode);
1703 emit_insn (gen_movsi (tmp_reg, expand_block_move_mem (QImode, src_addr, orig_src)));
1704 stores[ num_reg++ ] = gen_movqi (expand_block_move_mem (QImode, dest_addr, orig_dest), tmp_reg);
1707 if (num_reg >= MAX_MOVE_REG)
1709 for (i = 0; i < num_reg; i++)
1710 emit_insn (stores[i]);
1715 for (i = 0; i < num_reg; i++)
1716 emit_insn (stores[i]);
1723 /* Return 1 if OP is a load multiple operation. It is known to be a
1724 PARALLEL and the first section will be tested. */
1727 load_multiple_operation (op, mode)
1729 enum machine_mode mode;
1731 int count = XVECLEN (op, 0);
1736 /* Perform a quick check so we don't blow up below. */
1738 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1739 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != REG
1740 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != MEM)
1743 dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
1744 src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
1746 for (i = 1; i < count; i++)
1748 rtx elt = XVECEXP (op, 0, i);
1750 if (GET_CODE (elt) != SET
1751 || GET_CODE (SET_DEST (elt)) != REG
1752 || GET_MODE (SET_DEST (elt)) != SImode
1753 || REGNO (SET_DEST (elt)) != dest_regno + i
1754 || GET_CODE (SET_SRC (elt)) != MEM
1755 || GET_MODE (SET_SRC (elt)) != SImode
1756 || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
1757 || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
1758 || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
1759 || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1)) != i * 4)
1766 /* Similar, but tests for store multiple. Here, the second vector element
1767 is a CLOBBER. It will be tested later. */
1770 store_multiple_operation (op, mode)
1772 enum machine_mode mode;
1774 int count = XVECLEN (op, 0) - 1;
1779 /* Perform a quick check so we don't blow up below. */
1781 || GET_CODE (XVECEXP (op, 0, 0)) != SET
1782 || GET_CODE (SET_DEST (XVECEXP (op, 0, 0))) != MEM
1783 || GET_CODE (SET_SRC (XVECEXP (op, 0, 0))) != REG)
1786 src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
1787 dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
1789 for (i = 1; i < count; i++)
1791 rtx elt = XVECEXP (op, 0, i + 1);
1793 if (GET_CODE (elt) != SET
1794 || GET_CODE (SET_SRC (elt)) != REG
1795 || GET_MODE (SET_SRC (elt)) != SImode
1796 || REGNO (SET_SRC (elt)) != src_regno + i
1797 || GET_CODE (SET_DEST (elt)) != MEM
1798 || GET_MODE (SET_DEST (elt)) != SImode
1799 || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
1800 || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
1801 || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
1802 || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1)) != i * 4)
1809 /* Return 1 if OP is a comparison operation that is valid for a branch insn.
1810 We only check the opcode against the mode of the CC value here. */
1813 branch_comparison_operator (op, mode)
1815 enum machine_mode mode;
1817 enum rtx_code code = GET_CODE (op);
1818 enum machine_mode cc_mode;
1820 if (GET_RTX_CLASS (code) != '<')
1823 cc_mode = GET_MODE (XEXP (op, 0));
1824 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1827 if ((code == GT || code == LT || code == GE || code == LE)
1828 && cc_mode == CCUNSmode)
1831 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1832 && (cc_mode != CCUNSmode))
1838 /* Return 1 if OP is a comparison operation that is valid for an scc insn.
1839 We check the opcode against the mode of the CC value and disallow EQ or
1840 NE comparisons for integers. */
1843 scc_comparison_operator (op, mode)
1845 enum machine_mode mode;
1847 enum rtx_code code = GET_CODE (op);
1848 enum machine_mode cc_mode;
1850 if (GET_MODE (op) != mode && mode != VOIDmode)
1853 if (GET_RTX_CLASS (code) != '<')
1856 cc_mode = GET_MODE (XEXP (op, 0));
1857 if (GET_MODE_CLASS (cc_mode) != MODE_CC)
1860 if (code == NE && cc_mode != CCFPmode)
1863 if ((code == GT || code == LT || code == GE || code == LE)
1864 && cc_mode == CCUNSmode)
1867 if ((code == GTU || code == LTU || code == GEU || code == LEU)
1868 && (cc_mode != CCUNSmode))
1871 if (cc_mode == CCEQmode && code != EQ && code != NE)
1877 /* Return 1 if ANDOP is a mask that has no bits on that are not in the
1878 mask required to convert the result of a rotate insn into a shift
1879 left insn of SHIFTOP bits. Both are known to be CONST_INT. */
1882 includes_lshift_p (shiftop, andop)
1883 register rtx shiftop;
1886 int shift_mask = (~0 << INTVAL (shiftop));
1888 return (INTVAL (andop) & ~shift_mask) == 0;
1891 /* Similar, but for right shift. */
1894 includes_rshift_p (shiftop, andop)
1895 register rtx shiftop;
1898 unsigned shift_mask = ~(unsigned)0;
1900 shift_mask >>= INTVAL (shiftop);
1902 return (INTVAL (andop) & ~ shift_mask) == 0;
1905 /* Return 1 if REGNO (reg1) == REGNO (reg2) - 1 making them candidates
1906 for lfq and stfq insns.
1908 Note reg1 and reg2 *must* be hard registers. To be sure we will
1909 abort if we are passed pseudo registers. */
1912 registers_ok_for_quad_peep (reg1, reg2)
1915 /* We might have been passed a SUBREG. */
1916 if (GET_CODE (reg1) != REG || GET_CODE (reg2) != REG)
1919 return (REGNO (reg1) == REGNO (reg2) - 1);
1922 /* Return 1 if addr1 and addr2 are suitable for lfq or stfq insn. addr1 and
1923 addr2 must be in consecutive memory locations (addr2 == addr1 + 8). */
1926 addrs_ok_for_quad_peep (addr1, addr2)
1933 /* Extract an offset (if used) from the first addr. */
1934 if (GET_CODE (addr1) == PLUS)
1936 /* If not a REG, return zero. */
1937 if (GET_CODE (XEXP (addr1, 0)) != REG)
1941 reg1 = REGNO (XEXP (addr1, 0));
1942 /* The offset must be constant! */
1943 if (GET_CODE (XEXP (addr1, 1)) != CONST_INT)
1945 offset1 = INTVAL (XEXP (addr1, 1));
1948 else if (GET_CODE (addr1) != REG)
1952 reg1 = REGNO (addr1);
1953 /* This was a simple (mem (reg)) expression. Offset is 0. */
1957 /* Make sure the second address is a (mem (plus (reg) (const_int). */
1958 if (GET_CODE (addr2) != PLUS)
1961 if (GET_CODE (XEXP (addr2, 0)) != REG
1962 || GET_CODE (XEXP (addr2, 1)) != CONST_INT)
1965 if (reg1 != REGNO (XEXP (addr2, 0)))
1968 /* The offset for the second addr must be 8 more than the first addr. */
1969 if (INTVAL (XEXP (addr2, 1)) != offset1 + 8)
1972 /* All the tests passed. addr1 and addr2 are valid for lfq or stfq
1977 /* Return the register class of a scratch register needed to copy IN into
1978 or out of a register in CLASS in MODE. If it can be done directly,
1979 NO_REGS is returned. */
1982 secondary_reload_class (class, mode, in)
1983 enum reg_class class;
1984 enum machine_mode mode;
1987 int regno = true_regnum (in);
1989 if (regno >= FIRST_PSEUDO_REGISTER)
1992 /* We can place anything into GENERAL_REGS and can put GENERAL_REGS
1994 if (class == GENERAL_REGS || class == BASE_REGS
1995 || (regno >= 0 && INT_REGNO_P (regno)))
1998 /* Constants, memory, and FP registers can go into FP registers. */
1999 if ((regno == -1 || FP_REGNO_P (regno))
2000 && (class == FLOAT_REGS || class == NON_SPECIAL_REGS))
2003 /* We can copy among the CR registers. */
2004 if ((class == CR_REGS || class == CR0_REGS)
2005 && regno >= 0 && CR_REGNO_P (regno))
2008 /* Otherwise, we need GENERAL_REGS. */
2009 return GENERAL_REGS;
2012 /* Given a comparison operation, return the bit number in CCR to test. We
2013 know this is a valid comparison.
2015 SCC_P is 1 if this is for an scc. That means that %D will have been
2016 used instead of %C, so the bits will be in different places.
2018 Return -1 if OP isn't a valid comparison for some reason. */
2025 enum rtx_code code = GET_CODE (op);
2026 enum machine_mode cc_mode;
2030 if (GET_RTX_CLASS (code) != '<')
2033 cc_mode = GET_MODE (XEXP (op, 0));
2034 cc_regnum = REGNO (XEXP (op, 0));
2035 base_bit = 4 * (cc_regnum - 68);
2037 /* In CCEQmode cases we have made sure that the result is always in the
2038 third bit of the CR field. */
2040 if (cc_mode == CCEQmode)
2041 return base_bit + 3;
2046 return scc_p ? base_bit + 3 : base_bit + 2;
2048 return base_bit + 2;
2050 return base_bit + 1;
2055 /* If floating-point, we will have done a cror to put the bit in the
2056 unordered position. So test that bit. For integer, this is ! LT
2057 unless this is an scc insn. */
2058 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit;
2061 return cc_mode == CCFPmode || scc_p ? base_bit + 3 : base_bit + 1;
2068 /* Return the GOT register, creating it if needed. */
2071 rs6000_got_register (value)
2074 if (!pic_offset_table_rtx)
2076 if (reload_in_progress || reload_completed)
2077 fatal_insn ("internal error -- needed new GOT register during reload phase to load:", value);
2079 current_function_uses_pic_offset_table = 1;
2080 pic_offset_table_rtx = gen_rtx (REG, Pmode, GOT_TOC_REGNUM);
2083 return pic_offset_table_rtx;
2087 /* Replace all occurances of register FROM with an new pseduo register in an insn X.
2088 Store the pseudo register used in REG.
2089 This is only safe during FINALIZE_PIC, since the registers haven't been setup
2093 rs6000_replace_regno (x, from, reg)
2101 /* Allow this function to make replacements in EXPR_LISTs. */
2105 switch (GET_CODE (x))
2118 if (REGNO (x) == from)
2121 *reg = pic_offset_table_rtx = gen_reg_rtx (Pmode);
2129 fmt = GET_RTX_FORMAT (GET_CODE (x));
2130 for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--)
2133 XEXP (x, i) = rs6000_replace_regno (XEXP (x, i), from, reg);
2134 else if (fmt[i] == 'E')
2135 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
2136 XVECEXP (x, i, j) = rs6000_replace_regno (XVECEXP (x, i, j), from, reg);
2143 /* By generating position-independent code, when two different
2144 programs (A and B) share a common library (libC.a), the text of
2145 the library can be shared whether or not the library is linked at
2146 the same address for both programs. In some of these
2147 environments, position-independent code requires not only the use
2148 of different addressing modes, but also special code to enable the
2149 use of these addressing modes.
2151 The `FINALIZE_PIC' macro serves as a hook to emit these special
2152 codes once the function is being compiled into assembly code, but
2153 not before. (It is not done before, because in the case of
2154 compiling an inline function, it would lead to multiple PIC
2155 prologues being included in functions which used inline functions
2156 and were compiled to assembly language.) */
2159 rs6000_finalize_pic ()
2161 /* Loop through all of the insns, replacing the special GOT_TOC_REGNUM
2162 with an appropriate pseduo register. If we find we need GOT/TOC,
2163 add the appropriate init code. */
2164 if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS))
2166 rtx insn = get_insns ();
2170 if (GET_CODE (insn) == NOTE)
2171 insn = next_nonnote_insn (insn);
2174 for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn))
2176 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i')
2178 PATTERN (insn) = rs6000_replace_regno (PATTERN (insn),
2182 if (REG_NOTES (insn))
2183 REG_NOTES (insn) = rs6000_replace_regno (REG_NOTES (insn),
2191 rtx init = gen_init_v4_pic (reg);
2192 emit_insn_before (init, first_insn);
2198 /* Search for any occurrance of the GOT_TOC register marker that should
2199 have been eliminated, but may have crept back in. */
2205 if (flag_pic && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS))
2207 rtx got_reg = gen_rtx (REG, Pmode, GOT_TOC_REGNUM);
2208 for ( ; insn != NULL_RTX; insn = NEXT_INSN (insn))
2209 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
2210 && reg_mentioned_p (got_reg, PATTERN (insn)))
2211 fatal_insn ("GOT/TOC register marker not removed:", PATTERN (insn));
2216 /* Define the structure for the machine field in struct function. */
2217 struct machine_function
2225 /* Functions to save and restore rs6000_fpmem_size.
2226 These will be called, via pointer variables,
2227 from push_function_context and pop_function_context. */
2230 rs6000_save_machine_status (p)
2233 struct machine_function *machine =
2234 (struct machine_function *) xmalloc (sizeof (struct machine_function));
2236 p->machine = machine;
2237 machine->sysv_varargs_p = rs6000_sysv_varargs_p;
2238 machine->save_toc_p = rs6000_save_toc_p;
2239 machine->fpmem_size = rs6000_fpmem_size;
2240 machine->fpmem_offset = rs6000_fpmem_offset;
2244 rs6000_restore_machine_status (p)
2247 struct machine_function *machine = p->machine;
2249 rs6000_sysv_varargs_p = machine->sysv_varargs_p;
2250 rs6000_save_toc_p = machine->save_toc_p;
2251 rs6000_fpmem_size = machine->fpmem_size;
2252 rs6000_fpmem_offset = machine->fpmem_offset;
2255 p->machine = (struct machine_function *)0;
2258 /* Do anything needed before RTL is emitted for each function. */
2261 rs6000_init_expanders ()
2263 /* Reset varargs and save TOC indicator */
2264 rs6000_sysv_varargs_p = 0;
2265 rs6000_save_toc_p = 0;
2266 rs6000_fpmem_size = 0;
2267 rs6000_fpmem_offset = 0;
2268 pic_offset_table_rtx = (rtx)0;
2270 /* Arrange to save and restore machine status around nested functions. */
2271 save_machine_status = rs6000_save_machine_status;
2272 restore_machine_status = rs6000_restore_machine_status;
2276 /* Print an operand. Recognize special options, documented below. */
2279 #define SMALL_DATA_RELOC ((rs6000_sdata == SDATA_EABI) ? "sda21" : "sdarel")
2281 #define SMALL_DATA_RELOC "sda21"
2285 print_operand (file, x, code)
2293 /* These macros test for integers and extract the low-order bits. */
2295 ((GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE) \
2296 && GET_MODE (X) == VOIDmode)
2298 #define INT_LOWPART(X) \
2299 (GET_CODE (X) == CONST_INT ? INTVAL (X) : CONST_DOUBLE_LOW (X))
2304 /* Write out an instruction after the call which may be replaced
2305 with glue code by the loader. This depends on the AIX version. */
2306 asm_fprintf (file, RS6000_CALL_GLUE);
2310 /* Write the register number of the TOC register. */
2311 fputs (TARGET_MINIMAL_TOC ? reg_names[30] : reg_names[2], file);
2315 /* Write out either a '.' or '$' for the current location, depending
2316 on whether this is Solaris or not. */
2317 putc ((DEFAULT_ABI == ABI_SOLARIS) ? '.' : '$', file);
2321 /* If X is a constant integer whose low-order 5 bits are zero,
2322 write 'l'. Otherwise, write 'r'. This is a kludge to fix a bug
2323 in the AIX assembler where "sri" with a zero shift count
2324 write a trash instruction. */
2325 if (GET_CODE (x) == CONST_INT && (INTVAL (x) & 31) == 0)
2332 /* Low-order 16 bits of constant, unsigned. */
2334 output_operand_lossage ("invalid %%b value");
2336 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
2340 /* This is an optional cror needed for LE or GE floating-point
2341 comparisons. Otherwise write nothing. */
2342 if ((GET_CODE (x) == LE || GET_CODE (x) == GE)
2343 && GET_MODE (XEXP (x, 0)) == CCFPmode)
2345 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
2347 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
2348 base_bit + 2, base_bit + (GET_CODE (x) == GE));
2353 /* Similar, except that this is for an scc, so we must be able to
2354 encode the test in a single bit that is one. We do the above
2355 for any LE, GE, GEU, or LEU and invert the bit for NE. */
2356 if (GET_CODE (x) == LE || GET_CODE (x) == GE
2357 || GET_CODE (x) == LEU || GET_CODE (x) == GEU)
2359 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
2361 fprintf (file, "cror %d,%d,%d\n\t", base_bit + 3,
2363 base_bit + (GET_CODE (x) == GE || GET_CODE (x) == GEU));
2366 else if (GET_CODE (x) == NE)
2368 int base_bit = 4 * (REGNO (XEXP (x, 0)) - 68);
2370 fprintf (file, "crnor %d,%d,%d\n\t", base_bit + 3,
2371 base_bit + 2, base_bit + 2);
2376 /* X is a CR register. Print the number of the third bit of the CR */
2377 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2378 output_operand_lossage ("invalid %%E value");
2380 fprintf(file, "%d", 4 * (REGNO (x) - 68) + 3);
2384 /* X is a CR register. Print the shift count needed to move it
2385 to the high-order four bits. */
2386 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2387 output_operand_lossage ("invalid %%f value");
2389 fprintf (file, "%d", 4 * (REGNO (x) - 68));
2393 /* Similar, but print the count for the rotate in the opposite
2395 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2396 output_operand_lossage ("invalid %%F value");
2398 fprintf (file, "%d", 32 - 4 * (REGNO (x) - 68));
2402 /* X is a constant integer. If it is negative, print "m",
2403 otherwise print "z". This is to make a aze or ame insn. */
2404 if (GET_CODE (x) != CONST_INT)
2405 output_operand_lossage ("invalid %%G value");
2406 else if (INTVAL (x) >= 0)
2413 /* If constant, output low-order five bits. Otherwise,
2416 fprintf (file, "%d", INT_LOWPART (x) & 31);
2418 print_operand (file, x, 0);
2422 /* If constant, output low-order six bits. Otherwise,
2425 fprintf (file, "%d", INT_LOWPART (x) & 63);
2427 print_operand (file, x, 0);
2431 /* Print `i' if this is a constant, else nothing. */
2437 /* Write the bit number in CCR for jump. */
2440 output_operand_lossage ("invalid %%j code");
2442 fprintf (file, "%d", i);
2446 /* Similar, but add one for shift count in rlinm for scc and pass
2447 scc flag to `ccr_bit'. */
2450 output_operand_lossage ("invalid %%J code");
2452 /* If we want bit 31, write a shift count of zero, not 32. */
2453 fprintf (file, "%d", i == 31 ? 0 : i + 1);
2457 /* X must be a constant. Write the 1's complement of the
2460 output_operand_lossage ("invalid %%k value");
2462 fprintf (file, "%d", ~ INT_LOWPART (x));
2466 /* Write second word of DImode or DFmode reference. Works on register
2467 or non-indexed memory only. */
2468 if (GET_CODE (x) == REG)
2469 fprintf (file, "%s", reg_names[REGNO (x) + 1]);
2470 else if (GET_CODE (x) == MEM)
2472 /* Handle possible auto-increment. Since it is pre-increment and
2473 we have already done it, we can just use an offset of four. */
2474 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2475 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2476 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4));
2478 output_address (plus_constant (XEXP (x, 0), 4));
2479 if (small_data_operand (x, GET_MODE (x)))
2480 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]);
2485 /* MB value for a mask operand. */
2486 if (! mask_operand (x, VOIDmode))
2487 output_operand_lossage ("invalid %%m value");
2489 val = INT_LOWPART (x);
2491 /* If the high bit is set and the low bit is not, the value is zero.
2492 If the high bit is zero, the value is the first 1 bit we find from
2494 if (val < 0 && (val & 1) == 0)
2501 for (i = 1; i < 32; i++)
2502 if ((val <<= 1) < 0)
2504 fprintf (file, "%d", i);
2508 /* Otherwise, look for the first 0 bit from the right. The result is its
2509 number plus 1. We know the low-order bit is one. */
2510 for (i = 0; i < 32; i++)
2511 if (((val >>= 1) & 1) == 0)
2514 /* If we ended in ...01, I would be 0. The correct value is 31, so
2516 fprintf (file, "%d", 31 - i);
2520 /* ME value for a mask operand. */
2521 if (! mask_operand (x, VOIDmode))
2522 output_operand_lossage ("invalid %%m value");
2524 val = INT_LOWPART (x);
2526 /* If the low bit is set and the high bit is not, the value is 31.
2527 If the low bit is zero, the value is the first 1 bit we find from
2529 if ((val & 1) && val >= 0)
2534 else if ((val & 1) == 0)
2536 for (i = 0; i < 32; i++)
2537 if ((val >>= 1) & 1)
2540 /* If we had ....10, I would be 0. The result should be
2541 30, so we need 30 - i. */
2542 fprintf (file, "%d", 30 - i);
2546 /* Otherwise, look for the first 0 bit from the left. The result is its
2547 number minus 1. We know the high-order bit is one. */
2548 for (i = 0; i < 32; i++)
2549 if ((val <<= 1) >= 0)
2552 fprintf (file, "%d", i);
2556 /* Write the number of elements in the vector times 4. */
2557 if (GET_CODE (x) != PARALLEL)
2558 output_operand_lossage ("invalid %%N value");
2560 fprintf (file, "%d", XVECLEN (x, 0) * 4);
2564 /* Similar, but subtract 1 first. */
2565 if (GET_CODE (x) != PARALLEL)
2566 output_operand_lossage ("invalid %%N value");
2568 fprintf (file, "%d", (XVECLEN (x, 0) - 1) * 4);
2572 /* X is a CONST_INT that is a power of two. Output the logarithm. */
2574 || (i = exact_log2 (INT_LOWPART (x))) < 0)
2575 output_operand_lossage ("invalid %%p value");
2577 fprintf (file, "%d", i);
2581 /* The operand must be an indirect memory reference. The result
2582 is the register number. */
2583 if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG
2584 || REGNO (XEXP (x, 0)) >= 32)
2585 output_operand_lossage ("invalid %%P value");
2587 fprintf (file, "%d", REGNO (XEXP (x, 0)));
2591 /* X is a CR register. Print the mask for `mtcrf'. */
2592 if (GET_CODE (x) != REG || ! CR_REGNO_P (REGNO (x)))
2593 output_operand_lossage ("invalid %%R value");
2595 fprintf (file, "%d", 128 >> (REGNO (x) - 68));
2599 /* Low 5 bits of 32 - value */
2601 output_operand_lossage ("invalid %%s value");
2603 fprintf (file, "%d", (32 - INT_LOWPART (x)) & 31);
2607 /* Write 12 if this jump operation will branch if true, 4 otherwise.
2608 All floating-point operations except NE branch true and integer
2609 EQ, LT, GT, LTU and GTU also branch true. */
2610 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2611 output_operand_lossage ("invalid %%t value");
2613 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2614 && GET_CODE (x) != NE)
2615 || GET_CODE (x) == EQ
2616 || GET_CODE (x) == LT || GET_CODE (x) == GT
2617 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2624 /* Opposite of 't': write 4 if this jump operation will branch if true,
2626 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
2627 output_operand_lossage ("invalid %%t value");
2629 else if ((GET_MODE (XEXP (x, 0)) == CCFPmode
2630 && GET_CODE (x) != NE)
2631 || GET_CODE (x) == EQ
2632 || GET_CODE (x) == LT || GET_CODE (x) == GT
2633 || GET_CODE (x) == LTU || GET_CODE (x) == GTU)
2640 /* High-order 16 bits of constant for use in unsigned operand. */
2642 output_operand_lossage ("invalid %%u value");
2644 fprintf (file, "0x%x", (INT_LOWPART (x) >> 16) & 0xffff);
2648 /* High-order 16 bits of constant for use in signed operand. */
2650 output_operand_lossage ("invalid %%v value");
2653 int value = (INT_LOWPART (x) >> 16) & 0xffff;
2655 /* Solaris assembler doesn't like lis 0,0x80000 */
2656 if (DEFAULT_ABI == ABI_SOLARIS && (value & 0x8000) != 0)
2657 fprintf (file, "%d", value | (~0 << 16));
2659 fprintf (file, "0x%x", value);
2664 /* Print `u' if this has an auto-increment or auto-decrement. */
2665 if (GET_CODE (x) == MEM
2666 && (GET_CODE (XEXP (x, 0)) == PRE_INC
2667 || GET_CODE (XEXP (x, 0)) == PRE_DEC))
2672 /* If constant, low-order 16 bits of constant, signed. Otherwise, write
2675 fprintf (file, "%d",
2676 (INT_LOWPART (x) & 0xffff) - 2 * (INT_LOWPART (x) & 0x8000));
2678 print_operand (file, x, 0);
2682 /* If constant, low-order 16 bits of constant, unsigned.
2683 Otherwise, write normally. */
2685 fprintf (file, "%d", INT_LOWPART (x) & 0xffff);
2687 print_operand (file, x, 0);
2691 if (GET_CODE (x) == MEM
2692 && LEGITIMATE_INDEXED_ADDRESS_P (XEXP (x, 0)))
2697 /* Like 'L', for third word of TImode */
2698 if (GET_CODE (x) == REG)
2699 fprintf (file, "%s", reg_names[REGNO (x) + 2]);
2700 else if (GET_CODE (x) == MEM)
2702 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2703 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2704 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 8));
2706 output_address (plus_constant (XEXP (x, 0), 8));
2707 if (small_data_operand (x, GET_MODE (x)))
2708 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]);
2713 /* X is a SYMBOL_REF. Write out the name preceded by a
2714 period and without any trailing data in brackets. Used for function
2715 names. If we are configured for System V (or the embedded ABI) on
2716 the PowerPC, do not emit the period, since those systems do not use
2717 TOCs and the like. */
2718 if (GET_CODE (x) != SYMBOL_REF)
2721 if (XSTR (x, 0)[0] != '.')
2723 switch (DEFAULT_ABI)
2733 case ABI_AIX_NODESC:
2742 RS6000_OUTPUT_BASENAME (file, XSTR (x, 0));
2746 /* Like 'L', for last word of TImode. */
2747 if (GET_CODE (x) == REG)
2748 fprintf (file, "%s", reg_names[REGNO (x) + 3]);
2749 else if (GET_CODE (x) == MEM)
2751 if (GET_CODE (XEXP (x, 0)) == PRE_INC
2752 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
2753 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 12));
2755 output_address (plus_constant (XEXP (x, 0), 12));
2756 if (small_data_operand (x, GET_MODE (x)))
2757 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]);
2762 if (GET_CODE (x) == REG)
2763 fprintf (file, "%s", reg_names[REGNO (x)]);
2764 else if (GET_CODE (x) == MEM)
2766 /* We need to handle PRE_INC and PRE_DEC here, since we need to
2767 know the width from the mode. */
2768 if (GET_CODE (XEXP (x, 0)) == PRE_INC)
2769 fprintf (file, "%d(%d)", GET_MODE_SIZE (GET_MODE (x)),
2770 REGNO (XEXP (XEXP (x, 0), 0)));
2771 else if (GET_CODE (XEXP (x, 0)) == PRE_DEC)
2772 fprintf (file, "%d(%d)", - GET_MODE_SIZE (GET_MODE (x)),
2773 REGNO (XEXP (XEXP (x, 0), 0)));
2775 output_address (XEXP (x, 0));
2778 output_addr_const (file, x);
2782 output_operand_lossage ("invalid %%xn code");
2786 /* Print the address of an operand. */
2789 print_operand_address (file, x)
2793 if (GET_CODE (x) == REG)
2794 fprintf (file, "0(%s)", reg_names[ REGNO (x) ]);
2795 else if (GET_CODE (x) == SYMBOL_REF || GET_CODE (x) == CONST || GET_CODE (x) == LABEL_REF)
2797 output_addr_const (file, x);
2798 if (small_data_operand (x, GET_MODE (x)))
2799 fprintf (file, "@%s(%s)", SMALL_DATA_RELOC, reg_names[0]);
2801 #ifdef TARGET_NO_TOC
2802 else if (TARGET_NO_TOC)
2806 fprintf (file, "(%s)", reg_names[ TARGET_MINIMAL_TOC ? 30 : 2 ]);
2808 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == REG)
2810 if (REGNO (XEXP (x, 0)) == 0)
2811 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 1)) ],
2812 reg_names[ REGNO (XEXP (x, 0)) ]);
2814 fprintf (file, "%s,%s", reg_names[ REGNO (XEXP (x, 0)) ],
2815 reg_names[ REGNO (XEXP (x, 1)) ]);
2817 else if (GET_CODE (x) == PLUS && GET_CODE (XEXP (x, 1)) == CONST_INT)
2818 fprintf (file, "%d(%s)", INTVAL (XEXP (x, 1)), reg_names[ REGNO (XEXP (x, 0)) ]);
2819 else if (TARGET_ELF && !TARGET_64BIT && GET_CODE (x) == LO_SUM
2820 && GET_CODE (XEXP (x, 0)) == REG && CONSTANT_P (XEXP (x, 1)))
2822 output_addr_const (file, XEXP (x, 1));
2823 fprintf (file, "@l(%s)", reg_names[ REGNO (XEXP (x, 0)) ]);
2829 /* This page contains routines that are used to determine what the function
2830 prologue and epilogue code will do and write them out. */
2832 /* Return the first fixed-point register that is required to be saved. 32 if
2836 first_reg_to_save ()
2840 /* Find lowest numbered live register. */
2841 for (first_reg = 13; first_reg <= 31; first_reg++)
2842 if (regs_ever_live[first_reg])
2845 /* If profiling, then we must save/restore every register that contains
2846 a parameter before/after the .mcount call. Use registers from 30 down
2847 to 23 to do this. Don't use the frame pointer in reg 31.
2849 For now, save enough room for all of the parameter registers. */
2850 if (DEFAULT_ABI == ABI_AIX && profile_flag)
2857 /* Similar, for FP regs. */
2860 first_fp_reg_to_save ()
2864 /* Find lowest numbered live register. */
2865 for (first_reg = 14 + 32; first_reg <= 63; first_reg++)
2866 if (regs_ever_live[first_reg])
2872 /* Return non-zero if this function makes calls. */
2875 rs6000_makes_calls ()
2879 /* If we are profiling, we will be making a call to mcount. */
2883 for (insn = get_insns (); insn; insn = next_insn (insn))
2884 if (GET_CODE (insn) == CALL_INSN)
2891 /* Calculate the stack information for the current function. This is
2892 complicated by having two separate calling sequences, the AIX calling
2893 sequence and the V.4 calling sequence.
2895 AIX stack frames look like:
2897 SP----> +---------------------------------------+
2898 | back chain to caller | 0
2899 +---------------------------------------+
2901 +---------------------------------------+
2903 +---------------------------------------+
2904 | reserved for compilers | 12
2905 +---------------------------------------+
2906 | reserved for binders | 16
2907 +---------------------------------------+
2908 | saved TOC pointer | 20
2909 +---------------------------------------+
2910 | Parameter save area (P) | 24
2911 +---------------------------------------+
2912 | Alloca space (A) | 24+P
2913 +---------------------------------------+
2914 | Local variable space (L) | 24+P+A
2915 +---------------------------------------+
2916 | Float/int conversion temporary (X) | 24+P+A+L
2917 +---------------------------------------+
2918 | Save area for GP registers (G) | 24+P+A+X+L
2919 +---------------------------------------+
2920 | Save area for FP registers (F) | 24+P+A+X+L+G
2921 +---------------------------------------+
2922 old SP->| back chain to caller's caller |
2923 +---------------------------------------+
2925 V.4 stack frames look like:
2927 SP----> +---------------------------------------+
2928 | back chain to caller | 0
2929 +---------------------------------------+
2930 | caller's saved LR | 4
2931 +---------------------------------------+
2932 | Parameter save area (P) | 8
2933 +---------------------------------------+
2934 | Alloca space (A) | 8+P
2935 +---------------------------------------+
2936 | Varargs save area (V) | 8+P+A
2937 +---------------------------------------+
2938 | Local variable space (L) | 8+P+A+V
2939 +---------------------------------------+
2940 | Float/int conversion temporary (X) | 8+P+A+V+L
2941 +---------------------------------------+
2942 | saved CR (C) | 8+P+A+V+L+X
2943 +---------------------------------------+
2944 | Save area for GP registers (G) | 8+P+A+V+L+X+C
2945 +---------------------------------------+
2946 | Save area for FP registers (F) | 8+P+A+V+L+X+C+G
2947 +---------------------------------------+
2948 old SP->| back chain to caller's caller |
2949 +---------------------------------------+
2952 A PowerPC Windows/NT frame looks like:
2954 SP----> +---------------------------------------+
2955 | back chain to caller | 0
2956 +---------------------------------------+
2958 +---------------------------------------+
2960 +---------------------------------------+
2962 +---------------------------------------+
2964 +---------------------------------------+
2966 +---------------------------------------+
2967 | Parameter save area (P) | 24
2968 +---------------------------------------+
2969 | Alloca space (A) | 24+P
2970 +---------------------------------------+
2971 | Local variable space (L) | 24+P+A
2972 +---------------------------------------+
2973 | Float/int conversion temporary (X) | 24+P+A+L
2974 +---------------------------------------+
2975 | Save area for FP registers (F) | 24+P+A+L+X
2976 +---------------------------------------+
2977 | Possible alignment area (Y) | 24+P+A+L+X+F
2978 +---------------------------------------+
2979 | Save area for GP registers (G) | 24+P+A+L+X+F+Y
2980 +---------------------------------------+
2981 | Save area for CR (C) | 24+P+A+L+X+F+Y+G
2982 +---------------------------------------+
2983 | Save area for TOC (T) | 24+P+A+L+X+F+Y+G+C
2984 +---------------------------------------+
2985 | Save area for LR (R) | 24+P+A+L+X+F+Y+G+C+T
2986 +---------------------------------------+
2987 old SP->| back chain to caller's caller |
2988 +---------------------------------------+
2990 For NT, there is no specific order to save the registers, but in
2991 order to support __builtin_return_address, the save area for the
2992 link register needs to be in a known place, so we use -4 off of the
2993 old SP. To support calls through pointers, we also allocate a
2994 fixed slot to store the TOC, -8 off the old SP. */
2997 rs6000_stack_info ()
2999 static rs6000_stack_t info, zero_info;
3000 rs6000_stack_t *info_ptr = &info;
3001 int reg_size = TARGET_64BIT ? 8 : 4;
3002 enum rs6000_abi abi;
3005 /* Zero all fields portably */
3008 /* Select which calling sequence */
3009 info_ptr->abi = abi = DEFAULT_ABI;
3011 /* Calculate which registers need to be saved & save area size */
3012 info_ptr->first_gp_reg_save = first_reg_to_save ();
3013 info_ptr->gp_size = reg_size * (32 - info_ptr->first_gp_reg_save);
3015 info_ptr->first_fp_reg_save = first_fp_reg_to_save ();
3016 info_ptr->fp_size = 8 * (64 - info_ptr->first_fp_reg_save);
3018 /* Does this function call anything? */
3019 info_ptr->calls_p = rs6000_makes_calls ();
3021 /* Do we need to allocate space to save the toc? */
3022 if (rs6000_save_toc_p)
3024 info_ptr->toc_save_p = 1;
3025 info_ptr->toc_size = reg_size;
3028 /* Does this machine need the float/int conversion area? */
3029 info_ptr->fpmem_p = regs_ever_live[FPMEM_REGNUM];
3031 /* If this is main and we need to call a function to set things up,
3032 save main's arguments around the call. */
3037 if (strcmp (IDENTIFIER_POINTER (DECL_NAME (current_function_decl)), "main") == 0)
3039 info_ptr->main_p = 1;
3042 info_ptr->calls_p = 1;
3044 if (DECL_ARGUMENTS (current_function_decl))
3049 info_ptr->main_save_p = 1;
3050 info_ptr->main_size = 0;
3052 for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl));
3053 arg != NULL_TREE && i < 8;
3054 (arg = TREE_CHAIN (arg)), i++)
3056 info_ptr->main_size += reg_size;
3064 /* Determine if we need to save the link register */
3065 if (regs_ever_live[65] || profile_flag
3066 #ifdef TARGET_RELOCATABLE
3067 || (TARGET_RELOCATABLE && (get_pool_size () != 0))
3069 || (info_ptr->first_fp_reg_save != 64
3070 && !FP_SAVE_INLINE (info_ptr->first_fp_reg_save))
3071 || (abi == ABI_V4 && current_function_calls_alloca)
3072 || (abi == ABI_SOLARIS && current_function_calls_alloca)
3073 || info_ptr->calls_p)
3075 info_ptr->lr_save_p = 1;
3076 regs_ever_live[65] = 1;
3078 info_ptr->lr_size = reg_size;
3081 /* Determine if we need to save the condition code registers */
3082 if (regs_ever_live[70] || regs_ever_live[71] || regs_ever_live[72])
3084 info_ptr->cr_save_p = 1;
3085 if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS)
3086 info_ptr->cr_size = reg_size;
3089 /* Determine various sizes */
3090 info_ptr->reg_size = reg_size;
3091 info_ptr->fixed_size = RS6000_SAVE_AREA;
3092 info_ptr->varargs_size = RS6000_VARARGS_AREA;
3093 info_ptr->vars_size = ALIGN (get_frame_size (), 8);
3094 info_ptr->parm_size = ALIGN (current_function_outgoing_args_size, 8);
3095 info_ptr->fpmem_size = (info_ptr->fpmem_p) ? 8 : 0;
3096 info_ptr->save_size = ALIGN (info_ptr->fp_size
3100 + info_ptr->toc_size
3101 + info_ptr->main_size, 8);
3103 total_raw_size = (info_ptr->vars_size
3104 + info_ptr->parm_size
3105 + info_ptr->fpmem_size
3106 + info_ptr->save_size
3107 + info_ptr->varargs_size
3108 + info_ptr->fixed_size);
3110 info_ptr->total_size = ALIGN (total_raw_size, STACK_BOUNDARY / BITS_PER_UNIT);
3112 /* Determine if we need to allocate any stack frame.
3113 For AIX We need to push the stack if a frame pointer is needed (because
3114 the stack might be dynamically adjusted), if we are debugging, if the
3115 total stack size is more than 220 bytes, or if we make calls.
3117 For V.4 we don't have the stack cushion that AIX uses, but assume that
3118 the debugger can handle stackless frames. */
3120 if (info_ptr->calls_p)
3121 info_ptr->push_p = 1;
3123 else if (abi == ABI_V4 || abi == ABI_NT || abi == ABI_SOLARIS)
3124 info_ptr->push_p = (total_raw_size > info_ptr->fixed_size
3125 || info_ptr->lr_save_p);
3128 info_ptr->push_p = (frame_pointer_needed
3129 || write_symbols != NO_DEBUG
3130 || info_ptr->total_size > 220);
3132 /* Calculate the offsets */
3140 case ABI_AIX_NODESC:
3141 info_ptr->fp_save_offset = - info_ptr->fp_size;
3142 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
3143 info_ptr->main_save_offset = info_ptr->gp_save_offset - info_ptr->main_size;
3144 info_ptr->cr_save_offset = 4;
3145 info_ptr->lr_save_offset = 8;
3150 info_ptr->fp_save_offset = - info_ptr->fp_size;
3151 info_ptr->gp_save_offset = info_ptr->fp_save_offset - info_ptr->gp_size;
3152 info_ptr->cr_save_offset = info_ptr->gp_save_offset - info_ptr->cr_size;
3153 info_ptr->toc_save_offset = info_ptr->cr_save_offset - info_ptr->toc_size;
3154 info_ptr->main_save_offset = info_ptr->toc_save_offset - info_ptr->main_size;
3155 info_ptr->lr_save_offset = reg_size;
3159 info_ptr->lr_save_offset = -4;
3160 info_ptr->toc_save_offset = info_ptr->lr_save_offset - info_ptr->lr_size;
3161 info_ptr->cr_save_offset = info_ptr->toc_save_offset - info_ptr->toc_size;
3162 info_ptr->gp_save_offset = info_ptr->cr_save_offset - info_ptr->cr_size - info_ptr->gp_size + reg_size;
3163 info_ptr->fp_save_offset = info_ptr->gp_save_offset - info_ptr->fp_size;
3164 if (info_ptr->fp_size && ((- info_ptr->fp_save_offset) % 8) != 0)
3165 info_ptr->fp_save_offset -= 4;
3167 info_ptr->main_save_offset = info_ptr->fp_save_offset - info_ptr->main_size;
3171 if (info_ptr->fpmem_p)
3172 info_ptr->fpmem_offset = STARTING_FRAME_OFFSET - info_ptr->total_size + info_ptr->vars_size;
3174 /* Zero offsets if we're not saving those registers */
3175 if (!info_ptr->fp_size)
3176 info_ptr->fp_save_offset = 0;
3178 if (!info_ptr->gp_size)
3179 info_ptr->gp_save_offset = 0;
3181 if (!info_ptr->lr_save_p)
3182 info_ptr->lr_save_offset = 0;
3184 if (!info_ptr->cr_save_p)
3185 info_ptr->cr_save_offset = 0;
3187 if (!info_ptr->toc_save_p)
3188 info_ptr->toc_save_offset = 0;
3190 if (!info_ptr->main_save_p)
3191 info_ptr->main_save_offset = 0;
3193 if (!info_ptr->fpmem_p)
3194 info_ptr->fpmem_offset = 0;
3197 rs6000_fpmem_size = info_ptr->fpmem_size;
3198 rs6000_fpmem_offset = info_ptr->total_size + info_ptr->fpmem_offset;
3205 debug_stack_info (info)
3206 rs6000_stack_t *info;
3211 info = rs6000_stack_info ();
3213 fprintf (stderr, "\nStack information for function %s:\n",
3214 ((current_function_decl && DECL_NAME (current_function_decl))
3215 ? IDENTIFIER_POINTER (DECL_NAME (current_function_decl))
3220 default: abi_string = "Unknown"; break;
3221 case ABI_NONE: abi_string = "NONE"; break;
3222 case ABI_AIX: abi_string = "AIX"; break;
3223 case ABI_AIX_NODESC: abi_string = "AIX"; break;
3224 case ABI_V4: abi_string = "V.4"; break;
3225 case ABI_SOLARIS: abi_string = "Solaris"; break;
3226 case ABI_NT: abi_string = "NT"; break;
3229 fprintf (stderr, "\tABI = %5s\n", abi_string);
3231 if (info->first_gp_reg_save != 32)
3232 fprintf (stderr, "\tfirst_gp_reg_save = %5d\n", info->first_gp_reg_save);
3234 if (info->first_fp_reg_save != 64)
3235 fprintf (stderr, "\tfirst_fp_reg_save = %5d\n", info->first_fp_reg_save);
3237 if (info->lr_save_p)
3238 fprintf (stderr, "\tlr_save_p = %5d\n", info->lr_save_p);
3240 if (info->cr_save_p)
3241 fprintf (stderr, "\tcr_save_p = %5d\n", info->cr_save_p);
3243 if (info->toc_save_p)
3244 fprintf (stderr, "\ttoc_save_p = %5d\n", info->toc_save_p);
3247 fprintf (stderr, "\tpush_p = %5d\n", info->push_p);
3250 fprintf (stderr, "\tcalls_p = %5d\n", info->calls_p);
3253 fprintf (stderr, "\tmain_p = %5d\n", info->main_p);
3255 if (info->main_save_p)
3256 fprintf (stderr, "\tmain_save_p = %5d\n", info->main_save_p);
3259 fprintf (stderr, "\tfpmem_p = %5d\n", info->fpmem_p);
3261 if (info->gp_save_offset)
3262 fprintf (stderr, "\tgp_save_offset = %5d\n", info->gp_save_offset);
3264 if (info->fp_save_offset)
3265 fprintf (stderr, "\tfp_save_offset = %5d\n", info->fp_save_offset);
3267 if (info->lr_save_offset)
3268 fprintf (stderr, "\tlr_save_offset = %5d\n", info->lr_save_offset);
3270 if (info->cr_save_offset)
3271 fprintf (stderr, "\tcr_save_offset = %5d\n", info->cr_save_offset);
3273 if (info->toc_save_offset)
3274 fprintf (stderr, "\ttoc_save_offset = %5d\n", info->toc_save_offset);
3276 if (info->varargs_save_offset)
3277 fprintf (stderr, "\tvarargs_save_offset = %5d\n", info->varargs_save_offset);
3279 if (info->main_save_offset)
3280 fprintf (stderr, "\tmain_save_offset = %5d\n", info->main_save_offset);
3282 if (info->fpmem_offset)
3283 fprintf (stderr, "\tfpmem_offset = %5d\n", info->fpmem_offset);
3285 if (info->total_size)
3286 fprintf (stderr, "\ttotal_size = %5d\n", info->total_size);
3288 if (info->varargs_size)
3289 fprintf (stderr, "\tvarargs_size = %5d\n", info->varargs_size);
3291 if (info->vars_size)
3292 fprintf (stderr, "\tvars_size = %5d\n", info->vars_size);
3294 if (info->parm_size)
3295 fprintf (stderr, "\tparm_size = %5d\n", info->parm_size);
3297 if (info->fpmem_size)
3298 fprintf (stderr, "\tfpmem_size = %5d\n", info->fpmem_size);
3300 if (info->fixed_size)
3301 fprintf (stderr, "\tfixed_size = %5d\n", info->fixed_size);
3304 fprintf (stderr, "\tgp_size = %5d\n", info->gp_size);
3307 fprintf (stderr, "\tfp_size = %5d\n", info->fp_size);
3310 fprintf (stderr, "\tlr_size = %5d\n", info->cr_size);
3313 fprintf (stderr, "\tcr_size = %5d\n", info->cr_size);
3316 fprintf (stderr, "\ttoc_size = %5d\n", info->toc_size);
3318 if (info->main_size)
3319 fprintf (stderr, "\tmain_size = %5d\n", info->main_size);
3321 if (info->save_size)
3322 fprintf (stderr, "\tsave_size = %5d\n", info->save_size);
3324 if (info->reg_size != 4)
3325 fprintf (stderr, "\treg_size = %5d\n", info->reg_size);
3327 fprintf (stderr, "\n");
3331 /* Write function prologue. */
3333 output_prolog (file, size)
3337 rs6000_stack_t *info = rs6000_stack_info ();
3338 int reg_size = info->reg_size;
3346 store_reg = "\t{st|stw} %s,%d(%s)\n";
3347 load_reg = "\t{l|lwz} %s,%d(%s)\n";
3351 store_reg = "\tstd %s,%d(%s)\n";
3352 load_reg = "\tlld %s,%d(%s)\n";
3355 if (TARGET_DEBUG_STACK)
3356 debug_stack_info (info);
3358 /* Write .extern for any function we will call to save and restore fp
3360 if (info->first_fp_reg_save < 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
3361 fprintf (file, "\t.extern %s%d%s\n\t.extern %s%d%s\n",
3362 SAVE_FP_PREFIX, info->first_fp_reg_save - 32, SAVE_FP_SUFFIX,
3363 RESTORE_FP_PREFIX, info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
3365 /* Write .extern for truncation routines, if needed. */
3366 if (rs6000_trunc_used && ! trunc_defined)
3368 fprintf (file, "\t.extern .%s\n\t.extern .%s\n",
3369 RS6000_ITRUNC, RS6000_UITRUNC);
3373 /* Write .extern for AIX common mode routines, if needed. */
3374 if (! TARGET_POWER && ! TARGET_POWERPC && ! common_mode_defined)
3376 fputs ("\t.extern __mulh\n", file);
3377 fputs ("\t.extern __mull\n", file);
3378 fputs ("\t.extern __divss\n", file);
3379 fputs ("\t.extern __divus\n", file);
3380 fputs ("\t.extern __quoss\n", file);
3381 fputs ("\t.extern __quous\n", file);
3382 common_mode_defined = 1;
3385 /* For V.4, update stack before we do any saving and set back pointer. */
3386 if (info->push_p && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS))
3388 if (info->total_size < 32767)
3391 (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
3392 reg_names[1], - info->total_size, reg_names[1]);
3393 sp_offset = info->total_size;
3397 int neg_size = - info->total_size;
3399 asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]);
3400 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3401 reg_names[0], (neg_size >> 16) & 0xffff,
3402 reg_names[0], reg_names[0], neg_size & 0xffff);
3404 (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
3405 reg_names[1], reg_names[1], reg_names[0]);
3409 /* If we use the link register, get it into r0. */
3410 if (info->lr_save_p)
3411 asm_fprintf (file, "\tmflr %s\n", reg_names[0]);
3413 /* If we need to save CR, put it into r12. */
3414 if (info->cr_save_p && sp_reg != 12)
3415 asm_fprintf (file, "\tmfcr %s\n", reg_names[12]);
3417 /* Do any required saving of fpr's. If only one or two to save, do it
3418 ourself. Otherwise, call function. Note that since they are statically
3419 linked, we do not need a nop following them. */
3420 if (FP_SAVE_INLINE (info->first_fp_reg_save))
3422 int regno = info->first_fp_reg_save;
3423 int loc = info->fp_save_offset + sp_offset;
3425 for ( ; regno < 64; regno++, loc += 8)
3426 asm_fprintf (file, "\tstfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]);
3428 else if (info->first_fp_reg_save != 64)
3429 asm_fprintf (file, "\tbl %s%d%s\n", SAVE_FP_PREFIX,
3430 info->first_fp_reg_save - 32, SAVE_FP_SUFFIX);
3432 /* Now save gpr's. */
3433 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
3435 int regno = info->first_gp_reg_save;
3436 int loc = info->gp_save_offset + sp_offset;
3438 for ( ; regno < 32; regno++, loc += reg_size)
3439 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]);
3442 else if (info->first_gp_reg_save != 32)
3443 asm_fprintf (file, "\t{stm|stmw} %s,%d(%s)\n",
3444 reg_names[info->first_gp_reg_save],
3445 info->gp_save_offset + sp_offset,
3448 /* Save main's arguments if we need to call a function */
3450 if (info->main_save_p)
3453 int loc = info->main_save_offset + sp_offset;
3454 int size = info->main_size;
3456 for (regno = 3; size > 0; regno++, loc -= reg_size, size -= reg_size)
3457 asm_fprintf (file, store_reg, reg_names[regno], loc, reg_names[sp_reg]);
3461 /* Save lr if we used it. */
3462 if (info->lr_save_p)
3463 asm_fprintf (file, store_reg, reg_names[0], info->lr_save_offset + sp_offset,
3466 /* Save CR if we use any that must be preserved. */
3467 if (info->cr_save_p)
3469 if (sp_reg == 12) /* If r12 is used to hold the original sp, copy cr now */
3471 asm_fprintf (file, "\tmfcr %s\n", reg_names[0]);
3472 asm_fprintf (file, store_reg, reg_names[0],
3473 info->cr_save_offset + sp_offset,
3477 asm_fprintf (file, store_reg, reg_names[12], info->cr_save_offset + sp_offset,
3481 if (info->toc_save_p)
3482 asm_fprintf (file, store_reg, reg_names[2], info->toc_save_offset + sp_offset,
3485 /* NT needs us to probe the stack frame every 4k pages for large frames, so
3487 if (DEFAULT_ABI == ABI_NT && info->total_size > 4096)
3489 if (info->total_size < 32768)
3491 int probe_offset = 4096;
3492 while (probe_offset < info->total_size)
3494 asm_fprintf (file, "\t{l|lwz} %s,%d(%s)\n", reg_names[0], -probe_offset, reg_names[1]);
3495 probe_offset += 4096;
3500 int probe_iterations = info->total_size / 4096;
3501 static int probe_labelno = 0;
3504 if (probe_iterations < 32768)
3505 asm_fprintf (file, "\tli %s,%d\n", reg_names[12], probe_iterations);
3508 asm_fprintf (file, "\tlis %s,%d\n", reg_names[12], probe_iterations >> 16);
3509 if (probe_iterations & 0xffff)
3510 asm_fprintf (file, "\tori %s,%s,%d\n", reg_names[12], reg_names[12],
3511 probe_iterations & 0xffff);
3513 asm_fprintf (file, "\tmtctr %s\n", reg_names[12]);
3514 asm_fprintf (file, "\tmr %s,%s\n", reg_names[12], reg_names[1]);
3515 ASM_OUTPUT_INTERNAL_LABEL (file, "LCprobe", probe_labelno);
3516 asm_fprintf (file, "\t{lu|lwzu} %s,-4096(%s)\n", reg_names[0], reg_names[12]);
3517 ASM_GENERATE_INTERNAL_LABEL (buf, "LCprobe", probe_labelno);
3518 fputs ("\tbdnz ", file);
3519 assemble_name (file, buf);
3524 /* Update stack and set back pointer and we have already done so for V.4. */
3525 if (info->push_p && DEFAULT_ABI != ABI_V4 && DEFAULT_ABI != ABI_SOLARIS)
3527 if (info->total_size < 32767)
3529 (TARGET_32BIT) ? "\t{stu|stwu} %s,%d(%s)\n" : "\tstdu %s,%d(%s)\n",
3530 reg_names[1], - info->total_size, reg_names[1]);
3533 int neg_size = - info->total_size;
3534 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3535 reg_names[0], (neg_size >> 16) & 0xffff,
3536 reg_names[0], reg_names[0], neg_size & 0xffff);
3538 (TARGET_32BIT) ? "\t{stux|stwux} %s,%s,%s\n" : "\tstdux %s,%s,%s\n",
3539 reg_names[1], reg_names[1], reg_names[0]);
3543 /* Set frame pointer, if needed. */
3544 if (frame_pointer_needed)
3545 asm_fprintf (file, "\tmr %s,%s\n", reg_names[31], reg_names[1]);
3548 /* If we need to call a function to set things up for main, do so now
3549 before dealing with the TOC. */
3554 switch (DEFAULT_ABI)
3556 case ABI_AIX: prefix = "."; break;
3557 case ABI_NT: prefix = ".."; break;
3560 fprintf (file, "\tbl %s%s\n", prefix, NAME__MAIN);
3561 #ifdef RS6000_CALL_GLUE2
3562 fprintf (file, "\t%s%s%s\n", RS6000_CALL_GLUE2, prefix, NAME_MAIN);
3564 #ifdef RS6000_CALL_GLUE
3565 if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT)
3566 fprintf (file, "\t%s\n", RS6000_CALL_GLUE);
3570 if (info->main_save_p)
3574 int size = info->main_size;
3576 if (info->total_size < 32767)
3578 loc = info->total_size + info->main_save_offset;
3579 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
3580 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[1]);
3584 int neg_size = info->main_save_offset - info->total_size;
3586 asm_fprintf (file, "\t{liu|lis} %s,%d\n\t{oril|ori} %s,%s,%d\n",
3587 reg_names[0], (neg_size >> 16) & 0xffff,
3588 reg_names[0], reg_names[0], neg_size & 0xffff);
3590 asm_fprintf (file, "\t{sf|subf} %s,%s,%s\n", reg_names[0], reg_names[0],
3593 for (regno = 3; size > 0; regno++, size -= reg_size, loc -= reg_size)
3594 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[0]);
3601 /* If TARGET_MINIMAL_TOC, and the constant pool is needed, then load the
3602 TOC_TABLE address into register 30. */
3603 if (TARGET_TOC && TARGET_MINIMAL_TOC && get_pool_size () != 0)
3607 #ifdef TARGET_RELOCATABLE
3608 if (TARGET_RELOCATABLE)
3610 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3611 fputs ("\tbl ", file);
3612 assemble_name (file, buf);
3615 ASM_OUTPUT_INTERNAL_LABEL (file, "LCF", rs6000_pic_labelno);
3616 fprintf (file, "\tmflr %s\n", reg_names[30]);
3618 asm_fprintf (file, (TARGET_32BIT) ? "\t{l|lwz}" : "\tld");
3619 fprintf (file, " %s,(", reg_names[0]);
3620 ASM_GENERATE_INTERNAL_LABEL (buf, "LCL", rs6000_pic_labelno);
3621 assemble_name (file, buf);
3623 ASM_GENERATE_INTERNAL_LABEL (buf, "LCF", rs6000_pic_labelno);
3624 assemble_name (file, buf);
3625 fprintf (file, ")(%s)\n", reg_names[30]);
3626 asm_fprintf (file, "\t{cax|add} %s,%s,%s\n",
3627 reg_names[30], reg_names[0], reg_names[30]);
3628 rs6000_pic_labelno++;
3633 switch (DEFAULT_ABI)
3637 case ABI_AIX_NODESC:
3640 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 1);
3641 asm_fprintf (file, "\t{cau|addis} %s,%s,", reg_names[30], reg_names[0]);
3642 assemble_name (file, buf);
3643 asm_fprintf (file, "@ha\n");
3644 if (TARGET_NEW_MNEMONICS)
3646 asm_fprintf (file, "\taddi %s,%s,", reg_names[30], reg_names[30]);
3647 assemble_name (file, buf);
3648 asm_fprintf (file, "@l\n");
3652 asm_fprintf (file, "\tcal %s,", reg_names[30]);
3653 assemble_name (file, buf);
3654 asm_fprintf (file, "@l(%s)\n", reg_names[30]);
3664 ASM_GENERATE_INTERNAL_LABEL (buf, "LCTOC", 0);
3665 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[30]);
3666 assemble_name (file, buf);
3667 asm_fprintf (file, "(%s)\n", reg_names[2]);
3672 if (DEFAULT_ABI == ABI_NT)
3674 assemble_name (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3675 fputs (".b:\n", file);
3679 /* Write function epilogue. */
3682 output_epilog (file, size)
3686 rs6000_stack_t *info = rs6000_stack_info ();
3687 char *load_reg = (TARGET_32BIT) ? "\t{l|lwz} %s,%d(%s)\n" : "\tld %s,%d(%s)\n";
3688 rtx insn = get_last_insn ();
3693 /* If the last insn was a BARRIER, we don't have to write anything except
3695 if (GET_CODE (insn) == NOTE)
3696 insn = prev_nonnote_insn (insn);
3697 if (insn == 0 || GET_CODE (insn) != BARRIER)
3699 /* If we have a frame pointer, a call to alloca, or a large stack
3700 frame, restore the old stack pointer using the backchain. Otherwise,
3701 we know what size to update it with. */
3702 if (frame_pointer_needed || current_function_calls_alloca
3703 || info->total_size > 32767)
3705 /* Under V.4, don't reset the stack pointer until after we're done
3706 loading the saved registers. */
3707 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
3710 asm_fprintf (file, load_reg, reg_names[sp_reg], 0, reg_names[1]);
3712 else if (info->push_p)
3714 if (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
3715 sp_offset = info->total_size;
3716 else if (TARGET_NEW_MNEMONICS)
3717 asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], info->total_size);
3719 asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], info->total_size, reg_names[1]);
3722 /* Get the old lr if we saved it. */
3723 if (info->lr_save_p)
3724 asm_fprintf (file, load_reg, reg_names[0], info->lr_save_offset + sp_offset, reg_names[sp_reg]);
3726 /* Get the old cr if we saved it. */
3727 if (info->cr_save_p)
3728 asm_fprintf (file, load_reg, reg_names[12], info->cr_save_offset + sp_offset, reg_names[sp_reg]);
3730 /* Set LR here to try to overlap restores below. */
3731 if (info->lr_save_p)
3732 asm_fprintf (file, "\tmtlr %s\n", reg_names[0]);
3734 /* Restore gpr's. */
3735 if (! TARGET_MULTIPLE || info->first_gp_reg_save == 31 || TARGET_64BIT)
3737 int regno = info->first_gp_reg_save;
3738 int loc = info->gp_save_offset + sp_offset;
3739 int reg_size = (TARGET_32BIT) ? 4 : 8;
3741 for ( ; regno < 32; regno++, loc += reg_size)
3742 asm_fprintf (file, load_reg, reg_names[regno], loc, reg_names[sp_reg]);
3745 else if (info->first_gp_reg_save != 32)
3746 asm_fprintf (file, "\t{lm|lmw} %s,%d(%s)\n",
3747 reg_names[info->first_gp_reg_save],
3748 info->gp_save_offset + sp_offset,
3751 /* Restore fpr's if we can do it without calling a function. */
3752 if (FP_SAVE_INLINE (info->first_fp_reg_save))
3754 int regno = info->first_fp_reg_save;
3755 int loc = info->fp_save_offset + sp_offset;
3757 for ( ; regno < 64; regno++, loc += 8)
3758 asm_fprintf (file, "\tlfd %s,%d(%s)\n", reg_names[regno], loc, reg_names[sp_reg]);
3761 /* If we saved cr, restore it here. Just those of cr2, cr3, and cr4
3763 if (info->cr_save_p)
3764 asm_fprintf (file, "\tmtcrf %d,%s\n",
3765 (regs_ever_live[70] != 0) * 0x20
3766 + (regs_ever_live[71] != 0) * 0x10
3767 + (regs_ever_live[72] != 0) * 0x8, reg_names[12]);
3769 /* If this is V.4, unwind the stack pointer after all of the loads have been done */
3772 if (TARGET_NEW_MNEMONICS)
3773 asm_fprintf (file, "\taddi %s,%s,%d\n", reg_names[1], reg_names[1], sp_offset);
3775 asm_fprintf (file, "\tcal %s,%d(%s)\n", reg_names[1], sp_offset, reg_names[1]);
3777 else if (sp_reg != 1)
3778 asm_fprintf (file, "\tmr %s,%s\n", reg_names[1], reg_names[sp_reg]);
3780 /* If we have to restore more than two FP registers, branch to the
3781 restore function. It will return to our caller. */
3782 if (info->first_fp_reg_save != 64 && !FP_SAVE_INLINE (info->first_fp_reg_save))
3783 asm_fprintf (file, "\tb %s%d%s\n", RESTORE_FP_PREFIX,
3784 info->first_fp_reg_save - 32, RESTORE_FP_SUFFIX);
3786 asm_fprintf (file, "\t{br|blr}\n");
3789 /* Output a traceback table here. See /usr/include/sys/debug.h for info
3792 We don't output a traceback table if -finhibit-size-directive was
3793 used. The documentation for -finhibit-size-directive reads
3794 ``don't output a @code{.size} assembler directive, or anything
3795 else that would cause trouble if the function is split in the
3796 middle, and the two halves are placed at locations far apart in
3797 memory.'' The traceback table has this property, since it
3798 includes the offset from the start of the function to the
3799 traceback table itself.
3801 System V.4 Powerpc's (and the embedded ABI derived from it) use a
3802 different traceback table. */
3803 if (DEFAULT_ABI == ABI_AIX && ! flag_inhibit_size_directive)
3805 char *fname = XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0);
3806 int fixed_parms, float_parms, parm_info;
3809 while (*fname == '.') /* V.4 encodes . in the name */
3812 /* Need label immediately before tbtab, so we can compute its offset
3813 from the function start. */
3816 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
3817 ASM_OUTPUT_LABEL (file, fname);
3819 /* The .tbtab pseudo-op can only be used for the first eight
3820 expressions, since it can't handle the possibly variable
3821 length fields that follow. However, if you omit the optional
3822 fields, the assembler outputs zeros for all optional fields
3823 anyways, giving each variable length field is minimum length
3824 (as defined in sys/debug.h). Thus we can not use the .tbtab
3825 pseudo-op at all. */
3827 /* An all-zero word flags the start of the tbtab, for debuggers
3828 that have to find it by searching forward from the entry
3829 point or from the current pc. */
3830 fputs ("\t.long 0\n", file);
3832 /* Tbtab format type. Use format type 0. */
3833 fputs ("\t.byte 0,", file);
3835 /* Language type. Unfortunately, there doesn't seem to be any
3836 official way to get this info, so we use language_string. C
3837 is 0. C++ is 9. No number defined for Obj-C, so use the
3838 value for C for now. */
3839 if (! strcmp (language_string, "GNU C")
3840 || ! strcmp (language_string, "GNU Obj-C"))
3842 else if (! strcmp (language_string, "GNU F77"))
3844 else if (! strcmp (language_string, "GNU Ada"))
3846 else if (! strcmp (language_string, "GNU PASCAL"))
3848 else if (! strcmp (language_string, "GNU C++"))
3852 fprintf (file, "%d,", i);
3854 /* 8 single bit fields: global linkage (not set for C extern linkage,
3855 apparently a PL/I convention?), out-of-line epilogue/prologue, offset
3856 from start of procedure stored in tbtab, internal function, function
3857 has controlled storage, function has no toc, function uses fp,
3858 function logs/aborts fp operations. */
3859 /* Assume that fp operations are used if any fp reg must be saved. */
3860 fprintf (file, "%d,", (1 << 5) | ((info->first_fp_reg_save != 64) << 1));
3862 /* 6 bitfields: function is interrupt handler, name present in
3863 proc table, function calls alloca, on condition directives
3864 (controls stack walks, 3 bits), saves condition reg, saves
3866 /* The `function calls alloca' bit seems to be set whenever reg 31 is
3867 set up as a frame pointer, even when there is no alloca call. */
3868 fprintf (file, "%d,",
3869 ((1 << 6) | (frame_pointer_needed << 5)
3870 | (info->cr_save_p << 1) | (info->lr_save_p)));
3872 /* 3 bitfields: saves backchain, spare bit, number of fpr saved
3874 fprintf (file, "%d,",
3875 (info->push_p << 7) | (64 - info->first_fp_reg_save));
3877 /* 2 bitfields: spare bits (2 bits), number of gpr saved (6 bits). */
3878 fprintf (file, "%d,", (32 - first_reg_to_save ()));
3881 /* Compute the parameter info from the function decl argument
3884 int next_parm_info_bit;
3886 next_parm_info_bit = 31;
3891 for (decl = DECL_ARGUMENTS (current_function_decl);
3892 decl; decl = TREE_CHAIN (decl))
3894 rtx parameter = DECL_INCOMING_RTL (decl);
3895 enum machine_mode mode = GET_MODE (parameter);
3897 if (GET_CODE (parameter) == REG)
3899 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3907 else if (mode == DFmode)
3912 /* If only one bit will fit, don't or in this entry. */
3913 if (next_parm_info_bit > 0)
3914 parm_info |= (bits << (next_parm_info_bit - 1));
3915 next_parm_info_bit -= 2;
3919 fixed_parms += ((GET_MODE_SIZE (mode)
3920 + (UNITS_PER_WORD - 1))
3922 next_parm_info_bit -= 1;
3928 /* Number of fixed point parameters. */
3929 /* This is actually the number of words of fixed point parameters; thus
3930 an 8 byte struct counts as 2; and thus the maximum value is 8. */
3931 fprintf (file, "%d,", fixed_parms);
3933 /* 2 bitfields: number of floating point parameters (7 bits), parameters
3935 /* This is actually the number of fp registers that hold parameters;
3936 and thus the maximum value is 13. */
3937 /* Set parameters on stack bit if parameters are not in their original
3938 registers, regardless of whether they are on the stack? Xlc
3939 seems to set the bit when not optimizing. */
3940 fprintf (file, "%d\n", ((float_parms << 1) | (! optimize)));
3942 /* Optional fields follow. Some are variable length. */
3944 /* Parameter types, left adjusted bit fields: 0 fixed, 10 single float,
3946 /* There is an entry for each parameter in a register, in the order that
3947 they occur in the parameter list. Any intervening arguments on the
3948 stack are ignored. If the list overflows a long (max possible length
3949 34 bits) then completely leave off all elements that don't fit. */
3950 /* Only emit this long if there was at least one parameter. */
3951 if (fixed_parms || float_parms)
3952 fprintf (file, "\t.long %d\n", parm_info);
3954 /* Offset from start of code to tb table. */
3955 fputs ("\t.long ", file);
3956 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LT");
3957 RS6000_OUTPUT_BASENAME (file, fname);
3959 RS6000_OUTPUT_BASENAME (file, fname);
3962 /* Interrupt handler mask. */
3963 /* Omit this long, since we never set the interrupt handler bit
3966 /* Number of CTL (controlled storage) anchors. */
3967 /* Omit this long, since the has_ctl bit is never set above. */
3969 /* Displacement into stack of each CTL anchor. */
3970 /* Omit this list of longs, because there are no CTL anchors. */
3972 /* Length of function name. */
3973 fprintf (file, "\t.short %d\n", strlen (fname));
3975 /* Function name. */
3976 assemble_string (fname, strlen (fname));
3978 /* Register for alloca automatic storage; this is always reg 31.
3979 Only emit this if the alloca bit was set above. */
3980 if (frame_pointer_needed)
3981 fputs ("\t.byte 31\n", file);
3984 if (DEFAULT_ABI == ABI_NT)
3986 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3987 fputs (".e:\nFE_MOT_RESVD..", file);
3988 RS6000_OUTPUT_BASENAME (file, XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0));
3989 fputs (":\n", file);
3993 /* Output a TOC entry. We derive the entry name from what is
3997 output_toc (file, x, labelno)
4011 /* if we're going to put a double constant in the TOC, make sure it's
4012 aligned properly when strict alignment is on. */
4013 if (GET_CODE (x) == CONST_DOUBLE
4015 && GET_MODE (x) == DFmode
4016 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC)) {
4017 ASM_OUTPUT_ALIGN (file, 3);
4021 if (TARGET_ELF && TARGET_MINIMAL_TOC)
4023 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LC");
4024 fprintf (file, "%d = .-", labelno);
4025 ASM_OUTPUT_INTERNAL_LABEL_PREFIX (file, "LCTOC");
4026 fputs ("1\n", file);
4029 ASM_OUTPUT_INTERNAL_LABEL (file, "LC", labelno);
4031 /* Handle FP constants specially. Note that if we have a minimal
4032 TOC, things we put here aren't actually in the TOC, so we can allow
4034 if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == DFmode
4035 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
4040 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
4041 REAL_VALUE_TO_TARGET_DOUBLE (rv, k);
4042 if (TARGET_MINIMAL_TOC)
4043 fprintf (file, "\t.long %ld\n\t.long %ld\n", k[0], k[1]);
4045 fprintf (file, "\t.tc FD_%lx_%lx[TC],%ld,%ld\n",
4046 k[0], k[1], k[0], k[1]);
4049 else if (GET_CODE (x) == CONST_DOUBLE && GET_MODE (x) == SFmode
4050 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
4055 REAL_VALUE_FROM_CONST_DOUBLE (rv, x);
4056 REAL_VALUE_TO_TARGET_SINGLE (rv, l);
4058 if (TARGET_MINIMAL_TOC)
4059 fprintf (file, "\t.long %d\n", l);
4061 fprintf (file, "\t.tc FS_%x[TC],%d\n", l, l);
4064 else if (GET_MODE (x) == DImode
4065 && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)
4066 && ! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC))
4071 if (GET_CODE (x) == CONST_DOUBLE)
4073 low = CONST_DOUBLE_LOW (x);
4074 high = CONST_DOUBLE_HIGH (x);
4077 #if HOST_BITS_PER_WIDE_INT == 32
4080 high = (low < 0) ? ~0 : 0;
4084 low = INTVAL (x) & 0xffffffff;
4085 high = (HOST_WIDE_INT) INTVAL (x) >> 32;
4089 if (TARGET_MINIMAL_TOC)
4090 fprintf (file, "\t.long %ld\n\t.long %ld\n", high, low);
4092 fprintf (file, "\t.tc ID_%lx_%lx[TC],%ld,%ld\n",
4093 high, low, high, low);
4097 if (GET_CODE (x) == CONST)
4099 base = XEXP (XEXP (x, 0), 0);
4100 offset = INTVAL (XEXP (XEXP (x, 0), 1));
4103 if (GET_CODE (base) == SYMBOL_REF)
4104 name = XSTR (base, 0);
4105 else if (GET_CODE (base) == LABEL_REF)
4106 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (XEXP (base, 0)));
4107 else if (GET_CODE (base) == CODE_LABEL)
4108 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (base));
4112 if (TARGET_MINIMAL_TOC)
4113 fputs ("\t.long ", file);
4116 STRIP_NAME_ENCODING (real_name, name);
4117 fprintf (file, "\t.tc %s", real_name);
4120 fprintf (file, ".N%d", - offset);
4122 fprintf (file, ".P%d", offset);
4124 fputs ("[TC],", file);
4126 output_addr_const (file, x);
4130 /* Output an assembler pseudo-op to write an ASCII string of N characters
4131 starting at P to FILE.
4133 On the RS/6000, we have to do this using the .byte operation and
4134 write out special characters outside the quoted string.
4135 Also, the assembler is broken; very long strings are truncated,
4136 so we must artificially break them up early. */
4139 output_ascii (file, p, n)
4145 int i, count_string;
4146 char *for_string = "\t.byte \"";
4147 char *for_decimal = "\t.byte ";
4148 char *to_close = NULL;
4151 for (i = 0; i < n; i++)
4154 if (c >= ' ' && c < 0177)
4157 fputs (for_string, file);
4160 /* Write two quotes to get one. */
4168 for_decimal = "\"\n\t.byte ";
4172 if (count_string >= 512)
4174 fputs (to_close, file);
4176 for_string = "\t.byte \"";
4177 for_decimal = "\t.byte ";
4185 fputs (for_decimal, file);
4186 fprintf (file, "%d", c);
4188 for_string = "\n\t.byte \"";
4195 /* Now close the string if we have written one. Then end the line. */
4197 fprintf (file, to_close);
4200 /* Generate a unique section name for FILENAME for a section type
4201 represented by SECTION_DESC. Output goes into BUF.
4203 SECTION_DESC can be any string, as long as it is different for each
4204 possible section type.
4206 We name the section in the same manner as xlc. The name begins with an
4207 underscore followed by the filename (after stripping any leading directory
4208 names) with the last period replaced by the string SECTION_DESC. If
4209 FILENAME does not contain a period, SECTION_DESC is appended to the end of
4213 rs6000_gen_section_name (buf, filename, section_desc)
4218 char *q, *after_last_slash, *last_period;
4222 after_last_slash = filename;
4223 for (q = filename; *q; q++)
4226 after_last_slash = q + 1;
4231 len = strlen (after_last_slash) + strlen (section_desc) + 2;
4232 *buf = (char *) permalloc (len);
4237 for (q = after_last_slash; *q; q++)
4239 if (q == last_period)
4241 strcpy (p, section_desc);
4242 p += strlen (section_desc);
4245 else if (isalnum (*q))
4249 if (last_period == 0)
4250 strcpy (p, section_desc);
4255 /* Write function profiler code. */
4258 output_function_profiler (file, labelno)
4262 /* The last used parameter register. */
4267 if (DEFAULT_ABI != ABI_AIX)
4270 /* Set up a TOC entry for the profiler label. */
4272 ASM_OUTPUT_INTERNAL_LABEL (file, "LPC", labelno);
4273 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", labelno);
4274 if (TARGET_MINIMAL_TOC)
4276 fputs ("\t.long ", file);
4277 assemble_name (file, buf);
4282 fputs ("\t.tc\t", file);
4283 assemble_name (file, buf);
4284 fputs ("[TC],", file);
4285 assemble_name (file, buf);
4290 /* Figure out last used parameter register. The proper thing to do is
4291 to walk incoming args of the function. A function might have live
4292 parameter registers even if it has no incoming args. */
4294 for (last_parm_reg = 10;
4295 last_parm_reg > 2 && ! regs_ever_live [last_parm_reg];
4299 /* Save parameter registers in regs 23-30. Don't overwrite reg 31, since
4300 it might be set up as the frame pointer. */
4302 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
4303 asm_fprintf (file, "\tmr %d,%d\n", j, i);
4305 /* Load location address into r3, and call mcount. */
4307 ASM_GENERATE_INTERNAL_LABEL (buf, "LPC", labelno);
4308 asm_fprintf (file, "\t{l|lwz} %s,", reg_names[3]);
4309 assemble_name (file, buf);
4310 asm_fprintf (file, "(%s)\n\tbl .mcount\n", reg_names[2]);
4312 /* Restore parameter registers. */
4314 for (i = 3, j = 30; i <= last_parm_reg; i++, j--)
4315 asm_fprintf (file, "\tmr %d,%d\n", i, j);
4318 /* Adjust the cost of a scheduling dependency. Return the new cost of
4319 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
4322 rs6000_adjust_cost (insn, link, dep_insn, cost)
4328 if (! recog_memoized (insn))
4331 if (REG_NOTE_KIND (link) != 0)
4334 if (REG_NOTE_KIND (link) == 0)
4336 /* Data dependency; DEP_INSN writes a register that INSN reads some
4339 /* Tell the first scheduling pass about the latency between a mtctr
4340 and bctr (and mtlr and br/blr). The first scheduling pass will not
4341 know about this latency since the mtctr instruction, which has the
4342 latency associated to it, will be generated by reload. */
4343 if (get_attr_type (insn) == TYPE_JMPREG)
4344 return TARGET_POWER ? 5 : 4;
4346 /* Fall out to return default cost. */
4352 /* Return how many instructions the machine can issue per cycle */
4353 int get_issue_rate()
4355 switch (rs6000_cpu_attr) {
4374 /* Output insns to flush the {data|instruction} caches after building a
4378 rs6000_sync_trampoline (addr)
4381 enum machine_mode pmode = Pmode;
4382 rtx reg = gen_reg_rtx (pmode);
4385 int size = rs6000_trampoline_size ();
4386 rtx (*sub_fcn) PROTO ((rtx, rtx, rtx));
4387 rtx (*cmp_fcn) PROTO ((rtx, rtx));
4392 sub_fcn = gen_subsi3;
4393 cmp_fcn = gen_cmpsi;
4397 sub_fcn = gen_subdi3;
4398 cmp_fcn = gen_cmpdi;
4401 addr = force_reg (pmode, addr);
4402 mem2 = gen_rtx (MEM, pmode, gen_rtx (PLUS, pmode, addr, reg));
4403 mem1 = gen_rtx (MEM, pmode, addr);
4405 /* Issue a loop of dcbst's to flush the data cache */
4406 emit_move_insn (reg, GEN_INT (size-4));
4407 label = gen_label_rtx ();
4409 emit_insn (gen_dcbst (mem2, addr, reg));
4410 emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
4411 emit_insn ((*cmp_fcn) (reg, const0_rtx));
4412 emit_jump_insn (gen_bgt (label));
4414 /* Issue a sync after the dcbst's to let things settle down */
4415 emit_insn (gen_sync (mem1));
4417 /* Issue a loop of icbi's to flush the instruction cache */
4418 emit_move_insn (reg, GEN_INT (size-4));
4419 label = gen_label_rtx ();
4421 emit_insn (gen_icbi (mem2, addr, reg));
4422 emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
4423 emit_insn ((*cmp_fcn) (reg, const0_rtx));
4424 emit_jump_insn (gen_bgt (label));
4426 /* Issue a sync after the icbi's to let things settle down */
4427 emit_insn (gen_sync (mem1));
4429 /* Finally issue an isync to synchronize the icache */
4430 emit_insn (gen_isync (mem1));
4434 /* Output assembler code for a block containing the constant parts
4435 of a trampoline, leaving space for the variable parts.
4437 The trampoline should set the static chain pointer to value placed
4438 into the trampoline and should branch to the specified routine. */
4441 rs6000_trampoline_template (file)
4444 char *sc = reg_names[STATIC_CHAIN_REGNUM];
4445 char *r0 = reg_names[0];
4446 char *r2 = reg_names[2];
4448 switch (DEFAULT_ABI)
4453 /* Under AIX, this is not code at all, but merely a data area,
4454 since that is the way all functions are called. The first word is
4455 the address of the function, the second word is the TOC pointer (r2),
4456 and the third word is the static chain value. */
4458 fprintf (file, "\t.long %s\n", (TARGET_32BIT) ? "0,0,0" : "0,0,0,0,0,0");
4462 /* V.4/eabi function pointers are just a single pointer, so we need to
4463 do the full gory code to load up the static chain. */
4466 case ABI_AIX_NODESC:
4467 if (STATIC_CHAIN_REGNUM == 0 || !TARGET_NEW_MNEMONICS)
4472 fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
4473 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
4474 fprintf (file, "\t.long 0,0\n"); /* offset 8 */
4475 fprintf (file, ".LTRAMP1:\n");
4476 fprintf (file, "\tmflr %s\n", sc); /* offset 20 */
4477 fprintf (file, "\tmtlr %s\n", r0); /* offset 24 */
4478 fprintf (file, "\tlwz %s,0(%s)\n", r0, sc); /* offset 28 */
4479 fprintf (file, "\tlwz %s,4(%s)\n", sc, sc); /* offset 32 */
4480 fprintf (file, "\tmtctr %s\n", r0); /* offset 36 */
4481 fprintf (file, "\tbctr\n"); /* offset 40 */
4485 fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
4486 fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
4487 fprintf (file, "\t.long 0,0,0,0\n"); /* offset 8 */
4488 fprintf (file, ".LTRAMP1:\n");
4489 fprintf (file, "\tmflr %s\n", sc); /* offset 28 */
4490 fprintf (file, "\tmtlr %s\n", r0); /* offset 32 */
4491 fprintf (file, "\tld %s,0(%s)\n", r0, sc); /* offset 36 */
4492 fprintf (file, "\tld %s,8(%s)\n", sc, sc); /* offset 40 */
4493 fprintf (file, "\tmtctr %s\n", r0); /* offset 44 */
4494 fprintf (file, "\tbctr\n"); /* offset 48 */
4498 /* NT function pointers point to a two word area (real address, TOC)
4499 which unfortunately does not include a static chain field. So we
4500 use the function field to point to ..LTRAMP1 and the toc field
4501 to point to the whole table. */
4503 if (STATIC_CHAIN_REGNUM == 0
4504 || STATIC_CHAIN_REGNUM == 2
4506 || !TARGET_NEW_MNEMONICS)
4509 fprintf (file, "\t.ualong 0\n"); /* offset 0 */
4510 fprintf (file, "\t.ualong 0\n"); /* offset 4 */
4511 fprintf (file, "\t.ualong 0\n"); /* offset 8 */
4512 fprintf (file, "\t.ualong 0\n"); /* offset 12 */
4513 fprintf (file, "\t.ualong 0\n"); /* offset 16 */
4514 fprintf (file, "..LTRAMP1..0:\n"); /* offset 20 */
4515 fprintf (file, "\tlwz %s,8(%s)\n", r0, r2); /* offset 24 */
4516 fprintf (file, "\tlwz %s,12(%s)\n", sc, r2); /* offset 28 */
4517 fprintf (file, "\tmtctr %s\n", r0); /* offset 32 */
4518 fprintf (file, "\tlwz %s,16(%s)\n", r2, r2); /* offset 36 */
4519 fprintf (file, "\tbctr\n"); /* offset 40 */
4526 /* Length in units of the trampoline for entering a nested function. */
4529 rs6000_trampoline_size ()
4533 switch (DEFAULT_ABI)
4539 ret = (TARGET_32BIT) ? 12 : 24;
4544 case ABI_AIX_NODESC:
4545 ret = (TARGET_32BIT) ? 40 : 48;
4556 /* Emit RTL insns to initialize the variable parts of a trampoline.
4557 FNADDR is an RTX for the address of the function's pure code.
4558 CXT is an RTX for the static chain value for the function. */
4561 rs6000_initialize_trampoline (addr, fnaddr, cxt)
4566 enum machine_mode pmode = Pmode;
4567 int regsize = (TARGET_32BIT) ? 4 : 8;
4568 rtx ctx_reg = force_reg (pmode, cxt);
4570 switch (DEFAULT_ABI)
4575 /* Macros to shorten the code expansions below. */
4576 #define MEM_DEREF(addr) gen_rtx (MEM, pmode, memory_address (pmode, addr))
4577 #define MEM_PLUS(addr,offset) gen_rtx (MEM, pmode, memory_address (pmode, plus_constant (addr, offset)))
4579 /* Under AIX, just build the 3 word function descriptor */
4582 rtx fn_reg = gen_reg_rtx (pmode);
4583 rtx toc_reg = gen_reg_rtx (pmode);
4584 emit_move_insn (fn_reg, MEM_DEREF (fnaddr));
4585 emit_move_insn (toc_reg, MEM_PLUS (fnaddr, 4));
4586 emit_move_insn (MEM_DEREF (addr), fn_reg);
4587 emit_move_insn (MEM_PLUS (addr, regsize), toc_reg);
4588 emit_move_insn (MEM_PLUS (addr, 2*regsize), ctx_reg);
4592 /* Under V.4/eabi, update the two words after the bl to have the real
4593 function address and the static chain. */
4596 case ABI_AIX_NODESC:
4598 rtx reg = gen_reg_rtx (pmode);
4599 emit_move_insn (reg, fnaddr);
4600 emit_move_insn (MEM_PLUS (addr, 8), reg);
4601 emit_move_insn (MEM_PLUS (addr, 8 + regsize), ctx_reg);
4602 rs6000_sync_trampoline (addr);
4606 /* Under NT, update the first word to point to the ..LTRAMP1..0 header,
4607 the second word will point to the whole trampoline, third-fifth words
4608 will then have the real address, static chain, and toc value. */
4611 rtx tramp_reg = gen_reg_rtx (pmode);
4612 rtx fn_reg = gen_reg_rtx (pmode);
4613 rtx toc_reg = gen_reg_rtx (pmode);
4615 emit_move_insn (tramp_reg, gen_rtx (SYMBOL_REF, pmode, "..LTRAMP1..0"));
4616 addr = force_reg (pmode, addr);
4617 emit_move_insn (fn_reg, MEM_DEREF (fnaddr));
4618 emit_move_insn (toc_reg, MEM_PLUS (fnaddr, regsize));
4619 emit_move_insn (MEM_DEREF (addr), tramp_reg);
4620 emit_move_insn (MEM_PLUS (addr, regsize), addr);
4621 emit_move_insn (MEM_PLUS (addr, 2*regsize), fn_reg);
4622 emit_move_insn (MEM_PLUS (addr, 3*regsize), ctx_reg);
4623 emit_move_insn (MEM_PLUS (addr, 4*regsize), gen_rtx (REG, pmode, 2));
4632 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4633 with arguments ARGS is a valid machine specific attribute for DECL.
4634 The attributes in ATTRIBUTES have previously been assigned to DECL. */
4637 rs6000_valid_decl_attribute_p (decl, attributes, identifier, args)
4646 /* If defined, a C expression whose value is nonzero if IDENTIFIER
4647 with arguments ARGS is a valid machine specific attribute for TYPE.
4648 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
4651 rs6000_valid_type_attribute_p (type, attributes, identifier, args)
4657 if (TREE_CODE (type) != FUNCTION_TYPE
4658 && TREE_CODE (type) != FIELD_DECL
4659 && TREE_CODE (type) != TYPE_DECL)
4662 /* Longcall attribute says that the function is not within 2**26 bytes
4663 of the current function, and to do an indirect call. */
4664 if (is_attribute_p ("longcall", identifier))
4665 return (args == NULL_TREE);
4667 if (DEFAULT_ABI == ABI_NT)
4669 /* Stdcall attribute says callee is responsible for popping arguments
4670 if they are not variable. */
4671 if (is_attribute_p ("stdcall", identifier))
4672 return (args == NULL_TREE);
4674 /* Cdecl attribute says the callee is a normal C declaration */
4675 if (is_attribute_p ("cdecl", identifier))
4676 return (args == NULL_TREE);
4678 /* Dllimport attribute says says the caller is to call the function
4679 indirectly through a __imp_<name> pointer. */
4680 if (is_attribute_p ("dllimport", identifier))
4681 return (args == NULL_TREE);
4683 /* Dllexport attribute says says the callee is to create a __imp_<name>
4685 if (is_attribute_p ("dllexport", identifier))
4686 return (args == NULL_TREE);
4688 /* Exception attribute allows the user to specify 1-2 strings or identifiers
4689 that will fill in the 3rd and 4th fields of the structured exception
4691 if (is_attribute_p ("exception", identifier))
4695 if (args == NULL_TREE)
4698 for (i = 0; i < 2 && args != NULL_TREE; i++)
4700 tree this_arg = TREE_VALUE (args);
4701 args = TREE_PURPOSE (args);
4703 if (TREE_CODE (this_arg) != STRING_CST
4704 && TREE_CODE (this_arg) != IDENTIFIER_NODE)
4708 return (args == NULL_TREE);
4715 /* If defined, a C expression whose value is zero if the attributes on
4716 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
4717 two if they are nearly compatible (which causes a warning to be
4721 rs6000_comp_type_attributes (type1, type2)
4728 /* If defined, a C statement that assigns default attributes to newly
4732 rs6000_set_default_type_attributes (type)
4737 /* Return a dll import reference corresponding to to a call's SYMBOL_REF */
4739 rs6000_dll_import_ref (call_ref)
4748 if (GET_CODE (call_ref) != SYMBOL_REF)
4751 call_name = XSTR (call_ref, 0);
4752 len = sizeof ("__imp_") + strlen (call_name);
4754 reg2 = gen_reg_rtx (Pmode);
4756 strcpy (p, "__imp_");
4757 strcat (p, call_name);
4758 node = get_identifier (p);
4760 reg1 = force_reg (Pmode, gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node)));
4761 emit_move_insn (reg2, gen_rtx (MEM, Pmode, reg1));
4766 /* Return a reference suitable for calling a function with the longcall attribute. */
4768 rs6000_longcall_ref (call_ref)
4777 if (GET_CODE (call_ref) != SYMBOL_REF)
4780 /* System V adds '.' to the internal name, so skip them. */
4781 call_name = XSTR (call_ref, 0);
4782 if (*call_name == '.')
4784 while (*call_name == '.')
4787 node = get_identifier (call_name);
4788 call_ref = gen_rtx (SYMBOL_REF, VOIDmode, IDENTIFIER_POINTER (node));
4791 return force_reg (Pmode, call_ref);
4795 /* A C statement or statements to switch to the appropriate section
4796 for output of RTX in mode MODE. You can assume that RTX is some
4797 kind of constant in RTL. The argument MODE is redundant except in
4798 the case of a `const_int' rtx. Select the section by calling
4799 `text_section' or one of the alternatives for other sections.
4801 Do not define this macro if you put all constants in the read-only
4807 rs6000_select_rtx_section (mode, x)
4808 enum machine_mode mode;
4811 if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x))
4817 /* A C statement or statements to switch to the appropriate
4818 section for output of DECL. DECL is either a `VAR_DECL' node
4819 or a constant of some sort. RELOC indicates whether forming
4820 the initial value of DECL requires link-time relocations. */
4823 rs6000_select_section (decl, reloc)
4827 int size = int_size_in_bytes (TREE_TYPE (decl));
4829 if (TREE_CODE (decl) == STRING_CST)
4831 if (! flag_writable_strings)
4836 else if (TREE_CODE (decl) == VAR_DECL)
4838 if ((flag_pic && reloc)
4839 || !TREE_READONLY (decl)
4840 || TREE_SIDE_EFFECTS (decl)
4841 || !DECL_INITIAL (decl)
4842 || (DECL_INITIAL (decl) != error_mark_node
4843 && !TREE_CONSTANT (DECL_INITIAL (decl))))
4845 if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value))
4852 if (rs6000_sdata != SDATA_NONE && (size > 0) && (size <= g_switch_value))
4854 if (rs6000_sdata == SDATA_EABI)
4857 sdata_section (); /* System V doesn't have .sdata2/.sbss2 */
4869 /* If we are referencing a function that is static or is known to be
4870 in this file, make the SYMBOL_REF special. We can use this to indicate
4871 that we can branch to this function without emitting a no-op after the
4872 call. For real AIX and NT calling sequences, we also replace the
4873 function name with the real name (1 or 2 leading .'s), rather than
4874 the function descriptor name. This saves a lot of overriding code
4875 to readd the prefixes. */
4878 rs6000_encode_section_info (decl)
4881 if (TREE_CODE (decl) == FUNCTION_DECL)
4883 rtx sym_ref = XEXP (DECL_RTL (decl), 0);
4884 if (TREE_ASM_WRITTEN (decl) || ! TREE_PUBLIC (decl))
4885 SYMBOL_REF_FLAG (sym_ref) = 1;
4887 if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_NT)
4889 char *prefix = (DEFAULT_ABI == ABI_AIX) ? "." : "..";
4890 char *str = permalloc (strlen (prefix) + 1
4891 + strlen (XSTR (sym_ref, 0)));
4892 strcpy (str, prefix);
4893 strcat (str, XSTR (sym_ref, 0));
4894 XSTR (sym_ref, 0) = str;
4897 else if (rs6000_sdata != SDATA_NONE
4898 && (DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS)
4899 && TREE_CODE (decl) == VAR_DECL)
4901 int size = int_size_in_bytes (TREE_TYPE (decl));
4902 tree section_name = DECL_SECTION_NAME (decl);
4903 char *name = (char *)0;
4908 if (TREE_CODE (section_name) == STRING_CST)
4910 name = TREE_STRING_POINTER (section_name);
4911 len = TREE_STRING_LENGTH (section_name);
4917 if ((size > 0 && size <= g_switch_value)
4919 && ((len == sizeof (".sdata")-1 && strcmp (name, ".sdata") == 0)
4920 || (len == sizeof (".sdata2")-1 && strcmp (name, ".sdata2") == 0)
4921 || (len == sizeof (".sbss")-1 && strcmp (name, ".sbss") == 0)
4922 || (len == sizeof (".sbss2")-1 && strcmp (name, ".sbss2") == 0)
4923 || (len == sizeof (".PPC.EMB.sdata0")-1 && strcmp (name, ".PPC.EMB.sdata0") == 0)
4924 || (len == sizeof (".PPC.EMB.sbss0")-1 && strcmp (name, ".PPC.EMB.sbss0") == 0))))
4926 rtx sym_ref = XEXP (DECL_RTL (decl), 0);
4927 char *str = permalloc (2 + strlen (XSTR (sym_ref, 0)));
4929 strcat (str, XSTR (sym_ref, 0));
4930 XSTR (sym_ref, 0) = str;
4935 #endif /* USING_SVR4_H */
4938 /* CYGNUS LOCAL mac */
4940 /* Whether we are using m68k-compatible alignment. */
4944 /* Most Mac compiler pragmas are unimportant, but we must recognize
4945 the m68k alignment pragma, because that is crucial to transitions
4946 to and from the m68k emulator on PowerMacs. */
4949 handle_mac_pragma (finput, t)
4954 register char *pname;
4958 if (TREE_CODE (t) != IDENTIFIER_NODE)
4961 pname = IDENTIFIER_POINTER (t);
4962 if (strcmp (pname, "segment") == 0)
4964 /* (should collect pbuf + 8 into a segment name) */
4966 else if (strcmp (pname, "options") == 0)
4969 /* Skip over initial whitespace. */
4970 while (c == ' ' || c == '\t')
4973 /* Return without doing anything if no content. */
4974 if (c == '\n' || c == EOF)
4980 /* Collect the rest of the line. */
4981 while (psize < sizeof (pbuf) - 1 && c != '\n')
4987 if (strncmp (pbuf, "align=mac68k", 12) == 0)
4992 else if (strncmp (pbuf, "align=power", 11) == 0)
4997 else if (strncmp (pbuf, "align=reset", 11) == 0)
5006 /* END CYGNUS LOCAL mac */