1 /* Definitions of target machine for GNU compiler, for ROMP chip.
2 Copyright (C) 1989, 1991, 1993, 1995, 1996, 1998, 1999, 2000, 2001, 2002,
3 2003 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@nyu.edu)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 /* Names to predefine in the preprocessor for this target machine. */
26 #define CPP_PREDEFINES "-Dibm032 -Dunix -Asystem=unix -Asystem=bsd -Acpu=ibm032 -Amachine=ibm032"
28 /* Print subsidiary information on the compiler version in use. */
29 #define TARGET_VERSION ;
31 /* Add -lfp_p when running with -p or -pg. */
32 #define LIB_SPEC "%{pg:-lfp_p}%{p:-lfp_p} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
34 /* Run-time compilation parameters selecting different hardware subsets. */
36 /* Flag to generate all multiplies as an in-line sequence of multiply-step
37 insns instead of calling a library routine. */
38 #define TARGET_IN_LINE_MUL (target_flags & 1)
40 /* Flag to generate padded floating-point data blocks. Otherwise, we generate
41 them the minimum size. This trades off execution speed against size. */
42 #define TARGET_FULL_FP_BLOCKS (target_flags & 2)
44 /* Flag to pass and return floating point values in floating point registers.
45 Since this violates the linkage convention, we feel free to destroy fr2
46 and fr3 on function calls.
47 fr1-fr3 are used to pass the arguments. */
48 #define TARGET_FP_REGS (target_flags & 4)
50 /* Flag to return structures of more than one word in memory. This is for
51 compatibility with the MetaWare HighC (hc) compiler. */
52 #define TARGET_HC_STRUCT_RETURN (target_flags & 010)
54 extern int target_flags;
56 /* Macro to define tables used to set the flags.
57 This is a list in braces of pairs in braces,
58 each pair being { "NAME", VALUE }
59 where VALUE is the bits to set or minus the bits to clear.
60 An empty string NAME is used to identify the default VALUE. */
62 #define TARGET_SWITCHES \
63 { {"in-line-mul", 1}, \
64 {"call-lib-mul", -1}, \
65 {"full-fp-blocks", 2}, \
66 {"minimum-fp-blocks", -2}, \
67 {"fp-arg-in-fpregs", 4}, \
68 {"fp-arg-in-gregs", -4}, \
69 {"hc-struct-return", 010}, \
70 {"nohc-struct-return", - 010}, \
71 { "", TARGET_DEFAULT}}
73 #define TARGET_DEFAULT 3
75 /* target machine storage layout */
77 /* Define this if most significant bit is lowest numbered
78 in instructions that operate on numbered bit-fields. */
79 /* That is true on ROMP. */
80 #define BITS_BIG_ENDIAN 1
82 /* Define this if most significant byte of a word is the lowest numbered. */
83 /* That is true on ROMP. */
84 #define BYTES_BIG_ENDIAN 1
86 /* Define this if most significant word of a multiword number is lowest
89 For ROMP we can decide arbitrarily since there are no machine instructions
90 for them. Might as well be consistent with bits and bytes. */
91 #define WORDS_BIG_ENDIAN 1
93 /* Width of a word, in units (bytes). */
94 #define UNITS_PER_WORD 4
96 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
97 #define PARM_BOUNDARY 32
99 /* Boundary (in *bits*) on which stack pointer should be aligned. */
100 #define STACK_BOUNDARY 32
102 /* Allocation boundary (in *bits*) for the code of a function. */
103 #define FUNCTION_BOUNDARY 16
105 /* No data type wants to be aligned rounder than this. */
106 #define BIGGEST_ALIGNMENT 32
108 /* Alignment of field after `int : 0' in a structure. */
109 #define EMPTY_FIELD_BOUNDARY 32
111 /* Every structure's size must be a multiple of this. */
112 #define STRUCTURE_SIZE_BOUNDARY 8
114 /* A bit-field declared as `int' forces `int' alignment for the struct. */
115 #define PCC_BITFIELD_TYPE_MATTERS 1
117 /* Make strings word-aligned so strcpy from constants will be faster. */
118 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
119 (TREE_CODE (EXP) == STRING_CST \
120 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
122 /* Make arrays of chars word-aligned for the same reasons. */
123 #define DATA_ALIGNMENT(TYPE, ALIGN) \
124 (TREE_CODE (TYPE) == ARRAY_TYPE \
125 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
126 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
128 /* Set this nonzero if move instructions will actually fail to work
129 when given unaligned data. */
130 #define STRICT_ALIGNMENT 1
132 /* Standard register usage. */
134 /* Number of actual hardware registers.
135 The hardware registers are assigned numbers for the compiler
136 from 0 to just below FIRST_PSEUDO_REGISTER.
137 All registers that the compiler knows about must be given numbers,
138 even those that are not normally considered general registers.
140 ROMP has 16 fullword registers and 8 floating point registers.
142 In addition, the difference between the frame and argument pointers is
143 a function of the number of registers saved, so we need to have a register
144 to use for AP that will later be eliminated in favor of sp or fp. This is
145 a normal register, but it is fixed. */
147 #define FIRST_PSEUDO_REGISTER 25
149 /* 1 for registers that have pervasive standard uses
150 and are not available for the register allocator.
152 On ROMP, r1 is used for the stack and r14 is used for a
155 HACK WARNING: On the RT, there is a bug in code generation for
156 the MC68881 when the first and third operands are the same floating-point
157 register. See the definition of the FINAL_PRESCAN_INSN macro for details.
158 Here we need to reserve fr0 for this purpose. */
159 #define FIXED_REGISTERS \
160 {0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
162 1, 0, 0, 0, 0, 0, 0, 0}
164 /* 1 for registers not available across function calls.
165 These must include the FIXED_REGISTERS and also any
166 registers that can be used without being saved.
167 The latter must include the registers where values are returned
168 and the register where structure-value addresses are passed.
169 Aside from that, you can include as many other registers as you like. */
170 #define CALL_USED_REGISTERS \
171 {1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
173 1, 1, 0, 0, 0, 0, 0, 0}
175 /* List the order in which to allocate registers. Each register must be
176 listed once, even those in FIXED_REGISTERS.
178 We allocate in the following order:
181 fr7 (more expensive for some FPA's)
182 r0 (not saved and won't conflict with parameter register)
183 r4, r3, r2 (not saved, highest used first to make less conflict)
184 r5 (not saved, but forces r6 to be saved if DI/DFmode)
185 r15, r14, r13, r12, r11, r10, r9, r8, r7, r6 (less to save)
188 #define REG_ALLOC_ORDER \
190 19, 20, 21, 22, 23, \
195 15, 14, 13, 12, 11, 10, \
199 /* True if register is floating-point. */
200 #define FP_REGNO_P(N) ((N) >= 17)
202 /* Return number of consecutive hard regs needed starting at reg REGNO
203 to hold something of mode MODE.
204 This is ordinarily the length in words of a value of mode MODE
205 but can be less for certain modes in special long registers.
207 On ROMP, ordinary registers hold 32 bits worth;
208 a single floating point register is always enough for
209 anything that can be stored in them at all. */
210 #define HARD_REGNO_NREGS(REGNO, MODE) \
211 (FP_REGNO_P (REGNO) ? GET_MODE_NUNITS (MODE) \
212 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
214 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
215 On ROMP, the cpu registers can hold any mode but the float registers
216 can hold only floating point. */
217 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
218 (! FP_REGNO_P (REGNO) || GET_MODE_CLASS (MODE) == MODE_FLOAT \
219 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT)
221 /* Value is 1 if it is a good idea to tie two pseudo registers
222 when one has mode MODE1 and one has mode MODE2.
223 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
224 for any hard reg, then this must be 0 for correct output. */
225 #define MODES_TIEABLE_P(MODE1, MODE2) \
226 ((GET_MODE_CLASS (MODE1) == MODE_FLOAT \
227 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
228 == (GET_MODE_CLASS (MODE2) == MODE_FLOAT \
229 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
231 /* A C expression returning the cost of moving data from a register of class
232 CLASS1 to one of CLASS2.
234 On the ROMP, access to floating-point registers is expensive (even between
236 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
237 (2 + 10 * ((CLASS1) == FP_REGS) + 10 * (CLASS2 == FP_REGS))
239 /* Specify the registers used for certain standard purposes.
240 The values of these macros are register numbers. */
242 /* ROMP pc isn't overloaded on a register that the compiler knows about. */
243 /* #define PC_REGNUM */
245 /* Register to use for pushing function arguments. */
246 #define STACK_POINTER_REGNUM 1
248 /* Base register for access to local variables of the function. */
249 #define FRAME_POINTER_REGNUM 13
251 /* Value should be nonzero if functions must have frame pointers.
252 Zero means the frame pointer need not be set up (and parms
253 may be accessed via the stack pointer) in functions that seem suitable.
254 This is computed in `reload', in reload1.c. */
255 #define FRAME_POINTER_REQUIRED 0
257 /* Base register for access to arguments of the function. */
258 #define ARG_POINTER_REGNUM 16
260 /* Place to put static chain when calling a function that requires it. */
261 #define STATIC_CHAIN \
262 gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, -36))
264 /* Place where static chain is found upon entry to routine. */
265 #define STATIC_CHAIN_INCOMING \
266 gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -20))
268 /* Place that structure value return address is placed.
270 On the ROMP, it is passed as an extra parameter. */
271 #define STRUCT_VALUE 0
273 /* Define the classes of registers for register constraints in the
274 machine description. Also define ranges of constants.
276 One of the classes must always be named ALL_REGS and include all hard regs.
277 If there is more than one class, another class must be named NO_REGS
278 and contain no registers.
280 The name GENERAL_REGS must be the name of a class (or an alias for
281 another name such as ALL_REGS). This is the class of registers
282 that is allowed by "g" or "r" in a register constraint.
283 Also, registers outside this class are allocated only when
284 instructions express preferences for them.
286 The classes must be numbered in nondecreasing order; that is,
287 a larger-numbered class must never be contained completely
288 in a smaller-numbered class.
290 For any two classes, it is very desirable that there be another
291 class that represents their union. */
293 /* The ROMP has two types of registers, general and floating-point.
295 However, r0 is special in that it cannot be used as a base register.
296 So make a class for registers valid as base registers.
298 For floating-point support, add classes that just consist of r0 and
299 r15, respectively. */
301 enum reg_class { NO_REGS, R0_REGS, R15_REGS, BASE_REGS, GENERAL_REGS,
302 FP_REGS, ALL_REGS, LIM_REG_CLASSES };
304 #define N_REG_CLASSES (int) LIM_REG_CLASSES
306 /* Give names of register classes as strings for dump file. */
308 #define REG_CLASS_NAMES \
309 {"NO_REGS", "R0_REGS", "R15_REGS", "BASE_REGS", "GENERAL_REGS", \
310 "FP_REGS", "ALL_REGS" }
312 /* Define which registers fit in which classes.
313 This is an initializer for a vector of HARD_REG_SET
314 of length N_REG_CLASSES. */
316 #define REG_CLASS_CONTENTS {{0}, {0x00001}, {0x08000}, {0x1fffe}, {0x1ffff}, \
317 {0x1fe0000}, {0x1ffffff} }
319 /* The same information, inverted:
320 Return the class number of the smallest class containing
321 reg number REGNO. This could be a conditional expression
322 or could index an array. */
324 #define REGNO_REG_CLASS(REGNO) \
325 ((REGNO) == 0 ? GENERAL_REGS : FP_REGNO_P (REGNO) ? FP_REGS : BASE_REGS)
327 /* The class value for index registers, and the one for base regs. */
328 #define INDEX_REG_CLASS BASE_REGS
329 #define BASE_REG_CLASS BASE_REGS
331 /* Get reg_class from a letter such as appears in the machine description. */
333 #define REG_CLASS_FROM_LETTER(C) \
334 ((C) == 'f' ? FP_REGS \
335 : (C) == 'b' ? BASE_REGS \
336 : (C) == 'z' ? R0_REGS \
337 : (C) == 't' ? R15_REGS \
340 /* The letters I, J, K, L, M, N, and P in a register constraint string
341 can be used to stand for particular ranges of immediate operands.
342 This macro defines what the ranges are.
343 C is the letter, and VALUE is a constant value.
344 Return 1 if VALUE is in the range specified by C.
346 `I' is constants less than 16
347 `J' is negative constants greater than -16
348 `K' is the range for a normal D insn.
349 `L' is a constant with only the low-order 16 bits set
350 `M' is a constant with only the high-order 16 bits set
351 `N' is a single-bit constant
352 `O' is a constant with either the high-order or low-order 16 bits all ones
353 `P' is the complement of a single-bit constant
356 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
357 ( (C) == 'I' ? (unsigned) (VALUE) < 0x10 \
358 : (C) == 'J' ? (VALUE) < 0 && (VALUE) > -16 \
359 : (C) == 'K' ? (unsigned) ((VALUE) + 0x8000) < 0x10000 \
360 : (C) == 'L' ? ((VALUE) & 0xffff0000) == 0 \
361 : (C) == 'M' ? ((VALUE) & 0xffff) == 0 \
362 : (C) == 'N' ? exact_log2 (VALUE) >= 0 \
363 : (C) == 'O' ? ((VALUE) & 0xffff) == 0xffff \
364 || ((VALUE) & 0xffff0000) == 0xffff0000 \
365 : (C) == 'P' ? exact_log2 (~ (VALUE)) >= 0 \
368 /* Similar, but for floating constants, and defining letters G and H.
369 Here VALUE is the CONST_DOUBLE rtx itself.
370 No floating-point constants on ROMP. */
372 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
374 /* Optional extra constraints for this machine.
376 For the ROMP, `Q' means that this is a memory operand but not a symbolic
377 memory operand. Note that an unassigned pseudo register is such a
378 memory operand. If register allocation has not been done, we reject
379 pseudos, since we assume (hope) that they will get hard registers.
381 `R' means that this is a constant pool reference to the current function.
382 This is just r14 and so can be treated as a register. We bother with this
383 just in move insns as that is the only place it is likely to occur.
385 `S' means that this is the address of a constant pool location. This is
386 equal to r14 plus a constant. We also only check for this in move insns. */
388 #define EXTRA_CONSTRAINT(OP, C) \
390 ((GET_CODE (OP) == REG \
391 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
392 && reg_renumber != 0 \
393 && reg_renumber[REGNO (OP)] < 0) \
394 || (GET_CODE (OP) == MEM \
395 && ! symbolic_memory_operand (OP, VOIDmode))) \
396 : (C) == 'R' ? current_function_operand (OP, VOIDmode) \
397 : (C) == 'S' ? constant_pool_address_operand (OP, VOIDmode) \
400 /* Given an rtx X being reloaded into a reg required to be
401 in class CLASS, return the class of reg to actually use.
402 In general this is just CLASS; but on some machines
403 in some cases it is preferable to use a more restrictive class.
405 For the ROMP, if X is a memory reference that involves a symbol,
406 we must use a BASE_REGS register instead of GENERAL_REGS
407 to do the reload. The argument of MEM be either REG, PLUS, or SYMBOL_REF
408 to be valid, so we assume that this is the case.
410 Also, if X is an integer class, ensure that floating-point registers
413 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
414 ((CLASS) == FP_REGS && GET_MODE_CLASS (GET_MODE (X)) == MODE_INT \
416 (CLASS) != GENERAL_REGS ? (CLASS) : \
417 GET_CODE (X) != MEM ? GENERAL_REGS : \
418 GET_CODE (XEXP (X, 0)) == SYMBOL_REF ? BASE_REGS : \
419 GET_CODE (XEXP (X, 0)) == LABEL_REF ? BASE_REGS : \
420 GET_CODE (XEXP (X, 0)) == CONST ? BASE_REGS : \
421 GET_CODE (XEXP (X, 0)) == REG ? GENERAL_REGS : \
422 GET_CODE (XEXP (X, 0)) != PLUS ? GENERAL_REGS : \
423 GET_CODE (XEXP (XEXP (X, 0), 1)) == SYMBOL_REF ? BASE_REGS : \
424 GET_CODE (XEXP (XEXP (X, 0), 1)) == LABEL_REF ? BASE_REGS : \
425 GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST ? BASE_REGS : GENERAL_REGS)
427 /* Return the register class of a scratch register needed to store into
428 OUT from a register of class CLASS in MODE.
430 On the ROMP, we cannot store into a symbolic memory address from an
431 integer register; we need a BASE_REGS register as a scratch to do it. */
433 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
434 (GET_MODE_CLASS (MODE) == MODE_INT && symbolic_memory_operand (OUT, MODE) \
435 ? BASE_REGS : NO_REGS)
437 /* Return the maximum number of consecutive registers
438 needed to represent mode MODE in a register of class CLASS.
440 On ROMP, this is the size of MODE in words,
441 except in the FP regs, where a single reg is always enough. */
442 #define CLASS_MAX_NREGS(CLASS, MODE) \
443 ((CLASS) == FP_REGS ? 1 \
444 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
446 /* Stack layout; function entry, exit and calling. */
448 /* Define this if pushing a word on the stack
449 makes the stack pointer a smaller address. */
450 #define STACK_GROWS_DOWNWARD
452 /* Define this if the nominal address of the stack frame
453 is at the high-address end of the local variables;
454 that is, each additional local variable allocated
455 goes at a more negative offset in the frame. */
456 #define FRAME_GROWS_DOWNWARD
458 /* Offset within stack frame to start allocating local variables at.
459 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
460 first local allocated. Otherwise, it is the offset to the BEGINNING
461 of the first local allocated.
462 On the ROMP, if we set the frame pointer to 15 words below the highest
463 address of the highest local variable, the first 16 words will be
464 addressable via D-short insns. */
465 #define STARTING_FRAME_OFFSET 64
467 /* If we generate an insn to push BYTES bytes,
468 this says how many the stack pointer really advances by.
469 On ROMP, don't define this because there are no push insns. */
470 /* #define PUSH_ROUNDING(BYTES) */
472 /* Offset of first parameter from the argument pointer register value.
473 On the ROMP, we define the argument pointer to the start of the argument
475 #define FIRST_PARM_OFFSET(FNDECL) 0
477 /* Define this if stack space is still allocated for a parameter passed
478 in a register. The value is the number of bytes. */
479 #define REG_PARM_STACK_SPACE(FNDECL) 16
481 /* This is the difference between the logical top of stack and the actual sp.
483 For the ROMP, sp points past the words allocated for the first four outgoing
484 arguments (they are part of the callee's frame). */
485 #define STACK_POINTER_OFFSET -16
487 /* Define this if the maximum size of all the outgoing args is to be
488 accumulated and pushed during the prologue. The amount can be
489 found in the variable current_function_outgoing_args_size. */
490 #define ACCUMULATE_OUTGOING_ARGS 1
492 /* Value is the number of bytes of arguments automatically
493 popped when returning from a subroutine call.
494 FUNDECL is the declaration node of the function (as a tree),
495 FUNTYPE is the data type of the function (as a tree),
496 or for a library call it is an identifier node for the subroutine name.
497 SIZE is the number of bytes of arguments passed on the stack. */
499 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
501 /* Define how to find the value returned by a function.
502 VALTYPE is the data type of the value (as a tree).
503 If the precise function being called is known, FUNC is its FUNCTION_DECL;
504 otherwise, FUNC is 0.
506 On ROMP the value is found in r2, unless the machine specific option
507 fp-arg-in-fpregs is selected, in which case FP return values are in fr1 */
509 #define FUNCTION_VALUE(VALTYPE, FUNC) \
510 gen_rtx_REG (TYPE_MODE (VALTYPE), \
512 && GET_MODE_CLASS (TYPE_MODE (VALTYPE)) == MODE_FLOAT) \
515 /* Define how to find the value returned by a library function
516 assuming the value has mode MODE. */
518 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 2)
520 /* The definition of this macro implies that there are cases where
521 a scalar value cannot be returned in registers.
523 For the ROMP, if compatibility with HC is required, anything of
524 type DImode is returned in memory. */
526 #define RETURN_IN_MEMORY(type) \
527 (TYPE_MODE (type) == BLKmode \
528 || (TARGET_HC_STRUCT_RETURN && TYPE_MODE (type) == DImode))
530 /* 1 if N is a possible register number for a function value
531 as seen by the caller.
533 On ROMP, r2 is the only register thus used unless fp values are to be
534 returned in fp regs, in which case fr1 is also used. */
536 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || ((N) == 18 && TARGET_FP_REGS))
538 /* 1 if N is a possible register number for function argument passing.
539 On ROMP, these are r2-r5 (and fr1-fr4 if fp regs are used). */
541 #define FUNCTION_ARG_REGNO_P(N) \
542 (((N) <= 5 && (N) >= 2) || (TARGET_FP_REGS && (N) > 17 && (N) < 21))
544 /* Define a data type for recording info about an argument list
545 during the scan of that argument list. This data type should
546 hold all necessary information about the function itself
547 and about the args processed so far, enough to enable macros
548 such as FUNCTION_ARG to determine where the next arg should go.
550 On the ROMP, this is a structure. The first word is the number of
551 words of (integer only if -mfp-arg-in-fpregs is specified) arguments
552 scanned so far (including the invisible argument, if any, which holds
553 the structure-value-address). The second word hold the corresponding
554 value for floating-point arguments, except that both single and double
555 count as one register. */
557 struct rt_cargs {int gregs, fregs; };
558 #define CUMULATIVE_ARGS struct rt_cargs
560 #define USE_FP_REG(MODE,CUM) \
561 (TARGET_FP_REGS && GET_MODE_CLASS (MODE) == MODE_FLOAT \
564 /* Define intermediate macro to compute the size (in registers) of an argument
567 #define ROMP_ARG_SIZE(MODE, TYPE, NAMED) \
569 : (MODE) != BLKmode \
570 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
571 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
573 /* Initialize a variable CUM of type CUMULATIVE_ARGS
574 for a call to a function whose data type is FNTYPE.
575 For a library call, FNTYPE is 0.
577 On ROMP, the offset normally starts at 0, but starts at 4 bytes
578 when the function gets a structure-value-address as an
579 invisible first argument. */
581 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
585 /* Update the data in CUM to advance over an argument
586 of mode MODE and data type TYPE.
587 (TYPE is null for libcalls where that information may not be available.) */
589 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
592 if (USE_FP_REG(MODE, CUM)) \
595 (CUM).gregs += ROMP_ARG_SIZE (MODE, TYPE, NAMED); \
599 /* Determine where to put an argument to a function.
600 Value is zero to push the argument on the stack,
601 or a hard register in which to store the argument.
603 MODE is the argument's machine mode.
604 TYPE is the data type of the argument (as a tree).
605 This is null for libcalls where that information may
607 CUM is a variable of type CUMULATIVE_ARGS which gives info about
608 the preceding args and about the function being called.
609 NAMED is nonzero if this argument is a named parameter
610 (otherwise it is an extra parameter matching an ellipsis).
612 On ROMP the first four words of args are normally in registers
613 and the rest are pushed. */
615 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
617 : ((TYPE) != 0 && TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST) ? 0 \
618 : USE_FP_REG(MODE,CUM) ? gen_rtx_REG ((MODE), (CUM).fregs + 17) \
619 : (CUM).gregs < 4 ? gen_rtx_REG ((MODE), 2 + (CUM).gregs) : 0)
621 /* For an arg passed partly in registers and partly in memory,
622 this is the number of registers used.
623 For args passed entirely in registers or entirely in memory, zero. */
625 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
627 : USE_FP_REG(MODE,CUM) ? 0 \
628 : (((CUM).gregs < 4 \
629 && 4 < ((CUM).gregs + ROMP_ARG_SIZE (MODE, TYPE, NAMED))) \
630 ? 4 - (CUM).gregs : 0))
632 /* Perform any needed actions needed for a function that is receiving a
633 variable number of arguments.
637 MODE and TYPE are the mode and type of the current parameter.
639 PRETEND_SIZE is a variable that should be set to the amount of stack
640 that must be pushed by the prolog to pretend that our caller pushed
643 Normally, this macro will push all remaining incoming registers on the
644 stack and set PRETEND_SIZE to the length of the registers pushed. */
646 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
647 { if (TARGET_FP_REGS) \
648 error ("can't have varargs with -mfp-arg-in-fp-regs"); \
649 else if ((CUM).gregs < 4) \
651 int first_reg_offset = (CUM).gregs; \
653 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
654 first_reg_offset += ROMP_ARG_SIZE (TYPE_MODE (TYPE), TYPE, 1); \
656 if (first_reg_offset > 4) \
657 first_reg_offset = 4; \
659 if (! NO_RTL && first_reg_offset != 4) \
660 move_block_from_reg \
661 (2 + first_reg_offset, \
662 gen_rtx_MEM (BLKmode, \
663 plus_constant (virtual_incoming_args_rtx, \
664 first_reg_offset * 4)), \
665 4 - first_reg_offset); \
666 PRETEND_SIZE = (4 - first_reg_offset) * UNITS_PER_WORD; \
670 /* This macro produces the initial definition of a function name.
671 On the ROMP, we need to place an extra '.' in the function name. */
673 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
674 { if (TREE_PUBLIC(DECL)) \
675 fprintf (FILE, "\t.globl _.%s\n", NAME); \
676 fprintf (FILE, "_.%s:\n", NAME); \
679 /* This macro is used to output the start of the data area.
681 On the ROMP, the _name is a pointer to the data area. At that
682 location is the address of _.name, which is really the name of
683 the function. We need to set all this up here.
685 The global declaration of the data area, if needed, is done in
686 `assemble_function', where it thinks it is globalizing the function
689 #define ASM_OUTPUT_POOL_PROLOGUE(FILE, NAME, DECL, SIZE) \
690 { extern int data_offset; \
692 fprintf (FILE, "\t.align 2\n"); \
693 ASM_OUTPUT_LABEL (FILE, NAME); \
694 fprintf (FILE, "\t.long _.%s, 0, ", NAME); \
695 if (current_function_calls_alloca) \
696 fprintf (FILE, "0x%x\n", \
697 0xf6900000 + current_function_outgoing_args_size); \
699 fprintf (FILE, "0\n"); \
700 data_offset = ((SIZE) + 12 + 3) / 4; \
703 /* Output assembler code to FILE to increment profiler label # LABELNO
704 for profiling a function entry. */
706 #define FUNCTION_PROFILER(FILE, LABELNO) \
707 fprintf(FILE, "\tcas r0,r15,r0\n\tbali r15,mcount\n");
709 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
710 the stack pointer does not matter. The value is tested only in
711 functions that have frame pointers.
712 No definition is equivalent to always zero. */
713 /* #define EXIT_IGNORE_STACK 1 */
715 /* Output assembler code for a block containing the constant parts
716 of a trampoline, leaving space for the variable parts.
718 The trampoline should set the static chain pointer to value placed
719 into the trampoline and should branch to the specified routine.
721 On the ROMP, we have a problem. There are no free registers to use
722 to construct the static chain and function addresses. Hence we use
723 the following kludge: r15 (the return address) is first saved in mq.
724 Then we use r15 to form the function address. We then branch to the
725 function and restore r15 in the delay slot. This makes it appear that
726 the function was called directly from the caller.
728 (Note that the function address built is actually that of the data block.
729 This is passed in r0 and the actual routine address is loaded into r15.)
731 In addition, note that the address of the "called function", in this case
732 the trampoline, is actually the address of the data area. So we need to
733 make a fake data area that will contain the address of the trampoline.
734 Note that this must be defined as two half-words, since the trampoline
735 template (as opposed to the trampoline on the stack) is only half-word
738 #define TRAMPOLINE_TEMPLATE(FILE) \
740 fprintf (FILE, "\t.short 0,0\n"); \
741 fprintf (FILE, "\tcau r0,0(r0)\n"); \
742 fprintf (FILE, "\toil r0,r0,0\n"); \
743 fprintf (FILE, "\tmts r10,r15\n"); \
744 fprintf (FILE, "\tst r0,-36(r1)\n"); \
745 fprintf (FILE, "\tcau r15,0(r0)\n"); \
746 fprintf (FILE, "\toil r15,r15,0\n"); \
747 fprintf (FILE, "\tcas r0,r15,r0\n"); \
748 fprintf (FILE, "\tls r15,0(r15)\n"); \
749 fprintf (FILE, "\tbrx r15\n"); \
750 fprintf (FILE, "\tmfs r10,r15\n"); \
753 /* Length in units of the trampoline for entering a nested function. */
755 #define TRAMPOLINE_SIZE 36
757 /* Emit RTL insns to initialize the variable parts of a trampoline.
758 FNADDR is an RTX for the address of the function's pure code.
759 CXT is an RTX for the static chain value for the function.
761 On the RT, the static chain and function addresses are written in
764 We also need to write the address of the first instruction in
765 the trampoline into the first word of the trampoline to simulate a
768 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
769 romp_initialize_trampoline (ADDR, FNADDR, CXT)
771 /* Definitions for register eliminations.
773 We have two registers that can be eliminated on the ROMP. First, the
774 frame pointer register can often be eliminated in favor of the stack
775 pointer register. Secondly, the argument pointer register can always be
776 eliminated; it is replaced with either the stack or frame pointer.
778 In addition, we use the elimination mechanism to see if r14 is needed.
779 Initially we assume that it isn't. If it is, we spill it. This is done
780 by making it an eliminable register. It doesn't matter what we replace
781 it with, since it will never occur in the rtl at this point. */
783 /* This is an array of structures. Each structure initializes one pair
784 of eliminable registers. The "from" register number is given first,
785 followed by "to". Eliminations of the same "from" register are listed
786 in order of preference. */
787 #define ELIMINABLE_REGS \
788 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
789 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
790 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
793 /* Given FROM and TO register numbers, say whether this elimination is allowed.
794 Frame pointer elimination is automatically handled.
796 For the ROMP, if frame pointer elimination is being done, we would like to
797 convert ap into fp, not sp.
799 We need r14 if various conditions (tested in romp_using_r14) are true.
801 All other eliminations are valid. */
802 #define CAN_ELIMINATE(FROM, TO) \
803 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
804 ? ! frame_pointer_needed \
805 : (FROM) == 14 ? ! romp_using_r14 () \
808 /* Define the offset between two registers, one to be eliminated, and the other
809 its replacement, at the start of a routine. */
810 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
811 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
813 if (romp_pushes_stack ()) \
814 (OFFSET) = ((get_frame_size () - 64) \
815 + current_function_outgoing_args_size); \
817 (OFFSET) = - (romp_sa_size () + 64); \
819 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
820 (OFFSET) = romp_sa_size () - 16 + 64; \
821 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
823 if (romp_pushes_stack ()) \
824 (OFFSET) = (get_frame_size () + (romp_sa_size () - 16) \
825 + current_function_outgoing_args_size); \
829 else if ((FROM) == 14) \
835 /* Addressing modes, and classification of registers for them. */
837 /* Macros to check register numbers against specific register classes. */
839 /* These assume that REGNO is a hard or pseudo reg number.
840 They give nonzero only if REGNO is a hard reg of the suitable class
841 or a pseudo reg currently allocated to a suitable hard reg.
842 Since they use reg_renumber, they are safe only once reg_renumber
843 has been allocated, which happens in local-alloc.c. */
845 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
846 #define REGNO_OK_FOR_BASE_P(REGNO) \
847 ((REGNO) < FIRST_PSEUDO_REGISTER \
848 ? (REGNO) < 16 && (REGNO) != 0 && (REGNO) != 16 \
849 : (reg_renumber[REGNO] < 16 && reg_renumber[REGNO] >= 0 \
850 && reg_renumber[REGNO] != 16))
852 /* Maximum number of registers that can appear in a valid memory address. */
854 #define MAX_REGS_PER_ADDRESS 1
856 /* Recognize any constant value that is a valid address. */
858 #define CONSTANT_ADDRESS_P(X) \
859 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
860 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
861 || GET_CODE (X) == HIGH)
863 /* Nonzero if the constant value X is a legitimate general operand.
864 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
866 On the ROMP, there is a bit of a hack here. Basically, we wish to
867 only issue instructions that are not `as' macros. However, in the
868 case of `get', `load', and `store', if the operand is a relocatable
869 symbol (possibly +/- an integer), there is no way to express the
870 resulting split-relocation except with the macro. Therefore, allow
871 either a constant valid in a normal (sign-extended) D-format insn or
872 a relocatable expression.
874 Also, for DFmode and DImode, we must ensure that both words are
877 We define two macros: The first is given an offset (0 or 4) and indicates
878 that the operand is a CONST_INT that is valid for that offset. The second
879 indicates a valid non-CONST_INT constant. */
881 #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \
882 (GET_CODE (X) == CONST_INT \
883 && (unsigned) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)
885 #define LEGITIMATE_ADDRESS_CONSTANT_P(X) \
886 (GET_CODE (X) == SYMBOL_REF \
887 || GET_CODE (X) == LABEL_REF \
888 || (GET_CODE (X) == CONST \
889 && (GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
890 || GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
891 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT))
893 /* Include all constant integers and constant double, but exclude
894 SYMBOL_REFs that are to be obtained from the data area (see below). */
895 #define LEGITIMATE_CONSTANT_P(X) \
896 ((LEGITIMATE_ADDRESS_CONSTANT_P (X) \
897 || GET_CODE (X) == CONST_INT \
898 || GET_CODE (X) == CONST_DOUBLE) \
899 && ! (GET_CODE (X) == SYMBOL_REF && SYMBOL_REF_FLAG (X)))
901 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
902 and check its validity for a certain class.
903 We have two alternate definitions for each of them.
904 The usual definition accepts all pseudo regs; the other rejects
905 them unless they have been allocated suitable hard regs.
906 The symbol REG_OK_STRICT causes the latter definition to be used.
908 Most source files want to accept pseudo regs in the hope that
909 they will get allocated to the class that the insn wants them to be in.
910 Source files for reload pass need to be strict.
911 After reload, it makes no difference, since pseudo regs have
912 been eliminated by then. */
914 #ifndef REG_OK_STRICT
916 /* Nonzero if X is a hard reg that can be used as an index
917 or if it is a pseudo reg. */
918 #define REG_OK_FOR_INDEX_P(X) 0
919 /* Nonzero if X is a hard reg that can be used as a base reg
920 or if it is a pseudo reg. */
921 #define REG_OK_FOR_BASE_P(X) \
922 (REGNO (X) != 0 && (REGNO (X) < 17 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
926 /* Nonzero if X is a hard reg that can be used as an index. */
927 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
928 /* Nonzero if X is a hard reg that can be used as a base reg. */
929 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
933 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
934 that is a valid memory address for an instruction.
935 The MODE argument is the machine mode for the MEM expression
936 that wants to use this address.
938 On the ROMP, a legitimate address is either a legitimate constant,
939 a register plus a legitimate constant, or a register. See the
940 discussion at the LEGITIMATE_ADDRESS_CONSTANT_P macro. */
941 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
942 { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
944 if (GET_CODE (X) != CONST_INT && LEGITIMATE_ADDRESS_CONSTANT_P (X)) \
946 if (GET_CODE (X) == PLUS \
947 && GET_CODE (XEXP (X, 0)) == REG \
948 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
949 && LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (X, 1))) \
951 if (GET_CODE (X) == PLUS \
952 && GET_CODE (XEXP (X, 0)) == REG \
953 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
954 && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \
955 && (((MODE) != DFmode && (MODE) != DImode) \
956 || (LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4)))) \
960 /* Try machine-dependent ways of modifying an illegitimate address
961 to be legitimate. If we find one, return the new, valid address.
962 This macro is used in only one place: `memory_address' in explow.c.
964 OLDX is the address as it was before break_out_memory_refs was called.
965 In some cases it is useful to look at this to decide what needs to be done.
967 MODE and WIN are passed so that this macro can use
968 GO_IF_LEGITIMATE_ADDRESS.
970 It is always safe for this macro to do nothing. It exists to recognize
971 opportunities to optimize the output.
973 On ROMP, check for the sum of a register with a constant
974 integer that is out of range. If so, generate code to add the
975 constant with the low-order 16 bits masked to the register and force
976 this result into another register (this can be done with `cau').
977 Then generate an address of REG+(CONST&0xffff), allowing for the
978 possibility of bit 16 being a one.
980 If the register is not OK for a base register, abort. */
982 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
983 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
984 && GET_CODE (XEXP (X, 1)) == CONST_INT \
985 && (unsigned) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \
986 { int high_int, low_int; \
987 if (! REG_OK_FOR_BASE_P (XEXP (X, 0))) \
989 high_int = INTVAL (XEXP (X, 1)) >> 16; \
990 low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
991 if (low_int & 0x8000) \
992 high_int += 1, low_int |= 0xffff0000; \
993 (X) = gen_rtx_PLUS (SImode, \
994 force_operand (plus_constant (XEXP (X, 0), \
995 high_int << 16), 0), \
996 GEN_INT (low_int)); \
1000 /* Go to LABEL if ADDR (a legitimate address expression)
1001 has an effect that depends on the machine mode it is used for.
1003 On the ROMP this is true only if the address is valid with a zero offset
1004 but not with an offset of four (this means it cannot be used as an
1005 address for DImode or DFmode). Since we know it is valid, we just check
1006 for an address that is not valid with an offset of four. */
1008 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1009 { if (GET_CODE (ADDR) == PLUS \
1010 && ! LEGITIMATE_ADDRESS_CONSTANT_P (XEXP (ADDR, 1)) \
1011 && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 4)) \
1015 /* Define this if some processing needs to be done immediately before
1016 emitting code for an insn.
1018 This is used on the ROMP, to compensate for a bug in the floating-point
1019 code. When a floating-point operation is done with the first and third
1020 operands both the same floating-point register, it will generate bad code
1021 for the MC68881. So we must detect this. If it occurs, we patch the
1022 first operand to be fr0 and insert a move insn to move it to the desired
1024 #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) \
1025 { rtx op0, op1, op2, operation, tem; \
1026 if (NOPERANDS >= 3 && get_attr_type (INSN) == TYPE_FP) \
1028 op0 = OPERANDS[0]; \
1029 operation = OPERANDS[1]; \
1030 if (float_conversion (operation, VOIDmode)) \
1031 operation = XEXP (operation, 0); \
1032 if (float_binary (operation, VOIDmode)) \
1034 op1 = XEXP (operation, 0), op2 = XEXP (operation, 1); \
1035 if (float_conversion (op1, VOIDmode)) \
1036 op1 = XEXP (op1, 0); \
1037 if (float_conversion (op2, VOIDmode)) \
1038 op2 = XEXP (op2, 0); \
1039 if (rtx_equal_p (op0, op2) \
1040 && (GET_CODE (operation) == PLUS \
1041 || GET_CODE (operation) == MULT)) \
1042 tem = op1, op1 = op2, op2 = tem; \
1043 if (GET_CODE (op0) == REG && FP_REGNO_P (REGNO (op0)) \
1044 && GET_CODE (op2) == REG && FP_REGNO_P (REGNO (op2)) \
1045 && REGNO (op0) == REGNO (op2)) \
1047 tem = gen_rtx_REG (GET_MODE (op0), 17); \
1048 emit_insn_after (gen_move_insn (op0, tem), INSN); \
1049 SET_DEST (XVECEXP (PATTERN (INSN), 0, 0)) = tem; \
1050 OPERANDS[0] = tem; \
1056 /* Specify the machine mode that this machine uses
1057 for the index in the tablejump instruction. */
1058 #define CASE_VECTOR_MODE SImode
1060 /* Define as C expression which evaluates to nonzero if the tablejump
1061 instruction expects the table to contain offsets from the address of the
1063 Do not define this if the table should contain absolute addresses. */
1064 /* #define CASE_VECTOR_PC_RELATIVE 1 */
1066 /* Define this as 1 if `char' should by default be signed; else as 0. */
1067 #define DEFAULT_SIGNED_CHAR 0
1069 /* This flag, if defined, says the same insns that convert to a signed fixnum
1070 also convert validly to an unsigned one.
1072 We actually lie a bit here as overflow conditions are different. But
1073 they aren't being checked anyway. */
1075 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1077 /* Max number of bytes we can move from memory to memory
1078 in one reasonably fast instruction. */
1081 /* Nonzero if access to memory by bytes is no faster than for words.
1082 Also nonzero if doing byte operations (specifically shifts) in registers
1084 #define SLOW_BYTE_ACCESS 1
1086 /* Define if operations between registers always perform the operation
1087 on the full register even if a narrower mode is specified. */
1088 #define WORD_REGISTER_OPERATIONS
1090 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1091 will either zero-extend or sign-extend. The value of this macro should
1092 be the code that says which one of the two operations is implicitly
1093 done, NIL if none. */
1094 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1096 /* This is BSD, so it wants DBX format. */
1097 #define DBX_DEBUGGING_INFO 1
1099 /* Define the letter code used in a stabs entry for parameters passed
1100 with the register attribute.
1102 GCC's default value, 'P', is used by dbx to refers to an external
1103 procedure. The section 5 manual page for dbx implies that 'R' would be the
1104 right letter, but dbx 1.5 has a bug in it that precludes its use.
1105 Probably that is why neither hc or pcc use this. pcc puts in two
1106 stabs entries: one for the parameter location and one for the register
1107 location. The letter `r' (register)
1108 would be okay, but it loses parameter attribute of the stabs entry. */
1109 #define DBX_REGPARM_STABS_LETTER 'R'
1111 /* A C expression for the integer offset value of an automatic variable
1112 (N_LSYM) having address X (an RTX). This gets used in .stabs entries
1113 for the local variables. Compare with the default definition. */
1114 #define DEBUGGER_AUTO_OFFSET(X) \
1115 (GET_CODE (X) == PLUS \
1116 ? romp_debugger_auto_correction (INTVAL (XEXP (X, 1)) ) \
1119 /* A C expression for the integer offset value of an argument (N_PSYM)
1120 having address X (an RTX). The nominal offset is OFFSET. */
1121 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
1122 romp_debugger_arg_correction (OFFSET);
1124 /* We don't have GAS for the RT yet, so don't write out special
1125 .stabs in cc1plus. */
1127 #define FASCIST_ASSEMBLER
1129 /* Do not break .stabs pseudos into continuations. */
1130 #define DBX_CONTIN_LENGTH 0
1132 /* Don't try to use the `x' type-cross-reference character in DBX data.
1133 Also has the consequence of putting each struct, union or enum
1134 into a separate .stabs, containing only cross-refs to the others. */
1135 #define DBX_NO_XREFS
1137 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1138 is done just by pretending it is already truncated. */
1139 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1141 /* Specify the machine mode that pointers have.
1142 After generation of rtl, the compiler makes no further distinction
1143 between pointers and any other objects of this machine mode. */
1144 #define Pmode SImode
1146 /* Mode of a function address in a call instruction (for indexing purposes).
1148 Doesn't matter on ROMP. */
1149 #define FUNCTION_MODE SImode
1151 /* Define this if addresses of constant functions
1152 shouldn't be put through pseudo regs where they can be cse'd.
1153 Desirable on machines where ordinary constants are expensive
1154 but a CALL with constant address is cheap. */
1155 #define NO_FUNCTION_CSE
1157 /* Define this if shift instructions ignore all but the low-order
1160 This is not true on the RT since it uses the low-order 6, not 5, bits.
1161 At some point, this should be extended to see how to express that. */
1163 /* #define SHIFT_COUNT_TRUNCATED */
1165 /* Adjust the length of an INSN. LENGTH is the currently-computed length and
1166 should be adjusted to reflect any required changes. This macro is used when
1167 there is some systematic length adjustment required that would be difficult
1168 to express in the length attribute.
1170 On the ROMP, there are two adjustments: First, a 2-byte insn in the delay
1171 slot of a CALL (including floating-point operations) actually takes four
1172 bytes. Second, we have to make the worst-case alignment assumption for
1175 #define ADJUST_INSN_LENGTH(X,LENGTH) \
1176 if (GET_CODE (X) == INSN && GET_CODE (PATTERN (X)) == SEQUENCE \
1177 && GET_CODE (XVECEXP (PATTERN (X), 0, 0)) != JUMP_INSN \
1178 && get_attr_length (XVECEXP (PATTERN (X), 0, 1)) == 2) \
1180 else if (GET_CODE (X) == JUMP_INSN && GET_CODE (PATTERN (X)) == ADDR_VEC) \
1183 /* Tell final.c how to eliminate redundant test instructions. */
1185 /* Here we define machine-dependent flags and fields in cc_status
1186 (see `conditions.h'). */
1188 /* Set if condition code (really not-Z) is stored in `test bit'. */
1189 #define CC_IN_TB 01000
1191 /* Set if condition code is set by an unsigned compare. */
1192 #define CC_UNSIGNED 02000
1194 /* Store in cc_status the expressions
1195 that the condition codes will describe
1196 after execution of an instruction whose pattern is EXP.
1197 Do not alter them if the instruction would not alter the cc's. */
1199 #define NOTICE_UPDATE_CC(BODY,INSN) \
1200 update_cc (BODY, INSN)
1202 /* Control the assembler format that we output. */
1204 /* Output at beginning of assembler file. */
1206 #define ASM_FILE_START(FILE) \
1209 fprintf (FILE, "\t.globl .oVncs\n\t.set .oVncs,0\n") ; \
1210 fprintf (FILE, "\t.globl .oVgcc"); \
1211 for (p = version_string; *p != ' ' && *p != 0; p++) \
1212 fprintf (FILE, "%c", *p); \
1213 fprintf (FILE, "\n\t.set .oVgcc"); \
1214 for (p = version_string; *p != ' ' && *p != 0; p++) \
1215 fprintf (FILE, "%c", *p); \
1216 fprintf (FILE, ",0\n"); \
1219 /* Output to assembler file text saying following lines
1220 may contain character constants, extra white space, comments, etc. */
1222 #define ASM_APP_ON ""
1224 /* Output to assembler file text saying following lines
1225 no longer contain unusual constructs. */
1227 #define ASM_APP_OFF ""
1229 /* Output before instructions and read-only data. */
1231 #define TEXT_SECTION_ASM_OP "\t.text"
1233 /* Output before writable data. */
1235 #define DATA_SECTION_ASM_OP "\t.data"
1237 /* How to refer to registers in assembler output.
1238 This sequence is indexed by compiler's hard-register-number (see above). */
1240 #define REGISTER_NAMES \
1241 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
1242 "r10", "r11", "r12", "r13", "r14", "r15", "ap", \
1243 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7" }
1245 /* Globalizing directive for a label. */
1246 #define GLOBAL_ASM_OP "\t.globl "
1248 /* The prefix to add to user-visible assembler symbols. */
1250 #define USER_LABEL_PREFIX "_"
1252 /* This is how to output a label for a jump table. Arguments are the same as
1253 for (*targetm.asm_out.internal_label), except the insn for the jump table is
1256 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1257 { ASM_OUTPUT_ALIGN (FILE, 2); (*targetm.asm_out.internal_label) (FILE, PREFIX, NUM); }
1259 /* This is how to store into the string LABEL
1260 the symbol_ref name of an internal numbered label where
1261 PREFIX is the class of label and NUM is the number within the class.
1262 This is suitable for output with `assemble_name'. */
1264 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1265 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1267 /* This is how to output code to push a register on the stack.
1268 It need not be very fast code. */
1270 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1271 fprintf (FILE, "\tsis r1,4\n\tsts %s,0(r1)\n", reg_names[REGNO])
1273 /* This is how to output an insn to pop a register from the stack.
1274 It need not be very fast code. */
1276 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1277 fprintf (FILE, "\tls r1,0(r1)\n\tais r1,4\n", reg_names[REGNO])
1279 /* This is how to output an element of a case-vector that is absolute. */
1281 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1282 fprintf (FILE, "\t.long L%d\n", VALUE)
1284 /* This is how to output an element of a case-vector that is relative.
1285 Don't define this if it is not supported. */
1287 /* #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) */
1289 /* This is how to output an assembler line
1290 that says to advance the location counter
1291 to a multiple of 2**LOG bytes. */
1293 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1295 fprintf (FILE, "\t.align %d\n", (LOG))
1297 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1298 fprintf (FILE, "\t.space %d\n", (SIZE))
1300 /* This says how to output an assembler line
1301 to define a global common symbol. */
1303 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1304 ( fputs (".comm ", (FILE)), \
1305 assemble_name ((FILE), (NAME)), \
1306 fprintf ((FILE), ",%d\n", (SIZE)))
1308 /* This says how to output an assembler line
1309 to define a local common symbol. */
1311 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1312 ( fputs (".lcomm ", (FILE)), \
1313 assemble_name ((FILE), (NAME)), \
1314 fprintf ((FILE), ",%d\n", (SIZE)))
1316 /* Print operand X (an rtx) in assembler syntax to file FILE.
1317 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1318 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1320 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1322 /* Define which CODE values are valid. */
1324 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1325 ((CODE) == '.' || (CODE) == '#')
1327 /* Print a memory address as an operand to reference that memory location. */
1329 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1330 { register rtx addr = ADDR; \
1331 register rtx base = 0, offset = addr; \
1332 if (GET_CODE (addr) == REG) \
1333 base = addr, offset = const0_rtx; \
1334 else if (GET_CODE (addr) == PLUS \
1335 && GET_CODE (XEXP (addr, 0)) == REG) \
1336 base = XEXP (addr, 0), offset = XEXP (addr, 1); \
1337 else if (GET_CODE (addr) == SYMBOL_REF \
1338 && CONSTANT_POOL_ADDRESS_P (addr)) \
1340 offset = GEN_INT (get_pool_offset (addr) + 12); \
1341 base = gen_rtx_REG (SImode, 14); \
1343 else if (GET_CODE (addr) == CONST \
1344 && GET_CODE (XEXP (addr, 0)) == PLUS \
1345 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT \
1346 && GET_CODE (XEXP (XEXP (addr, 0), 0)) == SYMBOL_REF \
1347 && CONSTANT_POOL_ADDRESS_P (XEXP (XEXP (addr, 0), 0))) \
1349 offset = plus_constant (XEXP (XEXP (addr, 0), 1), \
1350 (get_pool_offset (XEXP (XEXP (addr, 0), 0)) \
1352 base = gen_rtx_REG (SImode, 14); \
1354 output_addr_const (FILE, offset); \
1356 fprintf (FILE, "(%s)", reg_names [REGNO (base)]); \
1359 /* Define the codes that are matched by predicates in aux-output.c. */
1361 #define PREDICATE_CODES \
1362 {"zero_memory_operand", {SUBREG, MEM}}, \
1363 {"short_memory_operand", {SUBREG, MEM}}, \
1364 {"symbolic_memory_operand", {SUBREG, MEM}}, \
1365 {"current_function_operand", {MEM}}, \
1366 {"constant_pool_address_operand", {SUBREG, CONST}}, \
1367 {"romp_symbolic_operand", {LABEL_REF, SYMBOL_REF, CONST}}, \
1368 {"constant_operand", {LABEL_REF, SYMBOL_REF, PLUS, CONST, CONST_INT}}, \
1369 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1370 {"reg_or_any_cint_operand", {SUBREG, REG, CONST_INT}}, \
1371 {"short_cint_operand", {CONST_INT}}, \
1372 {"reg_or_D_operand", {SUBREG, REG, CONST_INT}}, \
1373 {"reg_or_add_operand", {SUBREG, REG, LABEL_REF, SYMBOL_REF, \
1374 PLUS, CONST, CONST_INT}}, \
1375 {"reg_or_and_operand", {SUBREG, REG, CONST_INT}}, \
1376 {"reg_or_mem_operand", {SUBREG, REG, MEM}}, \
1377 {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
1378 {"romp_operand", {SUBREG, MEM, REG, CONST_INT, CONST, LABEL_REF, \
1379 SYMBOL_REF, CONST_DOUBLE}}, \
1380 {"reg_0_operand", {REG}}, \
1381 {"reg_15_operand", {REG}}, \
1382 {"float_binary", {PLUS, MINUS, MULT, DIV}}, \
1383 {"float_unary", {NEG, ABS}}, \
1384 {"float_conversion", {FLOAT_TRUNCATE, FLOAT_EXTEND, FLOAT, FIX}},