1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 enum cmp_type /* comparison type */
26 CMP_SI, /* compare integers */
27 CMP_SF, /* compare single precision floats */
28 CMP_DF, /* compare double precision floats */
29 CMP_MAX /* max comparison type */
32 /* For long call handling. */
33 extern unsigned int total_code_bytes;
35 /* Which processor to schedule for. */
44 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
46 /* For -mschedule= option. */
47 extern char *pa_cpu_string;
48 extern enum processor_type pa_cpu;
50 /* Print subsidiary information on the compiler version in use. */
52 #define TARGET_VERSION fprintf (stderr, " (hppa)");
54 /* Run-time compilation parameters selecting different hardware subsets. */
56 extern int target_flags;
58 /* compile code for HP-PA 1.1 ("Snake") */
60 #define TARGET_SNAKE (target_flags & 1)
62 /* Disable all FP registers (they all become fixed). This may be necessary
63 for compiling kernels which perform lazy context switching of FP regs.
64 Note if you use this option and try to perform floating point operations
65 the compiler will abort! */
67 #define TARGET_DISABLE_FPREGS (target_flags & 2)
69 /* Generate code which assumes that calls through function pointers will
70 never cross a space boundary. Such assumptions are generally safe for
71 building kernels and statically linked executables. Code compiled with
72 this option will fail miserably if the executable is dynamically linked
73 or uses nested functions! */
74 #define TARGET_FAST_INDIRECT_CALLS (target_flags & 4)
76 /* Allow unconditional jumps in the delay slots of call instructions. */
77 #define TARGET_JUMP_IN_DELAY (target_flags & 8)
79 /* In rare cases, a millicode call via "bl" can not be turned into
80 a millicode call using "ble" (when SHLIB_INFO subspace is very large).
82 This option forces just millicode calls to use inline long-calls
83 This is far more efficient than the old long-call option which forced
84 every function to be called indirectly (as is still the case for
85 TARGET_PORTABLE_RUNTIME).
87 ??? What about simple jumps, they can suffer from the same problem.
88 Would require significant surgery in pa.md. */
90 #define TARGET_MILLICODE_LONG_CALLS (target_flags & 16)
92 /* Disable indexed addressing modes. */
94 #define TARGET_DISABLE_INDEXING (target_flags & 32)
96 /* Emit code which follows the new portable runtime calling conventions
97 HP wants everyone to use for ELF objects. If at all possible you want
98 to avoid this since it's a performance loss for non-prototyped code.
100 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
101 long-call stubs which is quite expensive. */
103 #define TARGET_PORTABLE_RUNTIME (target_flags & 64)
105 /* Emit directives only understood by GAS. This allows parameter
106 relocations to work for static functions. There is no way
107 to make them work the HP assembler at this time. */
109 #define TARGET_GAS (target_flags & 128)
111 /* Emit code for processors which do not have an FPU. */
113 #define TARGET_SOFT_FLOAT (target_flags & 256)
115 /* Macro to define tables used to set the flags.
116 This is a list in braces of pairs in braces,
117 each pair being { "NAME", VALUE }
118 where VALUE is the bits to set or minus the bits to clear.
119 An empty string NAME is used to identify the default VALUE. */
121 #define TARGET_SWITCHES \
124 {"pa-risc-1-0", -1}, \
125 {"pa-risc-1-1", 1}, \
126 {"disable-fpregs", 2}, \
127 {"no-disable-fpregs", -2}, \
128 {"fast-indirect-calls", 4}, \
129 {"no-fast-indirect-calls", -4},\
130 {"jump-in-delay", 8}, \
131 {"no-jump-in-delay", -8}, \
132 {"millicode-long-calls", 16},\
133 {"no-millicode-long-calls", -16},\
134 {"disable-indexing", 32}, \
135 {"no-disable-indexing", -32},\
136 {"portable-runtime", 64+16},\
137 {"no-portable-runtime", -(64+16)},\
140 {"soft-float", 256}, \
141 {"no-soft-float", -256}, \
142 { "", TARGET_DEFAULT}}
144 #ifndef TARGET_DEFAULT
145 #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
148 #define TARGET_OPTIONS \
150 { "schedule=", &pa_cpu_string }\
153 #define OVERRIDE_OPTIONS override_options ()
155 #define DBX_DEBUGGING_INFO
156 #define DEFAULT_GDB_EXTENSIONS 1
158 /* This is the way other stabs-in-XXX tools do things. We will be
160 #define DBX_BLOCKS_FUNCTION_RELATIVE 1
162 /* Likewise for linenos.
164 We make the first line stab special to avoid adding several
165 gross hacks to GAS. */
166 #undef ASM_OUTPUT_SOURCE_LINE
167 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
168 { static int sym_lineno = 1; \
169 static tree last_function_decl = NULL; \
170 if (current_function_decl == last_function_decl) \
171 fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \
173 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \
176 fprintf (file, "\t.stabn 68,0,%d,0\n", line); \
177 last_function_decl = current_function_decl; \
180 /* But, to make this work, we have to output the stabs for the function
182 #define DBX_FUNCTION_FIRST
184 /* Only labels should ever begin in column zero. */
185 #define ASM_STABS_OP "\t.stabs"
186 #define ASM_STABN_OP "\t.stabn"
188 /* GDB always assumes the current function's frame begins at the value
189 of the stack pointer upon entry to the current function. Accessing
190 local variables and parameters passed on the stack is done using the
191 base of the frame + an offset provided by GCC.
193 For functions which have frame pointers this method works fine;
194 the (frame pointer) == (stack pointer at function entry) and GCC provides
195 an offset relative to the frame pointer.
197 This loses for functions without a frame pointer; GCC provides an offset
198 which is relative to the stack pointer after adjusting for the function's
199 frame size. GDB would prefer the offset to be relative to the value of
200 the stack pointer at the function's entry. Yuk! */
201 #define DEBUGGER_AUTO_OFFSET(X) \
202 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
203 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
205 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
206 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
207 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
209 /* gdb needs a null N_SO at the end of each file for scattered loading. */
211 #undef DBX_OUTPUT_MAIN_SOURCE_FILE_END
212 #define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \
214 "%s\n\t.stabs \"%s\",%d,0,0,L$text_end\nL$text_end:\n",\
215 TEXT_SECTION_ASM_OP, "" , N_SO)
217 #if (TARGET_DEFAULT & 1) == 0
218 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
219 %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
221 #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:%{!msoft-float:-D__hp9000s700 -D_PA_RISC1_1}}}"
224 /* Defines for a K&R CC */
226 #define CC1_SPEC "%{pg:} %{p:}"
228 #define LINK_SPEC "%{!shared:-u main} %{shared:-b}"
230 /* We don't want -lg. */
232 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
235 /* Allow $ in identifiers. */
236 #define DOLLARS_IN_IDENTIFIERS 2
238 /* Make gcc agree with <machine/ansi.h> */
240 #define SIZE_TYPE "unsigned int"
241 #define PTRDIFF_TYPE "int"
242 #define WCHAR_TYPE "unsigned int"
243 #define WCHAR_TYPE_SIZE 32
245 /* Show we can debug even without a frame pointer. */
246 #define CAN_DEBUG_WITHOUT_FP
248 /* Machine dependent reorg pass. */
249 #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
251 /* Names to predefine in the preprocessor for this target machine. */
253 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
255 /* HPUX has a program 'chatr' to list the dependencies of dynamically
256 linked executables and shared libraries. */
257 #define LDD_SUFFIX "chatr"
258 /* look for lines like "dynamic /usr/lib/X11R5/libX11.sl". */
259 #define PARSE_LDD_OUTPUT(PTR) \
261 while (*PTR == ' ') PTR++; \
262 if (strncmp (PTR, "dynamic", sizeof ("dynamic") - 1) == 0) \
264 PTR += sizeof ("dynamic") - 1; \
265 while (*p == ' ') PTR++; \
271 /* target machine storage layout */
273 /* Define for cross-compilation from a host with a different float format
274 or endianness (e.g. VAX, x86). */
275 #define REAL_ARITHMETIC
277 /* Define this macro if it is advisable to hold scalars in registers
278 in a wider mode than that declared by the program. In such cases,
279 the value is constrained to be within the bounds of the declared
280 type, but kept valid in the wider mode. The signedness of the
281 extension may differ from that of the type. */
283 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
284 if (GET_MODE_CLASS (MODE) == MODE_INT \
285 && GET_MODE_SIZE (MODE) < 4) \
288 /* Define this if most significant bit is lowest numbered
289 in instructions that operate on numbered bit-fields. */
290 #define BITS_BIG_ENDIAN 1
292 /* Define this if most significant byte of a word is the lowest numbered. */
293 /* That is true on the HP-PA. */
294 #define BYTES_BIG_ENDIAN 1
296 /* Define this if most significant word of a multiword number is lowest
298 #define WORDS_BIG_ENDIAN 1
300 /* number of bits in an addressable storage unit */
301 #define BITS_PER_UNIT 8
303 /* Width in bits of a "word", which is the contents of a machine register.
304 Note that this is not necessarily the width of data type `int';
305 if using 16-bit ints on a 68000, this would still be 32.
306 But on a machine with 16-bit registers, this would be 16. */
307 #define BITS_PER_WORD 32
309 /* Width of a word, in units (bytes). */
310 #define UNITS_PER_WORD 4
312 /* Width in bits of a pointer.
313 See also the macro `Pmode' defined below. */
314 #define POINTER_SIZE 32
316 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
317 #define PARM_BOUNDARY 32
319 /* Largest alignment required for any stack parameter, in bits.
320 Don't define this if it is equal to PARM_BOUNDARY */
321 #define MAX_PARM_BOUNDARY 64
323 /* Boundary (in *bits*) on which stack pointer should be aligned. */
324 #define STACK_BOUNDARY 512
326 /* Allocation boundary (in *bits*) for the code of a function. */
327 #define FUNCTION_BOUNDARY 32
329 /* Alignment of field after `int : 0' in a structure. */
330 #define EMPTY_FIELD_BOUNDARY 32
332 /* Every structure's size must be a multiple of this. */
333 #define STRUCTURE_SIZE_BOUNDARY 8
335 /* A bitfield declared as `int' forces `int' alignment for the struct. */
336 #define PCC_BITFIELD_TYPE_MATTERS 1
338 /* No data type wants to be aligned rounder than this. */
339 #define BIGGEST_ALIGNMENT 64
341 /* The .align directive in the HP assembler allows up to a 32 alignment. */
342 #define MAX_OFILE_ALIGNMENT 32768
344 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
345 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
346 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
348 /* Make arrays of chars word-aligned for the same reasons. */
349 #define DATA_ALIGNMENT(TYPE, ALIGN) \
350 (TREE_CODE (TYPE) == ARRAY_TYPE \
351 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
352 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
355 /* Set this nonzero if move instructions will actually fail to work
356 when given unaligned data. */
357 #define STRICT_ALIGNMENT 1
359 /* Generate calls to memcpy, memcmp and memset. */
360 #define TARGET_MEM_FUNCTIONS
362 /* Standard register usage. */
364 /* Number of actual hardware registers.
365 The hardware registers are assigned numbers for the compiler
366 from 0 to just below FIRST_PSEUDO_REGISTER.
367 All registers that the compiler knows about must be given numbers,
368 even those that are not normally considered general registers.
370 HP-PA 1.0 has 32 fullword registers and 16 floating point
371 registers. The floating point registers hold either word or double
374 16 additional registers are reserved.
376 HP-PA 1.1 has 32 fullword registers and 32 floating point
377 registers. However, the floating point registers behave
378 differently: the left and right halves of registers are addressable
379 as 32 bit registers. So, we will set things up like the 68k which
380 has different fp units: define separate register sets for the 1.0
383 #define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
386 /* 1 for registers that have pervasive standard uses
387 and are not available for the register allocator.
389 On the HP-PA, these are:
390 Reg 0 = 0 (hardware). However, 0 is used for condition code,
392 Reg 1 = ADDIL target/Temporary (hardware).
393 Reg 2 = Return Pointer
394 Reg 3 = Frame Pointer
395 Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
396 Reg 4-18 = Preserved Registers
397 Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
398 Reg 20-22 = Temporary Registers
399 Reg 23-26 = Temporary/Parameter Registers
400 Reg 27 = Global Data Pointer (hp)
401 Reg 28 = Temporary/???/Return Value register
402 Reg 29 = Temporary/Static Chain/Return Value register #2
403 Reg 30 = stack pointer
404 Reg 31 = Temporary/Millicode Return Pointer (hp)
406 Freg 0-3 = Status Registers -- Not known to the compiler.
407 Freg 4-7 = Arguments/Return Value
408 Freg 8-11 = Temporary Registers
409 Freg 12-15 = Preserved Registers
411 Freg 16-31 = Reserved
413 On the Snake, fp regs are
415 Freg 0-3 = Status Registers -- Not known to the compiler.
416 Freg 4L-7R = Arguments/Return Value
417 Freg 8L-11R = Temporary Registers
418 Freg 12L-21R = Preserved Registers
419 Freg 22L-31R = Temporary Registers
423 #define FIXED_REGISTERS \
424 {0, 0, 0, 0, 0, 0, 0, 0, \
425 0, 0, 0, 0, 0, 0, 0, 0, \
426 0, 0, 0, 0, 0, 0, 0, 0, \
427 0, 0, 0, 1, 0, 0, 1, 0, \
429 0, 0, 0, 0, 0, 0, 0, 0, \
430 0, 0, 0, 0, 0, 0, 0, 0, \
431 0, 0, 0, 0, 0, 0, 0, 0, \
432 0, 0, 0, 0, 0, 0, 0, 0, \
433 0, 0, 0, 0, 0, 0, 0, 0, \
434 0, 0, 0, 0, 0, 0, 0, 0, \
435 0, 0, 0, 0, 0, 0, 0, 0, \
438 /* 1 for registers not available across function calls.
439 These must include the FIXED_REGISTERS and also any
440 registers that can be used without being saved.
441 The latter must include the registers where values are returned
442 and the register where structure-value addresses are passed.
443 Aside from that, you can include as many other registers as you like. */
444 #define CALL_USED_REGISTERS \
445 {1, 1, 1, 0, 0, 0, 0, 0, \
446 0, 0, 0, 0, 0, 0, 0, 0, \
447 0, 0, 0, 1, 1, 1, 1, 1, \
448 1, 1, 1, 1, 1, 1, 1, 1, \
450 1, 1, 1, 1, 1, 1, 1, 1, \
451 1, 1, 1, 1, 1, 1, 1, 1, \
452 0, 0, 0, 0, 0, 0, 0, 0, \
453 0, 0, 0, 0, 0, 0, 0, 0, \
454 0, 0, 0, 0, 1, 1, 1, 1, \
455 1, 1, 1, 1, 1, 1, 1, 1, \
456 1, 1, 1, 1, 1, 1, 1, 1, \
459 #define CONDITIONAL_REGISTER_USAGE \
463 for (i = 56; i < 88; i++) \
464 fixed_regs[i] = call_used_regs[i] = 1; \
465 for (i = 33; i < 88; i += 2) \
466 fixed_regs[i] = call_used_regs[i] = 1; \
468 else if (TARGET_DISABLE_FPREGS \
469 || TARGET_SOFT_FLOAT) \
471 for (i = 32; i < 88; i++) \
472 fixed_regs[i] = call_used_regs[i] = 1; \
476 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
477 fixed_regs[PIC_OFFSET_TABLE_REGNUM_SAVED] = 1;\
481 /* Allocate the call used registers first. This should minimize
482 the number of registers that need to be saved (as call used
483 registers will generally not be allocated across a call).
485 Experimentation has shown slightly better results by allocating
486 FP registers first. */
488 #define REG_ALLOC_ORDER \
490 /* caller-saved fp regs. */ \
491 40, 41, 42, 43, 44, 45, 46, 47, \
492 68, 69, 70, 71, 72, 73, 74, 75, \
493 76, 77, 78, 79, 80, 81, 82, 83, \
495 32, 33, 34, 35, 36, 37, 38, 39, \
496 /* caller-saved general regs. */ \
497 19, 20, 21, 22, 23, 24, 25, 26, \
499 /* callee-saved fp regs. */ \
500 48, 49, 50, 51, 52, 53, 54, 55, \
501 56, 57, 58, 59, 60, 61, 62, 63, \
503 /* callee-saved general regs. */ \
504 3, 4, 5, 6, 7, 8, 9, 10, \
505 11, 12, 13, 14, 15, 16, 17, 18, \
506 /* special registers. */ \
510 /* True if register is floating-point. */
511 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87)
513 /* Return number of consecutive hard regs needed starting at reg REGNO
514 to hold something of mode MODE.
515 This is ordinarily the length in words of a value of mode MODE
516 but can be less for certain modes in special long registers.
518 On the HP-PA, ordinary registers hold 32 bits worth;
519 The floating point registers are 64 bits wide. Snake fp regs are 32
521 #define HARD_REGNO_NREGS(REGNO, MODE) \
522 (!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \
523 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
525 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
526 On the HP-PA, the cpu registers can hold any mode. We
527 force this to be an even register is it cannot hold the full mode. */
528 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
529 ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
530 /* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
531 : !TARGET_SNAKE && FP_REGNO_P (REGNO) \
532 ? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
533 /* Make wide modes be in aligned registers. */ \
534 : GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
536 /* Value is 1 if it is a good idea to tie two pseudo registers
537 when one has mode MODE1 and one has mode MODE2.
538 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
539 for any hard reg, then this must be 0 for correct output. */
540 #define MODES_TIEABLE_P(MODE1, MODE2) \
541 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
543 /* Specify the registers used for certain standard purposes.
544 The values of these macros are register numbers. */
546 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
547 /* #define PC_REGNUM */
549 /* Register to use for pushing function arguments. */
550 #define STACK_POINTER_REGNUM 30
552 /* Base register for access to local variables of the function. */
553 #define FRAME_POINTER_REGNUM 3
555 /* Value should be nonzero if functions must have frame pointers. */
556 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
559 /* C statement to store the difference between the frame pointer
560 and the stack pointer values immediately after the function prologue.
562 Note, we always pretend that this is a leaf function because if
563 it's not, there's no point in trying to eliminate the
564 frame pointer. If it is a leaf function, we guessed right! */
565 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
566 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
568 /* Base register for access to arguments of the function. */
569 #define ARG_POINTER_REGNUM 3
571 /* Register in which static-chain is passed to a function. */
573 #define STATIC_CHAIN_REGNUM 29
575 /* Register which holds offset table for position-independent
578 #define PIC_OFFSET_TABLE_REGNUM 19
579 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
581 /* Register into which we save the PIC_OFFEST_TABLE_REGNUM so that it
582 can be restore across function calls. */
583 #define PIC_OFFSET_TABLE_REGNUM_SAVED 4
585 /* SOM ABI says that objects larger than 64 bits are returned in memory. */
586 #define DEFAULT_PCC_STRUCT_RETURN 0
587 #define RETURN_IN_MEMORY(TYPE) \
588 (int_size_in_bytes (TYPE) > 8 || TREE_ADDRESSABLE (TYPE))
590 /* Register in which address to store a structure value
591 is passed to a function. */
592 #define STRUCT_VALUE_REGNUM 28
594 /* Define the classes of registers for register constraints in the
595 machine description. Also define ranges of constants.
597 One of the classes must always be named ALL_REGS and include all hard regs.
598 If there is more than one class, another class must be named NO_REGS
599 and contain no registers.
601 The name GENERAL_REGS must be the name of a class (or an alias for
602 another name such as ALL_REGS). This is the class of registers
603 that is allowed by "g" or "r" in a register constraint.
604 Also, registers outside this class are allocated only when
605 instructions express preferences for them.
607 The classes must be numbered in nondecreasing order; that is,
608 a larger-numbered class must never be contained completely
609 in a smaller-numbered class.
611 For any two classes, it is very desirable that there be another
612 class that represents their union. */
614 /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
615 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
616 fmpyadd and fmpysub are restricted. */
618 enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
619 SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
621 #define N_REG_CLASSES (int) LIM_REG_CLASSES
623 /* Give names of register classes as strings for dump file. */
625 #define REG_CLASS_NAMES \
626 {"NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", \
627 "GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
629 /* Define which registers fit in which classes.
630 This is an initializer for a vector of HARD_REG_SET
631 of length N_REG_CLASSES. Register 0, the "condition code" register,
634 #define REG_CLASS_CONTENTS \
635 {{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
636 {0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
637 {0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
638 {0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
639 {0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
640 {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
641 {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
643 /* The same information, inverted:
644 Return the class number of the smallest class containing
645 reg number REGNO. This could be a conditional expression
646 or could index an array. */
648 #define REGNO_REG_CLASS(REGNO) \
649 ((REGNO) == 0 ? NO_REGS \
650 : (REGNO) == 1 ? R1_REGS \
651 : (REGNO) < 32 ? GENERAL_REGS \
652 : (REGNO) < 88 ? FP_REGS \
655 /* The class value for index registers, and the one for base regs. */
656 #define INDEX_REG_CLASS GENERAL_REGS
657 #define BASE_REG_CLASS GENERAL_REGS
659 #define FP_REG_CLASS_P(CLASS) \
662 /* Get reg_class from a letter such as appears in the machine description. */
663 /* Keep 'x' for backward compatibility with user asm. */
664 #define REG_CLASS_FROM_LETTER(C) \
665 ((C) == 'f' ? FP_REGS : \
666 (C) == 'x' ? FP_REGS : \
667 (C) == 'q' ? SHIFT_REGS : \
668 (C) == 'a' ? R1_REGS : \
669 (C) == 'Z' ? ALL_REGS : NO_REGS)
671 /* The letters I, J, K, L and M in a register constraint string
672 can be used to stand for particular ranges of immediate operands.
673 This macro defines what the ranges are.
674 C is the letter, and VALUE is a constant value.
675 Return 1 if VALUE is in the range specified by C.
677 `I' is used for the 11 bit constants.
678 `J' is used for the 14 bit constants.
679 `K' is used for values that can be moved with a zdepi insn.
680 `L' is used for the 5 bit constants.
682 `N' is used for values with the least significant 11 bits equal to zero.
683 `O' is used for numbers n such that n+1 is a power of 2.
686 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
687 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
688 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
689 : (C) == 'K' ? zdepi_cint_p (VALUE) \
690 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
691 : (C) == 'M' ? (VALUE) == 0 \
692 : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
693 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
694 : (C) == 'P' ? and_mask_p (VALUE) \
697 /* Similar, but for floating or large integer constants, and defining letters
698 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
700 For PA, `G' is the floating-point constant zero. `H' is undefined. */
702 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
703 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
704 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
707 /* Given an rtx X being reloaded into a reg required to be
708 in class CLASS, return the class of reg to actually use.
709 In general this is just CLASS; but on some machines
710 in some cases it is preferable to use a more restrictive class. */
711 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
713 /* Return the register class of a scratch register needed to copy IN into
714 or out of a register in CLASS in MODE. If it can be done directly,
715 NO_REGS is returned. */
717 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
718 secondary_reload_class (CLASS, MODE, IN)
720 /* On the PA it is not possible to directly move data between
721 GENERAL_REGS and FP_REGS. */
722 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
723 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
725 /* Return the stack location to use for secondary memory needed reloads. */
726 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
727 gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
729 /* Return the maximum number of consecutive registers
730 needed to represent mode MODE in a register of class CLASS. */
731 #define CLASS_MAX_NREGS(CLASS, MODE) \
732 (!TARGET_SNAKE && (CLASS) == FP_REGS ? 1 : \
733 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
735 /* Stack layout; function entry, exit and calling. */
737 /* Define this if pushing a word on the stack
738 makes the stack pointer a smaller address. */
739 /* #define STACK_GROWS_DOWNWARD */
741 /* Believe it or not. */
742 #define ARGS_GROW_DOWNWARD
744 /* Define this if the nominal address of the stack frame
745 is at the high-address end of the local variables;
746 that is, each additional local variable allocated
747 goes at a more negative offset in the frame. */
748 /* #define FRAME_GROWS_DOWNWARD */
750 /* Offset within stack frame to start allocating local variables at.
751 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
752 first local allocated. Otherwise, it is the offset to the BEGINNING
753 of the first local allocated. */
754 #define STARTING_FRAME_OFFSET 8
756 /* If we generate an insn to push BYTES bytes,
757 this says how many the stack pointer really advances by.
758 On the HP-PA, don't define this because there are no push insns. */
759 /* #define PUSH_ROUNDING(BYTES) */
761 /* Offset of first parameter from the argument pointer register value.
762 This value will be negated because the arguments grow down.
763 Also note that on STACK_GROWS_UPWARD machines (such as this one)
764 this is the distance from the frame pointer to the end of the first
765 argument, not it's beginning. To get the real offset of the first
766 argument, the size of the argument must be added.
768 ??? Have to check on this.*/
770 #define FIRST_PARM_OFFSET(FNDECL) -32
772 /* Absolute value of offset from top-of-stack address to location to store the
773 function parameter if it can't go in a register.
774 Addresses for following parameters are computed relative to this one. */
775 #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
778 /* When a parameter is passed in a register, stack space is still
780 #define REG_PARM_STACK_SPACE(DECL) 16
782 /* Define this if the above stack space is to be considered part of the
783 space allocated by the caller. */
784 #define OUTGOING_REG_PARM_STACK_SPACE
786 /* Keep the stack pointer constant throughout the function.
787 This is both an optimization and a necessity: longjmp
788 doesn't behave itself when the stack pointer moves within
790 #define ACCUMULATE_OUTGOING_ARGS
792 /* The weird HPPA calling conventions require a minimum of 48 bytes on
793 the stack: 16 bytes for register saves, and 32 bytes for magic.
794 This is the difference between the logical top of stack and the
796 #define STACK_POINTER_OFFSET -32
798 #define STACK_DYNAMIC_OFFSET(FNDECL) \
799 ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
801 /* Value is 1 if returning from a function call automatically
802 pops the arguments described by the number-of-args field in the call.
803 FUNDECL is the declaration node of the function (as a tree),
804 FUNTYPE is the data type of the function (as a tree),
805 or for a library call it is an identifier node for the subroutine name. */
807 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
809 /* Define how to find the value returned by a function.
810 VALTYPE is the data type of the value (as a tree).
811 If the precise function being called is known, FUNC is its FUNCTION_DECL;
812 otherwise, FUNC is 0. */
814 /* On the HP-PA the value is found in register(s) 28(-29), unless
815 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
818 #define FUNCTION_VALUE(VALTYPE, FUNC) \
819 gen_rtx (REG, TYPE_MODE (VALTYPE), ((! TARGET_SOFT_FLOAT \
820 && (TYPE_MODE (VALTYPE) == SFmode || \
821 TYPE_MODE (VALTYPE) == DFmode)) ? \
824 /* Define how to find the value returned by a library function
825 assuming the value has mode MODE. */
827 #define LIBCALL_VALUE(MODE) \
828 gen_rtx (REG, MODE, \
829 (! TARGET_SOFT_FLOAT \
830 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
832 /* 1 if N is a possible register number for a function value
833 as seen by the caller. */
835 #define FUNCTION_VALUE_REGNO_P(N) \
836 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
838 /* 1 if N is a possible register number for function argument passing. */
840 #define FUNCTION_ARG_REGNO_P(N) \
841 (((N) >= 23 && (N) <= 26) || (! TARGET_SOFT_FLOAT && (N) >= 32 && (N) <= 39))
843 /* Define a data type for recording info about an argument list
844 during the scan of that argument list. This data type should
845 hold all necessary information about the function itself
846 and about the args processed so far, enough to enable macros
847 such as FUNCTION_ARG to determine where the next arg should go.
849 On the HP-PA, this is a single integer, which is a number of words
850 of arguments scanned so far (including the invisible argument,
851 if any, which holds the structure-value-address).
852 Thus 4 or more means all following args should go on the stack. */
854 struct hppa_args {int words, nargs_prototype; };
856 #define CUMULATIVE_ARGS struct hppa_args
858 /* Initialize a variable CUM of type CUMULATIVE_ARGS
859 for a call to a function whose data type is FNTYPE.
860 For a library call, FNTYPE is 0. */
862 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
864 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
865 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
866 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
867 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
872 /* Similar, but when scanning the definition of a procedure. We always
873 set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
875 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
877 (CUM).nargs_prototype = 1000
879 /* Figure out the size in words of the function argument. */
881 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
882 ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
884 /* Update the data in CUM to advance over an argument
885 of mode MODE and data type TYPE.
886 (TYPE is null for libcalls where that information may not be available.) */
888 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
889 { (CUM).nargs_prototype--; \
890 ((((CUM).words & 01) && (TYPE) != 0 \
891 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \
893 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \
896 /* Determine where to put an argument to a function.
897 Value is zero to push the argument on the stack,
898 or a hard register in which to store the argument.
900 MODE is the argument's machine mode.
901 TYPE is the data type of the argument (as a tree).
902 This is null for libcalls where that information may
904 CUM is a variable of type CUMULATIVE_ARGS which gives info about
905 the preceding args and about the function being called.
906 NAMED is nonzero if this argument is a named parameter
907 (otherwise it is an extra parameter matching an ellipsis).
909 On the HP-PA the first four words of args are normally in registers
910 and the rest are pushed. But any arg that won't entirely fit in regs
913 Arguments passed in registers are either 1 or 2 words long.
915 The caller must make a distinction between calls to explicitly named
916 functions and calls through pointers to functions -- the conventions
917 are different! Calls through pointers to functions only use general
918 registers for the first four argument words.
920 Of course all this is different for the portable runtime model
921 HP wants everyone to use for ELF. Ugh. Here's a quick description
922 of how it's supposed to work.
924 1) callee side remains unchanged. It expects integer args to be
925 in the integer registers, float args in the float registers and
926 unnamed args in integer registers.
928 2) caller side now depends on if the function being called has
929 a prototype in scope (rather than if it's being called indirectly).
931 2a) If there is a prototype in scope, then arguments are passed
932 according to their type (ints in integer registers, floats in float
933 registers, unnamed args in integer registers.
935 2b) If there is no prototype in scope, then floating point arguments
936 are passed in both integer and float registers. egad.
938 FYI: The portable parameter passing conventions are almost exactly like
939 the standard parameter passing conventions on the RS6000. That's why
940 you'll see lots of similar code in rs6000.h. */
942 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
944 /* Do not expect to understand this without reading it several times. I'm
945 tempted to try and simply it, but I worry about breaking something. */
947 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
948 (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
949 ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \
950 || !FLOAT_MODE_P (MODE) || TARGET_SOFT_FLOAT \
951 || (CUM).nargs_prototype > 0) \
952 ? gen_rtx (REG, (MODE), \
953 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
954 ? (((!current_call_is_indirect \
955 || TARGET_PORTABLE_RUNTIME) \
956 && (MODE) == DFmode \
957 && ! TARGET_SOFT_FLOAT) \
958 ? ((CUM).words ? 38 : 34) \
959 : ((CUM).words ? 23 : 25)) \
960 : (((!current_call_is_indirect \
961 || TARGET_PORTABLE_RUNTIME) \
962 && (MODE) == SFmode \
963 && ! TARGET_SOFT_FLOAT) \
964 ? (32 + 2 * (CUM).words) \
965 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \
967 /* We are calling a non-prototyped function with floating point \
968 arguments using the portable conventions. */ \
969 : gen_rtx (EXPR_LIST, VOIDmode, \
970 gen_rtx (REG, (MODE), \
971 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
972 ? ((CUM).words ? 38 : 34) \
973 : (32 + 2 * (CUM).words))), \
974 gen_rtx (REG, (MODE), \
975 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
976 ? ((CUM).words ? 23 : 25) \
977 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE),\
979 /* Pass this parameter in the stack. */ \
982 /* For an arg passed partly in registers and partly in memory,
983 this is the number of registers used.
984 For args passed entirely in registers or entirely in memory, zero. */
986 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
988 /* If defined, a C expression that gives the alignment boundary, in
989 bits, of an argument with the specified mode and type. If it is
990 not defined, `PARM_BOUNDARY' is used for all arguments. */
992 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
994 ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
995 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
997 : GET_MODE_ALIGNMENT(MODE)))
999 /* Arguments larger than eight bytes are passed by invisible reference */
1001 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1002 ((TYPE) && int_size_in_bytes (TYPE) > 8)
1004 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
1005 ((TYPE) && int_size_in_bytes (TYPE) > 8)
1008 extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
1009 extern enum cmp_type hppa_branch_type;
1011 /* Output the label for a function definition. */
1012 #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
1013 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
1014 do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
1015 fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
1017 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
1018 do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
1019 fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
1022 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1023 do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
1024 tree tree_type = TREE_TYPE (DECL); \
1027 if (TREE_PUBLIC (DECL) || TARGET_GAS) \
1028 { extern int current_function_varargs; \
1029 if (TREE_PUBLIC (DECL)) \
1031 fputs ("\t.EXPORT ", FILE); \
1032 assemble_name (FILE, NAME); \
1033 fputs (",ENTRY,PRIV_LEV=3", FILE); \
1037 fputs ("\t.PARAM ", FILE); \
1038 assemble_name (FILE, NAME); \
1040 if (TARGET_PORTABLE_RUNTIME) \
1042 fputs (",ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO,", FILE); \
1043 fputs ("RTNVAL=NO\n", FILE); \
1046 for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
1047 parm = TREE_CHAIN (parm)) \
1049 if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode \
1050 && ! TARGET_SOFT_FLOAT) \
1051 fprintf (FILE, ",ARGW%d=FR", i++); \
1052 else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode \
1053 && ! TARGET_SOFT_FLOAT) \
1058 ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
1066 FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
1067 DECL_ARG_TYPE (parm)); \
1068 /* Passing structs by invisible reference uses \
1069 one general register. */ \
1072 if (arg_size == 2 && i <= 2) \
1075 fprintf (FILE, ",ARGW%d=GR", i++); \
1076 fprintf (FILE, ",ARGW%d=GR", i++); \
1078 else if (arg_size == 1) \
1079 fprintf (FILE, ",ARGW%d=GR", i++); \
1084 /* anonymous args */ \
1085 if ((TYPE_ARG_TYPES (tree_type) != 0 \
1086 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
1087 != void_type_node)) \
1088 || current_function_varargs) \
1090 for (; i < 4; i++) \
1091 fprintf (FILE, ",ARGW%d=GR", i); \
1093 if (TYPE_MODE (fntype) == DFmode && ! TARGET_SOFT_FLOAT) \
1094 fprintf (FILE, ",RTNVAL=FR"); \
1095 else if (TYPE_MODE (fntype) == SFmode && ! TARGET_SOFT_FLOAT) \
1096 fprintf (FILE, ",RTNVAL=FU"); \
1097 else if (fntype != void_type_node) \
1098 fprintf (FILE, ",RTNVAL=GR"); \
1099 fputs ("\n", FILE); \
1102 /* This macro generates the assembly code for function entry.
1103 FILE is a stdio stream to output the code to.
1104 SIZE is an int: how many units of temporary storage to allocate.
1105 Refer to the array `regs_ever_live' to determine which registers
1106 to save; `regs_ever_live[I]' is nonzero if register number I
1107 is ever used in the function. This macro is responsible for
1108 knowing which registers should not be saved even if used. */
1110 /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1111 of memory. If any fpu reg is used in the function, we allocate
1112 such a block here, at the bottom of the frame, just in case it's needed.
1114 If this function is a leaf procedure, then we may choose not
1115 to do a "save" insn. The decision about whether or not
1116 to do this is made in regclass.c. */
1118 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1119 output_function_prologue (FILE, SIZE)
1121 /* Output assembler code to FILE to increment profiler label # LABELNO
1122 for profiling a function entry.
1124 Because HPUX _mcount is so different, we actually emit the
1125 profiling code in function_prologue. This just stores LABELNO for
1128 #define PROFILE_BEFORE_PROLOGUE
1129 #define FUNCTION_PROFILER(FILE, LABELNO) \
1130 { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1132 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1133 the stack pointer does not matter. The value is tested only in
1134 functions that have frame pointers.
1135 No definition is equivalent to always zero. */
1137 extern int may_call_alloca;
1138 extern int current_function_pretend_args_size;
1140 #define EXIT_IGNORE_STACK \
1141 (get_frame_size () != 0 \
1142 || current_function_calls_alloca || current_function_outgoing_args_size)
1145 /* This macro generates the assembly code for function exit,
1146 on machines that need it. If FUNCTION_EPILOGUE is not defined
1147 then individual return instructions are generated for each
1148 return statement. Args are same as for FUNCTION_PROLOGUE.
1150 The function epilogue should not depend on the current stack pointer!
1151 It should use the frame pointer only. This is mandatory because
1152 of alloca; we also take advantage of it to omit stack adjustments
1153 before returning. */
1155 /* This declaration is needed due to traditional/ANSI
1156 incompatibilities which cannot be #ifdefed away
1157 because they occur inside of macros. Sigh. */
1158 extern union tree_node *current_function_decl;
1160 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1161 output_function_epilogue (FILE, SIZE)
1163 /* Output assembler code for a block containing the constant parts
1164 of a trampoline, leaving space for the variable parts.\
1166 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1167 and then branches to the specified routine.
1169 This code template is copied from text segment to stack location
1170 and then patched with INITIALIZE_TRAMPOLINE to contain
1171 valid values, and then entered as a subroutine.
1173 It is best to keep this as small as possible to avoid having to
1174 flush multiple lines in the cache. */
1176 #define TRAMPOLINE_TEMPLATE(FILE) \
1178 fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \
1179 fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \
1180 fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \
1181 fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \
1182 fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \
1183 fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \
1184 fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \
1185 fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \
1186 fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \
1187 fprintf (FILE, "\t.word 0\n"); \
1188 fprintf (FILE, "\t.word 0\n"); \
1191 /* Length in units of the trampoline for entering a nested function.
1193 Flush the cache entries corresponding to the first and last addresses
1194 of the trampoline. This is necessary as the trampoline may cross two
1197 If the code part of the trampoline ever grows to > 32 bytes, then it
1198 will become necessary to hack on the cacheflush pattern in pa.md. */
1200 #define TRAMPOLINE_SIZE (11 * 4)
1202 /* Emit RTL insns to initialize the variable parts of a trampoline.
1203 FNADDR is an RTX for the address of the function's pure code.
1204 CXT is an RTX for the static chain value for the function.
1206 Move the function address to the trampoline template at offset 12.
1207 Move the static chain value to trampoline template at offset 16. */
1209 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1211 rtx start_addr, end_addr; \
1213 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1214 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1215 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1216 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1217 /* fdc and fic only use registers for the address to flush, \
1218 they do not accept integer displacements. */ \
1219 start_addr = force_reg (SImode, (TRAMP)); \
1220 end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1221 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1222 end_addr = force_reg (SImode, plus_constant (start_addr, 32)); \
1223 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1224 gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1227 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1228 reference the 4 integer arg registers and 4 fp arg registers.
1229 Ordinarily they are not call used registers, but they are for
1230 _builtin_saveregs, so we must make this explicit. */
1232 extern struct rtx_def *hppa_builtin_saveregs ();
1233 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) hppa_builtin_saveregs (ARGLIST)
1236 /* Addressing modes, and classification of registers for them. */
1238 #define HAVE_POST_INCREMENT
1239 #define HAVE_POST_DECREMENT
1241 #define HAVE_PRE_DECREMENT
1242 #define HAVE_PRE_INCREMENT
1244 /* Macros to check register numbers against specific register classes. */
1246 /* These assume that REGNO is a hard or pseudo reg number.
1247 They give nonzero only if REGNO is a hard reg of the suitable class
1248 or a pseudo reg currently allocated to a suitable hard reg.
1249 Since they use reg_renumber, they are safe only once reg_renumber
1250 has been allocated, which happens in local-alloc.c. */
1252 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1253 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1254 #define REGNO_OK_FOR_BASE_P(REGNO) \
1255 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1256 #define REGNO_OK_FOR_FP_P(REGNO) \
1257 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1259 /* Now macros that check whether X is a register and also,
1260 strictly, whether it is in a specified class.
1262 These macros are specific to the the HP-PA, and may be used only
1263 in code for printing assembler insns and in conditions for
1264 define_optimization. */
1266 /* 1 if X is an fp register. */
1268 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1270 /* Maximum number of registers that can appear in a valid memory address. */
1272 #define MAX_REGS_PER_ADDRESS 2
1274 /* Recognize any constant value that is a valid address except
1275 for symbolic addresses. We get better CSE by rejecting them
1276 here and allowing hppa_legitimize_address to break them up. We
1277 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1279 #define CONSTANT_ADDRESS_P(X) \
1280 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1281 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1282 || GET_CODE (X) == HIGH) \
1283 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1285 /* Include all constant integers and constant doubles, but not
1286 floating-point, except for floating-point zero. */
1288 #define LEGITIMATE_CONSTANT_P(X) \
1289 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1290 || (X) == CONST0_RTX (GET_MODE (X))) \
1291 && !(flag_pic && function_label_operand (X, VOIDmode)))
1293 /* Subroutine for EXTRA_CONSTRAINT.
1295 Return 1 iff OP is a pseudo which did not get a hard register and
1296 we are running the reload pass. */
1298 #define IS_RELOADING_PSEUDO_P(OP) \
1299 ((reload_in_progress \
1300 && GET_CODE (OP) == REG \
1301 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1302 && reg_renumber [REGNO (OP)] < 0))
1304 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1306 For the HPPA, `Q' means that this is a memory operand but not a
1307 symbolic memory operand. Note that an unassigned pseudo register
1308 is such a memory operand. Needed because reload will generate
1309 these things in insns and then not re-recognize the insns, causing
1310 constrain_operands to fail.
1312 Also note `Q' accepts any memory operand during the reload pass.
1313 This includes out-of-range displacements in reg+d addressing.
1314 This makes for better code. (??? For 2.5 address this issue).
1320 `T' is for fp loads and stores. */
1321 #define EXTRA_CONSTRAINT(OP, C) \
1323 (IS_RELOADING_PSEUDO_P (OP) \
1324 || (GET_CODE (OP) == MEM \
1325 && reload_in_progress) \
1326 || (GET_CODE (OP) == MEM \
1327 && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1328 && ! symbolic_memory_operand (OP, VOIDmode))) \
1330 (GET_CODE (OP) == MEM \
1331 /* Using DFmode forces only short displacements \
1332 to be recognized as valid in reg+d addresses. */\
1333 && memory_address_p (DFmode, XEXP (OP, 0))) : 0))
1335 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1336 and check its validity for a certain class.
1337 We have two alternate definitions for each of them.
1338 The usual definition accepts all pseudo regs; the other rejects
1339 them unless they have been allocated suitable hard regs.
1340 The symbol REG_OK_STRICT causes the latter definition to be used.
1342 Most source files want to accept pseudo regs in the hope that
1343 they will get allocated to the class that the insn wants them to be in.
1344 Source files for reload pass need to be strict.
1345 After reload, it makes no difference, since pseudo regs have
1346 been eliminated by then. */
1348 #ifndef REG_OK_STRICT
1350 /* Nonzero if X is a hard reg that can be used as an index
1351 or if it is a pseudo reg. */
1352 #define REG_OK_FOR_INDEX_P(X) \
1353 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1354 /* Nonzero if X is a hard reg that can be used as a base reg
1355 or if it is a pseudo reg. */
1356 #define REG_OK_FOR_BASE_P(X) \
1357 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1361 /* Nonzero if X is a hard reg that can be used as an index. */
1362 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1363 /* Nonzero if X is a hard reg that can be used as a base reg. */
1364 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1368 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1369 that is a valid memory address for an instruction.
1370 The MODE argument is the machine mode for the MEM expression
1371 that wants to use this address.
1373 On the HP-PA, the actual legitimate addresses must be
1374 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1375 But we can treat a SYMBOL_REF as legitimate if it is part of this
1376 function's constant-pool, because such addresses can actually
1377 be output as REG+SMALLINT.
1379 Note we only allow 5 bit immediates for access to a constant address;
1380 doing so avoids losing for loading/storing a FP register at an address
1381 which will not fit in 5 bits. */
1383 #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1384 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1386 #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1387 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1389 #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1390 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1392 #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1393 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1395 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1397 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1398 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1399 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1400 && REG_P (XEXP (X, 0)) \
1401 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1403 else if (GET_CODE (X) == PLUS) \
1405 rtx base = 0, index; \
1406 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1408 if (GET_CODE (XEXP (X, 1)) == REG \
1409 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1411 else if (flag_pic == 1 \
1412 && GET_CODE (XEXP (X, 1)) == SYMBOL_REF)\
1415 else if (REG_P (XEXP (X, 0)) \
1416 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1417 base = XEXP (X, 0), index = XEXP (X, 1); \
1418 else if (REG_P (XEXP (X, 1)) \
1419 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1420 base = XEXP (X, 1), index = XEXP (X, 0); \
1422 if (GET_CODE (index) == CONST_INT \
1423 && ((INT_14_BITS (index) \
1424 && (TARGET_SOFT_FLOAT \
1425 || ((MODE) != SFmode && (MODE) != DFmode))) \
1426 || INT_5_BITS (index))) \
1429 else if (GET_CODE (X) == LO_SUM \
1430 && GET_CODE (XEXP (X, 0)) == REG \
1431 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1432 && CONSTANT_P (XEXP (X, 1)) \
1433 && (TARGET_SOFT_FLOAT \
1434 || ((MODE) != SFmode \
1435 && (MODE) != DFmode))) \
1437 else if (GET_CODE (X) == LO_SUM \
1438 && GET_CODE (XEXP (X, 0)) == SUBREG \
1439 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1440 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1441 && CONSTANT_P (XEXP (X, 1)) \
1442 && (TARGET_SOFT_FLOAT \
1443 || ((MODE) != SFmode \
1444 && (MODE) != DFmode))) \
1446 else if (GET_CODE (X) == LABEL_REF \
1447 || (GET_CODE (X) == CONST_INT \
1448 && INT_5_BITS (X))) \
1450 /* Needed for -fPIC */ \
1451 else if (GET_CODE (X) == LO_SUM \
1452 && GET_CODE (XEXP (X, 0)) == REG \
1453 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1454 && GET_CODE (XEXP (X, 1)) == UNSPEC) \
1458 /* Try machine-dependent ways of modifying an illegitimate address
1459 to be legitimate. If we find one, return the new, valid address.
1460 This macro is used in only one place: `memory_address' in explow.c.
1462 OLDX is the address as it was before break_out_memory_refs was called.
1463 In some cases it is useful to look at this to decide what needs to be done.
1465 MODE and WIN are passed so that this macro can use
1466 GO_IF_LEGITIMATE_ADDRESS.
1468 It is always safe for this macro to do nothing. It exists to recognize
1469 opportunities to optimize the output. */
1471 extern struct rtx_def *hppa_legitimize_address ();
1472 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1473 { rtx orig_x = (X); \
1474 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1475 if ((X) != orig_x && memory_address_p (MODE, X)) \
1478 /* Go to LABEL if ADDR (a legitimate address expression)
1479 has an effect that depends on the machine mode it is used for. */
1481 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1482 if (GET_CODE (ADDR) == PRE_DEC \
1483 || GET_CODE (ADDR) == POST_DEC \
1484 || GET_CODE (ADDR) == PRE_INC \
1485 || GET_CODE (ADDR) == POST_INC) \
1488 /* Define this macro if references to a symbol must be treated
1489 differently depending on something about the variable or
1490 function named by the symbol (such as what section it is in).
1492 The macro definition, if any, is executed immediately after the
1493 rtl for DECL or other node is created.
1494 The value of the rtl will be a `mem' whose address is a
1497 The usual thing for this macro to do is to a flag in the
1498 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1499 name string in the `symbol_ref' (if one bit is not enough
1502 On the HP-PA we use this to indicate if a symbol is in text or
1503 data space. Also, function labels need special treatment. */
1505 #define TEXT_SPACE_P(DECL)\
1506 (TREE_CODE (DECL) == FUNCTION_DECL \
1507 || (TREE_CODE (DECL) == VAR_DECL \
1508 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1510 || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1511 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1513 #define FUNCTION_NAME_P(NAME) \
1514 (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1516 #define ENCODE_SECTION_INFO(DECL)\
1518 { if (TEXT_SPACE_P (DECL)) \
1520 if (TREE_CODE (DECL) == FUNCTION_DECL \
1521 || TREE_CODE (DECL) == VAR_DECL) \
1522 _rtl = DECL_RTL (DECL); \
1524 _rtl = TREE_CST_RTL (DECL); \
1525 SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1526 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1527 hppa_encode_label (XEXP (DECL_RTL (DECL), 0), 0);\
1532 /* Store the user-specified part of SYMBOL_NAME in VAR.
1533 This is sort of inverse to ENCODE_SECTION_INFO. */
1535 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1536 (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1537 1 + (SYMBOL_NAME)[1] == '@'\
1538 : (SYMBOL_NAME)[0] == '@'))
1540 /* Arghh. This is used for stuff in the constant pool; this may include
1541 function addresses on the PA, which during PIC code generation must
1542 reside in the data space. Unfortunately, there's no way to determine
1543 if a particular label in the constant pool refers to a function address.
1544 So just force everything into the data space during PIC generation. */
1545 #define SELECT_RTX_SECTION(RTX,MODE) \
1549 readonly_data_section ();
1551 /* Specify the machine mode that this machine uses
1552 for the index in the tablejump instruction. */
1553 #define CASE_VECTOR_MODE DImode
1555 /* Define this if the tablejump instruction expects the table
1556 to contain offsets from the address of the table.
1557 Do not define this if the table should contain absolute addresses. */
1558 /* #define CASE_VECTOR_PC_RELATIVE */
1560 #define CASE_DROPS_THROUGH
1561 /* Specify the tree operation to be used to convert reals to integers. */
1562 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1564 /* This is the kind of divide that is easiest to do in the general case. */
1565 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1567 /* Define this as 1 if `char' should by default be signed; else as 0. */
1568 #define DEFAULT_SIGNED_CHAR 1
1570 /* Max number of bytes we can move from memory to memory
1571 in one reasonably fast instruction. */
1574 /* Define if operations between registers always perform the operation
1575 on the full register even if a narrower mode is specified. */
1576 #define WORD_REGISTER_OPERATIONS
1578 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1579 will either zero-extend or sign-extend. The value of this macro should
1580 be the code that says which one of the two operations is implicitly
1581 done, NIL if none. */
1582 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1584 /* Nonzero if access to memory by bytes is slow and undesirable. */
1585 #define SLOW_BYTE_ACCESS 1
1587 /* Do not break .stabs pseudos into continuations. */
1588 #define DBX_CONTIN_LENGTH 0
1590 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1591 is done just by pretending it is already truncated. */
1592 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1594 /* We assume that the store-condition-codes instructions store 0 for false
1595 and some other value for true. This is the value stored for true. */
1597 #define STORE_FLAG_VALUE 1
1599 /* When a prototype says `char' or `short', really pass an `int'. */
1600 #define PROMOTE_PROTOTYPES
1602 /* Specify the machine mode that pointers have.
1603 After generation of rtl, the compiler makes no further distinction
1604 between pointers and any other objects of this machine mode. */
1605 #define Pmode SImode
1607 /* Add any extra modes needed to represent the condition code.
1609 HPPA floating comparisons produce condition codes. */
1610 #define EXTRA_CC_MODES CCFPmode
1612 /* Define the names for the modes specified above. */
1613 #define EXTRA_CC_NAMES "CCFP"
1615 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1616 return the mode to be used for the comparison. For floating-point, CCFPmode
1617 should be used. CC_NOOVmode should be used when the first operand is a
1618 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1620 #define SELECT_CC_MODE(OP,X,Y) \
1621 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1623 /* A function address in a call instruction
1624 is a byte address (for indexing purposes)
1625 so give the MEM rtx a byte's mode. */
1626 #define FUNCTION_MODE SImode
1628 /* Define this if addresses of constant functions
1629 shouldn't be put through pseudo regs where they can be cse'd.
1630 Desirable on machines where ordinary constants are expensive
1631 but a CALL with constant address is cheap. */
1632 #define NO_FUNCTION_CSE
1634 /* Define this to be nonzero if shift instructions ignore all but the low-order
1636 #define SHIFT_COUNT_TRUNCATED 1
1638 /* Use atexit for static constructors/destructors, instead of defining
1639 our own exit function. */
1642 /* Compute the cost of computing a constant rtl expression RTX
1643 whose rtx-code is CODE. The body of this macro is a portion
1644 of a switch statement. If the code is computed here,
1645 return it with a return statement. Otherwise, break from the switch. */
1647 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1649 if (INTVAL (RTX) == 0) return 0; \
1650 if (INT_14_BITS (RTX)) return 1; \
1657 case CONST_DOUBLE: \
1658 if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1659 && OUTER_CODE != SET) \
1664 #define ADDRESS_COST(RTX) \
1665 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1667 /* Compute extra cost of moving data between one register class
1670 Make moves from SAR so expensive they should never happen. We used to
1671 have 0xffff here, but that generates overflow in rare cases.
1673 Copies involving a FP register and a non-FP register are relatively
1674 expensive because they must go through memory.
1676 Other copies are reasonably cheap. */
1677 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1678 (CLASS1 == SHIFT_REGS ? 0x100 \
1679 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1680 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1684 /* Provide the costs of a rtl expression. This is in the body of a
1685 switch on CODE. The purpose for the cost of MULT is to encourage
1686 `synth_mult' to find a synthetic multiply when reasonable. */
1688 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1690 return (TARGET_SNAKE && ! TARGET_DISABLE_FPREGS \
1691 && ! TARGET_SOFT_FLOAT \
1692 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20)); \
1697 return COSTS_N_INSNS (60); \
1699 if (GET_CODE (XEXP (X, 0)) == MULT \
1700 && shadd_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1701 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1702 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1705 /* Adjust the cost of dependencies. */
1707 #define ADJUST_COST(INSN,LINK,DEP,COST) \
1708 (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1710 /* Handling the special cases is going to get too complicated for a macro,
1711 just call `pa_adjust_insn_length' to do the real work. */
1712 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1713 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1715 /* Enable a bug fix. (This is for extra caution.) */
1716 #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1718 /* Millicode insns are actually function calls with some special
1719 constraints on arguments and register usage.
1721 Millicode calls always expect their arguments in the integer argument
1722 registers, and always return their result in %r29 (ret1). They
1723 are expected to clobber their arguments, %r1, %r29, and %r31 and
1726 These macros tell reorg that the references to arguments and
1727 register clobbers for millicode calls do not appear to happen
1728 until after the millicode call. This allows reorg to put insns
1729 which set the argument registers into the delay slot of the millicode
1730 call -- thus they act more like traditional CALL_INSNs.
1732 get_attr_type will try to recognize the given insn, so make sure to
1733 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1735 #define INSN_SETS_ARE_DELAYED(X) \
1736 ((GET_CODE (X) == INSN \
1737 && GET_CODE (PATTERN (X)) != SEQUENCE \
1738 && GET_CODE (PATTERN (X)) != USE \
1739 && GET_CODE (PATTERN (X)) != CLOBBER \
1740 && get_attr_type (X) == TYPE_MILLI))
1742 #define INSN_REFERENCES_ARE_DELAYED(X) \
1743 ((GET_CODE (X) == INSN \
1744 && GET_CODE (PATTERN (X)) != SEQUENCE \
1745 && GET_CODE (PATTERN (X)) != USE \
1746 && GET_CODE (PATTERN (X)) != CLOBBER \
1747 && get_attr_type (X) == TYPE_MILLI))
1750 /* Control the assembler format that we output. */
1752 /* Output at beginning of assembler file. */
1754 #define ASM_FILE_START(FILE) \
1755 do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1756 \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1757 \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1759 \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1760 \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1761 \t.IMPORT $global$,DATA\n\
1762 \t.IMPORT $$dyncall,MILLICODE\n");\
1764 fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1765 if (write_symbols != NO_DEBUG) \
1766 output_file_directive ((FILE), main_input_filename); \
1769 /* Output to assembler file text saying following lines
1770 may contain character constants, extra white space, comments, etc. */
1772 #define ASM_APP_ON ""
1774 /* Output to assembler file text saying following lines
1775 no longer contain unusual constructs. */
1777 #define ASM_APP_OFF ""
1779 /* We don't yet know how to identify GCC to HP-PA machines. */
1780 #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1782 /* Output before code. */
1784 /* Supposedly the assembler rejects the command if there is no tab! */
1785 #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1787 /* Output before read-only data. */
1789 /* Supposedly the assembler rejects the command if there is no tab! */
1790 #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
1792 #define READONLY_DATA_SECTION readonly_data
1794 /* Output before writable data. */
1796 /* Supposedly the assembler rejects the command if there is no tab! */
1797 #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1799 /* Output before uninitialized data. */
1801 #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1803 /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1805 #define EXTRA_SECTIONS in_bss, in_readonly_data
1807 /* FIXME: HPUX ld generates incorrect GOT entries for "T" fixups
1808 which reference data within the $TEXT$ space (for example constant
1809 strings in the $LIT$ subspace).
1811 The assemblers (GAS and HP as) both have problems with handling
1812 the difference of two symbols which is the other correct way to
1813 reference constant data during PIC code generation.
1815 So, there's no way to reference constant data which is in the
1816 $TEXT$ space during PIC generation. Instead place all constant
1817 data into the $PRIVATE$ subspace (this reduces sharing, but it
1818 works correctly). */
1820 #define EXTRA_SECTION_FUNCTIONS \
1824 if (in_section != in_bss) \
1826 fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1827 in_section = in_bss; \
1833 if (in_section != in_readonly_data) \
1836 fprintf (asm_out_file, "%s\n", DATA_SECTION_ASM_OP); \
1838 fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
1839 in_section = in_readonly_data; \
1844 /* How to refer to registers in assembler output.
1845 This sequence is indexed by compiler's hard-register-number (see above). */
1847 #define REGISTER_NAMES \
1848 {"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1849 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1850 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1851 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1852 "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1853 "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
1854 "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
1855 "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
1856 "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
1857 "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
1858 "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
1861 #define ADDITIONAL_REGISTER_NAMES \
1862 {{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
1863 {"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
1864 {"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
1865 {"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
1866 {"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
1867 {"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
1868 {"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
1871 /* How to renumber registers for dbx and gdb.
1873 Registers 0 - 31 remain unchanged.
1875 Registers 32 - 87 are mapped to 72 - 127
1877 Register 88 is mapped to 32. */
1879 #define DBX_REGISTER_NUMBER(REGNO) \
1880 ((REGNO) <= 31 ? (REGNO) : \
1881 ((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
1883 /* This is how to output the definition of a user-level label named NAME,
1884 such as the label on a static function or variable NAME. */
1886 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1887 do { assemble_name (FILE, NAME); \
1888 fputc ('\n', FILE); } while (0)
1890 /* This is how to output a command to make the user-level label named NAME
1891 defined for reference from other files. */
1893 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1894 do { fputs ("\t.IMPORT ", FILE); \
1895 assemble_name (FILE, NAME); \
1896 if (FUNCTION_NAME_P (NAME)) \
1897 fputs (",CODE\n", FILE); \
1899 fputs (",DATA\n", FILE); \
1902 /* The bogus HP assembler requires ALL external references to be
1903 "imported", even library calls. They look a bit different, so
1906 Also note not all libcall names are passed to ENCODE_SECTION_INFO
1907 (__main for example). To make sure all libcall names have section
1908 info recorded in them, we do it here. */
1910 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1911 do { fputs ("\t.IMPORT ", FILE); \
1912 if (!function_label_operand (RTL, VOIDmode)) \
1913 hppa_encode_label (RTL, 1); \
1914 assemble_name (FILE, XSTR ((RTL), 0)); \
1915 fputs (",CODE\n", FILE); \
1918 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1920 /* We only handle DATA objects here, functions are globalized in \
1921 ASM_DECLARE_FUNCTION_NAME. */ \
1922 if (! FUNCTION_NAME_P (NAME)) \
1924 fputs ("\t.EXPORT ", FILE); \
1925 assemble_name (FILE, NAME); \
1926 fputs (",DATA\n", FILE); \
1930 /* This is how to output a reference to a user-level label named NAME.
1931 `assemble_name' uses this. */
1933 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1934 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1936 /* This is how to output an internal numbered label where
1937 PREFIX is the class of label and NUM is the number within the class. */
1939 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1940 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1942 /* This is how to store into the string LABEL
1943 the symbol_ref name of an internal numbered label where
1944 PREFIX is the class of label and NUM is the number within the class.
1945 This is suitable for output with `assemble_name'. */
1947 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1948 sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
1950 /* This is how to output an assembler line defining a `double' constant. */
1952 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1954 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
1955 fprintf (FILE, "\t.word 0x%lx\n\t.word 0x%lx\n", l[0], l[1]); \
1958 /* This is how to output an assembler line defining a `float' constant. */
1960 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1962 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1963 fprintf (FILE, "\t.word 0x%lx\n", l); \
1966 /* This is how to output an assembler line defining an `int' constant. */
1968 #define ASM_OUTPUT_INT(FILE,VALUE) \
1969 { fprintf (FILE, "\t.word "); \
1970 if (function_label_operand (VALUE, VOIDmode) \
1971 && !TARGET_PORTABLE_RUNTIME) \
1972 fprintf (FILE, "P%%"); \
1973 output_addr_const (FILE, (VALUE)); \
1974 fprintf (FILE, "\n");}
1976 /* Likewise for `short' and `char' constants. */
1978 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1979 ( fprintf (FILE, "\t.half "), \
1980 output_addr_const (FILE, (VALUE)), \
1981 fprintf (FILE, "\n"))
1983 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1984 ( fprintf (FILE, "\t.byte "), \
1985 output_addr_const (FILE, (VALUE)), \
1986 fprintf (FILE, "\n"))
1988 /* This is how to output an assembler line for a numeric constant byte. */
1990 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1991 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1993 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1994 output_ascii ((FILE), (P), (SIZE))
1996 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1997 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1998 /* This is how to output an element of a case-vector that is absolute.
1999 Note that this method makes filling these branch delay slots
2002 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2003 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
2005 /* Jump tables are executable code and live in the TEXT section on the PA. */
2006 #define JUMP_TABLES_IN_TEXT_SECTION
2008 /* This is how to output an element of a case-vector that is relative.
2009 This must be defined correctly as it is used when generating PIC code.
2011 I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
2012 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
2013 rather than a table of absolute addresses. */
2015 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2016 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
2018 /* This is how to output an assembler line
2019 that says to advance the location counter
2020 to a multiple of 2**LOG bytes. */
2022 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2023 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
2025 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
2026 fprintf (FILE, "\t.blockz %d\n", (SIZE))
2028 /* This says how to output an assembler line to define a global common symbol
2029 with size SIZE (in bytes) and alignment ALIGN (in bits). */
2031 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
2033 assemble_name ((FILE), (NAME)); \
2034 fputs ("\t.comm ", (FILE)); \
2035 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
2037 /* This says how to output an assembler line to define a local common symbol
2038 with size SIZE (in bytes) and alignment ALIGN (in bits). */
2040 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
2042 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
2043 assemble_name ((FILE), (NAME)); \
2044 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
2046 /* Store in OUTPUT a string (made with alloca) containing
2047 an assembler-name for a local static variable named NAME.
2048 LABELNO is an integer which is different for each call. */
2050 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2051 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
2052 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
2054 /* Define the parentheses used to group arithmetic operations
2055 in assembler code. */
2057 #define ASM_OPEN_PAREN "("
2058 #define ASM_CLOSE_PAREN ")"
2060 /* All HP assemblers use "!" to separate logical lines. */
2061 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
2063 /* Define results of standard character escape sequences. */
2064 #define TARGET_BELL 007
2065 #define TARGET_BS 010
2066 #define TARGET_TAB 011
2067 #define TARGET_NEWLINE 012
2068 #define TARGET_VT 013
2069 #define TARGET_FF 014
2070 #define TARGET_CR 015
2072 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
2073 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
2075 /* Print operand X (an rtx) in assembler syntax to file FILE.
2076 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2077 For `%' followed by punctuation, CODE is the punctuation and X is null.
2079 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
2080 and an immediate zero should be represented as `r0'.
2082 Several % codes are defined:
2084 C compare conditions
2085 N extract conditions
2086 M modifier to handle preincrement addressing for memory refs.
2087 F modifier to handle preincrement addressing for fp memory refs */
2089 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2092 /* Print a memory address as an operand to reference that memory location. */
2094 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2095 { register rtx addr = ADDR; \
2096 register rtx base; \
2098 switch (GET_CODE (addr)) \
2101 fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
2104 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
2105 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
2106 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
2107 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
2110 fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
2113 if (!symbolic_operand (XEXP (addr, 1))) \
2114 fputs ("R'", FILE); \
2115 else if (flag_pic == 0) \
2116 fputs ("RR'", FILE); \
2117 else if (flag_pic == 1) \
2119 else if (flag_pic == 2) \
2120 fputs ("RT'", FILE); \
2121 output_global_address (FILE, XEXP (addr, 1)); \
2122 fputs ("(", FILE); \
2123 output_operand (XEXP (addr, 0), 0); \
2124 fputs (")", FILE); \
2127 fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
2130 output_addr_const (FILE, addr); \
2134 /* Define functions in pa.c and used in insn-output.c. */
2136 extern char *output_and ();
2137 extern char *output_ior ();
2138 extern char *output_move_double ();
2139 extern char *output_fp_move_double ();
2140 extern char *output_block_move ();
2141 extern char *output_cbranch ();
2142 extern char *output_bb ();
2143 extern char *output_dbra ();
2144 extern char *output_movb ();
2145 extern char *output_return ();
2146 extern char *output_call ();
2147 extern char *output_mul_insn ();
2148 extern char *output_div_insn ();
2149 extern char *output_mod_insn ();
2150 extern char *singlemove_string ();
2151 extern void output_arg_descriptor ();
2152 extern void output_global_address ();
2153 extern struct rtx_def *legitimize_pic_address ();
2154 extern struct rtx_def *gen_cmp_fp ();
2155 extern void hppa_encode_label ();
2158 #define PREDICATE_CODES \
2159 {"reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
2160 {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
2161 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
2162 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
2163 {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
2164 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
2165 {"pre_cint_operand", {CONST_INT}}, \
2166 {"post_cint_operand", {CONST_INT}}, \
2167 {"int5_operand", {CONST_INT}}, \
2168 {"uint5_operand", {CONST_INT}}, \
2169 {"uint32_operand", {CONST_INT}}, \
2170 {"int11_operand", {CONST_INT}}, \
2171 {"and_operand", {SUBREG, REG, CONST_INT}}, \
2172 {"ior_operand", {CONST_INT}}, \
2173 {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
2174 {"lhs_lshift_cint_operand", {CONST_INT}}, \
2175 {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
2176 {"shadd_operand", {CONST_INT}}, \
2177 {"eq_neq_comparison_operator", {EQ, NE}}, \
2178 {"movb_comparison_operator", {EQ, NE, LT, GE}}, \
2179 {"pc_or_label_operand", {LABEL_REF, PC}}, \
2180 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
2181 {"reg_or_nonsymb_mem_operand", {SUBREG, REG, MEM}}, \
2182 {"move_operand", {SUBREG, REG, CONST_INT, MEM}}, \
2183 {"pic_label_operand", {LABEL_REF, CONST}}, \
2184 {"function_label_operand", {SYMBOL_REF}}, \
2185 {"reg_or_0_or_nonsymb_mem_operand", {SUBREG, REG, CONST_INT, \
2186 CONST_DOUBLE, MEM}}, \
2187 {"div_operand", {REG, CONST_INT}}, \
2188 {"call_operand_address", {SYMBOL_REF, LABEL_REF, CONST_INT, \
2189 CONST_DOUBLE, CONST, HIGH}},
2192 /* We want __gcc_plt_call to appear in every program built by
2193 gcc, so we make a reference to it out of __main.
2194 We use the asm statement to fool the optimizer into not
2195 removing the dead (but important) initialization of
2198 #define DO_GLOBAL_DTORS_BODY \
2200 extern void __gcc_plt_call (); \
2201 void (*reference)() = &__gcc_plt_call; \
2203 __asm__ ("" : : "r" (reference)); \
2204 for (p = __DTOR_LIST__ + 1; *p; ) \
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