1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 93-98, 1999 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA. */
24 enum cmp_type /* comparison type */
26 CMP_SI, /* compare integers */
27 CMP_SF, /* compare single precision floats */
28 CMP_DF, /* compare double precision floats */
29 CMP_MAX /* max comparison type */
32 /* For long call handling. */
33 extern unsigned int total_code_bytes;
35 /* Which processor to schedule for. */
46 /* For -mschedule= option. */
47 extern char *pa_cpu_string;
48 extern enum processor_type pa_cpu;
50 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
52 /* The 700 can only issue a single insn at a time.
53 The 7XXX processors can issue two insns at a time.
54 The 8000 can issue 4 insns at a time. */
56 (pa_cpu == PROCESSOR_700 ? 1 \
57 : pa_cpu == PROCESSOR_7100 ? 2 \
58 : pa_cpu == PROCESSOR_7100LC ? 2 \
59 : pa_cpu == PROCESSOR_7200 ? 2 \
60 : pa_cpu == PROCESSOR_8000 ? 4 \
63 /* Which architecture to generate code for. */
65 enum architecture_type
72 /* For -march= option. */
73 extern char *pa_arch_string;
74 extern enum architecture_type pa_arch;
76 /* Print subsidiary information on the compiler version in use. */
78 #define TARGET_VERSION fputs (" (hppa)", stderr);
80 /* Run-time compilation parameters selecting different hardware subsets. */
82 extern int target_flags;
84 /* compile code for HP-PA 1.1 ("Snake") */
87 #define TARGET_PA_11 (target_flags & MASK_PA_11)
89 /* Disable all FP registers (they all become fixed). This may be necessary
90 for compiling kernels which perform lazy context switching of FP regs.
91 Note if you use this option and try to perform floating point operations
92 the compiler will abort! */
94 #define MASK_DISABLE_FPREGS 2
95 #define TARGET_DISABLE_FPREGS (target_flags & MASK_DISABLE_FPREGS)
97 /* Generate code which assumes that calls through function pointers will
98 never cross a space boundary. Such assumptions are generally safe for
99 building kernels and statically linked executables. Code compiled with
100 this option will fail miserably if the executable is dynamically linked
101 or uses nested functions!
103 This is also used to trigger aggressive unscaled index addressing. */
104 #define MASK_NO_SPACE_REGS 4
105 #define TARGET_NO_SPACE_REGS (target_flags & MASK_NO_SPACE_REGS)
107 /* Allow unconditional jumps in the delay slots of call instructions. */
108 #define MASK_JUMP_IN_DELAY 8
109 #define TARGET_JUMP_IN_DELAY (target_flags & MASK_JUMP_IN_DELAY)
111 /* Disable indexed addressing modes. */
112 #define MASK_DISABLE_INDEXING 32
113 #define TARGET_DISABLE_INDEXING (target_flags & MASK_DISABLE_INDEXING)
115 /* Emit code which follows the new portable runtime calling conventions
116 HP wants everyone to use for ELF objects. If at all possible you want
117 to avoid this since it's a performance loss for non-prototyped code.
119 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
120 long-call stubs which is quite expensive. */
121 #define MASK_PORTABLE_RUNTIME 64
122 #define TARGET_PORTABLE_RUNTIME (target_flags & MASK_PORTABLE_RUNTIME)
124 /* Emit directives only understood by GAS. This allows parameter
125 relocations to work for static functions. There is no way
126 to make them work the HP assembler at this time. */
128 #define TARGET_GAS (target_flags & MASK_GAS)
130 /* Emit code for processors which do not have an FPU. */
131 #define MASK_SOFT_FLOAT 256
132 #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
134 /* Use 3-insn load/store sequences for access to large data segments
135 in shared libraries on hpux10. */
136 #define MASK_LONG_LOAD_STORE 512
137 #define TARGET_LONG_LOAD_STORE (target_flags & MASK_LONG_LOAD_STORE)
139 /* Use a faster sequence for indirect calls. */
140 #define MASK_FAST_INDIRECT_CALLS 1024
141 #define TARGET_FAST_INDIRECT_CALLS (target_flags & MASK_FAST_INDIRECT_CALLS)
143 /* Generate code with big switch statements to avoid out of range branches
144 occurring within the switch table. */
145 #define MASK_BIG_SWITCH 2048
146 #define TARGET_BIG_SWITCH (target_flags & MASK_BIG_SWITCH)
149 /* Generate code for the HPPA 2.0 architecture. TARGET_PA_11 should also be
150 true when this is true. */
151 #define MASK_PA_20 4096
152 #define TARGET_PA_20 (target_flags & MASK_PA_20)
154 /* Macro to define tables used to set the flags.
155 This is a list in braces of pairs in braces,
156 each pair being { "NAME", VALUE }
157 where VALUE is the bits to set or minus the bits to clear.
158 An empty string NAME is used to identify the default VALUE. */
160 #define TARGET_SWITCHES \
161 {{"snake", MASK_PA_11, "Generate PA1.1 code"}, \
162 {"nosnake", -(MASK_PA_11 | MASK_PA_20), "Generate PA1.0 code"}, \
163 {"pa-risc-1-0", -(MASK_PA_11 | MASK_PA_20), "Generate PA1.0 code"}, \
164 {"pa-risc-1-1", MASK_PA_11, "Generate PA1.1 code"}, \
165 {"pa-risc-2-0", MASK_PA_20, "Generate PA2.0 code. This option requires gas snapshot 19990413 or later"}, \
166 {"disable-fpregs", MASK_DISABLE_FPREGS, "Disable FP regs"}, \
167 {"no-disable-fpregs", -MASK_DISABLE_FPREGS, "Do not disable FP regs"},\
168 {"no-space-regs", MASK_NO_SPACE_REGS, "Disable space regs"}, \
169 {"space-regs", -MASK_NO_SPACE_REGS, "Do not disable space regs"}, \
170 {"jump-in-delay", MASK_JUMP_IN_DELAY, "Put jumps in call delay slots"},\
171 {"no-jump-in-delay", -MASK_JUMP_IN_DELAY, "Do not put jumps in call delay slots"}, \
172 {"disable-indexing", MASK_DISABLE_INDEXING, "Disable indexed addressing"},\
173 {"no-disable-indexing", -MASK_DISABLE_INDEXING, "Do not disable indexed addressing"},\
174 {"portable-runtime", MASK_PORTABLE_RUNTIME, "Use portable calling conventions"}, \
175 {"no-portable-runtime", -MASK_PORTABLE_RUNTIME, "Do not use portable calling conventions"},\
176 {"gas", MASK_GAS, "Assume code will be assembled by GAS"}, \
177 {"no-gas", -MASK_GAS, "Do not assume code will be assembled by GAS"}, \
178 {"soft-float", MASK_SOFT_FLOAT, "Use software floating point"}, \
179 {"no-soft-float", -MASK_SOFT_FLOAT, "Do not use software floating point"}, \
180 {"long-load-store", MASK_LONG_LOAD_STORE, "Emit long load/store sequences"}, \
181 {"no-long-load-store", -MASK_LONG_LOAD_STORE, "Do not emit long load/store sequences"},\
182 {"fast-indirect-calls", MASK_FAST_INDIRECT_CALLS, "Generate fast indirect calls"},\
183 {"no-fast-indirect-calls", -MASK_FAST_INDIRECT_CALLS, "Do not generate fast indirect calls"},\
184 {"big-switch", MASK_BIG_SWITCH, "Generate code for huge switch statements"}, \
185 {"no-big-switch", -MASK_BIG_SWITCH, "Do not generate code for huge switch statements"}, \
186 {"linker-opt", 0, "Enable linker optimizations"}, \
187 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, NULL}}
189 #ifndef TARGET_DEFAULT
190 #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY)
193 #ifndef TARGET_CPU_DEFAULT
194 #define TARGET_CPU_DEFAULT 0
197 #define TARGET_OPTIONS \
199 { "schedule=", &pa_cpu_string, "Specify CPU for scheduling purposes" },\
200 { "arch=", &pa_arch_string, "Specify architecture for code generation. Values are 1.0, 1.1, and 2.0. 2.0 requires gas snapshot 19990413 or later." }\
203 #define OVERRIDE_OPTIONS override_options ()
205 /* stabs-in-som is nearly identical to stabs-in-elf. To avoid useless
206 code duplication we simply include this file and override as needed. */
209 /* We do not have to be compatible with dbx, so we enable gdb extensions
211 #define DEFAULT_GDB_EXTENSIONS 1
213 /* This used to be zero (no max length), but big enums and such can
214 cause huge strings which killed gas.
216 We also have to avoid lossage in dbxout.c -- it does not compute the
217 string size accurately, so we are real conservative here. */
218 #undef DBX_CONTIN_LENGTH
219 #define DBX_CONTIN_LENGTH 3000
221 /* Only labels should ever begin in column zero. */
222 #define ASM_STABS_OP "\t.stabs"
223 #define ASM_STABN_OP "\t.stabn"
225 /* How to renumber registers for dbx and gdb.
227 Registers 0 - 31 remain unchanged.
229 Registers 32 - 87 are mapped to 72 - 127
231 Register 88 is mapped to 32. */
233 #define DBX_REGISTER_NUMBER(REGNO) \
234 ((REGNO) <= 31 ? (REGNO) : \
235 ((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
237 /* GDB always assumes the current function's frame begins at the value
238 of the stack pointer upon entry to the current function. Accessing
239 local variables and parameters passed on the stack is done using the
240 base of the frame + an offset provided by GCC.
242 For functions which have frame pointers this method works fine;
243 the (frame pointer) == (stack pointer at function entry) and GCC provides
244 an offset relative to the frame pointer.
246 This loses for functions without a frame pointer; GCC provides an offset
247 which is relative to the stack pointer after adjusting for the function's
248 frame size. GDB would prefer the offset to be relative to the value of
249 the stack pointer at the function's entry. Yuk! */
250 #define DEBUGGER_AUTO_OFFSET(X) \
251 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
252 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
254 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
255 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
256 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
258 #if ((TARGET_DEFAULT | TARGET_CPU_DEFAULT) & MASK_PA_11) == 0
259 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
260 %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}\
261 %{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE -D__STDC_EXT__}\
262 %{threads:-D_REENTRANT -D_DCE_THREADS}"
264 #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:%{!msoft-float:-D__hp9000s700 -D_PA_RISC1_1}}} \
265 %{!ansi: -D_HPUX_SOURCE -D_HIUX_SOURCE -D__STDC_EXT__}\
266 %{threads:-D_REENTRANT -D_DCE_THREADS}"
269 /* Defines for a K&R CC */
271 #define CC1_SPEC "%{pg:} %{p:}"
273 #define LINK_SPEC "%{mlinker-opt:-O} %{!shared:-u main} %{shared:-b}"
275 /* We don't want -lg. */
277 #define LIB_SPEC "%{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}"
280 /* Make gcc agree with <machine/ansi.h> */
282 #define SIZE_TYPE "unsigned int"
283 #define PTRDIFF_TYPE "int"
284 #define WCHAR_TYPE "unsigned int"
285 #define WCHAR_TYPE_SIZE 32
287 /* Show we can debug even without a frame pointer. */
288 #define CAN_DEBUG_WITHOUT_FP
290 /* Machine dependent reorg pass. */
291 #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
293 /* Prototype function used in MACHINE_DEPENDENT_REORG macro. */
296 /* Prototype function used in various macros. */
297 int symbolic_operand ();
299 /* Used in insn-*.c. */
300 int following_call ();
301 int function_label_operand ();
302 int lhs_lshift_cint_operand ();
304 /* Names to predefine in the preprocessor for this target machine. */
306 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
308 /* target machine storage layout */
310 /* Define for cross-compilation from a host with a different float format
311 or endianness (e.g. VAX, x86). */
312 #define REAL_ARITHMETIC
314 /* Define this macro if it is advisable to hold scalars in registers
315 in a wider mode than that declared by the program. In such cases,
316 the value is constrained to be within the bounds of the declared
317 type, but kept valid in the wider mode. The signedness of the
318 extension may differ from that of the type. */
320 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
321 if (GET_MODE_CLASS (MODE) == MODE_INT \
322 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
325 /* Define this if most significant bit is lowest numbered
326 in instructions that operate on numbered bit-fields. */
327 #define BITS_BIG_ENDIAN 1
329 /* Define this if most significant byte of a word is the lowest numbered. */
330 /* That is true on the HP-PA. */
331 #define BYTES_BIG_ENDIAN 1
333 /* Define this if most significant word of a multiword number is lowest
335 #define WORDS_BIG_ENDIAN 1
337 /* number of bits in an addressable storage unit */
338 #define BITS_PER_UNIT 8
340 /* Width in bits of a "word", which is the contents of a machine register.
341 Note that this is not necessarily the width of data type `int';
342 if using 16-bit ints on a 68000, this would still be 32.
343 But on a machine with 16-bit registers, this would be 16. */
344 #define BITS_PER_WORD 32
346 /* Width of a word, in units (bytes). */
347 #define UNITS_PER_WORD 4
349 /* Width in bits of a pointer.
350 See also the macro `Pmode' defined below. */
351 #define POINTER_SIZE BITS_PER_WORD
353 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
354 #define PARM_BOUNDARY BITS_PER_WORD
356 /* Largest alignment required for any stack parameter, in bits.
357 Don't define this if it is equal to PARM_BOUNDARY */
358 #define MAX_PARM_BOUNDARY 64
360 /* Boundary (in *bits*) on which stack pointer is always aligned;
361 certain optimizations in combine depend on this.
363 GCC for the PA always rounds its stacks to a 512bit boundary,
364 but that happens late in the compilation process. */
365 #define STACK_BOUNDARY 64
367 /* Allocation boundary (in *bits*) for the code of a function. */
368 #define FUNCTION_BOUNDARY 32
370 /* Alignment of field after `int : 0' in a structure. */
371 #define EMPTY_FIELD_BOUNDARY 32
373 /* Every structure's size must be a multiple of this. */
374 #define STRUCTURE_SIZE_BOUNDARY 8
376 /* A bitfield declared as `int' forces `int' alignment for the struct. */
377 #define PCC_BITFIELD_TYPE_MATTERS 1
379 /* No data type wants to be aligned rounder than this. */
380 #define BIGGEST_ALIGNMENT 64
382 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
383 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
384 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
386 /* Make arrays of chars word-aligned for the same reasons. */
387 #define DATA_ALIGNMENT(TYPE, ALIGN) \
388 (TREE_CODE (TYPE) == ARRAY_TYPE \
389 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
390 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
393 /* Set this nonzero if move instructions will actually fail to work
394 when given unaligned data. */
395 #define STRICT_ALIGNMENT 1
397 /* Generate calls to memcpy, memcmp and memset. */
398 #define TARGET_MEM_FUNCTIONS
400 /* Standard register usage. */
402 /* Number of actual hardware registers.
403 The hardware registers are assigned numbers for the compiler
404 from 0 to just below FIRST_PSEUDO_REGISTER.
405 All registers that the compiler knows about must be given numbers,
406 even those that are not normally considered general registers.
408 HP-PA 1.0 has 32 fullword registers and 16 floating point
409 registers. The floating point registers hold either word or double
412 16 additional registers are reserved.
414 HP-PA 1.1 has 32 fullword registers and 32 floating point
415 registers. However, the floating point registers behave
416 differently: the left and right halves of registers are addressable
417 as 32 bit registers. So, we will set things up like the 68k which
418 has different fp units: define separate register sets for the 1.0
421 #define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
424 /* 1 for registers that have pervasive standard uses
425 and are not available for the register allocator.
427 On the HP-PA, these are:
428 Reg 0 = 0 (hardware). However, 0 is used for condition code,
430 Reg 1 = ADDIL target/Temporary (hardware).
431 Reg 2 = Return Pointer
432 Reg 3 = Frame Pointer
433 Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
434 Reg 4-18 = Preserved Registers
435 Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
436 Reg 20-22 = Temporary Registers
437 Reg 23-26 = Temporary/Parameter Registers
438 Reg 27 = Global Data Pointer (hp)
439 Reg 28 = Temporary/???/Return Value register
440 Reg 29 = Temporary/Static Chain/Return Value register #2
441 Reg 30 = stack pointer
442 Reg 31 = Temporary/Millicode Return Pointer (hp)
444 Freg 0-3 = Status Registers -- Not known to the compiler.
445 Freg 4-7 = Arguments/Return Value
446 Freg 8-11 = Temporary Registers
447 Freg 12-15 = Preserved Registers
449 Freg 16-31 = Reserved
451 On the Snake, fp regs are
453 Freg 0-3 = Status Registers -- Not known to the compiler.
454 Freg 4L-7R = Arguments/Return Value
455 Freg 8L-11R = Temporary Registers
456 Freg 12L-21R = Preserved Registers
457 Freg 22L-31R = Temporary Registers
461 #define FIXED_REGISTERS \
462 {0, 0, 0, 0, 0, 0, 0, 0, \
463 0, 0, 0, 0, 0, 0, 0, 0, \
464 0, 0, 0, 0, 0, 0, 0, 0, \
465 0, 0, 0, 1, 0, 0, 1, 0, \
467 0, 0, 0, 0, 0, 0, 0, 0, \
468 0, 0, 0, 0, 0, 0, 0, 0, \
469 0, 0, 0, 0, 0, 0, 0, 0, \
470 0, 0, 0, 0, 0, 0, 0, 0, \
471 0, 0, 0, 0, 0, 0, 0, 0, \
472 0, 0, 0, 0, 0, 0, 0, 0, \
473 0, 0, 0, 0, 0, 0, 0, 0, \
476 /* 1 for registers not available across function calls.
477 These must include the FIXED_REGISTERS and also any
478 registers that can be used without being saved.
479 The latter must include the registers where values are returned
480 and the register where structure-value addresses are passed.
481 Aside from that, you can include as many other registers as you like. */
482 #define CALL_USED_REGISTERS \
483 {1, 1, 1, 0, 0, 0, 0, 0, \
484 0, 0, 0, 0, 0, 0, 0, 0, \
485 0, 0, 0, 1, 1, 1, 1, 1, \
486 1, 1, 1, 1, 1, 1, 1, 1, \
488 1, 1, 1, 1, 1, 1, 1, 1, \
489 1, 1, 1, 1, 1, 1, 1, 1, \
490 0, 0, 0, 0, 0, 0, 0, 0, \
491 0, 0, 0, 0, 0, 0, 0, 0, \
492 0, 0, 0, 0, 1, 1, 1, 1, \
493 1, 1, 1, 1, 1, 1, 1, 1, \
494 1, 1, 1, 1, 1, 1, 1, 1, \
497 #define CONDITIONAL_REGISTER_USAGE \
501 for (i = 56; i < 88; i++) \
502 fixed_regs[i] = call_used_regs[i] = 1; \
503 for (i = 33; i < 88; i += 2) \
504 fixed_regs[i] = call_used_regs[i] = 1; \
506 if (TARGET_DISABLE_FPREGS || TARGET_SOFT_FLOAT)\
508 for (i = 32; i < 88; i++) \
509 fixed_regs[i] = call_used_regs[i] = 1; \
513 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
514 fixed_regs[PIC_OFFSET_TABLE_REGNUM_SAVED] = 1;\
518 /* Allocate the call used registers first. This should minimize
519 the number of registers that need to be saved (as call used
520 registers will generally not be allocated across a call).
522 Experimentation has shown slightly better results by allocating
525 FP registers are ordered so that all L registers are selected before
526 R registers. This works around a false dependency interlock on the
527 PA8000 when accessing the high and low parts of an FP register
530 #define REG_ALLOC_ORDER \
532 /* caller-saved fp regs. */ \
533 68, 70, 72, 74, 76, 78, 80, 82, \
534 84, 86, 40, 42, 44, 46, 32, 34, \
536 69, 71, 73, 75, 77, 79, 81, 83, \
537 85, 87, 41, 43, 45, 47, 33, 35, \
539 /* caller-saved general regs. */ \
540 19, 20, 21, 22, 23, 24, 25, 26, \
542 /* callee-saved fp regs. */ \
543 48, 50, 52, 54, 56, 58, 60, 62, \
545 49, 51, 53, 55, 57, 59, 61, 63, \
547 /* callee-saved general regs. */ \
548 3, 4, 5, 6, 7, 8, 9, 10, \
549 11, 12, 13, 14, 15, 16, 17, 18, \
550 /* special registers. */ \
554 /* True if register is floating-point. */
555 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87)
557 /* Return number of consecutive hard regs needed starting at reg REGNO
558 to hold something of mode MODE.
559 This is ordinarily the length in words of a value of mode MODE
560 but can be less for certain modes in special long registers.
562 On the HP-PA, ordinary registers hold 32 bits worth;
563 The floating point registers are 64 bits wide. Snake fp regs are 32
565 #define HARD_REGNO_NREGS(REGNO, MODE) \
566 (!TARGET_PA_11 && FP_REGNO_P (REGNO) ? 1 \
567 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
569 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
570 On the HP-PA, the cpu registers can hold any mode. We
571 force this to be an even register is it cannot hold the full mode. */
572 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
573 ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
574 /* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
575 : !TARGET_PA_11 && FP_REGNO_P (REGNO) \
576 ? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
577 /* Make wide modes be in aligned registers. */ \
578 : GET_MODE_SIZE (MODE) <= UNITS_PER_WORD || ((REGNO) & 1) == 0)
580 /* Value is 1 if it is a good idea to tie two pseudo registers
581 when one has mode MODE1 and one has mode MODE2.
582 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
583 for any hard reg, then this must be 0 for correct output. */
584 #define MODES_TIEABLE_P(MODE1, MODE2) \
585 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
587 /* Specify the registers used for certain standard purposes.
588 The values of these macros are register numbers. */
590 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
591 /* #define PC_REGNUM */
593 /* Register to use for pushing function arguments. */
594 #define STACK_POINTER_REGNUM 30
596 /* Base register for access to local variables of the function. */
597 #define FRAME_POINTER_REGNUM 3
599 /* Value should be nonzero if functions must have frame pointers. */
600 #define FRAME_POINTER_REQUIRED \
601 (current_function_calls_alloca)
603 /* C statement to store the difference between the frame pointer
604 and the stack pointer values immediately after the function prologue.
606 Note, we always pretend that this is a leaf function because if
607 it's not, there's no point in trying to eliminate the
608 frame pointer. If it is a leaf function, we guessed right! */
609 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
610 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
612 /* Base register for access to arguments of the function. */
613 #define ARG_POINTER_REGNUM 3
615 /* Register in which static-chain is passed to a function. */
617 #define STATIC_CHAIN_REGNUM 29
619 /* Register which holds offset table for position-independent
622 #define PIC_OFFSET_TABLE_REGNUM 19
623 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
625 /* Register into which we save the PIC_OFFEST_TABLE_REGNUM so that it
626 can be restore across function calls. */
627 #define PIC_OFFSET_TABLE_REGNUM_SAVED 4
629 /* SOM ABI says that objects larger than 64 bits are returned in memory. */
630 #define DEFAULT_PCC_STRUCT_RETURN 0
631 #define RETURN_IN_MEMORY(TYPE) \
632 (int_size_in_bytes (TYPE) > 8)
634 /* Register in which address to store a structure value
635 is passed to a function. */
636 #define STRUCT_VALUE_REGNUM 28
638 /* Define the classes of registers for register constraints in the
639 machine description. Also define ranges of constants.
641 One of the classes must always be named ALL_REGS and include all hard regs.
642 If there is more than one class, another class must be named NO_REGS
643 and contain no registers.
645 The name GENERAL_REGS must be the name of a class (or an alias for
646 another name such as ALL_REGS). This is the class of registers
647 that is allowed by "g" or "r" in a register constraint.
648 Also, registers outside this class are allocated only when
649 instructions express preferences for them.
651 The classes must be numbered in nondecreasing order; that is,
652 a larger-numbered class must never be contained completely
653 in a smaller-numbered class.
655 For any two classes, it is very desirable that there be another
656 class that represents their union. */
658 /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
659 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
660 fmpyadd and fmpysub are restricted. */
662 enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FPUPPER_REGS, FP_REGS, GENERAL_OR_FP_REGS,
663 SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
665 #define N_REG_CLASSES (int) LIM_REG_CLASSES
667 /* Give names of register classes as strings for dump file. */
669 #define REG_CLASS_NAMES \
670 {"NO_REGS", "R1_REGS", "GENERAL_REGS", "FPUPPER_REGS", "FP_REGS", \
671 "GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
673 /* Define which registers fit in which classes.
674 This is an initializer for a vector of HARD_REG_SET
675 of length N_REG_CLASSES. Register 0, the "condition code" register,
678 #define REG_CLASS_CONTENTS \
679 {{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
680 {0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
681 {0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
682 {0x00000000, 0xff000000, 0x00ffffff}, /* FPUPPER_REGS */ \
683 {0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
684 {0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
685 {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
686 {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
688 /* The same information, inverted:
689 Return the class number of the smallest class containing
690 reg number REGNO. This could be a conditional expression
691 or could index an array. */
693 #define REGNO_REG_CLASS(REGNO) \
694 ((REGNO) == 0 ? NO_REGS \
695 : (REGNO) == 1 ? R1_REGS \
696 : (REGNO) < 32 ? GENERAL_REGS \
697 : (REGNO) < 56 ? FP_REGS \
698 : (REGNO) < 88 ? FPUPPER_REGS \
701 /* The class value for index registers, and the one for base regs. */
702 #define INDEX_REG_CLASS GENERAL_REGS
703 #define BASE_REG_CLASS GENERAL_REGS
705 #define FP_REG_CLASS_P(CLASS) \
706 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
708 /* Get reg_class from a letter such as appears in the machine description. */
709 /* Keep 'x' for backward compatibility with user asm. */
710 #define REG_CLASS_FROM_LETTER(C) \
711 ((C) == 'f' ? FP_REGS : \
712 (C) == 'y' ? FPUPPER_REGS : \
713 (C) == 'x' ? FP_REGS : \
714 (C) == 'q' ? SHIFT_REGS : \
715 (C) == 'a' ? R1_REGS : \
716 (C) == 'Z' ? ALL_REGS : NO_REGS)
718 /* The letters I, J, K, L and M in a register constraint string
719 can be used to stand for particular ranges of immediate operands.
720 This macro defines what the ranges are.
721 C is the letter, and VALUE is a constant value.
722 Return 1 if VALUE is in the range specified by C.
724 `I' is used for the 11 bit constants.
725 `J' is used for the 14 bit constants.
726 `K' is used for values that can be moved with a zdepi insn.
727 `L' is used for the 5 bit constants.
729 `N' is used for values with the least significant 11 bits equal to zero.
730 `O' is used for numbers n such that n+1 is a power of 2.
733 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
734 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
735 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
736 : (C) == 'K' ? zdepi_cint_p (VALUE) \
737 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
738 : (C) == 'M' ? (VALUE) == 0 \
739 : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
740 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
741 : (C) == 'P' ? and_mask_p (VALUE) \
744 /* Prototype function used in macro CONST_OK_FOR_LETTER_P. */
747 /* Similar, but for floating or large integer constants, and defining letters
748 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
750 For PA, `G' is the floating-point constant zero. `H' is undefined. */
752 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
753 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
754 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
757 /* Given an rtx X being reloaded into a reg required to be
758 in class CLASS, return the class of reg to actually use.
759 In general this is just CLASS; but on some machines
760 in some cases it is preferable to use a more restrictive class. */
761 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
763 /* Return the register class of a scratch register needed to copy IN into
764 or out of a register in CLASS in MODE. If it can be done directly
767 Avoid doing any work for the common case calls. */
769 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
770 ((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \
771 && REGNO (IN) < FIRST_PSEUDO_REGISTER) \
772 ? NO_REGS : secondary_reload_class (CLASS, MODE, IN))
774 /* On the PA it is not possible to directly move data between
775 GENERAL_REGS and FP_REGS. */
776 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
777 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
779 /* Return the stack location to use for secondary memory needed reloads. */
780 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
781 gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-16)))
783 /* Return the maximum number of consecutive registers
784 needed to represent mode MODE in a register of class CLASS. */
785 #define CLASS_MAX_NREGS(CLASS, MODE) \
786 (!TARGET_PA_11 && ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS) ? 1 : \
787 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
789 /* Stack layout; function entry, exit and calling. */
791 /* Define this if pushing a word on the stack
792 makes the stack pointer a smaller address. */
793 /* #define STACK_GROWS_DOWNWARD */
795 /* Believe it or not. */
796 #define ARGS_GROW_DOWNWARD
798 /* Define this if the nominal address of the stack frame
799 is at the high-address end of the local variables;
800 that is, each additional local variable allocated
801 goes at a more negative offset in the frame. */
802 /* #define FRAME_GROWS_DOWNWARD */
804 /* Offset within stack frame to start allocating local variables at.
805 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
806 first local allocated. Otherwise, it is the offset to the BEGINNING
807 of the first local allocated. */
808 #define STARTING_FRAME_OFFSET 8
810 /* If we generate an insn to push BYTES bytes,
811 this says how many the stack pointer really advances by.
812 On the HP-PA, don't define this because there are no push insns. */
813 /* #define PUSH_ROUNDING(BYTES) */
815 /* Offset of first parameter from the argument pointer register value.
816 This value will be negated because the arguments grow down.
817 Also note that on STACK_GROWS_UPWARD machines (such as this one)
818 this is the distance from the frame pointer to the end of the first
819 argument, not it's beginning. To get the real offset of the first
820 argument, the size of the argument must be added.
822 ??? Have to check on this.*/
824 #define FIRST_PARM_OFFSET(FNDECL) -32
826 /* Absolute value of offset from top-of-stack address to location to store the
827 function parameter if it can't go in a register.
828 Addresses for following parameters are computed relative to this one. */
829 #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
832 /* When a parameter is passed in a register, stack space is still
834 #define REG_PARM_STACK_SPACE(DECL) 16
836 /* Define this if the above stack space is to be considered part of the
837 space allocated by the caller. */
838 #define OUTGOING_REG_PARM_STACK_SPACE
840 /* Keep the stack pointer constant throughout the function.
841 This is both an optimization and a necessity: longjmp
842 doesn't behave itself when the stack pointer moves within
844 #define ACCUMULATE_OUTGOING_ARGS
846 /* The weird HPPA calling conventions require a minimum of 48 bytes on
847 the stack: 16 bytes for register saves, and 32 bytes for magic.
848 This is the difference between the logical top of stack and the
850 #define STACK_POINTER_OFFSET -32
852 #define STACK_DYNAMIC_OFFSET(FNDECL) \
853 ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
855 /* Value is 1 if returning from a function call automatically
856 pops the arguments described by the number-of-args field in the call.
857 FUNDECL is the declaration node of the function (as a tree),
858 FUNTYPE is the data type of the function (as a tree),
859 or for a library call it is an identifier node for the subroutine name. */
861 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
863 /* Define how to find the value returned by a function.
864 VALTYPE is the data type of the value (as a tree).
865 If the precise function being called is known, FUNC is its FUNCTION_DECL;
866 otherwise, FUNC is 0. */
868 /* On the HP-PA the value is found in register(s) 28(-29), unless
869 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
872 #define FUNCTION_VALUE(VALTYPE, FUNC) \
873 gen_rtx_REG (TYPE_MODE (VALTYPE), ((! TARGET_SOFT_FLOAT \
874 && (TYPE_MODE (VALTYPE) == SFmode || \
875 TYPE_MODE (VALTYPE) == DFmode)) ? \
878 /* Define how to find the value returned by a library function
879 assuming the value has mode MODE. */
881 #define LIBCALL_VALUE(MODE) \
883 (! TARGET_SOFT_FLOAT \
884 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
886 /* 1 if N is a possible register number for a function value
887 as seen by the caller. */
889 #define FUNCTION_VALUE_REGNO_P(N) \
890 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
892 /* 1 if N is a possible register number for function argument passing. */
894 #define FUNCTION_ARG_REGNO_P(N) \
895 (((N) >= 23 && (N) <= 26) || (! TARGET_SOFT_FLOAT && (N) >= 32 && (N) <= 39))
897 /* Define a data type for recording info about an argument list
898 during the scan of that argument list. This data type should
899 hold all necessary information about the function itself
900 and about the args processed so far, enough to enable macros
901 such as FUNCTION_ARG to determine where the next arg should go.
903 On the HP-PA, this is a single integer, which is a number of words
904 of arguments scanned so far (including the invisible argument,
905 if any, which holds the structure-value-address).
906 Thus 4 or more means all following args should go on the stack. */
908 struct hppa_args {int words, nargs_prototype, indirect; };
910 #define CUMULATIVE_ARGS struct hppa_args
912 /* Initialize a variable CUM of type CUMULATIVE_ARGS
913 for a call to a function whose data type is FNTYPE.
914 For a library call, FNTYPE is 0. */
916 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
918 (CUM).indirect = INDIRECT, \
919 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
920 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
921 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
922 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
927 /* Similar, but when scanning the definition of a procedure. We always
928 set NARGS_PROTOTYPE large so we never return a PARALLEL. */
930 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
932 (CUM).indirect = 0, \
933 (CUM).nargs_prototype = 1000
935 /* Figure out the size in words of the function argument. */
937 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
938 ((((MODE) != BLKmode \
939 ? GET_MODE_SIZE (MODE) \
940 : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
942 /* Update the data in CUM to advance over an argument
943 of mode MODE and data type TYPE.
944 (TYPE is null for libcalls where that information may not be available.) */
946 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
947 { (CUM).nargs_prototype--; \
948 ((((CUM).words & 01) && (TYPE) != 0 \
949 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \
951 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \
954 /* Determine where to put an argument to a function.
955 Value is zero to push the argument on the stack,
956 or a hard register in which to store the argument.
958 MODE is the argument's machine mode.
959 TYPE is the data type of the argument (as a tree).
960 This is null for libcalls where that information may
962 CUM is a variable of type CUMULATIVE_ARGS which gives info about
963 the preceding args and about the function being called.
964 NAMED is nonzero if this argument is a named parameter
965 (otherwise it is an extra parameter matching an ellipsis).
967 On the HP-PA the first four words of args are normally in registers
968 and the rest are pushed. But any arg that won't entirely fit in regs
971 Arguments passed in registers are either 1 or 2 words long.
973 The caller must make a distinction between calls to explicitly named
974 functions and calls through pointers to functions -- the conventions
975 are different! Calls through pointers to functions only use general
976 registers for the first four argument words.
978 Of course all this is different for the portable runtime model
979 HP wants everyone to use for ELF. Ugh. Here's a quick description
980 of how it's supposed to work.
982 1) callee side remains unchanged. It expects integer args to be
983 in the integer registers, float args in the float registers and
984 unnamed args in integer registers.
986 2) caller side now depends on if the function being called has
987 a prototype in scope (rather than if it's being called indirectly).
989 2a) If there is a prototype in scope, then arguments are passed
990 according to their type (ints in integer registers, floats in float
991 registers, unnamed args in integer registers.
993 2b) If there is no prototype in scope, then floating point arguments
994 are passed in both integer and float registers. egad.
996 FYI: The portable parameter passing conventions are almost exactly like
997 the standard parameter passing conventions on the RS6000. That's why
998 you'll see lots of similar code in rs6000.h. */
1000 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
1002 /* Do not expect to understand this without reading it several times. I'm
1003 tempted to try and simply it, but I worry about breaking something. */
1005 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1006 (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
1007 ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \
1008 || !FLOAT_MODE_P (MODE) || TARGET_SOFT_FLOAT \
1009 || (CUM).nargs_prototype > 0) \
1010 ? gen_rtx_REG ((MODE), \
1011 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
1012 ? (((!(CUM).indirect \
1013 || TARGET_PORTABLE_RUNTIME) \
1014 && (MODE) == DFmode \
1015 && ! TARGET_SOFT_FLOAT) \
1016 ? ((CUM).words ? 38 : 34) \
1017 : ((CUM).words ? 23 : 25)) \
1018 : (((!(CUM).indirect \
1019 || TARGET_PORTABLE_RUNTIME) \
1020 && (MODE) == SFmode \
1021 && ! TARGET_SOFT_FLOAT) \
1022 ? (32 + 2 * (CUM).words) \
1023 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \
1025 /* We are calling a non-prototyped function with floating point \
1026 arguments using the portable conventions. */ \
1027 : gen_rtx_PARALLEL ((MODE), \
1030 gen_rtx_EXPR_LIST (VOIDmode, \
1031 gen_rtx_REG ((MODE), \
1032 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
1033 ? ((CUM).words ? 38 : 34) \
1034 : (32 + 2 * (CUM).words))), \
1036 gen_rtx_EXPR_LIST (VOIDmode, \
1037 gen_rtx_REG ((MODE), \
1038 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
1039 ? ((CUM).words ? 23 : 25) \
1040 : (27 - (CUM).words - \
1041 FUNCTION_ARG_SIZE ((MODE), \
1044 /* Pass this parameter in the stack. */ \
1047 /* For an arg passed partly in registers and partly in memory,
1048 this is the number of registers used.
1049 For args passed entirely in registers or entirely in memory, zero. */
1051 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
1053 /* If defined, a C expression that gives the alignment boundary, in
1054 bits, of an argument with the specified mode and type. If it is
1055 not defined, `PARM_BOUNDARY' is used for all arguments. */
1057 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1059 ? (((int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) \
1060 / UNITS_PER_WORD) * BITS_PER_WORD \
1061 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
1063 : GET_MODE_ALIGNMENT(MODE)))
1065 /* Arguments larger than eight bytes are passed by invisible reference */
1067 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1068 ((TYPE) && int_size_in_bytes (TYPE) > 8)
1070 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
1071 ((TYPE) && int_size_in_bytes (TYPE) > 8)
1074 extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
1075 extern enum cmp_type hppa_branch_type;
1077 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
1078 { char *target_name = XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0); \
1079 STRIP_NAME_ENCODING (target_name, target_name); \
1080 output_function_prologue (FILE, 0); \
1081 if (VAL_14_BITS_P (DELTA)) \
1082 fprintf (FILE, "\tb %s\n\tldo %d(%%r26),%%r26\n", target_name, DELTA); \
1084 fprintf (FILE, "\taddil L%%%d,%%r26\n\tb %s\n\tldo R%%%d(%%r1),%%r26\n", \
1085 DELTA, target_name, DELTA); \
1086 fprintf (FILE, "\n\t.EXIT\n\t.PROCEND\n"); \
1089 /* This macro generates the assembly code for function entry.
1090 FILE is a stdio stream to output the code to.
1091 SIZE is an int: how many units of temporary storage to allocate.
1092 Refer to the array `regs_ever_live' to determine which registers
1093 to save; `regs_ever_live[I]' is nonzero if register number I
1094 is ever used in the function. This macro is responsible for
1095 knowing which registers should not be saved even if used. */
1097 /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1098 of memory. If any fpu reg is used in the function, we allocate
1099 such a block here, at the bottom of the frame, just in case it's needed.
1101 If this function is a leaf procedure, then we may choose not
1102 to do a "save" insn. The decision about whether or not
1103 to do this is made in regclass.c. */
1105 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1106 output_function_prologue (FILE, SIZE)
1108 /* Output assembler code to FILE to increment profiler label # LABELNO
1109 for profiling a function entry.
1111 Because HPUX _mcount is so different, we actually emit the
1112 profiling code in function_prologue. This just stores LABELNO for
1115 #define PROFILE_BEFORE_PROLOGUE
1116 #define FUNCTION_PROFILER(FILE, LABELNO) \
1117 { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1119 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1120 the stack pointer does not matter. The value is tested only in
1121 functions that have frame pointers.
1122 No definition is equivalent to always zero. */
1124 extern int may_call_alloca;
1125 extern int current_function_pretend_args_size;
1127 #define EXIT_IGNORE_STACK \
1128 (get_frame_size () != 0 \
1129 || current_function_calls_alloca || current_function_outgoing_args_size)
1132 /* This macro generates the assembly code for function exit,
1133 on machines that need it. If FUNCTION_EPILOGUE is not defined
1134 then individual return instructions are generated for each
1135 return statement. Args are same as for FUNCTION_PROLOGUE.
1137 The function epilogue should not depend on the current stack pointer!
1138 It should use the frame pointer only. This is mandatory because
1139 of alloca; we also take advantage of it to omit stack adjustments
1140 before returning. */
1142 /* This declaration is needed due to traditional/ANSI
1143 incompatibilities which cannot be #ifdefed away
1144 because they occur inside of macros. Sigh. */
1145 extern union tree_node *current_function_decl;
1147 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1148 output_function_epilogue (FILE, SIZE)
1150 /* Output assembler code for a block containing the constant parts
1151 of a trampoline, leaving space for the variable parts.\
1153 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1154 and then branches to the specified routine.
1156 This code template is copied from text segment to stack location
1157 and then patched with INITIALIZE_TRAMPOLINE to contain
1158 valid values, and then entered as a subroutine.
1160 It is best to keep this as small as possible to avoid having to
1161 flush multiple lines in the cache. */
1163 #define TRAMPOLINE_TEMPLATE(FILE) \
1165 fputs ("\tldw 36(%r22),%r21\n", FILE); \
1166 fputs ("\tbb,>=,n %r21,30,.+16\n", FILE); \
1167 fputs ("\tdepi 0,31,2,%r21\n", FILE); \
1168 fputs ("\tldw 4(%r21),%r19\n", FILE); \
1169 fputs ("\tldw 0(%r21),%r21\n", FILE); \
1170 fputs ("\tldsid (%r21),%r1\n", FILE); \
1171 fputs ("\tmtsp %r1,%sr0\n", FILE); \
1172 fputs ("\tbe 0(%sr0,%r21)\n", FILE); \
1173 fputs ("\tldw 40(%r22),%r29\n", FILE); \
1174 fputs ("\t.word 0\n", FILE); \
1175 fputs ("\t.word 0\n", FILE); \
1178 /* Length in units of the trampoline for entering a nested function.
1180 Flush the cache entries corresponding to the first and last addresses
1181 of the trampoline. This is necessary as the trampoline may cross two
1184 If the code part of the trampoline ever grows to > 32 bytes, then it
1185 will become necessary to hack on the cacheflush pattern in pa.md. */
1187 #define TRAMPOLINE_SIZE (11 * 4)
1189 /* Emit RTL insns to initialize the variable parts of a trampoline.
1190 FNADDR is an RTX for the address of the function's pure code.
1191 CXT is an RTX for the static chain value for the function.
1193 Move the function address to the trampoline template at offset 12.
1194 Move the static chain value to trampoline template at offset 16. */
1196 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1198 rtx start_addr, end_addr; \
1200 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1201 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
1202 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1203 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
1204 /* fdc and fic only use registers for the address to flush, \
1205 they do not accept integer displacements. */ \
1206 start_addr = force_reg (Pmode, (TRAMP)); \
1207 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1208 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1209 end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
1210 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1211 gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
1214 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1215 reference the 4 integer arg registers and 4 fp arg registers.
1216 Ordinarily they are not call used registers, but they are for
1217 _builtin_saveregs, so we must make this explicit. */
1219 extern struct rtx_def *hppa_builtin_saveregs ();
1220 #define EXPAND_BUILTIN_SAVEREGS() hppa_builtin_saveregs ()
1223 /* Addressing modes, and classification of registers for them.
1225 Using autoincrement addressing modes on PA8000 class machines is
1228 #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
1229 #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
1231 #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
1232 #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
1234 /* Macros to check register numbers against specific register classes. */
1236 /* These assume that REGNO is a hard or pseudo reg number.
1237 They give nonzero only if REGNO is a hard reg of the suitable class
1238 or a pseudo reg currently allocated to a suitable hard reg.
1239 Since they use reg_renumber, they are safe only once reg_renumber
1240 has been allocated, which happens in local-alloc.c. */
1242 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1243 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1244 #define REGNO_OK_FOR_BASE_P(REGNO) \
1245 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1246 #define REGNO_OK_FOR_FP_P(REGNO) \
1247 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1249 /* Now macros that check whether X is a register and also,
1250 strictly, whether it is in a specified class.
1252 These macros are specific to the HP-PA, and may be used only
1253 in code for printing assembler insns and in conditions for
1254 define_optimization. */
1256 /* 1 if X is an fp register. */
1258 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1260 /* Maximum number of registers that can appear in a valid memory address. */
1262 #define MAX_REGS_PER_ADDRESS 2
1264 /* Recognize any constant value that is a valid address except
1265 for symbolic addresses. We get better CSE by rejecting them
1266 here and allowing hppa_legitimize_address to break them up. We
1267 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1269 #define CONSTANT_ADDRESS_P(X) \
1270 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1271 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1272 || GET_CODE (X) == HIGH) \
1273 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1275 /* Include all constant integers and constant doubles, but not
1276 floating-point, except for floating-point zero.
1278 Reject LABEL_REFs if we're not using gas or the new HP assembler. */
1279 #ifdef NEW_HP_ASSEMBLER
1280 #define LEGITIMATE_CONSTANT_P(X) \
1281 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1282 || (X) == CONST0_RTX (GET_MODE (X))) \
1283 && !function_label_operand (X, VOIDmode))
1285 #define LEGITIMATE_CONSTANT_P(X) \
1286 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1287 || (X) == CONST0_RTX (GET_MODE (X))) \
1288 && (GET_CODE (X) != LABEL_REF || TARGET_GAS)\
1289 && !function_label_operand (X, VOIDmode))
1292 /* Subroutine for EXTRA_CONSTRAINT.
1294 Return 1 iff OP is a pseudo which did not get a hard register and
1295 we are running the reload pass. */
1297 #define IS_RELOADING_PSEUDO_P(OP) \
1298 ((reload_in_progress \
1299 && GET_CODE (OP) == REG \
1300 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1301 && reg_renumber [REGNO (OP)] < 0))
1303 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1305 For the HPPA, `Q' means that this is a memory operand but not a
1306 symbolic memory operand. Note that an unassigned pseudo register
1307 is such a memory operand. Needed because reload will generate
1308 these things in insns and then not re-recognize the insns, causing
1309 constrain_operands to fail.
1311 `R' is used for scaled indexed addresses.
1315 `T' is for fp loads and stores. */
1316 #define EXTRA_CONSTRAINT(OP, C) \
1318 (IS_RELOADING_PSEUDO_P (OP) \
1319 || (GET_CODE (OP) == MEM \
1320 && (memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1321 || reload_in_progress) \
1322 && ! symbolic_memory_operand (OP, VOIDmode) \
1323 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1324 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1325 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\
1327 (GET_CODE (OP) == MEM \
1328 && GET_CODE (XEXP (OP, 0)) == PLUS \
1329 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \
1330 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \
1331 && (move_operand (OP, GET_MODE (OP)) \
1332 || memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1333 || reload_in_progress)) \
1335 (GET_CODE (OP) == MEM \
1336 /* Using DFmode forces only short displacements \
1337 to be recognized as valid in reg+d addresses. */\
1338 && memory_address_p (DFmode, XEXP (OP, 0)) \
1339 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1340 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1341 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))) : 0)))
1343 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1344 and check its validity for a certain class.
1345 We have two alternate definitions for each of them.
1346 The usual definition accepts all pseudo regs; the other rejects
1347 them unless they have been allocated suitable hard regs.
1348 The symbol REG_OK_STRICT causes the latter definition to be used.
1350 Most source files want to accept pseudo regs in the hope that
1351 they will get allocated to the class that the insn wants them to be in.
1352 Source files for reload pass need to be strict.
1353 After reload, it makes no difference, since pseudo regs have
1354 been eliminated by then. */
1356 #ifndef REG_OK_STRICT
1358 /* Nonzero if X is a hard reg that can be used as an index
1359 or if it is a pseudo reg. */
1360 #define REG_OK_FOR_INDEX_P(X) \
1361 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1362 /* Nonzero if X is a hard reg that can be used as a base reg
1363 or if it is a pseudo reg. */
1364 #define REG_OK_FOR_BASE_P(X) \
1365 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1369 /* Nonzero if X is a hard reg that can be used as an index. */
1370 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1371 /* Nonzero if X is a hard reg that can be used as a base reg. */
1372 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1376 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1377 that is a valid memory address for an instruction.
1378 The MODE argument is the machine mode for the MEM expression
1379 that wants to use this address.
1381 On the HP-PA, the actual legitimate addresses must be
1382 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1383 But we can treat a SYMBOL_REF as legitimate if it is part of this
1384 function's constant-pool, because such addresses can actually
1385 be output as REG+SMALLINT.
1387 Note we only allow 5 bit immediates for access to a constant address;
1388 doing so avoids losing for loading/storing a FP register at an address
1389 which will not fit in 5 bits. */
1391 #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1392 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1394 #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1395 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1397 #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1398 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1400 #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1401 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1403 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1405 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1406 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1407 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1408 && REG_P (XEXP (X, 0)) \
1409 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1411 else if (GET_CODE (X) == PLUS) \
1413 rtx base = 0, index = 0; \
1414 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1416 if (GET_CODE (XEXP (X, 1)) == REG \
1417 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1419 else if (flag_pic == 1 \
1420 && GET_CODE (XEXP (X, 1)) == SYMBOL_REF)\
1423 else if (REG_P (XEXP (X, 0)) \
1424 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1425 base = XEXP (X, 0), index = XEXP (X, 1); \
1426 else if (REG_P (XEXP (X, 1)) \
1427 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1428 base = XEXP (X, 1), index = XEXP (X, 0); \
1430 if (GET_CODE (index) == CONST_INT \
1431 && ((INT_14_BITS (index) \
1432 && (TARGET_SOFT_FLOAT \
1433 || ((MODE) != SFmode && (MODE) != DFmode))) \
1434 || INT_5_BITS (index))) \
1436 if (! TARGET_SOFT_FLOAT \
1437 && ! TARGET_DISABLE_INDEXING \
1439 && (mode == SFmode || mode == DFmode) \
1440 && GET_CODE (index) == MULT \
1441 && GET_CODE (XEXP (index, 0)) == REG \
1442 && REG_OK_FOR_BASE_P (XEXP (index, 0)) \
1443 && GET_CODE (XEXP (index, 1)) == CONST_INT \
1444 && INTVAL (XEXP (index, 1)) == (mode == SFmode ? 4 : 8))\
1447 else if (GET_CODE (X) == LO_SUM \
1448 && GET_CODE (XEXP (X, 0)) == REG \
1449 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1450 && CONSTANT_P (XEXP (X, 1)) \
1451 && (TARGET_SOFT_FLOAT \
1452 || ((MODE) != SFmode \
1453 && (MODE) != DFmode))) \
1455 else if (GET_CODE (X) == LO_SUM \
1456 && GET_CODE (XEXP (X, 0)) == SUBREG \
1457 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1458 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1459 && CONSTANT_P (XEXP (X, 1)) \
1460 && (TARGET_SOFT_FLOAT \
1461 || ((MODE) != SFmode \
1462 && (MODE) != DFmode))) \
1464 else if (GET_CODE (X) == LABEL_REF \
1465 || (GET_CODE (X) == CONST_INT \
1466 && INT_5_BITS (X))) \
1468 /* Needed for -fPIC */ \
1469 else if (GET_CODE (X) == LO_SUM \
1470 && GET_CODE (XEXP (X, 0)) == REG \
1471 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1472 && GET_CODE (XEXP (X, 1)) == UNSPEC) \
1476 /* Look for machine dependent ways to make the invalid address AD a
1479 For the PA, transform:
1481 memory(X + <large int>)
1485 if (<large int> & mask) >= 16
1486 Y = (<large int> & ~mask) + mask + 1 Round up.
1488 Y = (<large int> & ~mask) Round down.
1490 memory (Z + (<large int> - Y));
1492 This makes reload inheritance and reload_cse work better since Z
1495 There may be more opportunities to improve code with this hook. */
1496 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
1498 int offset, newoffset, mask; \
1499 rtx new, temp = NULL_RTX; \
1500 mask = GET_MODE_CLASS (MODE) == MODE_FLOAT ? 0x1f : 0x3fff; \
1503 && GET_CODE (AD) == PLUS) \
1504 temp = simplify_binary_operation (PLUS, Pmode, \
1505 XEXP (AD, 0), XEXP (AD, 1)); \
1507 new = temp ? temp : AD; \
1510 && GET_CODE (new) == PLUS \
1511 && GET_CODE (XEXP (new, 0)) == REG \
1512 && GET_CODE (XEXP (new, 1)) == CONST_INT) \
1514 offset = INTVAL (XEXP ((new), 1)); \
1516 /* Choose rounding direction. Round up if we are >= halfway. */ \
1517 if ((offset & mask) >= ((mask + 1) / 2)) \
1518 newoffset = (offset & ~mask) + mask + 1; \
1520 newoffset = offset & ~mask; \
1522 if (newoffset != 0 \
1523 && VAL_14_BITS_P (newoffset)) \
1526 temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \
1527 GEN_INT (newoffset)); \
1528 AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
1529 push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
1530 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \
1540 /* Try machine-dependent ways of modifying an illegitimate address
1541 to be legitimate. If we find one, return the new, valid address.
1542 This macro is used in only one place: `memory_address' in explow.c.
1544 OLDX is the address as it was before break_out_memory_refs was called.
1545 In some cases it is useful to look at this to decide what needs to be done.
1547 MODE and WIN are passed so that this macro can use
1548 GO_IF_LEGITIMATE_ADDRESS.
1550 It is always safe for this macro to do nothing. It exists to recognize
1551 opportunities to optimize the output. */
1553 extern struct rtx_def *hppa_legitimize_address ();
1554 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1555 { rtx orig_x = (X); \
1556 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1557 if ((X) != orig_x && memory_address_p (MODE, X)) \
1560 /* Go to LABEL if ADDR (a legitimate address expression)
1561 has an effect that depends on the machine mode it is used for. */
1563 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1564 if (GET_CODE (ADDR) == PRE_DEC \
1565 || GET_CODE (ADDR) == POST_DEC \
1566 || GET_CODE (ADDR) == PRE_INC \
1567 || GET_CODE (ADDR) == POST_INC) \
1570 /* Arghh. The hpux10 linker chokes if we have a reference to symbols
1571 in a readonly data section when the symbol is defined in a shared
1572 library. Since we can't know at compile time if a symbol will be
1573 satisfied by a shared library or main program we put any symbolic
1574 constant into the normal data section. */
1575 #define SELECT_RTX_SECTION(MODE,RTX) \
1576 if (symbolic_operand (RTX, MODE)) \
1579 readonly_data_section ();
1581 /* Specify the machine mode that this machine uses
1582 for the index in the tablejump instruction. */
1583 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? TImode : DImode)
1585 /* Specify the tree operation to be used to convert reals to integers. */
1586 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1588 /* This is the kind of divide that is easiest to do in the general case. */
1589 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1591 /* Define this as 1 if `char' should by default be signed; else as 0. */
1592 #define DEFAULT_SIGNED_CHAR 1
1594 /* Max number of bytes we can move from memory to memory
1595 in one reasonably fast instruction. */
1598 /* Higher than the default as we prefer to use simple move insns
1599 (better scheduling and delay slot filling) and because our
1600 built-in block move is really a 2X unrolled loop. */
1601 #define MOVE_RATIO 4
1603 /* Define if operations between registers always perform the operation
1604 on the full register even if a narrower mode is specified. */
1605 #define WORD_REGISTER_OPERATIONS
1607 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1608 will either zero-extend or sign-extend. The value of this macro should
1609 be the code that says which one of the two operations is implicitly
1610 done, NIL if none. */
1611 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1613 /* Nonzero if access to memory by bytes is slow and undesirable. */
1614 #define SLOW_BYTE_ACCESS 1
1616 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1617 is done just by pretending it is already truncated. */
1618 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1620 /* We assume that the store-condition-codes instructions store 0 for false
1621 and some other value for true. This is the value stored for true. */
1623 #define STORE_FLAG_VALUE 1
1625 /* When a prototype says `char' or `short', really pass an `int'. */
1626 #define PROMOTE_PROTOTYPES
1628 /* Specify the machine mode that pointers have.
1629 After generation of rtl, the compiler makes no further distinction
1630 between pointers and any other objects of this machine mode. */
1631 #define Pmode word_mode
1633 /* Add any extra modes needed to represent the condition code.
1635 HPPA floating comparisons produce condition codes. */
1636 #define EXTRA_CC_MODES CCFPmode
1638 /* Define the names for the modes specified above. */
1639 #define EXTRA_CC_NAMES "CCFP"
1641 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1642 return the mode to be used for the comparison. For floating-point, CCFPmode
1643 should be used. CC_NOOVmode should be used when the first operand is a
1644 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1646 #define SELECT_CC_MODE(OP,X,Y) \
1647 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1649 /* A function address in a call instruction
1650 is a byte address (for indexing purposes)
1651 so give the MEM rtx a byte's mode. */
1652 #define FUNCTION_MODE SImode
1654 /* Define this if addresses of constant functions
1655 shouldn't be put through pseudo regs where they can be cse'd.
1656 Desirable on machines where ordinary constants are expensive
1657 but a CALL with constant address is cheap. */
1658 #define NO_FUNCTION_CSE
1660 /* Define this to be nonzero if shift instructions ignore all but the low-order
1662 #define SHIFT_COUNT_TRUNCATED 1
1664 /* Use atexit for static constructors/destructors, instead of defining
1665 our own exit function. */
1668 /* Compute the cost of computing a constant rtl expression RTX
1669 whose rtx-code is CODE. The body of this macro is a portion
1670 of a switch statement. If the code is computed here,
1671 return it with a return statement. Otherwise, break from the switch. */
1673 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1675 if (INTVAL (RTX) == 0) return 0; \
1676 if (INT_14_BITS (RTX)) return 1; \
1683 case CONST_DOUBLE: \
1684 if ((RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)) \
1685 && OUTER_CODE != SET) \
1690 #define ADDRESS_COST(RTX) \
1691 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1693 /* Compute extra cost of moving data between one register class
1696 Make moves from SAR so expensive they should never happen. We used to
1697 have 0xffff here, but that generates overflow in rare cases.
1699 Copies involving a FP register and a non-FP register are relatively
1700 expensive because they must go through memory.
1702 Other copies are reasonably cheap. */
1703 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1704 (CLASS1 == SHIFT_REGS ? 0x100 \
1705 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1706 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1710 /* Provide the costs of a rtl expression. This is in the body of a
1711 switch on CODE. The purpose for the cost of MULT is to encourage
1712 `synth_mult' to find a synthetic multiply when reasonable. */
1714 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1716 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1717 return COSTS_N_INSNS (3); \
1718 return (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
1719 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1721 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1722 return COSTS_N_INSNS (14); \
1726 return COSTS_N_INSNS (60); \
1727 case PLUS: /* this includes shNadd insns */ \
1729 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1730 return COSTS_N_INSNS (3); \
1731 return COSTS_N_INSNS (1); \
1735 return COSTS_N_INSNS (1);
1737 /* Adjust the cost of dependencies. */
1739 #define ADJUST_COST(INSN,LINK,DEP,COST) \
1740 (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1742 /* Adjust scheduling priorities. We use this to try and keep addil
1743 and the next use of %r1 close together. */
1744 #define ADJUST_PRIORITY(PREV) \
1746 rtx set = single_set (PREV); \
1750 src = SET_SRC (set); \
1751 dest = SET_DEST (set); \
1752 if (GET_CODE (src) == LO_SUM \
1753 && symbolic_operand (XEXP (src, 1), VOIDmode) \
1754 && ! read_only_operand (XEXP (src, 1), VOIDmode)) \
1755 INSN_PRIORITY (PREV) >>= 3; \
1756 else if (GET_CODE (src) == MEM \
1757 && GET_CODE (XEXP (src, 0)) == LO_SUM \
1758 && symbolic_operand (XEXP (XEXP (src, 0), 1), VOIDmode)\
1759 && ! read_only_operand (XEXP (XEXP (src, 0), 1), VOIDmode))\
1760 INSN_PRIORITY (PREV) >>= 1; \
1761 else if (GET_CODE (dest) == MEM \
1762 && GET_CODE (XEXP (dest, 0)) == LO_SUM \
1763 && symbolic_operand (XEXP (XEXP (dest, 0), 1), VOIDmode)\
1764 && ! read_only_operand (XEXP (XEXP (dest, 0), 1), VOIDmode))\
1765 INSN_PRIORITY (PREV) >>= 3; \
1769 /* Handling the special cases is going to get too complicated for a macro,
1770 just call `pa_adjust_insn_length' to do the real work. */
1771 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1772 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1774 /* Millicode insns are actually function calls with some special
1775 constraints on arguments and register usage.
1777 Millicode calls always expect their arguments in the integer argument
1778 registers, and always return their result in %r29 (ret1). They
1779 are expected to clobber their arguments, %r1, %r29, and %r31 and
1782 These macros tell reorg that the references to arguments and
1783 register clobbers for millicode calls do not appear to happen
1784 until after the millicode call. This allows reorg to put insns
1785 which set the argument registers into the delay slot of the millicode
1786 call -- thus they act more like traditional CALL_INSNs.
1788 get_attr_type will try to recognize the given insn, so make sure to
1789 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1791 #define INSN_SETS_ARE_DELAYED(X) (insn_sets_and_refs_are_delayed (X))
1792 #define INSN_REFERENCES_ARE_DELAYED(X) (insn_sets_and_refs_are_delayed (X))
1795 /* Control the assembler format that we output. */
1797 /* Output to assembler file text saying following lines
1798 may contain character constants, extra white space, comments, etc. */
1800 #define ASM_APP_ON ""
1802 /* Output to assembler file text saying following lines
1803 no longer contain unusual constructs. */
1805 #define ASM_APP_OFF ""
1807 /* How to refer to registers in assembler output.
1808 This sequence is indexed by compiler's hard-register-number (see above). */
1810 #define REGISTER_NAMES \
1811 {"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1812 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1813 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1814 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1815 "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1816 "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
1817 "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
1818 "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
1819 "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
1820 "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
1821 "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
1824 #define ADDITIONAL_REGISTER_NAMES \
1825 {{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
1826 {"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
1827 {"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
1828 {"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
1829 {"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
1830 {"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
1831 {"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
1834 /* This is how to output the definition of a user-level label named NAME,
1835 such as the label on a static function or variable NAME. */
1837 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1838 do { assemble_name (FILE, NAME); \
1839 fputc ('\n', FILE); } while (0)
1841 /* This is how to output a reference to a user-level label named NAME.
1842 `assemble_name' uses this. */
1844 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1845 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1847 /* This is how to output an internal numbered label where
1848 PREFIX is the class of label and NUM is the number within the class. */
1850 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1851 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1853 /* This is how to store into the string LABEL
1854 the symbol_ref name of an internal numbered label where
1855 PREFIX is the class of label and NUM is the number within the class.
1856 This is suitable for output with `assemble_name'. */
1858 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1859 sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
1861 /* This is how to output an assembler line defining a `double' constant. */
1863 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1865 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
1866 fprintf (FILE, "\t.word 0x%lx\n\t.word 0x%lx\n", l[0], l[1]); \
1869 /* This is how to output an assembler line defining a `float' constant. */
1871 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1873 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1874 fprintf (FILE, "\t.word 0x%lx\n", l); \
1877 /* Likewise for `short' and `char' constants. */
1879 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1880 ( fputs ("\t.half ", FILE), \
1881 output_addr_const (FILE, (VALUE)), \
1884 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1885 ( fputs ("\t.byte ", FILE), \
1886 output_addr_const (FILE, (VALUE)), \
1889 /* This is how to output an assembler line for a numeric constant byte. */
1891 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1892 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1894 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1895 output_ascii ((FILE), (P), (SIZE))
1897 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1898 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1899 /* This is how to output an element of a case-vector that is absolute.
1900 Note that this method makes filling these branch delay slots
1903 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1904 if (TARGET_BIG_SWITCH) \
1905 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldil LR'L$%04d,%%r1\n\tbe RR'L$%04d(%%sr4,%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE, VALUE); \
1907 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1909 /* Jump tables are executable code and live in the TEXT section on the PA. */
1910 #define JUMP_TABLES_IN_TEXT_SECTION 1
1912 /* This is how to output an element of a case-vector that is relative.
1913 This must be defined correctly as it is used when generating PIC code.
1915 I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1916 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
1917 rather than a table of absolute addresses. */
1919 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1920 if (TARGET_BIG_SWITCH) \
1921 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldw T'L$%04d(%%r19),%%r1\n\tbv %%r0(%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE); \
1923 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1925 /* This is how to output an assembler line
1926 that says to advance the location counter
1927 to a multiple of 2**LOG bytes. */
1929 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1930 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1932 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1933 fprintf (FILE, "\t.blockz %d\n", (SIZE))
1935 /* This says how to output an assembler line to define a global common symbol
1936 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1938 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
1940 assemble_name ((FILE), (NAME)); \
1941 fputs ("\t.comm ", (FILE)); \
1942 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
1944 /* This says how to output an assembler line to define a local common symbol
1945 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1947 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
1949 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
1950 assemble_name ((FILE), (NAME)); \
1951 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
1953 /* Store in OUTPUT a string (made with alloca) containing
1954 an assembler-name for a local static variable named NAME.
1955 LABELNO is an integer which is different for each call. */
1957 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1958 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1959 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1961 /* Define the parentheses used to group arithmetic operations
1962 in assembler code. */
1964 #define ASM_OPEN_PAREN "("
1965 #define ASM_CLOSE_PAREN ")"
1967 /* All HP assemblers use "!" to separate logical lines. */
1968 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
1970 /* Define results of standard character escape sequences. */
1971 #define TARGET_BELL 007
1972 #define TARGET_BS 010
1973 #define TARGET_TAB 011
1974 #define TARGET_NEWLINE 012
1975 #define TARGET_VT 013
1976 #define TARGET_FF 014
1977 #define TARGET_CR 015
1979 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1980 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
1982 /* Print operand X (an rtx) in assembler syntax to file FILE.
1983 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1984 For `%' followed by punctuation, CODE is the punctuation and X is null.
1986 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1987 and an immediate zero should be represented as `r0'.
1989 Several % codes are defined:
1991 C compare conditions
1992 N extract conditions
1993 M modifier to handle preincrement addressing for memory refs.
1994 F modifier to handle preincrement addressing for fp memory refs */
1996 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1999 /* Print a memory address as an operand to reference that memory location. */
2001 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2002 { register rtx addr = ADDR; \
2003 register rtx base; \
2005 switch (GET_CODE (addr)) \
2008 fprintf (FILE, "0(%s)", reg_names [REGNO (addr)]); \
2011 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
2012 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
2013 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
2014 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
2017 fprintf (FILE, "%d(%s)", offset, reg_names [REGNO (base)]); \
2020 if (!symbolic_operand (XEXP (addr, 1))) \
2021 fputs ("R'", FILE); \
2022 else if (flag_pic == 0) \
2023 fputs ("RR'", FILE); \
2024 else if (flag_pic == 1) \
2026 else if (flag_pic == 2) \
2027 fputs ("RT'", FILE); \
2028 output_global_address (FILE, XEXP (addr, 1), 0); \
2029 fputs ("(", FILE); \
2030 output_operand (XEXP (addr, 0), 0); \
2031 fputs (")", FILE); \
2034 fprintf (FILE, "%d(%%r0)", INTVAL (addr)); \
2037 output_addr_const (FILE, addr); \
2041 /* Define functions in pa.c and used in insn-output.c. */
2043 extern char *output_and ();
2044 extern char *output_ior ();
2045 extern char *output_move_double ();
2046 extern char *output_fp_move_double ();
2047 extern char *output_block_move ();
2048 extern char *output_cbranch ();
2049 extern char *output_bb ();
2050 extern char *output_bvb ();
2051 extern char *output_dbra ();
2052 extern char *output_movb ();
2053 extern char *output_parallel_movb ();
2054 extern char *output_parallel_addb ();
2055 extern char *output_return ();
2056 extern char *output_call ();
2057 extern char *output_millicode_call ();
2058 extern char *output_mul_insn ();
2059 extern char *output_div_insn ();
2060 extern char *output_mod_insn ();
2061 extern char *singlemove_string ();
2062 extern void output_arg_descriptor ();
2063 extern void output_deferred_plabels ();
2064 extern void override_options ();
2065 extern void output_ascii ();
2066 extern void output_function_prologue ();
2067 extern void output_function_epilogue ();
2068 extern void output_global_address ();
2069 extern void print_operand ();
2070 extern struct rtx_def *legitimize_pic_address ();
2071 extern struct rtx_def *gen_cmp_fp ();
2072 extern void hppa_encode_label ();
2073 extern int arith11_operand ();
2074 extern int symbolic_expression_p ();
2075 extern int reloc_needed ();
2076 extern int compute_frame_size ();
2077 extern int hppa_address_cost ();
2078 extern int and_mask_p ();
2079 extern int symbolic_memory_operand ();
2080 extern int pa_adjust_cost ();
2081 extern int pa_adjust_insn_length ();
2082 extern int int11_operand ();
2083 extern int reg_or_cint_move_operand ();
2084 extern int arith5_operand ();
2085 extern int uint5_operand ();
2086 extern int pic_label_operand ();
2087 extern int plus_xor_ior_operator ();
2088 extern int basereg_operand ();
2089 extern int shadd_operand ();
2090 extern int arith_operand ();
2091 extern int read_only_operand ();
2092 extern int move_operand ();
2093 extern int and_operand ();
2094 extern int ior_operand ();
2095 extern int arith32_operand ();
2096 extern int uint32_operand ();
2097 extern int reg_or_nonsymb_mem_operand ();
2098 extern int reg_or_0_operand ();
2099 extern int reg_or_0_or_nonsymb_mem_operand ();
2100 extern int pre_cint_operand ();
2101 extern int post_cint_operand ();
2102 extern int div_operand ();
2103 extern int int5_operand ();
2104 extern int movb_comparison_operator ();
2105 extern int ireg_or_int5_operand ();
2106 extern int fmpyaddoperands ();
2107 extern int fmpysuboperands ();
2108 extern int call_operand_address ();
2109 extern int cint_ok_for_move ();
2110 extern int ior_operand ();
2111 extern void emit_bcond_fp ();
2112 extern int emit_move_sequence ();
2113 extern int emit_hpdiv_const ();
2114 extern void hppa_expand_prologue ();
2115 extern void hppa_expand_epilogue ();
2116 extern int hppa_can_use_return_insn_p ();
2117 extern int is_function_label_plus_const ();
2118 extern int jump_in_call_delay ();
2119 extern enum reg_class secondary_reload_class ();
2120 extern int insn_sets_and_refs_are_delayed ();
2122 /* Declare functions defined in pa.c and used in templates. */
2124 extern struct rtx_def *return_addr_rtx ();
2126 /* Find the return address associated with the frame given by
2128 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
2129 (return_addr_rtx (COUNT, FRAMEADDR))
2131 /* Used to mask out junk bits from the return address, such as
2132 processor state, interrupt status, condition codes and the like. */
2133 #define MASK_RETURN_ADDR \
2134 /* The privilege level is in the two low order bits, mask em out \
2135 of the return address. */ \
2136 (GEN_INT (0xfffffffc))
2138 /* The number of Pmode words for the setjmp buffer. */
2139 #define JMP_BUF_SIZE 50
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