1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Michael Tiemann (tiemann@mcc.com)
4 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
5 Software Science at the University of Utah.
7 This file is part of GNU CC.
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 1, or (at your option)
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING. If not, write to
21 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
23 enum cmp_type /* comparison type */
25 CMP_SI, /* compare integers */
26 CMP_SF, /* compare single precision floats */
27 CMP_DF, /* compare double precision floats */
28 CMP_MAX /* max comparison type */
31 /* For long call handling. */
32 extern unsigned int total_code_bytes;
34 /* Which processor to schedule for. */
43 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
45 /* For -mschedule= option. */
46 extern char *pa_cpu_string;
47 extern enum processor_type pa_cpu;
49 /* Print subsidiary information on the compiler version in use. */
51 #define TARGET_VERSION fprintf (stderr, " (hppa)");
53 /* Run-time compilation parameters selecting different hardware subsets. */
55 extern int target_flags;
57 /* compile code for HP-PA 1.1 ("Snake") */
59 #define TARGET_SNAKE (target_flags & 1)
61 /* Disable all FP registers (they all become fixed). This may be necessary
62 for compiling kernels which perform lazy context switching of FP regs.
63 Note if you use this option and try to perform floating point operations
64 the compiler will abort! */
66 #define TARGET_DISABLE_FPREGS (target_flags & 2)
68 /* Generate code which assumes that calls through function pointers will
69 never cross a space boundary. Such assumptions are generally safe for
70 building kernels and statically linked executables. Code compiled with
71 this option will fail miserably if the executable is dynamically linked
72 or uses nested functions! */
73 #define TARGET_FAST_INDIRECT_CALLS (target_flags & 4)
75 /* Allow unconditional jumps in the delay slots of call instructions. */
76 #define TARGET_JUMP_IN_DELAY (target_flags & 8)
78 /* In rare cases, a millicode call via "bl" can not be turned into
79 a millicode call using "ble" (when SHLIB_INFO subspace is very large).
81 This option forces just millicode calls to use inline long-calls
82 This is far more efficient than the old long-call option which forced
83 every function to be called indirectly (as is still the case for
84 TARGET_PORTABLE_RUNTIME).
86 ??? What about simple jumps, they can suffer from the same problem.
87 Would require significant surgery in pa.md. */
89 #define TARGET_MILLICODE_LONG_CALLS (target_flags & 16)
91 /* Disable indexed addressing modes. */
93 #define TARGET_DISABLE_INDEXING (target_flags & 32)
95 /* Emit code which follows the new portable runtime calling conventions
96 HP wants everyone to use for ELF objects. If at all possible you want
97 to avoid this since it's a performance loss for non-prototyped code.
99 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
100 long-call stubs which is quite expensive. */
102 #define TARGET_PORTABLE_RUNTIME (target_flags & 64)
104 /* Emit directives only understood by GAS. This allows parameter
105 relocations to work for static functions. There is no way
106 to make them work the HP assembler at this time. */
108 #define TARGET_GAS (target_flags & 128)
110 /* Macro to define tables used to set the flags.
111 This is a list in braces of pairs in braces,
112 each pair being { "NAME", VALUE }
113 where VALUE is the bits to set or minus the bits to clear.
114 An empty string NAME is used to identify the default VALUE. */
116 #define TARGET_SWITCHES \
119 {"pa-risc-1-0", -1}, \
120 {"pa-risc-1-1", 1}, \
121 {"disable-fpregs", 2}, \
122 {"no-disable-fpregs", 2}, \
123 {"fast-indirect-calls", 4}, \
124 {"no-fast-indirect-calls", -4},\
125 {"jump-in-delay", 8}, \
126 {"no-jump-in-delay", -8}, \
127 {"millicode-long-calls", 16},\
128 {"no-millicode-long-calls", -16},\
129 {"disable-indexing", 32}, \
130 {"no-disable-indexing", -32},\
131 {"portable-runtime", 64+16},\
132 {"no-portable-runtime", -(64+16)},\
135 { "", TARGET_DEFAULT}}
137 #ifndef TARGET_DEFAULT
138 #define TARGET_DEFAULT 0x88 /* TARGET_GAS + TARGET_JUMP_IN_DELAY */
141 #define TARGET_OPTIONS \
143 { "schedule=", &pa_cpu_string }\
146 #define OVERRIDE_OPTIONS override_options ()
148 #define DBX_DEBUGGING_INFO
149 #define DEFAULT_GDB_EXTENSIONS 1
151 /* This is the way other stabs-in-XXX tools do things. We will be
153 #define DBX_BLOCKS_FUNCTION_RELATIVE 1
155 /* Likewise for linenos.
157 We make the first line stab special to avoid adding several
158 gross hacks to GAS. */
159 #undef ASM_OUTPUT_SOURCE_LINE
160 #define ASM_OUTPUT_SOURCE_LINE(file, line) \
161 { static int sym_lineno = 1; \
162 static tree last_function_decl = NULL; \
163 if (current_function_decl == last_function_decl) \
164 fprintf (file, "\t.stabn 68,0,%d,L$M%d-%s\nL$M%d:\n", \
166 XSTR (XEXP (DECL_RTL (current_function_decl), 0), 0) + 1, \
169 fprintf (file, "\t.stabn 68,0,%d,0\n", line); \
170 last_function_decl = current_function_decl; \
173 /* But, to make this work, we have to output the stabs for the function
175 #define DBX_FUNCTION_FIRST
177 /* Only lables should ever begin in colunm zero. */
178 #define ASM_STABS_OP "\t.stabs"
179 #define ASM_STABN_OP "\t.stabn"
181 /* GDB always assumes the current function's frame begins at the value
182 of the stack pointer upon entry to the current function. Accessing
183 local variables and parameters passed on the stack is done using the
184 base of the frame + an offset provided by GCC.
186 For functions which have frame pointers this method works fine;
187 the (frame pointer) == (stack pointer at function entry) and GCC provides
188 an offset relative to the frame pointer.
190 This loses for functions without a frame pointer; GCC provides an offset
191 which is relative to the stack pointer after adjusting for the function's
192 frame size. GDB would prefer the offset to be relative to the value of
193 the stack pointer at the function's entry. Yuk! */
194 #define DEBUGGER_AUTO_OFFSET(X) \
195 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
196 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
198 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
199 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
200 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
202 /* gdb needs a null N_SO at the end of each file for scattered loading. */
204 #undef DBX_OUTPUT_MAIN_SOURCE_FILE_END
205 #define DBX_OUTPUT_MAIN_SOURCE_FILE_END(FILE, FILENAME) \
207 "%s\n\t.stabs \"%s\",%d,0,0,L$text_end\nL$text_end:\n",\
208 TEXT_SECTION_ASM_OP, "" , N_SO)
210 #if (TARGET_DEFAULT & 1) == 0
211 #define CPP_SPEC "%{msnake:-D__hp9000s700 -D_PA_RISC1_1}\
212 %{mpa-risc-1-1:-D__hp9000s700 -D_PA_RISC1_1}"
214 #define CPP_SPEC "%{!mpa-risc-1-0:%{!mnosnake:-D__hp9000s700 -D_PA_RISC1_1}}"
217 /* Defines for a K&R CC */
219 #define CC1_SPEC "%{pg:} %{p:}"
221 #define LINK_SPEC "%{!shared:-u main} %{shared:-b}"
223 /* Allow $ in identifiers. */
224 #define DOLLARS_IN_IDENTIFIERS 2
226 /* Make gcc agree with <machine/ansi.h> */
228 #define SIZE_TYPE "unsigned int"
229 #define PTRDIFF_TYPE "int"
230 #define WCHAR_TYPE "unsigned int"
231 #define WCHAR_TYPE_SIZE 32
233 /* Show we can debug even without a frame pointer. */
234 #define CAN_DEBUG_WITHOUT_FP
236 /* Names to predefine in the preprocessor for this target machine. */
238 #define CPP_PREDEFINES "-Dhppa -Dhp9000s800 -D__hp9000s800 -Dhp9k8 -Dunix -D_HPUX_SOURCE -Dhp9000 -Dhp800 -Dspectrum -DREVARGV -Asystem(unix) -Asystem(bsd) -Acpu(hppa) -Amachine(hppa)"
240 /* HPUX has a program 'chatr' to list the dependencies of dynamically
241 linked executables and shared libraries. */
242 #define LDD_SUFFIX "chatr"
243 /* look for lines like "dynamic /usr/lib/X11R5/libX11.sl". */
244 #define PARSE_LDD_OUTPUT(PTR) \
246 while (*PTR == ' ') PTR++; \
247 if (strncmp (PTR, "dynamic", sizeof ("dynamic") - 1) == 0) \
249 PTR += sizeof ("dynamic") - 1; \
250 while (*p == ' ') PTR++; \
256 /* target machine storage layout */
258 /* Define this if most significant bit is lowest numbered
259 in instructions that operate on numbered bit-fields. */
260 #define BITS_BIG_ENDIAN 1
262 /* Define this if most significant byte of a word is the lowest numbered. */
263 /* That is true on the HP-PA. */
264 #define BYTES_BIG_ENDIAN 1
266 /* Define this if most significant word of a multiword number is lowest
268 /* For the HP-PA we can decide arbitrarily
269 since there are no machine instructions for them. */
270 #define WORDS_BIG_ENDIAN 1
272 /* number of bits in an addressable storage unit */
273 #define BITS_PER_UNIT 8
275 /* Width in bits of a "word", which is the contents of a machine register.
276 Note that this is not necessarily the width of data type `int';
277 if using 16-bit ints on a 68000, this would still be 32.
278 But on a machine with 16-bit registers, this would be 16. */
279 #define BITS_PER_WORD 32
281 /* Width of a word, in units (bytes). */
282 #define UNITS_PER_WORD 4
284 /* Width in bits of a pointer.
285 See also the macro `Pmode' defined below. */
286 #define POINTER_SIZE 32
288 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
289 #define PARM_BOUNDARY 32
291 /* Largest alignment required for any stack parameter, in bits.
292 Don't define this if it is equal to PARM_BOUNDARY */
293 #define MAX_PARM_BOUNDARY 64
295 /* Boundary (in *bits*) on which stack pointer should be aligned. */
296 #define STACK_BOUNDARY 512
298 /* Allocation boundary (in *bits*) for the code of a function. */
299 #define FUNCTION_BOUNDARY 32
301 /* Alignment of field after `int : 0' in a structure. */
302 #define EMPTY_FIELD_BOUNDARY 32
304 /* Every structure's size must be a multiple of this. */
305 #define STRUCTURE_SIZE_BOUNDARY 8
307 /* A bitfield declared as `int' forces `int' alignment for the struct. */
308 #define PCC_BITFIELD_TYPE_MATTERS 1
310 /* No data type wants to be aligned rounder than this. */
311 #define BIGGEST_ALIGNMENT 64
313 /* The .align directive in the HP assembler allows up to a 32 alignment. */
314 #define MAX_OFILE_ALIGNMENT 32768
316 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
317 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
318 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
320 /* Make arrays of chars word-aligned for the same reasons. */
321 #define DATA_ALIGNMENT(TYPE, ALIGN) \
322 (TREE_CODE (TYPE) == ARRAY_TYPE \
323 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
324 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
327 /* Set this nonzero if move instructions will actually fail to work
328 when given unaligned data. */
329 #define STRICT_ALIGNMENT 1
331 /* Generate calls to memcpy, memcmp and memset. */
332 #define TARGET_MEM_FUNCTIONS
334 /* Standard register usage. */
336 /* Number of actual hardware registers.
337 The hardware registers are assigned numbers for the compiler
338 from 0 to just below FIRST_PSEUDO_REGISTER.
339 All registers that the compiler knows about must be given numbers,
340 even those that are not normally considered general registers.
342 HP-PA 1.0 has 32 fullword registers and 16 floating point
343 registers. The floating point registers hold either word or double
346 16 additional registers are reserved.
348 HP-PA 1.1 has 32 fullword registers and 32 floating point
349 registers. However, the floating point registers behave
350 differently: the left and right halves of registers are addressable
351 as 32 bit registers. So, we will set things up like the 68k which
352 has different fp units: define separate register sets for the 1.0
355 #define FIRST_PSEUDO_REGISTER 89 /* 32 general regs + 56 fp regs +
358 /* 1 for registers that have pervasive standard uses
359 and are not available for the register allocator.
361 On the HP-PA, these are:
362 Reg 0 = 0 (hardware). However, 0 is used for condition code,
364 Reg 1 = ADDIL target/Temporary (hardware).
365 Reg 2 = Return Pointer
366 Reg 3 = Frame Pointer
367 Reg 4 = Frame Pointer (>8k varying frame with HP compilers only)
368 Reg 4-18 = Preserved Registers
369 Reg 19 = Linkage Table Register in HPUX 8.0 shared library scheme.
370 Reg 20-22 = Temporary Registers
371 Reg 23-26 = Temporary/Parameter Registers
372 Reg 27 = Global Data Pointer (hp)
373 Reg 28 = Temporary/???/Return Value register
374 Reg 29 = Temporary/Static Chain/Return Value register #2
375 Reg 30 = stack pointer
376 Reg 31 = Temporary/Millicode Return Pointer (hp)
378 Freg 0-3 = Status Registers -- Not known to the compiler.
379 Freg 4-7 = Arguments/Return Value
380 Freg 8-11 = Temporary Registers
381 Freg 12-15 = Preserved Registers
383 Freg 16-31 = Reserved
385 On the Snake, fp regs are
387 Freg 0-3 = Status Registers -- Not known to the compiler.
388 Freg 4L-7R = Arguments/Return Value
389 Freg 8L-11R = Temporary Registers
390 Freg 12L-21R = Preserved Registers
391 Freg 22L-31R = Temporary Registers
395 #define FIXED_REGISTERS \
396 {0, 0, 0, 0, 0, 0, 0, 0, \
397 0, 0, 0, 0, 0, 0, 0, 0, \
398 0, 0, 0, 0, 0, 0, 0, 0, \
399 0, 0, 0, 1, 0, 0, 1, 0, \
401 0, 0, 0, 0, 0, 0, 0, 0, \
402 0, 0, 0, 0, 0, 0, 0, 0, \
403 0, 0, 0, 0, 0, 0, 0, 0, \
404 0, 0, 0, 0, 0, 0, 0, 0, \
405 0, 0, 0, 0, 0, 0, 0, 0, \
406 0, 0, 0, 0, 0, 0, 0, 0, \
407 0, 0, 0, 0, 0, 0, 0, 0, \
410 /* 1 for registers not available across function calls.
411 These must include the FIXED_REGISTERS and also any
412 registers that can be used without being saved.
413 The latter must include the registers where values are returned
414 and the register where structure-value addresses are passed.
415 Aside from that, you can include as many other registers as you like. */
416 #define CALL_USED_REGISTERS \
417 {1, 1, 1, 0, 0, 0, 0, 0, \
418 0, 0, 0, 0, 0, 0, 0, 0, \
419 0, 0, 0, 1, 1, 1, 1, 1, \
420 1, 1, 1, 1, 1, 1, 1, 1, \
422 1, 1, 1, 1, 1, 1, 1, 1, \
423 1, 1, 1, 1, 1, 1, 1, 1, \
424 0, 0, 0, 0, 0, 0, 0, 0, \
425 0, 0, 0, 0, 0, 0, 0, 0, \
426 0, 0, 0, 0, 1, 1, 1, 1, \
427 1, 1, 1, 1, 1, 1, 1, 1, \
428 1, 1, 1, 1, 1, 1, 1, 1, \
431 #define CONDITIONAL_REGISTER_USAGE \
435 for (i = 56; i < 88; i++) \
436 fixed_regs[i] = call_used_regs[i] = 1; \
437 for (i = 33; i < 88; i += 2) \
438 fixed_regs[i] = call_used_regs[i] = 1; \
440 else if (TARGET_DISABLE_FPREGS) \
442 for (i = 32; i < 88; i++) \
443 fixed_regs[i] = call_used_regs[i] = 1; \
446 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
449 /* Allocate the call used registers first. This should minimize
450 the number of registers that need to be saved (as call used
451 registers will generally not be allocated across a call).
453 Experimentation has shown slightly better results by allocating
454 FP registers first. */
456 #define REG_ALLOC_ORDER \
458 /* caller-saved fp regs. */ \
459 40, 41, 42, 43, 44, 45, 46, 47, \
460 68, 69, 70, 71, 72, 73, 74, 75, \
461 76, 77, 78, 79, 80, 81, 82, 83, \
463 32, 33, 34, 35, 36, 37, 38, 39, \
464 /* caller-saved general regs. */ \
465 19, 20, 21, 22, 23, 24, 25, 26, \
467 /* callee-saved fp regs. */ \
468 48, 49, 50, 51, 52, 53, 54, 55, \
469 56, 57, 58, 59, 60, 61, 62, 63, \
471 /* callee-saved general regs. */ \
472 3, 4, 5, 6, 7, 8, 9, 10, \
473 11, 12, 13, 14, 15, 16, 17, 18, \
474 /* special registers. */ \
478 /* True if register is floating-point. */
479 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 87)
481 /* Return number of consecutive hard regs needed starting at reg REGNO
482 to hold something of mode MODE.
483 This is ordinarily the length in words of a value of mode MODE
484 but can be less for certain modes in special long registers.
486 On the HP-PA, ordinary registers hold 32 bits worth;
487 The floating point registers are 64 bits wide. Snake fp regs are 32
489 #define HARD_REGNO_NREGS(REGNO, MODE) \
490 (!TARGET_SNAKE && FP_REGNO_P (REGNO) ? 1 \
491 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
493 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
494 On the HP-PA, the cpu registers can hold any mode. We
495 force this to be an even register is it cannot hold the full mode. */
496 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
497 ((REGNO) == 0 ? (MODE) == CCmode || (MODE) == CCFPmode \
498 /* On 1.0 machines, don't allow wide non-fp modes in fp regs. */ \
499 : !TARGET_SNAKE && FP_REGNO_P (REGNO) \
500 ? GET_MODE_SIZE (MODE) <= 4 || GET_MODE_CLASS (MODE) == MODE_FLOAT \
501 /* Make wide modes be in aligned registers. */ \
502 : GET_MODE_SIZE (MODE) <= 4 || ((REGNO) & 1) == 0)
504 /* Value is 1 if it is a good idea to tie two pseudo registers
505 when one has mode MODE1 and one has mode MODE2.
506 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
507 for any hard reg, then this must be 0 for correct output. */
508 #define MODES_TIEABLE_P(MODE1, MODE2) \
509 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
511 /* Specify the registers used for certain standard purposes.
512 The values of these macros are register numbers. */
514 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
515 /* #define PC_REGNUM */
517 /* Register to use for pushing function arguments. */
518 #define STACK_POINTER_REGNUM 30
520 /* Base register for access to local variables of the function. */
521 #define FRAME_POINTER_REGNUM 3
523 /* Value should be nonzero if functions must have frame pointers. */
524 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
527 /* C statement to store the difference between the frame pointer
528 and the stack pointer values immediately after the function prologue.
530 Note, we always pretend that this is a leaf function because if
531 it's not, there's no point in trying to eliminate the
532 frame pointer. If it is a leaf function, we guessed right! */
533 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
534 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
536 /* Base register for access to arguments of the function. */
537 #define ARG_POINTER_REGNUM 3
539 /* Register in which static-chain is passed to a function. */
541 #define STATIC_CHAIN_REGNUM 29
543 /* Register which holds offset table for position-independent
546 #define PIC_OFFSET_TABLE_REGNUM 19
547 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
549 /* Initialize hppa_save_pic_table_rtx before RTL generation for
550 each function. We used to do this in FINALIZE_PIC, but FINALIZE_PIC
551 isn't always called for static inline functions. */
552 #define INIT_EXPANDERS hppa_save_pic_table_rtx = 0;
554 /* SOM ABI says that objects larger than 64 bits are returned in memory. */
555 #define DEFAULT_PCC_STRUCT_RETURN 0
556 #define RETURN_IN_MEMORY(TYPE) \
557 (int_size_in_bytes (TYPE) > 8 || TREE_ADDRESSABLE (TYPE))
559 /* Register in which address to store a structure value
560 is passed to a function. */
561 #define STRUCT_VALUE_REGNUM 28
563 /* Define the classes of registers for register constraints in the
564 machine description. Also define ranges of constants.
566 One of the classes must always be named ALL_REGS and include all hard regs.
567 If there is more than one class, another class must be named NO_REGS
568 and contain no registers.
570 The name GENERAL_REGS must be the name of a class (or an alias for
571 another name such as ALL_REGS). This is the class of registers
572 that is allowed by "g" or "r" in a register constraint.
573 Also, registers outside this class are allocated only when
574 instructions express preferences for them.
576 The classes must be numbered in nondecreasing order; that is,
577 a larger-numbered class must never be contained completely
578 in a smaller-numbered class.
580 For any two classes, it is very desirable that there be another
581 class that represents their union. */
583 /* The HP-PA has four kinds of registers: general regs, 1.0 fp regs,
584 1.1 fp regs, and the high 1.1 fp regs, to which the operands of
585 fmpyadd and fmpysub are restricted. */
587 enum reg_class { NO_REGS, R1_REGS, GENERAL_REGS, FP_REGS, GENERAL_OR_FP_REGS,
588 SHIFT_REGS, ALL_REGS, LIM_REG_CLASSES};
590 #define N_REG_CLASSES (int) LIM_REG_CLASSES
592 /* Give names of register classes as strings for dump file. */
594 #define REG_CLASS_NAMES \
595 {"NO_REGS", "R1_REGS", "GENERAL_REGS", "FP_REGS", \
596 "GENERAL_OR_FP_REGS", "SHIFT_REGS", "ALL_REGS"}
598 /* Define which registers fit in which classes.
599 This is an initializer for a vector of HARD_REG_SET
600 of length N_REG_CLASSES. Register 0, the "condition code" register,
603 #define REG_CLASS_CONTENTS \
604 {{0x00000000, 0x00000000, 0x00000000}, /* NO_REGS */ \
605 {0x00000002, 0x00000000, 0x00000000}, /* R1_REGS */ \
606 {0xfffffffe, 0x00000000, 0x00000000}, /* GENERAL_REGS */ \
607 {0x00000000, 0xffffffff, 0x00ffffff}, /* FP_REGS */ \
608 {0xfffffffe, 0xffffffff, 0x00ffffff}, /* GENERAL_OR_FP_REGS */ \
609 {0x00000000, 0x00000000, 0x01000000}, /* SHIFT_REGS */ \
610 {0xfffffffe, 0xffffffff, 0x01ffffff}} /* ALL_REGS */
612 /* The same information, inverted:
613 Return the class number of the smallest class containing
614 reg number REGNO. This could be a conditional expression
615 or could index an array. */
617 #define REGNO_REG_CLASS(REGNO) \
618 ((REGNO) == 0 ? NO_REGS \
619 : (REGNO) == 1 ? R1_REGS \
620 : (REGNO) < 32 ? GENERAL_REGS \
621 : (REGNO) < 88 ? FP_REGS \
624 /* The class value for index registers, and the one for base regs. */
625 #define INDEX_REG_CLASS GENERAL_REGS
626 #define BASE_REG_CLASS GENERAL_REGS
628 #define FP_REG_CLASS_P(CLASS) \
631 /* Get reg_class from a letter such as appears in the machine description. */
632 /* Keep 'x' for backward compatibility with user asm. */
633 #define REG_CLASS_FROM_LETTER(C) \
634 ((C) == 'f' ? FP_REGS : \
635 (C) == 'x' ? FP_REGS : \
636 (C) == 'q' ? SHIFT_REGS : \
637 (C) == 'a' ? R1_REGS : \
638 (C) == 'Z' ? ALL_REGS : NO_REGS)
640 /* The letters I, J, K, L and M in a register constraint string
641 can be used to stand for particular ranges of immediate operands.
642 This macro defines what the ranges are.
643 C is the letter, and VALUE is a constant value.
644 Return 1 if VALUE is in the range specified by C.
646 `I' is used for the 11 bit constants.
647 `J' is used for the 14 bit constants.
648 `K' is used for values that can be moved with a zdepi insn.
649 `L' is used for the 5 bit constants.
651 `N' is used for values with the least significant 11 bits equal to zero.
652 `O' is used for numbers n such that n+1 is a power of 2.
655 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
656 ((C) == 'I' ? VAL_11_BITS_P (VALUE) \
657 : (C) == 'J' ? VAL_14_BITS_P (VALUE) \
658 : (C) == 'K' ? zdepi_cint_p (VALUE) \
659 : (C) == 'L' ? VAL_5_BITS_P (VALUE) \
660 : (C) == 'M' ? (VALUE) == 0 \
661 : (C) == 'N' ? ((VALUE) & 0x7ff) == 0 \
662 : (C) == 'O' ? (((VALUE) & ((VALUE) + 1)) == 0) \
663 : (C) == 'P' ? and_mask_p (VALUE) \
666 /* Similar, but for floating or large integer constants, and defining letters
667 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
669 For PA, `G' is the floating-point constant zero. `H' is undefined. */
671 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
672 ((C) == 'G' ? (GET_MODE_CLASS (GET_MODE (VALUE)) == MODE_FLOAT \
673 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
676 /* Given an rtx X being reloaded into a reg required to be
677 in class CLASS, return the class of reg to actually use.
678 In general this is just CLASS; but on some machines
679 in some cases it is preferable to use a more restrictive class. */
680 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
682 /* Return the register class of a scratch register needed to copy IN into
683 or out of a register in CLASS in MODE. If it can be done directly,
684 NO_REGS is returned. */
686 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
687 secondary_reload_class (CLASS, MODE, IN)
689 /* On the PA it is not possible to directly move data between
690 GENERAL_REGS and FP_REGS. */
691 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
692 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
694 /* Return the stack location to use for secondary memory needed reloads. */
695 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
696 gen_rtx (MEM, MODE, gen_rtx (PLUS, Pmode, stack_pointer_rtx, GEN_INT (-16)))
698 /* Return the maximum number of consecutive registers
699 needed to represent mode MODE in a register of class CLASS. */
700 #define CLASS_MAX_NREGS(CLASS, MODE) \
701 (!TARGET_SNAKE && (CLASS) == FP_REGS ? 1 : \
702 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
704 /* Stack layout; function entry, exit and calling. */
706 /* Define this if pushing a word on the stack
707 makes the stack pointer a smaller address. */
708 /* #define STACK_GROWS_DOWNWARD */
710 /* Believe it or not. */
711 #define ARGS_GROW_DOWNWARD
713 /* Define this if the nominal address of the stack frame
714 is at the high-address end of the local variables;
715 that is, each additional local variable allocated
716 goes at a more negative offset in the frame. */
717 /* #define FRAME_GROWS_DOWNWARD */
719 /* Offset within stack frame to start allocating local variables at.
720 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
721 first local allocated. Otherwise, it is the offset to the BEGINNING
722 of the first local allocated. */
723 #define STARTING_FRAME_OFFSET 8
725 /* If we generate an insn to push BYTES bytes,
726 this says how many the stack pointer really advances by.
727 On the HP-PA, don't define this because there are no push insns. */
728 /* #define PUSH_ROUNDING(BYTES) */
730 /* Offset of first parameter from the argument pointer register value.
731 This value will be negated because the arguments grow down.
732 Also note that on STACK_GROWS_UPWARD machines (such as this one)
733 this is the distance from the frame pointer to the end of the first
734 argument, not it's beginning. To get the real offset of the first
735 argument, the size of the argument must be added.
737 ??? Have to check on this.*/
739 #define FIRST_PARM_OFFSET(FNDECL) -32
741 /* Absolute value of offset from top-of-stack address to location to store the
742 function parameter if it can't go in a register.
743 Addresses for following parameters are computed relative to this one. */
744 #define FIRST_PARM_CALLER_OFFSET(FNDECL) -32
747 /* When a parameter is passed in a register, stack space is still
749 #define REG_PARM_STACK_SPACE(DECL) 16
751 /* Define this if the above stack space is to be considered part of the
752 space allocated by the caller. */
753 #define OUTGOING_REG_PARM_STACK_SPACE
755 /* Keep the stack pointer constant throughout the function.
756 This is both an optimization and a necessity: longjmp
757 doesn't behave itself when the stack pointer moves within
759 #define ACCUMULATE_OUTGOING_ARGS
761 /* The weird HPPA calling conventions require a minimum of 48 bytes on
762 the stack: 16 bytes for register saves, and 32 bytes for magic.
763 This is the difference between the logical top of stack and the
765 #define STACK_POINTER_OFFSET -32
767 #define STACK_DYNAMIC_OFFSET(FNDECL) \
768 ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size)
770 /* Value is 1 if returning from a function call automatically
771 pops the arguments described by the number-of-args field in the call.
772 FUNTYPE is the data type of the function (as a tree),
773 or for a library call it is an identifier node for the subroutine name. */
775 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) 0
777 /* Define how to find the value returned by a function.
778 VALTYPE is the data type of the value (as a tree).
779 If the precise function being called is known, FUNC is its FUNCTION_DECL;
780 otherwise, FUNC is 0. */
782 /* On the HP-PA the value is found in register(s) 28(-29), unless
783 the mode is SF or DF. Then the value is returned in fr4 (32, ) */
786 #define FUNCTION_VALUE(VALTYPE, FUNC) \
787 gen_rtx (REG, TYPE_MODE (VALTYPE), ((TYPE_MODE (VALTYPE) == SFmode || \
788 TYPE_MODE (VALTYPE) == DFmode) ? \
791 /* Define how to find the value returned by a library function
792 assuming the value has mode MODE. */
794 #define LIBCALL_VALUE(MODE) \
795 gen_rtx (REG, MODE, ((MODE) == SFmode || (MODE) == DFmode ? 32 : 28))
797 /* 1 if N is a possible register number for a function value
798 as seen by the caller. */
800 #define FUNCTION_VALUE_REGNO_P(N) \
801 ((N) == 28 || (N) == 32)
803 /* 1 if N is a possible register number for function argument passing. */
805 #define FUNCTION_ARG_REGNO_P(N) \
806 (((N) >= 23 && (N) <= 26) || ((N) >= 32 && (N) <= 39))
808 /* Define a data type for recording info about an argument list
809 during the scan of that argument list. This data type should
810 hold all necessary information about the function itself
811 and about the args processed so far, enough to enable macros
812 such as FUNCTION_ARG to determine where the next arg should go.
814 On the HP-PA, this is a single integer, which is a number of words
815 of arguments scanned so far (including the invisible argument,
816 if any, which holds the structure-value-address).
817 Thus 4 or more means all following args should go on the stack. */
819 struct hppa_args {int words, nargs_prototype; };
821 #define CUMULATIVE_ARGS struct hppa_args
823 /* Initialize a variable CUM of type CUMULATIVE_ARGS
824 for a call to a function whose data type is FNTYPE.
825 For a library call, FNTYPE is 0. */
827 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
829 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
830 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
831 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
832 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
837 /* Similar, but when scanning the definition of a procedure. We always
838 set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
840 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
842 (CUM).nargs_prototype = 1000
844 /* Figure out the size in words of the function argument. */
846 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
847 ((((MODE) != BLKmode ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE))+3)/4)
849 /* Update the data in CUM to advance over an argument
850 of mode MODE and data type TYPE.
851 (TYPE is null for libcalls where that information may not be available.) */
853 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
854 { (CUM).nargs_prototype--; \
855 ((((CUM).words & 01) && (TYPE) != 0 \
856 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1) \
858 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE); \
861 /* Determine where to put an argument to a function.
862 Value is zero to push the argument on the stack,
863 or a hard register in which to store the argument.
865 MODE is the argument's machine mode.
866 TYPE is the data type of the argument (as a tree).
867 This is null for libcalls where that information may
869 CUM is a variable of type CUMULATIVE_ARGS which gives info about
870 the preceding args and about the function being called.
871 NAMED is nonzero if this argument is a named parameter
872 (otherwise it is an extra parameter matching an ellipsis).
874 On the HP-PA the first four words of args are normally in registers
875 and the rest are pushed. But any arg that won't entirely fit in regs
878 Arguments passed in registers are either 1 or 2 words long.
880 The caller must make a distinction between calls to explicitly named
881 functions and calls through pointers to functions -- the conventions
882 are different! Calls through pointers to functions only use general
883 registers for the first four argument words.
885 Of course all this is different for the portable runtime model
886 HP wants everyone to use for ELF. Ugh. Here's a quick description
887 of how it's supposed to work.
889 1) callee side remains unchanged. It expects integer args to be
890 in the integer registers, float args in the float registers and
891 unnamed args in integer registers.
893 2) caller side now depends on if the function being called has
894 a prototype in scope (rather than if it's being called indirectly).
896 2a) If there is a prototype in scope, then arguments are passed
897 according to their type (ints in integer registers, floats in float
898 registers, unnamed args in integer registers.
900 2b) If there is no prototype in scope, then floating point arguments
901 are passed in both integer and float registers. egad.
903 FYI: The portable parameter passing conventions are almost exactly like
904 the standard parameter passing conventions on the RS6000. That's why
905 you'll see lots of similar code in rs6000.h. */
907 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
909 /* Do not expect to understand this without reading it several times. I'm
910 tempted to try and simply it, but I worry about breaking something. */
912 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
913 (4 >= ((CUM).words + FUNCTION_ARG_SIZE ((MODE), (TYPE))) \
914 ? (!TARGET_PORTABLE_RUNTIME || (TYPE) == 0 \
915 || !FLOAT_MODE_P (MODE) || (CUM).nargs_prototype > 0) \
916 ? gen_rtx (REG, (MODE), \
917 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
918 ? (((!current_call_is_indirect \
919 || TARGET_PORTABLE_RUNTIME) \
920 && (MODE) == DFmode) \
921 ? ((CUM).words ? 38 : 34) \
922 : ((CUM).words ? 23 : 25)) \
923 : (((!current_call_is_indirect \
924 || TARGET_PORTABLE_RUNTIME) \
925 && (MODE) == SFmode) \
926 ? (32 + 2 * (CUM).words) \
927 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE), \
929 /* We are calling a non-prototyped function with floating point \
930 arguments using the portable conventions. */ \
931 : gen_rtx (EXPR_LIST, VOIDmode, \
932 gen_rtx (REG, (MODE), \
933 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
934 ? ((CUM).words ? 38 : 34) \
935 : (32 + 2 * (CUM).words))), \
936 gen_rtx (REG, (MODE), \
937 (FUNCTION_ARG_SIZE ((MODE), (TYPE)) > 1 \
938 ? ((CUM).words ? 23 : 25) \
939 : (27 - (CUM).words - FUNCTION_ARG_SIZE ((MODE),\
941 /* Pass this parameter in the stack. */ \
944 /* For an arg passed partly in registers and partly in memory,
945 this is the number of registers used.
946 For args passed entirely in registers or entirely in memory, zero. */
948 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
950 /* If defined, a C expression that gives the alignment boundary, in
951 bits, of an argument with the specified mode and type. If it is
952 not defined, `PARM_BOUNDARY' is used for all arguments. */
954 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
956 ? (((int_size_in_bytes (TYPE)) + 3) / 4) * BITS_PER_WORD \
957 : ((GET_MODE_ALIGNMENT(MODE) <= PARM_BOUNDARY) \
959 : GET_MODE_ALIGNMENT(MODE)))
961 /* Arguments larger than eight bytes are passed by invisible reference */
963 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
964 ((TYPE) && int_size_in_bytes (TYPE) > 8)
966 extern struct rtx_def *hppa_compare_op0, *hppa_compare_op1;
967 extern enum cmp_type hppa_branch_type;
969 /* Output the label for a function definition. */
970 #ifndef HP_FP_ARG_DESCRIPTOR_REVERSED
971 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
972 do { fprintf (FILE, ",ARGW%d=FR", (ARG0)); \
973 fprintf (FILE, ",ARGW%d=FU", (ARG1));} while (0)
975 #define ASM_DOUBLE_ARG_DESCRIPTORS(FILE, ARG0, ARG1) \
976 do { fprintf (FILE, ",ARGW%d=FU", (ARG0)); \
977 fprintf (FILE, ",ARGW%d=FR", (ARG1));} while (0)
980 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
981 do { tree fntype = TREE_TYPE (TREE_TYPE (DECL)); \
982 tree tree_type = TREE_TYPE (DECL); \
985 if (TREE_PUBLIC (DECL) || TARGET_GAS) \
986 { extern int current_function_varargs; \
987 if (TREE_PUBLIC (DECL)) \
989 fputs ("\t.EXPORT ", FILE); \
990 assemble_name (FILE, NAME); \
991 fputs (",ENTRY,PRIV_LEV=3", FILE); \
995 fputs ("\t.PARAM ", FILE); \
996 assemble_name (FILE, NAME); \
998 if (TARGET_PORTABLE_RUNTIME) \
1000 fputs (",ARGW0=NO,ARGW1=NO,ARGW2=NO,ARGW3=NO,", FILE); \
1001 fputs ("RTNVAL=NO\n", FILE); \
1004 for (parm = DECL_ARGUMENTS (DECL), i = 0; parm && i < 4; \
1005 parm = TREE_CHAIN (parm)) \
1007 if (TYPE_MODE (DECL_ARG_TYPE (parm)) == SFmode) \
1008 fprintf (FILE, ",ARGW%d=FR", i++); \
1009 else if (TYPE_MODE (DECL_ARG_TYPE (parm)) == DFmode) \
1014 ASM_DOUBLE_ARG_DESCRIPTORS (FILE, i++, i++); \
1022 FUNCTION_ARG_SIZE (TYPE_MODE (DECL_ARG_TYPE (parm)),\
1023 DECL_ARG_TYPE (parm)); \
1024 if (arg_size == 2 && i <= 2) \
1027 fprintf (FILE, ",ARGW%d=GR", i++); \
1028 fprintf (FILE, ",ARGW%d=GR", i++); \
1030 else if (arg_size == 1) \
1031 fprintf (FILE, ",ARGW%d=GR", i++); \
1036 /* anonymous args */ \
1037 if ((TYPE_ARG_TYPES (tree_type) != 0 \
1038 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (tree_type)))\
1039 != void_type_node)) \
1040 || current_function_varargs) \
1042 for (; i < 4; i++) \
1043 fprintf (FILE, ",ARGW%d=GR", i); \
1045 if (TYPE_MODE (fntype) == DFmode) \
1046 fprintf (FILE, ",RTNVAL=FR"); \
1047 else if (TYPE_MODE (fntype) == SFmode) \
1048 fprintf (FILE, ",RTNVAL=FU"); \
1049 else if (fntype != void_type_node) \
1050 fprintf (FILE, ",RTNVAL=GR"); \
1051 fputs ("\n", FILE); \
1054 /* This macro generates the assembly code for function entry.
1055 FILE is a stdio stream to output the code to.
1056 SIZE is an int: how many units of temporary storage to allocate.
1057 Refer to the array `regs_ever_live' to determine which registers
1058 to save; `regs_ever_live[I]' is nonzero if register number I
1059 is ever used in the function. This macro is responsible for
1060 knowing which registers should not be saved even if used. */
1062 /* On HP-PA, move-double insns between fpu and cpu need an 8-byte block
1063 of memory. If any fpu reg is used in the function, we allocate
1064 such a block here, at the bottom of the frame, just in case it's needed.
1066 If this function is a leaf procedure, then we may choose not
1067 to do a "save" insn. The decision about whether or not
1068 to do this is made in regclass.c. */
1070 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1071 output_function_prologue (FILE, SIZE)
1073 /* Output assembler code to FILE to increment profiler label # LABELNO
1074 for profiling a function entry.
1076 Because HPUX _mcount is so different, we actually emit the
1077 profiling code in function_prologue. This just stores LABELNO for
1080 #define PROFILE_BEFORE_PROLOGUE
1081 #define FUNCTION_PROFILER(FILE, LABELNO) \
1082 { extern int hp_profile_labelno; hp_profile_labelno = (LABELNO);}
1084 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1085 the stack pointer does not matter. The value is tested only in
1086 functions that have frame pointers.
1087 No definition is equivalent to always zero. */
1089 extern int may_call_alloca;
1090 extern int current_function_pretend_args_size;
1092 #define EXIT_IGNORE_STACK \
1093 (get_frame_size () != 0 \
1094 || current_function_calls_alloca || current_function_outgoing_args_size)
1097 /* This macro generates the assembly code for function exit,
1098 on machines that need it. If FUNCTION_EPILOGUE is not defined
1099 then individual return instructions are generated for each
1100 return statement. Args are same as for FUNCTION_PROLOGUE.
1102 The function epilogue should not depend on the current stack pointer!
1103 It should use the frame pointer only. This is mandatory because
1104 of alloca; we also take advantage of it to omit stack adjustments
1105 before returning. */
1107 /* This declaration is needed due to traditional/ANSI
1108 incompatibilities which cannot be #ifdefed away
1109 because they occur inside of macros. Sigh. */
1110 extern union tree_node *current_function_decl;
1112 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1113 output_function_epilogue (FILE, SIZE)
1115 /* Output assembler code for a block containing the constant parts
1116 of a trampoline, leaving space for the variable parts.\
1118 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
1119 and then branches to the specified routine.
1121 This code template is copied from text segment to stack location
1122 and then patched with INITIALIZE_TRAMPOLINE to contain
1123 valid values, and then entered as a subroutine.
1125 It is best to keep this as small as possible to avoid having to
1126 flush multiple lines in the cache. */
1128 #define TRAMPOLINE_TEMPLATE(FILE) \
1130 fprintf (FILE, "\tldw 36(0,%%r22),%%r21\n"); \
1131 fprintf (FILE, "\tbb,>=,n %%r21,30,.+16\n"); \
1132 fprintf (FILE, "\tdepi 0,31,2,%%r21\n"); \
1133 fprintf (FILE, "\tldw 4(0,%%r21),%%r19\n"); \
1134 fprintf (FILE, "\tldw 0(0,%%r21),%%r21\n"); \
1135 fprintf (FILE, "\tldsid (0,%%r21),%%r1\n"); \
1136 fprintf (FILE, "\tmtsp %%r1,%%sr0\n"); \
1137 fprintf (FILE, "\tbe 0(%%sr0,%%r21)\n"); \
1138 fprintf (FILE, "\tldw 40(0,%%r22),%%r29\n"); \
1139 fprintf (FILE, "\t.word 0\n"); \
1140 fprintf (FILE, "\t.word 0\n"); \
1143 /* Length in units of the trampoline for entering a nested function.
1145 Flush the cache entries corresponding to the first and last addresses
1146 of the trampoline. This is necessary as the trampoline may cross two
1149 If the code part of the trampoline ever grows to > 32 bytes, then it
1150 will become necessary to hack on the cacheflush pattern in pa.md. */
1152 #define TRAMPOLINE_SIZE (11 * 4)
1154 /* Emit RTL insns to initialize the variable parts of a trampoline.
1155 FNADDR is an RTX for the address of the function's pure code.
1156 CXT is an RTX for the static chain value for the function.
1158 Move the function address to the trampoline template at offset 12.
1159 Move the static chain value to trampoline template at offset 16. */
1161 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1163 rtx start_addr, end_addr; \
1165 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1166 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (FNADDR)); \
1167 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1168 emit_move_insn (gen_rtx (MEM, Pmode, start_addr), (CXT)); \
1169 /* fdc and fic only use registers for the address to flush, \
1170 they do not accept integer displacements. */ \
1171 start_addr = force_reg (SImode, (TRAMP)); \
1172 end_addr = force_reg (SImode, plus_constant ((TRAMP), 32)); \
1173 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1174 end_addr = force_reg (SImode, plus_constant (start_addr, 32)); \
1175 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1176 gen_reg_rtx (SImode), gen_reg_rtx (SImode)));\
1179 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1180 reference the 4 integer arg registers and 4 fp arg registers.
1181 Ordinarily they are not call used registers, but they are for
1182 _builtin_saveregs, so we must make this explicit. */
1184 #define EXPAND_BUILTIN_SAVEREGS(ARGLIST) (rtx)hppa_builtin_saveregs (ARGLIST)
1187 /* Addressing modes, and classification of registers for them. */
1189 #define HAVE_POST_INCREMENT
1190 #define HAVE_POST_DECREMENT
1192 #define HAVE_PRE_DECREMENT
1193 #define HAVE_PRE_INCREMENT
1195 /* Macros to check register numbers against specific register classes. */
1197 /* These assume that REGNO is a hard or pseudo reg number.
1198 They give nonzero only if REGNO is a hard reg of the suitable class
1199 or a pseudo reg currently allocated to a suitable hard reg.
1200 Since they use reg_renumber, they are safe only once reg_renumber
1201 has been allocated, which happens in local-alloc.c. */
1203 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1204 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1205 #define REGNO_OK_FOR_BASE_P(REGNO) \
1206 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1207 #define REGNO_OK_FOR_FP_P(REGNO) \
1208 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1210 /* Now macros that check whether X is a register and also,
1211 strictly, whether it is in a specified class.
1213 These macros are specific to the the HP-PA, and may be used only
1214 in code for printing assembler insns and in conditions for
1215 define_optimization. */
1217 /* 1 if X is an fp register. */
1219 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1221 /* Maximum number of registers that can appear in a valid memory address. */
1223 #define MAX_REGS_PER_ADDRESS 2
1225 /* Recognize any constant value that is a valid address except
1226 for symbolic addresses. We get better CSE by rejecting them
1227 here and allowing hppa_legitimize_address to break them up. We
1228 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1230 #define CONSTANT_ADDRESS_P(X) \
1231 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1232 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1233 || GET_CODE (X) == HIGH) \
1234 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1236 /* Include all constant integers and constant doubles, but not
1237 floating-point, except for floating-point zero. */
1239 #define LEGITIMATE_CONSTANT_P(X) \
1240 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1241 || (X) == CONST0_RTX (GET_MODE (X))) \
1242 && !(flag_pic && function_label_operand (X, VOIDmode)))
1244 /* Subroutine for EXTRA_CONSTRAINT.
1246 Return 1 iff OP is a pseudo which did not get a hard register and
1247 we are running the reload pass. */
1249 #define IS_RELOADING_PSEUDO_P(OP) \
1250 ((reload_in_progress \
1251 && GET_CODE (OP) == REG \
1252 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1253 && reg_renumber [REGNO (OP)] < 0))
1255 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1257 For the HPPA, `Q' means that this is a memory operand but not a
1258 symbolic memory operand. Note that an unassigned pseudo register
1259 is such a memory operand. Needed because reload will generate
1260 these things in insns and then not re-recognize the insns, causing
1261 constrain_operands to fail.
1263 Also note `Q' accepts any memory operand during the reload pass.
1264 This includes out-of-range displacements in reg+d addressing.
1265 This makes for better code. (??? For 2.5 address this issue).
1271 `T' is for fp loads and stores. */
1272 #define EXTRA_CONSTRAINT(OP, C) \
1274 (IS_RELOADING_PSEUDO_P (OP) \
1275 || (GET_CODE (OP) == MEM \
1276 && reload_in_progress) \
1277 || (GET_CODE (OP) == MEM \
1278 && memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1279 && ! symbolic_memory_operand (OP, VOIDmode))) \
1281 (GET_CODE (OP) == MEM \
1282 /* Using DFmode forces only short displacements \
1283 to be recognized as valid in reg+d addresses. */\
1284 && memory_address_p (DFmode, XEXP (OP, 0))) : 0))
1286 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1287 and check its validity for a certain class.
1288 We have two alternate definitions for each of them.
1289 The usual definition accepts all pseudo regs; the other rejects
1290 them unless they have been allocated suitable hard regs.
1291 The symbol REG_OK_STRICT causes the latter definition to be used.
1293 Most source files want to accept pseudo regs in the hope that
1294 they will get allocated to the class that the insn wants them to be in.
1295 Source files for reload pass need to be strict.
1296 After reload, it makes no difference, since pseudo regs have
1297 been eliminated by then. */
1299 #ifndef REG_OK_STRICT
1301 /* Nonzero if X is a hard reg that can be used as an index
1302 or if it is a pseudo reg. */
1303 #define REG_OK_FOR_INDEX_P(X) \
1304 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1305 /* Nonzero if X is a hard reg that can be used as a base reg
1306 or if it is a pseudo reg. */
1307 #define REG_OK_FOR_BASE_P(X) \
1308 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1312 /* Nonzero if X is a hard reg that can be used as an index. */
1313 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1314 /* Nonzero if X is a hard reg that can be used as a base reg. */
1315 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1319 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1320 that is a valid memory address for an instruction.
1321 The MODE argument is the machine mode for the MEM expression
1322 that wants to use this address.
1324 On the HP-PA, the actual legitimate addresses must be
1325 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1326 But we can treat a SYMBOL_REF as legitimate if it is part of this
1327 function's constant-pool, because such addresses can actually
1328 be output as REG+SMALLINT.
1330 Note we only allow 5 bit immediates for access to a constant address;
1331 doing so avoids losing for loading/storing a FP register at an address
1332 which will not fit in 5 bits. */
1334 #define VAL_5_BITS_P(X) ((unsigned)(X) + 0x10 < 0x20)
1335 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1337 #define VAL_U5_BITS_P(X) ((unsigned)(X) < 0x20)
1338 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1340 #define VAL_11_BITS_P(X) ((unsigned)(X) + 0x400 < 0x800)
1341 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1343 #define VAL_14_BITS_P(X) ((unsigned)(X) + 0x2000 < 0x4000)
1344 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1346 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1348 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1349 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1350 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1351 && REG_P (XEXP (X, 0)) \
1352 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1354 else if (GET_CODE (X) == PLUS) \
1356 rtx base = 0, index; \
1357 if (flag_pic && XEXP (X, 0) == pic_offset_table_rtx)\
1359 if (GET_CODE (XEXP (X, 1)) == REG \
1360 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1362 else if (flag_pic == 1 \
1363 && GET_CODE (XEXP (X, 1)) == SYMBOL_REF)\
1366 else if (REG_P (XEXP (X, 0)) \
1367 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1368 base = XEXP (X, 0), index = XEXP (X, 1); \
1369 else if (REG_P (XEXP (X, 1)) \
1370 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1371 base = XEXP (X, 1), index = XEXP (X, 0); \
1373 if (GET_CODE (index) == CONST_INT \
1374 && ((INT_14_BITS (index) && (MODE) != SFmode && (MODE) != DFmode) \
1375 || INT_5_BITS (index))) \
1378 else if (GET_CODE (X) == LO_SUM \
1379 && GET_CODE (XEXP (X, 0)) == REG \
1380 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1381 && CONSTANT_P (XEXP (X, 1)) \
1382 && (MODE) != SFmode \
1383 && (MODE) != DFmode) \
1385 else if (GET_CODE (X) == LO_SUM \
1386 && GET_CODE (XEXP (X, 0)) == SUBREG \
1387 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1388 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1389 && CONSTANT_P (XEXP (X, 1)) \
1390 && (MODE) != SFmode \
1391 && (MODE) != DFmode) \
1393 else if (GET_CODE (X) == LABEL_REF \
1394 || (GET_CODE (X) == CONST_INT \
1395 && INT_5_BITS (X))) \
1397 /* Needed for -fPIC */ \
1398 else if (GET_CODE (X) == LO_SUM \
1399 && GET_CODE (XEXP (X, 0)) == REG \
1400 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1401 && GET_CODE (XEXP (X, 1)) == UNSPEC) \
1405 /* Try machine-dependent ways of modifying an illegitimate address
1406 to be legitimate. If we find one, return the new, valid address.
1407 This macro is used in only one place: `memory_address' in explow.c.
1409 OLDX is the address as it was before break_out_memory_refs was called.
1410 In some cases it is useful to look at this to decide what needs to be done.
1412 MODE and WIN are passed so that this macro can use
1413 GO_IF_LEGITIMATE_ADDRESS.
1415 It is always safe for this macro to do nothing. It exists to recognize
1416 opportunities to optimize the output. */
1418 extern struct rtx_def *hppa_legitimize_address ();
1419 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1420 { rtx orig_x = (X); \
1421 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1422 if ((X) != orig_x && memory_address_p (MODE, X)) \
1425 /* Go to LABEL if ADDR (a legitimate address expression)
1426 has an effect that depends on the machine mode it is used for. */
1428 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1429 if (GET_CODE (ADDR) == PRE_DEC \
1430 || GET_CODE (ADDR) == POST_DEC \
1431 || GET_CODE (ADDR) == PRE_INC \
1432 || GET_CODE (ADDR) == POST_INC) \
1435 /* Define this macro if references to a symbol must be treated
1436 differently depending on something about the variable or
1437 function named by the symbol (such as what section it is in).
1439 The macro definition, if any, is executed immediately after the
1440 rtl for DECL or other node is created.
1441 The value of the rtl will be a `mem' whose address is a
1444 The usual thing for this macro to do is to a flag in the
1445 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1446 name string in the `symbol_ref' (if one bit is not enough
1449 On the HP-PA we use this to indicate if a symbol is in text or
1450 data space. Also, function labels need special treatment. */
1452 #define TEXT_SPACE_P(DECL)\
1453 (TREE_CODE (DECL) == FUNCTION_DECL \
1454 || (TREE_CODE (DECL) == VAR_DECL \
1455 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1457 || (*tree_code_type[(int) TREE_CODE (DECL)] == 'c' \
1458 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1460 #define FUNCTION_NAME_P(NAME) \
1461 (*(NAME) == '@' || (*(NAME) == '*' && *((NAME) + 1) == '@'))
1463 #define ENCODE_SECTION_INFO(DECL)\
1465 { if (TEXT_SPACE_P (DECL)) \
1467 if (TREE_CODE (DECL) == FUNCTION_DECL \
1468 || TREE_CODE (DECL) == VAR_DECL) \
1469 _rtl = DECL_RTL (DECL); \
1471 _rtl = TREE_CST_RTL (DECL); \
1472 SYMBOL_REF_FLAG (XEXP (_rtl, 0)) = 1; \
1473 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1474 hppa_encode_label (XEXP (DECL_RTL (DECL), 0));\
1479 /* Store the user-specified part of SYMBOL_NAME in VAR.
1480 This is sort of inverse to ENCODE_SECTION_INFO. */
1482 #define STRIP_NAME_ENCODING(VAR,SYMBOL_NAME) \
1483 (VAR) = ((SYMBOL_NAME) + ((SYMBOL_NAME)[0] == '*' ? \
1484 1 + (SYMBOL_NAME)[1] == '@'\
1485 : (SYMBOL_NAME)[0] == '@'))
1487 /* Arghh. This is used for stuff in the constant pool; this may include
1488 function addresses on the PA, which during PIC code generation must
1489 reside in the data space. Unfortuantely, there's no way to determine
1490 if a particular label in the constant pool refers to a function address.
1491 So just force everything into the data space during PIC generation. */
1492 #define SELECT_RTX_SECTION(RTX,MODE) \
1496 readonly_data_section ();
1498 /* Specify the machine mode that this machine uses
1499 for the index in the tablejump instruction. */
1500 #define CASE_VECTOR_MODE DImode
1502 /* Define this if the tablejump instruction expects the table
1503 to contain offsets from the address of the table.
1504 Do not define this if the table should contain absolute addresses. */
1505 /* #define CASE_VECTOR_PC_RELATIVE */
1507 #define CASE_DROPS_THROUGH
1508 /* Specify the tree operation to be used to convert reals to integers. */
1509 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1511 /* This is the kind of divide that is easiest to do in the general case. */
1512 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1514 /* Define this as 1 if `char' should by default be signed; else as 0. */
1515 #define DEFAULT_SIGNED_CHAR 1
1517 /* Max number of bytes we can move from memory to memory
1518 in one reasonably fast instruction. */
1521 /* Define if operations between registers always perform the operation
1522 on the full register even if a narrower mode is specified. */
1523 #define WORD_REGISTER_OPERATIONS
1525 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1526 will either zero-extend or sign-extend. The value of this macro should
1527 be the code that says which one of the two operations is implicitly
1528 done, NIL if none. */
1529 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1531 /* Nonzero if access to memory by bytes is slow and undesirable. */
1532 #define SLOW_BYTE_ACCESS 1
1534 /* Do not break .stabs pseudos into continuations. */
1535 #define DBX_CONTIN_LENGTH 0
1537 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1538 is done just by pretending it is already truncated. */
1539 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1541 /* We assume that the store-condition-codes instructions store 0 for false
1542 and some other value for true. This is the value stored for true. */
1544 #define STORE_FLAG_VALUE 1
1546 /* When a prototype says `char' or `short', really pass an `int'. */
1547 #define PROMOTE_PROTOTYPES
1549 /* Specify the machine mode that pointers have.
1550 After generation of rtl, the compiler makes no further distinction
1551 between pointers and any other objects of this machine mode. */
1552 #define Pmode SImode
1554 /* Add any extra modes needed to represent the condition code.
1556 HPPA floating comparisons produce condition codes. */
1557 #define EXTRA_CC_MODES CCFPmode
1559 /* Define the names for the modes specified above. */
1560 #define EXTRA_CC_NAMES "CCFP"
1562 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1563 return the mode to be used for the comparison. For floating-point, CCFPmode
1564 should be used. CC_NOOVmode should be used when the first operand is a
1565 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1567 #define SELECT_CC_MODE(OP,X,Y) \
1568 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1570 /* A function address in a call instruction
1571 is a byte address (for indexing purposes)
1572 so give the MEM rtx a byte's mode. */
1573 #define FUNCTION_MODE SImode
1575 /* Define this if addresses of constant functions
1576 shouldn't be put through pseudo regs where they can be cse'd.
1577 Desirable on machines where ordinary constants are expensive
1578 but a CALL with constant address is cheap. */
1579 #define NO_FUNCTION_CSE
1581 /* Define this to be nonzero if shift instructions ignore all but the low-order
1583 #define SHIFT_COUNT_TRUNCATED 1
1585 /* Use atexit for static constructors/destructors, instead of defining
1586 our own exit function. */
1589 /* Compute the cost of computing a constant rtl expression RTX
1590 whose rtx-code is CODE. The body of this macro is a portion
1591 of a switch statement. If the code is computed here,
1592 return it with a return statement. Otherwise, break from the switch. */
1594 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1596 if (INTVAL (RTX) == 0) return 0; \
1597 if (INT_14_BITS (RTX)) return 1; \
1604 case CONST_DOUBLE: \
1605 if (RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)\
1606 && OUTER_CODE != SET) \
1611 #define ADDRESS_COST(RTX) \
1612 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1614 /* Compute extra cost of moving data between one register class
1617 Make moves from SAR so expensive they should never happen. We used to
1618 have 0xffff here, but that generates overflow in rare cases.
1620 Copies involving a FP register and a non-FP register are relatively
1621 expensive because they must go through memory.
1623 Other copies are reasonably cheap. */
1624 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1625 (CLASS1 == SHIFT_REGS ? 0x100 \
1626 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1627 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1631 /* Provide the costs of a rtl expression. This is in the body of a
1632 switch on CODE. The purpose for the cost of MULT is to encourage
1633 `synth_mult' to find a synthetic multiply when reasonable. */
1635 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1637 return TARGET_SNAKE && ! TARGET_DISABLE_FPREGS \
1638 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1643 return COSTS_N_INSNS (60); \
1645 if (GET_CODE (XEXP (X, 0)) == MULT \
1646 && shadd_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1647 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1648 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1651 /* Adjust the cost of dependencies. */
1653 #define ADJUST_COST(INSN,LINK,DEP,COST) \
1654 (COST) = pa_adjust_cost (INSN, LINK, DEP, COST)
1656 /* Handling the special cases is going to get too complicated for a macro,
1657 just call `pa_adjust_insn_length' to do the real work. */
1658 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1659 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1661 /* Enable a bug fix. (This is for extra caution.) */
1662 #define SHORTEN_WITH_ADJUST_INSN_LENGTH
1664 /* Millicode insns are actually function calls with some special
1665 constraints on arguments and register usage.
1667 Millicode calls always expect their arguments in the integer argument
1668 registers, and always return their result in %r29 (ret1). They
1669 are expected to clobber their arguments, %r1, %r29, and %r31 and
1672 These macros tell reorg that the references to arguments and
1673 register clobbers for millicode calls do not appear to happen
1674 until after the millicode call. This allows reorg to put insns
1675 which set the argument registers into the delay slot of the millicode
1676 call -- thus they act more like traditional CALL_INSNs.
1678 get_attr_type will try to recognize the given insn, so make sure to
1679 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1681 #define INSN_SETS_ARE_DELAYED(X) \
1682 ((GET_CODE (X) == INSN \
1683 && GET_CODE (PATTERN (X)) != SEQUENCE \
1684 && GET_CODE (PATTERN (X)) != USE \
1685 && GET_CODE (PATTERN (X)) != CLOBBER \
1686 && get_attr_type (X) == TYPE_MILLI))
1688 #define INSN_REFERENCES_ARE_DELAYED(X) \
1689 ((GET_CODE (X) == INSN \
1690 && GET_CODE (PATTERN (X)) != SEQUENCE \
1691 && GET_CODE (PATTERN (X)) != USE \
1692 && GET_CODE (PATTERN (X)) != CLOBBER \
1693 && get_attr_type (X) == TYPE_MILLI))
1696 /* Control the assembler format that we output. */
1698 /* Output at beginning of assembler file. */
1700 #define ASM_FILE_START(FILE) \
1701 do { fprintf (FILE, "\t.SPACE $PRIVATE$\n\
1702 \t.SUBSPA $DATA$,QUAD=1,ALIGN=8,ACCESS=31\n\
1703 \t.SUBSPA $BSS$,QUAD=1,ALIGN=8,ACCESS=31,ZERO,SORT=82\n\
1705 \t.SUBSPA $LIT$,QUAD=0,ALIGN=8,ACCESS=44\n\
1706 \t.SUBSPA $CODE$,QUAD=0,ALIGN=8,ACCESS=44,CODE_ONLY\n\
1707 \t.IMPORT $global$,DATA\n\
1708 \t.IMPORT $$dyncall,MILLICODE\n");\
1710 fprintf (FILE, "\t.IMPORT _mcount, CODE\n");\
1711 if (write_symbols != NO_DEBUG) \
1712 output_file_directive ((FILE), main_input_filename); \
1715 /* Output to assembler file text saying following lines
1716 may contain character constants, extra white space, comments, etc. */
1718 #define ASM_APP_ON ""
1720 /* Output to assembler file text saying following lines
1721 no longer contain unusual constructs. */
1723 #define ASM_APP_OFF ""
1725 /* We don't yet know how to identify GCC to HP-PA machines. */
1726 #define ASM_IDENTIFY_GCC(FILE) fprintf (FILE, "; gcc_compiled.:\n")
1728 /* Output before code. */
1730 /* Supposedly the assembler rejects the command if there is no tab! */
1731 #define TEXT_SECTION_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $CODE$\n"
1733 /* Output before read-only data. */
1735 /* Supposedly the assembler rejects the command if there is no tab! */
1736 #define READONLY_DATA_ASM_OP "\t.SPACE $TEXT$\n\t.SUBSPA $LIT$\n"
1738 #define READONLY_DATA_SECTION readonly_data
1740 /* Output before writable data. */
1742 /* Supposedly the assembler rejects the command if there is no tab! */
1743 #define DATA_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $DATA$\n"
1745 /* Output before uninitialized data. */
1747 #define BSS_SECTION_ASM_OP "\t.SPACE $PRIVATE$\n\t.SUBSPA $BSS$\n"
1749 /* Define the .bss section for ASM_OUTPUT_LOCAL to use. */
1751 #define EXTRA_SECTIONS in_bss, in_readonly_data
1753 /* FIXME: HPUX ld generates incorrect GOT entries for "T" fixups
1754 which reference data within the $TEXT$ space (for example constant
1755 strings in the $LIT$ subspace).
1757 The assemblers (GAS and HP as) both have problems with handling
1758 the difference of two symbols which is the other correct way to
1759 reference constant data during PIC code generation.
1761 So, there's no way to reference constant data which is in the
1762 $TEXT$ space during PIC generation. Instead place all constant
1763 data into the $PRIVATE$ subspace (this reduces sharing, but it
1764 works correctly). */
1766 #define EXTRA_SECTION_FUNCTIONS \
1770 if (in_section != in_bss) \
1772 fprintf (asm_out_file, "%s\n", BSS_SECTION_ASM_OP); \
1773 in_section = in_bss; \
1779 if (in_section != in_readonly_data) \
1782 fprintf (asm_out_file, "%s\n", DATA_SECTION_ASM_OP); \
1784 fprintf (asm_out_file, "%s\n", READONLY_DATA_ASM_OP); \
1785 in_section = in_readonly_data; \
1790 /* How to refer to registers in assembler output.
1791 This sequence is indexed by compiler's hard-register-number (see above). */
1793 #define REGISTER_NAMES \
1794 {"%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
1795 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
1796 "%r16", "%r17", "%r18", "%r19", "%r20", "%r21", "%r22", "%r23", \
1797 "%r24", "%r25", "%r26", "%r27", "%r28", "%r29", "%r30", "%r31", \
1798 "%fr4", "%fr4R", "%fr5", "%fr5R", "%fr6", "%fr6R", "%fr7", "%fr7R", \
1799 "%fr8", "%fr8R", "%fr9", "%fr9R", "%fr10", "%fr10R", "%fr11", "%fr11R", \
1800 "%fr12", "%fr12R", "%fr13", "%fr13R", "%fr14", "%fr14R", "%fr15", "%fr15R", \
1801 "%fr16", "%fr16R", "%fr17", "%fr17R", "%fr18", "%fr18R", "%fr19", "%fr19R", \
1802 "%fr20", "%fr20R", "%fr21", "%fr21R", "%fr22", "%fr22R", "%fr23", "%fr23R", \
1803 "%fr24", "%fr24R", "%fr25", "%fr25R", "%fr26", "%fr26R", "%fr27", "%fr27R", \
1804 "%fr28", "%fr28R", "%fr29", "%fr29R", "%fr30", "%fr30R", "%fr31", "%fr31R", \
1807 #define ADDITIONAL_REGISTER_NAMES \
1808 {{"%fr4L",32}, {"%fr5L",34}, {"%fr6L",36}, {"%fr7L",38}, \
1809 {"%fr8L",40}, {"%fr9L",42}, {"%fr10L",44}, {"%fr11L",46}, \
1810 {"%fr12L",48}, {"%fr13L",50}, {"%fr14L",52}, {"%fr15L",54}, \
1811 {"%fr16L",56}, {"%fr17L",58}, {"%fr18L",60}, {"%fr19L",62}, \
1812 {"%fr20L",64}, {"%fr21L",66}, {"%fr22L",68}, {"%fr23L",70}, \
1813 {"%fr24L",72}, {"%fr25L",74}, {"%fr26L",76}, {"%fr27L",78}, \
1814 {"%fr28L",80}, {"%fr29L",82}, {"%fr30L",84}, {"%fr31R",86}, \
1817 /* How to renumber registers for dbx and gdb.
1819 Registers 0 - 31 remain unchanged.
1821 Registers 32 - 87 are mapped to 72 - 127
1823 Register 88 is mapped to 32. */
1825 #define DBX_REGISTER_NUMBER(REGNO) \
1826 ((REGNO) <= 31 ? (REGNO) : \
1827 ((REGNO) > 31 && (REGNO) <= 87 ? (REGNO) + 40 : 32))
1829 /* This is how to output the definition of a user-level label named NAME,
1830 such as the label on a static function or variable NAME. */
1832 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1833 do { assemble_name (FILE, NAME); \
1834 fputc ('\n', FILE); } while (0)
1836 /* This is how to output a command to make the user-level label named NAME
1837 defined for reference from other files. */
1839 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1840 do { fputs ("\t.IMPORT ", FILE); \
1841 assemble_name (FILE, NAME); \
1842 if (FUNCTION_NAME_P (NAME)) \
1843 fputs (",CODE\n", FILE); \
1845 fputs (",DATA\n", FILE); \
1848 /* The bogus HP assembler requires ALL external references to be
1849 "imported", even library calls. They look a bit different, so
1850 here's this macro. */
1852 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, RTL) \
1853 do { fputs ("\t.IMPORT ", FILE); \
1854 assemble_name (FILE, XSTR ((RTL), 0)); \
1855 fputs (",CODE\n", FILE); \
1858 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1860 /* We only handle DATA objects here, functions are globalized in \
1861 ASM_DECLARE_FUNCTION_NAME. */ \
1862 if (! FUNCTION_NAME_P (NAME)) \
1864 fputs ("\t.EXPORT ", FILE); \
1865 assemble_name (FILE, NAME); \
1866 fputs (",DATA\n", FILE); \
1870 /* This is how to output a reference to a user-level label named NAME.
1871 `assemble_name' uses this. */
1873 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1874 fprintf ((FILE), "%s", (NAME) + (FUNCTION_NAME_P (NAME) ? 1 : 0))
1876 /* This is how to output an internal numbered label where
1877 PREFIX is the class of label and NUM is the number within the class. */
1879 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1880 {fprintf (FILE, "%c$%s%04d\n", (PREFIX)[0], (PREFIX) + 1, NUM);}
1882 /* This is how to store into the string LABEL
1883 the symbol_ref name of an internal numbered label where
1884 PREFIX is the class of label and NUM is the number within the class.
1885 This is suitable for output with `assemble_name'. */
1887 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1888 sprintf (LABEL, "*%c$%s%04d", (PREFIX)[0], (PREFIX) + 1, NUM)
1890 /* This is how to output an assembler line defining a `double' constant. */
1892 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1893 do { union { double d; int i[2];} __u; \
1895 fprintf (FILE, "\t; .double %.20e\n\t.word %d ; = 0x%x\n\t.word %d ; = 0x%x\n", \
1896 __u.d, __u.i[0], __u.i[0], __u.i[1], __u.i[1]); \
1899 /* This is how to output an assembler line defining a `float' constant. */
1901 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1902 do { union { float f; int i;} __u; \
1904 fprintf (FILE, "\t; .float %.12e\n\t.word %d ; = 0x%x\n", __u.f, __u.i, __u.i); \
1907 /* This is how to output an assembler line defining an `int' constant. */
1909 #define ASM_OUTPUT_INT(FILE,VALUE) \
1910 { fprintf (FILE, "\t.word "); \
1911 if (function_label_operand (VALUE, VOIDmode) \
1912 && !TARGET_PORTABLE_RUNTIME) \
1913 fprintf (FILE, "P%%"); \
1914 output_addr_const (FILE, (VALUE)); \
1915 fprintf (FILE, "\n");}
1917 /* Likewise for `short' and `char' constants. */
1919 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1920 ( fprintf (FILE, "\t.half "), \
1921 output_addr_const (FILE, (VALUE)), \
1922 fprintf (FILE, "\n"))
1924 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1925 ( fprintf (FILE, "\t.byte "), \
1926 output_addr_const (FILE, (VALUE)), \
1927 fprintf (FILE, "\n"))
1929 /* This is how to output an assembler line for a numeric constant byte. */
1931 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1932 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
1934 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1935 output_ascii ((FILE), (P), (SIZE))
1937 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO)
1938 #define ASM_OUTPUT_REG_POP(FILE,REGNO)
1939 /* This is how to output an element of a case-vector that is absolute.
1940 Note that this method makes filling these branch delay slots
1943 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1944 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1946 /* Jump tables are executable code and live in the TEXT section on the PA. */
1947 #define JUMP_TABLES_IN_TEXT_SECTION
1949 /* This is how to output an element of a case-vector that is relative.
1950 This must be defined correctly as it is used when generating PIC code.
1952 I belive it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1953 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
1954 rather than a table of absolute addresses. */
1956 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1957 fprintf (FILE, "\tb L$%04d\n\tnop\n", VALUE)
1959 /* This is how to output an assembler line
1960 that says to advance the location counter
1961 to a multiple of 2**LOG bytes. */
1963 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1964 fprintf (FILE, "\t.align %d\n", (1<<(LOG)))
1966 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1967 fprintf (FILE, "\t.blockz %d\n", (SIZE))
1969 /* This says how to output an assembler line to define a global common symbol
1970 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1972 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
1974 assemble_name ((FILE), (NAME)); \
1975 fputs ("\t.comm ", (FILE)); \
1976 fprintf ((FILE), "%d\n", MAX ((SIZE), ((ALIGNED) / BITS_PER_UNIT)));}
1978 /* This says how to output an assembler line to define a local common symbol
1979 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1981 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
1983 fprintf ((FILE), "\t.align %d\n", ((ALIGNED) / BITS_PER_UNIT)); \
1984 assemble_name ((FILE), (NAME)); \
1985 fprintf ((FILE), "\n\t.block %d\n", (SIZE));}
1987 /* Store in OUTPUT a string (made with alloca) containing
1988 an assembler-name for a local static variable named NAME.
1989 LABELNO is an integer which is different for each call. */
1991 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1992 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1993 sprintf ((OUTPUT), "%s___%d", (NAME), (LABELNO)))
1995 /* Define the parentheses used to group arithmetic operations
1996 in assembler code. */
1998 #define ASM_OPEN_PAREN "("
1999 #define ASM_CLOSE_PAREN ")"
2001 /* All HP assemblers use "!" to separate logical lines. */
2002 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == '!')
2004 /* Define results of standard character escape sequences. */
2005 #define TARGET_BELL 007
2006 #define TARGET_BS 010
2007 #define TARGET_TAB 011
2008 #define TARGET_NEWLINE 012
2009 #define TARGET_VT 013
2010 #define TARGET_FF 014
2011 #define TARGET_CR 015
2013 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
2014 ((CHAR) == '@' || (CHAR) == '#' || (CHAR) == '*' || (CHAR) == '^')
2016 /* Print operand X (an rtx) in assembler syntax to file FILE.
2017 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2018 For `%' followed by punctuation, CODE is the punctuation and X is null.
2020 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
2021 and an immediate zero should be represented as `r0'.
2023 Several % codes are defined:
2025 C compare conditions
2026 N extract conditions
2027 M modifier to handle preincrement addressing for memory refs.
2028 F modifier to handle preincrement addressing for fp memory refs */
2030 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2033 /* Print a memory address as an operand to reference that memory location. */
2035 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2036 { register rtx addr = ADDR; \
2037 register rtx base; \
2039 switch (GET_CODE (addr)) \
2042 fprintf (FILE, "0(0,%s)", reg_names [REGNO (addr)]); \
2045 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
2046 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
2047 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
2048 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
2051 fprintf (FILE, "%d(0,%s)", offset, reg_names [REGNO (base)]); \
2054 if (flag_pic == 0 || !symbolic_operand (XEXP (addr, 1))) \
2055 fputs ("R'", FILE); \
2056 else if (flag_pic == 1) \
2058 else if (flag_pic == 2) \
2059 fputs ("RT'", FILE); \
2060 output_global_address (FILE, XEXP (addr, 1)); \
2061 fputs ("(", FILE); \
2062 output_operand (XEXP (addr, 0), 0); \
2063 fputs (")", FILE); \
2066 fprintf (FILE, "%d(0,0)", INTVAL (addr)); \
2069 output_addr_const (FILE, addr); \
2073 /* Define functions in pa.c and used in insn-output.c. */
2075 extern char *output_and ();
2076 extern char *output_ior ();
2077 extern char *output_move_double ();
2078 extern char *output_fp_move_double ();
2079 extern char *output_block_move ();
2080 extern char *output_cbranch ();
2081 extern char *output_bb ();
2082 extern char *output_dbra ();
2083 extern char *output_movb ();
2084 extern char *output_return ();
2085 extern char *output_call ();
2086 extern char *output_mul_insn ();
2087 extern char *output_div_insn ();
2088 extern char *output_mod_insn ();
2089 extern char *singlemove_string ();
2090 extern void output_arg_descriptor ();
2091 extern void output_global_address ();
2092 extern struct rtx_def *legitimize_pic_address ();
2093 extern struct rtx_def *gen_cmp_fp ();
2094 extern void hppa_encode_label ();
2096 extern struct rtx_def *hppa_save_pic_table_rtx;
2099 #define PREDICATE_CODES \
2100 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
2101 {"reg_or_cint_move_operand", {SUBREG, REG, CONST_INT}}, \
2102 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
2103 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
2104 {"arith11_operand", {SUBREG, REG, CONST_INT}}, \
2105 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
2106 {"pre_cint_operand", {CONST_INT}}, \
2107 {"post_cint_operand", {CONST_INT}}, \
2108 {"int5_operand", {CONST_INT}}, \
2109 {"uint5_operand", {CONST_INT}}, \
2110 {"uint32_operand", {CONST_INT}}, \
2111 {"int11_operand", {CONST_INT}}, \
2112 {"and_operand", {SUBREG, REG, CONST_INT}}, \
2113 {"ior_operand", {CONST_INT}}, \
2114 {"lhs_lshift_operand", {SUBREG, REG, CONST_INT}}, \
2115 {"lhs_lshift_cint_operand", {CONST_INT}}, \
2116 {"plus_xor_ior_operator", {PLUS, XOR, IOR}}, \
2117 {"shadd_operand", {CONST_INT}}, \
2118 {"eq_neq_comparison_operator", {EQ, NE}}, \
2119 {"movb_comparison_operator", {EQ, NE, LT, GE}}, \
2120 {"pc_or_label_operand", {LABEL_REF, PC}}, \
2121 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
2122 {"reg_or_nonsymb_mem_operand", {REG, SUBREG, MEM}}, \
2123 {"move_operand", {REG, SUBREG, CONST_INT, MEM}}, \
2124 {"pic_operand", {REG, SUBREG, CONST_INT, SYMBOL_REF, LABEL_REF, \
2125 CONST, HIGH, PC}}, /* No clue */ \
2126 {"function_label_operand", {SYMBOL_REF}}, \
2127 {"reg_or_0_or_nonsymb_mem_operand", {REG, SUBREG, CONST_INT, MEM}}, \
2128 {"div_operand", {REG, CONST_INT}}, \
2129 {"call_operand_address", {LABEL_REF, SYMBOL_REF, CONST_INT, \
2133 #define DO_GLOBAL_DTORS_BODY \
2135 extern void __gcc_plt_call (); \
2136 volatile int reference = &__gcc_plt_call; \
2138 for (p = __DTOR_LIST__ + 1; *p; ) \
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