1 /* Definitions of target machine for GNU compiler. NS32000 version.
2 Copyright (C) 1988, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@cygnus.com)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
24 #define TARGET_CPU_CPP_BUILTINS() \
27 builtin_define ("__ns32000__"); \
31 builtin_define ("__ns32532__"); \
32 else if (TARGET_32332) \
33 builtin_define ("__ns32332__"); \
35 builtin_define ("__ns32032__"); \
39 builtin_define ("__ns32381__"); \
40 else if (TARGET_32081) \
41 builtin_define ("__ns32081__"); \
45 builtin_define ("__RTD__"); \
47 builtin_assert ("cpu=ns32k"); \
48 builtin_assert ("machine=ns32k"); \
52 /* Print subsidiary information on the compiler version in use. */
53 #define TARGET_VERSION fprintf (stderr, " (32000, GAS syntax)");
56 /* ABSOLUTE PREFIX, IMMEDIATE_PREFIX and EXTERNAL_PREFIX can be defined
57 to cover most NS32k addressing syntax variations. This way we don't
58 need to redefine long macros in all the tm.h files for just slight
59 variations in assembler syntax. */
61 #ifndef ABSOLUTE_PREFIX
62 #define ABSOLUTE_PREFIX '@'
65 #if defined(IMMEDIATE_PREFIX) && IMMEDIATE_PREFIX
66 #define PUT_IMMEDIATE_PREFIX(FILE) putc(IMMEDIATE_PREFIX, FILE)
68 #define PUT_IMMEDIATE_PREFIX(FILE)
70 #if defined(ABSOLUTE_PREFIX) && ABSOLUTE_PREFIX
71 #define PUT_ABSOLUTE_PREFIX(FILE) putc(ABSOLUTE_PREFIX, FILE)
73 #define PUT_ABSOLUTE_PREFIX(FILE)
75 #if defined(EXTERNAL_PREFIX) && EXTERNAL_PREFIX
76 #define PUT_EXTERNAL_PREFIX(FILE) putc(EXTERNAL_PREFIX, FILE)
78 #define PUT_EXTERNAL_PREFIX(FILE)
81 /* Run-time compilation parameters selecting different hardware subsets. */
83 extern int target_flags;
85 /* Masks for target_flags */
88 #define MASK_REGPARM 4
92 #define MASK_NO_BITFIELD 64
93 #define MASK_HIMEM 128
94 #define MASK_32381 256
95 #define MASK_MULT_ADD 512
97 #define MASK_IEEE_COMPARE 2048
99 /* Macros used in the machine description to test the flags. */
101 /* Compile 32081 insns for floating point (not library calls). */
102 #define TARGET_32081 (target_flags & MASK_32081)
103 #define TARGET_32381 (target_flags & MASK_32381)
105 /* The use of multiply-add instructions is optional because there may
106 * be cases where it produces worse code.
109 #define TARGET_MULT_ADD (target_flags & MASK_MULT_ADD)
111 /* Compile using rtd insn calling sequence.
112 This will not work unless you use prototypes at least
113 for all functions that can take varying numbers of args. */
114 #define TARGET_RTD (target_flags & MASK_RTD)
116 /* Compile passing first two args in regs 0 and 1. */
117 #define TARGET_REGPARM (target_flags & MASK_REGPARM)
119 /* Options to select type of CPU, for better optimization.
120 The output is correct for any kind of 32000 regardless of these options. */
121 #define TARGET_32532 (target_flags & MASK_32532)
122 #define TARGET_32332 (target_flags & MASK_32332)
124 /* Ok to use the static base register (and presume it's 0) */
125 #define TARGET_SB ((target_flags & MASK_NO_SB) == 0)
127 #define TARGET_HIMEM (target_flags & MASK_HIMEM)
129 /* Compile using bitfield insns. */
130 #define TARGET_BITFIELD ((target_flags & MASK_NO_BITFIELD) == 0)
132 #define TARGET_IEEE_COMPARE (target_flags & MASK_IEEE_COMPARE)
134 /* Macro to define tables used to set the flags.
135 This is a list in braces of pairs in braces,
136 each pair being { "NAME", VALUE }
137 where VALUE is the bits to set or minus the bits to clear.
138 An empty string NAME is used to identify the default VALUE. */
139 #define TARGET_SWITCHES \
140 { { "32081", MASK_32081, N_("Use hardware fp")}, \
141 { "soft-float", -(MASK_32081|MASK_32381), \
142 N_("Don't use hardware fp")}, \
143 { "rtd", MASK_RTD, N_("Alternative calling convention")}, \
144 { "nortd", -MASK_RTD, N_("Use normal calling convention")}, \
145 { "regparm", MASK_REGPARM, N_("Pass some arguments in registers")}, \
146 { "noregparm", -MASK_REGPARM, N_("Pass all arguments on stack")}, \
147 { "32532", MASK_32532|MASK_32332, N_("Optimize for 32532 cpu")}, \
148 { "32332", MASK_32332, N_("Optimize for 32332 cpu")}, \
149 { "32332", -MASK_32532, 0}, \
150 { "32032", -(MASK_32532|MASK_32332), N_("Optimize for 32032")}, \
151 { "sb", -MASK_NO_SB, \
152 N_("Register sb is zero. Use for absolute addressing")}, \
153 { "nosb", MASK_NO_SB, N_("Do not use register sb")}, \
154 { "bitfield", -MASK_NO_BITFIELD, \
155 N_("Use bit-field instructions")}, \
156 { "nobitfield", MASK_NO_BITFIELD, \
157 N_("Do not use bit-field instructions")}, \
158 { "himem", MASK_HIMEM, N_("Generate code for high memory")}, \
159 { "nohimem", -MASK_HIMEM, N_("Generate code for low memory")}, \
160 { "32381", MASK_32381, N_("32381 fpu")}, \
161 { "mult-add", MASK_MULT_ADD, \
162 N_("Use multiply-accumulate fp instructions")}, \
163 { "nomult-add", -MASK_MULT_ADD, \
164 N_("Do not use multiply-accumulate fp instructions") }, \
165 { "src", MASK_SRC, N_("\"Small register classes\" kludge")}, \
166 { "nosrc", -MASK_SRC, N_("No \"Small register classes\" kludge")}, \
167 { "ieee-compare", MASK_IEEE_COMPARE, N_("Use IEEE math for fp comparisons")}, \
168 { "noieee-compare", -MASK_IEEE_COMPARE, \
169 N_("Do not use IEEE math for fp comparisons")}, \
170 { "", TARGET_DEFAULT, 0}}
172 /* TARGET_DEFAULT is defined in encore.h, pc532.h, etc. */
174 /* When we are generating PIC, the sb is used as a pointer
175 to the GOT. 32381 is a superset of 32081 */
177 #define OVERRIDE_OPTIONS \
179 if (target_flags & MASK_32532) \
180 target_flags |= MASK_32332; \
181 if (flag_pic || TARGET_HIMEM) \
182 target_flags |= MASK_NO_SB; \
184 target_flags |= MASK_32081; \
186 target_flags &= ~MASK_MULT_ADD; \
187 if (flag_unsafe_math_optimizations) \
188 target_flags &= ~MASK_IEEE_COMPARE; \
191 /* Zero or more C statements that may conditionally modify two
192 variables `fixed_regs' and `call_used_regs' (both of type `char
193 []') after they have been initialized from the two preceding
196 This is necessary in case the fixed or call-clobbered registers
197 depend on target flags.
199 You need not define this macro if it has no work to do.
201 If the usage of an entire class of registers depends on the target
202 flags, you may indicate this to GCC by using this macro to modify
203 `fixed_regs' and `call_used_regs' to 1 for each of the registers in
204 the classes which should not be used by GCC. Also define the macro
205 `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
206 letter for a class that shouldn't be used.
208 (However, if this class is not included in `GENERAL_REGS' and all
209 of the insn patterns whose constraints permit this class are
210 controlled by target switches, then GCC will automatically avoid
211 using these registers when the target switches are opposed to
214 #define CONDITIONAL_REGISTER_USAGE \
221 for (regno = F0_REGNUM; regno <= F0_REGNUM + 8; regno++) \
222 fixed_regs[regno] = call_used_regs[regno] = 1; \
228 for (regno = L1_REGNUM; regno <= L1_REGNUM + 8; regno++) \
229 fixed_regs[regno] = call_used_regs[regno] = 1; \
235 /* target machine storage layout */
237 /* Define this if most significant bit is lowest numbered
238 in instructions that operate on numbered bit-fields.
239 This is not true on the ns32k. */
240 #define BITS_BIG_ENDIAN 0
242 /* Define this if most significant byte of a word is the lowest numbered. */
243 /* That is not true on the ns32k. */
244 #define BYTES_BIG_ENDIAN 0
246 /* Define this if most significant word of a multiword number is lowest
247 numbered. This is not true on the ns32k. */
248 #define WORDS_BIG_ENDIAN 0
250 /* Width of a word, in units (bytes). */
251 #define UNITS_PER_WORD 4
253 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
254 #define PARM_BOUNDARY 32
256 /* Boundary (in *bits*) on which stack pointer should be aligned. */
257 #define STACK_BOUNDARY 32
259 /* Allocation boundary (in *bits*) for the code of a function. */
260 #define FUNCTION_BOUNDARY 16
262 /* Alignment of field after `int : 0' in a structure. */
263 #define EMPTY_FIELD_BOUNDARY 32
265 /* Every structure's size must be a multiple of this. */
266 #define STRUCTURE_SIZE_BOUNDARY 8
268 /* No data type wants to be aligned rounder than this. */
269 #define BIGGEST_ALIGNMENT 32
271 /* Set this nonzero if move instructions will actually fail to work
272 when given unaligned data. National claims that the NS32032
273 works without strict alignment, but rumor has it that operands
274 crossing a page boundary cause unpredictable results. */
275 #define STRICT_ALIGNMENT 1
277 /* If bit field type is int, don't let it cross an int,
278 and give entire struct the alignment of an int. */
279 /* Required on the 386 since it doesn't have a full set of bitfield insns.
280 (There is no signed extv insn.) */
281 #define PCC_BITFIELD_TYPE_MATTERS 1
283 /* Standard register usage. */
285 /* Number of actual hardware registers.
286 The hardware registers are assigned numbers for the compiler
287 from 0 to just below FIRST_PSEUDO_REGISTER.
288 All registers that the compiler knows about must be given numbers,
289 even those that are not normally considered general registers. */
290 #define FIRST_PSEUDO_REGISTER 26
292 /* 1 for registers that have pervasive standard uses
293 and are not available for the register allocator.
294 On the ns32k, these are the FP, SP, (SB and PC are not included here). */
295 #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, \
296 0, 0, 0, 0, 0, 0, 0, 0, \
297 0, 0, 0, 0, 0, 0, 0, 0, \
300 /* 1 for registers not available across function calls.
301 These must include the FIXED_REGISTERS and also any
302 registers that can be used without being saved.
303 The latter must include the registers where values are returned
304 and the register where structure-value addresses are passed.
305 Aside from that, you can include as many other registers as you like. */
306 #define CALL_USED_REGISTERS {1, 1, 1, 0, 0, 0, 0, 0, \
307 1, 1, 1, 1, 0, 0, 0, 0, \
308 1, 1, 0, 0, 0, 0, 0, 0, \
311 /* How to refer to registers in assembler output.
312 This sequence is indexed by compiler's hard-register-number (see above). */
314 #define REGISTER_NAMES \
315 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
316 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
317 "l1", "l1h","l3", "l3h","l5", "l5h","l7", "l7h", \
321 #define ADDITIONAL_REGISTER_NAMES \
322 {{"l0", 8}, {"l2", 10}, {"l4", 12}, {"l6", 14}}
324 /* l0-7 are not recognized by the assembler. These are the names to use,
325 * but we don't want ambiguous names in REGISTER_NAMES
327 #define OUTPUT_REGISTER_NAMES \
328 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
329 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
330 "f1", "l1h","f3", "l3h","f5", "l5h","f7", "f7h", \
333 #define REG_ALLOC_ORDER \
334 {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 16, 10, 11, 18, 12, 13, 20, 14, 15, 22, 24, 25, 17, 19, 23}
336 /* How to renumber registers for dbx and gdb.
337 NS32000 may need more change in the numeration. XXX */
339 #define DBX_REGISTER_NUMBER(REGNO) \
340 ((REGNO) < L1_REGNUM? (REGNO) \
341 : (REGNO) < FRAME_POINTER_REGNUM? (REGNO) - L1_REGNUM + 22 \
342 : (REGNO) == FRAME_POINTER_REGNUM? 17 \
345 /* dwarf2out.c can't understand the funny DBX register numbering.
346 * We use dwarf2out.c for exception handling even though we use DBX
349 #define DWARF_FRAME_REGNUM(REGNO) (REGNO)
357 /* Specify the registers used for certain standard purposes.
358 The values of these macros are register numbers. */
360 /* NS32000 pc is not overloaded on a register. */
361 /* #define PC_REGNUM */
363 /* Register to use for pushing function arguments. */
364 #define STACK_POINTER_REGNUM 25
366 /* Base register for access to local variables of the function. */
367 #define FRAME_POINTER_REGNUM 24
370 /* Return number of consecutive hard regs needed starting at reg REGNO
371 to hold something of mode MODE.
372 This is ordinarily the length in words of a value of mode MODE
373 but can be less for certain modes in special long registers.
374 On the ns32k, all registers are 32 bits long except for the 32381 "long"
375 registers but we treat those as pairs */
376 #define LONG_FP_REGS_P(REGNO) ((REGNO) >= L1_REGNUM && (REGNO) < L1_REGNUM + 8)
377 #define HARD_REGNO_NREGS(REGNO, MODE) \
378 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
380 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
381 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok (REGNO, MODE)
383 /* Value is 1 if it is a good idea to tie two pseudo registers
384 when one has mode MODE1 and one has mode MODE2.
385 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
386 for any hard reg, then this must be 0 for correct output.
388 Early documentation says SI and DI are not tieable if some reg can
389 be OK for SI but not for DI. However other ports (mips, i860, mvs
390 and tahoe) don't meet the above criterion. Evidently the real
391 requirement is somewhat laxer. Documentation was changed for gcc
392 2.8 but was not picked up by egcs (at least egcs 1.0). Having all
393 integer modes tieable definitely generates faster code. */
395 #define MODES_TIEABLE_P(MODE1, MODE2) \
396 ((FLOAT_MODE_P(MODE1) && FLOAT_MODE_P(MODE2) \
397 && (GET_MODE_UNIT_SIZE(MODE1) == GET_MODE_UNIT_SIZE(MODE2))) \
398 || (!FLOAT_MODE_P(MODE1) && !FLOAT_MODE_P(MODE2)))
400 /* Value should be nonzero if functions must have frame pointers.
401 Zero means the frame pointer need not be set up (and parms
402 may be accessed via the stack pointer) in functions that seem suitable.
403 This is computed in `reload', in reload1.c. */
404 #define FRAME_POINTER_REQUIRED 0
406 /* Base register for access to arguments of the function. */
407 #define ARG_POINTER_REGNUM 24
409 /* Register in which static-chain is passed to a function. */
410 #define STATIC_CHAIN_REGNUM 1
412 /* Register in which address to store a structure value
413 is passed to a function. */
414 #define STRUCT_VALUE_REGNUM 2
416 /* Define the classes of registers for register constraints in the
417 machine description. Also define ranges of constants.
419 One of the classes must always be named ALL_REGS and include all hard regs.
420 If there is more than one class, another class must be named NO_REGS
421 and contain no registers.
423 The name GENERAL_REGS must be the name of a class (or an alias for
424 another name such as ALL_REGS). This is the class of registers
425 that is allowed by "g" or "r" in a register constraint.
426 Also, registers outside this class are allocated only when
427 instructions express preferences for them.
429 The classes must be numbered in nondecreasing order; that is,
430 a larger-numbered class must never be contained completely
431 in a smaller-numbered class.
433 For any two classes, it is very desirable that there be another
434 class that represents their union. */
437 { NO_REGS, GENERAL_REGS, FLOAT_REG0, LONG_FLOAT_REG0, FLOAT_REGS,
438 FP_REGS, GEN_AND_FP_REGS, FRAME_POINTER_REG, STACK_POINTER_REG,
439 GEN_AND_MEM_REGS, ALL_REGS, LIM_REG_CLASSES };
441 #define N_REG_CLASSES (int) LIM_REG_CLASSES
443 /* Give names of register classes as strings for dump file. */
445 #define REG_CLASS_NAMES \
446 {"NO_REGS", "GENERAL_REGS", "FLOAT_REG0", "LONG_FLOAT_REG0", "FLOAT_REGS", \
447 "FP_REGS", "GEN_AND_FP_REGS", "FRAME_POINTER_REG", "STACK_POINTER_REG", \
448 "GEN_AND_MEM_REGS", "ALL_REGS" }
450 /* Define which registers fit in which classes.
451 This is an initializer for a vector of HARD_REG_SET
452 of length N_REG_CLASSES. */
454 #define REG_CLASS_CONTENTS \
455 {{0}, /* NO_REGS */ \
456 {0x00ff}, /* GENERAL_REGS */ \
457 {0x100}, /* FLOAT_REG0 */ \
458 {0x300}, /* LONG_FLOAT_REG0 */ \
459 {0xff00}, /* FLOAT_REGS */ \
460 {0xffff00}, /* FP_REGS */ \
461 {0xffffff}, /* GEN_AND_FP_REGS */ \
462 {0x1000000}, /* FRAME_POINTER_REG */ \
463 {0x2000000}, /* STACK_POINTER_REG */ \
464 {0x30000ff}, /* GEN_AND_MEM_REGS */ \
465 {0x3ffffff} /* ALL_REGS */ \
468 #define SUBSET_P(CLASS1, CLASS2) \
469 ((ns32k_reg_class_contents[CLASS1][0] \
470 & ~ns32k_reg_class_contents[CLASS2][0]) == 0)
472 /* The same information, inverted:
473 Return the class number of the smallest class containing
474 reg number REGNO. This could be a conditional expression
475 or could index an array. */
477 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
479 /* The class value for index registers, and the one for base regs. */
481 #define INDEX_REG_CLASS GENERAL_REGS
482 #define BASE_REG_CLASS GEN_AND_MEM_REGS
484 /* Get reg_class from a letter such as appears in the machine description. */
486 #define REG_CLASS_FROM_LETTER(C) \
487 ((C) == 'u' ? FLOAT_REG0 \
488 : (C) == 'v' ? LONG_FLOAT_REG0 \
489 : (C) == 'f' ? FLOAT_REGS \
490 : (C) == 'l' ? FP_REGS \
491 : (C) == 'x' ? FRAME_POINTER_REG \
492 : (C) == 'y' ? STACK_POINTER_REG \
495 /* The letters I, J, K, L and M in a register constraint string
496 can be used to stand for particular ranges of immediate operands.
497 This macro defines what the ranges are.
498 C is the letter, and VALUE is a constant value.
499 Return 1 if VALUE is in the range specified by C.
501 On the ns32k, these letters are used as follows:
503 I : Matches integers which are valid shift amounts for scaled indexing.
504 These are 0, 1, 2, 3 for byte, word, double, and quadword.
505 Used for matching arithmetic shifts only on 32032 & 32332.
506 J : Matches integers which fit a "quick" operand.
507 K : Matches integers 0 to 7 (for inss and exts instructions).
510 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
511 ((VALUE) < 8 && (VALUE) + 8 >= 0 ? \
512 ((C) == 'I' ? (!TARGET_32532 && 0 <= (VALUE) && (VALUE) <= 3) : \
513 (C) == 'J' ? (VALUE) <= 7 : \
514 (C) == 'K' ? 0 <= (VALUE) : 0) : 0)
516 /* Similar, but for floating constants, and defining letters G and H.
517 Here VALUE is the CONST_DOUBLE rtx itself. */
519 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
521 /* Given an rtx X being reloaded into a reg required to be
522 in class CLASS, return the class of reg to actually use.
523 In general this is just CLASS; but on some machines
524 in some cases it is preferable to use a more restrictive class. */
526 /* We return GENERAL_REGS instead of GEN_AND_MEM_REGS.
527 The latter offers no real additional possibilities
528 and can cause spurious secondary reloading. */
530 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
531 ((CLASS) == GEN_AND_MEM_REGS ? GENERAL_REGS : (CLASS))
533 /* Return the maximum number of consecutive registers
534 needed to represent mode MODE in a register of class CLASS. */
535 /* On the 32000, this is the size of MODE in words */
537 #define CLASS_MAX_NREGS(CLASS, MODE) \
538 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
540 /* Stack layout; function entry, exit and calling. */
542 /* Define this if pushing a word on the stack
543 makes the stack pointer a smaller address. */
544 #define STACK_GROWS_DOWNWARD
546 /* Define this if the nominal address of the stack frame
547 is at the high-address end of the local variables;
548 that is, each additional local variable allocated
549 goes at a more negative offset in the frame. */
550 #define FRAME_GROWS_DOWNWARD
552 /* Offset within stack frame to start allocating local variables at.
553 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
554 first local allocated. Otherwise, it is the offset to the BEGINNING
555 of the first local allocated. */
556 #define STARTING_FRAME_OFFSET 0
558 /* A C expression whose value is RTL representing the location of the
559 incoming return address at the beginning of any function, before
560 the prologue. This RTL is either a `REG', indicating that the
561 return value is saved in `REG', or a `MEM' representing a location
564 You only need to define this macro if you want to support call
565 frame debugging information like that provided by DWARF 2.
567 Before the prologue, RA is at 0(sp). */
569 #define INCOMING_RETURN_ADDR_RTX \
570 gen_rtx (MEM, VOIDmode, gen_rtx (REG, VOIDmode, STACK_POINTER_REGNUM))
572 /* A C expression whose value is RTL representing the value of the
573 return address for the frame COUNT steps up from the current frame,
574 after the prologue. FRAMEADDR is the frame pointer of the COUNT
575 frame, or the frame pointer of the COUNT - 1 frame if
576 `RETURN_ADDR_IN_PREVIOUS_FRAME' is defined.
578 After the prologue, RA is at 4(fp) in the current frame. */
580 #define RETURN_ADDR_RTX(COUNT, FRAME) \
581 ((COUNT> 0 && flag_omit_frame_pointer)? NULL_RTX \
582 : gen_rtx (MEM, Pmode, gen_rtx (PLUS, Pmode, (FRAME), GEN_INT(4))))
584 /* A C expression whose value is an integer giving the offset, in
585 bytes, from the value of the stack pointer register to the top of
586 the stack frame at the beginning of any function, before the
587 prologue. The top of the frame is defined to be the value of the
588 stack pointer in the previous frame, just before the call
591 You only need to define this macro if you want to support call
592 frame debugging information like that provided by DWARF 2. */
594 #define INCOMING_FRAME_SP_OFFSET 4
596 /* If we generate an insn to push BYTES bytes,
597 this says how many the stack pointer really advances by.
598 On the 32000, sp@- in a byte insn really pushes a BYTE. */
599 #define PUSH_ROUNDING(BYTES) (BYTES)
601 /* Offset of first parameter from the argument pointer register value. */
602 #define FIRST_PARM_OFFSET(FNDECL) 8
604 /* Value is the number of byte of arguments automatically
605 popped when returning from a subroutine call.
606 FUNDECL is the declaration node of the function (as a tree),
607 FUNTYPE is the data type of the function (as a tree),
608 or for a library call it is an identifier node for the subroutine name.
609 SIZE is the number of bytes of arguments passed on the stack.
611 On the 32000, the RET insn may be used to pop them if the number
612 of args is fixed, but if the number is variable then the caller
613 must pop them all. RET can't be used for library calls now
614 because the library is compiled with the Unix compiler.
615 Use of RET is a selectable option, since it is incompatible with
616 standard Unix calling sequences. If the option is not selected,
617 the caller must always pop the args.
619 The attribute stdcall is equivalent to RTD on a per module basis. */
621 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
622 (ns32k_return_pops_args (FUNDECL, FUNTYPE, SIZE))
624 /* Define how to find the value returned by a function.
625 VALTYPE is the data type of the value (as a tree).
626 If the precise function being called is known, FUNC is its FUNCTION_DECL;
627 otherwise, FUNC is 0. */
629 /* On the 32000 the return value is in R0,
630 or perhaps in F0 if there is fp support. */
632 #define FUNCTION_VALUE(VALTYPE, FUNC) LIBCALL_VALUE(TYPE_MODE (VALTYPE))
634 /* Define how to find the value returned by a library function
635 assuming the value has mode MODE. */
637 /* On the 32000 the return value is in R0,
638 or perhaps F0 is there is fp support. */
640 #define LIBCALL_VALUE(MODE) \
642 FLOAT_MODE_P(MODE) && TARGET_32081 ? F0_REGNUM: R0_REGNUM)
644 /* Define this if PCC uses the nonreentrant convention for returning
645 structure and union values. */
647 #define PCC_STATIC_STRUCT_RETURN
649 /* 1 if N is a possible register number for a function value.
650 On the 32000, R0 and F0 are the only registers thus used. */
652 #define FUNCTION_VALUE_REGNO_P(N) (((N) & ~8) == 0)
654 /* 1 if N is a possible register number for function argument passing.
655 On the 32000, no registers are used in this way. */
657 #define FUNCTION_ARG_REGNO_P(N) 0
659 /* Define a data type for recording info about an argument list
660 during the scan of that argument list. This data type should
661 hold all necessary information about the function itself
662 and about the args processed so far, enough to enable macros
663 such as FUNCTION_ARG to determine where the next arg should go.
665 On the ns32k, this is a single integer, which is a number of bytes
666 of arguments scanned so far. */
668 #define CUMULATIVE_ARGS int
670 /* Initialize a variable CUM of type CUMULATIVE_ARGS
671 for a call to a function whose data type is FNTYPE.
672 For a library call, FNTYPE is 0.
674 On the ns32k, the offset starts at 0. */
676 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
679 /* Update the data in CUM to advance over an argument
680 of mode MODE and data type TYPE.
681 (TYPE is null for libcalls where that information may not be available.) */
683 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
684 ((CUM) += ((MODE) != BLKmode \
685 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
686 : (int_size_in_bytes (TYPE) + 3) & ~3))
688 /* Define where to put the arguments to a function.
689 Value is zero to push the argument on the stack,
690 or a hard register in which to store the argument.
692 MODE is the argument's machine mode.
693 TYPE is the data type of the argument (as a tree).
694 This is null for libcalls where that information may
696 CUM is a variable of type CUMULATIVE_ARGS which gives info about
697 the preceding args and about the function being called.
698 NAMED is nonzero if this argument is a named parameter
699 (otherwise it is an extra parameter matching an ellipsis). */
701 /* On the 32000 all args are pushed, except if -mregparm is specified
702 then the first two words of arguments are passed in r0, r1.
703 *NOTE* -mregparm does not work.
704 It exists only to test register calling conventions. */
706 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
707 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx_REG ((MODE), (CUM) / 4) : 0)
709 /* For an arg passed partly in registers and partly in memory,
710 this is the number of registers used.
711 For args passed entirely in registers or entirely in memory, zero. */
713 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
714 ((TARGET_REGPARM && (CUM) < 8 \
715 && 8 < ((CUM) + ((MODE) == BLKmode \
716 ? int_size_in_bytes (TYPE) \
717 : GET_MODE_SIZE (MODE)))) \
720 /* Output assembler code to FILE to increment profiler label # LABELNO
721 for profiling a function entry.
723 THIS DEFINITION FOR THE 32000 IS A GUESS. IT HAS NOT BEEN TESTED. */
725 #define FUNCTION_PROFILER(FILE, LABELNO) \
726 fprintf (FILE, "\taddr LP%d,r0\n\tbsr mcount\n", (LABELNO))
728 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
729 the stack pointer does not matter. The value is tested only in
730 functions that have frame pointers.
731 No definition is equivalent to always zero.
733 We use 0, because using 1 requires hair in output_function_epilogue()
734 that is worse than the stack adjust we could save. */
736 /* #define EXIT_IGNORE_STACK 1 */
738 /* Store in the variable DEPTH the initial difference between the
739 frame pointer reg contents and the stack pointer reg contents,
740 as of the start of the function body. This depends on the layout
741 of the fixed parts of the stack frame and on how registers are saved. */
743 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
747 for (regno = 0; regno < FRAME_POINTER_REGNUM; regno++) \
748 if (regs_ever_live[regno] && ! call_used_regs[regno]) \
750 if (flag_pic && current_function_uses_pic_offset_table) \
752 (DEPTH) = (offset + get_frame_size () \
753 + (get_frame_size () == 0 ? 0 : 4)); \
757 /* Output assembler code for a block containing the constant parts
758 of a trampoline, leaving space for the variable parts. */
760 /* On the 32k, the trampoline looks like this:
765 Doing trampolines with a library assist function is easier than figuring
766 out how to do stores to memory in reverse byte order (the way immediate
767 operands on the 32k are stored). */
769 #define TRAMPOLINE_TEMPLATE(FILE) \
771 fprintf (FILE, "\taddr 0(pc),r2\n" ); \
772 fprintf (FILE, "\tjump " ); \
773 PUT_ABSOLUTE_PREFIX (FILE); \
774 fprintf (FILE, "__trampoline\n" ); \
775 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
776 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
779 /* Length in units of the trampoline for entering a nested function. */
781 #define TRAMPOLINE_SIZE 20
783 /* Emit RTL insns to initialize the variable parts of a trampoline.
784 FNADDR is an RTX for the address of the function's pure code.
785 CXT is an RTX for the static chain value for the function. */
787 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
789 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
790 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
793 /* This is the library routine that is used
794 to transfer control from the trampoline
795 to the actual nested function. */
797 /* The function name __transfer_from_trampoline is not actually used.
798 The function definition just permits use of "asm with operands"
799 (though the operand list is empty). */
800 #define TRANSFER_FROM_TRAMPOLINE \
802 __transfer_from_trampoline () \
804 asm (".globl __trampoline"); \
805 asm ("__trampoline:"); \
806 asm ("movd 16(r2),tos"); \
807 asm ("movd 12(r2),r1"); \
811 /* Addressing modes, and classification of registers for them. */
813 /* #define HAVE_POST_INCREMENT 0 */
814 /* #define HAVE_POST_DECREMENT 0 */
816 /* #define HAVE_PRE_DECREMENT 0 */
817 /* #define HAVE_PRE_INCREMENT 0 */
819 /* Macros to check register numbers against specific register classes. */
821 /* These assume that REGNO is a hard or pseudo reg number.
822 They give nonzero only if REGNO is a hard reg of the suitable class
823 or a pseudo reg currently allocated to a suitable hard reg.
824 Since they use reg_renumber, they are safe only once reg_renumber
825 has been allocated, which happens in local-alloc.c. */
827 /* note that FP and SP cannot be used as an index. What about PC? */
828 #define REGNO_OK_FOR_INDEX_P(REGNO) \
829 ((REGNO) < F0_REGNUM || (unsigned)reg_renumber[REGNO] < F0_REGNUM)
830 #define REGNO_OK_FOR_BASE_P(REGNO) \
831 ((REGNO) < F0_REGNUM || (unsigned)reg_renumber[REGNO] < F0_REGNUM \
832 || (REGNO) == FRAME_POINTER_REGNUM || (REGNO) == STACK_POINTER_REGNUM)
834 #define FP_REG_P(X) \
835 (GET_CODE (X) == REG && REGNO (X) >= F0_REGNUM && REGNO (X) < FRAME_POINTER_REGNUM)
837 /* Maximum number of registers that can appear in a valid memory address. */
839 #define MAX_REGS_PER_ADDRESS 2
841 /* Recognize any constant value that is a valid address.
842 This might not work on future ns32k processors as negative
843 displacements are not officially allowed but a mode reserved
844 to National. This works on processors up to 32532, though,
845 and we don't expect any new ones in the series ;-( */
847 #define CONSTANT_ADDRESS_P(X) \
848 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
849 || GET_CODE (X) == CONST \
850 || (GET_CODE (X) == CONST_INT \
851 && NS32K_DISPLACEMENT_P (INTVAL (X))))
853 #define CONSTANT_ADDRESS_NO_LABEL_P(X) \
854 (GET_CODE (X) == CONST_INT \
855 && NS32K_DISPLACEMENT_P (INTVAL (X)))
857 /* Return the register class of a scratch register needed to copy IN into
858 or out of a register in CLASS in MODE. If it can be done directly,
859 NO_REGS is returned. */
861 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
862 secondary_reload_class (CLASS, MODE, IN)
864 /* Certain machines have the property that some registers cannot be
865 copied to some other registers without using memory. Define this
866 macro on those machines to be a C expression that is nonzero if
867 objects of mode M in registers of CLASS1 can only be copied to
868 registers of class CLASS2 by storing a register of CLASS1 into
869 memory and loading that memory location into a register of CLASS2.
871 On the ns32k, floating point regs can only be loaded through memory
873 The movdf and movsf insns in ns32k.md copy between general and
874 floating registers using the stack. In principle, we could get
875 better code not allowing that case in the constraints and defining
876 SECONDARY_MEMORY_NEEDED in practice, though the stack slots used
877 are not available for optimization. */
880 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, M) \
881 secondary_memory_needed(CLASS1, CLASS2, M)
884 /* SMALL_REGISTER_CLASSES is a run time option. This should no longer
885 be necessay and should go when we have confidence that we won't run
886 out of spill registers */
887 #define SMALL_REGISTER_CLASSES (target_flags & MASK_SRC)
889 /* A C expression whose value is nonzero if pseudos that have been
890 assigned to registers of class CLASS would likely be spilled
891 because registers of CLASS are needed for spill registers.
893 The default definition won't do because class LONG_FLOAT_REG0 has two
894 registers which are always accessed as a pair */
896 #define CLASS_LIKELY_SPILLED_P(CLASS) \
897 (reg_class_size[(int) (CLASS)] == 1 || (CLASS) == LONG_FLOAT_REG0)
900 /* Nonzero if the constant value X is a legitimate general operand.
901 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
903 #define LEGITIMATE_CONSTANT_P(X) 1
905 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
906 and check its validity for a certain class.
907 We have two alternate definitions for each of them.
908 The usual definition accepts all pseudo regs; the other rejects
909 them unless they have been allocated suitable hard regs.
910 The symbol REG_OK_STRICT causes the latter definition to be used.
912 Most source files want to accept pseudo regs in the hope that
913 they will get allocated to the class that the insn wants them to be in.
914 Source files for reload pass need to be strict.
915 After reload, it makes no difference, since pseudo regs have
916 been eliminated by then. */
918 #ifndef REG_OK_STRICT
920 /* Nonzero if X is a hard reg that can be used as an index
921 or if it is a pseudo reg. */
922 #define REG_OK_FOR_INDEX_P(X) \
923 (REGNO (X) < F0_REGNUM || REGNO (X) >= FIRST_PSEUDO_REGISTER)
924 /* Nonzero if X is a hard reg that can be used as a base reg
925 of if it is a pseudo reg. */
926 #define REG_OK_FOR_BASE_P(X) (REGNO (X) < F0_REGNUM || REGNO (X) >= FRAME_POINTER_REGNUM)
927 /* Nonzero if X is a floating point reg or a pseudo reg. */
931 /* Nonzero if X is a hard reg that can be used as an index. */
932 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
933 /* Nonzero if X is a hard reg that can be used as a base reg. */
934 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
938 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
939 that is a valid memory address for an instruction.
940 The MODE argument is the machine mode for the MEM expression
941 that wants to use this address.
943 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS. */
945 /* 1 if X is an address that we could indirect through. */
946 /***** NOTE ***** There is a bug in the Sequent assembler which fails
947 to fixup addressing information for symbols used as offsets
948 from registers which are not FP or SP (or SB or PC). This
949 makes _x(fp) valid, while _x(r0) is invalid. */
951 #define INDIRECTABLE_1_ADDRESS_P(X) \
952 (CONSTANT_ADDRESS_P (X) \
953 || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
954 || (GET_CODE (X) == PLUS \
955 && GET_CODE (XEXP (X, 0)) == REG \
956 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
957 && ((flag_pic || TARGET_HIMEM) ? \
958 CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1)) \
960 CONSTANT_ADDRESS_P (XEXP (X, 1))) \
961 && (GET_CODE (X) != CONST_INT || NS32K_DISPLACEMENT_P (INTVAL (X)))))
963 /* 1 if integer I will fit in a 4 byte displacement field.
964 Strictly speaking, we can't be sure that a symbol will fit this range.
965 But, in practice, it always will. */
967 /* idall@eleceng.adelaide.edu.au says that the 32016 and 32032
968 can handle the full range of displacements--it is only the addresses
969 that have a limited range. So the following was deleted:
970 (((i) <= 16777215 && (i) >= -16777216)
971 || ((TARGET_32532 || TARGET_32332) && ...)) */
972 #define NS32K_DISPLACEMENT_P(i) \
973 ((i) < (1 << 29) && (i) >= - (1 << 29))
975 /* Check for frame pointer or stack pointer. */
977 (GET_CODE (X) == REG && (REGNO (X) == FRAME_POINTER_REGNUM \
978 || REGNO(X) == STACK_POINTER_REGNUM))
980 /* A memory ref whose address is the FP or SP, with optional integer offset,
981 or (on certain machines) a constant address. */
982 #define INDIRECTABLE_2_ADDRESS_P(X) \
983 (GET_CODE (X) == MEM \
984 && (((xfoo0 = XEXP (X, 0), MEM_REG (xfoo0)) \
985 || (GET_CODE (xfoo0) == PLUS \
986 && MEM_REG (XEXP (xfoo0, 0)) \
987 && CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfoo0, 1)))) \
988 || (TARGET_SB && CONSTANT_ADDRESS_P (xfoo0))))
990 /* Go to ADDR if X is a valid address not using indexing.
991 (This much is the easy part.) */
992 #define GO_IF_NONINDEXED_ADDRESS(X, ADDR) \
994 if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; \
995 if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
996 if (GET_CODE (X) == PLUS) \
997 if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (X, 1))) \
998 if (INDIRECTABLE_2_ADDRESS_P (XEXP (X, 0))) \
1002 /* Go to ADDR if X is a valid address not using indexing.
1003 (This much is the easy part.) */
1004 #define GO_IF_INDEXING(X, MODE, ADDR) \
1005 { register rtx xfoob = (X); \
1006 if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 0), MODE)) \
1007 GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 1), ADDR); \
1008 if (GET_CODE (xfoob) == PLUS && INDEX_TERM_P (XEXP (xfoob, 1), MODE)) \
1009 GO_IF_INDEXABLE_ADDRESS (XEXP (xfoob, 0), ADDR); } \
1011 #define GO_IF_INDEXABLE_ADDRESS(X, ADDR) \
1012 { if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) goto ADDR; \
1013 if (INDIRECTABLE_2_ADDRESS_P (X)) goto ADDR; \
1014 if (INDIRECTABLE_1_ADDRESS_P (X)) goto ADDR; \
1017 /* 1 if PROD is either a reg times size of mode MODE
1018 or just a reg, if MODE is just one byte. Actually, on the ns32k,
1019 since the index mode is independent of the operand size,
1020 we can match more stuff...
1022 This macro's expansion uses the temporary variables xfoo0, xfoo1
1023 and xfoo2 that must be declared in the surrounding context. */
1024 #define INDEX_TERM_P(PROD, MODE) \
1025 ((GET_CODE (PROD) == REG && REG_OK_FOR_INDEX_P (PROD)) \
1026 || (GET_CODE (PROD) == MULT \
1027 && (xfoo0 = XEXP (PROD, 0), xfoo1 = XEXP (PROD, 1), \
1028 (GET_CODE (xfoo1) == CONST_INT \
1029 && GET_CODE (xfoo0) == REG \
1030 && FITS_INDEX_RANGE (INTVAL (xfoo1)) \
1031 && REG_OK_FOR_INDEX_P (xfoo0)))))
1033 #define FITS_INDEX_RANGE(X) \
1034 ((xfoo2 = (unsigned)(X)-1), \
1035 ((xfoo2 < 4 && xfoo2 != 2) || xfoo2 == 7))
1037 /* Note that xfoo0, xfoo1, xfoo2 are used in some of the submacros above. */
1038 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1039 { register rtx xfooy, xfoo0, xfoo1; \
1042 if (flag_pic && cfun && ! current_function_uses_pic_offset_table \
1043 && global_symbolic_reference_mentioned_p (X, 1)) \
1044 current_function_uses_pic_offset_table = 1; \
1045 GO_IF_NONINDEXED_ADDRESS (xfooy, ADDR); \
1046 if (GET_CODE (xfooy) == PLUS) \
1048 if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 1)) \
1049 && GET_CODE (XEXP (xfooy, 0)) == PLUS) \
1050 xfooy = XEXP (xfooy, 0); \
1051 else if (CONSTANT_ADDRESS_NO_LABEL_P (XEXP (xfooy, 0)) \
1052 && GET_CODE (XEXP (xfooy, 1)) == PLUS) \
1053 xfooy = XEXP (xfooy, 1); \
1054 GO_IF_INDEXING (xfooy, MODE, ADDR); \
1056 else if (INDEX_TERM_P (xfooy, MODE)) \
1058 else if (GET_CODE (xfooy) == PRE_DEC) \
1060 if (REGNO (XEXP (xfooy, 0)) == STACK_POINTER_REGNUM) goto ADDR; \
1065 /* Try machine-dependent ways of modifying an illegitimate address
1066 to be legitimate. If we find one, return the new, valid address.
1067 This macro is used in only one place: `memory_address' in explow.c.
1069 OLDX is the address as it was before break_out_memory_refs was called.
1070 In some cases it is useful to look at this to decide what needs to be done.
1072 MODE and WIN are passed so that this macro can use
1073 GO_IF_LEGITIMATE_ADDRESS.
1075 It is always safe for this macro to do nothing. It exists to recognize
1076 opportunities to optimize the output.
1078 For the ns32k, we do nothing */
1080 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
1082 /* Nonzero if the constant value X is a legitimate general operand
1083 when generating PIC code. It is given that flag_pic is on and
1084 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1086 #define LEGITIMATE_PIC_OPERAND_P(X) \
1087 (((! current_function_uses_pic_offset_table \
1088 && symbolic_reference_mentioned_p (X))? \
1089 (current_function_uses_pic_offset_table = 1):0 \
1090 ), (! SYMBOLIC_CONST (X) \
1091 || GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF))
1093 #define SYMBOLIC_CONST(X) \
1094 (GET_CODE (X) == SYMBOL_REF \
1095 || GET_CODE (X) == LABEL_REF \
1096 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1098 /* Go to LABEL if ADDR (a legitimate address expression)
1099 has an effect that depends on the machine mode it is used for.
1100 On the ns32k, only predecrement and postincrement address depend thus
1101 (the amount of decrement or increment being the length of the operand). */
1103 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1104 { if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) \
1107 /* Specify the machine mode that this machine uses
1108 for the index in the tablejump instruction.
1109 HI mode is more efficient but the range is not wide enough for
1111 #define CASE_VECTOR_MODE SImode
1113 /* Define as C expression which evaluates to nonzero if the tablejump
1114 instruction expects the table to contain offsets from the address of the
1116 Do not define this if the table should contain absolute addresses. */
1117 #define CASE_VECTOR_PC_RELATIVE 1
1119 /* Define this as 1 if `char' should by default be signed; else as 0. */
1120 #define DEFAULT_SIGNED_CHAR 1
1122 /* Max number of bytes we can move from memory to memory
1123 in one reasonably fast instruction. */
1126 /* The number of scalar move insns which should be generated instead
1127 of a string move insn or a library call.
1129 We have a smart movstrsi insn */
1130 #define MOVE_RATIO 0
1132 /* Nonzero if access to memory by bytes is slow and undesirable. */
1133 #define SLOW_BYTE_ACCESS 0
1135 /* Define if shifts truncate the shift count
1136 which implies one can omit a sign-extension or zero-extension
1137 of a shift count. */
1138 /* #define SHIFT_COUNT_TRUNCATED */
1140 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1141 is done just by pretending it is already truncated. */
1142 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1144 /* We assume that the store-condition-codes instructions store 0 for false
1145 and some other value for true. This is the value stored for true. */
1147 #define STORE_FLAG_VALUE 1
1149 /* Specify the machine mode that pointers have.
1150 After generation of rtl, the compiler makes no further distinction
1151 between pointers and any other objects of this machine mode. */
1152 #define Pmode SImode
1154 /* A function address in a call instruction
1155 is a byte address (for indexing purposes)
1156 so give the MEM rtx a byte's mode. */
1157 #define FUNCTION_MODE QImode
1159 /* Compute the cost of address ADDRESS. */
1161 #define ADDRESS_COST(RTX) calc_address_cost (RTX)
1163 /* Compute the cost of computing a constant rtl expression RTX
1164 whose rtx-code is CODE. The body of this macro is a portion
1165 of a switch statement. If the code is computed here,
1166 return it with a return statement. Otherwise, break from the switch. */
1168 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1170 if (INTVAL (RTX) <= 7 && INTVAL (RTX) >= -8) return 0; \
1171 if (INTVAL (RTX) < 0x2000 && INTVAL (RTX) >= -0x2000) \
1177 case CONST_DOUBLE: \
1180 /* Tell final.c how to eliminate redundant test instructions. */
1182 /* Here we define machine-dependent flags and fields in cc_status
1183 (see `conditions.h'). */
1185 /* This bit means that what ought to be in the Z bit
1186 should be tested in the F bit. */
1187 #define CC_Z_IN_F 04000
1189 /* This bit means that what ought to be in the Z bit
1190 is complemented in the F bit. */
1191 #define CC_Z_IN_NOT_F 010000
1193 /* This bit means that the L bit indicates unordered (IEEE) comparison.
1195 #define CC_UNORD 020000
1197 /* Store in cc_status the expressions
1198 that the condition codes will describe
1199 after execution of an instruction whose pattern is EXP.
1200 Do not alter them if the instruction would not alter the cc's. */
1202 #define NOTICE_UPDATE_CC(EXP, INSN) \
1203 { if (GET_CODE (EXP) == SET) \
1204 { if (GET_CODE (SET_DEST (EXP)) == CC0) \
1205 { cc_status.flags = 0; \
1206 cc_status.value1 = SET_DEST (EXP); \
1207 cc_status.value2 = SET_SRC (EXP); \
1209 else if (GET_CODE (SET_SRC (EXP)) == CALL) \
1210 { CC_STATUS_INIT; } \
1211 else if (GET_CODE (SET_DEST (EXP)) == REG) \
1212 { if (cc_status.value1 \
1213 && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value1)) \
1214 cc_status.value1 = 0; \
1215 if (cc_status.value2 \
1216 && reg_overlap_mentioned_p (SET_DEST (EXP), cc_status.value2)) \
1217 cc_status.value2 = 0; \
1219 else if (GET_CODE (SET_DEST (EXP)) == MEM) \
1220 { CC_STATUS_INIT; } \
1222 else if (GET_CODE (EXP) == PARALLEL \
1223 && GET_CODE (XVECEXP (EXP, 0, 0)) == SET) \
1224 { if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == CC0) \
1225 { cc_status.flags = 0; \
1226 cc_status.value1 = SET_DEST (XVECEXP (EXP, 0, 0)); \
1227 cc_status.value2 = SET_SRC (XVECEXP (EXP, 0, 0)); \
1229 else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == REG) \
1230 { if (cc_status.value1 \
1231 && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value1)) \
1232 cc_status.value1 = 0; \
1233 if (cc_status.value2 \
1234 && reg_overlap_mentioned_p (SET_DEST (XVECEXP (EXP, 0, 0)), cc_status.value2)) \
1235 cc_status.value2 = 0; \
1237 else if (GET_CODE (SET_DEST (XVECEXP (EXP, 0, 0))) == MEM) \
1238 { CC_STATUS_INIT; } \
1240 else if (GET_CODE (EXP) == CALL) \
1241 { /* all bets are off */ CC_STATUS_INIT; } \
1242 else { /* nothing happens? CC_STATUS_INIT; */} \
1243 if (cc_status.value1 && GET_CODE (cc_status.value1) == REG \
1244 && cc_status.value2 \
1245 && reg_overlap_mentioned_p (cc_status.value1, cc_status.value2)) \
1249 /* Describe the costs of the following register moves which are discouraged:
1250 1.) Moves between the Floating point registers and the frame pointer and stack pointer
1251 2.) Moves between the stack pointer and the frame pointer
1252 3.) Moves between the floating point and general registers
1254 These all involve two memory references. This is worse than a memory
1255 to memory move (default cost 4)
1258 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1259 register_move_cost (CLASS1, CLASS2)
1261 #define OUTPUT_JUMP(NORMAL, NO_OV) \
1262 { if (cc_status.flags & CC_NO_OVERFLOW) \
1266 /* Dividing the output into sections */
1268 /* Output before read-only data. */
1270 #define TEXT_SECTION_ASM_OP "\t.text"
1272 /* Output before writable data. */
1274 #define DATA_SECTION_ASM_OP "\t.data"
1276 /* Define the output Assembly Language */
1278 /* Output at beginning of assembler file. */
1280 #define ASM_FILE_START(FILE) fprintf (FILE, "#NO_APP\n");
1282 /* Output to assembler file text saying following lines
1283 may contain character constants, extra white space, comments, etc. */
1285 #define ASM_APP_ON "#APP\n"
1287 /* Output to assembler file text saying following lines
1288 no longer contain unusual constructs. */
1290 #define ASM_APP_OFF "#NO_APP\n"
1292 /* Output of Data */
1294 /* This is how to output an assembler line defining an external/static
1295 address which is not in tree format (for collect.c). */
1297 /* The prefix to add to user-visible assembler symbols. */
1298 #define USER_LABEL_PREFIX "_"
1300 /* This is how to output an insn to push a register on the stack.
1301 It need not be very fast code. */
1303 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1304 fprintf (FILE, "\tmovd %s,tos\n", reg_names[REGNO])
1306 /* This is how to output an insn to pop a register from the stack.
1307 It need not be very fast code. */
1309 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1310 fprintf (FILE, "\tmovd tos,%s\n", reg_names[REGNO])
1312 /* This is how to output a command to make the user-level label named NAME
1313 defined for reference from other files. */
1315 /* Globalizing directive for a label. */
1316 #define GLOBAL_ASM_OP ".globl "
1318 /* This is how to output an internal numbered label where
1319 PREFIX is the class of label and NUM is the number within the class. */
1321 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1322 fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1324 /* This is how to store into the string LABEL
1325 the symbol_ref name of an internal numbered label where
1326 PREFIX is the class of label and NUM is the number within the class.
1327 This is suitable for output with `assemble_name'. */
1329 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1330 sprintf (LABEL, "*%s%ld", PREFIX, (long) NUM)
1332 /* This is how to align the code that follows an unconditional branch. */
1334 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (2)
1336 /* This is how to output an element of a case-vector that is absolute.
1337 (The ns32k does not use such vectors,
1338 but we must define this macro anyway.) */
1340 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1341 fprintf (FILE, "\t.long L%d\n", VALUE)
1343 /* This is how to output an element of a case-vector that is relative. */
1344 /* ** Notice that the second element is LI format! */
1345 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1346 fprintf (FILE, "\t.long L%d-LI%d\n", VALUE, REL)
1348 /* This is how to output an assembler line
1349 that says to advance the location counter
1350 to a multiple of 2**LOG bytes. */
1352 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1353 fprintf (FILE, "\t.align %d\n", (LOG))
1355 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1356 fprintf (FILE, "\t.space %u\n", (SIZE))
1358 /* This says how to output an assembler line
1359 to define a global common symbol. */
1361 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1362 ( fputs (".comm ", (FILE)), \
1363 assemble_name ((FILE), (NAME)), \
1364 fprintf ((FILE), ",%u\n", (ROUNDED)))
1366 /* This says how to output an assembler line
1367 to define a local common symbol. */
1369 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1370 ( fputs (".lcomm ", (FILE)), \
1371 assemble_name ((FILE), (NAME)), \
1372 fprintf ((FILE), ",%u\n", (ROUNDED)))
1374 /* Store in OUTPUT a string (made with alloca) containing
1375 an assembler-name for a local static variable named NAME.
1376 LABELNO is an integer which is different for each call. */
1378 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1379 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1380 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1382 /* Print an instruction operand X on file FILE.
1383 CODE is the code from the %-spec that requested printing this operand;
1384 if `%z3' was used to print operand 3, then CODE is 'z'. */
1386 /* %$ means print the prefix for an immediate operand. */
1388 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1389 ((CODE) == '$' || (CODE) == '?')
1391 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
1393 /* Print a memory operand whose address is X, on file FILE. */
1395 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address(FILE, ADDR)
1397 extern const unsigned int ns32k_reg_class_contents[N_REG_CLASSES][1];
1398 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER]; /* smallest class containing REGNO */
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