1 ; Options for the MIPS port of the compiler
3 ; Copyright (C) 2005, 2007 Free Software Foundation, Inc.
5 ; This file is part of GCC.
7 ; GCC is free software; you can redistribute it and/or modify it under
8 ; the terms of the GNU General Public License as published by the Free
9 ; Software Foundation; either version 3, or (at your option) any later
12 ; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ; License for more details.
17 ; You should have received a copy of the GNU General Public License
18 ; along with GCC; see the file COPYING3. If not see
19 ; <http://www.gnu.org/licenses/>.
22 Target RejectNegative Joined
23 -mabi=ABI Generate code that conforms to the given ABI
26 Target Report Mask(ABICALLS)
27 Generate code that can be used in SVR4-style dynamic objects
30 Target Report Var(TARGET_MAD)
31 Use PMC-style 'mad' instructions
34 Target RejectNegative Joined Var(mips_arch_string)
35 -march=ISA Generate code for the given ISA
38 Target RejectNegative Joined UInteger Var(mips_branch_cost)
39 -mbranch-cost=COST Set the cost of branches to roughly COST instructions
42 Target Report Mask(BRANCHLIKELY)
43 Use Branch Likely instructions, overriding the architecture default
46 Target Report Var(TARGET_FLIP_MIPS16)
47 Switch on/off MIPS16 ASE on alternating functions for compiler testing
50 Target Report Mask(CHECK_ZERO_DIV)
51 Trap on integer divide by zero
54 Target Report RejectNegative Mask(DIVIDE_BREAKS)
55 Use branch-and-break sequences to check for integer divide by zero
58 Target Report RejectNegative InverseMask(DIVIDE_BREAKS, DIVIDE_TRAPS)
59 Use trap instructions to check for integer divide by zero
62 Target Report RejectNegative Var(TARGET_MDMX)
63 Allow the use of MDMX instructions
66 Target Report RejectNegative InverseMask(SINGLE_FLOAT, DOUBLE_FLOAT)
67 Allow hardware floating-point instructions to cover both 32-bit and 64-bit operations
70 Target Report Mask(DSP)
71 Use MIPS-DSP instructions
74 Target Report Mask(DSPR2)
75 Use MIPS-DSP REV 2 instructions
78 Target Var(TARGET_DEBUG_MODE) Undocumented
81 Target Var(TARGET_DEBUG_D_MODE) Undocumented
84 Target Report RejectNegative Mask(BIG_ENDIAN)
85 Use big-endian byte order
88 Target Report RejectNegative InverseMask(BIG_ENDIAN, LITTLE_ENDIAN)
89 Use little-endian byte order
92 Target Report Var(TARGET_EMBEDDED_DATA)
93 Use ROM instead of RAM
96 Target Report Mask(EXPLICIT_RELOCS)
97 Use NewABI-style %reloc() assembly operators
100 Target Report Var(TARGET_EXTERN_SDATA) Init(1)
101 Use -G for data that is not defined by the current object
104 Target Report Mask(FIX_R4000)
105 Work around certain R4000 errata
108 Target Report Mask(FIX_R4400)
109 Work around certain R4400 errata
112 Target Report Var(TARGET_FIX_SB1)
113 Work around errata for early SB-1 revision 2 cores
116 Target Report Var(TARGET_FIX_VR4120)
117 Work around certain VR4120 errata
120 Target Report Var(TARGET_FIX_VR4130)
121 Work around VR4130 mflo/mfhi errata
124 Target Report Var(TARGET_4300_MUL_FIX)
125 Work around an early 4300 hardware bug
128 Target Report Mask(FP_EXCEPTIONS)
129 FP exceptions are enabled
132 Target Report RejectNegative InverseMask(FLOAT64)
133 Use 32-bit floating-point registers
136 Target Report RejectNegative Mask(FLOAT64)
137 Use 64-bit floating-point registers
140 Target RejectNegative Joined Var(mips_cache_flush_func) Init(CACHE_FLUSH_FUNC)
141 -mflush-func=FUNC Use FUNC to flush the cache before calling stack trampolines
144 Target Report Mask(FUSED_MADD)
145 Generate floating-point multiply-add instructions
148 Target Report RejectNegative InverseMask(64BIT)
149 Use 32-bit general registers
152 Target Report RejectNegative Mask(64BIT)
153 Use 64-bit general registers
156 Target Report Var(TARGET_GPOPT) Init(1)
157 Use GP-relative addressing to access small data
160 Target Report RejectNegative InverseMask(SOFT_FLOAT_ABI, HARD_FLOAT_ABI)
161 Allow the use of hardware floating-point ABI and instructions
164 Target RejectNegative Joined
165 -mipsN Generate code for ISA level N
168 Target Report RejectNegative Mask(MIPS16)
172 Target Report RejectNegative Mask(MIPS3D)
173 Use MIPS-3D instructions
176 Target Report Var(TARGET_LOCAL_SDATA) Init(1)
177 Use -G for object-local data
180 Target Report Var(TARGET_LONG_CALLS)
184 Target Report RejectNegative InverseMask(LONG64, LONG32)
185 Use a 32-bit long type
188 Target Report RejectNegative Mask(LONG64)
189 Use a 64-bit long type
192 Target Report Mask(MEMCPY)
193 Don't optimize block moves
197 Use the mips-tfile postpass
200 Target Report Var(TARGET_MT)
201 Allow the use of MT instructions
204 Target RejectNegative
205 Do not use a cache-flushing function before calling stack trampolines
208 Target Report RejectNegative InverseVar(MDMX)
209 Do not use MDMX instructions
212 Target Report RejectNegative InverseMask(MIPS16)
213 Generate normal-mode code
216 Target Report RejectNegative InverseMask(MIPS3D)
217 Do not use MIPS-3D instructions
220 Target Report Mask(PAIRED_SINGLE_FLOAT)
221 Use paired-single floating-point instructions
224 Target Report Var(TARGET_SHARED) Init(1)
225 When generating -mabicalls code, make the code suitable for use in shared libraries
228 Target Report RejectNegative Mask(SINGLE_FLOAT)
229 Restrict the use of hardware floating-point instructions to 32-bit operations
232 Target Report RejectNegative Mask(SMARTMIPS)
233 Use SmartMIPS instructions
236 Target Report RejectNegative Mask(SOFT_FLOAT_ABI)
237 Prevent the use of all hardware floating-point instructions
240 Target Report Mask(SPLIT_ADDRESSES)
241 Optimize lui/addiu address loads
244 Target Report Var(TARGET_SYM32)
245 Assume all symbols have 32-bit values
248 Target RejectNegative Joined
249 -mcode-readable=SETTING Specify when instructions are allowed to access code
252 Target RejectNegative Joined Var(mips_tune_string)
253 -mtune=PROCESSOR Optimize the output for PROCESSOR
255 muninit-const-in-rodata
256 Target Report Var(TARGET_UNINIT_CONST_IN_RODATA)
257 Put uninitialized constants in ROM (needs -membedded-data)
260 Target Report Mask(VR4130_ALIGN)
261 Perform VR4130-specific alignment optimizations
264 Target Report Var(TARGET_XGOT)
265 Lift restrictions on GOT size