1 /* Definitions of target machine for GNU compiler for
2 Motorola m88100 in an 88open OCS/BCS environment.
3 Copyright (C) 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000
4 Free Software Foundation, Inc.
5 Contributed by Michael Tiemann (tiemann@cygnus.com).
6 Currently maintained by (gcc@dg-rtp.dg.com)
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
25 /* The m88100 port of GNU CC adheres to the various standards from 88open.
26 These documents are available by writing:
28 88open Consortium Ltd.
29 100 Homeland Court, Suite 800
33 In brief, the current standards are:
35 Binary Compatibility Standard, Release 1.1A, May 1991
36 This provides for portability of application-level software at the
37 executable level for AT&T System V Release 3.2.
39 Object Compatibility Standard, Release 1.1A, May 1991
40 This provides for portability of application-level software at the
41 object file and library level for C, Fortran, and Cobol, and again,
44 Under development are standards for AT&T System V Release 4, based on the
45 [generic] System V Application Binary Interface from AT&T. These include:
47 System V Application Binary Interface, Motorola 88000 Processor Supplement
48 Another document from AT&T for SVR4 specific to the m88100.
49 Available from Prentice Hall.
51 System V Application Binary Interface, Motorola 88000 Processor Supplement,
52 Release 1.1, Draft H, May 6, 1991
53 A proposed update to the AT&T document from 88open.
55 System V ABI Implementation Guide for the M88000 Processor,
56 Release 1.0, January 1991
57 A companion ABI document from 88open. */
59 /* Other *.h files in config/m88k include this one and override certain items.
60 Currently these are sysv3.h, sysv4.h, dgux.h, dolph.h, tekXD88.h, and luna.h.
61 Additionally, sysv4.h and dgux.h include svr4.h first. All other
62 m88k targets except luna.h are based on svr3.h. */
64 /* Choose SVR3 as the default. */
65 #if !defined(DBX_DEBUGGING_INFO) && !defined(DWARF_DEBUGGING_INFO)
69 /* External types used. */
71 /* What instructions are needed to manufacture an integer constant. */
72 enum m88k_instruction {
83 /* Which processor to schedule for. The elements of the enumeration
84 must match exactly the cpu attribute in the m88k.md machine description. */
92 /* Recast the cpu class to be the cpu attribute. */
93 #define m88k_cpu_attr ((enum attr_cpu)m88k_cpu)
95 /* External variables/functions defined in m88k.c. */
97 extern const char *m88k_pound_sign;
98 extern const char *m88k_short_data;
99 extern const char *m88k_version;
100 extern char m88k_volatile_code;
102 extern unsigned m88k_gp_threshold;
103 extern int m88k_prologue_done;
104 extern int m88k_function_number;
105 extern int m88k_fp_offset;
106 extern int m88k_stack_size;
107 extern int m88k_case_index;
109 extern struct rtx_def *m88k_compare_reg;
110 extern struct rtx_def *m88k_compare_op0;
111 extern struct rtx_def *m88k_compare_op1;
113 extern enum processor_type m88k_cpu;
115 /* external variables defined elsewhere in the compiler */
117 extern int target_flags; /* -m compiler switches */
118 extern int frame_pointer_needed; /* current function has a FP */
119 extern int flag_delayed_branch; /* -fdelayed-branch */
120 extern int flag_pic; /* -fpic */
122 /* Specify the default monitors. The meaning of these values can
123 be obtained by doing "grep MONITOR_GCC *m88k*". Generally, the
124 values downward from 0x8000 are tests that will soon go away.
125 values upward from 0x1 are generally useful tests that will remain. */
128 #define MONITOR_GCC 0
131 /*** Controlling the Compilation Driver, `gcc' ***/
132 /* Show we can debug even without a frame pointer. */
133 #define CAN_DEBUG_WITHOUT_FP
135 /* If -m88100 is in effect, add -D__m88100__; similarly for -m88110.
136 Here, the CPU_DEFAULT is assumed to be -m88100. */
138 #define CPP_SPEC "%{!m88000:%{!m88100:%{m88110:-D__m88110__}}} \
139 %{!m88000:%{!m88110:-D__m88100__}}"
141 /* LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC defined in svr3.h.
142 ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and STARTFILE_SPEC redefined
144 CPP_SPEC, ASM_SPEC, ASM_FINAL_SPEC, LIB_SPEC, LINK_SPEC, and
145 STARTFILE_SPEC redefined in dgux.h. */
147 /*** Run-time Target Specification ***/
149 /* Names to predefine in the preprocessor for this target machine.
150 Redefined in sysv3.h, sysv4.h, dgux.h, and luna.h. */
151 #define CPP_PREDEFINES "-Dm88000 -Dm88k -Dunix -D__CLASSIFY_TYPE__=2"
153 #define TARGET_VERSION fprintf (stderr, " (%s)", VERSION_INFO1)
155 #ifndef VERSION_INFO1
156 #define VERSION_INFO1 "m88k"
159 /* Run-time compilation parameters selecting different hardware subsets. */
161 /* Macro to define tables used to set the flags.
162 This is a list in braces of pairs in braces,
163 each pair being { "NAME", VALUE }
164 where VALUE is the bits to set or minus the bits to clear.
165 An empty string NAME is used to identify the default VALUE. */
167 #define MASK_88100 0x00000001 /* Target m88100 */
168 #define MASK_88110 0x00000002 /* Target m88110 */
169 #define MASK_88000 (MASK_88100 | MASK_88110)
171 #define MASK_OCS_DEBUG_INFO 0x00000004 /* Emit .tdesc info */
172 #define MASK_OCS_FRAME_POSITION 0x00000008 /* Debug frame = CFA, not r30 */
173 #define MASK_SVR4 0x00000010 /* Target is AT&T System V.4 */
174 #define MASK_SVR3 0x00000020 /* Target is AT&T System V.3 */
175 #define MASK_NO_UNDERSCORES 0x00000040 /* Don't emit a leading `_' */
176 #define MASK_BIG_PIC 0x00000080 /* PIC with large got-rel's -fPIC */
177 #define MASK_TRAP_LARGE_SHIFT 0x00000100 /* Trap if shift not <= 31 */
178 #define MASK_HANDLE_LARGE_SHIFT 0x00000200 /* Handle shift count >= 32 */
179 #define MASK_CHECK_ZERO_DIV 0x00000400 /* Check for int div. by 0 */
180 #define MASK_USE_DIV 0x00000800 /* No signed div. checks */
181 #define MASK_IDENTIFY_REVISION 0x00001000 /* Emit ident, with GCC rev */
182 #define MASK_WARN_PASS_STRUCT 0x00002000 /* Warn about passed structs */
183 #define MASK_OPTIMIZE_ARG_AREA 0x00004000 /* Save stack space */
184 #define MASK_NO_SERIALIZE_VOLATILE 0x00008000 /* Serialize volatile refs */
185 #define MASK_EITHER_LARGE_SHIFT (MASK_TRAP_LARGE_SHIFT | \
186 MASK_HANDLE_LARGE_SHIFT)
187 #define MASK_OMIT_LEAF_FRAME_POINTER 0x00020000 /* omit leaf frame pointers */
190 #define TARGET_88100 ((target_flags & MASK_88000) == MASK_88100)
191 #define TARGET_88110 ((target_flags & MASK_88000) == MASK_88110)
192 #define TARGET_88000 ((target_flags & MASK_88000) == MASK_88000)
194 #define TARGET_OCS_DEBUG_INFO (target_flags & MASK_OCS_DEBUG_INFO)
195 #define TARGET_OCS_FRAME_POSITION (target_flags & MASK_OCS_FRAME_POSITION)
196 #define TARGET_SVR4 (target_flags & MASK_SVR4)
197 #define TARGET_SVR3 (target_flags & MASK_SVR3)
198 #define TARGET_NO_UNDERSCORES (target_flags & MASK_NO_UNDERSCORES)
199 #define TARGET_BIG_PIC (target_flags & MASK_BIG_PIC)
200 #define TARGET_TRAP_LARGE_SHIFT (target_flags & MASK_TRAP_LARGE_SHIFT)
201 #define TARGET_HANDLE_LARGE_SHIFT (target_flags & MASK_HANDLE_LARGE_SHIFT)
202 #define TARGET_CHECK_ZERO_DIV (target_flags & MASK_CHECK_ZERO_DIV)
203 #define TARGET_USE_DIV (target_flags & MASK_USE_DIV)
204 #define TARGET_IDENTIFY_REVISION (target_flags & MASK_IDENTIFY_REVISION)
205 #define TARGET_WARN_PASS_STRUCT (target_flags & MASK_WARN_PASS_STRUCT)
206 #define TARGET_OPTIMIZE_ARG_AREA (target_flags & MASK_OPTIMIZE_ARG_AREA)
207 #define TARGET_SERIALIZE_VOLATILE (!(target_flags & MASK_NO_SERIALIZE_VOLATILE))
209 #define TARGET_EITHER_LARGE_SHIFT (target_flags & MASK_EITHER_LARGE_SHIFT)
210 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
212 /* Redefined in sysv3.h, sysv4.h, and dgux.h. */
213 #define TARGET_DEFAULT (MASK_CHECK_ZERO_DIV)
214 #define CPU_DEFAULT MASK_88100
216 #define TARGET_SWITCHES \
218 { "88110", MASK_88110 }, \
219 { "88100", MASK_88100 }, \
220 { "88000", MASK_88000 }, \
221 { "ocs-debug-info", MASK_OCS_DEBUG_INFO }, \
222 { "no-ocs-debug-info", -MASK_OCS_DEBUG_INFO }, \
223 { "ocs-frame-position", MASK_OCS_FRAME_POSITION }, \
224 { "no-ocs-frame-position", -MASK_OCS_FRAME_POSITION }, \
225 { "svr4", MASK_SVR4 }, \
226 { "svr3", -MASK_SVR4 }, \
227 { "no-underscores", MASK_NO_UNDERSCORES }, \
228 { "big-pic", MASK_BIG_PIC }, \
229 { "trap-large-shift", MASK_TRAP_LARGE_SHIFT }, \
230 { "handle-large-shift", MASK_HANDLE_LARGE_SHIFT }, \
231 { "check-zero-division", MASK_CHECK_ZERO_DIV }, \
232 { "no-check-zero-division", -MASK_CHECK_ZERO_DIV }, \
233 { "use-div-instruction", MASK_USE_DIV }, \
234 { "identify-revision", MASK_IDENTIFY_REVISION }, \
235 { "warn-passed-structs", MASK_WARN_PASS_STRUCT }, \
236 { "optimize-arg-area", MASK_OPTIMIZE_ARG_AREA }, \
237 { "no-optimize-arg-area", -MASK_OPTIMIZE_ARG_AREA }, \
238 { "no-serialize-volatile", MASK_NO_SERIALIZE_VOLATILE }, \
239 { "serialize-volatile", -MASK_NO_SERIALIZE_VOLATILE }, \
240 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
241 { "no-omit-leaf-frame-pointer", -MASK_OMIT_LEAF_FRAME_POINTER }, \
243 /* Default switches */ \
244 { "", TARGET_DEFAULT }, \
247 /* Redefined in dgux.h. */
248 #define SUBTARGET_SWITCHES
250 /* Macro to define table for command options with values. */
252 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data }, \
253 { "version-", &m88k_version } }
255 /* Do any checking or such that is needed after processing the -m switches. */
257 #define OVERRIDE_OPTIONS \
261 if ((target_flags & MASK_88000) == 0) \
262 target_flags |= CPU_DEFAULT; \
266 target_flags |= MASK_USE_DIV; \
267 target_flags &= ~MASK_CHECK_ZERO_DIV; \
270 m88k_cpu = (TARGET_88000 ? PROCESSOR_M88000 \
271 : (TARGET_88100 ? PROCESSOR_M88100 : PROCESSOR_M88110)); \
273 if (TARGET_BIG_PIC) \
276 if ((target_flags & MASK_EITHER_LARGE_SHIFT) == MASK_EITHER_LARGE_SHIFT) \
277 error ("-mtrap-large-shift and -mhandle-large-shift are incompatible");\
281 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) \
283 m88k_pound_sign = "#"; \
287 target_flags |= MASK_SVR3; \
288 target_flags &= ~MASK_SVR4; \
291 if (m88k_short_data) \
293 const char *p = m88k_short_data; \
299 error ("invalid option `-mshort-data-%s'", m88k_short_data); \
302 m88k_gp_threshold = atoi (m88k_short_data); \
303 if (m88k_gp_threshold > 0x7fffffff) \
304 error ("-mshort-data-%s is too large ", m88k_short_data); \
306 error ("-mshort-data-%s and PIC are incompatible", m88k_short_data); \
308 if (TARGET_OMIT_LEAF_FRAME_POINTER) /* keep nonleaf frame pointers */ \
309 flag_omit_frame_pointer = 1; \
312 /*** Storage Layout ***/
314 /* Sizes in bits of the various types. */
315 #define CHAR_TYPE_SIZE 8
316 #define SHORT_TYPE_SIZE 16
317 #define INT_TYPE_SIZE 32
318 #define LONG_TYPE_SIZE 32
319 #define LONG_LONG_TYPE_SIZE 64
320 #define FLOAT_TYPE_SIZE 32
321 #define DOUBLE_TYPE_SIZE 64
322 #define LONG_DOUBLE_TYPE_SIZE 64
324 /* Define this if most significant bit is lowest numbered
325 in instructions that operate on numbered bit-fields.
326 Somewhat arbitrary. It matches the bit field patterns. */
327 #define BITS_BIG_ENDIAN 1
329 /* Define this if most significant byte of a word is the lowest numbered.
330 That is true on the m88000. */
331 #define BYTES_BIG_ENDIAN 1
333 /* Define this if most significant word of a multiword number is the lowest
335 For the m88000 we can decide arbitrarily since there are no machine
336 instructions for them. */
337 #define WORDS_BIG_ENDIAN 1
339 /* Number of bits in an addressable storage unit */
340 #define BITS_PER_UNIT 8
342 /* Width in bits of a "word", which is the contents of a machine register.
343 Note that this is not necessarily the width of data type `int';
344 if using 16-bit ints on a 68000, this would still be 32.
345 But on a machine with 16-bit registers, this would be 16. */
346 #define BITS_PER_WORD 32
348 /* Width of a word, in units (bytes). */
349 #define UNITS_PER_WORD 4
351 /* Width in bits of a pointer.
352 See also the macro `Pmode' defined below. */
353 #define POINTER_SIZE 32
355 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
356 #define PARM_BOUNDARY 32
358 /* Largest alignment for stack parameters (if greater than PARM_BOUNDARY). */
359 #define MAX_PARM_BOUNDARY 64
361 /* Boundary (in *bits*) on which stack pointer should be aligned. */
362 #define STACK_BOUNDARY 128
364 /* Allocation boundary (in *bits*) for the code of a function. On the
365 m88100, it is desirable to align to a cache line. However, SVR3 targets
366 only provided 8 byte alignment. The m88110 cache is small, so align
367 to an 8 byte boundary. Pack code tightly when compiling crtstuff.c. */
368 #define FUNCTION_BOUNDARY (flag_inhibit_size_directive ? 32 : \
369 (TARGET_88100 && TARGET_SVR4 ? 128 : 64))
371 /* No data type wants to be aligned rounder than this. */
372 #define BIGGEST_ALIGNMENT 64
374 /* The best alignment to use in cases where we have a choice. */
375 #define FASTEST_ALIGNMENT (TARGET_88100 ? 32 : 64)
377 /* Make strings 4/8 byte aligned so strcpy from constants will be faster. */
378 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
379 ((TREE_CODE (EXP) == STRING_CST \
380 && (ALIGN) < FASTEST_ALIGNMENT) \
381 ? FASTEST_ALIGNMENT : (ALIGN))
383 /* Make arrays of chars 4/8 byte aligned for the same reasons. */
384 #define DATA_ALIGNMENT(TYPE, ALIGN) \
385 (TREE_CODE (TYPE) == ARRAY_TYPE \
386 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
387 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
389 /* Alignment of field after `int : 0' in a structure.
390 Ignored with PCC_BITFIELD_TYPE_MATTERS. */
391 /* #define EMPTY_FIELD_BOUNDARY 8 */
393 /* Every structure's size must be a multiple of this. */
394 #define STRUCTURE_SIZE_BOUNDARY 8
396 /* Set this nonzero if move instructions will actually fail to work
397 when given unaligned data. */
398 #define STRICT_ALIGNMENT 1
400 /* A bitfield declared as `int' forces `int' alignment for the struct. */
401 #define PCC_BITFIELD_TYPE_MATTERS 1
403 /* Maximum size (in bits) to use for the largest integral type that
404 replaces a BLKmode type. */
405 /* #define MAX_FIXED_MODE_SIZE 0 */
407 /* Check a `double' value for validity for a particular machine mode.
408 This is defined to avoid crashes outputting certain constants.
409 Since we output the number in hex, the assembler won't choke on it. */
410 /* #define CHECK_FLOAT_VALUE(MODE,VALUE) */
412 /* A code distinguishing the floating point format of the target machine. */
413 /* #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT */
415 /*** Register Usage ***/
417 /* Number of actual hardware registers.
418 The hardware registers are assigned numbers for the compiler
419 from 0 to just below FIRST_PSEUDO_REGISTER.
420 All registers that the compiler knows about must be given numbers,
421 even those that are not normally considered general registers.
423 The m88100 has a General Register File (GRF) of 32 32-bit registers.
424 The m88110 adds an Extended Register File (XRF) of 32 80-bit registers. */
425 #define FIRST_PSEUDO_REGISTER 64
426 #define FIRST_EXTENDED_REGISTER 32
428 /* General notes on extended registers, their use and misuse.
432 spill area instead of memory.
433 -waste if only used once
435 floating point calculations
436 -probably a waste unless we have run out of general purpose registers
438 freeing up general purpose registers
439 -e.g. may be able to have more loop invariants if floating
440 point is moved into extended registers.
443 I've noticed wasteful moves into and out of extended registers; e.g. a load
444 into x21, then inside a loop a move into r24, then r24 used as input to
445 an fadd. Why not just load into r24 to begin with? Maybe the new cse.c
446 will address this. This wastes a move, but the load,store and move could
447 have been saved had extended registers been used throughout.
448 E.g. in the code following code, if z and xz are placed in extended
449 registers, there is no need to save preserve registers.
451 long c=1,d=1,e=1,f=1,g=1,h=1,i=1,j=1,k;
460 k = b + c + d + e + f + g + h + a + i + j++;
464 printf("k= %d; z=%f;\n", k, z);
467 I've found that it is possible to change the constraints (putting * before
468 the 'r' constraints int the fadd.ddd instruction) and get the entire
469 addition and store to go into extended registers. However, this also
470 forces simple addition and return of floating point arguments to a
471 function into extended registers. Not the correct solution.
473 Found the following note in local-alloc.c which may explain why I can't
474 get both registers to be in extended registers since two are allocated in
475 local-alloc and one in global-alloc. Doesn't explain (I don't believe)
476 why an extended register is used instead of just using the preserve
480 We have provision to exempt registers, even when they are contained
481 within the block, that can be tied to others that are not contained in it.
482 This is so that global_alloc could process them both and tie them then.
483 But this is currently disabled since tying in global_alloc is not
486 The explanation of why the preserved register is not used is as follows,
487 I believe. The registers are being allocated in order. Tying is not
488 done so efficiently, so when it comes time to do the first allocation,
489 there are no registers left to use without spilling except extended
490 registers. Then when the next pseudo register needs a hard reg, there
491 are still no registers to be had for free, but this one must be a GRF
492 reg instead of an extended reg, so a preserve register is spilled. Thus
493 the move from extended to GRF is necessitated. I do not believe this can
494 be 'fixed' through the files in config/m88k.
496 gcc seems to sometimes make worse use of register allocation -- not counting
497 moves -- whenever extended registers are present. For example in the
498 whetstone, the simple for loop (slightly modified)
499 for(i = 1; i <= n1; i++)
501 x1 = (x1 + x2 + x3 - x4) * t;
502 x2 = (x1 + x2 - x3 + x4) * t;
503 x3 = (x1 - x2 + x3 + x4) * t;
504 x4 = (x1 + x2 + x3 + x4) * t;
506 in general loads the high bits of the addresses of x2-x4 and i into registers
507 outside the loop. Whenever extended registers are used, it loads all of
508 these inside the loop. My conjecture is that since the 88110 has so many
509 registers, and gcc makes no distinction at this point -- just that they are
510 not fixed, that in loop.c it believes it can expect a number of registers
511 to be available. Then it allocates 'too many' in local-alloc which causes
512 problems later. 'Too many' are allocated because a large portion of the
513 registers are extended registers and cannot be used for certain purposes
514 ( e.g. hold the address of a variable). When this loop is compiled on its
515 own, the problem does not occur. I don't know the solution yet, though it
516 is probably in the base sources. Possibly a different way to calculate
519 /* 1 for registers that have pervasive standard uses and are not available
520 for the register allocator. Registers r14-r25 and x22-x29 are expected
521 to be preserved across function calls.
523 On the 88000, the standard uses of the General Register File (GRF) are:
524 Reg 0 = Pseudo argument pointer (hardware fixed to 0).
525 Reg 1 = Subroutine return pointer (hardware).
526 Reg 2-9 = Parameter registers (OCS).
527 Reg 10 = OCS reserved temporary.
528 Reg 11 = Static link if needed [OCS reserved temporary].
529 Reg 12 = Address of structure return (OCS).
530 Reg 13 = OCS reserved temporary.
531 Reg 14-25 = Preserved register set.
532 Reg 26-29 = Reserved by OCS and ABI.
533 Reg 30 = Frame pointer (Common use).
534 Reg 31 = Stack pointer.
536 The following follows the current 88open UCS specification for the
537 Extended Register File (XRF):
538 Reg 32 = x0 Always equal to zero
539 Reg 33-53 = x1-x21 Temporary registers (Caller Save)
540 Reg 54-61 = x22-x29 Preserver registers (Callee Save)
541 Reg 62-63 = x30-x31 Reserved for future ABI use.
543 Note: The current 88110 extended register mapping is subject to change.
544 The bias towards caller-save registers is based on the
545 presumption that memory traffic can potentially be reduced by
546 allowing the "caller" to save only that part of the register
547 which is actually being used. (i.e. don't do a st.x if a st.d
548 is sufficient). Also, in scientific code (a.k.a. Fortran), the
549 large number of variables defined in common blocks may require
550 that almost all registers be saved across calls anyway. */
552 #define FIXED_REGISTERS \
553 {1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
554 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
555 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
556 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
558 /* 1 for registers not available across function calls.
559 These must include the FIXED_REGISTERS and also any
560 registers that can be used without being saved.
561 The latter must include the registers where values are returned
562 and the register where structure-value addresses are passed.
563 Aside from that, you can include as many other registers as you like. */
565 #define CALL_USED_REGISTERS \
566 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
567 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
568 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
569 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1}
571 /* Macro to conditionally modify fixed_regs/call_used_regs. */
572 #define CONDITIONAL_REGISTER_USAGE \
574 if (! TARGET_88110) \
577 for (i = FIRST_EXTENDED_REGISTER; i < FIRST_PSEUDO_REGISTER; i++) \
580 call_used_regs[i] = 1; \
585 /* Current hack to deal with -fpic -O2 problems. */ \
586 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
587 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
588 global_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
592 /* True if register is an extended register. */
593 #define XRF_REGNO_P(N) ((N) < FIRST_PSEUDO_REGISTER && (N) >= FIRST_EXTENDED_REGISTER)
595 /* Return number of consecutive hard regs needed starting at reg REGNO
596 to hold something of mode MODE.
597 This is ordinarily the length in words of a value of mode MODE
598 but can be less for certain modes in special long registers.
600 On the m88000, GRF registers hold 32-bits and XRF registers hold 80-bits.
601 An XRF register can hold any mode, but two GRF registers are required
603 #define HARD_REGNO_NREGS(REGNO, MODE) \
604 (XRF_REGNO_P (REGNO) \
605 ? 1 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
607 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
609 For double integers, we never put the value into an odd register so that
610 the operators don't run into the situation where the high part of one of
611 the inputs is the low part of the result register. (It's ok if the output
612 registers are the same as the input registers.) The XRF registers can
613 hold all modes, but only DF and SF modes can be manipulated in these
614 registers. The compiler should be allowed to use these as a fast spill
616 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
617 (XRF_REGNO_P(REGNO) \
618 ? (TARGET_88110 && GET_MODE_CLASS (MODE) == MODE_FLOAT) \
619 : (((MODE) != DImode && (MODE) != DFmode && (MODE) != DCmode) \
620 || ((REGNO) & 1) == 0))
622 /* Value is 1 if it is a good idea to tie two pseudo registers
623 when one has mode MODE1 and one has mode MODE2.
624 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
625 for any hard reg, then this must be 0 for correct output. */
626 #define MODES_TIEABLE_P(MODE1, MODE2) \
627 (((MODE1) == DFmode || (MODE1) == DCmode || (MODE1) == DImode \
628 || (TARGET_88110 && GET_MODE_CLASS (MODE1) == MODE_FLOAT)) \
629 == ((MODE2) == DFmode || (MODE2) == DCmode || (MODE2) == DImode \
630 || (TARGET_88110 && GET_MODE_CLASS (MODE2) == MODE_FLOAT)))
632 /* Specify the registers used for certain standard purposes.
633 The values of these macros are register numbers. */
635 /* the m88000 pc isn't overloaded on a register that the compiler knows about. */
636 /* #define PC_REGNUM */
638 /* Register to use for pushing function arguments. */
639 #define STACK_POINTER_REGNUM 31
641 /* Base register for access to local variables of the function. */
642 #define FRAME_POINTER_REGNUM 30
644 /* Base register for access to arguments of the function. */
645 #define ARG_POINTER_REGNUM 0
647 /* Register used in cases where a temporary is known to be safe to use. */
648 #define TEMP_REGNUM 10
650 /* Register in which static-chain is passed to a function. */
651 #define STATIC_CHAIN_REGNUM 11
653 /* Register in which address to store a structure value
654 is passed to a function. */
655 #define STRUCT_VALUE_REGNUM 12
657 /* Register to hold the addressing base for position independent
658 code access to data items. */
659 #define PIC_OFFSET_TABLE_REGNUM 25
661 /* Order in which registers are preferred (most to least). Use temp
662 registers, then param registers top down. Preserve registers are
663 top down to maximize use of double memory ops for register save.
664 The 88open reserved registers (r26-r29 and x30-x31) may commonly be used
665 in most environments with the -fcall-used- or -fcall-saved- options. */
666 #define REG_ALLOC_ORDER \
668 13, 12, 11, 10, 29, 28, 27, 26, \
669 62, 63, 9, 8, 7, 6, 5, 4, \
670 3, 2, 1, 53, 52, 51, 50, 49, \
671 48, 47, 46, 45, 44, 43, 42, 41, \
672 40, 39, 38, 37, 36, 35, 34, 33, \
673 25, 24, 23, 22, 21, 20, 19, 18, \
674 17, 16, 15, 14, 61, 60, 59, 58, \
675 57, 56, 55, 54, 30, 31, 0, 32}
677 /* Order for leaf functions. */
678 #define REG_LEAF_ALLOC_ORDER \
680 9, 8, 7, 6, 13, 12, 11, 10, \
681 29, 28, 27, 26, 62, 63, 5, 4, \
682 3, 2, 0, 53, 52, 51, 50, 49, \
683 48, 47, 46, 45, 44, 43, 42, 41, \
684 40, 39, 38, 37, 36, 35, 34, 33, \
685 25, 24, 23, 22, 21, 20, 19, 18, \
686 17, 16, 15, 14, 61, 60, 59, 58, \
687 57, 56, 55, 54, 30, 31, 1, 32}
689 /* Switch between the leaf and non-leaf orderings. The purpose is to avoid
690 write-over scoreboard delays between caller and callee. */
691 #define ORDER_REGS_FOR_LOCAL_ALLOC \
693 static const int leaf[] = REG_LEAF_ALLOC_ORDER; \
694 static const int nonleaf[] = REG_ALLOC_ORDER; \
696 memcpy (reg_alloc_order, regs_ever_live[1] ? nonleaf : leaf, \
697 FIRST_PSEUDO_REGISTER * sizeof (int)); \
700 /*** Register Classes ***/
702 /* Define the classes of registers for register constraints in the
703 machine description. Also define ranges of constants.
705 One of the classes must always be named ALL_REGS and include all hard regs.
706 If there is more than one class, another class must be named NO_REGS
707 and contain no registers.
709 The name GENERAL_REGS must be the name of a class (or an alias for
710 another name such as ALL_REGS). This is the class of registers
711 that is allowed by "g" or "r" in a register constraint.
712 Also, registers outside this class are allocated only when
713 instructions express preferences for them.
715 The classes must be numbered in nondecreasing order; that is,
716 a larger-numbered class must never be contained completely
717 in a smaller-numbered class.
719 For any two classes, it is very desirable that there be another
720 class that represents their union. */
722 /* The m88000 hardware has two kinds of registers. In addition, we denote
723 the arg pointer as a separate class. */
725 enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS,
726 XGRF_REGS, ALL_REGS, LIM_REG_CLASSES };
728 #define N_REG_CLASSES (int) LIM_REG_CLASSES
730 /* Give names of register classes as strings for dump file. */
731 #define REG_CLASS_NAMES {"NO_REGS", "AP_REG", "XRF_REGS", "GENERAL_REGS", \
732 "AGRF_REGS", "XGRF_REGS", "ALL_REGS" }
734 /* Define which registers fit in which classes.
735 This is an initializer for a vector of HARD_REG_SET
736 of length N_REG_CLASSES. */
737 #define REG_CLASS_CONTENTS {{0x00000000, 0x00000000}, \
738 {0x00000001, 0x00000000}, \
739 {0x00000000, 0xffffffff}, \
740 {0xfffffffe, 0x00000000}, \
741 {0xffffffff, 0x00000000}, \
742 {0xfffffffe, 0xffffffff}, \
743 {0xffffffff, 0xffffffff}}
745 /* The same information, inverted:
746 Return the class number of the smallest class containing
747 reg number REGNO. This could be a conditional expression
748 or could index an array. */
749 #define REGNO_REG_CLASS(REGNO) \
750 ((REGNO) ? ((REGNO < 32) ? GENERAL_REGS : XRF_REGS) : AP_REG)
752 /* The class value for index registers, and the one for base regs. */
753 #define BASE_REG_CLASS AGRF_REGS
754 #define INDEX_REG_CLASS GENERAL_REGS
756 /* Get reg_class from a letter such as appears in the machine description.
757 For the 88000, the following class/letter is defined for the XRF:
758 x - Extended register file */
759 #define REG_CLASS_FROM_LETTER(C) \
760 (((C) == 'x') ? XRF_REGS : NO_REGS)
762 /* Macros to check register numbers against specific register classes.
763 These assume that REGNO is a hard or pseudo reg number.
764 They give nonzero only if REGNO is a hard reg of the suitable class
765 or a pseudo reg currently allocated to a suitable hard reg.
766 Since they use reg_renumber, they are safe only once reg_renumber
767 has been allocated, which happens in local-alloc.c. */
768 #define REGNO_OK_FOR_BASE_P(REGNO) \
769 ((REGNO) < FIRST_EXTENDED_REGISTER \
770 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
771 #define REGNO_OK_FOR_INDEX_P(REGNO) \
772 (((REGNO) && (REGNO) < FIRST_EXTENDED_REGISTER) \
773 || (unsigned) reg_renumber[REGNO] < FIRST_EXTENDED_REGISTER)
775 /* Given an rtx X being reloaded into a reg required to be
776 in class CLASS, return the class of reg to actually use.
777 In general this is just CLASS; but on some machines
778 in some cases it is preferable to use a more restrictive class.
779 Double constants should be in a register iff they can be made cheaply. */
780 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
781 (CONSTANT_P(X) && (CLASS == XRF_REGS) ? NO_REGS : (CLASS))
783 /* Return the register class of a scratch register needed to load IN
784 into a register of class CLASS in MODE. On the m88k, when PIC, we
785 need a temporary when loading some addresses into a register. */
786 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
788 && GET_CODE (IN) == CONST \
789 && GET_CODE (XEXP (IN, 0)) == PLUS \
790 && GET_CODE (XEXP (XEXP (IN, 0), 0)) == CONST_INT \
791 && ! SMALL_INT (XEXP (XEXP (IN, 0), 1))) ? GENERAL_REGS : NO_REGS)
793 /* Return the maximum number of consecutive registers
794 needed to represent mode MODE in a register of class CLASS. */
795 #define CLASS_MAX_NREGS(CLASS, MODE) \
796 ((((CLASS) == XRF_REGS) ? 1 \
797 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)))
799 /* Letters in the range `I' through `P' in a register constraint string can
800 be used to stand for particular ranges of immediate operands. The C
801 expression is true iff C is a known letter and VALUE is appropriate for
804 For the m88000, the following constants are used:
805 `I' requires a non-negative 16-bit value.
806 `J' requires a non-positive 16-bit value.
807 `K' requires a non-negative value < 32.
808 `L' requires a constant with only the upper 16-bits set.
809 `M' requires constant values that can be formed with `set'.
810 `N' requires a negative value.
812 `P' requires a non-negative value. */
814 /* Quick tests for certain values. */
815 #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
816 #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
817 #define ADD_INT(X) (ADD_INTVAL (INTVAL (X)))
818 #define ADD_INTVAL(I) ((unsigned) (I) + 0xffff < 0x1ffff)
819 #define POWER_OF_2(I) ((I) && POWER_OF_2_or_0(I))
820 #define POWER_OF_2_or_0(I) (((I) & ((unsigned)(I) - 1)) == 0)
822 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
823 ((C) == 'I' ? SMALL_INTVAL (VALUE) \
824 : (C) == 'J' ? SMALL_INTVAL (-(VALUE)) \
825 : (C) == 'K' ? (unsigned)(VALUE) < 32 \
826 : (C) == 'L' ? ((VALUE) & 0xffff) == 0 \
827 : (C) == 'M' ? integer_ok_for_set (VALUE) \
828 : (C) == 'N' ? (VALUE) < 0 \
829 : (C) == 'O' ? (VALUE) == 0 \
830 : (C) == 'P' ? (VALUE) >= 0 \
833 /* Similar, but for floating constants, and defining letters G and H.
834 Here VALUE is the CONST_DOUBLE rtx itself. For the m88000, the
835 constraints are: `G' requires zero, and `H' requires one or two. */
836 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
837 ((C) == 'G' ? (CONST_DOUBLE_HIGH (VALUE) == 0 \
838 && CONST_DOUBLE_LOW (VALUE) == 0) \
841 /* Letters in the range `Q' through `U' in a register constraint string
842 may be defined in a machine-dependent fashion to stand for arbitrary
845 For the m88k, `Q' handles addresses in a call context. */
847 #define EXTRA_CONSTRAINT(OP, C) \
848 ((C) == 'Q' ? symbolic_address_p (OP) : 0)
850 /*** Describing Stack Layout ***/
852 /* Define this if pushing a word on the stack moves the stack pointer
853 to a smaller address. */
854 #define STACK_GROWS_DOWNWARD
856 /* Define this if the addresses of local variable slots are at negative
857 offsets from the frame pointer. */
858 /* #define FRAME_GROWS_DOWNWARD */
860 /* Offset from the frame pointer to the first local variable slot to be
861 allocated. For the m88k, the debugger wants the return address (r1)
862 stored at location r30+4, and the previous frame pointer stored at
864 #define STARTING_FRAME_OFFSET 8
866 /* If we generate an insn to push BYTES bytes, this says how many the
867 stack pointer really advances by. The m88k has no push instruction. */
868 /* #define PUSH_ROUNDING(BYTES) */
870 /* If defined, the maximum amount of space required for outgoing arguments
871 will be computed and placed into the variable
872 `current_function_outgoing_args_size'. No space will be pushed
873 onto the stack for each call; instead, the function prologue should
874 increase the stack frame size by this amount. */
875 #define ACCUMULATE_OUTGOING_ARGS 1
877 /* Offset from the stack pointer register to the first location at which
878 outgoing arguments are placed. Use the default value zero. */
879 /* #define STACK_POINTER_OFFSET 0 */
881 /* Offset of first parameter from the argument pointer register value.
882 Using an argument pointer, this is 0 for the m88k. GCC knows
883 how to eliminate the argument pointer references if necessary. */
884 #define FIRST_PARM_OFFSET(FNDECL) 0
886 /* Define this if functions should assume that stack space has been
887 allocated for arguments even when their values are passed in
890 The value of this macro is the size, in bytes, of the area reserved for
891 arguments passed in registers.
893 This space can either be allocated by the caller or be a part of the
894 machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE'
896 #define REG_PARM_STACK_SPACE(FNDECL) 32
898 /* Define this macro if REG_PARM_STACK_SPACE is defined but stack
899 parameters don't skip the area specified by REG_PARM_STACK_SPACE.
900 Normally, when a parameter is not passed in registers, it is placed on
901 the stack beyond the REG_PARM_STACK_SPACE area. Defining this macro
902 suppresses this behavior and causes the parameter to be passed on the
903 stack in its natural location. */
904 #define STACK_PARMS_IN_REG_PARM_AREA
906 /* Define this if it is the responsibility of the caller to allocate the
907 area reserved for arguments passed in registers. If
908 `ACCUMULATE_OUTGOING_ARGS' is also defined, the only effect of this
909 macro is to determine whether the space is included in
910 `current_function_outgoing_args_size'. */
911 /* #define OUTGOING_REG_PARM_STACK_SPACE */
913 /* Offset from the stack pointer register to an item dynamically allocated
914 on the stack, e.g., by `alloca'.
916 The default value for this macro is `STACK_POINTER_OFFSET' plus the
917 length of the outgoing arguments. The default is correct for most
918 machines. See `function.c' for details. */
919 /* #define STACK_DYNAMIC_OFFSET(FUNDECL) ... */
921 /* Value is the number of bytes of arguments automatically
922 popped when returning from a subroutine call.
923 FUNDECL is the declaration node of the function (as a tree),
924 FUNTYPE is the data type of the function (as a tree),
925 or for a library call it is an identifier node for the subroutine name.
926 SIZE is the number of bytes of arguments passed on the stack. */
927 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
929 /* Define how to find the value returned by a function.
930 VALTYPE is the data type of the value (as a tree).
931 If the precise function being called is known, FUNC is its FUNCTION_DECL;
932 otherwise, FUNC is 0. */
933 #define FUNCTION_VALUE(VALTYPE, FUNC) \
934 gen_rtx_REG (TYPE_MODE (VALTYPE) == BLKmode ? SImode : TYPE_MODE (VALTYPE), \
937 /* Define this if it differs from FUNCTION_VALUE. */
938 /* #define FUNCTION_OUTGOING_VALUE(VALTYPE, FUNC) ... */
940 /* Disable the promotion of some structures and unions to registers. */
941 #define RETURN_IN_MEMORY(TYPE) \
942 (TYPE_MODE (TYPE) == BLKmode \
943 || ((TREE_CODE (TYPE) == RECORD_TYPE || TREE_CODE(TYPE) == UNION_TYPE) \
944 && !(TYPE_MODE (TYPE) == SImode \
945 || (TYPE_MODE (TYPE) == BLKmode \
946 && TYPE_ALIGN (TYPE) == BITS_PER_WORD \
947 && int_size_in_bytes (TYPE) == UNITS_PER_WORD))))
949 /* Don't default to pcc-struct-return, because we have already specified
950 exactly how to return structures in the RETURN_IN_MEMORY macro. */
951 #define DEFAULT_PCC_STRUCT_RETURN 0
953 /* Define how to find the value returned by a library function
954 assuming the value has mode MODE. */
955 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 2)
957 /* True if N is a possible register number for a function value
958 as seen by the caller. */
959 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2)
961 /* Determine whether a function argument is passed in a register, and
962 which register. See m88k.c. */
963 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
964 m88k_function_arg (CUM, MODE, TYPE, NAMED)
966 /* Define this if it differs from FUNCTION_ARG. */
967 /* #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) ... */
969 /* A C expression for the number of words, at the beginning of an
970 argument, must be put in registers. The value must be zero for
971 arguments that are passed entirely in registers or that are entirely
972 pushed on the stack. */
973 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
975 /* A C expression that indicates when an argument must be passed by
976 reference. If nonzero for an argument, a copy of that argument is
977 made in memory and a pointer to the argument is passed instead of the
978 argument itself. The pointer is passed in whatever way is appropriate
979 for passing a pointer to that type. */
980 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) (0)
982 /* A C type for declaring a variable that is used as the first argument
983 of `FUNCTION_ARG' and other related values. It suffices to count
984 the number of words of argument so far. */
985 #define CUMULATIVE_ARGS int
987 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to a
988 function whose data type is FNTYPE. For a library call, FNTYPE is 0. */
989 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) ((CUM) = 0)
991 /* A C statement (sans semicolon) to update the summarizer variable
992 CUM to advance past an argument in the argument list. The values
993 MODE, TYPE and NAMED describe that argument. Once this is done,
994 the variable CUM is suitable for analyzing the *following* argument
995 with `FUNCTION_ARG', etc. (TYPE is null for libcalls where that
996 information may not be available.) */
997 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
999 enum machine_mode __mode = (TYPE) ? TYPE_MODE (TYPE) : (MODE); \
1001 && (__mode == DImode || __mode == DFmode \
1002 || ((TYPE) && TYPE_ALIGN (TYPE) > BITS_PER_WORD))) \
1004 CUM += (((__mode != BLKmode) \
1005 ? GET_MODE_SIZE (MODE) : int_size_in_bytes (TYPE)) \
1009 /* True if N is a possible register number for function argument passing.
1010 On the m88000, these are registers 2 through 9. */
1011 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 9 && (N) >= 2)
1013 /* A C expression which determines whether, and in which direction,
1014 to pad out an argument with extra space. The value should be of
1015 type `enum direction': either `upward' to pad above the argument,
1016 `downward' to pad below, or `none' to inhibit padding.
1018 This macro does not control the *amount* of padding; that is always
1019 just enough to reach the next multiple of `FUNCTION_ARG_BOUNDARY'. */
1020 #define FUNCTION_ARG_PADDING(MODE, TYPE) \
1021 ((MODE) == BLKmode \
1022 || ((TYPE) && (TREE_CODE (TYPE) == RECORD_TYPE \
1023 || TREE_CODE (TYPE) == UNION_TYPE)) \
1024 ? upward : GET_MODE_BITSIZE (MODE) < PARM_BOUNDARY ? downward : none)
1026 /* If defined, a C expression that gives the alignment boundary, in bits,
1027 of an argument with the specified mode and type. If it is not defined,
1028 `PARM_BOUNDARY' is used for all arguments. */
1029 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1030 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \
1031 ? PARM_BOUNDARY : 2 * PARM_BOUNDARY)
1033 /* Generate necessary RTL for __builtin_saveregs().
1034 ARGLIST is the argument list; see expr.c. */
1035 #define EXPAND_BUILTIN_SAVEREGS() m88k_builtin_saveregs ()
1037 /* Define the `__builtin_va_list' type for the ABI. */
1038 #define BUILD_VA_LIST_TYPE(VALIST) \
1039 (VALIST) = m88k_build_va_list ()
1041 /* Implement `va_start' for varargs and stdarg. */
1042 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
1043 m88k_va_start (stdarg, valist, nextarg)
1045 /* Implement `va_arg'. */
1046 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1047 m88k_va_arg (valist, type)
1049 /* Output assembler code to FILE to increment profiler label # LABELNO
1050 for profiling a function entry. Redefined in sysv3.h, sysv4.h and
1052 #define FUNCTION_PROFILER(FILE, LABELNO) \
1053 output_function_profiler (FILE, LABELNO, "mcount", 1)
1055 /* Maximum length in instructions of the code output by FUNCTION_PROFILER. */
1056 #define FUNCTION_PROFILER_LENGTH (5+3+1+5)
1058 /* Output assembler code to FILE to initialize basic-block profiling for
1059 the current module. LABELNO is unique to each instance. */
1060 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1061 output_function_block_profiler (FILE, LABELNO)
1063 /* Maximum length in instructions of the code output by
1064 FUNCTION_BLOCK_PROFILER. */
1065 #define FUNCTION_BLOCK_PROFILER_LENGTH (3+5+2+5)
1067 /* Output assembler code to FILE to increment the count associated with
1068 the basic block number BLOCKNO. */
1069 #define BLOCK_PROFILER(FILE, BLOCKNO) output_block_profiler (FILE, BLOCKNO)
1071 /* Maximum length in instructions of the code output by BLOCK_PROFILER. */
1072 #define BLOCK_PROFILER_LENGTH 4
1074 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1075 the stack pointer does not matter. The value is tested only in
1076 functions that have frame pointers.
1077 No definition is equivalent to always zero. */
1078 #define EXIT_IGNORE_STACK (1)
1080 /* Value should be nonzero if functions must have frame pointers.
1081 Zero means the frame pointer need not be set up (and parms
1082 may be accessed via the stack pointer) in functions that seem suitable.
1083 This is computed in `reload', in reload1.c. */
1084 #define FRAME_POINTER_REQUIRED \
1085 (current_function_varargs \
1086 || (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ()) \
1087 || (write_symbols != NO_DEBUG && !TARGET_OCS_FRAME_POSITION))
1089 /* Definitions for register eliminations.
1091 We have two registers that can be eliminated on the m88k. First, the
1092 frame pointer register can often be eliminated in favor of the stack
1093 pointer register. Secondly, the argument pointer register can always be
1094 eliminated; it is replaced with either the stack or frame pointer. */
1096 /* This is an array of structures. Each structure initializes one pair
1097 of eliminable registers. The "from" register number is given first,
1098 followed by "to". Eliminations of the same "from" register are listed
1099 in order of preference. */
1100 #define ELIMINABLE_REGS \
1101 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1102 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1103 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1105 /* Given FROM and TO register numbers, say whether this elimination
1107 #define CAN_ELIMINATE(FROM, TO) \
1108 (!((FROM) == FRAME_POINTER_REGNUM && FRAME_POINTER_REQUIRED))
1110 /* Define the offset between two registers, one to be eliminated, and the other
1111 its replacement, at the start of a routine. */
1112 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1113 { m88k_layout_frame (); \
1114 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1115 (OFFSET) = m88k_fp_offset; \
1116 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1117 (OFFSET) = m88k_stack_size - m88k_fp_offset; \
1118 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1119 (OFFSET) = m88k_stack_size; \
1124 /*** Trampolines for Nested Functions ***/
1126 /* Output assembler code for a block containing the constant parts
1127 of a trampoline, leaving space for the variable parts.
1129 This block is placed on the stack and filled in. It is aligned
1130 0 mod 128 and those portions that are executed are constant.
1131 This should work for instruction caches that have cache lines up
1132 to the aligned amount (128 is arbitrary), provided no other code
1133 producer is attempting to play the same game. This of course is
1134 in violation of any number of 88open standards. */
1136 #define TRAMPOLINE_TEMPLATE(FILE) \
1139 static int labelno = 0; \
1141 ASM_GENERATE_INTERNAL_LABEL (buf, "LTRMP", labelno); \
1142 /* Save the return address (r1) in the static chain reg (r11). */ \
1143 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[11], reg_names[1]); \
1144 /* Locate this block; transfer to the next instruction. */ \
1145 fprintf (FILE, "\tbsr\t %s\n", &buf[1]); \
1146 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LTRMP", labelno); \
1147 /* Save r10; use it as the relative pointer; restore r1. */ \
1148 fprintf (FILE, "\tst\t %s,%s,24\n", reg_names[10], reg_names[1]); \
1149 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[10], reg_names[1]); \
1150 fprintf (FILE, "\tor\t %s,%s,0\n", reg_names[1], reg_names[11]); \
1151 /* Load the function's address and go there. */ \
1152 fprintf (FILE, "\tld\t %s,%s,32\n", reg_names[11], reg_names[10]); \
1153 fprintf (FILE, "\tjmp.n\t %s\n", reg_names[11]); \
1154 /* Restore r10 and load the static chain register. */ \
1155 fprintf (FILE, "\tld.d\t %s,%s,24\n", reg_names[10], reg_names[10]); \
1156 /* Storage: r10 save area, static chain, function address. */ \
1157 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
1158 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
1159 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
1162 /* Length in units of the trampoline for entering a nested function.
1163 This is really two components. The first 32 bytes are fixed and
1164 must be copied; the last 12 bytes are just storage that's filled
1165 in later. So for allocation purposes, it's 32+12 bytes, but for
1166 initialization purposes, it's 32 bytes. */
1168 #define TRAMPOLINE_SIZE (32+12)
1170 /* Alignment required for a trampoline. 128 is used to find the
1171 beginning of a line in the instruction cache and to allow for
1172 instruction cache lines of up to 128 bytes. */
1174 #define TRAMPOLINE_ALIGNMENT 128
1176 /* Emit RTL insns to initialize the variable parts of a trampoline.
1177 FNADDR is an RTX for the address of the function's pure code.
1178 CXT is an RTX for the static chain value for the function. */
1180 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1182 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 40)), FNADDR); \
1183 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 36)), CXT); \
1186 /*** Library Subroutine Names ***/
1188 /* Define this macro if GNU CC should generate calls to the System V
1189 (and ANSI C) library functions `memcpy' and `memset' rather than
1190 the BSD functions `bcopy' and `bzero'. */
1191 #define TARGET_MEM_FUNCTIONS
1193 /*** Addressing Modes ***/
1195 #define EXTRA_CC_MODES CC(CCEVENmode, "CCEVEN")
1197 #define SELECT_CC_MODE(OP,X,Y) CCmode
1199 /* #define HAVE_POST_INCREMENT 0 */
1200 /* #define HAVE_POST_DECREMENT 0 */
1202 /* #define HAVE_PRE_DECREMENT 0 */
1203 /* #define HAVE_PRE_INCREMENT 0 */
1205 /* Recognize any constant value that is a valid address.
1206 When PIC, we do not accept an address that would require a scratch reg
1207 to load into a register. */
1209 #define CONSTANT_ADDRESS_P(X) \
1210 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1211 || GET_CODE (X) == CONST_INT || GET_CODE (X) == HIGH \
1212 || (GET_CODE (X) == CONST \
1213 && ! (flag_pic && pic_address_needs_scratch (X))))
1216 /* Maximum number of registers that can appear in a valid memory address. */
1217 #define MAX_REGS_PER_ADDRESS 2
1219 /* The condition for memory shift insns. */
1220 #define SCALED_ADDRESS_P(ADDR) \
1221 (GET_CODE (ADDR) == PLUS \
1222 && (GET_CODE (XEXP (ADDR, 0)) == MULT \
1223 || GET_CODE (XEXP (ADDR, 1)) == MULT))
1225 /* Can the reference to X be made short? */
1226 #define SHORT_ADDRESS_P(X,TEMP) \
1227 ((TEMP) = (GET_CODE (X) == CONST ? get_related_value (X) : X), \
1228 ((TEMP) && GET_CODE (TEMP) == SYMBOL_REF && SYMBOL_REF_FLAG (TEMP)))
1230 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1231 that is a valid memory address for an instruction.
1232 The MODE argument is the machine mode for the MEM expression
1233 that wants to use this address.
1235 On the m88000, a legitimate address has the form REG, REG+REG,
1236 REG+SMALLINT, REG+(REG*modesize) (REG[REG]), or SMALLINT.
1238 The register elimination process should deal with the argument
1239 pointer and frame pointer changing to REG+SMALLINT. */
1241 #define LEGITIMATE_INDEX_P(X, MODE) \
1242 ((GET_CODE (X) == CONST_INT \
1245 && REG_OK_FOR_INDEX_P (X)) \
1246 || (GET_CODE (X) == MULT \
1247 && REG_P (XEXP (X, 0)) \
1248 && REG_OK_FOR_INDEX_P (XEXP (X, 0)) \
1249 && GET_CODE (XEXP (X, 1)) == CONST_INT \
1250 && INTVAL (XEXP (X, 1)) == GET_MODE_SIZE (MODE)))
1252 #define RTX_OK_FOR_BASE_P(X) \
1253 ((GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1254 || (GET_CODE (X) == SUBREG \
1255 && GET_CODE (SUBREG_REG (X)) == REG \
1256 && REG_OK_FOR_BASE_P (SUBREG_REG (X))))
1258 #define RTX_OK_FOR_INDEX_P(X) \
1259 ((GET_CODE (X) == REG && REG_OK_FOR_INDEX_P (X)) \
1260 || (GET_CODE (X) == SUBREG \
1261 && GET_CODE (SUBREG_REG (X)) == REG \
1262 && REG_OK_FOR_INDEX_P (SUBREG_REG (X))))
1264 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1269 if (REG_OK_FOR_BASE_P (X)) \
1272 else if (GET_CODE (X) == PLUS) \
1274 register rtx _x0 = XEXP (X, 0); \
1275 register rtx _x1 = XEXP (X, 1); \
1277 && _x0 == pic_offset_table_rtx \
1279 ? RTX_OK_FOR_BASE_P (_x1) \
1280 : (GET_CODE (_x1) == SYMBOL_REF \
1281 || GET_CODE (_x1) == LABEL_REF))) \
1283 && (REG_OK_FOR_BASE_P (_x0) \
1284 && LEGITIMATE_INDEX_P (_x1, MODE))) \
1286 && (REG_OK_FOR_BASE_P (_x1) \
1287 && LEGITIMATE_INDEX_P (_x0, MODE)))) \
1290 else if (GET_CODE (X) == LO_SUM) \
1292 register rtx _x0 = XEXP (X, 0); \
1293 register rtx _x1 = XEXP (X, 1); \
1295 && REG_OK_FOR_BASE_P (_x0)) \
1296 || (GET_CODE (_x0) == SUBREG \
1297 && REG_P (SUBREG_REG (_x0)) \
1298 && REG_OK_FOR_BASE_P (SUBREG_REG (_x0)))) \
1299 && CONSTANT_P (_x1)) \
1302 else if (GET_CODE (X) == CONST_INT \
1305 else if (SHORT_ADDRESS_P (X, _x)) \
1309 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1310 and check its validity for a certain class.
1311 We have two alternate definitions for each of them.
1312 The usual definition accepts all pseudo regs; the other rejects
1313 them unless they have been allocated suitable hard regs.
1314 The symbol REG_OK_STRICT causes the latter definition to be used.
1316 Most source files want to accept pseudo regs in the hope that
1317 they will get allocated to the class that the insn wants them to be in.
1318 Source files for reload pass need to be strict.
1319 After reload, it makes no difference, since pseudo regs have
1320 been eliminated by then. */
1322 #ifndef REG_OK_STRICT
1324 /* Nonzero if X is a hard reg that can be used as an index
1325 or if it is a pseudo reg. Not the argument pointer. */
1326 #define REG_OK_FOR_INDEX_P(X) \
1327 (!XRF_REGNO_P(REGNO (X)))
1328 /* Nonzero if X is a hard reg that can be used as a base reg
1329 or if it is a pseudo reg. */
1330 #define REG_OK_FOR_BASE_P(X) (REG_OK_FOR_INDEX_P (X))
1334 /* Nonzero if X is a hard reg that can be used as an index. */
1335 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1336 /* Nonzero if X is a hard reg that can be used as a base reg. */
1337 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1341 /* Try machine-dependent ways of modifying an illegitimate address
1342 to be legitimate. If we find one, return the new, valid address.
1343 This macro is used in only one place: `memory_address' in explow.c.
1345 OLDX is the address as it was before break_out_memory_refs was called.
1346 In some cases it is useful to look at this to decide what needs to be done.
1348 MODE and WIN are passed so that this macro can use
1349 GO_IF_LEGITIMATE_ADDRESS.
1351 It is always safe for this macro to do nothing. It exists to recognize
1352 opportunities to optimize the output. */
1354 /* On the m88000, change REG+N into REG+REG, and REG+(X*Y) into REG+REG. */
1356 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1358 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
1359 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
1360 copy_to_mode_reg (SImode, XEXP (X, 1))); \
1361 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
1362 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
1363 copy_to_mode_reg (SImode, XEXP (X, 0))); \
1364 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
1365 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
1366 force_operand (XEXP (X, 0), 0)); \
1367 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
1368 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
1369 force_operand (XEXP (X, 1), 0)); \
1370 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == PLUS) \
1371 (X) = gen_rtx_PLUS (Pmode, force_operand (XEXP (X, 0), NULL_RTX),\
1373 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == PLUS) \
1374 (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \
1375 force_operand (XEXP (X, 1), NULL_RTX)); \
1376 if (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST \
1377 || GET_CODE (X) == LABEL_REF) \
1378 (X) = legitimize_address (flag_pic, X, 0, 0); \
1379 if (memory_address_p (MODE, X)) \
1382 /* Go to LABEL if ADDR (a legitimate address expression)
1383 has an effect that depends on the machine mode it is used for.
1384 On the m88000 this is never true. */
1386 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)
1388 /* Nonzero if the constant value X is a legitimate general operand.
1389 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1390 #define LEGITIMATE_CONSTANT_P(X) (1)
1392 /* Define this, so that when PIC, reload won't try to reload invalid
1393 addresses which require two reload registers. */
1395 #define LEGITIMATE_PIC_OPERAND_P(X) (! pic_address_needs_scratch (X))
1398 /*** Condition Code Information ***/
1400 /* C code for a data type which is used for declaring the `mdep'
1401 component of `cc_status'. It defaults to `int'. */
1402 /* #define CC_STATUS_MDEP int */
1404 /* A C expression to initialize the `mdep' field to "empty". */
1405 /* #define CC_STATUS_MDEP_INIT (cc_status.mdep = 0) */
1407 /* Macro to zap the normal portions of CC_STATUS, but leave the
1408 machine dependent parts (ie, literal synthesis) alone. */
1409 /* #define CC_STATUS_INIT_NO_MDEP \
1410 (cc_status.flags = 0, cc_status.value1 = 0, cc_status.value2 = 0) */
1412 /* When using a register to hold the condition codes, the cc_status
1413 mechanism cannot be used. */
1414 #define NOTICE_UPDATE_CC(EXP, INSN) (0)
1416 /*** Miscellaneous Parameters ***/
1418 /* Define the codes that are matched by predicates in m88k.c. */
1419 #define PREDICATE_CODES \
1420 {"move_operand", {SUBREG, REG, CONST_INT, LO_SUM, MEM}}, \
1421 {"call_address_operand", {SUBREG, REG, SYMBOL_REF, LABEL_REF, CONST}}, \
1422 {"arith_operand", {SUBREG, REG, CONST_INT}}, \
1423 {"arith5_operand", {SUBREG, REG, CONST_INT}}, \
1424 {"arith32_operand", {SUBREG, REG, CONST_INT}}, \
1425 {"arith64_operand", {SUBREG, REG, CONST_INT}}, \
1426 {"int5_operand", {CONST_INT}}, \
1427 {"int32_operand", {CONST_INT}}, \
1428 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1429 {"reg_or_bbx_mask_operand", {SUBREG, REG, CONST_INT}}, \
1430 {"real_or_0_operand", {SUBREG, REG, CONST_DOUBLE}}, \
1431 {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
1432 {"relop", {EQ, NE, LT, LE, GE, GT, LTU, LEU, GEU, GTU}}, \
1433 {"even_relop", {EQ, LT, GT, LTU, GTU}}, \
1434 {"odd_relop", { NE, LE, GE, LEU, GEU}}, \
1435 {"partial_ccmode_register_operand", { SUBREG, REG}}, \
1436 {"relop_no_unsigned", {EQ, NE, LT, LE, GE, GT}}, \
1437 {"equality_op", {EQ, NE}}, \
1438 {"pc_or_label_ref", {PC, LABEL_REF}},
1440 /* A list of predicates that do special things with modes, and so
1441 should not elicit warnings for VOIDmode match_operand. */
1443 #define SPECIAL_MODE_PREDICATES \
1444 "partial_ccmode_register_operand", \
1447 /* The case table contains either words or branch instructions. This says
1448 which. We always claim that the vector is PC-relative. It is position
1449 independent when -fpic is used. */
1450 #define CASE_VECTOR_INSNS (TARGET_88100 || flag_pic)
1452 /* An alias for a machine mode name. This is the machine mode that
1453 elements of a jump-table should have. */
1454 #define CASE_VECTOR_MODE SImode
1456 /* Define as C expression which evaluates to nonzero if the tablejump
1457 instruction expects the table to contain offsets from the address of the
1459 Do not define this if the table should contain absolute addresses. */
1460 #define CASE_VECTOR_PC_RELATIVE 1
1462 /* Define this if control falls through a `case' insn when the index
1463 value is out of range. This means the specified default-label is
1464 actually ignored by the `case' insn proper. */
1465 /* #define CASE_DROPS_THROUGH */
1467 /* Define this to be the smallest number of different values for which it
1468 is best to use a jump-table instead of a tree of conditional branches.
1469 The default is 4 for machines with a casesi instruction and 5 otherwise.
1470 The best 88110 number is around 7, though the exact number isn't yet
1471 known. A third alternative for the 88110 is to use a binary tree of
1472 bb1 instructions on bits 2/1/0 if the range is dense. This may not
1473 win very much though. */
1474 #define CASE_VALUES_THRESHOLD (TARGET_88100 ? 4 : 7)
1476 /* Specify the tree operation to be used to convert reals to integers. */
1477 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1479 /* This is the kind of divide that is easiest to do in the general case. */
1480 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1482 /* Define this as 1 if `char' should by default be signed; else as 0. */
1483 #define DEFAULT_SIGNED_CHAR 1
1485 /* The 88open ABI says size_t is unsigned int. */
1486 #define SIZE_TYPE "unsigned int"
1488 /* Allow and ignore #sccs directives */
1489 #define SCCS_DIRECTIVE
1491 /* Handle #pragma pack and sometimes #pragma weak. */
1492 #define HANDLE_SYSV_PRAGMA
1494 /* Tell when to handle #pragma weak. This is only done for V.4. */
1495 #define SUPPORTS_WEAK TARGET_SVR4
1496 #define SUPPORTS_ONE_ONLY TARGET_SVR4
1498 /* Max number of bytes we can move from memory to memory
1499 in one reasonably fast instruction. */
1502 /* Define if normal loads of shorter-than-word items from memory clears
1503 the rest of the bigs in the register. */
1504 #define BYTE_LOADS_ZERO_EXTEND
1506 /* Zero if access to memory by bytes is faster. */
1507 #define SLOW_BYTE_ACCESS 1
1509 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1510 is done just by pretending it is already truncated. */
1511 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1513 /* Define this if addresses of constant functions
1514 shouldn't be put through pseudo regs where they can be cse'd.
1515 Desirable on machines where ordinary constants are expensive
1516 but a CALL with constant address is cheap. */
1517 #define NO_FUNCTION_CSE
1519 /* Define this macro if an argument declared as `char' or
1520 `short' in a prototype should actually be passed as an
1521 `int'. In addition to avoiding errors in certain cases of
1522 mismatch, it also makes for better code on certain machines. */
1523 #define PROMOTE_PROTOTYPES 1
1525 /* Define this macro if a float function always returns float
1526 (even in traditional mode). Redefined in luna.h. */
1527 #define TRADITIONAL_RETURN_FLOAT
1529 /* We assume that the store-condition-codes instructions store 0 for false
1530 and some other value for true. This is the value stored for true. */
1531 #define STORE_FLAG_VALUE (-1)
1533 /* Specify the machine mode that pointers have.
1534 After generation of rtl, the compiler makes no further distinction
1535 between pointers and any other objects of this machine mode. */
1536 #define Pmode SImode
1538 /* A function address in a call instruction
1539 is a word address (for indexing purposes)
1540 so give the MEM rtx word mode. */
1541 #define FUNCTION_MODE SImode
1543 /* A barrier will be aligned so account for the possible expansion.
1544 A volatile load may be preceded by a serializing instruction.
1545 Account for profiling code output at NOTE_INSN_PROLOGUE_END.
1546 Account for block profiling code at basic block boundaries. */
1547 #define ADJUST_INSN_LENGTH(RTX, LENGTH) \
1548 if (GET_CODE (RTX) == BARRIER \
1549 || (TARGET_SERIALIZE_VOLATILE \
1550 && GET_CODE (RTX) == INSN \
1551 && GET_CODE (PATTERN (RTX)) == SET \
1552 && ((GET_CODE (SET_SRC (PATTERN (RTX))) == MEM \
1553 && MEM_VOLATILE_P (SET_SRC (PATTERN (RTX))))))) \
1555 else if (GET_CODE (RTX) == NOTE \
1556 && NOTE_LINE_NUMBER (RTX) == NOTE_INSN_PROLOGUE_END) \
1559 LENGTH += (FUNCTION_PROFILER_LENGTH + REG_PUSH_LENGTH \
1560 + REG_POP_LENGTH); \
1563 /* Track the state of the last volatile memory reference. Clear the
1564 state with CC_STATUS_INIT for now. */
1565 #define CC_STATUS_INIT m88k_volatile_code = '\0'
1567 /* Compute the cost of computing a constant rtl expression RTX
1568 whose rtx-code is CODE. The body of this macro is a portion
1569 of a switch statement. If the code is computed here,
1570 return it with a return statement. Otherwise, break from the switch.
1572 We assume that any 16 bit integer can easily be recreated, so we
1573 indicate 0 cost, in an attempt to get GCC not to optimize things
1574 like comparison against a constant.
1576 The cost of CONST_DOUBLE is zero (if it can be placed in an insn, it
1577 is as good as a register; since it can't be placed in any insn, it
1578 won't do anything in cse, but it will cause expand_binop to pass the
1579 constant to the define_expands). */
1580 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1582 if (SMALL_INT (RTX)) \
1584 else if (SMALL_INTVAL (- INTVAL (RTX))) \
1586 else if (classify_integer (SImode, INTVAL (RTX)) != m88k_oru_or) \
1595 return (flag_pic == 2) ? 11 : 8; \
1597 case CONST_DOUBLE: \
1600 /* Provide the costs of an addressing mode that contains ADDR.
1601 If ADDR is not a valid address, its cost is irrelevant.
1602 REG+REG is made slightly more expensive because it might keep
1603 a register live for longer than we might like. */
1604 #define ADDRESS_COST(ADDR) \
1605 (GET_CODE (ADDR) == REG ? 1 : \
1606 GET_CODE (ADDR) == LO_SUM ? 1 : \
1607 GET_CODE (ADDR) == HIGH ? 2 : \
1608 GET_CODE (ADDR) == MULT ? 1 : \
1609 GET_CODE (ADDR) != PLUS ? 4 : \
1610 (REG_P (XEXP (ADDR, 0)) && REG_P (XEXP (ADDR, 1))) ? 2 : 1)
1612 /* Provide the costs of a rtl expression. This is in the body of a
1614 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1616 return COSTS_N_INSNS (2); \
1618 return COSTS_N_INSNS (3); \
1623 return COSTS_N_INSNS (38);
1625 /* A C expressions returning the cost of moving data of MODE from a register
1626 to or from memory. This is more costly than between registers. */
1627 #define MEMORY_MOVE_COST(MODE,CLASS,IN) 4
1629 /* Provide the cost of a branch. Exact meaning under development. */
1630 #define BRANCH_COST (TARGET_88100 ? 1 : 2)
1632 /* Do not break .stabs pseudos into continuations. */
1633 #define DBX_CONTIN_LENGTH 0
1635 /*** Output of Assembler Code ***/
1637 /* Control the assembler format that we output. */
1639 /* A C string constant describing how to begin a comment in the target
1640 assembler language. The compiler assumes that the comment will end at
1641 the end of the line. */
1642 #define ASM_COMMENT_START ";"
1644 /* Allow pseudo-ops to be overridden. Override these in svr[34].h. */
1645 #undef ASCII_DATA_ASM_OP
1646 #undef CONST_SECTION_ASM_OP
1647 #undef CTORS_SECTION_ASM_OP
1648 #undef DTORS_SECTION_ASM_OP
1649 #undef TARGET_ASM_NAMED_SECTION
1650 #undef INIT_SECTION_ASM_OP
1651 #undef FINI_SECTION_ASM_OP
1656 #undef COMMON_ASM_OP
1660 /* These are used in varasm.c as well. */
1661 #define TEXT_SECTION_ASM_OP "\ttext"
1662 #define DATA_SECTION_ASM_OP "\tdata"
1664 /* Other sections. */
1665 #define CONST_SECTION_ASM_OP (TARGET_SVR4 \
1666 ? "\tsection\t .rodata,\"a\"" \
1667 : "\tsection\t .rodata,\"x\"")
1668 #define TDESC_SECTION_ASM_OP (TARGET_SVR4 \
1669 ? "\tsection\t .tdesc,\"a\"" \
1670 : "\tsection\t .tdesc,\"x\"")
1672 /* These must be constant strings for crtstuff.c. */
1673 #define CTORS_SECTION_ASM_OP "\tsection\t .ctors,\"d\""
1674 #define DTORS_SECTION_ASM_OP "\tsection\t .dtors,\"d\""
1675 #define INIT_SECTION_ASM_OP "\tsection\t .init,\"x\""
1676 #define FINI_SECTION_ASM_OP "\tsection\t .fini,\"x\""
1678 /* These are pretty much common to all assemblers. */
1679 #define IDENT_ASM_OP "\tident\t"
1680 #define FILE_ASM_OP "\tfile\t"
1681 #define SECTION_ASM_OP "\tsection\t"
1682 #define SET_ASM_OP "\tdef\t"
1683 #define GLOBAL_ASM_OP "\tglobal\t"
1684 #define ALIGN_ASM_OP "\talign\t"
1685 #define SKIP_ASM_OP "\tzero\t"
1686 #define COMMON_ASM_OP "\tcomm\t"
1687 #define BSS_ASM_OP "\tbss\t"
1688 #define FLOAT_ASM_OP "\tfloat\t"
1689 #define DOUBLE_ASM_OP "\tdouble\t"
1690 #define ASCII_DATA_ASM_OP "\tstring\t"
1692 /* These are particular to the global pool optimization. */
1693 #define SBSS_ASM_OP "\tsbss\t"
1694 #define SCOMM_ASM_OP "\tscomm\t"
1695 #define SDATA_SECTION_ASM_OP "\tsdata"
1697 /* These are specific to PIC. */
1698 #define TYPE_ASM_OP "\ttype\t"
1699 #define SIZE_ASM_OP "\tsize\t"
1700 #ifndef AS_BUG_POUND_TYPE /* Faulty assemblers require @ rather than #. */
1701 #undef TYPE_OPERAND_FMT
1702 #define TYPE_OPERAND_FMT "#%s"
1705 /* This is how we tell the assembler that a symbol is weak. */
1707 #undef ASM_WEAKEN_LABEL
1708 #define ASM_WEAKEN_LABEL(FILE,NAME) \
1709 do { fputs ("\tweak\t", FILE); assemble_name (FILE, NAME); \
1710 fputc ('\n', FILE); } while (0)
1712 /* These are specific to version 03.00 assembler syntax. */
1713 #define INTERNAL_ASM_OP "\tlocal\t"
1714 #define VERSION_ASM_OP "\tversion\t"
1715 #define PUSHSECTION_ASM_OP "\tsection\t"
1716 #define POPSECTION_ASM_OP "\tprevious"
1718 /* These are specific to the version 04.00 assembler syntax. */
1719 #define REQUIRES_88110_ASM_OP "\trequires_88110"
1721 /* Output any initial stuff to the assembly file. Always put out
1722 a file directive, even if not debugging.
1724 Immediately after putting out the file, put out a "sem.<value>"
1725 declaration. This should be harmless on other systems, and
1726 is used in DG/UX by the debuggers to supplement COFF. The
1727 fields in the integer value are as follows:
1731 0-1 0 No information about stack locations
1732 1 Auto/param locations are based on r30
1733 2 Auto/param locations are based on CFA
1735 3-2 0 No information on dimension order
1736 1 Array dims in sym table matches source language
1737 2 Array dims in sym table is in reverse order
1739 5-4 0 No information about the case of global names
1740 1 Global names appear in the symbol table as in the source
1741 2 Global names have been converted to lower case
1742 3 Global names have been converted to upper case. */
1744 #ifdef SDB_DEBUGGING_INFO
1745 #define ASM_COFFSEM(FILE) \
1746 if (write_symbols == SDB_DEBUG) \
1748 fprintf (FILE, "\nsem.%x:\t\t; %s\n", \
1749 (((TARGET_OCS_FRAME_POSITION) ? 2 : 1) << 0) + (1 << 2) + (1 << 4),\
1750 (TARGET_OCS_FRAME_POSITION) \
1751 ? "frame is CFA, normal array dims, case unchanged" \
1752 : "frame is r30, normal array dims, case unchanged"); \
1755 #define ASM_COFFSEM(FILE)
1758 /* Output the first line of the assembly file. Redefined in dgux.h. */
1760 #define ASM_FIRST_LINE(FILE) \
1765 fprintf (FILE, "%s\"%s\"\n", VERSION_ASM_OP, "04.00"); \
1767 fprintf (FILE, "%s\"%s\"\n", VERSION_ASM_OP, "03.00"); \
1771 /* Override svr[34].h. */
1772 #undef ASM_FILE_START
1773 #define ASM_FILE_START(FILE) \
1774 output_file_start (FILE, \
1775 (struct m88k_lang_independent_options *) f_options, \
1776 ARRAY_SIZE (f_options), \
1777 (struct m88k_lang_independent_options *) W_options, \
1778 ARRAY_SIZE (W_options))
1782 #define ASM_OUTPUT_SOURCE_FILENAME(FILE, NAME) \
1783 fprintf (FILE, "%s\"%s\"\n", FILE_ASM_OP, NAME)
1785 #ifdef SDB_DEBUGGING_INFO
1786 #undef ASM_OUTPUT_SOURCE_LINE
1787 #define ASM_OUTPUT_SOURCE_LINE(FILE, LINE) \
1788 if (m88k_prologue_done) \
1789 fprintf (FILE, "\n\tln\t %d\t\t\t\t; Real source line %d\n",\
1790 LINE - sdb_begin_function_line, LINE)
1793 /* Code to handle #ident directives. Override svr[34].h definition. */
1794 #undef ASM_OUTPUT_IDENT
1795 #ifdef DBX_DEBUGGING_INFO
1796 #define ASM_OUTPUT_IDENT(FILE, NAME)
1798 #define ASM_OUTPUT_IDENT(FILE, NAME) \
1799 output_ascii (FILE, IDENT_ASM_OP, 4000, NAME, strlen (NAME));
1802 /* Output to assembler file text saying following lines
1803 may contain character constants, extra white space, comments, etc. */
1804 #define ASM_APP_ON ""
1806 /* Output to assembler file text saying following lines
1807 no longer contain unusual constructs. */
1808 #define ASM_APP_OFF ""
1810 /* Format the assembly opcode so that the arguments are all aligned.
1811 The maximum instruction size is 8 characters (fxxx.xxx), so a tab and a
1812 space will do to align the output. Abandon the output if a `%' is
1814 #define ASM_OUTPUT_OPCODE(STREAM, PTR) \
1817 const char *orig_ptr; \
1819 for (orig_ptr = (PTR); \
1820 (ch = *(PTR)) && ch != ' ' && ch != '\t' && ch != '\n' && ch != '%'; \
1822 putc (ch, STREAM); \
1824 if (ch == ' ' && orig_ptr != (PTR) && (PTR) - orig_ptr < 8) \
1825 putc ('\t', STREAM); \
1828 /* How to refer to registers in assembler output.
1829 This sequence is indexed by compiler's hard-register-number.
1830 Updated by OVERRIDE_OPTIONS to include the # for version 03.00 syntax. */
1832 #define REGISTER_NAMES \
1833 {"#r0"+1, "#r1"+1, "#r2"+1, "#r3"+1, "#r4"+1, "#r5"+1, "#r6"+1, "#r7"+1, \
1834 "#r8"+1, "#r9"+1, "#r10"+1,"#r11"+1,"#r12"+1,"#r13"+1,"#r14"+1,"#r15"+1,\
1835 "#r16"+1,"#r17"+1,"#r18"+1,"#r19"+1,"#r20"+1,"#r21"+1,"#r22"+1,"#r23"+1,\
1836 "#r24"+1,"#r25"+1,"#r26"+1,"#r27"+1,"#r28"+1,"#r29"+1,"#r30"+1,"#r31"+1,\
1837 "#x0"+1, "#x1"+1, "#x2"+1, "#x3"+1, "#x4"+1, "#x5"+1, "#x6"+1, "#x7"+1, \
1838 "#x8"+1, "#x9"+1, "#x10"+1,"#x11"+1,"#x12"+1,"#x13"+1,"#x14"+1,"#x15"+1,\
1839 "#x16"+1,"#x17"+1,"#x18"+1,"#x19"+1,"#x20"+1,"#x21"+1,"#x22"+1,"#x23"+1,\
1840 "#x24"+1,"#x25"+1,"#x26"+1,"#x27"+1,"#x28"+1,"#x29"+1,"#x30"+1,"#x31"+1}
1842 /* Define additional names for use in asm clobbers and asm declarations.
1844 We define the fake Condition Code register as an alias for reg 0 (which
1845 is our `condition code' register), so that condition codes can easily
1846 be clobbered by an asm. The carry bit in the PSR is now used. */
1848 #define ADDITIONAL_REGISTER_NAMES {{"psr", 0}, {"cc", 0}}
1850 /* Tell when to declare ASM names. Override svr4.h to provide this hook. */
1851 #undef DECLARE_ASM_NAME
1852 #define DECLARE_ASM_NAME TARGET_SVR4
1854 /* Write the extra assembler code needed to declare a function properly. */
1855 #undef ASM_DECLARE_FUNCTION_NAME
1856 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1858 if (DECLARE_ASM_NAME) \
1860 fprintf (FILE, "%s", TYPE_ASM_OP); \
1861 assemble_name (FILE, NAME); \
1863 fprintf (FILE, TYPE_OPERAND_FMT, "function"); \
1864 putc ('\n', FILE); \
1866 ASM_OUTPUT_LABEL(FILE, NAME); \
1869 /* Write the extra assembler code needed to declare an object properly. */
1870 #undef ASM_DECLARE_OBJECT_NAME
1871 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL) \
1873 if (DECLARE_ASM_NAME) \
1875 fprintf (FILE, "%s", TYPE_ASM_OP); \
1876 assemble_name (FILE, NAME); \
1878 fprintf (FILE, TYPE_OPERAND_FMT, "object"); \
1879 putc ('\n', FILE); \
1880 size_directive_output = 0; \
1881 if (!flag_inhibit_size_directive && DECL_SIZE (DECL)) \
1883 size_directive_output = 1; \
1884 fprintf (FILE, "%s", SIZE_ASM_OP); \
1885 assemble_name (FILE, NAME); \
1886 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
1889 ASM_OUTPUT_LABEL(FILE, NAME); \
1892 /* Output the size directive for a decl in rest_of_decl_compilation
1893 in the case where we did not do so before the initializer.
1894 Once we find the error_mark_node, we know that the value of
1895 size_directive_output was set
1896 by ASM_DECLARE_OBJECT_NAME when it was run for the same decl. */
1898 #undef ASM_FINISH_DECLARE_OBJECT
1899 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END) \
1901 const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0); \
1902 if (!flag_inhibit_size_directive && DECL_SIZE (DECL) \
1903 && DECLARE_ASM_NAME \
1904 && ! AT_END && TOP_LEVEL \
1905 && DECL_INITIAL (DECL) == error_mark_node \
1906 && !size_directive_output) \
1908 size_directive_output = 1; \
1909 fprintf (FILE, "%s", SIZE_ASM_OP); \
1910 assemble_name (FILE, name); \
1911 fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL))); \
1915 /* This is how to declare the size of a function. */
1916 #undef ASM_DECLARE_FUNCTION_SIZE
1917 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL) \
1919 if (DECLARE_ASM_NAME) \
1921 if (!flag_inhibit_size_directive) \
1924 static int labelno = 0; \
1926 ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno); \
1927 ASM_OUTPUT_INTERNAL_LABEL (FILE, "Lfe", labelno); \
1928 fprintf (FILE, "%s", SIZE_ASM_OP); \
1929 assemble_name (FILE, (FNAME)); \
1930 fprintf (FILE, ",%s-", &label[1]); \
1931 assemble_name (FILE, (FNAME)); \
1932 putc ('\n', FILE); \
1937 /* This is how to output the definition of a user-level label named NAME,
1938 such as the label on a static function or variable NAME. */
1939 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1940 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1942 /* This is how to output a command to make the user-level label named NAME
1943 defined for reference from other files. */
1944 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1946 fprintf (FILE, "%s", GLOBAL_ASM_OP); \
1947 assemble_name (FILE, NAME); \
1948 putc ('\n', FILE); \
1951 /* The prefix to add to user-visible assembler symbols.
1952 Override svr[34].h. */
1953 #undef USER_LABEL_PREFIX
1954 #define USER_LABEL_PREFIX "_"
1956 /* This is how to output a reference to a user-level label named NAME.
1957 Override svr[34].h. */
1958 #undef ASM_OUTPUT_LABELREF
1959 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1961 if (!TARGET_NO_UNDERSCORES && !TARGET_SVR4) \
1962 fputc ('_', FILE); \
1963 fputs (NAME, FILE); \
1966 /* This is how to output an internal numbered label where
1967 PREFIX is the class of label and NUM is the number within the class.
1968 For V.4, labels use `.' rather than `@'. */
1970 #undef ASM_OUTPUT_INTERNAL_LABEL
1971 #ifdef AS_BUG_DOT_LABELS /* The assembler requires a declaration of local. */
1972 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1973 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n%s.%s%d\n" : "@%s%d:\n", \
1974 PREFIX, NUM, INTERNAL_ASM_OP, PREFIX, NUM)
1976 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1977 fprintf (FILE, TARGET_SVR4 ? ".%s%d:\n" : "@%s%d:\n", PREFIX, NUM)
1978 #endif /* AS_BUG_DOT_LABELS */
1980 /* This is how to store into the string LABEL
1981 the symbol_ref name of an internal numbered label where
1982 PREFIX is the class of label and NUM is the number within the class.
1983 This is suitable for output with `assemble_name'. This must agree
1984 with ASM_OUTPUT_INTERNAL_LABEL above, except for being prefixed
1987 #undef ASM_GENERATE_INTERNAL_LABEL
1988 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1989 sprintf (LABEL, TARGET_SVR4 ? "*.%s%ld" : "*@%s%ld", PREFIX, (long)(NUM))
1991 /* Internal macro to get a single precision floating point value into
1992 an int, so we can print its value in hex. */
1993 #define FLOAT_TO_INT_INTERNAL( FVALUE, IVALUE ) \
1995 REAL_VALUE_TYPE d; \
1997 unsigned sign : 1; \
1998 unsigned exponent1 : 1; \
1999 unsigned exponent2 : 3; \
2000 unsigned exponent3 : 7; \
2001 unsigned mantissa1 : 20; \
2002 unsigned mantissa2 : 3; \
2003 unsigned mantissa3 : 29; \
2010 unsigned sign : 1; \
2011 unsigned exponent1 : 1; \
2012 unsigned exponent3 : 7; \
2013 unsigned mantissa1 : 20; \
2014 unsigned mantissa2 : 3; \
2018 _u.d = REAL_VALUE_TRUNCATE (SFmode, FVALUE); \
2019 _u2.s.sign = _u.s.sign; \
2020 _u2.s.exponent1 = _u.s.exponent1; \
2021 _u2.s.exponent3 = _u.s.exponent3; \
2022 _u2.s.mantissa1 = _u.s.mantissa1; \
2023 _u2.s.mantissa2 = _u.s.mantissa2; \
2027 /* This is how to output an assembler line defining a `double' constant.
2028 Use "word" pseudos to avoid printing NaNs, infinity, etc. */
2029 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2031 union { REAL_VALUE_TYPE d; long l[2]; } x; \
2033 fprintf (FILE, "%s0x%.8lx, 0x%.8lx\n", \
2034 integer_asm_op (4, TRUE), \
2035 (long) x.l[0], (long) x.l[1]); \
2038 /* This is how to output an assembler line defining a `float' constant. */
2039 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2042 FLOAT_TO_INT_INTERNAL (VALUE, i); \
2043 assemble_aligned_integer (4, GEN_INT (i)); \
2046 /* The single-byte pseudo-op is the default. Override svr[34].h. */
2047 #undef ASM_OUTPUT_ASCII
2048 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
2049 output_ascii (FILE, ASCII_DATA_ASM_OP, 48, P, SIZE)
2051 /* Override svr4.h. Change to the readonly data section for a table of
2052 addresses. final_scan_insn changes back to the text section. */
2053 #undef ASM_OUTPUT_CASE_LABEL
2054 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
2056 if (! CASE_VECTOR_INSNS) \
2058 readonly_data_section (); \
2059 ASM_OUTPUT_ALIGN (FILE, 2); \
2061 ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); \
2064 /* Epilogue for case labels. This jump instruction is called by casesi
2065 to transfer to the appropriate branch instruction within the table.
2066 The label `@L<n>e' is coined to mark the end of the table. */
2067 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
2069 if (CASE_VECTOR_INSNS) \
2072 ASM_GENERATE_INTERNAL_LABEL (label, "L", NUM); \
2073 fprintf (FILE, "%se:\n", &label[1]); \
2074 if (! flag_delayed_branch) \
2075 fprintf (FILE, "\tlda\t %s,%s[%s]\n", reg_names[1], \
2076 reg_names[1], reg_names[m88k_case_index]); \
2077 fprintf (FILE, "\tjmp\t %s\n", reg_names[1]); \
2081 /* This is how to output an element of a case-vector that is absolute. */
2082 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2085 ASM_GENERATE_INTERNAL_LABEL (buffer, "L", VALUE); \
2086 fprintf (FILE, CASE_VECTOR_INSNS ? "\tbr\t %s\n" : "\tword\t %s\n", \
2090 /* This is how to output an element of a case-vector that is relative. */
2091 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
2092 ASM_OUTPUT_ADDR_VEC_ELT (FILE, VALUE)
2094 /* This is how to output an assembler line
2095 that says to advance the location counter
2096 to a multiple of 2**LOG bytes. */
2097 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
2099 fprintf (FILE, "%s%d\n", ALIGN_ASM_OP, 1<<(LOG))
2101 /* On the m88100, align the text address to half a cache boundary when it
2102 can only be reached by jumping. Pack code tightly when compiling
2104 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) \
2105 (TARGET_88100 && !flag_inhibit_size_directive ? 3 : 2)
2107 /* Override svr[34].h. */
2108 #undef ASM_OUTPUT_SKIP
2109 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
2110 fprintf (FILE, "%s%u\n", SKIP_ASM_OP, (SIZE))
2112 /* Override svr4.h. */
2113 #undef ASM_OUTPUT_EXTERNAL_LIBCALL
2115 /* This says how to output an assembler line to define a global common
2116 symbol. Size can be zero for the unusual case of a `struct { int : 0; }'.
2117 Override svr[34].h. */
2118 #undef ASM_OUTPUT_COMMON
2119 #undef ASM_OUTPUT_ALIGNED_COMMON
2120 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
2121 ( fprintf ((FILE), "%s", \
2122 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SCOMM_ASM_OP : COMMON_ASM_OP), \
2123 assemble_name ((FILE), (NAME)), \
2124 fprintf ((FILE), ",%u\n", (SIZE) ? (SIZE) : 1))
2126 /* This says how to output an assembler line to define a local common
2127 symbol. Override svr[34].h. */
2128 #undef ASM_OUTPUT_LOCAL
2129 #undef ASM_OUTPUT_ALIGNED_LOCAL
2130 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
2131 ( fprintf ((FILE), "%s", \
2132 ((SIZE) ? (SIZE) : 1) <= m88k_gp_threshold ? SBSS_ASM_OP : BSS_ASM_OP), \
2133 assemble_name ((FILE), (NAME)), \
2134 fprintf ((FILE), ",%u,%d\n", (SIZE) ? (SIZE) : 1, (SIZE) <= 4 ? 4 : 8))
2136 /* Store in OUTPUT a string (made with alloca) containing
2137 an assembler-name for a local static variable named NAME.
2138 LABELNO is an integer which is different for each call. */
2139 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2140 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2141 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2143 /* This is how to output an insn to push a register on the stack.
2144 It need not be very fast code. */
2145 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2146 fprintf (FILE, "\tsubu\t %s,%s,%d\n\tst\t %s,%s,0\n", \
2147 reg_names[STACK_POINTER_REGNUM], \
2148 reg_names[STACK_POINTER_REGNUM], \
2149 (STACK_BOUNDARY / BITS_PER_UNIT), \
2151 reg_names[STACK_POINTER_REGNUM])
2153 /* Length in instructions of the code output by ASM_OUTPUT_REG_PUSH. */
2154 #define REG_PUSH_LENGTH 2
2156 /* This is how to output an insn to pop a register from the stack. */
2157 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2158 fprintf (FILE, "\tld\t %s,%s,0\n\taddu\t %s,%s,%d\n", \
2160 reg_names[STACK_POINTER_REGNUM], \
2161 reg_names[STACK_POINTER_REGNUM], \
2162 reg_names[STACK_POINTER_REGNUM], \
2163 (STACK_BOUNDARY / BITS_PER_UNIT))
2165 /* Length in instructions of the code output by ASM_OUTPUT_REG_POP. */
2166 #define REG_POP_LENGTH 2
2168 /* Macros to deal with OCS debug information */
2170 #define OCS_START_PREFIX "Ltb"
2171 #define OCS_END_PREFIX "Lte"
2173 #define PUT_OCS_FUNCTION_START(FILE) \
2174 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_START_PREFIX, m88k_function_number); }
2176 #define PUT_OCS_FUNCTION_END(FILE) \
2177 { ASM_OUTPUT_INTERNAL_LABEL (FILE, OCS_END_PREFIX, m88k_function_number); }
2179 /* Macros for debug information */
2180 #define DEBUGGER_AUTO_OFFSET(X) \
2181 (m88k_debugger_offset (X, 0) \
2182 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2184 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
2185 (m88k_debugger_offset (X, OFFSET) \
2186 + (TARGET_OCS_FRAME_POSITION ? 0 : m88k_stack_size - m88k_fp_offset))
2188 /* Macros to deal with SDB debug information */
2189 #ifdef SDB_DEBUGGING_INFO
2191 /* Output structure tag names even when it causes a forward reference. */
2192 #define SDB_ALLOW_FORWARD_REFERENCES
2194 /* Print out extra debug information in the assembler file */
2195 #define PUT_SDB_SCL(a) \
2197 register int s = (a); \
2198 register const char *scl; \
2201 case C_EFCN: scl = "end of function"; break; \
2202 case C_NULL: scl = "NULL storage class"; break; \
2203 case C_AUTO: scl = "automatic"; break; \
2204 case C_EXT: scl = "external"; break; \
2205 case C_STAT: scl = "static"; break; \
2206 case C_REG: scl = "register"; break; \
2207 case C_EXTDEF: scl = "external definition"; break; \
2208 case C_LABEL: scl = "label"; break; \
2209 case C_ULABEL: scl = "undefined label"; break; \
2210 case C_MOS: scl = "structure member"; break; \
2211 case C_ARG: scl = "argument"; break; \
2212 case C_STRTAG: scl = "structure tag"; break; \
2213 case C_MOU: scl = "union member"; break; \
2214 case C_UNTAG: scl = "union tag"; break; \
2215 case C_TPDEF: scl = "typedef"; break; \
2216 case C_USTATIC: scl = "uninitialized static"; break; \
2217 case C_ENTAG: scl = "enumeration tag"; break; \
2218 case C_MOE: scl = "member of enumeration"; break; \
2219 case C_REGPARM: scl = "register parameter"; break; \
2220 case C_FIELD: scl = "bit field"; break; \
2221 case C_BLOCK: scl = "block start/end"; break; \
2222 case C_FCN: scl = "function start/end"; break; \
2223 case C_EOS: scl = "end of structure"; break; \
2224 case C_FILE: scl = "filename"; break; \
2225 case C_LINE: scl = "line"; break; \
2226 case C_ALIAS: scl = "duplicated tag"; break; \
2227 case C_HIDDEN: scl = "hidden"; break; \
2228 default: scl = "unknown"; break; \
2231 fprintf(asm_out_file, "\tscl\t %d\t\t\t\t; %s\n", s, scl); \
2234 #define PUT_SDB_TYPE(a) \
2236 register int t = (a); \
2237 static char buffer[100]; \
2238 register char *p = buffer; \
2239 register const char *q; \
2240 register int typ = t; \
2243 for (i = 0; i <= 5; i++) \
2245 switch ((typ >> ((i*N_TSHIFT) + N_BTSHFT)) & 03) \
2248 strcpy (p, "ptr to "); \
2249 p += sizeof("ptr to"); \
2253 strcpy (p, "array of "); \
2254 p += sizeof("array of"); \
2258 strcpy (p, "func ret "); \
2259 p += sizeof("func ret"); \
2264 switch (typ & N_BTMASK) \
2266 case T_NULL: q = "<no type>"; break; \
2267 case T_CHAR: q = "char"; break; \
2268 case T_SHORT: q = "short"; break; \
2269 case T_INT: q = "int"; break; \
2270 case T_LONG: q = "long"; break; \
2271 case T_FLOAT: q = "float"; break; \
2272 case T_DOUBLE: q = "double"; break; \
2273 case T_STRUCT: q = "struct"; break; \
2274 case T_UNION: q = "union"; break; \
2275 case T_ENUM: q = "enum"; break; \
2276 case T_MOE: q = "enum member"; break; \
2277 case T_UCHAR: q = "unsigned char"; break; \
2278 case T_USHORT: q = "unsigned short"; break; \
2279 case T_UINT: q = "unsigned int"; break; \
2280 case T_ULONG: q = "unsigned long"; break; \
2281 default: q = "void"; break; \
2285 fprintf(asm_out_file, "\ttype\t %d\t\t\t\t; %s\n", \
2289 #define PUT_SDB_INT_VAL(a) \
2290 fprintf (asm_out_file, "\tval\t %d\n", (a))
2292 #define PUT_SDB_VAL(a) \
2293 ( fprintf (asm_out_file, "\tval\t "), \
2294 output_addr_const (asm_out_file, (a)), \
2295 fputc ('\n', asm_out_file))
2297 #define PUT_SDB_DEF(a) \
2298 do { fprintf (asm_out_file, "\tsdef\t "); \
2299 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2300 fputc ('\n', asm_out_file); \
2303 #define PUT_SDB_PLAIN_DEF(a) \
2304 fprintf(asm_out_file,"\tsdef\t .%s\n", a)
2306 /* Simply and endef now. */
2307 #define PUT_SDB_ENDEF \
2308 fputs("\tendef\n\n", asm_out_file)
2310 #define PUT_SDB_SIZE(a) \
2311 fprintf (asm_out_file, "\tsize\t %d\n", (a))
2313 /* Max dimensions to store for debug information (limited by COFF). */
2314 #define SDB_MAX_DIM 6
2316 /* New method for dim operations. */
2317 #define PUT_SDB_START_DIM \
2318 fputs("\tdim\t ", asm_out_file)
2320 /* How to end the DIM sequence. */
2321 #define PUT_SDB_LAST_DIM(a) \
2322 fprintf(asm_out_file, "%d\n", a)
2324 #define PUT_SDB_TAG(a) \
2326 fprintf (asm_out_file, "\ttag\t "); \
2327 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2328 fputc ('\n', asm_out_file); \
2331 #define PUT_SDB_BLOCK_OR_FUNCTION(NAME, SCL, LINE) \
2333 fprintf (asm_out_file, "\n\tsdef\t %s\n\tval\t .\n", \
2335 PUT_SDB_SCL( SCL ); \
2336 fprintf (asm_out_file, "\tline\t %d\n\tendef\n\n", \
2340 #define PUT_SDB_BLOCK_START(LINE) \
2341 PUT_SDB_BLOCK_OR_FUNCTION (".bb", C_BLOCK, (LINE))
2343 #define PUT_SDB_BLOCK_END(LINE) \
2344 PUT_SDB_BLOCK_OR_FUNCTION (".eb", C_BLOCK, (LINE))
2346 #define PUT_SDB_FUNCTION_START(LINE) \
2348 fprintf (asm_out_file, "\tln\t 1\n"); \
2349 PUT_SDB_BLOCK_OR_FUNCTION (".bf", C_FCN, (LINE)); \
2352 #define PUT_SDB_FUNCTION_END(LINE) \
2354 PUT_SDB_BLOCK_OR_FUNCTION (".ef", C_FCN, (LINE)); \
2357 #define PUT_SDB_EPILOGUE_END(NAME) \
2360 fprintf (asm_out_file, "\n\tsdef\t "); \
2361 ASM_OUTPUT_LABELREF(asm_out_file, (NAME)); \
2362 fputc('\n', asm_out_file); \
2363 PUT_SDB_SCL( C_EFCN ); \
2364 fprintf (asm_out_file, "\tendef\n\n"); \
2367 #define SDB_GENERATE_FAKE(BUFFER, NUMBER) \
2368 sprintf ((BUFFER), ".%dfake", (NUMBER));
2370 #endif /* SDB_DEBUGGING_INFO */
2372 /* Support const and tdesc sections. Generally, a const section will
2373 be distinct from the text section whenever we do V.4-like things
2374 and so follows DECLARE_ASM_NAME. Note that strings go in text
2375 rather than const. Override svr[34].h. */
2377 #undef USE_CONST_SECTION
2378 #undef EXTRA_SECTIONS
2380 #define USE_CONST_SECTION DECLARE_ASM_NAME
2382 #if defined(USING_SVR4_H)
2384 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata
2385 #define INIT_SECTION_FUNCTION
2386 #define FINI_SECTION_FUNCTION
2389 #if defined(USING_SVR3_H)
2391 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata, in_init, in_fini
2393 #else /* luna or other not based on svr[34].h. */
2395 #undef INIT_SECTION_ASM_OP
2396 #define EXTRA_SECTIONS in_const, in_tdesc, in_sdata
2397 #define CONST_SECTION_FUNCTION \
2403 #define INIT_SECTION_FUNCTION
2404 #define FINI_SECTION_FUNCTION
2406 #endif /* USING_SVR3_H */
2407 #endif /* USING_SVR4_H */
2409 #undef EXTRA_SECTION_FUNCTIONS
2410 #define EXTRA_SECTION_FUNCTIONS \
2411 CONST_SECTION_FUNCTION \
2416 if (in_section != in_tdesc) \
2418 fprintf (asm_out_file, "%s\n", TDESC_SECTION_ASM_OP); \
2419 in_section = in_tdesc; \
2426 if (in_section != in_sdata) \
2428 fprintf (asm_out_file, "%s\n", SDATA_SECTION_ASM_OP); \
2429 in_section = in_sdata; \
2433 INIT_SECTION_FUNCTION \
2434 FINI_SECTION_FUNCTION
2436 /* A C statement or statements to switch to the appropriate
2437 section for output of DECL. DECL is either a `VAR_DECL' node
2438 or a constant of some sort. RELOC indicates whether forming
2439 the initial value of DECL requires link-time relocations.
2441 For strings, the section is selected before the segment info is encoded. */
2442 #undef SELECT_SECTION
2443 #define SELECT_SECTION(DECL,RELOC,ALIGN) \
2445 if (TREE_CODE (DECL) == STRING_CST) \
2447 if (! flag_writable_strings) \
2449 else if ( TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \
2454 else if (TREE_CODE (DECL) == VAR_DECL) \
2456 if (SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0))) \
2458 else if ((flag_pic && RELOC) \
2459 || !TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL) \
2460 || !DECL_INITIAL (DECL) \
2461 || (DECL_INITIAL (DECL) != error_mark_node \
2462 && !TREE_CONSTANT (DECL_INITIAL (DECL)))) \
2471 /* Jump tables consist of branch instructions and should be output in
2472 the text section. When we use a table of addresses, we explicitly
2473 change to the readonly data section. */
2474 #define JUMP_TABLES_IN_TEXT_SECTION 1
2476 /* Define this macro if references to a symbol must be treated differently
2477 depending on something about the variable or function named by the
2478 symbol (such as what section it is in).
2480 The macro definition, if any, is executed immediately after the rtl for
2481 DECL has been created and stored in `DECL_RTL (DECL)'. The value of the
2482 rtl will be a `mem' whose address is a `symbol_ref'.
2484 For the m88k, determine if the item should go in the global pool. */
2485 #define ENCODE_SECTION_INFO(DECL) \
2487 if (m88k_gp_threshold > 0) \
2489 if (TREE_CODE (DECL) == VAR_DECL) \
2491 if (!TREE_READONLY (DECL) || TREE_SIDE_EFFECTS (DECL)) \
2493 int size = int_size_in_bytes (TREE_TYPE (DECL)); \
2495 if (size > 0 && size <= m88k_gp_threshold) \
2496 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
2499 else if (TREE_CODE (DECL) == STRING_CST \
2500 && flag_writable_strings \
2501 && TREE_STRING_LENGTH (DECL) <= m88k_gp_threshold) \
2502 SYMBOL_REF_FLAG (XEXP (TREE_CST_RTL (DECL), 0)) = 1; \
2506 /* Print operand X (an rtx) in assembler syntax to file FILE.
2507 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2508 For `%' followed by punctuation, CODE is the punctuation and X is null. */
2509 #define PRINT_OPERAND_PUNCT_VALID_P(c) \
2510 ((c) == '#' || (c) == '.' || (c) == '!' || (c) == '*' || (c) == ';')
2512 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
2514 /* Print a memory address as an operand to reference that memory location. */
2515 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
2517 /* This says not to strength reduce the addr calculations within loops
2518 (otherwise it does not take advantage of m88k scaled loads and stores */
2520 #define DONT_REDUCE_ADDR
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