1 /* Subroutines used for code generation on the M32R/D cpu.
2 Copyright (C) 1996, 1997 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
26 #include "hard-reg-set.h"
28 #include "insn-config.h"
29 #include "conditions.h"
30 #include "insn-flags.h"
32 #include "insn-attr.h"
37 /* Save the operands last given to a compare for use when we
38 generate a scc or bcc insn. */
39 rtx m32r_compare_op0, m32r_compare_op1;
41 /* Array of valid operand punctuation characters. */
42 char m32r_punct_chars[256];
44 static void init_reg_tables ();
46 /* Selected code model. */
47 char *m32r_model_string = M32R_MODEL_DEFAULT;
48 enum m32r_model m32r_model;
50 /* Selected SDA support. */
51 char *m32r_sdata_string = M32R_SDATA_DEFAULT;
52 enum m32r_sdata m32r_sdata;
54 /* Called by OVERRIDE_OPTIONS to initialize various things. */
61 /* Initialize array for PRINT_OPERAND_PUNCT_VALID_P. */
62 memset (m32r_punct_chars, 0, sizeof (m32r_punct_chars));
63 m32r_punct_chars['#'] = 1;
64 m32r_punct_chars['@'] = 1; /* ??? no longer used */
66 /* Provide default value if not specified. */
68 g_switch_value = SDATA_DEFAULT_SIZE;
70 if (strcmp (m32r_model_string, "small") == 0)
71 m32r_model = M32R_MODEL_SMALL;
72 else if (strcmp (m32r_model_string, "medium") == 0)
73 m32r_model = M32R_MODEL_MEDIUM;
74 else if (strcmp (m32r_model_string, "large") == 0)
75 m32r_model = M32R_MODEL_LARGE;
77 error ("bad value (%s) for -mmodel switch", m32r_model_string);
79 if (strcmp (m32r_sdata_string, "none") == 0)
80 m32r_sdata = M32R_SDATA_NONE;
81 else if (strcmp (m32r_sdata_string, "sdata") == 0)
82 m32r_sdata = M32R_SDATA_SDATA;
83 else if (strcmp (m32r_sdata_string, "use") == 0)
84 m32r_sdata = M32R_SDATA_USE;
86 error ("bad value (%s) for -msdata switch", m32r_sdata_string);
89 /* Vectors to keep interesting information about registers where it can easily
90 be got. We use to use the actual mode value as the bit number, but there
91 is (or may be) more than 32 modes now. Instead we use two tables: one
92 indexed by hard register number, and one indexed by mode. */
94 /* The purpose of m32r_mode_class is to shrink the range of modes so that
95 they all fit (as bit numbers) in a 32 bit word (again). Each real mode is
96 mapped into one m32r_mode_class mode. */
98 enum m32r_mode_class {
100 S_MODE, D_MODE, T_MODE, O_MODE,
101 SF_MODE, DF_MODE, TF_MODE, OF_MODE
104 /* Modes for condition codes. */
105 #define C_MODES (1 << (int) C_MODE)
107 /* Modes for single-word and smaller quantities. */
108 #define S_MODES ((1 << (int) S_MODE) | (1 << (int) SF_MODE))
110 /* Modes for double-word and smaller quantities. */
111 #define D_MODES (S_MODES | (1 << (int) D_MODE) | (1 << DF_MODE))
113 /* Modes for quad-word and smaller quantities. */
114 #define T_MODES (D_MODES | (1 << (int) T_MODE) | (1 << (int) TF_MODE))
116 /* Value is 1 if register/mode pair is acceptable on arc. */
118 unsigned int m32r_hard_regno_mode_ok[FIRST_PSEUDO_REGISTER] = {
119 T_MODES, T_MODES, T_MODES, T_MODES, T_MODES, T_MODES, T_MODES, T_MODES,
120 T_MODES, T_MODES, T_MODES, T_MODES, T_MODES, S_MODES, S_MODES, S_MODES,
124 unsigned int m32r_mode_class [NUM_MACHINE_MODES];
126 enum reg_class m32r_regno_reg_class[FIRST_PSEUDO_REGISTER];
133 for (i = 0; i < NUM_MACHINE_MODES; i++)
135 switch (GET_MODE_CLASS (i))
138 case MODE_PARTIAL_INT:
139 case MODE_COMPLEX_INT:
140 if (GET_MODE_SIZE (i) <= 4)
141 m32r_mode_class[i] = 1 << (int) S_MODE;
142 else if (GET_MODE_SIZE (i) == 8)
143 m32r_mode_class[i] = 1 << (int) D_MODE;
144 else if (GET_MODE_SIZE (i) == 16)
145 m32r_mode_class[i] = 1 << (int) T_MODE;
146 else if (GET_MODE_SIZE (i) == 32)
147 m32r_mode_class[i] = 1 << (int) O_MODE;
149 m32r_mode_class[i] = 0;
152 case MODE_COMPLEX_FLOAT:
153 if (GET_MODE_SIZE (i) <= 4)
154 m32r_mode_class[i] = 1 << (int) SF_MODE;
155 else if (GET_MODE_SIZE (i) == 8)
156 m32r_mode_class[i] = 1 << (int) DF_MODE;
157 else if (GET_MODE_SIZE (i) == 16)
158 m32r_mode_class[i] = 1 << (int) TF_MODE;
159 else if (GET_MODE_SIZE (i) == 32)
160 m32r_mode_class[i] = 1 << (int) OF_MODE;
162 m32r_mode_class[i] = 0;
166 /* mode_class hasn't been initialized yet for EXTRA_CC_MODES, so
167 we must explicitly check for them here. */
168 if (i == (int) CCmode)
169 m32r_mode_class[i] = 1 << (int) C_MODE;
171 m32r_mode_class[i] = 0;
176 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
179 m32r_regno_reg_class[i] = GENERAL_REGS;
180 else if (i == ARG_POINTER_REGNUM)
181 m32r_regno_reg_class[i] = GENERAL_REGS;
183 m32r_regno_reg_class[i] = NO_REGS;
187 /* M32R specific attribute support.
189 interrupt - for interrupt functions
191 model - select code model used to access object
193 small: addresses use 24 bits, use bl to make calls
194 medium: addresses use 32 bits, use bl to make calls
195 large: addresses use 32 bits, use seth/add3/jl to make calls
197 Grep for MODEL in m32r.h for more info.
200 /* Return nonzero if IDENTIFIER is a valid decl attribute. */
203 m32r_valid_machine_decl_attribute (type, attributes, identifier, args)
209 static tree interrupt_ident, model_ident;
210 static tree small_ident, medium_ident, large_ident;
212 if (interrupt_ident == 0)
214 interrupt_ident = get_identifier ("__interrupt__");
215 model_ident = get_identifier ("__model__");
216 small_ident = get_identifier ("__small__");
217 medium_ident = get_identifier ("__medium__");
218 large_ident = get_identifier ("__large__");
221 if (identifier == interrupt_ident
222 && list_length (args) == 0)
225 if (identifier == model_ident
226 && list_length (args) == 1
227 && (TREE_VALUE (args) == small_ident
228 || TREE_VALUE (args) == medium_ident
229 || TREE_VALUE (args) == large_ident))
235 /* Return zero if TYPE1 and TYPE are incompatible, one if they are compatible,
236 and two if they are nearly compatible (which causes a warning to be
240 m32r_comp_type_attributes (type1, type2)
246 /* Set the default attributes for TYPE. */
249 m32r_set_default_type_attributes (type)
254 /* A C statement or statements to switch to the appropriate
255 section for output of DECL. DECL is either a `VAR_DECL' node
256 or a constant of some sort. RELOC indicates whether forming
257 the initial value of DECL requires link-time relocations. */
260 m32r_select_section (decl, reloc)
264 if (TREE_CODE (decl) == STRING_CST)
266 if (! flag_writable_strings)
271 else if (TREE_CODE (decl) == VAR_DECL)
273 if (SDATA_NAME_P (XSTR (XEXP (DECL_RTL (decl), 0), 0)))
275 else if ((flag_pic && reloc)
276 || !TREE_READONLY (decl)
277 || TREE_SIDE_EFFECTS (decl)
278 || !DECL_INITIAL (decl)
279 || (DECL_INITIAL (decl) != error_mark_node
280 && !TREE_CONSTANT (DECL_INITIAL (decl))))
289 /* Encode section information of DECL, which is either a VAR_DECL,
290 FUNCTION_DECL, STRING_CST, CONSTRUCTOR, or ???.
292 For the M32R we want to record:
294 - whether the object lives in .sdata/.sbss.
295 objects living in .sdata/.sbss are prefixed with SDATA_FLAG_CHAR
297 - what code model should be used to access the object
298 small: recorded with no flag - for space efficiency since they'll
300 medium: prefixed with MEDIUM_FLAG_CHAR
301 large: prefixed with LARGE_FLAG_CHAR
305 m32r_encode_section_info (decl)
311 switch (TREE_CODE (decl))
315 model = lookup_attribute ("model", DECL_MACHINE_ATTRIBUTES (decl));
319 /* ??? document all others that can appear here */
324 /* Only mark the object as being small data area addressable if
325 it hasn't been explicitly marked with a code model.
327 The user can explicitly put an object in the small data area with the
328 section attribute. If the object is in sdata/sbss and marked with a
329 code model do both [put the object in .sdata and mark it as being
330 addressed with a specific code model - don't mark it as being addressed
331 with an SDA reloc though]. This is ok and might be useful at times. If
332 the object doesn't fit the linker will give an error. */
336 if (TREE_CODE_CLASS (TREE_CODE (decl)) == 'd'
337 && DECL_SECTION_NAME (decl) != NULL_TREE)
339 char *name = TREE_STRING_POINTER (DECL_SECTION_NAME (decl));
340 if (! strcmp (name, ".sdata") || ! strcmp (name, ".sbss"))
342 #if 0 /* ??? There's no reason to disallow this, is there? */
343 if (TREE_READONLY (decl))
344 error_with_decl (decl, "const objects cannot go in .sdata/.sbss");
346 prefix = SDATA_FLAG_CHAR;
351 if (TREE_CODE (decl) == VAR_DECL
352 && ! TREE_READONLY (decl)
353 && ! TARGET_SDATA_NONE)
355 int size = int_size_in_bytes (TREE_TYPE (decl));
357 if (size > 0 && size <= g_switch_value)
358 prefix = SDATA_FLAG_CHAR;
363 /* If data area not decided yet, check for a code model. */
368 if (TREE_VALUE (TREE_VALUE (model)) == get_identifier ("__small__"))
369 ; /* don't mark the symbol specially */
370 else if (TREE_VALUE (TREE_VALUE (model)) == get_identifier ("__medium__"))
371 prefix = MEDIUM_FLAG_CHAR;
372 else if (TREE_VALUE (TREE_VALUE (model)) == get_identifier ("__large__"))
373 prefix = LARGE_FLAG_CHAR;
375 abort (); /* shouldn't happen */
379 if (TARGET_MODEL_SMALL)
380 ; /* don't mark the symbol specially */
381 else if (TARGET_MODEL_MEDIUM)
382 prefix = MEDIUM_FLAG_CHAR;
383 else if (TARGET_MODEL_LARGE)
384 prefix = LARGE_FLAG_CHAR;
386 abort (); /* shouldn't happen */
392 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (decl)) != 'd'
393 ? TREE_CST_RTL (decl) : DECL_RTL (decl));
394 char *str = XSTR (XEXP (rtl, 0), 0);
395 int len = strlen (str);
396 char *newstr = savealloc (len + 2);
397 strcpy (newstr + 1, str);
399 XSTR (XEXP (rtl, 0), 0) = newstr;
403 /* Do anything needed before RTL is emitted for each function. */
406 m32r_init_expanders ()
408 /* ??? At one point there was code here. The function is left in
409 to make it easy to experiment. */
412 /* Acceptable arguments to the call insn. */
415 call_address_operand (op, mode)
417 enum machine_mode mode;
419 return (symbolic_operand (op, mode)
420 || (GET_CODE (op) == CONST_INT && LEGITIMATE_CONSTANT_P (op))
421 || (GET_CODE (op) == REG));
425 call_operand (op, mode)
427 enum machine_mode mode;
429 if (GET_CODE (op) != MEM)
432 return call_address_operand (op, mode);
435 /* Returns 1 if OP is a symbol reference. */
438 symbolic_operand (op, mode)
440 enum machine_mode mode;
442 switch (GET_CODE (op))
453 /* Return truth value of statement that OP is a symbolic memory
454 operand of mode MODE. */
457 symbolic_memory_operand (op, mode)
459 enum machine_mode mode;
461 if (GET_CODE (op) == SUBREG)
462 op = SUBREG_REG (op);
463 if (GET_CODE (op) != MEM)
466 return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == CONST
467 || GET_CODE (op) == LABEL_REF);
470 /* Return 1 if OP is a reference to an object in .sdata/.sbss. */
473 small_data_operand (op, mode)
475 enum machine_mode mode;
477 if (! TARGET_SDATA_USE)
480 if (GET_CODE (op) == SYMBOL_REF)
481 return SDATA_NAME_P (XSTR (op, 0));
483 if (GET_CODE (op) == CONST
484 && GET_CODE (XEXP (op, 0)) == PLUS
485 && GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF
486 && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT
487 && INT16_P (INTVAL (XEXP (XEXP (op, 0), 1))))
488 return SDATA_NAME_P (XSTR (XEXP (XEXP (op, 0), 0), 0));
493 /* Return 1 if OP is a symbol that can use 24 bit addressing. */
496 addr24_operand (op, mode)
498 enum machine_mode mode;
500 if (GET_CODE (op) == LABEL_REF)
501 return TARGET_ADDR24;
503 if (GET_CODE (op) == SYMBOL_REF)
504 return (SMALL_NAME_P (XSTR (op, 0))
506 && CONSTANT_POOL_ADDRESS_P (op)));
508 if (GET_CODE (op) == CONST
509 && GET_CODE (XEXP (op, 0)) == PLUS
510 && GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF
511 && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT
512 && UINT24_P (INTVAL (XEXP (XEXP (op, 0), 1))))
514 rtx sym = XEXP (XEXP (op, 0), 0);
515 return (SMALL_NAME_P (XSTR (sym, 0))
517 && CONSTANT_POOL_ADDRESS_P (op)));
523 /* Return 1 if OP is a symbol that needs 32 bit addressing. */
526 addr32_operand (op, mode)
528 enum machine_mode mode;
530 if (GET_CODE (op) == LABEL_REF)
531 return TARGET_ADDR32;
533 if (GET_CODE (op) == SYMBOL_REF)
534 return (! addr24_operand (op)
535 && ! small_data_operand (op));
537 if (GET_CODE (op) == CONST
538 && GET_CODE (XEXP (op, 0)) == PLUS
539 && GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF
540 && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT)
542 return (! addr24_operand (op)
543 && ! small_data_operand (op));
549 /* Return 1 if OP is a function that can be called with the `bl' insn. */
552 call26_operand (op, mode)
554 enum machine_mode mode;
556 if (GET_CODE (op) == SYMBOL_REF)
557 return ! LARGE_NAME_P (XSTR (op, 0));
559 return TARGET_CALL26;
562 /* Return 1 if OP is a function that must be called with 32 bit addressing. */
565 call32_operand (op, mode)
567 enum machine_mode mode;
569 return ! call26_operand (op, mode);
572 /* Returns 1 if OP is an acceptable operand for seth/add3. */
575 seth_add3_operand (op, mode)
577 enum machine_mode mode;
579 if (GET_CODE (op) == SYMBOL_REF
580 || GET_CODE (op) == LABEL_REF)
583 if (GET_CODE (op) == CONST
584 && GET_CODE (XEXP (op, 0)) == PLUS
585 && GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF
586 && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT
587 && INT16_P (INTVAL (XEXP (XEXP (op, 0), 1))))
593 /* Return true if OP is a signed 8 bit immediate value. */
596 int8_operand (op, mode)
598 enum machine_mode mode;
600 if (GET_CODE (op) != CONST_INT)
602 return INT8_P (INTVAL (op));
605 /* Return true if OP is a signed 16 bit immediate value. */
608 int16_operand (op, mode)
610 enum machine_mode mode;
612 if (GET_CODE (op) != CONST_INT)
614 return INT16_P (INTVAL (op));
617 /* Return true if OP is a signed 16 bit immediate value
618 useful in comparisons. */
621 cmp_int16_operand (op, mode)
623 enum machine_mode mode;
625 if (GET_CODE (op) != CONST_INT)
627 return CMP_INT16_P (INTVAL (op));
630 /* Return true if OP is an unsigned 16 bit immediate value. */
633 uint16_operand (op, mode)
635 enum machine_mode mode;
637 if (GET_CODE (op) != CONST_INT)
639 return UINT16_P (INTVAL (op));
642 /* Return true if OP is an unsigned 24 bit immediate value. */
645 uint24_operand (op, mode)
647 enum machine_mode mode;
649 if (GET_CODE (op) != CONST_INT)
651 return UINT24_P (INTVAL (op));
654 /* Return true if OP is a register or signed 8 bit value. */
657 reg_or_int8_operand (op, mode)
659 enum machine_mode mode;
661 if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
662 return register_operand (op, mode);
663 if (GET_CODE (op) != CONST_INT)
665 return INT8_P (INTVAL (op));
668 /* Return true if OP is a register or signed 8 bit value. */
671 reg_or_int16_operand (op, mode)
673 enum machine_mode mode;
675 if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
676 return register_operand (op, mode);
677 if (GET_CODE (op) != CONST_INT)
679 return INT16_P (INTVAL (op));
682 /* Return true if OP is a register or signed 8 bit value. */
685 reg_or_uint16_operand (op, mode)
687 enum machine_mode mode;
689 if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
690 return register_operand (op, mode);
691 if (GET_CODE (op) != CONST_INT)
693 return UINT16_P (INTVAL (op));
696 /* Return true if OP is a register or signed 16 bit value for compares. */
699 reg_or_cmp_int16_operand (op, mode)
701 enum machine_mode mode;
703 if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
704 return register_operand (op, mode);
705 if (GET_CODE (op) != CONST_INT)
707 return CMP_INT16_P (INTVAL (op));
710 /* Return true if OP is an acceptable argument for a single word
714 move_src_operand (op, mode)
716 enum machine_mode mode;
718 switch (GET_CODE (op))
722 return addr24_operand (op, mode);
724 /* FIXME: We allow more cse opportunities if we only allow constants
725 loadable with one insn, and split the rest into two. */
726 return INT32_P (INTVAL (op));
728 return TARGET_ADDR24;
732 else if (mode == SImode)
734 /* Large unsigned constants are represented as const_double's. */
735 unsigned HOST_WIDE_INT low, high;
737 low = CONST_DOUBLE_LOW (op);
738 high = CONST_DOUBLE_HIGH (op);
739 return high == 0 && low <= 0xffffffff;
744 return register_operand (op, mode);
746 /* (subreg (mem ...) ...) can occur here if the inner part was once a
747 pseudo-reg and is now a stack slot. */
748 if (GET_CODE (SUBREG_REG (op)) == MEM)
749 return address_operand (XEXP (SUBREG_REG (op), 0), mode);
751 return register_operand (op, mode);
753 return address_operand (XEXP (op, 0), mode);
759 /* Return true if OP is an acceptable argument for a double word
763 move_double_src_operand (op, mode)
765 enum machine_mode mode;
767 switch (GET_CODE (op))
772 return easy_df_const (op);
774 return easy_di_const (op);
776 return register_operand (op, mode);
778 /* (subreg (mem ...) ...) can occur here if the inner part was once a
779 pseudo-reg and is now a stack slot. */
780 if (GET_CODE (SUBREG_REG (op)) == MEM)
781 return move_double_src_operand (SUBREG_REG (op), mode);
783 return register_operand (op, mode);
785 /* Disallow auto inc/dec for now. */
786 if (GET_CODE (XEXP (op, 0)) == PRE_DEC
787 || GET_CODE (XEXP (op, 0)) == PRE_INC)
789 return address_operand (XEXP (op, 0), mode);
795 /* Return true if OP is an acceptable argument for a move destination. */
798 move_dest_operand (op, mode)
800 enum machine_mode mode;
802 switch (GET_CODE (op))
805 return register_operand (op, mode);
807 /* (subreg (mem ...) ...) can occur here if the inner part was once a
808 pseudo-reg and is now a stack slot. */
809 if (GET_CODE (SUBREG_REG (op)) == MEM)
810 return address_operand (XEXP (SUBREG_REG (op), 0), mode);
812 return register_operand (op, mode);
814 return address_operand (XEXP (op, 0), mode);
820 /* Return 1 if OP is a DImode const we want to handle inline.
821 This must match the code in the movdi pattern.
822 It is used by the 'G' CONST_DOUBLE_OK_FOR_LETTER. */
828 rtx high_rtx, low_rtx;
829 HOST_WIDE_INT high, low;
831 split_double (op, &high_rtx, &low_rtx);
832 high = INTVAL (high_rtx);
833 low = INTVAL (low_rtx);
834 /* Pick constants loadable with 2 16 bit `ldi' insns. */
835 if (high >= -128 && high <= 127
836 && low >= -128 && low <= 127)
841 /* Return 1 if OP is a DFmode const we want to handle inline.
842 This must match the code in the movdf pattern.
843 It is used by the 'H' CONST_DOUBLE_OK_FOR_LETTER. */
852 REAL_VALUE_FROM_CONST_DOUBLE (r, op);
853 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
854 if (l[0] == 0 && l[1] == 0)
856 if ((l[0] & 0xffff) == 0 && l[1] == 0)
861 /* Return 1 if OP is an EQ or NE comparison operator. */
864 eqne_comparison_operator (op, mode)
866 enum machine_mode mode;
868 enum rtx_code code = GET_CODE (op);
870 if (GET_RTX_CLASS (code) != '<')
872 return (code == EQ || code == NE);
875 /* Return 1 if OP is a signed comparison operator. */
878 signed_comparison_operator (op, mode)
880 enum machine_mode mode;
882 enum rtx_code code = GET_CODE (op);
884 if (GET_RTX_CLASS (code) != '<')
886 return (code == EQ || code == NE
887 || code == LT || code == LE || code == GT || code == GE);
890 /* Return 1 if OP is (mem (reg ...)).
891 This is used in insn length calcs. */
894 memreg_operand (op, mode)
896 enum machine_mode mode;
898 return GET_CODE (op) == MEM && GET_CODE (XEXP (op, 0)) == REG;
903 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
904 return the mode to be used for the comparison. */
907 m32r_select_cc_mode (op, x, y)
914 /* X and Y are two things to compare using CODE. Emit the compare insn and
915 return the rtx for compare [arg0 of the if_then_else]. */
918 gen_compare (code, x, y)
922 enum machine_mode mode = SELECT_CC_MODE (code, x, y);
923 enum rtx_code compare_code, branch_code;
924 rtx cc_reg = gen_rtx (REG, mode, CARRY_REGNUM);
929 case EQ: compare_code = EQ; branch_code = NE; break;
930 case NE: compare_code = EQ; branch_code = EQ; break;
931 case LT: compare_code = LT; branch_code = NE; break;
932 case LE: compare_code = LT; branch_code = EQ; swap_p = 1; break;
933 case GT: compare_code = LT; branch_code = NE; swap_p = 1; break;
934 case GE: compare_code = LT; branch_code = EQ; break;
935 case LTU: compare_code = LTU; branch_code = NE; break;
936 case LEU: compare_code = LTU; branch_code = EQ; swap_p = 1; break;
937 case GTU: compare_code = LTU; branch_code = NE; swap_p = 1; break;
938 case GEU: compare_code = LTU; branch_code = EQ; break;
941 if (! TARGET_OLD_COMPARE)
943 /* reg/reg equal comparison */
944 if (compare_code == EQ
945 && register_operand (y, SImode))
946 return gen_rtx (code, mode, x, y);
947 /* reg/zero signed comparison */
948 if ((compare_code == EQ || compare_code == LT)
950 return gen_rtx (code, mode, x, y);
951 /* reg/smallconst equal comparison */
952 if (compare_code == EQ
953 && GET_CODE (y) == CONST_INT
954 && CMP_INT16_P (INTVAL (y)))
956 rtx tmp = gen_reg_rtx (SImode);
957 emit_insn (gen_cmp_ne_small_const_insn (tmp, x, y));
958 return gen_rtx (code, mode, tmp, const0_rtx);
960 /* reg/const equal comparison */
961 if (compare_code == EQ
964 rtx tmp = force_reg (GET_MODE (x), y);
965 return gen_rtx (code, mode, x, tmp);
969 if (swap_p && CONSTANT_P (y))
970 y = force_reg (GET_MODE (x), y);
971 else if (CONSTANT_P (y))
974 (code == LTU || code == LEU || code == GTU || code == GEU)
975 ? uint16_operand (y, GET_MODE (y))
976 : reg_or_cmp_int16_operand (y, GET_MODE (y));
978 y = force_reg (GET_MODE (x), y);
981 switch (compare_code)
984 emit_insn (gen_cmp_eqsi_insn (swap_p ? y : x, swap_p ? x : y));
987 emit_insn (gen_cmp_ltsi_insn (swap_p ? y : x, swap_p ? x : y));
990 emit_insn (gen_cmp_ltusi_insn (swap_p ? y : x, swap_p ? x : y));
994 return gen_rtx (branch_code, VOIDmode, cc_reg, CONST0_RTX (mode));
997 /* Implements the FUNCTION_ARG_PARTIAL_NREGS macro. */
1000 function_arg_partial_nregs (cum, mode, type, named)
1001 CUMULATIVE_ARGS *cum;
1002 enum machine_mode mode;
1007 int size = (((mode == BLKmode && type)
1008 ? int_size_in_bytes (type)
1009 : GET_MODE_SIZE (mode)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
1011 if (*cum >= M32R_MAX_PARM_REGS)
1013 else if (*cum + size > M32R_MAX_PARM_REGS)
1014 ret = (*cum + size) - M32R_MAX_PARM_REGS;
1021 /* Do any needed setup for a variadic function. For the M32R, we must
1022 create a register parameter block, and then copy any anonymous arguments
1023 in registers to memory.
1025 CUM has not been updated for the last named argument which has type TYPE
1026 and mode MODE, and we rely on this fact. */
1029 m32r_setup_incoming_varargs (cum, mode, type, pretend_size, no_rtl)
1030 CUMULATIVE_ARGS *cum;
1031 enum machine_mode mode;
1041 /* All BLKmode values are passed by reference. */
1042 if (mode == BLKmode)
1045 /* We must treat `__builtin_va_alist' as an anonymous arg. */
1046 if (current_function_varargs)
1047 first_anon_arg = *cum;
1049 first_anon_arg = (ROUND_ADVANCE_CUM (*cum, mode, type)
1050 + ROUND_ADVANCE_ARG (mode, type));
1052 if (first_anon_arg < M32R_MAX_PARM_REGS)
1054 /* Note that first_reg_offset < M32R_MAX_PARM_REGS. */
1055 int first_reg_offset = first_anon_arg;
1056 /* Size in words to "pretend" allocate. */
1057 int size = M32R_MAX_PARM_REGS - first_reg_offset;
1060 regblock = gen_rtx (MEM, BLKmode,
1061 plus_constant (arg_pointer_rtx,
1062 FIRST_PARM_OFFSET (0)));
1063 move_block_from_reg (first_reg_offset, regblock,
1064 size, size * UNITS_PER_WORD);
1066 *pretend_size = (size * UNITS_PER_WORD);
1070 /* Implements EXPAND_BUILTIN_SAVEREGS macro. */
1071 /* FIXME: Not currently used ('cus it might be unnecessary). */
1074 m32r_expand_builtin_saveregs (args)
1077 return gen_rtx (PLUS, Pmode,
1078 virtual_incoming_args_rtx,
1079 GEN_INT (- UNITS_PER_WORD * M32R_MAX_PARM_REGS));
1082 /* Cost functions. */
1084 /* Provide the costs of an addressing mode that contains ADDR.
1085 If ADDR is not a valid address, its cost is irrelevant.
1087 This function is trivial at the moment. This code doesn't live
1088 in m32r.h so it's easy to experiment. */
1091 m32r_address_cost (addr)
1097 /* Type of function DECL.
1099 The result is cached. To reset the cache at the end of a function,
1100 call with DECL = NULL_TREE. */
1102 enum m32r_function_type
1103 m32r_compute_function_type (decl)
1107 static enum m32r_function_type fn_type = M32R_FUNCTION_UNKNOWN;
1108 /* Last function we were called for. */
1109 static tree last_fn = NULL_TREE;
1111 /* Resetting the cached value? */
1112 if (decl == NULL_TREE)
1114 fn_type = M32R_FUNCTION_UNKNOWN;
1115 last_fn = NULL_TREE;
1119 if (decl == last_fn && fn_type != M32R_FUNCTION_UNKNOWN)
1122 /* Compute function type. */
1123 fn_type = (lookup_attribute ("interrupt", DECL_MACHINE_ATTRIBUTES (current_function_decl)) != NULL_TREE
1124 ? M32R_FUNCTION_INTERRUPT
1125 : M32R_FUNCTION_NORMAL);
1130 \f/* Function prologue/epilogue handlers. */
1132 /* M32R stack frames look like:
1134 Before call After call
1135 +-----------------------+ +-----------------------+
1137 high | local variables, | | local variables, |
1138 mem | reg save area, etc. | | reg save area, etc. |
1140 +-----------------------+ +-----------------------+
1142 | arguments on stack. | | arguments on stack. |
1144 SP+0->+-----------------------+ +-----------------------+
1145 | reg parm save area, |
1146 | only created for |
1147 | variable argument |
1149 +-----------------------+
1150 | previous frame ptr |
1151 +-----------------------+
1153 | register save area |
1155 +-----------------------+
1157 +-----------------------+
1161 +-----------------------+
1163 | alloca allocations |
1165 +-----------------------+
1167 low | arguments on stack |
1169 SP+0->+-----------------------+
1172 1) The "reg parm save area" does not exist for non variable argument fns.
1173 2) The "reg parm save area" can be eliminated completely if we saved regs
1174 containing anonymous args separately but that complicates things too
1175 much (so it's not done).
1176 3) The return address is saved after the register save area so as to have as
1177 many insns as possible between the restoration of `lr' and the `jmp lr'.
1180 /* Structure to be filled in by m32r_compute_frame_size with register
1181 save masks, and offsets for the current function. */
1182 struct m32r_frame_info
1184 unsigned int total_size; /* # bytes that the entire frame takes up */
1185 unsigned int extra_size; /* # bytes of extra stuff */
1186 unsigned int pretend_size; /* # bytes we push and pretend caller did */
1187 unsigned int args_size; /* # bytes that outgoing arguments take up */
1188 unsigned int reg_size; /* # bytes needed to store regs */
1189 unsigned int var_size; /* # bytes that variables take up */
1190 unsigned int gmask; /* mask of saved gp registers */
1191 unsigned int save_fp; /* nonzero if fp must be saved */
1192 unsigned int save_lr; /* nonzero if lr (return addr) must be saved */
1193 int initialized; /* nonzero if frame size already calculated */
1196 /* Current frame information calculated by m32r_compute_frame_size. */
1197 static struct m32r_frame_info current_frame_info;
1199 /* Zero structure to initialize current_frame_info. */
1200 static struct m32r_frame_info zero_frame_info;
1202 #define FRAME_POINTER_MASK (1 << (FRAME_POINTER_REGNUM))
1203 #define RETURN_ADDR_MASK (1 << (RETURN_ADDR_REGNUM))
1205 /* Tell prologue and epilogue if register REGNO should be saved / restored.
1206 The return address and frame pointer are treated separately.
1207 Don't consider them here. */
1208 #define MUST_SAVE_REGISTER(regno, interrupt_p) \
1209 ((regno) != RETURN_ADDR_REGNUM && (regno) != FRAME_POINTER_REGNUM \
1210 && (regs_ever_live[regno] && (!call_used_regs[regno] || interrupt_p)))
1212 #define MUST_SAVE_FRAME_POINTER (regs_ever_live[FRAME_POINTER_REGNUM])
1213 #define MUST_SAVE_RETURN_ADDR (regs_ever_live[RETURN_ADDR_REGNUM])
1215 /* Return the bytes needed to compute the frame pointer from the current
1218 SIZE is the size needed for local variables. */
1221 m32r_compute_frame_size (size)
1222 int size; /* # of var. bytes allocated. */
1225 unsigned int total_size, var_size, args_size, pretend_size, extra_size;
1226 unsigned int reg_size;
1228 enum m32r_function_type fn_type;
1231 var_size = M32R_STACK_ALIGN (size);
1232 args_size = M32R_STACK_ALIGN (current_function_outgoing_args_size);
1233 pretend_size = current_function_pretend_args_size;
1234 extra_size = FIRST_PARM_OFFSET (0);
1235 total_size = extra_size + pretend_size + args_size + var_size;
1239 /* See if this is an interrupt handler. Call used registers must be saved
1241 fn_type = m32r_compute_function_type (current_function_decl);
1242 interrupt_p = M32R_INTERRUPT_P (fn_type);
1244 /* Calculate space needed for registers. */
1246 for (regno = 0; regno < M32R_MAX_INT_REGS; regno++)
1248 if (MUST_SAVE_REGISTER (regno, interrupt_p))
1250 reg_size += UNITS_PER_WORD;
1251 gmask |= 1 << regno;
1255 current_frame_info.save_fp = MUST_SAVE_FRAME_POINTER;
1256 current_frame_info.save_lr = MUST_SAVE_RETURN_ADDR;
1258 reg_size += ((current_frame_info.save_fp + current_frame_info.save_lr)
1260 total_size += reg_size;
1262 /* FIXME: Not sure this is necessary, and I don't think the epilogue
1263 handler will do the right thing if this changes total_size. */
1264 total_size = M32R_STACK_ALIGN (total_size);
1266 /* Save computed information. */
1267 current_frame_info.total_size = total_size;
1268 current_frame_info.extra_size = extra_size;
1269 current_frame_info.pretend_size = pretend_size;
1270 current_frame_info.var_size = var_size;
1271 current_frame_info.args_size = args_size;
1272 current_frame_info.reg_size = reg_size;
1273 current_frame_info.gmask = gmask;
1274 current_frame_info.initialized = reload_completed;
1276 /* Ok, we're done. */
1280 /* Set up the stack and frame pointer (if desired) for the function. */
1283 m32r_output_function_prologue (file, size)
1288 int total_size, frame_size;
1289 char *sp_str = reg_names[STACK_POINTER_REGNUM];
1290 char *fp_str = reg_names[FRAME_POINTER_REGNUM];
1291 unsigned int gmask = current_frame_info.gmask;
1292 enum m32r_function_type fn_type = m32r_compute_function_type (current_function_decl);
1294 /* If this is an interrupt handler, mark it as such. */
1295 if (M32R_INTERRUPT_P (fn_type))
1297 fprintf (file, "\t%s interrupt handler\n",
1301 /* This is only for the human reader. */
1302 fprintf (file, "\t%s BEGIN PROLOGUE %s vars= %d, regs= %d, args= %d, extra= %d\n",
1303 ASM_COMMENT_START, ASM_COMMENT_START,
1304 current_frame_info.var_size,
1305 current_frame_info.reg_size / 4,
1306 current_frame_info.args_size,
1307 current_frame_info.extra_size);
1309 total_size = (! current_frame_info.initialized
1310 ? m32r_compute_frame_size (size)
1311 : current_frame_info.total_size);
1313 /* These cases shouldn't happen. Catch them now. */
1314 if (total_size == 0 && gmask)
1318 /* Allocate space for register arguments if this is a variadic function. */
1319 if (current_frame_info.pretend_size != 0)
1320 fprintf (file, "\taddi %s,%d\n",
1321 sp_str, -current_frame_info.pretend_size);
1323 /* If there are unnamed args in registers, save them. */
1324 if (current_function_stdarg || current_function_varargs)
1327 fprintf (file, "\taddi %s,%d\n",
1328 sp_str, - M32R_MAX_PARM_REGS * UNITS_PER_WORD);
1329 for (i = 0; i < M32R_MAX_PARM_REGS; ++i)
1330 fprintf (file, "\tst %s,@(sp,%d)\n",
1331 reg_names[i], i * UNITS_PER_WORD);
1335 /* Save any registers we need to and set up fp. */
1337 if (current_frame_info.save_fp)
1338 fprintf (file, "\tpush %s\n", fp_str);
1340 gmask &= ~(FRAME_POINTER_MASK | RETURN_ADDR_MASK);
1342 /* Save any needed call-saved regs (and call-used if this is an
1343 interrupt handler). */
1344 for (regno = 0; regno <= M32R_MAX_INT_REGS; ++regno)
1346 if ((gmask & (1 << regno)) != 0)
1347 fprintf (file, "\tpush %s\n", reg_names[regno]);
1350 if (current_frame_info.save_lr)
1351 fprintf (file, "\tpush %s\n", reg_names[RETURN_ADDR_REGNUM]);
1353 /* Allocate the stack frame. */
1354 frame_size = total_size - (current_frame_info.pretend_size
1355 + current_frame_info.reg_size);
1356 if (frame_size == 0)
1357 ; /* nothing to do */
1358 else if (frame_size <= 128)
1359 fprintf (file, "\taddi %s,%d\n",
1360 sp_str, -frame_size);
1361 else if (frame_size <= 32768)
1362 fprintf (file, "\tadd3 %s,%s,%d\n",
1363 sp_str, sp_str, -frame_size);
1365 fprintf (file, "\tld24 %s,%d\n\tsub %s,%s\n",
1366 reg_names[PROLOGUE_TMP_REGNUM], frame_size,
1367 sp_str, reg_names[PROLOGUE_TMP_REGNUM]);
1369 if (frame_pointer_needed)
1370 fprintf (file, "\tmv %s,%s\n", fp_str, sp_str);
1372 fprintf (file, "\t%s END PROLOGUE\n", ASM_COMMENT_START);
1375 /* Do any necessary cleanup after a function to restore stack, frame,
1379 m32r_output_function_epilogue (file, size)
1384 int noepilogue = FALSE;
1386 enum m32r_function_type fn_type = m32r_compute_function_type (current_function_decl);
1388 /* This is only for the human reader. */
1389 fprintf (file, "\t%s EPILOGUE\n", ASM_COMMENT_START);
1391 if (!current_frame_info.initialized)
1393 total_size = current_frame_info.total_size;
1395 if (total_size == 0)
1397 rtx insn = get_last_insn ();
1399 /* If the last insn was a BARRIER, we don't have to write any code
1400 because a jump (aka return) was put there. */
1401 if (GET_CODE (insn) == NOTE)
1402 insn = prev_nonnote_insn (insn);
1403 if (insn && GET_CODE (insn) == BARRIER)
1409 unsigned int pretend_size = current_frame_info.pretend_size;
1410 unsigned int frame_size = total_size - pretend_size;
1411 unsigned int var_size = current_frame_info.var_size;
1412 unsigned int args_size = current_frame_info.args_size;
1413 unsigned int gmask = current_frame_info.gmask;
1414 int can_trust_sp_p = !current_function_calls_alloca;
1415 char *sp_str = reg_names[STACK_POINTER_REGNUM];
1416 char *fp_str = reg_names[FRAME_POINTER_REGNUM];
1418 /* The first thing to do is point the sp at the bottom of the register
1422 unsigned int reg_offset = var_size + args_size;
1423 if (reg_offset == 0)
1424 ; /* nothing to do */
1425 else if (reg_offset < 32768)
1426 fprintf (file, "\tadd3 %s,%s,%d\n",
1427 sp_str, sp_str, reg_offset);
1429 fprintf (file, "\tld24 %s,%d\n\tadd %s,%s\n",
1430 reg_names[PROLOGUE_TMP_REGNUM], reg_offset,
1431 sp_str, reg_names[PROLOGUE_TMP_REGNUM]);
1433 else if (frame_pointer_needed)
1435 unsigned int reg_offset = var_size + args_size;
1436 if (reg_offset == 0)
1437 fprintf (file, "\tmv %s,%s\n", sp_str, fp_str);
1438 else if (reg_offset < 32768)
1439 fprintf (file, "\tadd3 %s,%s,%d\n",
1440 sp_str, fp_str, reg_offset);
1442 fprintf (file, "\tld24 %s,%d\n\tadd %s,%s\n",
1443 reg_names[PROLOGUE_TMP_REGNUM], reg_offset,
1444 sp_str, reg_names[PROLOGUE_TMP_REGNUM]);
1449 if (current_frame_info.save_lr)
1450 fprintf (file, "\tpop %s\n", reg_names[RETURN_ADDR_REGNUM]);
1452 /* Restore any saved registers, in reverse order of course. */
1453 gmask &= ~(FRAME_POINTER_MASK | RETURN_ADDR_MASK);
1454 for (regno = M32R_MAX_INT_REGS - 1; regno >= 0; --regno)
1456 if ((gmask & (1L << regno)) != 0)
1457 fprintf (file, "\tpop %s\n", reg_names[regno]);
1460 if (current_frame_info.save_fp)
1461 fprintf (file, "\tpop %s\n", fp_str);
1463 /* Remove varargs area if present. */
1465 /* FIXME: Must decide whether to use pretend_size or not. */
1466 if (current_frame_info.pretend_size != 0)
1467 fprintf (file, "\taddi %s,%d\n",
1468 sp_str, current_frame_info.pretend_size);
1470 /* This is the other way of doing it. */
1471 if (current_function_stdarg || current_function_varargs)
1472 fprintf (file, "\taddi %s,%d\n",
1473 sp_str, M32R_MAX_PARM_REGS * UNITS_PER_WORD);
1476 /* Emit the return instruction. */
1477 if (M32R_INTERRUPT_P (fn_type))
1478 fprintf (file, "\trte\n");
1480 fprintf (file, "\tjmp %s\n", reg_names[RETURN_ADDR_REGNUM]);
1483 #if 0 /* no longer needed */
1484 /* Ensure the function cleanly ends on a 32 bit boundary. */
1485 fprintf (file, "\t.fillinsn\n");
1488 /* Reset state info for each function. */
1489 current_frame_info = zero_frame_info;
1490 m32r_compute_function_type (NULL_TREE);
1495 /* Emit special PIC prologues and epilogues. */
1498 m32r_finalize_pic ()
1503 /* Nested function support. */
1505 /* Emit RTL insns to initialize the variable parts of a trampoline.
1506 FNADDR is an RTX for the address of the function's pure code.
1507 CXT is an RTX for the static chain value for the function. */
1510 m32r_initialize_trampoline (tramp, fnaddr, cxt)
1511 rtx tramp, fnaddr, cxt;
1515 /* Set the cpu type and print out other fancy things,
1516 at the top of the file. */
1519 m32r_asm_file_start (file)
1522 if (flag_verbose_asm)
1523 fprintf (file, "%s M32R/D special options: -G %d\n",
1524 ASM_COMMENT_START, g_switch_value);
1527 /* Print operand X (an rtx) in assembler syntax to file FILE.
1528 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1529 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1532 m32r_print_operand (file, x, code)
1540 /* Write second word of DImode or DFmode reference,
1541 register or memory. */
1542 if (GET_CODE (x) == REG)
1543 fputs (reg_names[REGNO (x)+1], file);
1544 else if (GET_CODE (x) == MEM)
1546 fprintf (file, "@(");
1547 /* Handle possible auto-increment. Since it is pre-increment and
1548 we have already done it, we can just use an offset of four. */
1549 /* ??? This is taken from rs6000.c I think. I don't think it is
1550 currently necessary, but keep it around. */
1551 if (GET_CODE (XEXP (x, 0)) == PRE_INC
1552 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
1553 output_address (plus_constant (XEXP (XEXP (x, 0), 0), 4));
1555 output_address (plus_constant (XEXP (x, 0), 4));
1559 output_operand_lossage ("invalid operand to %R code");
1562 case 'H' : /* High word */
1563 case 'L' : /* Low word */
1564 if (GET_CODE (x) == REG)
1566 /* L = least significant word, H = most significant word */
1567 if ((WORDS_BIG_ENDIAN != 0) ^ (code == 'L'))
1568 fputs (reg_names[REGNO (x)], file);
1570 fputs (reg_names[REGNO (x)+1], file);
1572 else if (GET_CODE (x) == CONST_INT
1573 || GET_CODE (x) == CONST_DOUBLE)
1577 split_double (x, &first, &second);
1578 fprintf (file, "0x%08lx",
1579 code == 'L' ? INTVAL (first) : INTVAL (second));
1582 output_operand_lossage ("invalid operand to %H/%L code");
1590 if (GET_CODE (x) != CONST_DOUBLE
1591 || GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT)
1593 REAL_VALUE_FROM_CONST_DOUBLE (d, x);
1594 REAL_VALUE_TO_DECIMAL (d, "%.20e", str);
1595 fprintf (file, "%s", str);
1599 case 'B' : /* Bottom half */
1600 case 'T' : /* Top half */
1601 /* Output the argument to a `seth' insn (sets the Top half-word).
1602 For constants output arguments to a seth/or3 pair to set Top and
1603 Bottom halves. For symbols output arguments to a seth/add3 pair to
1604 set Top and Bottom halves. The difference exists because for
1605 constants seth/or3 is more readable but for symbols we need to use
1606 the same scheme as `ld' and `st' insns (16 bit addend is signed). */
1607 switch (GET_CODE (x))
1614 split_double (x, &first, &second);
1615 x = WORDS_BIG_ENDIAN ? second : first;
1617 #if HOST_BITS_PER_WIDE_INT == HOST_BITS_PER_INT
1623 ? INTVAL (x) & 0xffff
1624 : (INTVAL (x) >> 16) & 0xffff));
1630 && small_data_operand (x, VOIDmode))
1632 fputs ("sda(", file);
1633 output_addr_const (file, x);
1639 fputs (code == 'T' ? "shigh(" : "low(", file);
1640 output_addr_const (file, x);
1644 output_operand_lossage ("invalid operand to %T/%B code");
1651 /* Output a load/store with update indicator if appropriate. */
1652 if (GET_CODE (x) == MEM)
1654 if (GET_CODE (XEXP (x, 0)) == PRE_INC
1655 || GET_CODE (XEXP (x, 0)) == PRE_DEC)
1659 output_operand_lossage ("invalid operand to %U code");
1663 /* Print a constant value negated. */
1664 if (GET_CODE (x) == CONST_INT)
1665 output_addr_const (file, GEN_INT (- INTVAL (x)));
1667 output_operand_lossage ("invalid operand to %N code");
1671 fputs (IMMEDIATE_PREFIX, file);
1674 #if 0 /* ??? no longer used */
1676 fputs (reg_names[SDA_REGNUM], file);
1681 /* Do nothing special. */
1686 output_operand_lossage ("invalid operand output code");
1689 switch (GET_CODE (x))
1692 fputs (reg_names[REGNO (x)], file);
1696 fprintf (file, "@(");
1697 if (GET_CODE (XEXP (x, 0)) == PRE_INC)
1698 output_address (plus_constant (XEXP (XEXP (x, 0), 0),
1699 GET_MODE_SIZE (GET_MODE (x))));
1700 else if (GET_CODE (XEXP (x, 0)) == PRE_DEC)
1701 output_address (plus_constant (XEXP (XEXP (x, 0), 0),
1702 - GET_MODE_SIZE (GET_MODE (x))));
1704 output_address (XEXP (x, 0));
1709 /* We handle SFmode constants here as output_addr_const doesn't. */
1710 if (GET_MODE (x) == SFmode)
1715 REAL_VALUE_FROM_CONST_DOUBLE (d, x);
1716 REAL_VALUE_TO_TARGET_SINGLE (d, l);
1717 fprintf (file, "0x%08lx", l);
1721 /* Fall through. Let output_addr_const deal with it. */
1724 output_addr_const (file, x);
1729 /* Print a memory address as an operand to reference that memory location. */
1732 m32r_print_operand_address (file, addr)
1736 register rtx base, index = 0;
1739 switch (GET_CODE (addr))
1742 fputs (reg_names[REGNO (addr)], file);
1746 if (GET_CODE (XEXP (addr, 0)) == CONST_INT)
1747 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1);
1748 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT)
1749 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0);
1751 base = XEXP (addr, 0), index = XEXP (addr, 1);
1752 if (GET_CODE (base) == REG)
1754 /* Print the offset first (if present) to conform to the manual. */
1758 fprintf (file, "%d,", offset);
1759 fputs (reg_names[REGNO (base)], file);
1761 /* The chip doesn't support this, but left in for generality. */
1762 else if (GET_CODE (index) == REG)
1763 fprintf (file, "%s,%s",
1764 reg_names[REGNO (base)], reg_names[REGNO (index)]);
1765 /* Not sure this can happen, but leave in for now. */
1766 else if (GET_CODE (index) == SYMBOL_REF)
1768 output_addr_const (file, index);
1770 fputs (reg_names[REGNO (base)], file);
1775 else if (GET_CODE (base) == LO_SUM)
1778 || GET_CODE (XEXP (base, 0)) != REG)
1780 if (small_data_operand (XEXP (base, 1), VOIDmode))
1781 fputs ("sda(", file);
1783 fputs ("low(", file);
1784 output_addr_const (file, plus_constant (XEXP (base, 1), offset));
1786 fputs (reg_names[REGNO (XEXP (base, 0))], file);
1793 if (GET_CODE (XEXP (addr, 0)) != REG)
1795 if (small_data_operand (XEXP (addr, 1), VOIDmode))
1796 fputs ("sda(", file);
1798 fputs ("low(", file);
1799 output_addr_const (file, XEXP (addr, 1));
1801 fputs (reg_names[REGNO (XEXP (addr, 0))], file);
1806 /* We shouldn't get here as we've lost the mode of the memory object
1807 (which says how much to inc/dec by). */
1812 output_addr_const (file, addr);