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* config/ip2k/ip2k.h: Remove target-independent comments.
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1 /* Definitions of target machine for GNU compiler,
2    For Ubicom IP2022 Communications Controller
3
4    Copyright (C) 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
5    Contributed by Red Hat, Inc and Ubicom, Inc.
6
7 This file is part of GNU CC.
8
9 GNU CC is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2, or (at your option)
12 any later version.
13
14 GNU CC is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GNU CC; see the file COPYING.  If not, write to
21 the Free Software Foundation, 59 Temple Place - Suite 330,
22 Boston, MA 02111-1307, USA.  */
23
24 \f
25 #undef ASM_SPEC /* We have a GAS assembler.  */
26
27 #define TARGET_CPU_CPP_BUILTINS()               \
28   do                                            \
29     {                                           \
30       builtin_define_std ("IP2K");              \
31       builtin_define ("_DOUBLE_IS_32BITS");     \
32       builtin_define ("_BUFSIZ=512");           \
33       builtin_define ("__FILENAME_MAX__=128");  \
34     }                                           \
35   while (0)
36
37 /* This declaration should be present.  */
38 extern int target_flags;
39
40 #define TARGET_SWITCHES {{"",0, NULL}}
41
42 #define TARGET_VERSION fprintf (stderr, " (ip2k, GNU assembler syntax)")
43
44 /* Caller-saves is not a win for the IP2K.  Pretty much anywhere that
45    a register is permitted allows SP-relative addresses too.
46
47    This machine doesn't have PIC addressing modes, so disable that also.  */
48
49 #define OVERRIDE_OPTIONS        \
50     do {                        \
51         flag_caller_saves = 0;  \
52         flag_pic = 0;           \
53     } while (0)
54
55 /* Put each function in its own section so that PAGE-instruction
56    relaxation can do its best.  */
57 #define OPTIMIZATION_OPTIONS(LEVEL, SIZEFLAG)   \
58     do {                                        \
59         if ((LEVEL) || (SIZEFLAG))              \
60             flag_function_sections = 1; \
61     } while (0)
62
63 #define BITS_BIG_ENDIAN 0
64 #define BYTES_BIG_ENDIAN 1
65 #define WORDS_BIG_ENDIAN 1
66 #define BITS_PER_UNIT 8
67 #define BITS_PER_WORD 8
68 #define UNITS_PER_WORD (BITS_PER_WORD / BITS_PER_UNIT)
69
70 /* Width in bits of a pointer.
71    See also the macro `Pmode' defined below.  */
72 #define POINTER_SIZE 16
73
74 /* Maximum sized of reasonable data type DImode or Dfmode ...  */
75 #define MAX_FIXED_MODE_SIZE 64
76
77 #define PARM_BOUNDARY 8
78 #define FUNCTION_BOUNDARY 16
79 #define EMPTY_FIELD_BOUNDARY 8
80 #define BIGGEST_ALIGNMENT 8
81
82 #define STRICT_ALIGNMENT 0
83
84 #define PCC_BITFIELD_TYPE_MATTERS 1
85
86 #undef INT_TYPE_SIZE
87 #define INT_TYPE_SIZE 16
88
89 #undef SHORT_TYPE_SIZE
90 #define SHORT_TYPE_SIZE 16
91
92 #undef LONG_TYPE_SIZE
93 #define LONG_TYPE_SIZE 32
94 #define MAX_LONG_TYPE_SIZE 32
95
96 #undef LONG_LONG_TYPE_SIZE
97 #define LONG_LONG_TYPE_SIZE     64
98
99 #undef CHAR_TYPE_SIZE
100 #define  CHAR_TYPE_SIZE 8
101
102 #undef FLOAT_TYPE_SIZE
103 #define FLOAT_TYPE_SIZE 32
104
105 #undef DOUBLE_TYPE_SIZE
106 #define DOUBLE_TYPE_SIZE 32
107
108 #undef LONG_DOUBLE_TYPE_SIZE
109 #define LONG_DOUBLE_TYPE_SIZE   32
110
111 #define DEFAULT_SIGNED_CHAR 1
112
113 /* #define DEFAULT_SHORT_ENUMS  1
114    This was the default for the IP2k but gcc has a bug (as of 17th May
115    2001) in the way that library calls to the memory checker functions
116    are issues that screws things up if an enum is not equivalent to
117    an int.  */
118
119 #define SIZE_TYPE "unsigned int"
120
121 #define PTRDIFF_TYPE "int"
122
123 #undef WCHAR_TYPE
124 #define WCHAR_TYPE "int"
125 #undef WCHAR_TYPE_SIZE
126 #define WCHAR_TYPE_SIZE 16
127
128 #define HARD_REG_SIZE           (UNITS_PER_WORD)
129 /* Standard register usage.
130
131    for the IP2K, we are going to have a LOT of registers, but only some of them
132    are named.  */
133  
134 #define FIRST_PSEUDO_REGISTER (0x104) /* Skip over physical regs, VFP, AP.  */
135
136 #define REG_IP          0x4
137 #define REG_IPH         REG_IP
138 #define REG_IPL         0x5
139
140 #define REG_SP          0x6
141 #define REG_SPH         REG_SP
142 #define REG_SPL         0x7
143
144 #define REG_PCH         0x8
145 #define REG_PCL         0x9
146
147 #define REG_W           0xa
148 #define REG_STATUS      0xb
149
150 #define REG_DP          0xc
151 #define REG_DPH         REG_DP
152 #define REG_DPL         0xd
153
154 #define REG_MULH        0xf
155
156 #define REG_CALLH       0x7e            /* Call-stack readout.  */
157 #define REG_CALLL       0x7f
158
159
160 #define REG_RESULT      0x80    /* Result register (upto 8 bytes).  */
161 #define REG_FP          0xfd    /* 2 bytes for FRAME chain  */
162
163 #define REG_ZERO        0xff    /* Initialized to zero by runtime.  */
164
165 #define REG_VFP         0x100   /* Virtual frame pointer.  */
166 #define REG_AP          0x102   /* Virtual arg pointer.  */
167
168 /* Status register bits.  */
169 #define Z_FLAG  0x2      
170 #define DC_FLAG 0x1
171 #define C_FLAG  0x0
172
173 #define FIXED_REGISTERS {\
174 1,1,1,1,0,0,1,1,1,1,1,1,0,0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*  r0.. r31*/\
175 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r32.. r63*/\
176 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r64.. r95*/\
177 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r96..r127*/\
178 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,/*r128..r159*/\
179 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r160..r191*/\
180 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r192..r223*/\
181 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r224..r255*/\
182 1,1,1,1}
183
184 #define CALL_USED_REGISTERS {                   \
185 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*  r0.. r31*/\
186 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r32.. r63*/\
187 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r64.. r95*/\
188 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/* r96..r127*/\
189 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r128..r159*/\
190 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r160..r191*/\
191 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r192..r223*/\
192 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,/*r224..r255*/\
193 1,1,1,1}
194
195 #define NON_SAVING_SETJMP 0
196
197 #define REG_ALLOC_ORDER {                       \
198     0x88,0x89,0x8a,0x8b,0x8c,0x8d,0x8e,0x8f,    \
199     0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,    \
200     0x98,0x99,0x9a,0x9b,0x9c,0x9d,0x9e,0x9f,    \
201     0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,    \
202     0xa0,0xa1,0xa2,0xa3,0xa4,0xa5,0xa6,0xa7,    \
203     0xa8,0xa9,0xaa,0xab,0xac,0xad,0xae,0xaf,    \
204     0xb0,0xb1,0xb2,0xb3,0xb4,0xb5,0xb6,0xb7,    \
205     0xb8,0xb9,0xba,0xbb,0xbc,0xbd,0xbe,0xbf,    \
206     0xc0,0xc1,0xc2,0xc3,0xc4,0xc5,0xc6,0xc7,    \
207     0xc8,0xc9,0xca,0xcb,0xcc,0xcd,0xce,0xcf,    \
208     0xd0,0xd1,0xd2,0xd3,0xd4,0xd5,0xd6,0xd7,    \
209     0xd8,0xd9,0xda,0xdb,0xdc,0xdd,0xde,0xdf,    \
210     0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,    \
211     0xe8,0xe9,0xea,0xeb,0xec,0xed,0xee,0xef,    \
212     0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,    \
213     0xf8,0xf9,0xfa,0xfb,0xfc,0xfd,0xfe,0xff,    \
214     0x00,0x01,0x02,0x03,0x0c,0x0d,0x06,0x07,    \
215     0x08,0x09,0x0a,0x0b,0x04,0x05,0x0e,0x0f,    \
216     0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,    \
217     0x18,0x19,0x1a,0x1b,0x1c,0x1d,0x1e,0x1f,    \
218     0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,    \
219     0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,    \
220     0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,    \
221     0x38,0x39,0x3a,0x3b,0x3c,0x3d,0x3e,0x3f,    \
222     0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47,    \
223     0x48,0x49,0x4a,0x4b,0x4c,0x4d,0x4e,0x4f,    \
224     0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57,    \
225     0x58,0x59,0x5a,0x5b,0x5c,0x5d,0x5e,0x5f,    \
226     0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,    \
227     0x68,0x69,0x6a,0x6b,0x6c,0x6d,0x6e,0x6f,    \
228     0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77,    \
229     0x78,0x79,0x7a,0x7b,0x7c,0x7d,0x7e,0x7f,    \
230     0x100,0x101,0x102,0x103}
231
232
233 #define ORDER_REGS_FOR_LOCAL_ALLOC ip2k_init_local_alloc (reg_alloc_order)
234
235 /* Are we allowed to rename registers?  For some reason, regrename was
236    changing DP to IP (when it appeared in addresses like (plus:HI
237    (reg: DP) (const_int 37)) - and that's bad because IP doesn't
238    permit offsets!  */
239
240 #define HARD_REGNO_RENAME_OK(REG, NREG)                         \
241   (((REG) == REG_DPH) ? 0                                       \
242     : ((REG) == REG_IPH) ? ((NREG) == REG_DPH)                  \
243     : (((NREG) == REG_IPL) || ((NREG) == REG_DPL)) ? 0 : 1)
244
245 #define HARD_REGNO_NREGS(REGNO, MODE) \
246   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
247
248 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
249
250 #define MODES_TIEABLE_P(MODE1, MODE2)           \
251    (((MODE1) == QImode && (MODE2) == HImode)    \
252     || ((MODE2) == QImode && (MODE1) == HImode))
253 /* We originally had this as follows - this isn't a win on the IP2k
254    though as registers just get in our way!
255    
256    #define MODES_TIEABLE_P(MODE1, MODE2) \
257     (((MODE1) > HImode && (MODE2) == HImode)
258      || ((MODE1) == HImode && (MODE2) > HImode))  */
259
260 enum reg_class {
261   NO_REGS,
262   DPH_REGS,
263   DPL_REGS,
264   DP_REGS,
265   SP_REGS,
266   IPH_REGS,
267   IPL_REGS,
268   IP_REGS,
269   DP_SP_REGS,
270   PTR_REGS,
271   NONPTR_REGS,
272   NONSP_REGS,
273   GENERAL_REGS,
274   ALL_REGS = GENERAL_REGS,
275   LIM_REG_CLASSES
276 };
277
278 #define N_REG_CLASSES (int)LIM_REG_CLASSES
279
280 #define REG_CLASS_NAMES {                       \
281                 "NO_REGS",                      \
282                 "DPH_REGS",                     \
283                 "DPL_REGS",                     \
284                 "DP_REGS",                      \
285                 "SP_REGS",                      \
286                 "IPH_REGS",                     \
287                 "IPL_REGS",                     \
288                 "IP_REGS",                      \
289                 "DP_SP_REGS",                   \
290                 "PTR_REGS",                     \
291                 "NONPTR_REGS",                  \
292                 "NONSP_REGS",                   \
293                 "GENERAL_REGS"                  \
294                 }
295
296
297 #define REG_CLASS_CONTENTS {                            \
298 {0x00000000, 0, 0, 0, 0, 0, 0, 0, 0}, /* NO_REGS */     \
299 {0x00001000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DPH_REGS */    \
300 {0x00002000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DPL_REGS */    \
301 {0x00003000, 0, 0, 0, 0, 0, 0, 0, 0}, /* DP_REGS */     \
302 {0x000000c0, 0, 0, 0, 0, 0, 0, 0, 0}, /* SP_REGS */     \
303 {0x00000010, 0, 0, 0, 0, 0, 0, 0, 0}, /* IPH_REGS */    \
304 {0x00000020, 0, 0, 0, 0, 0, 0, 0, 0}, /* IPL_REGS */    \
305 {0x00000030, 0, 0, 0, 0, 0, 0, 0, 0}, /* IP_REGS */     \
306 {0x000030c0, 0, 0, 0, 0, 0, 0, 0, 0}, /* DP_SP_REGS */  \
307 {0x000030f0, 0, 0, 0, 0, 0, 0, 0, 0}, /* PTR_REGS */    \
308 {0xffffcf0f,-1,-1,-1,-1,-1,-1,-1, 0}, /* NONPTR_REGS */ \
309 {0xffffff3f,-1,-1,-1,-1,-1,-1,-1, 0}, /* NONSP_REGS */  \
310 {0xffffffff,-1,-1,-1,-1,-1,-1,-1,15}  /* GENERAL_REGS */ \
311 }
312
313 #define REGNO_REG_CLASS(R)      \
314   ( (R) == REG_IPH ? IPH_REGS   \
315   : (R) == REG_IPL ? IPL_REGS   \
316   : (R) == REG_DPH ? DPH_REGS   \
317   : (R) == REG_DPL ? DPL_REGS   \
318   : (R) == REG_SPH ? SP_REGS    \
319   : (R) == REG_SPL ? SP_REGS    \
320   : NONPTR_REGS)
321
322 #define MODE_BASE_REG_CLASS(MODE) ((MODE) == QImode ? PTR_REGS : DP_SP_REGS)
323
324 #define BASE_REG_CLASS PTR_REGS
325
326 #define INDEX_REG_CLASS NO_REGS
327
328 #define REG_CLASS_FROM_LETTER(C)        \
329   ( (C) == 'j' ? IPH_REGS               \
330   : (C) == 'k' ? IPL_REGS               \
331   : (C) == 'f' ? IP_REGS                \
332   : (C) == 'y' ? DPH_REGS               \
333   : (C) == 'z' ? DPL_REGS               \
334   : (C) == 'b' ? DP_REGS                \
335   : (C) == 'u' ? NONSP_REGS             \
336   : (C) == 'q' ? SP_REGS                \
337   : (C) == 'c' ? DP_SP_REGS             \
338   : (C) == 'a' ? PTR_REGS               \
339   : (C) == 'd' ? NONPTR_REGS            \
340   : NO_REGS)
341
342 #define REGNO_OK_FOR_BASE_P(R) \
343   ((R) == REG_DP || (R) == REG_IP || (R) == REG_SP)
344
345 #define REGNO_MODE_OK_FOR_BASE_P(R,M)           \
346   ((R) == REG_DP || (R) == REG_SP               \
347    || ((R) == REG_IP && GET_MODE_SIZE (M) <= 1))
348
349 #define REGNO_OK_FOR_INDEX_P(NUM) 0
350
351 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS)
352
353 #define SMALL_REGISTER_CLASSES 1
354
355 #define CLASS_LIKELY_SPILLED_P(CLASS)  class_likely_spilled_p(CLASS)
356
357 #define CLASS_MAX_NREGS(CLASS, MODE)   GET_MODE_SIZE (MODE)
358
359 #define CONST_OK_FOR_LETTER_P(VALUE, C)                         \
360   ((C) == 'I' ? (VALUE) >= -255 && (VALUE) <= -1 :              \
361    (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 7 :                  \
362    (C) == 'K' ? (VALUE) >= 0 && (VALUE) <= 127 :                \
363    (C) == 'L' ? (VALUE) > 0 && (VALUE) < 128:                   \
364    (C) == 'M' ? (VALUE) == -1:                                  \
365    (C) == 'N' ? (VALUE) == 1:                                   \
366    (C) == 'O' ? (VALUE) == 0:                                   \
367    (C) == 'P' ? (VALUE) >= 0 && (VALUE) <= 255:                 \
368    0)
369
370 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 0
371
372 #define EXTRA_CONSTRAINT(X, C) ip2k_extra_constraint (X, C)
373
374 /* This is an undocumented variable which describes
375    how GCC will pop a data.  */
376 #define STACK_POP_CODE PRE_INC
377
378 #define STACK_PUSH_CODE POST_DEC
379
380 #define STACK_CHECK_BUILTIN     1
381 /* Prologue code will do stack checking as necessary.  */
382   
383 #define STARTING_FRAME_OFFSET (0)       
384
385 #define FRAME_GROWS_DOWNWARD    1
386 #define STACK_GROWS_DOWNWARD    1
387
388 /* On IP2K arg pointer is virtual and resolves to either SP or FP
389    after we've resolved what registers are saved (fp chain, return
390    pc, etc.  */
391
392 #define FIRST_PARM_OFFSET(FUNDECL) 0
393
394 #define STACK_POINTER_OFFSET 1
395 /* IP2K stack is post-decremented, so 0(sp) is address of open space
396    and 1(sp) is offset to the location avobe the forst location at which
397    outgoing arguments are placed.  */
398
399 #define STACK_BOUNDARY 8
400
401 #define STACK_POINTER_REGNUM REG_SP
402
403 #define FRAME_POINTER_REGNUM REG_VFP
404 #define HARD_FRAME_POINTER_REGNUM REG_FP
405
406 #define ARG_POINTER_REGNUM  REG_AP
407
408 /* We don't really want to support nested functions.  But we'll crash
409    in various testsuite tests if we don't at least define the register
410    to contain the static chain. The return value register is about as
411    bad a place as any for this.  */
412
413 #define STATIC_CHAIN_REGNUM     REG_RESULT
414
415 #define FRAME_POINTER_REQUIRED (!flag_omit_frame_pointer)
416
417 #define ELIMINABLE_REGS {                                       \
418         {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},             \
419         {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},        \
420         {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},           \
421         {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM},      \
422         {HARD_FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},      \
423 }
424
425 #define CAN_ELIMINATE(FROM, TO)                                 \
426   ((FROM) == HARD_FRAME_POINTER_REGNUM                          \
427    ? (flag_omit_frame_pointer && !frame_pointer_needed) : 1)
428 /* Don't eliminate FP unless we EXPLICITLY_ASKED  */
429
430 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
431   ((OFFSET) = ip2k_init_elim_offset ((FROM), (TO)))
432
433 #define RETURN_ADDR_RTX(COUNT, X) \
434   (((COUNT) == 0) ? gen_rtx_REG (HImode, REG_CALLH) : NULL_RTX)
435
436 #define PUSH_ROUNDING(NPUSHED) (NPUSHED)
437
438 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
439   ip2k_return_pops_args ((FUNDECL), (FUNTYPE), (SIZE))
440
441 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
442
443 #define CUMULATIVE_ARGS int
444
445 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \
446   ((CUM) = 0)
447
448 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)
449
450 /* All arguments are passed on stack - do nothing here.  */
451
452 #define FUNCTION_ARG_REGNO_P(R) 0
453
454 #define FUNCTION_VALUE(VALTYPE, FUNC)                           \
455    ((TYPE_MODE (VALTYPE) == QImode)                             \
456     ? gen_rtx_REG (TYPE_MODE (VALTYPE), REG_RESULT + 1) \
457     : gen_rtx_REG (TYPE_MODE (VALTYPE), REG_RESULT))
458
459 /* Because functions returning 'char' actually widen to 'int', we have to
460    use $81 as the return location if we think we only have a 'char'.  */
461
462 #define LIBCALL_VALUE(MODE)  gen_rtx_REG ((MODE), REG_RESULT)
463
464 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_RESULT)
465
466 #define RETURN_IN_MEMORY(TYPE) \
467   ((TYPE_MODE (TYPE) == BLKmode) ? int_size_in_bytes (TYPE) > 8 : 0)
468
469 /* Indicate that large structures are passed by reference.  */
470 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM,MODE,TYPE,NAMED)     0
471
472 #define DEFAULT_PCC_STRUCT_RETURN 0
473
474 #define STRUCT_VALUE 0
475
476 #define STRUCT_VALUE_INCOMING 0
477
478 #define EPILOGUE_USES(REGNO) 0
479
480 #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR,MODE,TYPE,           \
481                                PRETEND_ARGS_SIZE,SECOND_TIME)   \
482   ((PRETEND_ARGS_SIZE) = (0))
483
484
485 /*  Hmmm.  We don't actually like constants as addresses - they always need
486     to be loaded to a register, except for function calls which take an
487     address by immediate value.  But changing this to zero had negative
488     effects, causing the compiler to get very confused....  */
489
490 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
491
492 #define MAX_REGS_PER_ADDRESS 1
493
494 #ifdef REG_OK_STRICT
495 #  define GO_IF_LEGITIMATE_ADDRESS(MODE, OPERAND, ADDR) \
496 {                                                       \
497   if (legitimate_address_p ((MODE), (OPERAND), 1))      \
498     goto ADDR;                                          \
499 }
500 #else
501 #  define GO_IF_LEGITIMATE_ADDRESS(MODE, OPERAND, ADDR) \
502 {                                                       \
503   if (legitimate_address_p ((MODE), (OPERAND), 0))      \
504     goto ADDR;                                          \
505 }
506 #endif
507
508 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
509
510 #define REG_OK_FOR_BASE_NOSTRICT_P(X)   \
511   (REGNO (X) >= FIRST_PSEUDO_REGISTER   \
512    || (REGNO (X) == REG_FP)             \
513    || (REGNO (X) == REG_VFP)            \
514    || (REGNO (X) == REG_AP)             \
515    || REG_OK_FOR_BASE_STRICT_P(X))
516
517 #ifdef REG_OK_STRICT
518 #  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
519 #else
520 #  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
521 #endif
522
523 #define REG_OK_FOR_INDEX_P(X) 0
524
525 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN)             \
526 do { rtx orig_x = (X);                                  \
527   (X) = legitimize_address ((X), (OLDX), (MODE), 0);    \
528   if ((X) != orig_x && memory_address_p ((MODE), (X)))  \
529     goto WIN;                                           \
530 } while (0)
531
532 /* Is X a legitimate register to reload, or is it a pseudo stack-temp
533    that is problematic for push_reload() ?  */
534
535 #define LRA_REG(X)                                              \
536   (! (reg_equiv_memory_loc[REGNO (X)]                           \
537       && (reg_equiv_address[REGNO (X)]                          \
538           || num_not_at_initial_offset)))
539
540 /* Given a register X that failed the LRA_REG test, replace X
541    by its memory equivalent, find the reloads needed for THAT memory
542    location and substitute that back for the higher-level reload
543    that we're conducting...  */
544
545 /* WARNING: we reference 'ind_levels' and 'insn' which are local variables
546    in find_reloads_address (), where the LEGITIMIZE_RELOAD_ADDRESS macro
547    expands.  */
548
549 #define FRA_REG(X,MODE,OPNUM,TYPE)                                      \
550 do {                                                                    \
551   rtx tem = make_memloc ((X), REGNO (X));                               \
552                                                                         \
553   if (! strict_memory_address_p (GET_MODE (tem), XEXP (tem, 0)))        \
554     {                                                                   \
555       /* Note that we're doing address in address - cf. ADDR_TYPE  */   \
556       find_reloads_address (GET_MODE (tem), &tem, XEXP (tem, 0),        \
557                             &XEXP (tem, 0), (OPNUM),                    \
558                             ADDR_TYPE (TYPE), ind_levels, insn);        \
559     }                                                                   \
560   (X) = tem;                                                            \
561 } while (0)
562
563
564 /* For the IP2K, we want to be clever about picking IP vs DP for a
565    base pointer since IP only directly supports a zero displacement.
566    (Note that we have modified all the HI patterns to correctly handle
567    IP references by manipulating iph:ipl as we fetch the pieces).  */
568 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND,WIN)                 \
569 {                                                                            \
570   if (GET_CODE (X) == PLUS                                                   \
571       && REG_P (XEXP (X, 0))                                                 \
572       && GET_CODE (XEXP (X, 1)) == CONST_INT)                                \
573     {                                                                        \
574       int disp = INTVAL (XEXP (X, 1));                                       \
575       int fit = (disp >= 0 && disp <= (127 - 2 * GET_MODE_SIZE (MODE)));     \
576       rtx reg = XEXP (X, 0);                                                 \
577       if (!fit)                                                              \
578         {                                                                    \
579           push_reload ((X), NULL_RTX, &(X),                                  \
580                        NULL, MODE_BASE_REG_CLASS (MODE), GET_MODE (X),       \
581                        VOIDmode, 0, 0, OPNUM, TYPE);                         \
582           goto WIN;                                                          \
583         }                                                                    \
584       if (reg_equiv_memory_loc[REGNO (reg)]                                  \
585           && (reg_equiv_address[REGNO (reg)] || num_not_at_initial_offset))  \
586         {                                                                    \
587           rtx mem = make_memloc (reg, REGNO (reg));                          \
588           if (! strict_memory_address_p (GET_MODE (mem), XEXP (mem, 0)))     \
589             {                                                                \
590               /* Note that we're doing address in address - cf. ADDR_TYPE  */\
591                find_reloads_address (GET_MODE (mem), &mem, XEXP (mem, 0),    \
592                                     &XEXP (mem, 0), (OPNUM),                 \
593                                     ADDR_TYPE (TYPE), (IND), insn);          \
594             }                                                                \
595           push_reload (mem, NULL, &XEXP (X, 0), NULL,                        \
596                        GENERAL_REGS, Pmode, VOIDmode, 0, 0,                  \
597                        OPNUM, TYPE);                                         \
598           push_reload (X, NULL, &X, NULL,                                    \
599                        MODE_BASE_REG_CLASS (MODE), GET_MODE (X), VOIDmode,   \
600                        0, 0, OPNUM, TYPE);                                   \
601           goto WIN;                                                          \
602         }                                                                    \
603    }                                                                         \
604 }
605
606 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL)                \
607     do {                                                        \
608         if (ip2k_mode_dependent_address (ADDR)) goto LABEL;     \
609     } while (0)
610
611 #define LEGITIMATE_CONSTANT_P(X) 1
612
613 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 7
614
615 #define MEMORY_MOVE_COST(MODE,CLASS,IN) 6
616
617 #define SLOW_BYTE_ACCESS 0
618
619 #define NO_FUNCTION_CSE
620 #define NO_RECURSIVE_FUNCTION_CSE
621
622 #define TEXT_SECTION_ASM_OP ".text"
623 #define DATA_SECTION_ASM_OP ".data"
624
625 #define JUMP_TABLES_IN_TEXT_SECTION 1
626
627 #define ASM_COMMENT_START " ; "
628
629 #define ASM_APP_ON "/* #APP */\n"
630
631 #define ASM_APP_OFF "/* #NOAPP */\n"
632
633 #define ASM_OUTPUT_DOUBLE(STREAM, VALUE) \
634   fprintf ((STREAM), ".double %.20e\n", (VALUE))
635 #define ASM_OUTPUT_FLOAT(STREAM, VALUE) \
636   asm_output_float ((STREAM), (VALUE))
637
638 #define ASM_OUTPUT_INT(FILE, VALUE)                     \
639  ( fprintf ((FILE), "\t.long "),                        \
640    output_addr_const ((FILE), (VALUE)),                 \
641    fputs ("\n", (FILE)))
642
643 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
644   asm_output_short ((FILE), (VALUE))
645 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
646   asm_output_char ((FILE), (VALUE))
647
648 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
649   asm_output_byte ((FILE), (VALUE))
650
651 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) \
652   ((C) == '\n' || ((C) == '$'))
653
654 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)  \
655 do {                                                    \
656      fputs ("\t.comm ", (STREAM));                      \
657      assemble_name ((STREAM), (NAME));                  \
658      fprintf ((STREAM), ",%d\n", (int)(SIZE));          \
659 } while (0)
660
661 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED)   \
662 do {                                                    \
663      fputs ("\t.lcomm ", (STREAM));                     \
664      assemble_name ((STREAM), (NAME));                  \
665      fprintf ((STREAM), ",%d\n", (int)(SIZE));          \
666 } while (0)
667
668 #undef WEAK_ASM_OP
669 #define WEAK_ASM_OP     ".weak"
670
671 #undef ASM_DECLARE_FUNCTION_SIZE
672 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL)            \
673   do {                                                          \
674     if (!flag_inhibit_size_directive)                           \
675       ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME);                   \
676   } while (0)
677
678 #define ESCAPES \
679 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
680 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
681 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
682 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
683 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
684 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
685 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
686 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
687 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
688    ASM_OUTPUT_LIMITED_STRING macros.  Each byte in the table
689    corresponds to a particular byte value [0..255].  For any
690    given byte value, if the value in the corresponding table
691    position is zero, the given character can be output directly.
692    If the table value is 1, the byte must be output as a \ooo
693    octal escape.  If the tables value is anything else, then the
694    byte value should be output as a \ followed by the value
695    in the table.  Note that we can use standard UN*X escape
696    sequences for many control characters, but we don't use
697    \a to represent BEL because some svr4 assemblers (e.g. on
698    the i386) don't know about that.  Also, we don't use \v
699    since some versions of gas, such as 2.2 did not accept it.  */
700
701 /* Globalizing directive for a label.  */
702 #define GLOBAL_ASM_OP ".global\t"
703
704 #define REGISTER_NAMES  {                                       \
705   "$00","$01","$02","$03","iph","ipl","sph","spl",              \
706   "pch","pcl","wreg","status","dph","dpl","$0e","mulh",         \
707   "$10","$11","$12","$13","$14","$15","$16","$17",              \
708   "$18","$19","$1a","$1b","$1c","$1d","$1e","$1f",              \
709   "$20","$21","$22","$23","$24","$25","$26","$27",              \
710   "$28","$29","$2a","$2b","$2c","$2d","$2e","$2f",              \
711   "$30","$31","$32","$33","$34","$35","$36","$37",              \
712   "$38","$39","$3a","$3b","$3c","$3d","$3e","$3f",              \
713   "$40","$41","$42","$43","$44","$45","$46","$47",              \
714   "$48","$49","$4a","$4b","$4c","$4d","$4e","$4f",              \
715   "$50","$51","$52","$53","$54","$55","$56","$57",              \
716   "$58","$59","$5a","$5b","$5c","$5d","$5e","$5f",              \
717   "$60","$61","$62","$63","$64","$65","$66","$67",              \
718   "$68","$69","$6a","$6b","$6c","$6d","$6e","$6f",              \
719   "$70","$71","$72","$73","$74","$75","$76","$77",              \
720   "$78","$79","$7a","$7b","$7c","$7d","callh","calll",          \
721   "$80","$81","$82","$83","$84","$85","$86","$87",              \
722   "$88","$89","$8a","$8b","$8c","$8d","$8e","$8f",              \
723   "$90","$91","$92","$93","$94","$95","$96","$97",              \
724   "$98","$99","$9a","$9b","$9c","$9d","$9e","$9f",              \
725   "$a0","$a1","$a2","$a3","$a4","$a5","$a6","$a7",              \
726   "$a8","$a9","$aa","$ab","$ac","$ad","$ae","$af",              \
727   "$b0","$b1","$b2","$b3","$b4","$b5","$b6","$b7",              \
728   "$b8","$b9","$ba","$bb","$bc","$bd","$be","$bf",              \
729   "$c0","$c1","$c2","$c3","$c4","$c5","$c6","$c7",              \
730   "$c8","$c9","$ca","$cb","$cc","$cd","$ce","$cf",              \
731   "$d0","$d1","$d2","$d3","$d4","$d5","$d6","$d7",              \
732   "$d8","$d9","$da","$db","$dc","$dd","$de","$df",              \
733   "$e0","$e1","$e2","$e3","$e4","$e5","$e6","$e7",              \
734   "$e8","$e9","$ea","$eb","$ec","$ed","$ee","$ef",              \
735   "$f0","$f1","$f2","$f3","$f4","$f5","$f6","$f7",              \
736   "$f8","$f9","$fa","$fb","$fc","$fd","$fe","$ff",              \
737   "vfph","vfpl","vaph","vapl"}
738
739 #define PRINT_OPERAND(STREAM, X, CODE) \
740   print_operand ((STREAM), (X), (CODE))
741
742 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
743   ((CODE) == '<' || (CODE) == '>')
744
745 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
746
747 /* Since register names don't have a prefix, we must preface all
748    user identifiers with the '_' to prevent confusion.  */
749
750 #undef USER_LABEL_PREFIX
751 #define USER_LABEL_PREFIX "_"
752 #define LOCAL_LABEL_PREFIX ".L"
753
754 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)              \
755   asm_fprintf ((STREAM), "\tpage\t%L%d\n\tjmp\t%L%d\n", (VALUE), (VALUE))
756
757 /* elfos.h presumes that we will want switch/case dispatch tables aligned.
758    This is not so for the ip2k.  */
759 #undef ASM_OUTPUT_CASE_LABEL
760
761 #undef ASM_OUTPUT_ADDR_VEC_ELT
762 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)                          \
763   asm_fprintf ((STREAM), "\tpage\t%L%d\n\tjmp\t%L%d\n", (VALUE), (VALUE))
764
765 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
766   fprintf ((STREAM), "\t.align %d\n", (POWER))
767
768 /* Since instructions are 16 bit word addresses, we should lie and claim that
769    the dispatch vectors are in QImode.  Otherwise the offset into the jump
770    table will be scaled by the MODE_SIZE.  */
771
772 #define CASE_VECTOR_MODE QImode
773
774 #undef WORD_REGISTER_OPERATIONS
775
776 #define MOVE_MAX 1
777
778 #define MOVE_RATIO              3
779 /* MOVE_RATIO is the number of move instructions that is better than a
780    block move.  Make this small on the IP2k, since the code size grows very
781    large with each move.  */
782
783 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
784
785 #define Pmode HImode
786
787 #define FUNCTION_MODE HImode
788
789 #define INTEGRATE_THRESHOLD(DECL) \
790   (1 + (3 * list_length (DECL_ARGUMENTS (DECL)) / 2))
791
792 #define DOLLARS_IN_IDENTIFIERS 0
793
794 extern int ip2k_reorg_in_progress;
795 /* Flag if we're in the middle of IP2k-specific reorganization.  */
796
797 extern int ip2k_reorg_completed;
798 /* Flag if we've completed our IP2k-specific reorganization.  If we have
799    then we allow quite a few more tricks than before.  */
800
801 extern int ip2k_reorg_split_dimode;
802 extern int ip2k_reorg_split_simode;
803 extern int ip2k_reorg_split_qimode;
804 extern int ip2k_reorg_split_himode;
805 /* Flags for various split operations that we run in sequence.  */
806
807 extern int ip2k_reorg_merge_qimode;
808 /* Flag to indicate that it's safe to merge QImode operands.  */
809
810 #define GIV_SORT_CRITERION(X, Y)                        \
811   do {                                                  \
812     if (GET_CODE ((X)->add_val) == CONST_INT            \
813         && GET_CODE ((Y)->add_val) == CONST_INT)        \
814       return INTVAL ((X)->add_val) - INTVAL ((Y)->add_val); \
815   } while (0)
816
817 /* In some cases, the strength reduction optimization pass can
818    produce better code if this is defined.  This macro controls the
819    order that induction variables are combined.  This macro is
820    particularly useful if the target has limited addressing modes.
821    For instance, the SH target has only positive offsets in
822    addresses.  Thus sorting to put the smallest address first allows
823    the most combinations to be found.  */
824
825 #define TRAMPOLINE_TEMPLATE(FILE) abort ()
826
827 #define TRAMPOLINE_SIZE 4
828
829 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)                       \
830 {                                                                       \
831   emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)),     \
832                            CXT);                                        \
833   emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)),     \
834                            FNADDR);                                     \
835 }
836 /* Store in cc_status the expressions
837    that the condition codes will describe
838    after execution of an instruction whose pattern is EXP.
839    Do not alter them if the instruction would not alter the cc's.  */
840
841 #define NOTICE_UPDATE_CC(EXP, INSN) (void)(0)
842
843 /* Output assembler code to FILE to increment profiler label # LABELNO
844    for profiling a function entry.  */
845
846 #define FUNCTION_PROFILER(FILE, LABELNO)  \
847   fprintf ((FILE), "/* profiler %d */", (LABELNO))
848
849 #define TARGET_MEM_FUNCTIONS
850
851 #undef ENDFILE_SPEC
852 #undef LINK_SPEC
853 #undef STARTFILE_SPEC
854
855 #if defined(__STDC__) || defined(ALMOST_STDC)
856 #define AS2(a,b,c) #a "\t" #b "," #c
857 #define AS1(a,b) #a "\t" #b
858 #else
859 #define AS1(a,b) "a     b"
860 #define AS2(a,b,c) "a   b,c"
861 #endif
862 #define OUT_AS1(a,b) output_asm_insn (AS1 (a,b), operands)
863 #define OUT_AS2(a,b,c) output_asm_insn (AS2 (a,b,c), operands)
864 #define CR_TAB "\n\t"
865
866 #define INIT_TARGET_OPTABS                              \
867 {                                                       \
868   smul_optab->handlers[(int) SImode].libfunc            \
869     = gen_rtx_SYMBOL_REF (Pmode, "_mulsi3");            \
870                                                         \
871   smul_optab->handlers[(int) DImode].libfunc            \
872     = gen_rtx_SYMBOL_REF (Pmode, "_muldi3");            \
873                                                         \
874   cmp_optab->handlers[(int) HImode].libfunc             \
875     = gen_rtx_SYMBOL_REF (Pmode, "_cmphi2");            \
876                                                         \
877   cmp_optab->handlers[(int) SImode].libfunc             \
878     = gen_rtx_SYMBOL_REF (Pmode, "_cmpsi2");            \
879 }
880
881 #define PREDICATE_CODES                                 \
882   {"ip2k_ip_operand", {MEM}},                           \
883   {"ip2k_short_operand", {MEM}},                        \
884   {"ip2k_gen_operand", {MEM, REG, SUBREG}},             \
885   {"ip2k_nonptr_operand", {REG, SUBREG}},               \
886   {"ip2k_ptr_operand", {REG, SUBREG}},                  \
887   {"ip2k_split_dest_operand", {REG, SUBREG, MEM}},      \
888   {"ip2k_sp_operand", {REG}},                           \
889   {"ip2k_nonsp_reg_operand", {REG, SUBREG}},            \
890   {"ip2k_symbol_ref_operand", {SYMBOL_REF}},            \
891   {"ip2k_binary_operator", {PLUS, MINUS, MULT, DIV,     \
892                             UDIV, MOD, UMOD, AND, IOR,  \
893                             XOR, COMPARE, ASHIFT,       \
894                             ASHIFTRT, LSHIFTRT}},       \
895   {"ip2k_unary_operator", {NEG, NOT, SIGN_EXTEND,       \
896                            ZERO_EXTEND}},               \
897   {"ip2k_unsigned_comparison_operator", {LTU, GTU, NE,  \
898                                          EQ, LEU, GEU}},\
899   {"ip2k_signed_comparison_operator", {LT, GT, LE, GE}},
900
901 #define DWARF2_DEBUGGING_INFO 1
902
903 #define DWARF2_ASM_LINE_DEBUG_INFO      1
904
905 #define DBX_REGISTER_NUMBER(REGNO)      (REGNO)
906
907 /* Miscellaneous macros to describe machine specifics. */
908
909 #define IS_PSEUDO_P(R)  (REGNO (R) >= FIRST_PSEUDO_REGISTER)
910
911 /* Default calculations would cause DWARF address sizes to be 2 bytes,
912    but the Harvard architecture of the IP2k and the word-addressed 64k
913    of instruction memory causes us to want a 32-bit "address" field.  */
914 #undef DWARF2_ADDR_SIZE
915 #define DWARF2_ADDR_SIZE        4
916