1 /* Definitions of target machine GNU compiler. IA-64 version.
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
3 Contributed by James E. Wilson <wilson@cygnus.com> and
4 David Mosberger <davidm@hpl.hp.com>.
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* ??? Use of the upper 32 FP registers for integer values will make context
24 switching slower, because the kernel only saves any registers past f32 if
27 /* ??? Look at ABI group documents for list of preprocessor macros and
28 other features required for ABI compliance. */
30 /* ??? Functions containing a non-local goto target save many registers. Why?
31 See for instance execute/920428-2.c. */
33 /* ??? Get CAN_DEBUG_WITHOUT_FP working so that -fomit-frame-pointer is not
36 /* ??? Add support for short data/bss sections. */
39 /* Run-time target specifications */
41 /* Define this to be a string constant containing `-D' options to define the
42 predefined macros that identify this machine and system. These macros will
43 be predefined unless the `-ansi' option is specified. */
44 /* ??? This is undefed in svr4.h. */
45 #define CPP_PREDEFINES "-Dia64 -Amachine(ia64)"
47 /* This declaration should be present. */
48 extern int target_flags;
50 /* This series of macros is to allow compiler command arguments to enable or
51 disable the use of optional features of the target machine. */
53 #define MASK_BIG_ENDIAN 0x00000001 /* Generate big endian code. */
55 #define MASK_GNU_AS 0x00000002 /* Generate code for GNU as. */
57 #define MASK_GNU_LD 0x00000004 /* Generate code for GNU ld. */
59 #define MASK_NO_PIC 0x00000008 /* Generate code without GP reg. */
61 #define MASK_VOL_ASM_STOP 0x00000010 /* Emit stop bits for vol ext asm. */
63 #define MASK_A_STEP 0x00000020 /* Emit code for Itanium A step. */
65 #define MASK_REG_NAMES 0x00000040 /* Use in/loc/out register names. */
67 #define MASK_NO_SDATA 0x00000080 /* Disable sdata/scommon/sbss. */
69 #define MASK_CONST_GP 0x00000100 /* treat gp as program-wide constant */
71 #define MASK_AUTO_PIC 0x00000200 /* generate automatically PIC */
73 #define MASK_DWARF2_ASM 0x40000000 /* test dwarf2 line info via gas. */
75 #define TARGET_BIG_ENDIAN (target_flags & MASK_BIG_ENDIAN)
77 #define TARGET_GNU_AS (target_flags & MASK_GNU_AS)
79 #define TARGET_GNU_LD (target_flags & MASK_GNU_LD)
81 #define TARGET_NO_PIC (target_flags & MASK_NO_PIC)
83 #define TARGET_VOL_ASM_STOP (target_flags & MASK_VOL_ASM_STOP)
85 #define TARGET_A_STEP (target_flags & MASK_A_STEP)
87 #define TARGET_REG_NAMES (target_flags & MASK_REG_NAMES)
89 #define TARGET_NO_SDATA (target_flags & MASK_NO_SDATA)
91 #define TARGET_CONST_GP (target_flags & MASK_CONST_GP)
93 #define TARGET_AUTO_PIC (target_flags & MASK_AUTO_PIC)
95 #define TARGET_DWARF2_ASM (target_flags & MASK_DWARF2_ASM)
97 /* This macro defines names of command options to set and clear bits in
98 `target_flags'. Its definition is an initializer with a subgrouping for
99 each command option. */
101 #define TARGET_SWITCHES \
103 { "big-endian", MASK_BIG_ENDIAN, \
104 "Generate big endian code" }, \
105 { "little-endian", -MASK_BIG_ENDIAN, \
106 "Generate little endian code" }, \
107 { "gnu-as", MASK_GNU_AS, \
108 "Generate code for GNU as" }, \
109 { "no-gnu-as", -MASK_GNU_AS, \
110 "Generate code for Intel as" }, \
111 { "gnu-ld", MASK_GNU_LD, \
112 "Generate code for GNU ld" }, \
113 { "no-gnu-ld", -MASK_GNU_LD, \
114 "Generate code for Intel ld" }, \
115 { "no-pic", MASK_NO_PIC, \
116 "Generate code without GP reg" }, \
117 { "volatile-asm-stop", MASK_VOL_ASM_STOP, \
118 "Emit stop bits before and after volatile extended asms" }, \
119 { "no-volatile-asm-stop", -MASK_VOL_ASM_STOP, \
120 "Don't emit stop bits before and after volatile extended asms" }, \
121 { "a-step", MASK_A_STEP, \
122 "Emit code for Itanium (TM) processor A step"}, \
123 { "register-names", MASK_REG_NAMES, \
124 "Use in/loc/out register names"}, \
125 { "no-sdata", MASK_NO_SDATA, \
126 "Disable use of sdata/scommon/sbss"}, \
127 { "sdata", -MASK_NO_SDATA, \
128 "Enable use of sdata/scommon/sbss"}, \
129 { "constant-gp", MASK_CONST_GP, \
130 "gp is constant (but save/restore gp on indirect calls)" }, \
131 { "auto-pic", MASK_AUTO_PIC, \
132 "Generate self-relocatable code" }, \
133 { "dwarf2-asm", MASK_DWARF2_ASM, \
134 "Enable Dwarf 2 line debug info via GNU as"}, \
135 { "no-dwarf2-asm", -MASK_DWARF2_ASM, \
136 "Disable Dwarf 2 line debug info via GNU as"}, \
137 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT, \
141 /* Default target_flags if no switches are specified */
143 #ifndef TARGET_DEFAULT
144 #define TARGET_DEFAULT MASK_DWARF2_ASM
147 #ifndef TARGET_CPU_DEFAULT
148 #define TARGET_CPU_DEFAULT 0
151 /* This macro is similar to `TARGET_SWITCHES' but defines names of command
152 options that have values. Its definition is an initializer with a
153 subgrouping for each command option. */
155 extern const char *ia64_fixed_range_string;
156 #define TARGET_OPTIONS \
158 { "fixed-range=", &ia64_fixed_range_string, \
159 "Specify range of registers to make fixed."}, \
162 /* This macro is a C statement to print on `stderr' a string describing the
163 particular machine description choice. */
165 #define TARGET_VERSION fprintf (stderr, " (IA-64)");
167 /* Sometimes certain combinations of command options do not make sense on a
168 particular target machine. You can define a macro `OVERRIDE_OPTIONS' to
169 take account of this. This macro, if defined, is executed once just after
170 all the command options have been parsed. */
172 #define OVERRIDE_OPTIONS ia64_override_options ()
174 /* Some machines may desire to change what optimizations are performed for
175 various optimization levels. This macro, if defined, is executed once just
176 after the optimization level is determined and before the remainder of the
177 command options have been parsed. Values set in this macro are used as the
178 default values for the other command line options. */
180 /* #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) */
182 /* Define this macro if debugging can be performed even without a frame
183 pointer. If this macro is defined, GNU CC will turn on the
184 `-fomit-frame-pointer' option whenever `-O' is specified. */
185 /* ??? Need to define this. */
186 /* #define CAN_DEBUG_WITHOUT_FP */
189 /* Driver configuration */
191 /* A C string constant that tells the GNU CC driver program options to pass to
192 CPP. It can also specify how to translate options you give to GNU CC into
193 options for GNU CC to pass to the CPP. */
195 /* ??? __LONG_MAX__ depends on LP64/ILP32 switch. */
196 /* ??? An alternative is to modify glimits.h to check for __LP64__ instead
197 of checked for CPU specific defines. We could also get rid of all LONG_MAX
198 defines in other tm.h files. */
200 "%{mcpu=itanium:-D__itanium__} %{mbig-endian:-D__BIG_ENDIAN__} \
201 -D__LONG_MAX__=9223372036854775807L"
203 /* If this macro is defined, the preprocessor will not define the builtin macro
204 `__SIZE_TYPE__'. The macro `__SIZE_TYPE__' must then be defined by
207 This should be defined if `SIZE_TYPE' depends on target dependent flags
208 which are not accessible to the preprocessor. Otherwise, it should not be
210 /* ??? Needs to be defined for P64 code. */
211 /* #define NO_BUILTIN_SIZE_TYPE */
213 /* If this macro is defined, the preprocessor will not define the builtin macro
214 `__PTRDIFF_TYPE__'. The macro `__PTRDIFF_TYPE__' must then be defined by
217 This should be defined if `PTRDIFF_TYPE' depends on target dependent flags
218 which are not accessible to the preprocessor. Otherwise, it should not be
220 /* ??? Needs to be defined for P64 code. */
221 /* #define NO_BUILTIN_PTRDIFF_TYPE */
223 /* A C string constant that tells the GNU CC driver program options to pass to
224 `cc1'. It can also specify how to translate options you give to GNU CC into
225 options for GNU CC to pass to the `cc1'. */
227 /* #define CC1_SPEC "" */
229 /* A C string constant that tells the GNU CC driver program options to pass to
230 `cc1plus'. It can also specify how to translate options you give to GNU CC
231 into options for GNU CC to pass to the `cc1plus'. */
233 /* #define CC1PLUS_SPEC "" */
235 /* A C string constant that tells the GNU CC driver program options to pass to
236 the assembler. It can also specify how to translate options you give to GNU
237 CC into options for GNU CC to pass to the assembler. */
239 #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GNU_AS) != 0
241 #define ASM_SPEC "%{mno-gnu-as:-N so}"
244 #define ASM_SPEC "%{!mgnu-as:-N so}"
247 /* A C string constant that tells the GNU CC driver program options to pass to
248 the linker. It can also specify how to translate options you give to GNU CC
249 into options for GNU CC to pass to the linker. */
251 /* The Intel linker does not support dynamic linking, so we need -dn.
252 The Intel linker gives annoying messages unless -N so is used. */
253 #if ((TARGET_CPU_DEFAULT | TARGET_DEFAULT) & MASK_GNU_LD) != 0
255 #define LINK_SPEC "%{mno-gnu-ld:-dn -N so}"
258 #define LINK_SPEC "%{!mgnu-ld:-dn -N so}"
264 /* Define this macro to have the value 1 if the most significant bit in a byte
265 has the lowest number; otherwise define it to have the value zero. */
267 #define BITS_BIG_ENDIAN 0
269 /* Define this macro to have the value 1 if the most significant byte in a word
270 has the lowest number. This macro need not be a constant. */
272 #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
274 /* Define this macro to have the value 1 if, in a multiword object, the most
275 significant word has the lowest number. */
277 #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN != 0)
279 /* Define this macro if WORDS_BIG_ENDIAN is not constant. This must be a
280 constant value with the same meaning as WORDS_BIG_ENDIAN, which will be used
281 only when compiling libgcc2.c. Typically the value will be set based on
282 preprocessor defines. */
283 #if defined(__BIG_ENDIAN__)
284 #define LIBGCC2_WORDS_BIG_ENDIAN 1
286 #define LIBGCC2_WORDS_BIG_ENDIAN 0
289 /* Define this macro to be the number of bits in an addressable storage unit
290 (byte); normally 8. */
291 #define BITS_PER_UNIT 8
293 /* Number of bits in a word; normally 32. */
294 #define BITS_PER_WORD 64
296 /* Number of storage units in a word; normally 4. */
297 #define UNITS_PER_WORD 8
299 /* Width of a pointer, in bits. You must specify a value no wider than the
300 width of `Pmode'. If it is not equal to the width of `Pmode', you must
301 define `POINTERS_EXTEND_UNSIGNED'. */
302 /* ??? Implement optional 32 bit pointer size later? */
303 #define POINTER_SIZE 64
305 /* A C expression whose value is nonzero if pointers that need to be extended
306 from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and zero if
307 they are zero-extended.
309 You need not define this macro if the `POINTER_SIZE' is equal to the width
311 /* ??? May need this for 32 bit pointers. */
312 /* #define POINTERS_EXTEND_UNSIGNED */
314 /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and
315 which has the specified mode and signedness is to be stored in a register.
316 This macro is only called when TYPE is a scalar type. */
318 /* ??? Maybe sign-extend 32 bit values like the alpha? Or maybe zero-extend
319 because we only have zero-extending loads? */
320 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
323 if (GET_MODE_CLASS (MODE) == MODE_INT \
324 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
329 /* Define this macro if the promotion described by `PROMOTE_MODE' should also
330 be done for outgoing function arguments. */
331 /* ??? ABI doesn't allow us to define this. */
332 /* #define PROMOTE_FUNCTION_ARGS */
334 /* Define this macro if the promotion described by `PROMOTE_MODE' should also
335 be done for the return value of functions.
337 If this macro is defined, `FUNCTION_VALUE' must perform the same promotions
338 done by `PROMOTE_MODE'. */
339 /* ??? ABI doesn't allow us to define this. */
340 /* #define PROMOTE_FUNCTION_RETURN */
342 /* Normal alignment required for function parameters on the stack, in bits.
343 All stack parameters receive at least this much alignment regardless of data
344 type. On most machines, this is the same as the size of an integer. */
345 #define PARM_BOUNDARY 64
347 /* Define this macro if you wish to preserve a certain alignment for the stack
348 pointer. The definition is a C expression for the desired alignment
349 (measured in bits). */
351 #define STACK_BOUNDARY 128
353 /* Align frames on double word boundaries */
354 #ifndef IA64_STACK_ALIGN
355 #define IA64_STACK_ALIGN(LOC) (((LOC) + 15) & ~15)
358 /* Alignment required for a function entry point, in bits. */
359 #define FUNCTION_BOUNDARY 128
361 /* Biggest alignment that any data type can require on this machine,
363 /* Optional x86 80-bit float, quad-precision 128-bit float, and quad-word
364 128 bit integers all require 128 bit alignment. */
365 #define BIGGEST_ALIGNMENT 128
367 /* If defined, a C expression to compute the alignment for a static variable.
368 TYPE is the data type, and ALIGN is the alignment that the object
369 would ordinarily have. The value of this macro is used instead of that
370 alignment to align the object. */
372 #define DATA_ALIGNMENT(TYPE, ALIGN) \
373 (TREE_CODE (TYPE) == ARRAY_TYPE \
374 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
375 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
377 /* If defined, a C expression to compute the alignment given to a constant that
378 is being placed in memory. CONSTANT is the constant and ALIGN is the
379 alignment that the object would ordinarily have. The value of this macro is
380 used instead of that alignment to align the object. */
382 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
383 (TREE_CODE (EXP) == STRING_CST \
384 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
386 /* Define this macro to be the value 1 if instructions will fail to work if
387 given data not on the nominal alignment. If instructions will merely go
388 slower in that case, define this macro as 0. */
389 #define STRICT_ALIGNMENT 1
391 /* Define this if you wish to imitate the way many other C compilers handle
392 alignment of bitfields and the structures that contain them.
393 The behavior is that the type written for a bitfield (`int', `short', or
394 other integer type) imposes an alignment for the entire structure, as if the
395 structure really did contain an ordinary field of that type. In addition,
396 the bitfield is placed within the structure so that it would fit within such
397 a field, not crossing a boundary for it. */
398 #define PCC_BITFIELD_TYPE_MATTERS 1
400 /* Define this macro as an expression for the overall size of a structure
401 (given by STRUCT as a tree node) when the size computed from the fields is
402 SIZE and the alignment is ALIGN.
404 The default is to round SIZE up to a multiple of ALIGN. */
405 /* ??? Might need this for 80-bit double-extended floats. */
406 /* #define ROUND_TYPE_SIZE(STRUCT, SIZE, ALIGN) */
408 /* Define this macro as an expression for the alignment of a structure (given
409 by STRUCT as a tree node) if the alignment computed in the usual way is
410 COMPUTED and the alignment explicitly specified was SPECIFIED.
412 The default is to use SPECIFIED if it is larger; otherwise, use the smaller
413 of COMPUTED and `BIGGEST_ALIGNMENT' */
414 /* ??? Might need this for 80-bit double-extended floats. */
415 /* #define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) */
417 /* An integer expression for the size in bits of the largest integer machine
418 mode that should actually be used. */
420 /* Allow pairs of registers to be used, which is the intent of the default. */
421 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
423 /* A code distinguishing the floating point format of the target machine. */
424 #define TARGET_FLOAT_FORMAT IEEE_FLOAT_FORMAT
426 /* GNU CC supports two ways of implementing C++ vtables: traditional or with
427 so-called "thunks". The flag `-fvtable-thunk' chooses between them. Define
428 this macro to be a C expression for the default value of that flag. If
429 `DEFAULT_VTABLE_THUNKS' is 0, GNU CC uses the traditional implementation by
430 default. The "thunk" implementation is more efficient (especially if you
431 have provided an implementation of `ASM_OUTPUT_MI_THUNK', but is not binary
432 compatible with code compiled using the traditional implementation. If you
433 are writing a new ports, define `DEFAULT_VTABLE_THUNKS' to 1.
435 If you do not define this macro, the default for `-fvtable-thunk' is 0. */
436 #define DEFAULT_VTABLE_THUNKS 1
439 /* Layout of Source Language Data Types */
441 /* A C expression for the size in bits of the type `int' on the target machine.
442 If you don't define this, the default is one word. */
443 #define INT_TYPE_SIZE 32
445 /* A C expression for the size in bits of the type `short' on the target
446 machine. If you don't define this, the default is half a word. (If this
447 would be less than one storage unit, it is rounded up to one unit.) */
448 #define SHORT_TYPE_SIZE 16
450 /* A C expression for the size in bits of the type `long' on the target
451 machine. If you don't define this, the default is one word. */
452 /* ??? Should be 32 for ILP32 code. */
453 #define LONG_TYPE_SIZE 64
455 /* Maximum number for the size in bits of the type `long' on the target
456 machine. If this is undefined, the default is `LONG_TYPE_SIZE'. Otherwise,
457 it is the constant value that is the largest value that `LONG_TYPE_SIZE' can
458 have at run-time. This is used in `cpp'. */
459 /* ??? Should be 64 for ILP32 code. */
460 /* #define MAX_LONG_TYPE_SIZE */
462 /* A C expression for the size in bits of the type `long long' on the target
463 machine. If you don't define this, the default is two words. If you want
464 to support GNU Ada on your machine, the value of macro must be at least 64. */
465 #define LONG_LONG_TYPE_SIZE 64
467 /* A C expression for the size in bits of the type `char' on the target
468 machine. If you don't define this, the default is one quarter of a word.
469 (If this would be less than one storage unit, it is rounded up to one unit.) */
470 #define CHAR_TYPE_SIZE 8
472 /* A C expression for the size in bits of the type `float' on the target
473 machine. If you don't define this, the default is one word. */
474 #define FLOAT_TYPE_SIZE 32
476 /* A C expression for the size in bits of the type `double' on the target
477 machine. If you don't define this, the default is two words. */
478 #define DOUBLE_TYPE_SIZE 64
480 /* A C expression for the size in bits of the type `long double' on the target
481 machine. If you don't define this, the default is two words. */
482 /* ??? We have an 80 bit extended double format. */
483 #define LONG_DOUBLE_TYPE_SIZE 64
485 /* An expression whose value is 1 or 0, according to whether the type `char'
486 should be signed or unsigned by default. The user can always override this
487 default with the options `-fsigned-char' and `-funsigned-char'. */
488 #define DEFAULT_SIGNED_CHAR 1
490 /* A C expression for a string describing the name of the data type to use for
491 size values. The typedef name `size_t' is defined using the contents of the
493 /* ??? Needs to be defined for P64 code. */
494 /* #define SIZE_TYPE */
496 /* A C expression for a string describing the name of the data type to use for
497 the result of subtracting two pointers. The typedef name `ptrdiff_t' is
498 defined using the contents of the string. See `SIZE_TYPE' above for more
500 /* ??? Needs to be defined for P64 code. */
501 /* #define PTRDIFF_TYPE */
503 /* A C expression for a string describing the name of the data type to use for
504 wide characters. The typedef name `wchar_t' is defined using the contents
505 of the string. See `SIZE_TYPE' above for more information. */
506 /* #define WCHAR_TYPE */
508 /* A C expression for the size in bits of the data type for wide characters.
509 This is used in `cpp', which cannot make use of `WCHAR_TYPE'. */
510 /* #define WCHAR_TYPE_SIZE */
512 /* Maximum number for the size in bits of the data type for wide characters.
513 If this is undefined, the default is `WCHAR_TYPE_SIZE'. Otherwise, it is
514 the constant value that is the largest value that `WCHAR_TYPE_SIZE' can have
515 at run-time. This is used in `cpp'. */
516 /* #define MAX_WCHAR_TYPE_SIZE */
518 /* A C constant expression for the integer value for escape sequence
520 #define TARGET_BELL 0x7
522 /* C constant expressions for the integer values for escape sequences
523 `\b', `\t' and `\n'. */
524 #define TARGET_BS 0x8
525 #define TARGET_TAB 0x9
526 #define TARGET_NEWLINE 0xa
528 /* C constant expressions for the integer values for escape sequences
529 `\v', `\f' and `\r'. */
530 #define TARGET_VT 0xb
531 #define TARGET_FF 0xc
532 #define TARGET_CR 0xd
535 /* Register Basics */
537 /* Number of hardware registers known to the compiler.
538 We have 128 general registers, 128 floating point registers, 64 predicate
539 registers, 8 branch registers, and one frame pointer register. */
541 /* ??? Should add ar.lc, ar.ec and probably also ar.pfs. */
543 #define FIRST_PSEUDO_REGISTER 330
545 /* Ranges for the various kinds of registers. */
546 #define ADDL_REGNO_P(REGNO) ((REGNO) >= 0 && (REGNO) <= 3)
547 #define GR_REGNO_P(REGNO) ((REGNO) >= 0 && (REGNO) <= 127)
548 #define FR_FP_REGNO_P(REGNO) \
549 (((REGNO) >= 128 && (REGNO) <= 143) || ((REGNO) >= 152 && (REGNO) <= 223))
550 #define FR_INT_REGNO_P(REGNO) \
551 (((REGNO) >= 144 && (REGNO) <= 151) || ((REGNO) >= 224 && (REGNO) <= 255))
552 #define FR_REGNO_P(REGNO) ((REGNO) >= 128 && (REGNO) <= 255)
553 #define PR_REGNO_P(REGNO) ((REGNO) >= 256 && (REGNO) <= 319)
554 #define BR_REGNO_P(REGNO) ((REGNO) >= 320 && (REGNO) <= 327)
555 #define GENERAL_REGNO_P(REGNO) \
556 (GR_REGNO_P (REGNO) \
557 || (REGNO) == FRAME_POINTER_REGNUM \
558 || (REGNO) == RETURN_ADDRESS_REGNUM)
560 #define GR_REG(REGNO) ((REGNO) + 0)
561 #define FR_REG(REGNO) ((REGNO) + 128)
562 #define PR_REG(REGNO) ((REGNO) + 256)
563 #define BR_REG(REGNO) ((REGNO) + 320)
564 #define OUT_REG(REGNO) ((REGNO) + 120)
565 #define IN_REG(REGNO) ((REGNO) + 112)
566 #define LOC_REG(REGNO) ((REGNO) + 32)
568 #define IN_REGNO_P(REGNO) ((REGNO) >= IN_REG (0) && (REGNO) <= IN_REG (7))
569 #define LOC_REGNO_P(REGNO) ((REGNO) >= LOC_REG (0) && (REGNO) <= LOC_REG (79))
570 #define OUT_REGNO_P(REGNO) ((REGNO) >= OUT_REG (0) && (REGNO) <= OUT_REG (7))
572 /* ??? Don't really need two sets of macros. I like this one better because
573 it is less typing. */
574 #define R_GR(REGNO) GR_REG (REGNO)
575 #define R_FR(REGNO) FR_REG (REGNO)
576 #define R_PR(REGNO) PR_REG (REGNO)
577 #define R_BR(REGNO) BR_REG (REGNO)
579 /* An initializer that says which registers are used for fixed purposes all
580 throughout the compiled code and are therefore not available for general
584 r1: global pointer (gp)
585 r12: stack pointer (sp)
586 r13: thread pointer (tp)
590 fp: eliminable frame pointer */
592 /* The last 16 stacked regs are reserved for the 8 input and 8 output
595 /* ??? Must mark the next 3 stacked regs as fixed, because ia64_expand_prologue
596 assumes that three locals are available for fp, b0, and ar.pfs. */
598 /* ??? Should mark b0 as fixed? */
600 #define FIXED_REGISTERS \
601 { /* General registers. */ \
602 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, \
603 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
604 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
605 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
606 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
607 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
608 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
609 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
610 /* Floating-point registers. */ \
611 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
612 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
613 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
614 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
615 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
616 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
617 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
618 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
619 /* Predicate registers. */ \
620 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
621 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
622 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
623 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
624 /* Branch registers. */ \
625 0, 0, 0, 0, 0, 0, 0, 0, \
630 /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered (in
631 general) by function calls as well as for fixed registers. This macro
632 therefore identifies the registers that are not available for general
633 allocation of values that must live across function calls. */
635 #define CALL_USED_REGISTERS \
636 { /* General registers. */ \
637 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
638 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
639 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
640 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
641 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
642 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
643 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
644 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, \
645 /* Floating-point registers. */ \
646 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
647 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
648 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
649 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
650 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
651 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
652 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
653 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
654 /* Predicate registers. */ \
655 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
656 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
657 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
658 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
659 /* Branch registers. */ \
660 1, 0, 0, 0, 0, 0, 1, 1, \
665 /* Define this macro if the target machine has register windows. This C
666 expression returns the register number as seen by the called function
667 corresponding to the register number OUT as seen by the calling function.
668 Return OUT if register number OUT is not an outbound register. */
670 #define INCOMING_REGNO(OUT) \
671 ((unsigned) ((OUT) - OUT_REG (0)) < 8 ? IN_REG ((OUT) - OUT_REG (0)) : (OUT))
673 /* Define this macro if the target machine has register windows. This C
674 expression returns the register number as seen by the calling function
675 corresponding to the register number IN as seen by the called function.
676 Return IN if register number IN is not an inbound register. */
678 #define OUTGOING_REGNO(IN) \
679 ((unsigned) ((IN) - IN_REG (0)) < 8 ? OUT_REG ((IN) - IN_REG (0)) : (IN))
682 /* Order of allocation of registers */
684 /* If defined, an initializer for a vector of integers, containing the numbers
685 of hard registers in the order in which GNU CC should prefer to use them
686 (from most preferred to least).
688 If this macro is not defined, registers are used lowest numbered first (all
691 One use of this macro is on machines where the highest numbered registers
692 must always be saved and the save-multiple-registers instruction supports
693 only sequences of consecutive registers. On such machines, define
694 `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered
695 allocatable register first. */
697 /* ??? Should the GR return value registers come before or after the rest
698 of the caller-save GRs? */
700 #define REG_ALLOC_ORDER \
702 /* Caller-saved general registers. */ \
703 R_GR (14), R_GR (15), R_GR (16), R_GR (17), \
704 R_GR (18), R_GR (19), R_GR (20), R_GR (21), R_GR (22), R_GR (23), \
705 R_GR (24), R_GR (25), R_GR (26), R_GR (27), R_GR (28), R_GR (29), \
706 R_GR (30), R_GR (31), \
707 /* Output registers. */ \
708 R_GR (120), R_GR (121), R_GR (122), R_GR (123), R_GR (124), R_GR (125), \
709 R_GR (126), R_GR (127), \
710 /* Caller-saved general registers, also used for return values. */ \
711 R_GR (8), R_GR (9), R_GR (10), R_GR (11), \
712 /* addl caller-saved general registers. */ \
713 R_GR (2), R_GR (3), \
714 /* Caller-saved FP registers. */ \
715 R_FR (6), R_FR (7), \
716 /* Caller-saved FP registers, used for parameters and return values. */ \
717 R_FR (8), R_FR (9), R_FR (10), R_FR (11), \
718 R_FR (12), R_FR (13), R_FR (14), R_FR (15), \
719 /* Rotating caller-saved FP registers. */ \
720 R_FR (32), R_FR (33), R_FR (34), R_FR (35), \
721 R_FR (36), R_FR (37), R_FR (38), R_FR (39), R_FR (40), R_FR (41), \
722 R_FR (42), R_FR (43), R_FR (44), R_FR (45), R_FR (46), R_FR (47), \
723 R_FR (48), R_FR (49), R_FR (50), R_FR (51), R_FR (52), R_FR (53), \
724 R_FR (54), R_FR (55), R_FR (56), R_FR (57), R_FR (58), R_FR (59), \
725 R_FR (60), R_FR (61), R_FR (62), R_FR (63), R_FR (64), R_FR (65), \
726 R_FR (66), R_FR (67), R_FR (68), R_FR (69), R_FR (70), R_FR (71), \
727 R_FR (72), R_FR (73), R_FR (74), R_FR (75), R_FR (76), R_FR (77), \
728 R_FR (78), R_FR (79), R_FR (80), R_FR (81), R_FR (82), R_FR (83), \
729 R_FR (84), R_FR (85), R_FR (86), R_FR (87), R_FR (88), R_FR (89), \
730 R_FR (90), R_FR (91), R_FR (92), R_FR (93), R_FR (94), R_FR (95), \
731 R_FR (96), R_FR (97), R_FR (98), R_FR (99), R_FR (100), R_FR (101), \
732 R_FR (102), R_FR (103), R_FR (104), R_FR (105), R_FR (106), R_FR (107), \
733 R_FR (108), R_FR (109), R_FR (110), R_FR (111), R_FR (112), R_FR (113), \
734 R_FR (114), R_FR (115), R_FR (116), R_FR (117), R_FR (118), R_FR (119), \
735 R_FR (120), R_FR (121), R_FR (122), R_FR (123), R_FR (124), R_FR (125), \
736 R_FR (126), R_FR (127), \
737 /* Caller-saved predicate registers. */ \
738 R_PR (6), R_PR (7), R_PR (8), R_PR (9), R_PR (10), R_PR (11), \
739 R_PR (12), R_PR (13), R_PR (14), R_PR (15), \
740 /* Rotating caller-saved predicate registers. */ \
741 R_PR (16), R_PR (17), \
742 R_PR (18), R_PR (19), R_PR (20), R_PR (21), R_PR (22), R_PR (23), \
743 R_PR (24), R_PR (25), R_PR (26), R_PR (27), R_PR (28), R_PR (29), \
744 R_PR (30), R_PR (31), R_PR (32), R_PR (33), R_PR (34), R_PR (35), \
745 R_PR (36), R_PR (37), R_PR (38), R_PR (39), R_PR (40), R_PR (41), \
746 R_PR (42), R_PR (43), R_PR (44), R_PR (45), R_PR (46), R_PR (47), \
747 R_PR (48), R_PR (49), R_PR (50), R_PR (51), R_PR (52), R_PR (53), \
748 R_PR (54), R_PR (55), R_PR (56), R_PR (57), R_PR (58), R_PR (59), \
749 R_PR (60), R_PR (61), R_PR (62), R_PR (63), \
750 /* Caller-saved branch registers. */ \
751 R_BR (6), R_BR (7), \
753 /* Stacked callee-saved general registers. */ \
754 R_GR (32), R_GR (33), R_GR (34), R_GR (35), \
755 R_GR (36), R_GR (37), R_GR (38), R_GR (39), R_GR (40), R_GR (41), \
756 R_GR (42), R_GR (43), R_GR (44), R_GR (45), R_GR (46), R_GR (47), \
757 R_GR (48), R_GR (49), R_GR (50), R_GR (51), R_GR (52), R_GR (53), \
758 R_GR (54), R_GR (55), R_GR (56), R_GR (57), R_GR (58), R_GR (59), \
759 R_GR (60), R_GR (61), R_GR (62), R_GR (63), R_GR (64), R_GR (65), \
760 R_GR (66), R_GR (67), R_GR (68), R_GR (69), R_GR (70), R_GR (71), \
761 R_GR (72), R_GR (73), R_GR (74), R_GR (75), R_GR (76), R_GR (77), \
762 R_GR (78), R_GR (79), R_GR (80), R_GR (81), R_GR (82), R_GR (83), \
763 R_GR (84), R_GR (85), R_GR (86), R_GR (87), R_GR (88), R_GR (89), \
764 R_GR (90), R_GR (91), R_GR (92), R_GR (93), R_GR (94), R_GR (95), \
765 R_GR (96), R_GR (97), R_GR (98), R_GR (99), R_GR (100), R_GR (101), \
766 R_GR (102), R_GR (103), R_GR (104), R_GR (105), R_GR (106), R_GR (107), \
768 /* Input registers. */ \
769 R_GR (112), R_GR (113), R_GR (114), R_GR (115), R_GR (116), R_GR (117), \
770 R_GR (118), R_GR (119), \
771 /* Callee-saved general registers. */ \
772 R_GR (4), R_GR (5), R_GR (6), R_GR (7), \
773 /* Callee-saved FP registers. */ \
774 R_FR (2), R_FR (3), R_FR (4), R_FR (5), R_FR (16), R_FR (17), \
775 R_FR (18), R_FR (19), R_FR (20), R_FR (21), R_FR (22), R_FR (23), \
776 R_FR (24), R_FR (25), R_FR (26), R_FR (27), R_FR (28), R_FR (29), \
777 R_FR (30), R_FR (31), \
778 /* Callee-saved predicate registers. */ \
779 R_PR (1), R_PR (2), R_PR (3), R_PR (4), R_PR (5), \
780 /* Callee-saved branch registers. */ \
781 R_BR (1), R_BR (2), R_BR (3), R_BR (4), R_BR (5), \
783 /* ??? Stacked registers reserved for fp, rp, and ar.pfs. */ \
784 R_GR (109), R_GR (110), R_GR (111), \
786 /* Special general registers. */ \
787 R_GR (0), R_GR (1), R_GR (12), R_GR (13), \
788 /* Special FP registers. */ \
789 R_FR (0), R_FR (1), \
790 /* Special predicate registers. */ \
792 /* Special branch registers. */ \
794 /* Frame pointer. Return address. */ \
795 FRAME_POINTER_REGNUM, RETURN_ADDRESS_REGNUM, \
799 /* How Values Fit in Registers */
801 /* A C expression for the number of consecutive hard registers, starting at
802 register number REGNO, required to hold a value of mode MODE. */
804 /* ??? x86 80-bit FP values only require 1 register. */
805 /* ??? We say that CCmode values require two registers. This allows us to
806 easily store the normal and inverted values. If we want single register
807 predicates, we can use EXTRA_CC_MODES to give them a different mode. */
809 #define HARD_REGNO_NREGS(REGNO, MODE) \
810 ((MODE) == CCmode && PR_REGNO_P (REGNO) ? 2 \
811 : FR_REGNO_P (REGNO) && (MODE) == XFmode ? 1 \
812 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
814 /* A C expression that is nonzero if it is permissible to store a value of mode
815 MODE in hard register number REGNO (or in several registers starting with
818 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
819 (FR_FP_REGNO_P (REGNO) ? ! INTEGRAL_MODE_P (MODE) \
820 : FR_INT_REGNO_P (REGNO) ? ! FLOAT_MODE_P (MODE) \
821 : PR_REGNO_P (REGNO) ? (MODE) == CCmode \
824 /* A C expression that is nonzero if it is desirable to choose register
825 allocation so as to avoid move instructions between a value of mode MODE1
826 and a value of mode MODE2.
828 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are
829 ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be
831 /* ??? If the comments are true, then this must be zero if one mode is CCmode,
832 INTEGRAL_MODE_P or FLOAT_MODE_P and the other is not. Otherwise, it is
834 #define MODES_TIEABLE_P(MODE1, MODE2) 1
836 /* Define this macro if the compiler should avoid copies to/from CCmode
837 registers. You should only define this macro if support fo copying to/from
838 CCmode is incomplete. */
839 /* ??? CCmode copies are very expensive, so we might want this defined. */
840 /* #define AVOID_CCMODE_COPIES */
843 /* Handling Leaf Functions */
845 /* A C initializer for a vector, indexed by hard register number, which
846 contains 1 for a register that is allowable in a candidate for leaf function
848 /* ??? This might be useful. */
849 /* #define LEAF_REGISTERS */
851 /* A C expression whose value is the register number to which REGNO should be
852 renumbered, when a function is treated as a leaf function. */
853 /* ??? This might be useful. */
854 /* #define LEAF_REG_REMAP(REGNO) */
857 /* Register Classes */
859 /* An enumeral type that must be defined with all the register class names as
860 enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last
861 register class, followed by one more enumeral value, `LIM_REG_CLASSES',
862 which is not a register class but rather tells how many classes there
864 /* ??? FP registers hold INT and FP values in different representations, so
865 we can't just use a subreg to convert between the two. We get around this
866 problem by segmenting the FP register set into two parts. One part (FR_INT)
867 only holds integer values, and one part (FR_FP) only hold FP values. Thus
868 we always know which representation is being used. */
869 /* ??? When compiling without optimization, it is possible for the only use of
870 a pseudo to be a parameter load from the stack with a REG_EQUIV note.
871 Regclass handles this case specially and does not assign any costs to the
872 pseudo. The pseudo then ends up using the last class before ALL_REGS.
873 Thus we must not let either PR_REGS or BR_REGS be the last class. The
874 testcase for this is gcc.c-torture/execute/va-arg-7.c. */
892 #define GENERAL_REGS GR_REGS
894 /* The number of distinct register classes. */
895 #define N_REG_CLASSES ((int) LIM_REG_CLASSES)
897 /* An initializer containing the names of the register classes as C string
898 constants. These names are used in writing some of the debugging dumps. */
899 #define REG_CLASS_NAMES \
900 { "NO_REGS", "PR_REGS", "BR_REGS", "ADDL_REGS", "GR_REGS", "FR_INT_REGS", \
901 "FR_FP_REGS", "FR_REGS", "GR_AND_FR_INT_REGS", "GR_AND_FR_FP_REGS", \
902 "GR_AND_FR_REGS", "ALL_REGS" }
904 /* An initializer containing the contents of the register classes, as integers
905 which are bit masks. The Nth integer specifies the contents of class N.
906 The way the integer MASK is interpreted is that register R is in the class
907 if `MASK & (1 << R)' is 1. */
908 #define REG_CLASS_CONTENTS \
911 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
912 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
913 0x00000000, 0x00000000, 0x000 }, \
915 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
916 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
917 0xFFFFFFFF, 0xFFFFFFFF, 0x000 }, \
919 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
920 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
921 0x00000000, 0x00000000, 0x0FF }, \
923 { 0x0000000F, 0x00000000, 0x00000000, 0x00000000, \
924 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
925 0x00000000, 0x00000000, 0x000 }, \
927 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
928 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
929 0x00000000, 0x00000000, 0x300 }, \
931 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
932 0x00FF0000, 0x00000000, 0x00000000, 0xFFFFFFFF, \
933 0x00000000, 0x00000000, 0x000 }, \
935 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
936 0xFF00FFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, \
937 0x00000000, 0x00000000, 0x000 }, \
939 { 0x00000000, 0x00000000, 0x00000000, 0x00000000, \
940 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
941 0x00000000, 0x00000000, 0x000 }, \
942 /* GR_AND_FR_INT_REGS. */ \
943 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
944 0x00FF0000, 0x00000000, 0x00000000, 0xFFFFFFFF, \
945 0x00000000, 0x00000000, 0x300 }, \
946 /* GR_AND_FR_FP_REGS. */ \
947 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
948 0xFF00FFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, \
949 0x00000000, 0x00000000, 0x300 }, \
950 /* GR_AND_FR_REGS. */ \
951 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
952 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
953 0x00000000, 0x00000000, 0x300 }, \
955 { 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
956 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, \
957 0xFFFFFFFF, 0xFFFFFFFF, 0x3FF }, \
960 /* A C expression whose value is a register class containing hard register
961 REGNO. In general there is more than one such class; choose a class which
962 is "minimal", meaning that no smaller class also contains the register. */
963 /* The NO_REGS case is primarily for the benefit of rws_access_reg, which
964 may call here with private (invalid) register numbers, such as
966 #define REGNO_REG_CLASS(REGNO) \
967 (ADDL_REGNO_P (REGNO) ? ADDL_REGS \
968 : GENERAL_REGNO_P (REGNO) ? GR_REGS \
969 : FR_FP_REGNO_P (REGNO) ? FR_FP_REGS \
970 : FR_INT_REGNO_P (REGNO) ? FR_INT_REGS \
971 : PR_REGNO_P (REGNO) ? PR_REGS \
972 : BR_REGNO_P (REGNO) ? BR_REGS \
975 /* A macro whose definition is the name of the class to which a valid base
976 register must belong. A base register is one used in an address which is
977 the register value plus a displacement. */
978 #define BASE_REG_CLASS GENERAL_REGS
980 /* A macro whose definition is the name of the class to which a valid index
981 register must belong. An index register is one used in an address where its
982 value is either multiplied by a scale factor or added to another register
983 (as well as added to a displacement). */
984 #define INDEX_REG_CLASS NO_REGS
986 /* A C expression which defines the machine-dependent operand constraint
987 letters for register classes. If CHAR is such a letter, the value should be
988 the register class corresponding to it. Otherwise, the value should be
989 `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS',
990 will not be passed to this macro; you do not need to handle it. */
992 #define REG_CLASS_FROM_LETTER(CHAR) \
993 ((CHAR) == 'f' ? FR_FP_REGS \
994 : (CHAR) == 'e' ? FR_INT_REGS \
995 : (CHAR) == 'a' ? ADDL_REGS \
996 : (CHAR) == 'b' ? BR_REGS \
997 : (CHAR) == 'c' ? PR_REGS \
1000 /* A C expression which is nonzero if register number NUM is suitable for use
1001 as a base register in operand addresses. It may be either a suitable hard
1002 register or a pseudo register that has been allocated such a hard reg. */
1003 #define REGNO_OK_FOR_BASE_P(REGNO) \
1004 (GENERAL_REGNO_P (REGNO) || GENERAL_REGNO_P (reg_renumber[REGNO]))
1006 /* A C expression which is nonzero if register number NUM is suitable for use
1007 as an index register in operand addresses. It may be either a suitable hard
1008 register or a pseudo register that has been allocated such a hard reg. */
1009 #define REGNO_OK_FOR_INDEX_P(NUM) 0
1011 /* A C expression that places additional restrictions on the register class to
1012 use when it is necessary to copy value X into a register in class CLASS.
1013 The value is a register class; perhaps CLASS, or perhaps another, smaller
1016 #define PREFERRED_RELOAD_CLASS(X, CLASS) CLASS
1018 /* You should define this macro to indicate to the reload phase that it may
1019 need to allocate at least one register for a reload in addition to the
1020 register to contain the data. Specifically, if copying X to a register
1021 CLASS in MODE requires an intermediate register, you should define this
1022 to return the largest register class all of whose registers can be used
1023 as intermediate registers or scratch registers. */
1025 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
1026 ia64_secondary_reload_class (CLASS, MODE, X)
1028 /* Certain machines have the property that some registers cannot be copied to
1029 some other registers without using memory. Define this macro on those
1030 machines to be a C expression that is non-zero if objects of mode M in
1031 registers of CLASS1 can only be copied to registers of class CLASS2 by
1032 storing a register of CLASS1 into memory and loading that memory location
1033 into a register of CLASS2. */
1034 /* ??? We may need this for XFmode moves between FR and GR regs. Using
1035 getf.sig/getf.exp almost works, but the result in the GR regs is not
1036 properly formatted and has two extra bits. */
1037 /* #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, M) */
1039 /* A C expression for the maximum number of consecutive registers of
1040 class CLASS needed to hold a value of mode MODE.
1041 This is closely related to the macro `HARD_REGNO_NREGS'. */
1043 #define CLASS_MAX_NREGS(CLASS, MODE) \
1044 ((MODE) == CCmode && (CLASS) == PR_REGS ? 2 \
1045 : (((CLASS) == FR_REGS || (CLASS) == FR_FP_REGS \
1046 || (CLASS) == FR_INT_REGS) && (MODE) == XFmode) ? 1 \
1047 : (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
1049 /* A C expression that defines the machine-dependent operand constraint letters
1050 (`I', `J', `K', .. 'P') that specify particular ranges of integer values. */
1052 /* 14 bit signed immediate for arithmetic instructions. */
1053 #define CONST_OK_FOR_I(VALUE) \
1054 ((unsigned HOST_WIDE_INT)(VALUE) + 0x2000 < 0x4000)
1055 /* 22 bit signed immediate for arith instructions with r0/r1/r2/r3 source. */
1056 #define CONST_OK_FOR_J(VALUE) \
1057 ((unsigned HOST_WIDE_INT)(VALUE) + 0x200000 < 0x400000)
1058 /* 8 bit signed immediate for logical instructions. */
1059 #define CONST_OK_FOR_K(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x80 < 0x100)
1060 /* 8 bit adjusted signed immediate for compare pseudo-ops. */
1061 #define CONST_OK_FOR_L(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x7F < 0x100)
1062 /* 6 bit unsigned immediate for shift counts. */
1063 #define CONST_OK_FOR_M(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) < 0x40)
1064 /* 9 bit signed immediate for load/store post-increments. */
1065 /* ??? N is currently not used. */
1066 #define CONST_OK_FOR_N(VALUE) ((unsigned HOST_WIDE_INT)(VALUE) + 0x100 < 0x200)
1067 /* 0 for r0. Used by Linux kernel, do not change. */
1068 #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0)
1069 /* 0 or -1 for dep instruction. */
1070 #define CONST_OK_FOR_P(VALUE) ((VALUE) == 0 || (VALUE) == -1)
1072 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1073 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) \
1074 : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \
1075 : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \
1076 : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \
1077 : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \
1078 : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \
1079 : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \
1080 : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \
1083 /* A C expression that defines the machine-dependent operand constraint letters
1084 (`G', `H') that specify particular ranges of `const_double' values. */
1086 /* 0.0 and 1.0 for fr0 and fr1. */
1087 #define CONST_DOUBLE_OK_FOR_G(VALUE) \
1088 ((VALUE) == CONST0_RTX (GET_MODE (VALUE)) \
1089 || (VALUE) == CONST1_RTX (GET_MODE (VALUE)))
1091 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1092 ((C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) : 0)
1094 /* A C expression that defines the optional machine-dependent constraint
1095 letters (`Q', `R', `S', `T', `U') that can be used to segregate specific
1096 types of operands, usually memory references, for the target machine. */
1097 /* ??? This might be useful considering that we have already used all of the
1098 integer constant contraint letters. */
1099 /* #define EXTRA_CONSTRAINT(VALUE, C) */
1101 /* Basic Stack Layout */
1103 /* Define this macro if pushing a word onto the stack moves the stack pointer
1104 to a smaller address. */
1105 #define STACK_GROWS_DOWNWARD 1
1107 /* Define this macro if the addresses of local variable slots are at negative
1108 offsets from the frame pointer. */
1109 #define FRAME_GROWS_DOWNWARD
1111 /* Offset from the frame pointer to the first local variable slot to be
1113 /* ??? This leaves 16 bytes unused normally, but it looks funny to store locals
1114 into the 16-byte reserved area. */
1115 /* ??? This isn't very efficient use of the frame pointer. Better would be
1116 to move it down a ways, so that we have positive and negative offsets. */
1117 #define STARTING_FRAME_OFFSET \
1118 (current_function_pretend_args_size \
1119 ? 16 - current_function_pretend_args_size \
1122 /* Offset from the stack pointer register to the first location at which
1123 outgoing arguments are placed. If not specified, the default value of zero
1124 is used. This is the proper value for most machines. */
1125 /* IA64 has a 16 byte scratch area that is at the bottom of the stack. */
1126 #define STACK_POINTER_OFFSET 16
1128 /* Offset from the argument pointer register to the first argument's address.
1129 On some machines it may depend on the data type of the function. */
1130 #define FIRST_PARM_OFFSET(FUNDECL) 0
1132 /* A C expression whose value is RTL representing the value of the return
1133 address for the frame COUNT steps up from the current frame, after the
1136 /* ??? Frames other than zero would likely require interpreting the frame
1137 unwind info, so we don't try to support them. We would also need to define
1138 DYNAMIC_CHAIN_ADDRESS and SETUP_FRAME_ADDRESS (for the reg stack flush). */
1140 /* ??? This only works for non-leaf functions. In a leaf function, the return
1141 address would be in b0 (rp). */
1143 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
1145 ? gen_rtx_REG (Pmode, RETURN_ADDRESS_REGNUM) \
1148 /* A C expression whose value is RTL representing the location of the incoming
1149 return address at the beginning of any function, before the prologue. This
1150 RTL is either a `REG', indicating that the return value is saved in `REG',
1151 or a `MEM' representing a location in the stack. This enables DWARF2
1152 unwind info for C++ EH. */
1153 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (VOIDmode, BR_REG (0))
1154 /* ??? This is not defined because of three problems.
1155 1) dwarf2out.c assumes that DWARF_FRAME_RETURN_COLUMN fits in one byte.
1156 The default value is FIRST_PSEUDO_REGISTER which doesn't. This can be
1157 worked around by setting PC_REGNUM to FR_REG (0) which is an otherwise
1158 unused register number.
1159 2) dwarf2out_frame_debug core dumps while processing prologue insns. We
1160 need to refine which insns have RTX_FRAME_RELATED_P set and which don't.
1161 3) It isn't possible to turn off EH frame info by defining DWARF2_UNIND_INFO
1162 to zero, despite what the documentation implies, because it is tested in
1163 a few places with #ifdef instead of #if. */
1164 #undef INCOMING_RETURN_ADDR_RTX
1166 /* A C expression whose value is an integer giving the offset, in bytes, from
1167 the value of the stack pointer register to the top of the stack frame at the
1168 beginning of any function, before the prologue. The top of the frame is
1169 defined to be the value of the stack pointer in the previous frame, just
1170 before the call instruction. */
1171 #define INCOMING_FRAME_SP_OFFSET 0
1174 /* Register That Address the Stack Frame. */
1176 /* The register number of the stack pointer register, which must also be a
1177 fixed register according to `FIXED_REGISTERS'. On most machines, the
1178 hardware determines which register this is. */
1180 #define STACK_POINTER_REGNUM 12
1182 /* The register number of the frame pointer register, which is used to access
1183 automatic variables in the stack frame. On some machines, the hardware
1184 determines which register this is. On other machines, you can choose any
1185 register you wish for this purpose. */
1187 #define FRAME_POINTER_REGNUM 328
1189 /* Register number where frame pointer was saved in the prologue, or zero
1190 if it was not saved. */
1192 extern int ia64_fp_regno;
1194 /* Number of input and local registers used. This is needed for the .regstk
1195 directive, and also for debugging info. */
1197 extern int ia64_input_regs;
1198 extern int ia64_local_regs;
1200 /* The register number of the arg pointer register, which is used to access the
1201 function's argument list. */
1202 /* r0 won't otherwise be used, so put the always eliminated argument pointer
1204 #define ARG_POINTER_REGNUM R_GR(0)
1206 /* The register number for the return address register. This is modified by
1207 ia64_expand_prologue to point to the real return address save register. */
1209 #define RETURN_ADDRESS_REGNUM 329
1211 /* Register numbers used for passing a function's static chain pointer. */
1213 #define STATIC_CHAIN_REGNUM 15
1216 /* Eliminating the Frame Pointer and the Arg Pointer */
1218 /* A C expression which is nonzero if a function must have and use a frame
1219 pointer. This expression is evaluated in the reload pass. If its value is
1220 nonzero the function will have a frame pointer. */
1222 #define FRAME_POINTER_REQUIRED 0
1224 /* If defined, this macro specifies a table of register pairs used to eliminate
1225 unneeded registers that point into the stack frame. */
1227 #define ELIMINABLE_REGS \
1229 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1230 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1231 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
1234 /* A C expression that returns non-zero if the compiler is allowed to try to
1235 replace register number FROM with register number TO. There are no ia64
1236 specific restrictions. */
1238 #define CAN_ELIMINATE(FROM, TO) 1
1240 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It specifies the
1241 initial difference between the specified pair of registers. This macro must
1242 be defined if `ELIMINABLE_REGS' is defined. */
1243 /* ??? I need to decide whether the frame pointer is the old frame SP
1244 or the new frame SP before dynamic allocs. */
1245 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1247 unsigned int size = ia64_compute_frame_size (get_frame_size ()); \
1249 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1251 else if ((FROM) == ARG_POINTER_REGNUM) \
1255 case FRAME_POINTER_REGNUM: \
1256 /* Arguments start above the 16 byte save area, unless stdarg \
1257 in which case we store through the 16 byte save area. */ \
1258 (OFFSET) = 16 - current_function_pretend_args_size; \
1260 case STACK_POINTER_REGNUM: \
1261 (OFFSET) = size + 16 - current_function_pretend_args_size; \
1272 /* Passing Function Arguments on the Stack */
1274 /* Define this macro if an argument declared in a prototype as an integral type
1275 smaller than `int' should actually be passed as an `int'. In addition to
1276 avoiding errors in certain cases of mismatch, it also makes for better code
1277 on certain machines. */
1278 /* ??? Investigate. */
1279 /* #define PROMOTE_PROTOTYPES */
1281 /* If defined, the maximum amount of space required for outgoing arguments will
1282 be computed and placed into the variable
1283 `current_function_outgoing_args_size'. */
1285 #define ACCUMULATE_OUTGOING_ARGS 1
1287 /* A C expression that should indicate the number of bytes of its own arguments
1288 that a function pops on returning, or 0 if the function pops no arguments
1289 and the caller must therefore pop them all after the function returns. */
1291 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
1294 /* Function Arguments in Registers */
1296 #define MAX_ARGUMENT_SLOTS 8
1297 #define MAX_INT_RETURN_SLOTS 4
1298 #define GR_ARG_FIRST IN_REG (0)
1299 #define GR_RET_FIRST GR_REG (8)
1300 #define GR_RET_LAST GR_REG (11)
1301 #define FR_ARG_FIRST FR_REG (8)
1302 #define FR_RET_FIRST FR_REG (8)
1303 #define FR_RET_LAST FR_REG (15)
1304 #define AR_ARG_FIRST OUT_REG (0)
1306 /* A C expression that controls whether a function argument is passed in a
1307 register, and which register. */
1309 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1310 ia64_function_arg (&CUM, MODE, TYPE, NAMED, 0)
1312 /* Define this macro if the target machine has "register windows", so that the
1313 register in which a function sees an arguments is not necessarily the same
1314 as the one in which the caller passed the argument. */
1316 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
1317 ia64_function_arg (&CUM, MODE, TYPE, NAMED, 1)
1319 /* A C expression for the number of words, at the beginning of an argument,
1320 must be put in registers. The value must be zero for arguments that are
1321 passed entirely in registers or that are entirely pushed on the stack. */
1323 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1324 ia64_function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
1326 /* A C expression that indicates when an argument must be passed by reference.
1327 If nonzero for an argument, a copy of that argument is made in memory and a
1328 pointer to the argument is passed instead of the argument itself. The
1329 pointer is passed in whatever way is appropriate for passing a pointer to
1332 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) 0
1334 /* A C type for declaring a variable that is used as the first argument of
1335 `FUNCTION_ARG' and other related values. For some target machines, the type
1336 `int' suffices and can hold the number of bytes of argument so far. */
1338 typedef struct ia64_args
1340 int words; /* # words of arguments so far */
1341 int fp_regs; /* # FR registers used so far */
1342 int prototype; /* whether function prototyped */
1345 /* A C statement (sans semicolon) for initializing the variable CUM for the
1346 state at the beginning of the argument list. */
1348 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) \
1351 (CUM).fp_regs = 0; \
1352 (CUM).prototype = ((FNTYPE) && TYPE_ARG_TYPES (FNTYPE)) || (LIBNAME); \
1355 /* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the
1356 arguments for the function being compiled. If this macro is undefined,
1357 `INIT_CUMULATIVE_ARGS' is used instead. */
1359 /* We set prototype to true so that we never try to return a PARALLEL from
1361 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \
1364 (CUM).fp_regs = 0; \
1365 (CUM).prototype = 1; \
1368 /* A C statement (sans semicolon) to update the summarizer variable CUM to
1369 advance past an argument in the argument list. The values MODE, TYPE and
1370 NAMED describe that argument. Once this is done, the variable CUM is
1371 suitable for analyzing the *following* argument with `FUNCTION_ARG'. */
1373 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1374 ia64_function_arg_advance (&CUM, MODE, TYPE, NAMED)
1376 /* If defined, a C expression that gives the alignment boundary, in bits, of an
1377 argument with the specified mode and type. */
1379 /* Arguments larger than 64 bits require 128 bit alignment. */
1381 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1382 (((((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
1383 + UNITS_PER_WORD - 1) / UNITS_PER_WORD) > 1 ? 128 : PARM_BOUNDARY)
1385 /* A C expression that is nonzero if REGNO is the number of a hard register in
1386 which function arguments are sometimes passed. This does *not* include
1387 implicit arguments such as the static chain and the structure-value address.
1388 On many machines, no registers can be used for this purpose since all
1389 function arguments are pushed on the stack. */
1390 #define FUNCTION_ARG_REGNO_P(REGNO) \
1391 (((REGNO) >= GR_ARG_FIRST && (REGNO) < (GR_ARG_FIRST + MAX_ARGUMENT_SLOTS)) \
1392 || ((REGNO) >= FR_ARG_FIRST && (REGNO) < (FR_ARG_FIRST + MAX_ARGUMENT_SLOTS)))
1394 /* Implement `va_start' for varargs and stdarg. */
1395 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
1396 ia64_va_start (stdarg, valist, nextarg)
1398 /* Implement `va_arg'. */
1399 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1400 ia64_va_arg (valist, type)
1402 /* How Scalar Function Values are Returned */
1404 /* A C expression to create an RTX representing the place where a function
1405 returns a value of data type VALTYPE. */
1407 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1408 ia64_function_value (VALTYPE, FUNC)
1410 /* A C expression to create an RTX representing the place where a library
1411 function returns a value of mode MODE. */
1413 #define LIBCALL_VALUE(MODE) \
1414 gen_rtx_REG (MODE, \
1415 ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
1416 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
1417 ? FR_RET_FIRST : GR_RET_FIRST))
1419 /* A C expression that is nonzero if REGNO is the number of a hard register in
1420 which the values of called function may come back. */
1422 #define FUNCTION_VALUE_REGNO_P(REGNO) \
1423 (((REGNO) >= GR_RET_FIRST && (REGNO) <= GR_RET_LAST) \
1424 || ((REGNO) >= FR_RET_FIRST && (REGNO) <= FR_RET_LAST))
1427 /* How Large Values are Returned */
1429 /* A nonzero value says to return the function value in memory, just as large
1430 structures are always returned. */
1432 #define RETURN_IN_MEMORY(TYPE) \
1433 ia64_return_in_memory (TYPE)
1435 /* If you define this macro to be 0, then the conventions used for structure
1436 and union return values are decided by the `RETURN_IN_MEMORY' macro. */
1438 #define DEFAULT_PCC_STRUCT_RETURN 0
1440 /* If the structure value address is passed in a register, then
1441 `STRUCT_VALUE_REGNUM' should be the number of that register. */
1443 #define STRUCT_VALUE_REGNUM GR_REG (8)
1446 /* Caller-Saves Register Allocation */
1448 /* A C expression to determine whether it is worthwhile to consider placing a
1449 pseudo-register in a call-clobbered hard register and saving and restoring
1450 it around each function call. The expression should be 1 when this is worth
1451 doing, and 0 otherwise.
1453 If you don't define this macro, a default is used which is good on most
1454 machines: `4 * CALLS < REFS'. */
1455 /* ??? Investigate. */
1456 /* #define CALLER_SAVE_PROFITABLE(REFS, CALLS) */
1459 /* Function Entry and Exit */
1461 /* A C compound statement that outputs the assembler code for entry to a
1464 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1465 ia64_function_prologue (FILE, SIZE)
1467 /* Define this macro as a C expression that is nonzero if the return
1468 instruction or the function epilogue ignores the value of the stack pointer;
1469 in other words, if it is safe to delete an instruction to adjust the stack
1470 pointer before a return from the function. */
1472 #define EXIT_IGNORE_STACK 1
1474 /* Define this macro as a C expression that is nonzero for registers
1475 used by the epilogue or the `return' pattern. */
1477 #define EPILOGUE_USES(REGNO) ia64_epilogue_uses (REGNO)
1479 /* A C compound statement that outputs the assembler code for exit from a
1482 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1483 ia64_function_epilogue (FILE, SIZE)
1485 /* A C compound statement that outputs the assembler code for a thunk function,
1486 used to implement C++ virtual function calls with multiple inheritance. */
1488 /* ??? This only supports deltas up to 14 bits. If we need more, then we
1489 must load the delta into a register first. */
1491 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
1493 fprintf (FILE, "\tadd r32 = %d, r32\n", (DELTA)); \
1494 fprintf (FILE, "\tbr "); \
1495 assemble_name (FILE, XSTR (XEXP (DECL_RTL (FUNCTION), 0), 0)); \
1496 fprintf (FILE, "\n"); \
1500 /* Generating Code for Profiling. */
1502 /* A C statement or compound statement to output to FILE some assembler code to
1503 call the profiling subroutine `mcount'. */
1505 /* ??? Unclear if this will actually work. No way to test this currently. */
1507 #define FUNCTION_PROFILER(FILE, LABELNO) \
1510 ASM_GENERATE_INTERNAL_LABEL (buf, "LP", LABELNO); \
1511 fputs ("\taddl r16 = @ltoff(", FILE); \
1512 assemble_name (FILE, buf); \
1513 fputs ("), gp\n", FILE); \
1514 fputs ("\tmov r17 = r1;;\n", FILE); \
1515 fputs ("\tld8 out0 = [r16]\n", FILE); \
1516 fputs ("\tmov r18 = b0\n", FILE); \
1517 fputs ("\tbr.call.sptk.many rp = mcount;;\n", FILE); \
1518 fputs ("\tmov b0 = r18\n", FILE); \
1519 fputs ("\tmov r1 = r17;;\n", FILE); \
1522 /* A C statement or compound statement to output to FILE some assembler code to
1523 initialize basic-block profiling for the current object module. */
1525 /* ??? Unclear if this will actually work. No way to test this currently. */
1527 #define FUNCTION_BLOCK_PROFILER(FILE, LABELNO) \
1529 int labelno = LABELNO; \
1530 switch (profile_block_flag) \
1533 fputs ("\taddl r16 = @ltoff(LPBX0), gp\n", FILE); \
1534 fprintf (FILE, "\tmov out1 = %d;;\n", labelno); \
1535 fputs ("\tld8 out0 = [r16]\n", FILE); \
1536 fputs ("\tmov r17 = r1\n", FILE); \
1537 fputs ("\tmov r18 = b0\n", FILE); \
1538 fputs ("\tbr.call.sptk.many rp = __bb_init_trace_func;;\n", FILE);\
1539 fputs ("\tmov r1 = r17\n", FILE); \
1540 fputs ("\tmov b0 = r18;;\n", FILE); \
1543 fputs ("\taddl r16 = @ltoff(LPBX0), gp;;\n", FILE); \
1544 fputs ("\tld8 out0 = [r16];;\n", FILE); \
1545 fputs ("\tld8 r17 = [out0];;\n", FILE); \
1546 fputs ("\tcmp.eq p6, p0 = r0, r17;;\n", FILE); \
1547 fputs ("(p6)\tmov r16 = r1\n", FILE); \
1548 fputs ("(p6)\tmov r17 = b0\n", FILE); \
1549 fputs ("(p6)\tbr.call.sptk.many rp = __bb_init_func;;\n", FILE); \
1550 fputs ("(p6)\tmov r1 = r16\n", FILE); \
1551 fputs ("(p6)\tmov b0 = r17;;\n", FILE); \
1556 /* A C statement or compound statement to output to FILE some assembler code to
1557 increment the count associated with the basic block number BLOCKNO. */
1559 /* ??? This can't work unless we mark some registers as fixed, so that we
1560 can use them as temporaries in this macro. We need two registers for -a
1561 profiling and 4 registers for -ax profiling. */
1563 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1565 int blockn = BLOCKNO; \
1566 switch (profile_block_flag) \
1569 fputs ("\taddl r2 = @ltoff(__bb), gp\n", FILE); \
1570 fputs ("\taddl r3 = @ltoff(LPBX0), gp;;\n", FILE); \
1571 fprintf (FILE, "\tmov r9 = %d\n", blockn); \
1572 fputs ("\tld8 r2 = [r2]\n", FILE); \
1573 fputs ("\tld8 r3 = [r3];;\n", FILE); \
1574 fputs ("\tadd r8 = 8, r2\n", FILE); \
1575 fputs ("\tst8 [r2] = r9;;\n", FILE); \
1576 fputs ("\tst8 [r8] = r3\n", FILE); \
1577 fputs ("\tbr.call.sptk.many rp = __bb_trace_func\n", FILE); \
1581 fputs ("\taddl r2 = @ltoff(LPBX2), gp;;\n", FILE); \
1582 fputs ("\tld8 r2 = [r2];;\n", FILE); \
1583 fprintf (FILE, "\taddl r2 = %d, r2;;\n", 8 * blockn); \
1584 fputs ("\tld8 r3 = [r2];;\n", FILE); \
1585 fputs ("\tadd r3 = 1, r3;;\n", FILE); \
1586 fputs ("\tst8 [r2] = r3;;\n", FILE); \
1591 /* A C statement or compound statement to output to FILE assembler
1592 code to call function `__bb_trace_ret'. */
1594 /* ??? Unclear if this will actually work. No way to test this currently. */
1596 /* ??? This needs to be emitted into the epilogue. Perhaps rewrite to emit
1597 rtl and call from ia64_expand_epilogue? */
1599 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1600 fputs ("\tbr.call.sptk.many rp = __bb_trace_ret\n", FILE);
1601 #undef FUNCTION_BLOCK_PROFILER_EXIT
1603 /* A C statement or compound statement to save all registers, which may be
1604 clobbered by a function call, including condition codes. */
1606 /* ??? We would have to save 20 GRs, 106 FRs, 10 PRs, 2 BRs, and possibly
1607 other things. This is not practical. Perhaps leave this feature (-ax)
1608 unsupported by undefining above macros? */
1610 /* #define MACHINE_STATE_SAVE(ID) */
1612 /* A C statement or compound statement to restore all registers, including
1613 condition codes, saved by `MACHINE_STATE_SAVE'. */
1615 /* ??? We would have to restore 20 GRs, 106 FRs, 10 PRs, 2 BRs, and possibly
1616 other things. This is not practical. Perhaps leave this feature (-ax)
1617 unsupported by undefining above macros? */
1619 /* #define MACHINE_STATE_RESTORE(ID) */
1622 /* Implementing the Varargs Macros. */
1624 /* Define this macro to store the anonymous register arguments into the stack
1625 so that all the arguments appear to have been passed consecutively on the
1628 #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_ARGS_SIZE, SECOND_TIME) \
1629 ia64_setup_incoming_varargs (ARGS_SO_FAR, MODE, TYPE, & PRETEND_ARGS_SIZE, SECOND_TIME)
1631 /* Define this macro if the location where a function argument is passed
1632 depends on whether or not it is a named argument. */
1634 #define STRICT_ARGUMENT_NAMING 1
1637 /* Trampolines for Nested Functions. */
1639 /* We need 32 bytes, so we can save the sp, ar.rnat, ar.bsp, and ar.pfs of
1640 the function containing a non-local goto target. */
1642 #define STACK_SAVEAREA_MODE(LEVEL) \
1643 ((LEVEL) == SAVE_NONLOCAL ? OImode : Pmode)
1645 /* Output assembler code for a block containing the constant parts of
1646 a trampoline, leaving space for the variable parts.
1648 The trampoline should set the static chain pointer to value placed
1649 into the trampoline and should branch to the specified routine. The
1650 gp doesn't have to be set since that is already done by the caller
1651 of the trampoline. To make the normal indirect-subroutine calling
1652 convention work, the trampoline must look like a function descriptor.
1653 That is, the first word must be the target address, the second
1654 word must be the target's global pointer. The complete trampoline
1655 has the following form:
1657 +----------------+ \
1658 TRAMP: | TRAMP+32 | |
1659 +----------------+ > fake function descriptor
1661 +----------------+ /
1682 /* ??? Need a version of this and INITIALIZE_TRAMPOLINE for -mno-pic. */
1684 #define TRAMPOLINE_TEMPLATE(FILE) \
1687 "\tdata8 0,0,0,0\n" \
1688 "\t{ mov r2=ip }\n" \
1690 "\t{ adds r4=-16,r2; adds r%d=-8,r2 }\n" \
1692 "\t{ ld8 r4=[r4];; ld8 r%d=[r%d]; mov b6=r4 }\n" \
1696 STATIC_CHAIN_REGNUM, STATIC_CHAIN_REGNUM, \
1697 STATIC_CHAIN_REGNUM); \
1700 /* The name of a subroutine to switch to the section in which the trampoline
1701 template is to be placed.
1703 On ia64, instructions may only be placed in a text segment. */
1705 #define TRAMPOLINE_SECTION text_section
1707 /* A C expression for the size in bytes of the trampoline, as an integer. */
1709 #define TRAMPOLINE_SIZE 96
1711 /* Alignment required for trampolines, in bits. */
1713 #define TRAMPOLINE_ALIGNMENT 256
1715 /* A C statement to initialize the variable parts of a trampoline. */
1717 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, STATIC_CHAIN) \
1719 rtx addr, addr2, addr_reg, fdesc_addr; \
1721 /* Load function descriptor address into a pseudo. */ \
1722 fdesc_addr = gen_reg_rtx (DImode); \
1723 emit_move_insn (fdesc_addr, FNADDR); \
1725 /* Read target address from function descriptor and store in \
1727 addr = memory_address (Pmode, plus_constant (ADDR, 16)); \
1728 emit_move_insn (gen_rtx_MEM (Pmode, addr), \
1729 gen_rtx_MEM (Pmode, fdesc_addr)); \
1730 /* Store static chain in trampoline. */ \
1731 addr = memory_address (Pmode, plus_constant (ADDR, 24)); \
1732 emit_move_insn (gen_rtx_MEM (Pmode, addr), STATIC_CHAIN); \
1734 /* Load GP value from function descriptor and store in trampoline. */\
1735 addr = memory_address (Pmode, plus_constant (ADDR, 8)); \
1736 addr2 = memory_address (Pmode, plus_constant (fdesc_addr, 8)); \
1737 emit_move_insn (gen_rtx_MEM (Pmode, addr), \
1738 gen_rtx_MEM (Pmode, addr2)); \
1740 /* Store trampoline entry address in trampoline. */ \
1741 addr = memory_address (Pmode, ADDR); \
1742 addr2 = memory_address (Pmode, plus_constant (ADDR, 32)); \
1743 emit_move_insn (gen_rtx_MEM (Pmode, addr), addr2); \
1745 /* Flush the relevant 64 bytes from the i-cache. */ \
1746 addr_reg = force_reg (DImode, plus_constant (ADDR, 0)); \
1747 emit_insn (gen_rtx_UNSPEC_VOLATILE (VOIDmode, \
1748 gen_rtvec (1, addr_reg), 3)); \
1752 /* Implicit Calls to Library Routines */
1754 /* ??? The ia64 linux kernel requires that we use the standard names for
1755 divide and modulo routines. However, if we aren't careful, lib1funcs.asm
1756 will be overridden by libgcc2.c. We avoid this by using different names
1757 for lib1funcs.asm modules, e.g. __divdi3 vs _divdi3. Since lib1funcs.asm
1758 goes into libgcc.a first, the linker will find it first. */
1760 /* Define this macro as a C statement that declares additional library routines
1761 renames existing ones. */
1763 /* ??? Disable the SImode divide routines for now. */
1764 #define INIT_TARGET_OPTABS \
1766 sdiv_optab->handlers[(int) SImode].libfunc = 0; \
1767 udiv_optab->handlers[(int) SImode].libfunc = 0; \
1768 smod_optab->handlers[(int) SImode].libfunc = 0; \
1769 umod_optab->handlers[(int) SImode].libfunc = 0; \
1772 /* Define this macro if GNU CC should generate calls to the System V (and ANSI
1773 C) library functions `memcpy' and `memset' rather than the BSD functions
1774 `bcopy' and `bzero'. */
1776 #define TARGET_MEM_FUNCTIONS
1779 /* Addressing Modes */
1781 /* Define this macro if the machine supports post-increment addressing. */
1783 #define HAVE_POST_INCREMENT 1
1784 #define HAVE_POST_DECREMENT 1
1786 /* A C expression that is 1 if the RTX X is a constant which is a valid
1789 #define CONSTANT_ADDRESS_P(X) 0
1791 /* The max number of registers that can appear in a valid memory address. */
1793 #define MAX_REGS_PER_ADDRESS 1
1795 /* A C compound statement with a conditional `goto LABEL;' executed if X (an
1796 RTX) is a legitimate memory address on the target machine for a memory
1797 operand of mode MODE. */
1799 /* ??? IA64 post increment addressing mode is much more powerful than this. */
1801 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, LABEL) \
1803 if (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
1805 else if (GET_CODE (X) == SUBREG && GET_CODE (XEXP (X, 0)) == REG \
1806 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1808 else if (GET_CODE (X) == POST_INC || GET_CODE (X) == POST_DEC) \
1810 if (GET_CODE (XEXP (X, 0)) == REG \
1811 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1813 else if (GET_CODE (XEXP (X, 0)) == SUBREG \
1814 && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
1815 && REG_OK_FOR_BASE_P (XEXP (XEXP (X, 0), 0))) \
1820 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1821 use as a base register. */
1823 #ifdef REG_OK_STRICT
1824 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1826 #define REG_OK_FOR_BASE_P(X) \
1827 (GENERAL_REGNO_P (REGNO (X)) || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1830 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for
1831 use as an index register. */
1833 #define REG_OK_FOR_INDEX_P(X) 0
1835 /* A C compound statement that attempts to replace X with a valid memory
1836 address for an operand of mode MODE.
1838 This must be present, but there is nothing useful to be done here. */
1840 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
1842 /* A C statement or compound statement with a conditional `goto LABEL;'
1843 executed if memory address X (an RTX) can have different meanings depending
1844 on the machine mode of the memory reference it is used for or if the address
1845 is valid for some modes but not others. */
1847 /* ??? Strictly speaking this isn't true, because we can use any increment with
1848 any mode. Unfortunately, the RTL implies that the increment depends on the
1849 mode, so we need this for now. */
1851 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
1852 if (GET_CODE (ADDR) == POST_DEC || GET_CODE (ADDR) == POST_INC) \
1855 /* A C expression that is nonzero if X is a legitimate constant for an
1856 immediate operand on the target machine. */
1858 #define LEGITIMATE_CONSTANT_P(X) \
1859 (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
1860 || GET_MODE (X) == DImode || CONST_DOUBLE_OK_FOR_G (X)) \
1863 /* Condition Code Status */
1865 /* One some machines not all possible comparisons are defined, but you can
1866 convert an invalid comparison into a valid one. */
1867 /* ??? Investigate. See the alpha definition. */
1868 /* #define CANONICALIZE_COMPARISON(CODE, OP0, OP1) */
1871 /* Describing Relative Costs of Operations */
1873 /* A part of a C `switch' statement that describes the relative costs of
1874 constant RTL expressions. */
1876 /* ??? This is incomplete. */
1878 #define CONST_COSTS(X, CODE, OUTER_CODE) \
1880 if ((X) == const0_rtx) \
1882 case CONST_DOUBLE: \
1886 return COSTS_N_INSNS (1);
1888 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions. */
1890 /* ??? Should define this to get better optimized code. */
1892 /* We make divide expensive, so that divide-by-constant will be optimized to
1895 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1900 return COSTS_N_INSNS (20);
1902 /* An expression giving the cost of an addressing mode that contains ADDRESS.
1903 If not defined, the cost is computed from the ADDRESS expression and the
1904 `CONST_COSTS' values. */
1906 #define ADDRESS_COST(ADDRESS) 0
1908 /* A C expression for the cost of moving data from a register in class FROM to
1911 #define REGISTER_MOVE_COST(FROM, TO) \
1912 ((FROM) == BR_REGS && (TO) == BR_REGS ? 8 \
1913 : (((FROM) == BR_REGS && (TO) != GENERAL_REGS) \
1914 || ((TO) == BR_REGS && (FROM) != GENERAL_REGS)) ? 6 \
1915 : (((FROM) == FR_FP_REGS && (TO) == FR_INT_REGS) \
1916 || ((FROM) == FR_INT_REGS && (TO) == FR_FP_REGS)) ? 4 \
1919 /* A C expression for the cost of moving data of mode M between a register and
1921 /* ??? Investigate. Might get better code by defining this. */
1922 /* #define MEMORY_MOVE_COST(M,C,I) */
1924 /* A C expression for the cost of a branch instruction. A value of 1 is the
1925 default; other values are interpreted relative to that. */
1926 /* ??? Investigate. Might get better code by defining this. */
1927 /* #define BRANCH_COST */
1929 /* Define this macro as a C expression which is nonzero if accessing less than
1930 a word of memory (i.e. a `char' or a `short') is no faster than accessing a
1933 #define SLOW_BYTE_ACCESS 1
1935 /* Define this macro if it is as good or better to call a constant function
1936 address than to call an address kept in a register.
1938 Indirect function calls are more expensive that direct function calls, so
1939 don't cse function addresses. */
1941 #define NO_FUNCTION_CSE
1943 /* A C statement (sans semicolon) to update the integer variable COST based on
1944 the relationship between INSN that is dependent on DEP_INSN through the
1947 /* ??? Investigate. */
1948 /* #define ADJUST_COST(INSN, LINK, DEP_INSN, COST) */
1950 /* A C statement (sans semicolon) to update the integer scheduling
1951 priority `INSN_PRIORITY(INSN)'. */
1953 /* ??? Investigate. */
1954 /* #define ADJUST_PRIORITY (INSN) */
1957 /* Dividing the output into sections. */
1959 /* A C expression whose value is a string containing the assembler operation
1960 that should precede instructions and read-only data. */
1962 #define TEXT_SECTION_ASM_OP ".text"
1964 /* A C expression whose value is a string containing the assembler operation to
1965 identify the following data as writable initialized data. */
1967 #define DATA_SECTION_ASM_OP ".data"
1969 /* If defined, a C expression whose value is a string containing the assembler
1970 operation to identify the following data as uninitialized global data. */
1972 #define BSS_SECTION_ASM_OP ".bss"
1974 /* Define this macro if jump tables (for `tablejump' insns) should be output in
1975 the text section, along with the assembler instructions. */
1977 /* ??? It is probably better for the jump tables to be in the rodata section,
1978 which is where they go by default. Unfortunately, that currently does not
1979 work, because of some problem with pcrelative relocations not getting
1980 resolved correctly. */
1981 /* ??? FIXME ??? rth says that we should use @gprel to solve this problem. */
1982 /* ??? If jump tables are in the text section, then we can use 4 byte
1983 entries instead of 8 byte entries. */
1985 #define JUMP_TABLES_IN_TEXT_SECTION 1
1987 /* Define this macro if references to a symbol must be treated differently
1988 depending on something about the variable or function named by the symbol
1989 (such as what section it is in). */
1991 #define ENCODE_SECTION_INFO(DECL) ia64_encode_section_info (DECL)
1993 /* If a variable is weakened, made one only or moved into a different
1994 section, it may be necessary to redo the section info to move the
1995 variable out of sdata. */
1997 #define REDO_SECTION_INFO_P(DECL) \
1998 ((TREE_CODE (DECL) == VAR_DECL) \
1999 && (DECL_ONE_ONLY (decl) || DECL_WEAK (decl) || DECL_COMMON (decl) \
2000 || DECL_SECTION_NAME (decl) != 0))
2002 #define SDATA_NAME_FLAG_CHAR '@'
2004 #define IA64_DEFAULT_GVALUE 8
2006 /* Decode SYM_NAME and store the real name part in VAR, sans the characters
2007 that encode section info. */
2009 #define STRIP_NAME_ENCODING(VAR, SYMBOL_NAME) \
2010 (VAR) = (SYMBOL_NAME) + ((SYMBOL_NAME)[0] == SDATA_NAME_FLAG_CHAR)
2013 /* Position Independent Code. */
2015 /* The register number of the register used to address a table of static data
2016 addresses in memory. */
2018 /* ??? Should modify ia64.md to use pic_offset_table_rtx instead of
2019 gen_rtx_REG (DImode, 1). */
2021 /* ??? Should we set flag_pic? Probably need to define
2022 LEGITIMIZE_PIC_OPERAND_P to make that work. */
2024 #define PIC_OFFSET_TABLE_REGNUM GR_REG (1)
2026 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM' is
2027 clobbered by calls. */
2029 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
2032 /* The Overall Framework of an Assembler File. */
2034 /* A C string constant describing how to begin a comment in the target
2035 assembler language. The compiler assumes that the comment will end at the
2038 #define ASM_COMMENT_START "//"
2040 /* A C string constant for text to be output before each `asm' statement or
2041 group of consecutive ones. */
2043 /* ??? This won't work with the Intel assembler, because it does not accept
2044 # as a comment start character. However, //APP does not work in gas, so we
2045 can't use that either. Same problem for ASM_APP_OFF below. */
2047 #define ASM_APP_ON "#APP\n"
2049 /* A C string constant for text to be output after each `asm' statement or
2050 group of consecutive ones. */
2052 #define ASM_APP_OFF "#NO_APP\n"
2055 /* Output of Data. */
2057 /* A C statement to output to the stdio stream STREAM an assembler instruction
2058 to assemble a floating-point constant of `XFmode', `DFmode', `SFmode',
2059 respectively, whose value is VALUE. */
2061 /* ??? This has not been tested. Long doubles are really 10 bytes not 12
2064 /* ??? Must reverse the word order for big-endian code? */
2066 #define ASM_OUTPUT_LONG_DOUBLE(FILE, VALUE) \
2069 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, t); \
2070 fprintf (FILE, "\tdata8 0x%08lx, 0x%08lx, 0x%08lx\n", \
2071 t[0] & 0xffffffff, t[1] & 0xffffffff, t[2] & 0xffffffff); \
2074 /* ??? Must reverse the word order for big-endian code? */
2076 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2079 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, t); \
2080 fprintf (FILE, "\tdata8 0x%08lx%08lx\n", \
2081 t[1] & 0xffffffff, t[0] & 0xffffffff); \
2084 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2087 REAL_VALUE_TO_TARGET_SINGLE (VALUE, t); \
2088 fprintf (FILE, "\tdata4 0x%lx\n", t & 0xffffffff); \
2091 /* A C statement to output to the stdio stream STREAM an assembler instruction
2092 to assemble an integer of 1, 2, 4, or 8 bytes, respectively, whose value
2095 /* This is how to output an assembler line defining a `char' constant. */
2097 #define ASM_OUTPUT_CHAR(FILE, VALUE) \
2099 fprintf (FILE, "\t%s\t", ASM_BYTE_OP); \
2100 output_addr_const (FILE, (VALUE)); \
2101 fprintf (FILE, "\n"); \
2104 /* This is how to output an assembler line defining a `short' constant. */
2106 #define ASM_OUTPUT_SHORT(FILE, VALUE) \
2108 fprintf (FILE, "\tdata2\t"); \
2109 output_addr_const (FILE, (VALUE)); \
2110 fprintf (FILE, "\n"); \
2113 /* This is how to output an assembler line defining an `int' constant.
2114 We also handle symbol output here. */
2116 /* ??? For ILP32, also need to handle function addresses here. */
2118 #define ASM_OUTPUT_INT(FILE, VALUE) \
2120 fprintf (FILE, "\tdata4\t"); \
2121 output_addr_const (FILE, (VALUE)); \
2122 fprintf (FILE, "\n"); \
2125 /* This is how to output an assembler line defining a `long' constant.
2126 We also handle symbol output here. */
2128 #define ASM_OUTPUT_DOUBLE_INT(FILE, VALUE) \
2130 fprintf (FILE, "\tdata8\t"); \
2131 if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) && SYMBOL_REF_FLAG (VALUE)) \
2132 fprintf (FILE, "@fptr("); \
2133 output_addr_const (FILE, (VALUE)); \
2134 if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) && SYMBOL_REF_FLAG (VALUE)) \
2135 fprintf (FILE, ")"); \
2136 fprintf (FILE, "\n"); \
2139 /* This is how to output an assembler line defining a `char' constant
2140 to an xdata segment. */
2142 #define ASM_OUTPUT_XDATA_CHAR(FILE, SECTION, VALUE) \
2144 fprintf (FILE, "\t.xdata1\t\"%s\", ", SECTION); \
2145 output_addr_const (FILE, (VALUE)); \
2146 fprintf (FILE, "\n"); \
2149 /* This is how to output an assembler line defining a `short' constant
2150 to an xdata segment. */
2152 #define ASM_OUTPUT_XDATA_SHORT(FILE, SECTION, VALUE) \
2154 fprintf (FILE, "\t.xdata2\t\"%s\", ", SECTION); \
2155 output_addr_const (FILE, (VALUE)); \
2156 fprintf (FILE, "\n"); \
2159 /* This is how to output an assembler line defining an `int' constant
2160 to an xdata segment. We also handle symbol output here. */
2162 /* ??? For ILP32, also need to handle function addresses here. */
2164 #define ASM_OUTPUT_XDATA_INT(FILE, SECTION, VALUE) \
2166 fprintf (FILE, "\t.xdata4\t\"%s\", ", SECTION); \
2167 output_addr_const (FILE, (VALUE)); \
2168 fprintf (FILE, "\n"); \
2171 /* This is how to output an assembler line defining a `long' constant
2172 to an xdata segment. We also handle symbol output here. */
2174 #define ASM_OUTPUT_XDATA_DOUBLE_INT(FILE, SECTION, VALUE) \
2176 int need_closing_paren = 0; \
2177 fprintf (FILE, "\t.xdata8\t\"%s\", ", SECTION); \
2178 if (!(TARGET_NO_PIC || TARGET_AUTO_PIC) \
2179 && GET_CODE (VALUE) == SYMBOL_REF) \
2181 fprintf (FILE, SYMBOL_REF_FLAG (VALUE) ? "@fptr(" : "@segrel("); \
2182 need_closing_paren = 1; \
2184 output_addr_const (FILE, VALUE); \
2185 if (need_closing_paren) \
2186 fprintf (FILE, ")"); \
2187 fprintf (FILE, "\n"); \
2191 /* Output EH data to the unwind segment. */
2192 #define ASM_OUTPUT_EH_CHAR(FILE, VALUE) \
2193 ASM_OUTPUT_XDATA_CHAR(FILE, ".IA_64.unwind_info", VALUE)
2195 #define ASM_OUTPUT_EH_SHORT(FILE, VALUE) \
2196 ASM_OUTPUT_XDATA_SHORT(FILE, ".IA_64.unwind_info", VALUE)
2198 #define ASM_OUTPUT_EH_INT(FILE, VALUE) \
2199 ASM_OUTPUT_XDATA_INT(FILE, ".IA_64.unwind_info", VALUE)
2201 #define ASM_OUTPUT_EH_DOUBLE_INT(FILE, VALUE) \
2202 ASM_OUTPUT_XDATA_DOUBLE_INT(FILE, ".IA_64.unwind_info", VALUE)
2204 /* A C statement to output to the stdio stream STREAM an assembler instruction
2205 to assemble a single byte containing the number VALUE. */
2207 #define ASM_OUTPUT_BYTE(STREAM, VALUE) \
2208 fprintf (STREAM, "\t%s\t0x%x\n", ASM_BYTE_OP, (int)(VALUE) & 0xff)
2210 /* These macros are defined as C string constant, describing the syntax in the
2211 assembler for grouping arithmetic expressions. */
2213 #define ASM_OPEN_PAREN "("
2214 #define ASM_CLOSE_PAREN ")"
2217 /* Output of Uninitialized Variables. */
2219 /* This is all handled by svr4.h. */
2222 /* Output and Generation of Labels. */
2224 /* A C statement (sans semicolon) to output to the stdio stream STREAM the
2225 assembler definition of a label named NAME. */
2227 /* See the ASM_OUTPUT_LABELREF definition in sysv4.h for an explanation of
2228 why ia64_asm_output_label exists. */
2230 extern int ia64_asm_output_label;
2231 #define ASM_OUTPUT_LABEL(STREAM, NAME) \
2233 ia64_asm_output_label = 1; \
2234 assemble_name (STREAM, NAME); \
2235 fputs (":\n", STREAM); \
2236 ia64_asm_output_label = 0; \
2239 /* A C statement (sans semicolon) to output to the stdio stream STREAM some
2240 commands that will make the label NAME global; that is, available for
2241 reference from other files. */
2243 #define ASM_GLOBALIZE_LABEL(STREAM,NAME) \
2245 fputs ("\t.global ", STREAM); \
2246 assemble_name (STREAM, NAME); \
2247 fputs ("\n", STREAM); \
2250 /* A C statement (sans semicolon) to output to the stdio stream STREAM any text
2251 necessary for declaring the name of an external symbol named NAME which is
2252 referenced in this compilation but not defined. */
2254 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
2255 ia64_asm_output_external (FILE, DECL, NAME)
2257 /* A C statement to store into the string STRING a label whose name is made
2258 from the string PREFIX and the number NUM. */
2260 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
2262 sprintf (LABEL, "*.%s%d", PREFIX, NUM); \
2265 /* A C expression to assign to OUTVAR (which is a variable of type `char *') a
2266 newly allocated string made from the string NAME and the number NUMBER, with
2267 some suitable punctuation added. */
2269 /* ??? Not sure if using a ? in the name for Intel as is safe. */
2271 #define ASM_FORMAT_PRIVATE_NAME(OUTVAR, NAME, NUMBER) \
2273 (OUTVAR) = (char *) alloca (strlen (NAME) + 12); \
2274 sprintf (OUTVAR, "%s%c%ld", (NAME), (TARGET_GNU_AS ? '.' : '?'), \
2278 /* A C statement to output to the stdio stream STREAM assembler code which
2279 defines (equates) the symbol NAME to have the value VALUE. */
2281 #define ASM_OUTPUT_DEF(STREAM, NAME, VALUE) \
2283 assemble_name (STREAM, NAME); \
2284 fputs (" = ", STREAM); \
2285 assemble_name (STREAM, VALUE); \
2286 fputc ('\n', STREAM); \
2290 /* Macros Controlling Initialization Routines. */
2292 /* This is handled by svr4.h and sysv4.h. */
2295 /* Output of Assembler Instructions. */
2297 /* A C initializer containing the assembler's names for the machine registers,
2298 each one as a C string constant. */
2300 #define REGISTER_NAMES \
2302 /* General registers. */ \
2303 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", \
2304 "r10", "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", \
2305 "r20", "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", \
2307 /* Local registers. */ \
2308 "loc0", "loc1", "loc2", "loc3", "loc4", "loc5", "loc6", "loc7", \
2309 "loc8", "loc9", "loc10","loc11","loc12","loc13","loc14","loc15", \
2310 "loc16","loc17","loc18","loc19","loc20","loc21","loc22","loc23", \
2311 "loc24","loc25","loc26","loc27","loc28","loc29","loc30","loc31", \
2312 "loc32","loc33","loc34","loc35","loc36","loc37","loc38","loc39", \
2313 "loc40","loc41","loc42","loc43","loc44","loc45","loc46","loc47", \
2314 "loc48","loc49","loc50","loc51","loc52","loc53","loc54","loc55", \
2315 "loc56","loc57","loc58","loc59","loc60","loc61","loc62","loc63", \
2316 "loc64","loc65","loc66","loc67","loc68","loc69","loc70","loc71", \
2317 "loc72","loc73","loc74","loc75","loc76","loc77","loc78","loc79", \
2318 /* Input registers. */ \
2319 "in0", "in1", "in2", "in3", "in4", "in5", "in6", "in7", \
2320 /* Output registers. */ \
2321 "out0", "out1", "out2", "out3", "out4", "out5", "out6", "out7", \
2322 /* Floating-point registers. */ \
2323 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9", \
2324 "f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19", \
2325 "f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29", \
2326 "f30", "f31", "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39", \
2327 "f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49", \
2328 "f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59", \
2329 "f60", "f61", "f62", "f63", "f64", "f65", "f66", "f67", "f68", "f69", \
2330 "f70", "f71", "f72", "f73", "f74", "f75", "f76", "f77", "f78", "f79", \
2331 "f80", "f81", "f82", "f83", "f84", "f85", "f86", "f87", "f88", "f89", \
2332 "f90", "f91", "f92", "f93", "f94", "f95", "f96", "f97", "f98", "f99", \
2333 "f100","f101","f102","f103","f104","f105","f106","f107","f108","f109",\
2334 "f110","f111","f112","f113","f114","f115","f116","f117","f118","f119",\
2335 "f120","f121","f122","f123","f124","f125","f126","f127", \
2336 /* Predicate registers. */ \
2337 "p0", "p1", "p2", "p3", "p4", "p5", "p6", "p7", "p8", "p9", \
2338 "p10", "p11", "p12", "p13", "p14", "p15", "p16", "p17", "p18", "p19", \
2339 "p20", "p21", "p22", "p23", "p24", "p25", "p26", "p27", "p28", "p29", \
2340 "p30", "p31", "p32", "p33", "p34", "p35", "p36", "p37", "p38", "p39", \
2341 "p40", "p41", "p42", "p43", "p44", "p45", "p46", "p47", "p48", "p49", \
2342 "p50", "p51", "p52", "p53", "p54", "p55", "p56", "p57", "p58", "p59", \
2343 "p60", "p61", "p62", "p63", \
2344 /* Branch registers. */ \
2345 "b0", "b1", "b2", "b3", "b4", "b5", "b6", "b7", \
2346 /* Frame pointer. Return address. */ \
2350 /* If defined, a C initializer for an array of structures containing a name and
2351 a register number. This macro defines additional names for hard registers,
2352 thus allowing the `asm' option in declarations to refer to registers using
2355 #define ADDITIONAL_REGISTER_NAMES \
2357 { "gp", R_GR (1) }, \
2358 { "sp", R_GR (12) }, \
2359 { "in0", IN_REG (0) }, \
2360 { "in1", IN_REG (1) }, \
2361 { "in2", IN_REG (2) }, \
2362 { "in3", IN_REG (3) }, \
2363 { "in4", IN_REG (4) }, \
2364 { "in5", IN_REG (5) }, \
2365 { "in6", IN_REG (6) }, \
2366 { "in7", IN_REG (7) }, \
2367 { "out0", OUT_REG (0) }, \
2368 { "out1", OUT_REG (1) }, \
2369 { "out2", OUT_REG (2) }, \
2370 { "out3", OUT_REG (3) }, \
2371 { "out4", OUT_REG (4) }, \
2372 { "out5", OUT_REG (5) }, \
2373 { "out6", OUT_REG (6) }, \
2374 { "out7", OUT_REG (7) }, \
2375 { "loc0", LOC_REG (0) }, \
2376 { "loc1", LOC_REG (1) }, \
2377 { "loc2", LOC_REG (2) }, \
2378 { "loc3", LOC_REG (3) }, \
2379 { "loc4", LOC_REG (4) }, \
2380 { "loc5", LOC_REG (5) }, \
2381 { "loc6", LOC_REG (6) }, \
2382 { "loc7", LOC_REG (7) }, \
2383 { "loc8", LOC_REG (8) }, \
2384 { "loc9", LOC_REG (9) }, \
2385 { "loc10", LOC_REG (10) }, \
2386 { "loc11", LOC_REG (11) }, \
2387 { "loc12", LOC_REG (12) }, \
2388 { "loc13", LOC_REG (13) }, \
2389 { "loc14", LOC_REG (14) }, \
2390 { "loc15", LOC_REG (15) }, \
2391 { "loc16", LOC_REG (16) }, \
2392 { "loc17", LOC_REG (17) }, \
2393 { "loc18", LOC_REG (18) }, \
2394 { "loc19", LOC_REG (19) }, \
2395 { "loc20", LOC_REG (20) }, \
2396 { "loc21", LOC_REG (21) }, \
2397 { "loc22", LOC_REG (22) }, \
2398 { "loc23", LOC_REG (23) }, \
2399 { "loc24", LOC_REG (24) }, \
2400 { "loc25", LOC_REG (25) }, \
2401 { "loc26", LOC_REG (26) }, \
2402 { "loc27", LOC_REG (27) }, \
2403 { "loc28", LOC_REG (28) }, \
2404 { "loc29", LOC_REG (29) }, \
2405 { "loc30", LOC_REG (30) }, \
2406 { "loc31", LOC_REG (31) }, \
2407 { "loc32", LOC_REG (32) }, \
2408 { "loc33", LOC_REG (33) }, \
2409 { "loc34", LOC_REG (34) }, \
2410 { "loc35", LOC_REG (35) }, \
2411 { "loc36", LOC_REG (36) }, \
2412 { "loc37", LOC_REG (37) }, \
2413 { "loc38", LOC_REG (38) }, \
2414 { "loc39", LOC_REG (39) }, \
2415 { "loc40", LOC_REG (40) }, \
2416 { "loc41", LOC_REG (41) }, \
2417 { "loc42", LOC_REG (42) }, \
2418 { "loc43", LOC_REG (43) }, \
2419 { "loc44", LOC_REG (44) }, \
2420 { "loc45", LOC_REG (45) }, \
2421 { "loc46", LOC_REG (46) }, \
2422 { "loc47", LOC_REG (47) }, \
2423 { "loc48", LOC_REG (48) }, \
2424 { "loc49", LOC_REG (49) }, \
2425 { "loc50", LOC_REG (50) }, \
2426 { "loc51", LOC_REG (51) }, \
2427 { "loc52", LOC_REG (52) }, \
2428 { "loc53", LOC_REG (53) }, \
2429 { "loc54", LOC_REG (54) }, \
2430 { "loc55", LOC_REG (55) }, \
2431 { "loc56", LOC_REG (56) }, \
2432 { "loc57", LOC_REG (57) }, \
2433 { "loc58", LOC_REG (58) }, \
2434 { "loc59", LOC_REG (59) }, \
2435 { "loc60", LOC_REG (60) }, \
2436 { "loc61", LOC_REG (61) }, \
2437 { "loc62", LOC_REG (62) }, \
2438 { "loc63", LOC_REG (63) }, \
2439 { "loc64", LOC_REG (64) }, \
2440 { "loc65", LOC_REG (65) }, \
2441 { "loc66", LOC_REG (66) }, \
2442 { "loc67", LOC_REG (67) }, \
2443 { "loc68", LOC_REG (68) }, \
2444 { "loc69", LOC_REG (69) }, \
2445 { "loc70", LOC_REG (70) }, \
2446 { "loc71", LOC_REG (71) }, \
2447 { "loc72", LOC_REG (72) }, \
2448 { "loc73", LOC_REG (73) }, \
2449 { "loc74", LOC_REG (74) }, \
2450 { "loc75", LOC_REG (75) }, \
2451 { "loc76", LOC_REG (76) }, \
2452 { "loc77", LOC_REG (77) }, \
2453 { "loc78", LOC_REG (78) }, \
2454 { "loc79", LOC_REG (79) }, \
2457 /* A C compound statement to output to stdio stream STREAM the assembler syntax
2458 for an instruction operand X. X is an RTL expression. */
2460 #define PRINT_OPERAND(STREAM, X, CODE) \
2461 ia64_print_operand (STREAM, X, CODE)
2463 /* A C expression which evaluates to true if CODE is a valid punctuation
2464 character for use in the `PRINT_OPERAND' macro. */
2466 /* ??? Keep this around for now, as we might need it later. */
2468 /* #define PRINT_OPERAND_PUNCT_VALID_P(CODE) */
2470 /* A C compound statement to output to stdio stream STREAM the assembler syntax
2471 for an instruction operand that is a memory reference whose address is X. X
2472 is an RTL expression. */
2474 #define PRINT_OPERAND_ADDRESS(STREAM, X) \
2475 ia64_print_operand_address (STREAM, X)
2477 /* If defined, C string expressions to be used for the `%R', `%L', `%U', and
2478 `%I' options of `asm_fprintf' (see `final.c'). */
2480 #define REGISTER_PREFIX ""
2481 #define LOCAL_LABEL_PREFIX "."
2482 #define USER_LABEL_PREFIX ""
2483 #define IMMEDIATE_PREFIX ""
2486 /* Output of dispatch tables. */
2488 /* This macro should be provided on machines where the addresses in a dispatch
2489 table are relative to the table's own address. */
2491 /* ??? Depends on the pointer size. */
2493 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \
2494 fprintf (STREAM, "\tdata8 .L%d-.L%d\n", VALUE, REL)
2496 /* This is how to output an element of a case-vector that is absolute.
2497 (Ia64 does not use such vectors, but we must define this macro anyway.) */
2499 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) abort ()
2501 /* Define this if something special must be output at the end of a jump-table.
2502 We need to align back to a 16 byte boundary because offsets are smaller than
2505 #define ASM_OUTPUT_CASE_END(STREAM, NUM, TABLE) ASM_OUTPUT_ALIGN (STREAM, 4)
2507 /* Jump tables only need 8 byte alignment. */
2509 #define ADDR_VEC_ALIGN(ADDR_VEC) 3
2512 /* Assembler Commands for Exception Regions. */
2514 /* ??? This entire section of ia64.h needs to be implemented and then cleaned
2517 /* A C expression to output text to mark the start of an exception region.
2519 This macro need not be defined on most platforms. */
2520 /* #define ASM_OUTPUT_EH_REGION_BEG() */
2522 /* A C expression to output text to mark the end of an exception region.
2524 This macro need not be defined on most platforms. */
2525 /* #define ASM_OUTPUT_EH_REGION_END() */
2527 /* A C expression to switch to the section in which the main exception table is
2528 to be placed. The default is a section named `.gcc_except_table' on machines
2529 that support named sections via `ASM_OUTPUT_SECTION_NAME', otherwise if `-fpic'
2530 or `-fPIC' is in effect, the `data_section', otherwise the
2531 `readonly_data_section'. */
2532 /* #define EXCEPTION_SECTION() */
2534 /* If defined, a C string constant for the assembler operation to switch to the
2535 section for exception handling frame unwind information. If not defined,
2536 GNU CC will provide a default definition if the target supports named
2537 sections. `crtstuff.c' uses this macro to switch to the appropriate
2540 You should define this symbol if your target supports DWARF 2 frame unwind
2541 information and the default definition does not work. */
2542 #define EH_FRAME_SECTION_ASM_OP ".section\t.IA_64.unwind,\"aw\""
2544 /* A C expression that is nonzero if the normal exception table output should
2547 This macro need not be defined on most platforms. */
2548 /* #define OMIT_EH_TABLE() */
2550 /* Alternate runtime support for looking up an exception at runtime and finding
2551 the associated handler, if the default method won't work.
2553 This macro need not be defined on most platforms. */
2554 /* #define EH_TABLE_LOOKUP() */
2556 /* A C expression that decides whether or not the current function needs to
2557 have a function unwinder generated for it. See the file `except.c' for
2558 details on when to define this, and how. */
2559 /* #define DOESNT_NEED_UNWINDER */
2561 /* An rtx used to mask the return address found via RETURN_ADDR_RTX, so that it
2562 does not contain any extraneous set bits in it. */
2563 /* #define MASK_RETURN_ADDR */
2565 /* Define this macro to 0 if your target supports DWARF 2 frame unwind
2566 information, but it does not yet work with exception handling. Otherwise,
2567 if your target supports this information (if it defines
2568 `INCOMING_RETURN_ADDR_RTX' and either `UNALIGNED_INT_ASM_OP' or
2569 `OBJECT_FORMAT_ELF'), GCC will provide a default definition of 1.
2571 If this macro is defined to 1, the DWARF 2 unwinder will be the default
2572 exception handling mechanism; otherwise, setjmp/longjmp will be used by
2575 If this macro is defined to anything, the DWARF 2 unwinder will be used
2576 instead of inline unwinders and __unwind_function in the non-setjmp case. */
2577 /* #define DWARF2_UNWIND_INFO */
2580 /* Assembler Commands for Alignment. */
2582 /* The alignment (log base 2) to put in front of LABEL, which follows
2585 /* ??? Investigate. */
2587 /* ??? Emitting align directives increases the size of the line number debug
2588 info, because each .align forces use of an extended opcode. Perhaps try
2589 to fix this in the assembler? */
2591 /* #define LABEL_ALIGN_AFTER_BARRIER(LABEL) */
2593 /* The desired alignment for the location counter at the beginning
2596 /* ??? Investigate. */
2597 /* #define LOOP_ALIGN(LABEL) */
2599 /* Define this macro if `ASM_OUTPUT_SKIP' should not be used in the text
2600 section because it fails put zeros in the bytes that are skipped. */
2602 #define ASM_NO_SKIP_IN_TEXT 1
2604 /* A C statement to output to the stdio stream STREAM an assembler command to
2605 advance the location counter to a multiple of 2 to the POWER bytes. */
2607 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
2608 fprintf (STREAM, "\t.align %d\n", 1<<(POWER))
2611 /* Macros Affecting all Debug Formats. */
2613 /* This is handled in svr4.h and sysv4.h. */
2616 /* Specific Options for DBX Output. */
2618 /* This is handled by dbxelf.h which is included by svr4.h. */
2621 /* Open ended Hooks for DBX Output. */
2626 /* File names in DBX format. */
2631 /* Macros for SDB and Dwarf Output. */
2633 /* Define this macro if GNU CC should produce dwarf version 2 format debugging
2634 output in response to the `-g' option. */
2636 #define DWARF2_DEBUGGING_INFO
2638 /* Section names for DWARF2 debug info. */
2640 #define DEBUG_INFO_SECTION ".debug_info, \"\", \"progbits\""
2641 #define ABBREV_SECTION ".debug_abbrev, \"\", \"progbits\""
2642 #define ARANGES_SECTION ".debug_aranges, \"\", \"progbits\""
2643 #define DEBUG_LINE_SECTION ".debug_line, \"\", \"progbits\""
2644 #define PUBNAMES_SECTION ".debug_pubnames, \"\", \"progbits\""
2646 /* C string constants giving the pseudo-op to use for a sequence of
2647 2, 4, and 8 byte unaligned constants. dwarf2out.c needs these. */
2649 #define UNALIGNED_SHORT_ASM_OP "data2.ua"
2650 #define UNALIGNED_INT_ASM_OP "data4.ua"
2651 #define UNALIGNED_DOUBLE_INT_ASM_OP "data8.ua"
2653 /* We need to override the default definition for this in dwarf2out.c so that
2654 we can emit the necessary # postfix. */
2655 #define ASM_NAME_TO_STRING(STR, NAME) \
2657 if ((NAME)[0] == '*') \
2658 dyn_string_append (STR, NAME + 1); \
2662 STRIP_NAME_ENCODING (newstr, NAME); \
2663 dyn_string_append (STR, user_label_prefix); \
2664 dyn_string_append (STR, newstr); \
2665 dyn_string_append (STR, "#"); \
2670 #define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DWARF2_ASM)
2673 /* Cross Compilation and Floating Point. */
2675 /* Define to enable software floating point emulation. */
2676 #define REAL_ARITHMETIC
2679 /* Register Renaming Parameters. */
2681 /* A C expression that is nonzero if hard register number REGNO2 can be
2682 considered for use as a rename register for REGNO1 */
2684 #define HARD_REGNO_RENAME_OK(REGNO1,REGNO2) \
2685 ((! PR_REGNO_P (REGNO1) && ! PR_REGNO_P (REGNO2)) \
2686 ? (!call_fixed_regs [REGNO1] && !call_fixed_regs [REGNO2]) \
2688 : ((REGNO2) > 256 && ((REGNO2 & 1) == 0)) \
2691 /* Define this macro if the compiler should use extended basic blocks
2692 when renaming registers. Define this macro if the target has predicate
2695 #define RENAME_EXTENDED_BLOCKS
2698 /* Miscellaneous Parameters. */
2700 /* Define this if you have defined special-purpose predicates in the file
2701 `MACHINE.c'. For each predicate, list all rtl codes that can be in
2702 expressions matched by the predicate. */
2704 #define PREDICATE_CODES \
2705 { "call_operand", {SUBREG, REG, SYMBOL_REF}}, \
2706 { "sdata_symbolic_operand", {SYMBOL_REF, CONST}}, \
2707 { "symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
2708 { "function_operand", {SYMBOL_REF}}, \
2709 { "setjmp_operand", {SYMBOL_REF}}, \
2710 { "move_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
2711 CONSTANT_P_RTX, SYMBOL_REF, CONST, LABEL_REF}}, \
2712 { "reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \
2713 { "reg_or_6bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2714 { "reg_or_8bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2715 { "reg_or_8bit_adjusted_operand", {SUBREG, REG, CONST_INT, \
2717 { "reg_or_8bit_and_adjusted_operand", {SUBREG, REG, CONST_INT, \
2719 { "reg_or_14bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2720 { "reg_or_22bit_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2721 { "shift_count_operand", {SUBREG, REG, CONST_INT, CONSTANT_P_RTX}}, \
2722 { "shift_32bit_count_operand", {SUBREG, REG, CONST_INT, \
2724 { "shladd_operand", {CONST_INT}}, \
2725 { "fetchadd_operand", {CONST_INT}}, \
2726 { "reg_or_fp01_operand", {SUBREG, REG, CONST_DOUBLE, CONSTANT_P_RTX}}, \
2727 { "normal_comparison_operator", {EQ, NE, GT, LE, GTU, LEU}}, \
2728 { "adjusted_comparison_operator", {LT, GE, LTU, GEU}}, \
2729 { "call_multiple_values_operation", {PARALLEL}},
2731 /* An alias for a machine mode name. This is the machine mode that elements of
2732 a jump-table should have. */
2734 #define CASE_VECTOR_MODE Pmode
2736 /* Define as C expression which evaluates to nonzero if the tablejump
2737 instruction expects the table to contain offsets from the address of the
2740 #define CASE_VECTOR_PC_RELATIVE 1
2742 /* Define this macro if operations between registers with integral mode smaller
2743 than a word are always performed on the entire register. */
2745 #define WORD_REGISTER_OPERATIONS
2747 /* Define this macro to be a C expression indicating when insns that read
2748 memory in MODE, an integral mode narrower than a word, set the bits outside
2749 of MODE to be either the sign-extension or the zero-extension of the data
2752 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
2754 /* An alias for a tree code that should be used by default for conversion of
2755 floating point values to fixed point. */
2757 /* ??? Looks like this macro is obsolete and should be deleted everywhere. */
2759 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2761 /* An alias for a tree code that is the easiest kind of division to compile
2762 code for in the general case. */
2764 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2766 /* The maximum number of bytes that a single instruction can move quickly from
2767 memory to memory. */
2770 /* A C expression which is nonzero if on this machine it is safe to "convert"
2771 an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller
2772 than INPREC) by merely operating on it as if it had only OUTPREC bits. */
2774 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2776 /* A C expression describing the value returned by a comparison operator with
2777 an integral mode and stored by a store-flag instruction (`sCOND') when the
2778 condition is true. */
2780 /* ??? Investigate using -1 instead of 1. */
2782 #define STORE_FLAG_VALUE 1
2784 /* An alias for the machine mode for pointers. */
2786 /* ??? This would change if we had ILP32 support. */
2788 #define Pmode DImode
2790 /* An alias for the machine mode used for memory references to functions being
2791 called, in `call' RTL expressions. */
2793 #define FUNCTION_MODE Pmode
2795 /* Define this macro to handle System V style pragmas: #pragma pack and
2796 #pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is
2799 #define HANDLE_SYSV_PRAGMA
2801 /* If defined, a C expression whose value is nonzero if IDENTIFIER with
2802 arguments ARGS is a valid machine specific attribute for TYPE. The
2803 attributes in ATTRIBUTES have previously been assigned to TYPE. */
2805 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, IDENTIFIER, ARGS) \
2806 ia64_valid_type_attribute (TYPE, ATTRIBUTES, IDENTIFIER, ARGS)
2808 /* In rare cases, correct code generation requires extra machine dependent
2809 processing between the second jump optimization pass and delayed branch
2810 scheduling. On those machines, define this macro as a C statement to act on
2811 the code starting at INSN. */
2813 #define MACHINE_DEPENDENT_REORG(INSN) ia64_reorg (INSN)
2815 /* A C expression for the maximum number of instructions to execute via
2816 conditional execution instructions instead of a branch. A value of
2817 BRANCH_COST+1 is the default if the machine does not use
2818 cc0, and 1 if it does use cc0. */
2819 /* ??? Investigate. */
2820 /* #define MAX_CONDITIONAL_EXECUTE */
2822 /* Indicate how many instructions can be issued at the same time. */
2824 /* ??? For now, we just schedule to fill bundles. */
2826 #define ISSUE_RATE 3
2828 #define IA64_UNWIND_INFO 1
2829 #define HANDLER_SECTION fprintf (asm_out_file, "\t.personality\t__ia64_personality_v1\n\t.handlerdata\n");
2830 #define IA64_UNWIND_EMIT(f,i) process_for_unwind_directive (f,i)
2832 /* This function contains machine specific function data. */
2833 struct machine_function
2835 /* The new stack pointer when unwinding from EH. */
2836 struct rtx_def* ia64_eh_epilogue_sp;
2838 /* The new bsp value when unwinding from EH. */
2839 struct rtx_def* ia64_eh_epilogue_bsp;
2845 IA64_BUILTIN_SYNCHRONIZE,
2847 IA64_BUILTIN_FETCH_AND_ADD_SI,
2848 IA64_BUILTIN_FETCH_AND_SUB_SI,
2849 IA64_BUILTIN_FETCH_AND_OR_SI,
2850 IA64_BUILTIN_FETCH_AND_AND_SI,
2851 IA64_BUILTIN_FETCH_AND_XOR_SI,
2852 IA64_BUILTIN_FETCH_AND_NAND_SI,
2854 IA64_BUILTIN_ADD_AND_FETCH_SI,
2855 IA64_BUILTIN_SUB_AND_FETCH_SI,
2856 IA64_BUILTIN_OR_AND_FETCH_SI,
2857 IA64_BUILTIN_AND_AND_FETCH_SI,
2858 IA64_BUILTIN_XOR_AND_FETCH_SI,
2859 IA64_BUILTIN_NAND_AND_FETCH_SI,
2861 IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_SI,
2862 IA64_BUILTIN_VAL_COMPARE_AND_SWAP_SI,
2864 IA64_BUILTIN_SYNCHRONIZE_SI,
2866 IA64_BUILTIN_LOCK_TEST_AND_SET_SI,
2868 IA64_BUILTIN_LOCK_RELEASE_SI,
2870 IA64_BUILTIN_FETCH_AND_ADD_DI,
2871 IA64_BUILTIN_FETCH_AND_SUB_DI,
2872 IA64_BUILTIN_FETCH_AND_OR_DI,
2873 IA64_BUILTIN_FETCH_AND_AND_DI,
2874 IA64_BUILTIN_FETCH_AND_XOR_DI,
2875 IA64_BUILTIN_FETCH_AND_NAND_DI,
2877 IA64_BUILTIN_ADD_AND_FETCH_DI,
2878 IA64_BUILTIN_SUB_AND_FETCH_DI,
2879 IA64_BUILTIN_OR_AND_FETCH_DI,
2880 IA64_BUILTIN_AND_AND_FETCH_DI,
2881 IA64_BUILTIN_XOR_AND_FETCH_DI,
2882 IA64_BUILTIN_NAND_AND_FETCH_DI,
2884 IA64_BUILTIN_BOOL_COMPARE_AND_SWAP_DI,
2885 IA64_BUILTIN_VAL_COMPARE_AND_SWAP_DI,
2887 IA64_BUILTIN_SYNCHRONIZE_DI,
2889 IA64_BUILTIN_LOCK_TEST_AND_SET_DI,
2891 IA64_BUILTIN_LOCK_RELEASE_DI
2894 /* Codes for expand_compare_and_swap and expand_swap_and_compare. */
2896 IA64_ADD_OP, IA64_SUB_OP, IA64_OR_OP, IA64_AND_OP, IA64_XOR_OP, IA64_NAND_OP
2899 #define MD_INIT_BUILTINS do { \
2900 ia64_init_builtins (); \
2903 #define MD_EXPAND_BUILTIN(EXP, TARGET, SUBTARGET, MODE, IGNORE) \
2904 ia64_expand_builtin ((EXP), (TARGET), (SUBTARGET), (MODE), (IGNORE))
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