1 /* Definitions of target machine for GNU compiler for Intel X86
3 Copyright (C) 1988, 1992, 1994, 1995, 1996 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* The purpose of this file is to define the characteristics of the i386,
23 independent of assembler syntax or operating system.
25 Three other files build on this one to describe a specific assembler syntax:
26 bsd386.h, att386.h, and sun386.h.
28 The actual tm.h file for a particular system should include
29 this file, and then the file for the appropriate assembler syntax.
31 Many macros that specify assembler syntax are omitted entirely from
32 this file because they really belong in the files for particular
33 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
34 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
35 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
37 /* Names to predefine in the preprocessor for this target machine. */
41 /* Stubs for half-pic support if not OSF/1 reference platform. */
44 #define HALF_PIC_P() 0
45 #define HALF_PIC_NUMBER_PTRS 0
46 #define HALF_PIC_NUMBER_REFS 0
47 #define HALF_PIC_ENCODE(DECL)
48 #define HALF_PIC_DECLARE(NAME)
49 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
50 #define HALF_PIC_ADDRESS_P(X) 0
51 #define HALF_PIC_PTR(X) X
52 #define HALF_PIC_FINISH(STREAM)
55 /* Define the specific costs for a given cpu */
57 struct processor_costs {
58 int add; /* cost of an add instruction */
59 int lea; /* cost of a lea instruction */
60 int shift_var; /* variable shift costs */
61 int shift_const; /* constant shift costs */
62 int mult_init; /* cost of starting a multiply */
63 int mult_bit; /* cost of multiply per each bit set */
64 int divide; /* cost of a divide/mod */
67 extern struct processor_costs *ix86_cost;
69 /* Run-time compilation parameters selecting different hardware subsets. */
71 extern int target_flags;
73 /* Macros used in the machine description to test the flags. */
75 /* configure can arrange to make this 2, to force a 486. */
76 #ifndef TARGET_CPU_DEFAULT
77 #define TARGET_CPU_DEFAULT 0
80 /* Masks for the -m switches */
81 #define MASK_80387 000000000001 /* Hardware floating point */
82 #define MASK_486 000000000002 /* 80486 specific */
83 #define MASK_NOTUSED1 000000000004 /* bit not currently used */
84 #define MASK_RTD 000000000010 /* Use ret that pops args */
85 #define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
86 #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
87 #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
88 #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
89 #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
90 #define MASK_OMIT_LEAF_FRAME_POINTER 0x00000800 /* omit leaf frame pointers */
91 /* Temporary codegen switches */
92 #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
93 #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
94 #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
95 #define MASK_NO_PSEUDO 000010000000 /* Move op's args -> pseudos */
96 #define MASK_DEBUG_ARG 000020000000 /* Debug function_arg */
97 #define MASK_SCHEDULE_PROLOGUE 000040000000 /* Emit prologue as rtl */
98 #define MASK_STACK_PROBE 000100000000 /* Enable stack probing */
100 /* Use the floating point instructions */
101 #define TARGET_80387 (target_flags & MASK_80387)
103 /* Compile using ret insn that pops args.
104 This will not work unless you use prototypes at least
105 for all functions that can take varying numbers of args. */
106 #define TARGET_RTD (target_flags & MASK_RTD)
108 /* Align doubles to a two word boundary. This breaks compatibility with
109 the published ABI's for structures containing doubles, but produces
110 faster code on the pentium. */
111 #define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
113 /* Put uninitialized locals into bss, not data.
114 Meaningful only on svr3. */
115 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
117 /* Use IEEE floating point comparisons. These handle correctly the cases
118 where the result of a comparison is unordered. Normally SIGFPE is
119 generated in such cases, in which case this isn't needed. */
120 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
122 /* Functions that return a floating point value may return that value
123 in the 387 FPU or in 386 integer registers. If set, this flag causes
124 the 387 to be used, which is compatible with most calling conventions. */
125 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
127 /* Disable generation of FP sin, cos and sqrt operations for 387.
128 This is because FreeBSD lacks these in the math-emulator-code */
129 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
131 /* Don't create frame pointers for leaf functions */
132 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
134 /* Temporary switches for tuning code generation */
136 /* Disable 32x32->64 bit multiplies that are used for long long multiplies
137 and division by constants, but sometimes cause reload problems. */
138 #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
139 #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
141 /* Emit/Don't emit prologue as rtl */
142 #define TARGET_SCHEDULE_PROLOGUE (target_flags & MASK_SCHEDULE_PROLOGUE)
144 /* Debug GO_IF_LEGITIMATE_ADDRESS */
145 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
147 /* Debug FUNCTION_ARG macros */
148 #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
150 /* Hack macros for tuning code generation */
151 #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
152 #define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */
154 #define TARGET_386 (ix86_cpu == PROCESSOR_I386)
155 #define TARGET_486 (ix86_cpu == PROCESSOR_I486)
156 #define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
157 #define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO)
158 #define TARGET_USE_LEAVE (ix86_cpu == PROCESSOR_I386)
159 #define TARGET_PUSH_MEMORY (ix86_cpu == PROCESSOR_I386)
160 #define TARGET_ZERO_EXTEND_WITH_AND (ix86_cpu != PROCESSOR_I386 \
161 && ix86_cpu != PROCESSOR_PENTIUMPRO)
162 #define TARGET_DOUBLE_WITH_ADD (ix86_cpu != PROCESSOR_I386)
163 #define TARGET_USE_BIT_TEST (ix86_cpu == PROCESSOR_I386)
164 #define TARGET_UNROLL_STRLEN (ix86_cpu != PROCESSOR_I386)
165 #define TARGET_USE_Q_REG (ix86_cpu == PROCESSOR_PENTIUM \
166 || ix86_cpu == PROCESSOR_PENTIUMPRO)
167 #define TARGET_USE_ANY_REG (ix86_cpu == PROCESSOR_I486)
168 #define TARGET_CMOVE (ix86_arch == PROCESSOR_PENTIUMPRO)
169 #define TARGET_DEEP_BRANCH_PREDICTION (ix86_cpu == PROCESSOR_PENTIUMPRO)
170 #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
172 #define TARGET_SWITCHES \
173 { { "80387", MASK_80387 }, \
174 { "no-80387", -MASK_80387 }, \
175 { "hard-float", MASK_80387 }, \
176 { "soft-float", -MASK_80387 }, \
177 { "no-soft-float", MASK_80387 }, \
183 { "pentiumpro", 0 }, \
184 { "rtd", MASK_RTD }, \
185 { "no-rtd", -MASK_RTD }, \
186 { "align-double", MASK_ALIGN_DOUBLE }, \
187 { "no-align-double", -MASK_ALIGN_DOUBLE }, \
188 { "svr3-shlib", MASK_SVR3_SHLIB }, \
189 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
190 { "ieee-fp", MASK_IEEE_FP }, \
191 { "no-ieee-fp", -MASK_IEEE_FP }, \
192 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
193 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
194 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
195 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
196 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
197 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER }, \
198 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
199 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
200 { "schedule-prologue", MASK_SCHEDULE_PROLOGUE }, \
201 { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE }, \
202 { "debug-addr", MASK_DEBUG_ADDR }, \
203 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
204 { "move", -MASK_NO_MOVE }, \
205 { "no-move", MASK_NO_MOVE }, \
206 { "debug-arg", MASK_DEBUG_ARG }, \
207 { "no-debug-arg", -MASK_DEBUG_ARG }, \
208 { "stack-arg-probe", MASK_STACK_PROBE }, \
209 { "no-stack-arg-probe", -MASK_STACK_PROBE }, \
211 { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT}}
213 /* Which processor to schedule for. The cpu attribute defines a list that
214 mirrors this list, so changes to i386.md must be made at the same time. */
217 {PROCESSOR_I386, /* 80386 */
218 PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */
220 PROCESSOR_PENTIUMPRO};
222 #define PROCESSOR_I386_STRING "i386"
223 #define PROCESSOR_I486_STRING "i486"
224 #define PROCESSOR_I586_STRING "i586"
225 #define PROCESSOR_PENTIUM_STRING "pentium"
226 #define PROCESSOR_I686_STRING "i686"
227 #define PROCESSOR_PENTIUMPRO_STRING "pentiumpro"
229 extern enum processor_type ix86_cpu;
231 extern int ix86_arch;
233 /* Define the default processor. This is overridden by other tm.h files. */
234 #define PROCESSOR_DEFAULT \
235 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
237 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
238 ? PROCESSOR_PENTIUM \
239 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
240 ? PROCESSOR_PENTIUMPRO \
242 #define PROCESSOR_DEFAULT_STRING \
243 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
244 ? PROCESSOR_I486_STRING \
245 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
246 ? PROCESSOR_PENTIUM_STRING \
247 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
248 ? PROCESSOR_PENTIUMPRO_STRING \
249 : PROCESSOR_I386_STRING
251 /* This macro is similar to `TARGET_SWITCHES' but defines names of
252 command options that have values. Its definition is an
253 initializer with a subgrouping for each command option.
255 Each subgrouping contains a string constant, that defines the
256 fixed part of the option name, and the address of a variable. The
257 variable, type `char *', is set to the variable part of the given
258 option if the fixed part matches. The actual option name is made
259 by appending `-m' to the specified name. */
260 #define TARGET_OPTIONS \
261 { { "cpu=", &ix86_cpu_string}, \
262 { "arch=", &ix86_arch_string}, \
263 { "reg-alloc=", &i386_reg_alloc_order }, \
264 { "regparm=", &i386_regparm_string }, \
265 { "align-loops=", &i386_align_loops_string }, \
266 { "align-jumps=", &i386_align_jumps_string }, \
267 { "align-functions=", &i386_align_funcs_string }, \
268 { "branch-cost=", &i386_branch_cost_string }, \
272 /* Sometimes certain combinations of command options do not make
273 sense on a particular target machine. You can define a macro
274 `OVERRIDE_OPTIONS' to take account of this. This macro, if
275 defined, is executed once just after all the command options have
278 Don't use this macro to turn on various extra optimizations for
279 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
281 #define OVERRIDE_OPTIONS override_options ()
283 /* These are meant to be redefined in the host dependent files */
284 #define SUBTARGET_SWITCHES
285 #define SUBTARGET_OPTIONS
287 /* Define this to change the optimizations performed by default. */
288 #define OPTIMIZATION_OPTIONS(LEVEL) optimization_options(LEVEL)
290 /* Specs for the compiler proper */
295 %{m386:-mcpu=i386 -march=i386} \
296 %{mno-486:-mcpu=i386 -march=i386} \
297 %{m486:-mcpu=i486 -march=i486} \
298 %{mno-386:-mcpu=i486 -march=i486} \
299 %{mno-pentium:-mcpu=i486 -march=i486} \
300 %{mpentium:-mcpu=pentium} \
301 %{mno-pentiumpro:-mcpu=pentium} \
302 %{mpentiumpro:-mcpu=pentiumpro}}"
306 #define CPP_CPU_SPEC "\
307 -Di386 -Asystem(unix) -Acpu(i386) -Amachine(i386) \
308 %{mcpu=i486:-Di486} %{m486:-Di486} \
309 %{mpentium:-Dpentium -Di586} %{mcpu=pentium:-Dpentium -Di586} \
310 %{mpentiumpro:-Dpentiumpro -Di686} %{mcpu=pentiumpro:-Dpentiumpro -Di686}"
313 /* This macro defines names of additional specifications to put in the specs
314 that can be used in various specifications like CC1_SPEC. Its definition
315 is an initializer with a subgrouping for each command option.
317 Each subgrouping contains a string constant, that defines the
318 specification name, and a string constant that used by the GNU CC driver
321 Do not define this macro if it does not need to do anything. */
323 #ifndef SUBTARGET_EXTRA_SPECS
324 #define SUBTARGET_EXTRA_SPECS
327 #define EXTRA_SPECS \
328 { "cpp_cpu", CPP_CPU_SPEC }, \
329 SUBTARGET_EXTRA_SPECS
331 /* target machine storage layout */
333 /* Define for XFmode extended real floating point support.
334 This will automatically cause REAL_ARITHMETIC to be defined. */
335 #define LONG_DOUBLE_TYPE_SIZE 96
337 /* Define if you don't want extended real, but do want to use the
338 software floating point emulator for REAL_ARITHMETIC and
339 decimal <-> binary conversion. */
340 /* #define REAL_ARITHMETIC */
342 /* Define this if most significant byte of a word is the lowest numbered. */
343 /* That is true on the 80386. */
345 #define BITS_BIG_ENDIAN 0
347 /* Define this if most significant byte of a word is the lowest numbered. */
348 /* That is not true on the 80386. */
349 #define BYTES_BIG_ENDIAN 0
351 /* Define this if most significant word of a multiword number is the lowest
353 /* Not true for 80386 */
354 #define WORDS_BIG_ENDIAN 0
356 /* number of bits in an addressable storage unit */
357 #define BITS_PER_UNIT 8
359 /* Width in bits of a "word", which is the contents of a machine register.
360 Note that this is not necessarily the width of data type `int';
361 if using 16-bit ints on a 80386, this would still be 32.
362 But on a machine with 16-bit registers, this would be 16. */
363 #define BITS_PER_WORD 32
365 /* Width of a word, in units (bytes). */
366 #define UNITS_PER_WORD 4
368 /* Width in bits of a pointer.
369 See also the macro `Pmode' defined below. */
370 #define POINTER_SIZE 32
372 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
373 #define PARM_BOUNDARY 32
375 /* Boundary (in *bits*) on which stack pointer should be aligned. */
376 #define STACK_BOUNDARY 32
378 /* Allocation boundary (in *bits*) for the code of a function.
379 For i486, we get better performance by aligning to a cache
380 line (i.e. 16 byte) boundary. */
381 #define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
383 /* Alignment of field after `int : 0' in a structure. */
385 #define EMPTY_FIELD_BOUNDARY 32
387 /* Minimum size in bits of the largest boundary to which any
388 and all fundamental data types supported by the hardware
389 might need to be aligned. No data type wants to be aligned
390 rounder than this. The i386 supports 64-bit floating point
391 quantities, but these can be aligned on any 32-bit boundary.
392 The published ABIs say that doubles should be aligned on word
393 boundaries, but the Pentium gets better performance with them
394 aligned on 64 bit boundaries. */
395 #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
397 /* align DFmode constants and nonaggregates */
398 #define ALIGN_DFmode (!TARGET_386)
400 /* Set this non-zero if move instructions will actually fail to work
401 when given unaligned data. */
402 #define STRICT_ALIGNMENT 0
404 /* If bit field type is int, don't let it cross an int,
405 and give entire struct the alignment of an int. */
406 /* Required on the 386 since it doesn't have bitfield insns. */
407 #define PCC_BITFIELD_TYPE_MATTERS 1
409 /* Maximum power of 2 that code can be aligned to. */
410 #define MAX_CODE_ALIGN 6 /* 64 byte alignment */
412 /* Align loop starts for optimal branching. */
413 #define ASM_OUTPUT_LOOP_ALIGN(FILE) ASM_OUTPUT_ALIGN (FILE, i386_align_loops)
415 /* This is how to align an instruction for optimal branching.
416 On i486 we'll get better performance by aligning on a
417 cache line (i.e. 16 byte) boundary. */
418 #define ASM_OUTPUT_ALIGN_CODE(FILE) ASM_OUTPUT_ALIGN ((FILE), i386_align_jumps)
421 /* Standard register usage. */
423 /* This processor has special stack-like registers. See reg-stack.c
427 #define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode)
429 /* Number of actual hardware registers.
430 The hardware registers are assigned numbers for the compiler
431 from 0 to just below FIRST_PSEUDO_REGISTER.
432 All registers that the compiler knows about must be given numbers,
433 even those that are not normally considered general registers.
435 In the 80386 we give the 8 general purpose registers the numbers 0-7.
436 We number the floating point registers 8-15.
437 Note that registers 0-7 can be accessed as a short or int,
438 while only 0-3 may be used with byte `mov' instructions.
440 Reg 16 does not correspond to any hardware register, but instead
441 appears in the RTL as an argument pointer prior to reload, and is
442 eliminated during reloading in favor of either the stack or frame
445 #define FIRST_PSEUDO_REGISTER 17
447 /* 1 for registers that have pervasive standard uses
448 and are not available for the register allocator.
449 On the 80386, the stack pointer is such, as is the arg pointer. */
450 #define FIXED_REGISTERS \
451 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
452 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
454 /* 1 for registers not available across function calls.
455 These must include the FIXED_REGISTERS and also any
456 registers that can be used without being saved.
457 The latter must include the registers where values are returned
458 and the register where structure-value addresses are passed.
459 Aside from that, you can include as many other registers as you like. */
461 #define CALL_USED_REGISTERS \
462 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
463 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
465 /* Order in which to allocate registers. Each register must be
466 listed once, even those in FIXED_REGISTERS. List frame pointer
467 late and fixed registers last. Note that, in general, we prefer
468 registers listed in CALL_USED_REGISTERS, keeping the others
469 available for storage of persistent values.
471 Three different versions of REG_ALLOC_ORDER have been tried:
473 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
474 but slower code on simple functions returning values in eax.
476 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
477 perl 4.036 due to not being able to create a DImode register (to hold a 2
480 If the order is eax, edx, ecx, ... it produces better code for simple
481 functions, and a slightly slower compiler. Users complained about the code
482 generated by allocating edx first, so restore the 'natural' order of things. */
484 #define REG_ALLOC_ORDER \
485 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
486 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
488 /* A C statement (sans semicolon) to choose the order in which to
489 allocate hard registers for pseudo-registers local to a basic
492 Store the desired register order in the array `reg_alloc_order'.
493 Element 0 should be the register to allocate first; element 1, the
494 next register; and so on.
496 The macro body should not assume anything about the contents of
497 `reg_alloc_order' before execution of the macro.
499 On most machines, it is not necessary to define this macro. */
501 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
503 /* Macro to conditionally modify fixed_regs/call_used_regs. */
504 #define CONDITIONAL_REGISTER_USAGE \
508 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
509 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
511 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
515 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
516 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
517 if (TEST_HARD_REG_BIT (x, i)) \
518 fixed_regs[i] = call_used_regs[i] = 1; \
522 /* Return number of consecutive hard regs needed starting at reg REGNO
523 to hold something of mode MODE.
524 This is ordinarily the length in words of a value of mode MODE
525 but can be less for certain modes in special long registers.
527 Actually there are no two word move instructions for consecutive
528 registers. And only registers 0-3 may have mov byte instructions
532 #define HARD_REGNO_NREGS(REGNO, MODE) \
533 (FP_REGNO_P (REGNO) ? 1 \
534 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
536 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
537 On the 80386, the first 4 cpu registers can hold any mode
538 while the floating point registers may hold only floating point.
539 Make it clear that the fp regs could not hold a 16-byte float. */
541 /* The casts to int placate a compiler on a microvax,
542 for cross-compiler testing. */
544 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
547 : FP_REGNO_P (REGNO) \
548 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
549 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
550 && GET_MODE_UNIT_SIZE (MODE) <= (LONG_DOUBLE_TYPE_SIZE == 96 ? 12 : 8))\
551 : (int) (MODE) != (int) QImode ? 1 \
552 : (reload_in_progress | reload_completed) == 1)
554 /* Value is 1 if it is a good idea to tie two pseudo registers
555 when one has mode MODE1 and one has mode MODE2.
556 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
557 for any hard reg, then this must be 0 for correct output. */
559 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
561 /* Specify the registers used for certain standard purposes.
562 The values of these macros are register numbers. */
564 /* on the 386 the pc register is %eip, and is not usable as a general
565 register. The ordinary mov instructions won't work */
566 /* #define PC_REGNUM */
568 /* Register to use for pushing function arguments. */
569 #define STACK_POINTER_REGNUM 7
571 /* Base register for access to local variables of the function. */
572 #define FRAME_POINTER_REGNUM 6
574 /* First floating point reg */
575 #define FIRST_FLOAT_REG 8
577 /* First & last stack-like regs */
578 #define FIRST_STACK_REG FIRST_FLOAT_REG
579 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
581 /* Value should be nonzero if functions must have frame pointers.
582 Zero means the frame pointer need not be set up (and parms
583 may be accessed via the stack pointer) in functions that seem suitable.
584 This is computed in `reload', in reload1.c. */
585 #define FRAME_POINTER_REQUIRED (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ())
587 /* Base register for access to arguments of the function. */
588 #define ARG_POINTER_REGNUM 16
590 /* Register in which static-chain is passed to a function. */
591 #define STATIC_CHAIN_REGNUM 2
593 /* Register to hold the addressing base for position independent
594 code access to data items. */
595 #define PIC_OFFSET_TABLE_REGNUM 3
597 /* Register in which address to store a structure value
598 arrives in the function. On the 386, the prologue
599 copies this from the stack to register %eax. */
600 #define STRUCT_VALUE_INCOMING 0
602 /* Place in which caller passes the structure value address.
603 0 means push the value on the stack like an argument. */
604 #define STRUCT_VALUE 0
606 /* A C expression which can inhibit the returning of certain function
607 values in registers, based on the type of value. A nonzero value
608 says to return the function value in memory, just as large
609 structures are always returned. Here TYPE will be a C expression
610 of type `tree', representing the data type of the value.
612 Note that values of mode `BLKmode' must be explicitly handled by
613 this macro. Also, the option `-fpcc-struct-return' takes effect
614 regardless of this macro. On most systems, it is possible to
615 leave the macro undefined; this causes a default definition to be
616 used, whose value is the constant 1 for `BLKmode' values, and 0
619 Do not use this macro to indicate that structures and unions
620 should always be returned in memory. You should instead use
621 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
623 #define RETURN_IN_MEMORY(TYPE) \
624 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
627 /* Define the classes of registers for register constraints in the
628 machine description. Also define ranges of constants.
630 One of the classes must always be named ALL_REGS and include all hard regs.
631 If there is more than one class, another class must be named NO_REGS
632 and contain no registers.
634 The name GENERAL_REGS must be the name of a class (or an alias for
635 another name such as ALL_REGS). This is the class of registers
636 that is allowed by "g" or "r" in a register constraint.
637 Also, registers outside this class are allocated only when
638 instructions express preferences for them.
640 The classes must be numbered in nondecreasing order; that is,
641 a larger-numbered class must never be contained completely
642 in a smaller-numbered class.
644 For any two classes, it is very desirable that there be another
645 class that represents their union.
647 It might seem that class BREG is unnecessary, since no useful 386
648 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
649 and the "b" register constraint is useful in asms for syscalls. */
654 AREG, DREG, CREG, BREG,
655 AD_REGS, /* %eax/%edx for DImode */
656 Q_REGS, /* %eax %ebx %ecx %edx */
658 INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
659 GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
660 FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
662 ALL_REGS, LIM_REG_CLASSES
665 #define N_REG_CLASSES (int) LIM_REG_CLASSES
667 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
669 /* Give names of register classes as strings for dump file. */
671 #define REG_CLASS_NAMES \
673 "AREG", "DREG", "CREG", "BREG", \
679 "FP_TOP_REG", "FP_SECOND_REG", \
683 /* Define which registers fit in which classes.
684 This is an initializer for a vector of HARD_REG_SET
685 of length N_REG_CLASSES. */
687 #define REG_CLASS_CONTENTS \
689 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
692 0x10, 0x20, /* SIREG, DIREG */ \
693 0x7f, /* INDEX_REGS */ \
694 0x100ff, /* GENERAL_REGS */ \
695 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
696 0xff00, /* FLOAT_REGS */ \
699 /* The same information, inverted:
700 Return the class number of the smallest class containing
701 reg number REGNO. This could be a conditional expression
702 or could index an array. */
704 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
706 /* When defined, the compiler allows registers explicitly used in the
707 rtl to be used as spill registers but prevents the compiler from
708 extending the lifetime of these registers. */
710 #define SMALL_REGISTER_CLASSES 1
712 #define QI_REG_P(X) \
713 (REG_P (X) && REGNO (X) < 4)
714 #define NON_QI_REG_P(X) \
715 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
717 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
718 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
720 #define STACK_REG_P(xop) (REG_P (xop) && \
721 REGNO (xop) >= FIRST_STACK_REG && \
722 REGNO (xop) <= LAST_STACK_REG)
724 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
726 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
728 /* Try to maintain the accuracy of the death notes for regs satisfying the
729 following. Important for stack like regs, to know when to pop. */
731 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
733 /* 1 if register REGNO can magically overlap other regs.
734 Note that nonzero values work only in very special circumstances. */
736 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
738 /* The class value for index registers, and the one for base regs. */
740 #define INDEX_REG_CLASS INDEX_REGS
741 #define BASE_REG_CLASS GENERAL_REGS
743 /* Get reg_class from a letter such as appears in the machine description. */
745 #define REG_CLASS_FROM_LETTER(C) \
746 ((C) == 'r' ? GENERAL_REGS : \
747 (C) == 'q' ? Q_REGS : \
748 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
751 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
754 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
757 (C) == 'a' ? AREG : \
758 (C) == 'b' ? BREG : \
759 (C) == 'c' ? CREG : \
760 (C) == 'd' ? DREG : \
761 (C) == 'A' ? AD_REGS : \
762 (C) == 'D' ? DIREG : \
763 (C) == 'S' ? SIREG : NO_REGS)
765 /* The letters I, J, K, L and M in a register constraint string
766 can be used to stand for particular ranges of immediate operands.
767 This macro defines what the ranges are.
768 C is the letter, and VALUE is a constant value.
769 Return 1 if VALUE is in the range specified by C.
771 I is for non-DImode shifts.
772 J is for DImode shifts.
773 K and L are for an `andsi' optimization.
774 M is for shifts that can be executed by the "lea" opcode.
777 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
778 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
779 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
780 (C) == 'K' ? (VALUE) == 0xff : \
781 (C) == 'L' ? (VALUE) == 0xffff : \
782 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
783 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
784 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \
787 /* Similar, but for floating constants, and defining letters G and H.
788 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
789 TARGET_387 isn't set, because the stack register converter may need to
790 load 0.0 into the function value register. */
792 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
793 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
795 /* Place additional restrictions on the register class to use when it
796 is necessary to be able to hold a value of mode MODE in a reload
797 register for which class CLASS would ordinarily be used. */
799 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
800 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
803 /* Given an rtx X being reloaded into a reg required to be
804 in class CLASS, return the class of reg to actually use.
805 In general this is just CLASS; but on some machines
806 in some cases it is preferable to use a more restrictive class.
807 On the 80386 series, we prevent floating constants from being
808 reloaded into floating registers (since no move-insn can do that)
809 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
811 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
812 QImode must go into class Q_REGS.
813 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
814 movdf to do mem-to-mem moves through integer regs. */
816 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
817 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
818 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
819 : ((CLASS) == ALL_REGS \
820 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
823 /* If we are copying between general and FP registers, we need a memory
826 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
827 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
828 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
830 /* Return the maximum number of consecutive registers
831 needed to represent mode MODE in a register of class CLASS. */
832 /* On the 80386, this is the size of MODE in words,
833 except in the FP regs, where a single reg is always enough. */
834 #define CLASS_MAX_NREGS(CLASS, MODE) \
835 (FLOAT_CLASS_P (CLASS) ? 1 : \
836 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
838 /* A C expression whose value is nonzero if pseudos that have been
839 assigned to registers of class CLASS would likely be spilled
840 because registers of CLASS are needed for spill registers.
842 The default value of this macro returns 1 if CLASS has exactly one
843 register and zero otherwise. On most machines, this default
844 should be used. Only define this macro to some other expression
845 if pseudo allocated by `local-alloc.c' end up in memory because
846 their hard registers were needed for spill registers. If this
847 macro returns nonzero for those classes, those pseudos will only
848 be allocated by `global.c', which knows how to reallocate the
849 pseudo to another register. If there would not be another
850 register available for reallocation, you should not change the
851 definition of this macro since the only effect of such a
852 definition would be to slow down register allocation. */
854 #define CLASS_LIKELY_SPILLED_P(CLASS) \
856 || ((CLASS) == DREG) \
857 || ((CLASS) == CREG) \
858 || ((CLASS) == BREG) \
859 || ((CLASS) == AD_REGS) \
860 || ((CLASS) == SIREG) \
861 || ((CLASS) == DIREG))
864 /* Stack layout; function entry, exit and calling. */
866 /* Define this if pushing a word on the stack
867 makes the stack pointer a smaller address. */
868 #define STACK_GROWS_DOWNWARD
870 /* Define this if the nominal address of the stack frame
871 is at the high-address end of the local variables;
872 that is, each additional local variable allocated
873 goes at a more negative offset in the frame. */
874 #define FRAME_GROWS_DOWNWARD
876 /* Offset within stack frame to start allocating local variables at.
877 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
878 first local allocated. Otherwise, it is the offset to the BEGINNING
879 of the first local allocated. */
880 #define STARTING_FRAME_OFFSET 0
882 /* If we generate an insn to push BYTES bytes,
883 this says how many the stack pointer really advances by.
884 On 386 pushw decrements by exactly 2 no matter what the position was.
885 On the 386 there is no pushb; we use pushw instead, and this
886 has the effect of rounding up to 2. */
888 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
890 /* Offset of first parameter from the argument pointer register value. */
891 #define FIRST_PARM_OFFSET(FNDECL) 0
893 /* Value is the number of bytes of arguments automatically
894 popped when returning from a subroutine call.
895 FUNDECL is the declaration node of the function (as a tree),
896 FUNTYPE is the data type of the function (as a tree),
897 or for a library call it is an identifier node for the subroutine name.
898 SIZE is the number of bytes of arguments passed on the stack.
900 On the 80386, the RTD insn may be used to pop them if the number
901 of args is fixed, but if the number is variable then the caller
902 must pop them all. RTD can't be used for library calls now
903 because the library is compiled with the Unix compiler.
904 Use of RTD is a selectable option, since it is incompatible with
905 standard Unix calling sequences. If the option is not selected,
906 the caller must always pop the args.
908 The attribute stdcall is equivalent to RTD on a per module basis. */
910 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
911 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
913 /* Define how to find the value returned by a function.
914 VALTYPE is the data type of the value (as a tree).
915 If the precise function being called is known, FUNC is its FUNCTION_DECL;
916 otherwise, FUNC is 0. */
917 #define FUNCTION_VALUE(VALTYPE, FUNC) \
918 gen_rtx (REG, TYPE_MODE (VALTYPE), \
919 VALUE_REGNO (TYPE_MODE (VALTYPE)))
921 /* Define how to find the value returned by a library function
922 assuming the value has mode MODE. */
924 #define LIBCALL_VALUE(MODE) \
925 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
927 /* Define the size of the result block used for communication between
928 untyped_call and untyped_return. The block contains a DImode value
929 followed by the block used by fnsave and frstor. */
931 #define APPLY_RESULT_SIZE (8+108)
933 /* 1 if N is a possible register number for function argument passing. */
934 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
936 /* Define a data type for recording info about an argument list
937 during the scan of that argument list. This data type should
938 hold all necessary information about the function itself
939 and about the args processed so far, enough to enable macros
940 such as FUNCTION_ARG to determine where the next arg should go. */
942 typedef struct i386_args {
943 int words; /* # words passed so far */
944 int nregs; /* # registers available for passing */
945 int regno; /* next available register number */
948 /* Initialize a variable CUM of type CUMULATIVE_ARGS
949 for a call to a function whose data type is FNTYPE.
950 For a library call, FNTYPE is 0. */
952 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
953 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
955 /* Update the data in CUM to advance over an argument
956 of mode MODE and data type TYPE.
957 (TYPE is null for libcalls where that information may not be available.) */
959 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
960 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
962 /* Define where to put the arguments to a function.
963 Value is zero to push the argument on the stack,
964 or a hard register in which to store the argument.
966 MODE is the argument's machine mode.
967 TYPE is the data type of the argument (as a tree).
968 This is null for libcalls where that information may
970 CUM is a variable of type CUMULATIVE_ARGS which gives info about
971 the preceding args and about the function being called.
972 NAMED is nonzero if this argument is a named parameter
973 (otherwise it is an extra parameter matching an ellipsis). */
975 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
976 (function_arg (&CUM, MODE, TYPE, NAMED))
978 /* For an arg passed partly in registers and partly in memory,
979 this is the number of registers used.
980 For args passed entirely in registers or entirely in memory, zero. */
982 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
983 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
985 /* This macro is invoked just before the start of a function.
986 It is used here to output code for -fpic that will load the
987 return address into %ebx. */
989 #undef ASM_OUTPUT_FUNCTION_PREFIX
990 #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME) \
991 asm_output_function_prefix (FILE, FNNAME)
993 /* This macro generates the assembly code for function entry.
994 FILE is a stdio stream to output the code to.
995 SIZE is an int: how many units of temporary storage to allocate.
996 Refer to the array `regs_ever_live' to determine which registers
997 to save; `regs_ever_live[I]' is nonzero if register number I
998 is ever used in the function. This macro is responsible for
999 knowing which registers should not be saved even if used. */
1001 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1002 function_prologue (FILE, SIZE)
1004 /* Output assembler code to FILE to increment profiler label # LABELNO
1005 for profiling a function entry. */
1007 #define FUNCTION_PROFILER(FILE, LABELNO) \
1011 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
1012 LPREFIX, (LABELNO)); \
1013 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
1017 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
1018 fprintf (FILE, "\tcall _mcount\n"); \
1023 /* There are three profiling modes for basic blocks available.
1024 The modes are selected at compile time by using the options
1025 -a or -ax of the gnu compiler.
1026 The variable `profile_block_flag' will be set according to the
1029 profile_block_flag == 0, no option used:
1033 profile_block_flag == 1, -a option used.
1035 Count frequency of execution of every basic block.
1037 profile_block_flag == 2, -ax option used.
1039 Generate code to allow several different profiling modes at run time.
1040 Available modes are:
1041 Produce a trace of all basic blocks.
1042 Count frequency of jump instructions executed.
1043 In every mode it is possible to start profiling upon entering
1044 certain functions and to disable profiling of some other functions.
1046 The result of basic-block profiling will be written to a file `bb.out'.
1047 If the -ax option is used parameters for the profiling will be read
1052 /* The following macro shall output assembler code to FILE
1053 to initialize basic-block profiling.
1055 If profile_block_flag == 2
1057 Output code to call the subroutine `__bb_init_trace_func'
1058 and pass two parameters to it. The first parameter is
1059 the address of a block allocated in the object module.
1060 The second parameter is the number of the first basic block
1063 The name of the block is a local symbol made with this statement:
1065 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1067 Of course, since you are writing the definition of
1068 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1069 can take a short cut in the definition of this macro and use the
1070 name that you know will result.
1072 The number of the first basic block of the function is
1073 passed to the macro in BLOCK_OR_LABEL.
1075 If described in a virtual assembler language the code to be
1079 parameter2 <- BLOCK_OR_LABEL
1080 call __bb_init_trace_func
1082 else if profile_block_flag != 0
1084 Output code to call the subroutine `__bb_init_func'
1085 and pass one single parameter to it, which is the same
1086 as the first parameter to `__bb_init_trace_func'.
1088 The first word of this parameter is a flag which will be nonzero if
1089 the object module has already been initialized. So test this word
1090 first, and do not call `__bb_init_func' if the flag is nonzero.
1091 Note: When profile_block_flag == 2 the test need not be done
1092 but `__bb_init_trace_func' *must* be called.
1094 BLOCK_OR_LABEL may be used to generate a label number as a
1095 branch destination in case `__bb_init_func' will not be called.
1097 If described in a virtual assembler language the code to be
1108 #undef FUNCTION_BLOCK_PROFILER
1109 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
1112 static int num_func = 0; \
1114 char block_table[80], false_label[80]; \
1116 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1118 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
1119 xops[5] = stack_pointer_rtx; \
1120 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
1122 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1124 switch (profile_block_flag) \
1129 xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \
1130 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_trace_func")); \
1131 xops[6] = GEN_INT (8); \
1133 output_asm_insn (AS1(push%L2,%2), xops); \
1135 output_asm_insn (AS1(push%L1,%1), xops); \
1138 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1139 output_asm_insn (AS1 (push%L7,%7), xops); \
1142 output_asm_insn (AS1(call,%P3), xops); \
1143 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1149 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
1151 xops[0] = const0_rtx; \
1152 xops[2] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, false_label)); \
1153 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_func")); \
1154 xops[4] = gen_rtx (MEM, Pmode, xops[1]); \
1155 xops[6] = GEN_INT (4); \
1157 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
1159 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
1160 output_asm_insn (AS1(jne,%2), xops); \
1163 output_asm_insn (AS1(push%L1,%1), xops); \
1166 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1167 output_asm_insn (AS1 (push%L7,%7), xops); \
1170 output_asm_insn (AS1(call,%P3), xops); \
1171 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1172 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LPBZ", num_func); \
1181 /* The following macro shall output assembler code to FILE
1182 to increment a counter associated with basic block number BLOCKNO.
1184 If profile_block_flag == 2
1186 Output code to initialize the global structure `__bb' and
1187 call the function `__bb_trace_func' which will increment the
1190 `__bb' consists of two words. In the first word the number
1191 of the basic block has to be stored. In the second word
1192 the address of a block allocated in the object module
1195 The basic block number is given by BLOCKNO.
1197 The address of the block is given by the label created with
1199 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1201 by FUNCTION_BLOCK_PROFILER.
1203 Of course, since you are writing the definition of
1204 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1205 can take a short cut in the definition of this macro and use the
1206 name that you know will result.
1208 If described in a virtual assembler language the code to be
1211 move BLOCKNO -> (__bb)
1212 move LPBX0 -> (__bb+4)
1213 call __bb_trace_func
1215 Note that function `__bb_trace_func' must not change the
1216 machine state, especially the flag register. To grant
1217 this, you must output code to save and restore registers
1218 either in this macro or in the macros MACHINE_STATE_SAVE
1219 and MACHINE_STATE_RESTORE. The last two macros will be
1220 used in the function `__bb_trace_func', so you must make
1221 sure that the function prologue does not change any
1222 register prior to saving it with MACHINE_STATE_SAVE.
1224 else if profile_block_flag != 0
1226 Output code to increment the counter directly.
1227 Basic blocks are numbered separately from zero within each
1228 compiled object module. The count associated with block number
1229 BLOCKNO is at index BLOCKNO in an array of words; the name of
1230 this array is a local symbol made with this statement:
1232 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1234 Of course, since you are writing the definition of
1235 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1236 can take a short cut in the definition of this macro and use the
1237 name that you know will result.
1239 If described in a virtual assembler language the code to be
1242 inc (LPBX2+4*BLOCKNO)
1246 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1249 rtx xops[8], cnt_rtx; \
1251 char *block_table = counts; \
1253 switch (profile_block_flag) \
1258 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1260 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
1261 xops[2] = GEN_INT ((BLOCKNO)); \
1262 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_func")); \
1263 xops[4] = gen_rtx (SYMBOL_REF, VOIDmode, "__bb"); \
1264 xops[5] = plus_constant (xops[4], 4); \
1265 xops[0] = gen_rtx (MEM, SImode, xops[4]); \
1266 xops[6] = gen_rtx (MEM, SImode, xops[5]); \
1268 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1270 fprintf(FILE, "\tpushf\n"); \
1271 output_asm_insn (AS2(mov%L0,%2,%0), xops); \
1274 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
1275 output_asm_insn (AS1(push%L7,%7), xops); \
1276 output_asm_insn (AS2(lea%L7,%a1,%7), xops); \
1277 output_asm_insn (AS2(mov%L6,%7,%6), xops); \
1278 output_asm_insn (AS1(pop%L7,%7), xops); \
1281 output_asm_insn (AS2(mov%L6,%1,%6), xops); \
1282 output_asm_insn (AS1(call,%P3), xops); \
1283 fprintf(FILE, "\tpopf\n"); \
1289 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
1290 cnt_rtx = gen_rtx (SYMBOL_REF, VOIDmode, counts); \
1291 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
1294 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
1297 cnt_rtx = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, cnt_rtx); \
1299 xops[0] = gen_rtx (MEM, SImode, cnt_rtx); \
1300 output_asm_insn (AS1(inc%L0,%0), xops); \
1308 /* The following macro shall output assembler code to FILE
1309 to indicate a return from function during basic-block profiling.
1311 If profiling_block_flag == 2:
1313 Output assembler code to call function `__bb_trace_ret'.
1315 Note that function `__bb_trace_ret' must not change the
1316 machine state, especially the flag register. To grant
1317 this, you must output code to save and restore registers
1318 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1319 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1320 used in the function `__bb_trace_ret', so you must make
1321 sure that the function prologue does not change any
1322 register prior to saving it with MACHINE_STATE_SAVE_RET.
1324 else if profiling_block_flag != 0:
1326 The macro will not be used, so it need not distinguish
1330 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1335 xops[0] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_ret")); \
1337 output_asm_insn (AS1(call,%P0), xops); \
1342 /* The function `__bb_trace_func' is called in every basic block
1343 and is not allowed to change the machine state. Saving (restoring)
1344 the state can either be done in the BLOCK_PROFILER macro,
1345 before calling function (rsp. after returning from function)
1346 `__bb_trace_func', or it can be done inside the function by
1347 defining the macros:
1349 MACHINE_STATE_SAVE(ID)
1350 MACHINE_STATE_RESTORE(ID)
1352 In the latter case care must be taken, that the prologue code
1353 of function `__bb_trace_func' does not already change the
1354 state prior to saving it with MACHINE_STATE_SAVE.
1356 The parameter `ID' is a string identifying a unique macro use.
1358 On the i386 the initialization code at the begin of
1359 function `__bb_trace_func' contains a `sub' instruction
1360 therefore we handle save and restore of the flag register
1361 in the BLOCK_PROFILER macro. */
1363 #define MACHINE_STATE_SAVE(ID) \
1364 asm (" pushl %eax"); \
1365 asm (" pushl %ecx"); \
1366 asm (" pushl %edx"); \
1367 asm (" pushl %esi");
1369 #define MACHINE_STATE_RESTORE(ID) \
1370 asm (" popl %esi"); \
1371 asm (" popl %edx"); \
1372 asm (" popl %ecx"); \
1375 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1376 the stack pointer does not matter. The value is tested only in
1377 functions that have frame pointers.
1378 No definition is equivalent to always zero. */
1379 /* Note on the 386 it might be more efficient not to define this since
1380 we have to restore it ourselves from the frame pointer, in order to
1383 #define EXIT_IGNORE_STACK 1
1385 /* This macro generates the assembly code for function exit,
1386 on machines that need it. If FUNCTION_EPILOGUE is not defined
1387 then individual return instructions are generated for each
1388 return statement. Args are same as for FUNCTION_PROLOGUE.
1390 The function epilogue should not depend on the current stack pointer!
1391 It should use the frame pointer only. This is mandatory because
1392 of alloca; we also take advantage of it to omit stack adjustments
1395 If the last non-note insn in the function is a BARRIER, then there
1396 is no need to emit a function prologue, because control does not fall
1397 off the end. This happens if the function ends in an "exit" call, or
1398 if a `return' insn is emitted directly into the function. */
1401 #define FUNCTION_BEGIN_EPILOGUE(FILE) \
1403 rtx last = get_last_insn (); \
1404 if (last && GET_CODE (last) == NOTE) \
1405 last = prev_nonnote_insn (last); \
1406 /* if (! last || GET_CODE (last) != BARRIER) \
1407 function_epilogue (FILE, SIZE);*/ \
1411 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1412 function_epilogue (FILE, SIZE)
1414 /* Output assembler code for a block containing the constant parts
1415 of a trampoline, leaving space for the variable parts. */
1417 /* On the 386, the trampoline contains three instructions:
1421 #define TRAMPOLINE_TEMPLATE(FILE) \
1423 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
1424 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1425 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1426 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
1427 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1428 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1429 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
1430 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
1433 /* Length in units of the trampoline for entering a nested function. */
1435 #define TRAMPOLINE_SIZE 12
1437 /* Emit RTL insns to initialize the variable parts of a trampoline.
1438 FNADDR is an RTX for the address of the function's pure code.
1439 CXT is an RTX for the static chain value for the function. */
1441 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1443 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
1444 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
1447 /* Definitions for register eliminations.
1449 This is an array of structures. Each structure initializes one pair
1450 of eliminable registers. The "from" register number is given first,
1451 followed by "to". Eliminations of the same "from" register are listed
1452 in order of preference.
1454 We have two registers that can be eliminated on the i386. First, the
1455 frame pointer register can often be eliminated in favor of the stack
1456 pointer register. Secondly, the argument pointer register can always be
1457 eliminated; it is replaced with either the stack or frame pointer. */
1459 #define ELIMINABLE_REGS \
1460 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1461 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1462 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1464 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1465 Frame pointer elimination is automatically handled.
1467 For the i386, if frame pointer elimination is being done, we would like to
1468 convert ap into sp, not fp.
1470 All other eliminations are valid. */
1472 #define CAN_ELIMINATE(FROM, TO) \
1473 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1474 ? ! frame_pointer_needed \
1477 /* Define the offset between two registers, one to be eliminated, and the other
1478 its replacement, at the start of a routine. */
1480 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1482 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1483 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1489 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1490 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
1491 || (current_function_uses_pic_offset_table \
1492 && regno == PIC_OFFSET_TABLE_REGNUM)) \
1495 (OFFSET) = offset + get_frame_size (); \
1497 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1498 (OFFSET) += 4; /* Skip saved PC */ \
1502 /* Addressing modes, and classification of registers for them. */
1504 /* #define HAVE_POST_INCREMENT */
1505 /* #define HAVE_POST_DECREMENT */
1507 /* #define HAVE_PRE_DECREMENT */
1508 /* #define HAVE_PRE_INCREMENT */
1510 /* Macros to check register numbers against specific register classes. */
1512 /* These assume that REGNO is a hard or pseudo reg number.
1513 They give nonzero only if REGNO is a hard reg of the suitable class
1514 or a pseudo reg currently allocated to a suitable hard reg.
1515 Since they use reg_renumber, they are safe only once reg_renumber
1516 has been allocated, which happens in local-alloc.c. */
1518 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1519 ((REGNO) < STACK_POINTER_REGNUM \
1520 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1522 #define REGNO_OK_FOR_BASE_P(REGNO) \
1523 ((REGNO) <= STACK_POINTER_REGNUM \
1524 || (REGNO) == ARG_POINTER_REGNUM \
1525 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1527 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1528 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1530 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1531 and check its validity for a certain class.
1532 We have two alternate definitions for each of them.
1533 The usual definition accepts all pseudo regs; the other rejects
1534 them unless they have been allocated suitable hard regs.
1535 The symbol REG_OK_STRICT causes the latter definition to be used.
1537 Most source files want to accept pseudo regs in the hope that
1538 they will get allocated to the class that the insn wants them to be in.
1539 Source files for reload pass need to be strict.
1540 After reload, it makes no difference, since pseudo regs have
1541 been eliminated by then. */
1544 /* Non strict versions, pseudos are ok */
1545 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1546 (REGNO (X) < STACK_POINTER_REGNUM \
1547 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1549 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1550 (REGNO (X) <= STACK_POINTER_REGNUM \
1551 || REGNO (X) == ARG_POINTER_REGNUM \
1552 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1554 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1555 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1557 /* Strict versions, hard registers only */
1558 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1559 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1560 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1561 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1563 #ifndef REG_OK_STRICT
1564 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1565 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1566 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1569 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1570 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1571 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1574 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1575 that is a valid memory address for an instruction.
1576 The MODE argument is the machine mode for the MEM expression
1577 that wants to use this address.
1579 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1580 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1582 See legitimize_pic_address in i386.c for details as to what
1583 constitutes a legitimate address when -fpic is used. */
1585 #define MAX_REGS_PER_ADDRESS 2
1587 #define CONSTANT_ADDRESS_P(X) \
1588 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1589 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1590 || GET_CODE (X) == HIGH)
1592 /* Nonzero if the constant value X is a legitimate general operand.
1593 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1595 #define LEGITIMATE_CONSTANT_P(X) 1
1597 #ifdef REG_OK_STRICT
1598 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1600 if (legitimate_address_p (MODE, X, 1)) \
1605 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1607 if (legitimate_address_p (MODE, X, 0)) \
1613 /* Try machine-dependent ways of modifying an illegitimate address
1614 to be legitimate. If we find one, return the new, valid address.
1615 This macro is used in only one place: `memory_address' in explow.c.
1617 OLDX is the address as it was before break_out_memory_refs was called.
1618 In some cases it is useful to look at this to decide what needs to be done.
1620 MODE and WIN are passed so that this macro can use
1621 GO_IF_LEGITIMATE_ADDRESS.
1623 It is always safe for this macro to do nothing. It exists to recognize
1624 opportunities to optimize the output.
1626 For the 80386, we handle X+REG by loading X into a register R and
1627 using R+REG. R will go in a general reg and indexing will be used.
1628 However, if REG is a broken-out memory address or multiplication,
1629 nothing needs to be done because REG can certainly go in a general reg.
1631 When -fpic is used, special handling is needed for symbolic references.
1632 See comments by legitimize_pic_address in i386.c for details. */
1634 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1637 (X) = legitimize_address (X, OLDX, MODE); \
1638 if (memory_address_p (MODE, X)) \
1642 #define REWRITE_ADDRESS(x) rewrite_address(x)
1644 /* Nonzero if the constant value X is a legitimate general operand
1645 when generating PIC code. It is given that flag_pic is on and
1646 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1648 #define LEGITIMATE_PIC_OPERAND_P(X) \
1649 (! SYMBOLIC_CONST (X) \
1650 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1652 #define SYMBOLIC_CONST(X) \
1653 (GET_CODE (X) == SYMBOL_REF \
1654 || GET_CODE (X) == LABEL_REF \
1655 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1657 /* Go to LABEL if ADDR (a legitimate address expression)
1658 has an effect that depends on the machine mode it is used for.
1659 On the 80386, only postdecrement and postincrement address depend thus
1660 (the amount of decrement or increment being the length of the operand). */
1661 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1662 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1664 /* Define this macro if references to a symbol must be treated
1665 differently depending on something about the variable or
1666 function named by the symbol (such as what section it is in).
1668 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1669 so that we may access it directly in the GOT. */
1671 #define ENCODE_SECTION_INFO(DECL) \
1676 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1677 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1679 if (TARGET_DEBUG_ADDR \
1680 && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \
1682 fprintf (stderr, "Encode %s, public = %s\n", \
1683 IDENTIFIER_POINTER (DECL_NAME (DECL)), \
1684 TREE_PUBLIC (DECL)); \
1687 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1688 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1689 || ! TREE_PUBLIC (DECL)); \
1694 /* Initialize data used by insn expanders. This is called from
1695 init_emit, once for each function, before code is generated.
1696 For 386, clear stack slot assignments remembered from previous
1699 #define INIT_EXPANDERS clear_386_stack_locals ()
1701 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1702 codes once the function is being compiled into assembly code, but
1703 not before. (It is not done before, because in the case of
1704 compiling an inline function, it would lead to multiple PIC
1705 prologues being included in functions which used inline functions
1706 and were compiled to assembly language.) */
1708 #define FINALIZE_PIC \
1711 extern int current_function_uses_pic_offset_table; \
1713 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1718 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1719 with arguments ARGS is a valid machine specific attribute for DECL.
1720 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1722 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1723 (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1725 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1726 with arguments ARGS is a valid machine specific attribute for TYPE.
1727 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1729 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1730 (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1732 /* If defined, a C expression whose value is zero if the attributes on
1733 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1734 two if they are nearly compatible (which causes a warning to be
1737 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1738 (i386_comp_type_attributes (TYPE1, TYPE2))
1740 /* If defined, a C statement that assigns default attributes to newly
1743 /* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1745 /* Max number of args passed in registers. If this is more than 3, we will
1746 have problems with ebx (register #4), since it is a caller save register and
1747 is also used as the pic register in ELF. So for now, don't allow more than
1748 3 registers to be passed in registers. */
1750 #define REGPARM_MAX 3
1753 /* Specify the machine mode that this machine uses
1754 for the index in the tablejump instruction. */
1755 #define CASE_VECTOR_MODE Pmode
1757 /* Define this if the tablejump instruction expects the table
1758 to contain offsets from the address of the table.
1759 Do not define this if the table should contain absolute addresses. */
1760 /* #define CASE_VECTOR_PC_RELATIVE */
1762 /* Specify the tree operation to be used to convert reals to integers.
1763 This should be changed to take advantage of fist --wfs ??
1765 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1767 /* This is the kind of divide that is easiest to do in the general case. */
1768 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1770 /* Define this as 1 if `char' should by default be signed; else as 0. */
1771 #define DEFAULT_SIGNED_CHAR 1
1773 /* Max number of bytes we can move from memory to memory
1774 in one reasonably fast instruction. */
1777 /* The number of scalar move insns which should be generated instead
1778 of a string move insn or a library call. Increasing the value
1779 will always make code faster, but eventually incurs high cost in
1780 increased code size.
1782 If you don't define this, a reasonable default is used.
1784 Make this large on i386, since the block move is very inefficient with small
1785 blocks, and the hard register needs of the block move require much reload
1788 #define MOVE_RATIO 5
1790 /* Define if shifts truncate the shift count
1791 which implies one can omit a sign-extension or zero-extension
1792 of a shift count. */
1793 /* On i386, shifts do truncate the count. But bit opcodes don't. */
1795 /* #define SHIFT_COUNT_TRUNCATED */
1797 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1798 is done just by pretending it is already truncated. */
1799 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1801 /* We assume that the store-condition-codes instructions store 0 for false
1802 and some other value for true. This is the value stored for true. */
1804 #define STORE_FLAG_VALUE 1
1806 /* When a prototype says `char' or `short', really pass an `int'.
1807 (The 386 can't easily push less than an int.) */
1809 #define PROMOTE_PROTOTYPES
1811 /* Specify the machine mode that pointers have.
1812 After generation of rtl, the compiler makes no further distinction
1813 between pointers and any other objects of this machine mode. */
1814 #define Pmode SImode
1816 /* A function address in a call instruction
1817 is a byte address (for indexing purposes)
1818 so give the MEM rtx a byte's mode. */
1819 #define FUNCTION_MODE QImode
1821 /* A part of a C `switch' statement that describes the relative costs
1822 of constant RTL expressions. It must contain `case' labels for
1823 expression codes `const_int', `const', `symbol_ref', `label_ref'
1824 and `const_double'. Each case must ultimately reach a `return'
1825 statement to return the relative cost of the use of that kind of
1826 constant value in an expression. The cost may depend on the
1827 precise value of the constant, which is available for examination
1828 in X, and the rtx code of the expression in which it is contained,
1829 found in OUTER_CODE.
1831 CODE is the expression code--redundant, since it can be obtained
1832 with `GET_CODE (X)'. */
1834 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1839 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 1; \
1841 case CONST_DOUBLE: \
1844 if (GET_MODE (RTX) == VOIDmode) \
1847 code = standard_80387_constant_p (RTX); \
1848 return code == 1 ? 0 : \
1853 /* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */
1854 #define TOPLEVEL_COSTS_N_INSNS(N) {total = COSTS_N_INSNS (N); break;}
1856 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1857 This can be used, for example, to indicate how costly a multiply
1858 instruction is. In writing this macro, you can use the construct
1859 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1860 instructions. OUTER_CODE is the code of the expression in which X
1863 This macro is optional; do not define it if the default cost
1864 assumptions are adequate for the target machine. */
1866 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1868 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1869 && GET_MODE (XEXP (X, 0)) == SImode) \
1871 HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1874 return COSTS_N_INSNS (ix86_cost->add) \
1875 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1877 if (value == 2 || value == 3) \
1878 return COSTS_N_INSNS (ix86_cost->lea) \
1879 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1881 /* fall through */ \
1887 if (GET_MODE (XEXP (X, 0)) == DImode) \
1889 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1890 if (INTVAL (XEXP (X, 1)) > 32) \
1891 return COSTS_N_INSNS(ix86_cost->shift_const + 2); \
1893 return COSTS_N_INSNS(ix86_cost->shift_const * 2); \
1894 return ((GET_CODE (XEXP (X, 1)) == AND \
1895 ? COSTS_N_INSNS(ix86_cost->shift_var * 2) \
1896 : COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2)) \
1897 + rtx_cost(XEXP (X, 0), OUTER_CODE)); \
1899 return COSTS_N_INSNS (GET_CODE (XEXP (X, 1)) == CONST_INT \
1900 ? ix86_cost->shift_const \
1901 : ix86_cost->shift_var) \
1902 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1905 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1907 unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1911 return COSTS_N_INSNS (ix86_cost->add) \
1912 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1913 if (value == 4 || value == 8) \
1914 return COSTS_N_INSNS (ix86_cost->lea) \
1915 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1917 while (value != 0) \
1924 return COSTS_N_INSNS (ix86_cost->shift_const) \
1925 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1927 return COSTS_N_INSNS (ix86_cost->mult_init \
1928 + nbits * ix86_cost->mult_bit) \
1929 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1932 else /* This is arbitrary */ \
1933 TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \
1934 + 7 * ix86_cost->mult_bit); \
1940 TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \
1943 if (GET_CODE (XEXP (X, 0)) == REG \
1944 && GET_MODE (XEXP (X, 0)) == SImode \
1945 && GET_CODE (XEXP (X, 1)) == PLUS) \
1946 return COSTS_N_INSNS (ix86_cost->lea); \
1948 /* fall through */ \
1953 if (GET_MODE (X) == DImode) \
1954 return COSTS_N_INSNS (ix86_cost->add) * 2 \
1955 + (rtx_cost (XEXP (X, 0), OUTER_CODE) \
1956 << (GET_MODE (XEXP (X, 0)) != DImode)) \
1957 + (rtx_cost (XEXP (X, 1), OUTER_CODE) \
1958 << (GET_MODE (XEXP (X, 1)) != DImode)); \
1961 if (GET_MODE (X) == DImode) \
1962 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2) \
1963 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add)
1966 /* An expression giving the cost of an addressing mode that contains
1967 ADDRESS. If not defined, the cost is computed from the ADDRESS
1968 expression and the `CONST_COSTS' values.
1970 For most CISC machines, the default cost is a good approximation
1971 of the true cost of the addressing mode. However, on RISC
1972 machines, all instructions normally have the same length and
1973 execution time. Hence all addresses will have equal costs.
1975 In cases where more than one form of an address is known, the form
1976 with the lowest cost will be used. If multiple forms have the
1977 same, lowest, cost, the one that is the most complex will be used.
1979 For example, suppose an address that is equal to the sum of a
1980 register and a constant is used twice in the same basic block.
1981 When this macro is not defined, the address will be computed in a
1982 register and memory references will be indirect through that
1983 register. On machines where the cost of the addressing mode
1984 containing the sum is no higher than that of a simple indirect
1985 reference, this will produce an additional instruction and
1986 possibly require an additional register. Proper specification of
1987 this macro eliminates this overhead for such machines.
1989 Similar use of this macro is made in strength reduction of loops.
1991 ADDRESS need not be valid as an address. In such a case, the cost
1992 is not relevant and can be any value; invalid addresses need not be
1993 assigned a different cost.
1995 On machines where an address involving more than one register is as
1996 cheap as an address computation involving only one register,
1997 defining `ADDRESS_COST' to reflect this can cause two registers to
1998 be live over a region of code where only one would have been if
1999 `ADDRESS_COST' were not defined in that manner. This effect should
2000 be considered in the definition of this macro. Equivalent costs
2001 should probably only be given to addresses with different numbers
2002 of registers on machines with lots of registers.
2004 This macro will normally either not be defined or be defined as a
2007 For i386, it is better to use a complex address than let gcc copy
2008 the address into a reg and make a new pseudo. But not if the address
2009 requires to two regs - that would mean more pseudos with longer
2012 #define ADDRESS_COST(RTX) \
2013 ((CONSTANT_P (RTX) \
2014 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
2015 && REG_P (XEXP (RTX, 0)))) ? 0 \
2019 /* A C expression for the cost of moving data of mode M between a
2020 register and memory. A value of 2 is the default; this cost is
2021 relative to those in `REGISTER_MOVE_COST'.
2023 If moving between registers and memory is more expensive than
2024 between two registers, you should define this macro to express the
2027 On the i386, copying between floating-point and fixed-point
2028 registers is expensive. */
2030 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
2031 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
2032 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
2036 /* A C expression for the cost of moving data of mode M between a
2037 register and memory. A value of 2 is the default; this cost is
2038 relative to those in `REGISTER_MOVE_COST'.
2040 If moving between registers and memory is more expensive than
2041 between two registers, you should define this macro to express the
2044 /* #define MEMORY_MOVE_COST(M) 2 */
2046 /* A C expression for the cost of a branch instruction. A value of 1
2047 is the default; other values are interpreted relative to that. */
2049 #define BRANCH_COST i386_branch_cost
2051 /* Define this macro as a C expression which is nonzero if accessing
2052 less than a word of memory (i.e. a `char' or a `short') is no
2053 faster than accessing a word of memory, i.e., if such access
2054 require more than one instruction or if there is no difference in
2055 cost between byte and (aligned) word loads.
2057 When this macro is not defined, the compiler will access a field by
2058 finding the smallest containing object; when it is defined, a
2059 fullword load will be used if alignment permits. Unless bytes
2060 accesses are faster than word accesses, using word accesses is
2061 preferable since it may eliminate subsequent memory access if
2062 subsequent accesses occur to other fields in the same word of the
2063 structure, but to different bytes. */
2065 #define SLOW_BYTE_ACCESS 0
2067 /* Nonzero if access to memory by shorts is slow and undesirable. */
2068 #define SLOW_SHORT_ACCESS 0
2070 /* Define this macro if zero-extension (of a `char' or `short' to an
2071 `int') can be done faster if the destination is a register that is
2074 If you define this macro, you must have instruction patterns that
2075 recognize RTL structures like this:
2077 (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
2079 and likewise for `HImode'. */
2081 /* #define SLOW_ZERO_EXTEND */
2083 /* Define this macro to be the value 1 if unaligned accesses have a
2084 cost many times greater than aligned accesses, for example if they
2085 are emulated in a trap handler.
2087 When this macro is non-zero, the compiler will act as if
2088 `STRICT_ALIGNMENT' were non-zero when generating code for block
2089 moves. This can cause significantly more instructions to be
2090 produced. Therefore, do not set this macro non-zero if unaligned
2091 accesses only add a cycle or two to the time for a memory access.
2093 If the value of this macro is always zero, it need not be defined. */
2095 /* #define SLOW_UNALIGNED_ACCESS 0 */
2097 /* Define this macro to inhibit strength reduction of memory
2098 addresses. (On some machines, such strength reduction seems to do
2099 harm rather than good.) */
2101 /* #define DONT_REDUCE_ADDR */
2103 /* Define this macro if it is as good or better to call a constant
2104 function address than to call an address kept in a register.
2106 Desirable on the 386 because a CALL with a constant address is
2107 faster than one with a register address. */
2109 #define NO_FUNCTION_CSE
2111 /* Define this macro if it is as good or better for a function to call
2112 itself with an explicit address than to call an address kept in a
2115 #define NO_RECURSIVE_FUNCTION_CSE
2117 /* A C statement (sans semicolon) to update the integer variable COST
2118 based on the relationship between INSN that is dependent on
2119 DEP_INSN through the dependence LINK. The default is to make no
2120 adjustment to COST. This can be used for example to specify to
2121 the scheduler that an output- or anti-dependence does not incur
2122 the same cost as a data-dependence. */
2124 #define ADJUST_COST(insn,link,dep_insn,cost) \
2127 if (GET_CODE (dep_insn) == CALL_INSN) \
2130 else if (GET_CODE (dep_insn) == INSN \
2131 && GET_CODE (PATTERN (dep_insn)) == SET \
2132 && GET_CODE (SET_DEST (PATTERN (dep_insn))) == REG \
2133 && GET_CODE (insn) == INSN \
2134 && GET_CODE (PATTERN (insn)) == SET \
2135 && !reg_overlap_mentioned_p (SET_DEST (PATTERN (dep_insn)), \
2136 SET_SRC (PATTERN (insn)))) \
2141 else if (GET_CODE (insn) == JUMP_INSN) \
2146 if (TARGET_PENTIUM) \
2148 if (cost !=0 && is_fp_insn (insn) && is_fp_insn (dep_insn) \
2149 && !is_fp_dest (dep_insn)) \
2154 if (agi_dependent (insn, dep_insn)) \
2158 else if (GET_CODE (insn) == INSN \
2159 && GET_CODE (PATTERN (insn)) == SET \
2160 && SET_DEST (PATTERN (insn)) == cc0_rtx \
2161 && (next_inst = next_nonnote_insn (insn)) \
2162 && GET_CODE (next_inst) == JUMP_INSN) \
2163 { /* compare probably paired with jump */ \
2168 if (!is_fp_dest (dep_insn)) \
2170 if(!agi_dependent (insn, dep_insn)) \
2172 else if (TARGET_486) \
2176 if (is_fp_store (insn) && is_fp_insn (dep_insn) \
2177 && NEXT_INSN (insn) && NEXT_INSN (NEXT_INSN (insn)) \
2178 && NEXT_INSN (NEXT_INSN (NEXT_INSN (insn))) \
2179 && (GET_CODE (NEXT_INSN (insn)) == INSN) \
2180 && (GET_CODE (NEXT_INSN (NEXT_INSN (insn))) == JUMP_INSN) \
2181 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) == NOTE) \
2182 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) \
2183 == NOTE_INSN_LOOP_END)) \
2190 #define ADJUST_BLOCKAGE(last_insn,insn,blockage) \
2192 if (is_fp_store (last_insn) && is_fp_insn (insn) \
2193 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \
2194 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \
2195 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \
2196 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \
2197 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \
2198 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \
2199 == NOTE_INSN_LOOP_END)) \
2206 /* Add any extra modes needed to represent the condition code.
2208 For the i386, we need separate modes when floating-point equality
2209 comparisons are being done. */
2211 #define EXTRA_CC_MODES CCFPEQmode
2213 /* Define the names for the modes specified above. */
2214 #define EXTRA_CC_NAMES "CCFPEQ"
2216 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
2217 return the mode to be used for the comparison.
2219 For floating-point equality comparisons, CCFPEQmode should be used.
2220 VOIDmode should be used in all other cases. */
2222 #define SELECT_CC_MODE(OP,X,Y) \
2223 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2224 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
2226 /* Define the information needed to generate branch and scc insns. This is
2227 stored from the compare operation. Note that we can't use "rtx" here
2228 since it hasn't been defined! */
2230 extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
2232 /* Tell final.c how to eliminate redundant test instructions. */
2234 /* Here we define machine-dependent flags and fields in cc_status
2235 (see `conditions.h'). */
2237 /* Set if the cc value was actually from the 80387 and
2238 we are testing eax directly (i.e. no sahf) */
2239 #define CC_TEST_AX 020000
2241 /* Set if the cc value is actually in the 80387, so a floating point
2242 conditional branch must be output. */
2243 #define CC_IN_80387 04000
2245 /* Set if the CC value was stored in a nonstandard way, so that
2246 the state of equality is indicated by zero in the carry bit. */
2247 #define CC_Z_IN_NOT_C 010000
2249 /* Set if the CC value was actually from the 80387 and loaded directly
2250 into the eflags instead of via eax/sahf. */
2251 #define CC_FCOMI 040000
2253 /* Store in cc_status the expressions
2254 that the condition codes will describe
2255 after execution of an instruction whose pattern is EXP.
2256 Do not alter them if the instruction would not alter the cc's. */
2258 #define NOTICE_UPDATE_CC(EXP, INSN) \
2259 notice_update_cc((EXP))
2261 /* Output a signed jump insn. Use template NORMAL ordinarily, or
2262 FLOAT following a floating point comparison.
2263 Use NO_OV following an arithmetic insn that set the cc's
2264 before a test insn that was deleted.
2265 NO_OV may be zero, meaning final should reinsert the test insn
2266 because the jump cannot be handled properly without it. */
2268 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
2270 if (cc_prev_status.flags & CC_IN_80387) \
2272 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
2277 /* Control the assembler format that we output, to the extent
2278 this does not vary between assemblers. */
2280 /* How to refer to registers in assembler output.
2281 This sequence is indexed by compiler's hard-register-number (see above). */
2283 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
2284 For non floating point regs, the following are the HImode names.
2286 For float regs, the stack top is sometimes referred to as "%st(0)"
2287 instead of just "%st". PRINT_REG handles this with the "y" code. */
2289 #define HI_REGISTER_NAMES \
2290 {"ax","dx","cx","bx","si","di","bp","sp", \
2291 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
2293 #define REGISTER_NAMES HI_REGISTER_NAMES
2295 /* Table of additional register names to use in user input. */
2297 #define ADDITIONAL_REGISTER_NAMES \
2298 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
2299 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
2300 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
2301 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
2303 /* Note we are omitting these since currently I don't know how
2304 to get gcc to use these, since they want the same but different
2305 number as al, and ax.
2308 /* note the last four are not really qi_registers, but
2309 the md will have to never output movb into one of them
2310 only a movw . There is no movb into the last four regs */
2312 #define QI_REGISTER_NAMES \
2313 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
2315 /* These parallel the array above, and can be used to access bits 8:15
2316 of regs 0 through 3. */
2318 #define QI_HIGH_REGISTER_NAMES \
2319 {"ah", "dh", "ch", "bh", }
2321 /* How to renumber registers for dbx and gdb. */
2323 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
2324 #define DBX_REGISTER_NUMBER(n) \
2335 /* Before the prologue, RA is at 0(%esp). */
2336 #define INCOMING_RETURN_ADDR_RTX \
2337 gen_rtx (MEM, VOIDmode, gen_rtx (REG, VOIDmode, STACK_POINTER_REGNUM))
2339 /* PC is dbx register 8; let's use that column for RA. */
2340 #define DWARF_FRAME_RETURN_COLUMN 8
2342 /* This is how to output the definition of a user-level label named NAME,
2343 such as the label on a static function or variable NAME. */
2345 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2346 (assemble_name (FILE, NAME), fputs (":\n", FILE))
2348 /* This is how to output an assembler line defining a `double' constant. */
2350 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2352 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
2353 if (sizeof (int) == sizeof (long)) \
2354 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, l[0], l[1]); \
2356 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
2359 /* This is how to output a `long double' extended real constant. */
2361 #undef ASM_OUTPUT_LONG_DOUBLE
2362 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
2364 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
2365 if (sizeof (int) == sizeof (long)) \
2366 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, l[0], l[1], l[2]); \
2368 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
2371 /* This is how to output an assembler line defining a `float' constant. */
2373 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2375 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
2376 if (sizeof (int) == sizeof (long)) \
2377 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, l); \
2379 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
2382 /* Store in OUTPUT a string (made with alloca) containing
2383 an assembler-name for a local static variable named NAME.
2384 LABELNO is an integer which is different for each call. */
2386 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2387 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2388 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2392 /* This is how to output an assembler line defining an `int' constant. */
2394 #define ASM_OUTPUT_INT(FILE,VALUE) \
2395 ( fprintf (FILE, "%s ", ASM_LONG), \
2396 output_addr_const (FILE,(VALUE)), \
2399 /* Likewise for `char' and `short' constants. */
2400 /* is this supposed to do align too?? */
2402 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2403 ( fprintf (FILE, "%s ", ASM_SHORT), \
2404 output_addr_const (FILE,(VALUE)), \
2408 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2409 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2410 output_addr_const (FILE,(VALUE)), \
2411 fputs (",", FILE), \
2412 output_addr_const (FILE,(VALUE)), \
2413 fputs (" >> 8\n",FILE))
2417 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2418 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2419 output_addr_const (FILE, (VALUE)), \
2422 /* This is how to output an assembler line for a numeric constant byte. */
2424 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2425 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
2427 /* This is how to output an insn to push a register on the stack.
2428 It need not be very fast code. */
2430 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2431 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
2433 /* This is how to output an insn to pop a register from the stack.
2434 It need not be very fast code. */
2436 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2437 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
2439 /* This is how to output an element of a case-vector that is absolute.
2442 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2443 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
2445 /* This is how to output an element of a case-vector that is relative.
2446 We don't use these on the 386 yet, because the ATT assembler can't do
2447 forward reference the differences.
2450 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2451 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
2453 /* Define the parentheses used to group arithmetic operations
2454 in assembler code. */
2456 #define ASM_OPEN_PAREN ""
2457 #define ASM_CLOSE_PAREN ""
2459 /* Define results of standard character escape sequences. */
2460 #define TARGET_BELL 007
2461 #define TARGET_BS 010
2462 #define TARGET_TAB 011
2463 #define TARGET_NEWLINE 012
2464 #define TARGET_VT 013
2465 #define TARGET_FF 014
2466 #define TARGET_CR 015
2468 /* Print operand X (an rtx) in assembler syntax to file FILE.
2469 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2470 The CODE z takes the size of operand from the following digit, and
2471 outputs b,w,or l respectively.
2473 On the 80386, we use several such letters:
2474 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
2475 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
2476 R -- print the prefix for register names.
2477 z -- print the opcode suffix for the size of the current operand.
2478 * -- print a star (in certain assembler syntax)
2479 w -- print the operand as if it's a "word" (HImode) even if it isn't.
2480 b -- print the operand as if it's a byte (QImode) even if it isn't.
2481 c -- don't print special prefixes before constant operands. */
2483 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2486 /* Print the name of a register based on its machine mode and number.
2487 If CODE is 'w', pretend the mode is HImode.
2488 If CODE is 'b', pretend the mode is QImode.
2489 If CODE is 'k', pretend the mode is SImode.
2490 If CODE is 'h', pretend the reg is the `high' byte register.
2491 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2493 extern char *hi_reg_name[];
2494 extern char *qi_reg_name[];
2495 extern char *qi_high_reg_name[];
2497 #define PRINT_REG(X, CODE, FILE) \
2498 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
2500 fprintf (FILE, "%s", RP); \
2501 switch ((CODE == 'w' ? 2 \
2506 : GET_MODE_SIZE (GET_MODE (X)))) \
2509 if (STACK_TOP_P (X)) \
2511 fputs ("st(0)", FILE); \
2517 if (! FP_REG_P (X)) fputs ("e", FILE); \
2519 fputs (hi_reg_name[REGNO (X)], FILE); \
2522 fputs (qi_reg_name[REGNO (X)], FILE); \
2525 fputs (qi_high_reg_name[REGNO (X)], FILE); \
2530 #define PRINT_OPERAND(FILE, X, CODE) \
2531 print_operand (FILE, X, CODE)
2533 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2534 print_operand_address (FILE, ADDR)
2536 /* Print the name of a register for based on its machine mode and number.
2537 This macro is used to print debugging output.
2538 This macro is different from PRINT_REG in that it may be used in
2539 programs that are not linked with aux-output.o. */
2541 #define DEBUG_PRINT_REG(X, CODE, FILE) \
2542 do { static char *hi_name[] = HI_REGISTER_NAMES; \
2543 static char *qi_name[] = QI_REGISTER_NAMES; \
2544 fprintf (FILE, "%d %s", REGNO (X), RP); \
2545 if (REGNO (X) == ARG_POINTER_REGNUM) \
2546 { fputs ("argp", FILE); break; } \
2547 if (STACK_TOP_P (X)) \
2548 { fputs ("st(0)", FILE); break; } \
2550 { fputs (hi_name[REGNO(X)], FILE); break; } \
2551 switch (GET_MODE_SIZE (GET_MODE (X))) \
2554 fputs ("e", FILE); \
2556 fputs (hi_name[REGNO (X)], FILE); \
2559 fputs (qi_name[REGNO (X)], FILE); \
2564 /* Output the prefix for an immediate operand, or for an offset operand. */
2565 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
2566 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
2568 /* Routines in libgcc that return floats must return them in an fp reg,
2569 just as other functions do which return such values.
2570 These macros make that happen. */
2572 #define FLOAT_VALUE_TYPE float
2573 #define INTIFY(FLOATVAL) FLOATVAL
2575 /* Nonzero if INSN magically clobbers register REGNO. */
2577 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
2578 (FP_REGNO_P (REGNO) \
2579 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
2582 /* a letter which is not needed by the normal asm syntax, which
2583 we can use for operand syntax in the extended asm */
2585 #define ASM_OPERAND_LETTER '#'
2587 #define RET return ""
2588 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
2590 /* Helper macros to expand a binary/unary operator if needed */
2591 #define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \
2593 if (!ix86_expand_binary_operator (OP, MODE, OPERANDS)) \
2597 #define IX86_EXPAND_UNARY_OPERATOR(OP, MODE, OPERANDS) \
2599 if (!ix86_expand_unary_operator (OP, MODE, OPERANDS,)) \
2604 /* Functions in i386.c */
2605 extern void override_options ();
2606 extern void order_regs_for_local_alloc ();
2607 extern char *output_strlen_unroll ();
2608 extern struct rtx_def *i386_sext16_if_const ();
2609 extern int i386_aligned_p ();
2610 extern int i386_cc_probably_useless_p ();
2611 extern int i386_valid_decl_attribute_p ();
2612 extern int i386_valid_type_attribute_p ();
2613 extern int i386_return_pops_args ();
2614 extern int i386_comp_type_attributes ();
2615 extern void init_cumulative_args ();
2616 extern void function_arg_advance ();
2617 extern struct rtx_def *function_arg ();
2618 extern int function_arg_partial_nregs ();
2619 extern char *output_strlen_unroll ();
2620 extern void output_op_from_reg ();
2621 extern void output_to_reg ();
2622 extern char *singlemove_string ();
2623 extern char *output_move_double ();
2624 extern char *output_move_memory ();
2625 extern char *output_move_pushmem ();
2626 extern int standard_80387_constant_p ();
2627 extern char *output_move_const_single ();
2628 extern int symbolic_operand ();
2629 extern int call_insn_operand ();
2630 extern int expander_call_insn_operand ();
2631 extern int symbolic_reference_mentioned_p ();
2632 extern int ix86_expand_binary_operator ();
2633 extern int ix86_binary_operator_ok ();
2634 extern int ix86_expand_unary_operator ();
2635 extern int ix86_unary_operator_ok ();
2636 extern void emit_pic_move ();
2637 extern void function_prologue ();
2638 extern int simple_386_epilogue ();
2639 extern void function_epilogue ();
2640 extern int legitimate_address_p ();
2641 extern struct rtx_def *legitimize_pic_address ();
2642 extern struct rtx_def *legitimize_address ();
2643 extern void print_operand ();
2644 extern void print_operand_address ();
2645 extern void notice_update_cc ();
2646 extern void split_di ();
2647 extern int binary_387_op ();
2648 extern int shift_op ();
2649 extern int VOIDmode_compare_op ();
2650 extern char *output_387_binary_op ();
2651 extern char *output_fix_trunc ();
2652 extern char *output_float_compare ();
2653 extern char *output_fp_cc0_set ();
2654 extern void save_386_machine_status ();
2655 extern void restore_386_machine_status ();
2656 extern void clear_386_stack_locals ();
2657 extern struct rtx_def *assign_386_stack_local ();
2658 extern int is_mul ();
2659 extern int is_div ();
2660 extern int last_to_set_cc ();
2661 extern int doesnt_set_condition_code ();
2662 extern int sets_condition_code ();
2663 extern int str_immediate_operand ();
2664 extern int is_fp_insn ();
2665 extern int is_fp_dest ();
2666 extern int is_fp_store ();
2667 extern int agi_dependent ();
2668 extern int reg_mentioned_in_mem ();
2671 extern struct rtx_def *copy_all_rtx ();
2672 extern void rewrite_address ();
2675 /* Variables in i386.c */
2676 extern char *ix86_cpu_string; /* for -mcpu=<xxx> */
2677 extern char *ix86_arch_string; /* for -march=<xxx> */
2678 extern char *i386_reg_alloc_order; /* register allocation order */
2679 extern char *i386_regparm_string; /* # registers to use to pass args */
2680 extern char *i386_align_loops_string; /* power of two alignment for loops */
2681 extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */
2682 extern char *i386_align_funcs_string; /* power of two alignment for functions */
2683 extern char *i386_branch_cost_string; /* values 1-5: see jump.c */
2684 extern int i386_regparm; /* i386_regparm_string as a number */
2685 extern int i386_align_loops; /* power of two alignment for loops */
2686 extern int i386_align_jumps; /* power of two alignment for non-loop jumps */
2687 extern int i386_align_funcs; /* power of two alignment for functions */
2688 extern int i386_branch_cost; /* values 1-5: see jump.c */
2689 extern char *hi_reg_name[]; /* names for 16 bit regs */
2690 extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
2691 extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
2692 extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
2693 extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
2694 extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
2696 /* External variables used */
2697 extern int optimize; /* optimization level */
2698 extern int obey_regdecls; /* TRUE if stupid register allocation */
2700 /* External functions used */
2701 extern struct rtx_def *force_operand ();
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