1 /* Definitions of target machine for GNU compiler for Intel X86
3 Copyright (C) 1988, 1992, 1994, 1995, 1996 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* The purpose of this file is to define the characteristics of the i386,
23 independent of assembler syntax or operating system.
25 Three other files build on this one to describe a specific assembler syntax:
26 bsd386.h, att386.h, and sun386.h.
28 The actual tm.h file for a particular system should include
29 this file, and then the file for the appropriate assembler syntax.
31 Many macros that specify assembler syntax are omitted entirely from
32 this file because they really belong in the files for particular
33 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
34 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
35 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
37 /* Names to predefine in the preprocessor for this target machine. */
41 /* Stubs for half-pic support if not OSF/1 reference platform. */
44 #define HALF_PIC_P() 0
45 #define HALF_PIC_NUMBER_PTRS 0
46 #define HALF_PIC_NUMBER_REFS 0
47 #define HALF_PIC_ENCODE(DECL)
48 #define HALF_PIC_DECLARE(NAME)
49 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
50 #define HALF_PIC_ADDRESS_P(X) 0
51 #define HALF_PIC_PTR(X) X
52 #define HALF_PIC_FINISH(STREAM)
55 /* Define the specific costs for a given cpu */
57 struct processor_costs {
58 int add; /* cost of an add instruction */
59 int lea; /* cost of a lea instruction */
60 int shift_var; /* variable shift costs */
61 int shift_const; /* constant shift costs */
62 int mult_init; /* cost of starting a multiply */
63 int mult_bit; /* cost of multiply per each bit set */
64 int divide; /* cost of a divide/mod */
67 extern struct processor_costs *ix86_cost;
69 /* Run-time compilation parameters selecting different hardware subsets. */
71 extern int target_flags;
73 /* Macros used in the machine description to test the flags. */
75 /* configure can arrange to make this 2, to force a 486. */
76 #ifndef TARGET_CPU_DEFAULT
77 #define TARGET_CPU_DEFAULT 0
80 /* Masks for the -m switches */
81 #define MASK_80387 000000000001 /* Hardware floating point */
82 #define MASK_486 000000000002 /* 80486 specific */
83 #define MASK_NOTUSED1 000000000004 /* bit not currently used */
84 #define MASK_RTD 000000000010 /* Use ret that pops args */
85 #define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
86 #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
87 #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
88 #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
89 #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
90 #define MASK_OMIT_LEAF_FRAME_POINTER 0x00000800 /* omit leaf frame pointers */
91 /* Temporary codegen switches */
92 #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
93 #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
94 #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
95 #define MASK_NO_PSEUDO 000010000000 /* Move op's args -> pseudos */
96 #define MASK_DEBUG_ARG 000020000000 /* Debug function_arg */
97 #define MASK_SCHEDULE_PROLOGUE 000040000000 /* Emit prologue as rtl */
98 #define MASK_STACK_PROBE 000100000000 /* Enable stack probing */
100 /* Use the floating point instructions */
101 #define TARGET_80387 (target_flags & MASK_80387)
103 /* Compile using ret insn that pops args.
104 This will not work unless you use prototypes at least
105 for all functions that can take varying numbers of args. */
106 #define TARGET_RTD (target_flags & MASK_RTD)
108 /* Align doubles to a two word boundary. This breaks compatibility with
109 the published ABI's for structures containing doubles, but produces
110 faster code on the pentium. */
111 #define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
113 /* Put uninitialized locals into bss, not data.
114 Meaningful only on svr3. */
115 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
117 /* Use IEEE floating point comparisons. These handle correctly the cases
118 where the result of a comparison is unordered. Normally SIGFPE is
119 generated in such cases, in which case this isn't needed. */
120 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
122 /* Functions that return a floating point value may return that value
123 in the 387 FPU or in 386 integer registers. If set, this flag causes
124 the 387 to be used, which is compatible with most calling conventions. */
125 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
127 /* Disable generation of FP sin, cos and sqrt operations for 387.
128 This is because FreeBSD lacks these in the math-emulator-code */
129 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
131 /* Don't create frame pointers for leaf functions */
132 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
134 /* Temporary switches for tuning code generation */
136 /* Disable 32x32->64 bit multiplies that are used for long long multiplies
137 and division by constants, but sometimes cause reload problems. */
138 #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
139 #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
141 /* Emit/Don't emit prologue as rtl */
142 #define TARGET_SCHEDULE_PROLOGUE (target_flags & MASK_SCHEDULE_PROLOGUE)
144 /* Debug GO_IF_LEGITIMATE_ADDRESS */
145 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
147 /* Debug FUNCTION_ARG macros */
148 #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
150 /* Hack macros for tuning code generation */
151 #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
152 #define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */
154 #define TARGET_386 (ix86_cpu == PROCESSOR_I386)
155 #define TARGET_486 (ix86_cpu == PROCESSOR_I486)
156 #define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
157 #define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO)
158 #define TARGET_USE_LEAVE (ix86_cpu == PROCESSOR_I386)
159 #define TARGET_PUSH_MEMORY (ix86_cpu == PROCESSOR_I386)
160 #define TARGET_ZERO_EXTEND_WITH_AND (ix86_cpu != PROCESSOR_I386)
161 #define TARGET_DOUBLE_WITH_ADD (ix86_cpu != PROCESSOR_I386)
162 #define TARGET_USE_BIT_TEST (ix86_cpu == PROCESSOR_I386)
163 #define TARGET_UNROLL_STRLEN (ix86_cpu != PROCESSOR_I386)
164 #define TARGET_USE_Q_REG (ix86_cpu == PROCESSOR_PENTIUM \
165 || ix86_cpu == PROCESSOR_PENTIUMPRO)
166 #define TARGET_USE_ANY_REG (ix86_cpu == PROCESSOR_I486)
167 #define TARGET_CMOVE (ix86_isa == PROCESSOR_PENTIUMPRO)
168 #define TARGET_DEEP_BRANCH_PREDICTION (ix86_cpu == PROCESSOR_PENTIUMPRO)
169 #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
171 #define TARGET_SWITCHES \
172 { { "80387", MASK_80387 }, \
173 { "no-80387", -MASK_80387 }, \
174 { "hard-float", MASK_80387 }, \
175 { "soft-float", -MASK_80387 }, \
176 { "no-soft-float", MASK_80387 }, \
182 { "pentiumpro", 0 }, \
183 { "rtd", MASK_RTD }, \
184 { "no-rtd", -MASK_RTD }, \
185 { "align-double", MASK_ALIGN_DOUBLE }, \
186 { "no-align-double", -MASK_ALIGN_DOUBLE }, \
187 { "svr3-shlib", MASK_SVR3_SHLIB }, \
188 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
189 { "ieee-fp", MASK_IEEE_FP }, \
190 { "no-ieee-fp", -MASK_IEEE_FP }, \
191 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
192 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
193 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
194 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
195 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
196 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER }, \
197 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
198 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
199 { "schedule-prologue", MASK_SCHEDULE_PROLOGUE }, \
200 { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE }, \
201 { "debug-addr", MASK_DEBUG_ADDR }, \
202 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
203 { "move", -MASK_NO_MOVE }, \
204 { "no-move", MASK_NO_MOVE }, \
205 { "debug-arg", MASK_DEBUG_ARG }, \
206 { "no-debug-arg", -MASK_DEBUG_ARG }, \
207 { "stack-arg-probe", MASK_STACK_PROBE }, \
208 { "no-stack-arg-probe", -MASK_STACK_PROBE }, \
210 { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT}}
212 /* Which processor to schedule for. The cpu attribute defines a list that
213 mirrors this list, so changes to i386.md must be made at the same time. */
216 {PROCESSOR_I386, /* 80386 */
217 PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */
219 PROCESSOR_PENTIUMPRO};
221 #define PROCESSOR_I386_STRING "i386"
222 #define PROCESSOR_I486_STRING "i486"
223 #define PROCESSOR_I586_STRING "i586"
224 #define PROCESSOR_PENTIUM_STRING "pentium"
225 #define PROCESSOR_I686_STRING "i686"
226 #define PROCESSOR_PENTIUMPRO_STRING "pentiumpro"
228 extern enum processor_type ix86_cpu;
232 /* Define generic processor types based upon current deployment. */
233 #define PROCESSOR_COMMON PROCESSOR_I386
234 #define PROCESSOR_COMMON_STRING PROCESSOR_I386_STRING
236 /* Define the default processor. This is overridden by other tm.h files. */
237 #define PROCESSOR_DEFAULT \
238 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
240 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
241 ? PROCESSOR_PENTIUM \
242 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
243 ? PROCESSOR_PENTIUMPRO \
245 #define PROCESSOR_DEFAULT_STRING \
246 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
247 ? PROCESSOR_I486_STRING \
248 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
249 ? PROCESSOR_PENTIUM_STRING \
250 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
251 ? PROCESSOR_PENTIUMPRO_STRING \
252 : PROCESSOR_I386_STRING
254 /* This macro is similar to `TARGET_SWITCHES' but defines names of
255 command options that have values. Its definition is an
256 initializer with a subgrouping for each command option.
258 Each subgrouping contains a string constant, that defines the
259 fixed part of the option name, and the address of a variable. The
260 variable, type `char *', is set to the variable part of the given
261 option if the fixed part matches. The actual option name is made
262 by appending `-m' to the specified name. */
263 #define TARGET_OPTIONS \
264 { { "cpu=", &ix86_cpu_string}, \
265 { "arch=", &ix86_isa_string}, \
266 { "reg-alloc=", &i386_reg_alloc_order }, \
267 { "regparm=", &i386_regparm_string }, \
268 { "align-loops=", &i386_align_loops_string }, \
269 { "align-jumps=", &i386_align_jumps_string }, \
270 { "align-functions=", &i386_align_funcs_string }, \
271 { "branch-cost=", &i386_branch_cost_string }, \
275 /* Sometimes certain combinations of command options do not make
276 sense on a particular target machine. You can define a macro
277 `OVERRIDE_OPTIONS' to take account of this. This macro, if
278 defined, is executed once just after all the command options have
281 Don't use this macro to turn on various extra optimizations for
282 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
284 #define OVERRIDE_OPTIONS override_options ()
286 /* These are meant to be redefined in the host dependent files */
287 #define SUBTARGET_SWITCHES
288 #define SUBTARGET_OPTIONS
290 /* Define this to change the optimizations performed by default. */
291 #define OPTIMIZATION_OPTIONS(LEVEL) optimization_options(LEVEL)
293 /* Specs for the compiler proper */
298 %{m386:-mcpu=i386 -march=i386} \
299 %{mno-486:-mcpu=i386 -march=i386} \
300 %{m486:-mcpu=i486 -march=i486} \
301 %{mno-386:-mcpu=i486 -march=i486} \
302 %{mno-pentium:-mcpu=i486 -march=i486} \
303 %{mpentium:-mcpu=pentium} \
304 %{mno-pentiumpro:-mcpu=pentium} \
305 %{mpentiumpro:-mcpu=pentiumpro}}"
308 /* target machine storage layout */
310 /* Define for XFmode extended real floating point support.
311 This will automatically cause REAL_ARITHMETIC to be defined. */
312 #define LONG_DOUBLE_TYPE_SIZE 96
314 /* Define if you don't want extended real, but do want to use the
315 software floating point emulator for REAL_ARITHMETIC and
316 decimal <-> binary conversion. */
317 /* #define REAL_ARITHMETIC */
319 /* Define this if most significant byte of a word is the lowest numbered. */
320 /* That is true on the 80386. */
322 #define BITS_BIG_ENDIAN 0
324 /* Define this if most significant byte of a word is the lowest numbered. */
325 /* That is not true on the 80386. */
326 #define BYTES_BIG_ENDIAN 0
328 /* Define this if most significant word of a multiword number is the lowest
330 /* Not true for 80386 */
331 #define WORDS_BIG_ENDIAN 0
333 /* number of bits in an addressable storage unit */
334 #define BITS_PER_UNIT 8
336 /* Width in bits of a "word", which is the contents of a machine register.
337 Note that this is not necessarily the width of data type `int';
338 if using 16-bit ints on a 80386, this would still be 32.
339 But on a machine with 16-bit registers, this would be 16. */
340 #define BITS_PER_WORD 32
342 /* Width of a word, in units (bytes). */
343 #define UNITS_PER_WORD 4
345 /* Width in bits of a pointer.
346 See also the macro `Pmode' defined below. */
347 #define POINTER_SIZE 32
349 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
350 #define PARM_BOUNDARY 32
352 /* Boundary (in *bits*) on which stack pointer should be aligned. */
353 #define STACK_BOUNDARY 32
355 /* Allocation boundary (in *bits*) for the code of a function.
356 For i486, we get better performance by aligning to a cache
357 line (i.e. 16 byte) boundary. */
358 #define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
360 /* Alignment of field after `int : 0' in a structure. */
362 #define EMPTY_FIELD_BOUNDARY 32
364 /* Minimum size in bits of the largest boundary to which any
365 and all fundamental data types supported by the hardware
366 might need to be aligned. No data type wants to be aligned
367 rounder than this. The i386 supports 64-bit floating point
368 quantities, but these can be aligned on any 32-bit boundary.
369 The published ABIs say that doubles should be aligned on word
370 boundaries, but the Pentium gets better performance with them
371 aligned on 64 bit boundaries. */
372 #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
374 /* align DFmode constants and nonaggregates */
375 #define ALIGN_DFmode (!TARGET_386)
377 /* Set this non-zero if move instructions will actually fail to work
378 when given unaligned data. */
379 #define STRICT_ALIGNMENT 0
381 /* If bit field type is int, don't let it cross an int,
382 and give entire struct the alignment of an int. */
383 /* Required on the 386 since it doesn't have bitfield insns. */
384 #define PCC_BITFIELD_TYPE_MATTERS 1
386 /* Maximum power of 2 that code can be aligned to. */
387 #define MAX_CODE_ALIGN 6 /* 64 byte alignment */
389 /* Align loop starts for optimal branching. */
390 #define ASM_OUTPUT_LOOP_ALIGN(FILE) ASM_OUTPUT_ALIGN (FILE, i386_align_loops)
392 /* This is how to align an instruction for optimal branching.
393 On i486 we'll get better performance by aligning on a
394 cache line (i.e. 16 byte) boundary. */
395 #define ASM_OUTPUT_ALIGN_CODE(FILE) ASM_OUTPUT_ALIGN ((FILE), i386_align_jumps)
398 /* Standard register usage. */
400 /* This processor has special stack-like registers. See reg-stack.c
404 #define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode)
406 /* Number of actual hardware registers.
407 The hardware registers are assigned numbers for the compiler
408 from 0 to just below FIRST_PSEUDO_REGISTER.
409 All registers that the compiler knows about must be given numbers,
410 even those that are not normally considered general registers.
412 In the 80386 we give the 8 general purpose registers the numbers 0-7.
413 We number the floating point registers 8-15.
414 Note that registers 0-7 can be accessed as a short or int,
415 while only 0-3 may be used with byte `mov' instructions.
417 Reg 16 does not correspond to any hardware register, but instead
418 appears in the RTL as an argument pointer prior to reload, and is
419 eliminated during reloading in favor of either the stack or frame
422 #define FIRST_PSEUDO_REGISTER 17
424 /* 1 for registers that have pervasive standard uses
425 and are not available for the register allocator.
426 On the 80386, the stack pointer is such, as is the arg pointer. */
427 #define FIXED_REGISTERS \
428 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
429 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
431 /* 1 for registers not available across function calls.
432 These must include the FIXED_REGISTERS and also any
433 registers that can be used without being saved.
434 The latter must include the registers where values are returned
435 and the register where structure-value addresses are passed.
436 Aside from that, you can include as many other registers as you like. */
438 #define CALL_USED_REGISTERS \
439 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
440 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
442 /* Order in which to allocate registers. Each register must be
443 listed once, even those in FIXED_REGISTERS. List frame pointer
444 late and fixed registers last. Note that, in general, we prefer
445 registers listed in CALL_USED_REGISTERS, keeping the others
446 available for storage of persistent values.
448 Three different versions of REG_ALLOC_ORDER have been tried:
450 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
451 but slower code on simple functions returning values in eax.
453 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
454 perl 4.036 due to not being able to create a DImode register (to hold a 2
457 If the order is eax, edx, ecx, ... it produces better code for simple
458 functions, and a slightly slower compiler. Users complained about the code
459 generated by allocating edx first, so restore the 'natural' order of things. */
461 #define REG_ALLOC_ORDER \
462 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
463 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
465 /* A C statement (sans semicolon) to choose the order in which to
466 allocate hard registers for pseudo-registers local to a basic
469 Store the desired register order in the array `reg_alloc_order'.
470 Element 0 should be the register to allocate first; element 1, the
471 next register; and so on.
473 The macro body should not assume anything about the contents of
474 `reg_alloc_order' before execution of the macro.
476 On most machines, it is not necessary to define this macro. */
478 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
480 /* Macro to conditionally modify fixed_regs/call_used_regs. */
481 #define CONDITIONAL_REGISTER_USAGE \
485 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
486 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
488 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
492 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
493 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
494 if (TEST_HARD_REG_BIT (x, i)) \
495 fixed_regs[i] = call_used_regs[i] = 1; \
499 /* Return number of consecutive hard regs needed starting at reg REGNO
500 to hold something of mode MODE.
501 This is ordinarily the length in words of a value of mode MODE
502 but can be less for certain modes in special long registers.
504 Actually there are no two word move instructions for consecutive
505 registers. And only registers 0-3 may have mov byte instructions
509 #define HARD_REGNO_NREGS(REGNO, MODE) \
510 (FP_REGNO_P (REGNO) ? 1 \
511 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
513 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
514 On the 80386, the first 4 cpu registers can hold any mode
515 while the floating point registers may hold only floating point.
516 Make it clear that the fp regs could not hold a 16-byte float. */
518 /* The casts to int placate a compiler on a microvax,
519 for cross-compiler testing. */
521 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
524 : FP_REGNO_P (REGNO) \
525 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
526 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
527 && GET_MODE_UNIT_SIZE (MODE) <= 12) \
528 : (int) (MODE) != (int) QImode ? 1 \
529 : (reload_in_progress | reload_completed) == 1)
531 /* Value is 1 if it is a good idea to tie two pseudo registers
532 when one has mode MODE1 and one has mode MODE2.
533 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
534 for any hard reg, then this must be 0 for correct output. */
536 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
538 /* Specify the registers used for certain standard purposes.
539 The values of these macros are register numbers. */
541 /* on the 386 the pc register is %eip, and is not usable as a general
542 register. The ordinary mov instructions won't work */
543 /* #define PC_REGNUM */
545 /* Register to use for pushing function arguments. */
546 #define STACK_POINTER_REGNUM 7
548 /* Base register for access to local variables of the function. */
549 #define FRAME_POINTER_REGNUM 6
551 /* First floating point reg */
552 #define FIRST_FLOAT_REG 8
554 /* First & last stack-like regs */
555 #define FIRST_STACK_REG FIRST_FLOAT_REG
556 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
558 /* Value should be nonzero if functions must have frame pointers.
559 Zero means the frame pointer need not be set up (and parms
560 may be accessed via the stack pointer) in functions that seem suitable.
561 This is computed in `reload', in reload1.c. */
562 #define FRAME_POINTER_REQUIRED (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ())
564 /* Base register for access to arguments of the function. */
565 #define ARG_POINTER_REGNUM 16
567 /* Register in which static-chain is passed to a function. */
568 #define STATIC_CHAIN_REGNUM 2
570 /* Register to hold the addressing base for position independent
571 code access to data items. */
572 #define PIC_OFFSET_TABLE_REGNUM 3
574 /* Register in which address to store a structure value
575 arrives in the function. On the 386, the prologue
576 copies this from the stack to register %eax. */
577 #define STRUCT_VALUE_INCOMING 0
579 /* Place in which caller passes the structure value address.
580 0 means push the value on the stack like an argument. */
581 #define STRUCT_VALUE 0
583 /* A C expression which can inhibit the returning of certain function
584 values in registers, based on the type of value. A nonzero value
585 says to return the function value in memory, just as large
586 structures are always returned. Here TYPE will be a C expression
587 of type `tree', representing the data type of the value.
589 Note that values of mode `BLKmode' must be explicitly handled by
590 this macro. Also, the option `-fpcc-struct-return' takes effect
591 regardless of this macro. On most systems, it is possible to
592 leave the macro undefined; this causes a default definition to be
593 used, whose value is the constant 1 for `BLKmode' values, and 0
596 Do not use this macro to indicate that structures and unions
597 should always be returned in memory. You should instead use
598 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
600 #define RETURN_IN_MEMORY(TYPE) \
601 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
604 /* Define the classes of registers for register constraints in the
605 machine description. Also define ranges of constants.
607 One of the classes must always be named ALL_REGS and include all hard regs.
608 If there is more than one class, another class must be named NO_REGS
609 and contain no registers.
611 The name GENERAL_REGS must be the name of a class (or an alias for
612 another name such as ALL_REGS). This is the class of registers
613 that is allowed by "g" or "r" in a register constraint.
614 Also, registers outside this class are allocated only when
615 instructions express preferences for them.
617 The classes must be numbered in nondecreasing order; that is,
618 a larger-numbered class must never be contained completely
619 in a smaller-numbered class.
621 For any two classes, it is very desirable that there be another
622 class that represents their union.
624 It might seem that class BREG is unnecessary, since no useful 386
625 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
626 and the "b" register constraint is useful in asms for syscalls. */
631 AREG, DREG, CREG, BREG,
632 AD_REGS, /* %eax/%edx for DImode */
633 Q_REGS, /* %eax %ebx %ecx %edx */
635 INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
636 GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
637 FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
639 ALL_REGS, LIM_REG_CLASSES
642 #define N_REG_CLASSES (int) LIM_REG_CLASSES
644 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
646 /* Give names of register classes as strings for dump file. */
648 #define REG_CLASS_NAMES \
650 "AREG", "DREG", "CREG", "BREG", \
656 "FP_TOP_REG", "FP_SECOND_REG", \
660 /* Define which registers fit in which classes.
661 This is an initializer for a vector of HARD_REG_SET
662 of length N_REG_CLASSES. */
664 #define REG_CLASS_CONTENTS \
666 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
669 0x10, 0x20, /* SIREG, DIREG */ \
670 0x7f, /* INDEX_REGS */ \
671 0x100ff, /* GENERAL_REGS */ \
672 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
673 0xff00, /* FLOAT_REGS */ \
676 /* The same information, inverted:
677 Return the class number of the smallest class containing
678 reg number REGNO. This could be a conditional expression
679 or could index an array. */
681 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
683 /* When defined, the compiler allows registers explicitly used in the
684 rtl to be used as spill registers but prevents the compiler from
685 extending the lifetime of these registers. */
687 #define SMALL_REGISTER_CLASSES
689 #define QI_REG_P(X) \
690 (REG_P (X) && REGNO (X) < 4)
691 #define NON_QI_REG_P(X) \
692 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
694 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
695 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
697 #define STACK_REG_P(xop) (REG_P (xop) && \
698 REGNO (xop) >= FIRST_STACK_REG && \
699 REGNO (xop) <= LAST_STACK_REG)
701 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
703 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
705 /* Try to maintain the accuracy of the death notes for regs satisfying the
706 following. Important for stack like regs, to know when to pop. */
708 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
710 /* 1 if register REGNO can magically overlap other regs.
711 Note that nonzero values work only in very special circumstances. */
713 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
715 /* The class value for index registers, and the one for base regs. */
717 #define INDEX_REG_CLASS INDEX_REGS
718 #define BASE_REG_CLASS GENERAL_REGS
720 /* Get reg_class from a letter such as appears in the machine description. */
722 #define REG_CLASS_FROM_LETTER(C) \
723 ((C) == 'r' ? GENERAL_REGS : \
724 (C) == 'q' ? Q_REGS : \
725 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
728 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
731 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
734 (C) == 'a' ? AREG : \
735 (C) == 'b' ? BREG : \
736 (C) == 'c' ? CREG : \
737 (C) == 'd' ? DREG : \
738 (C) == 'A' ? AD_REGS : \
739 (C) == 'D' ? DIREG : \
740 (C) == 'S' ? SIREG : NO_REGS)
742 /* The letters I, J, K, L and M in a register constraint string
743 can be used to stand for particular ranges of immediate operands.
744 This macro defines what the ranges are.
745 C is the letter, and VALUE is a constant value.
746 Return 1 if VALUE is in the range specified by C.
748 I is for non-DImode shifts.
749 J is for DImode shifts.
750 K and L are for an `andsi' optimization.
751 M is for shifts that can be executed by the "lea" opcode.
754 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
755 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
756 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
757 (C) == 'K' ? (VALUE) == 0xff : \
758 (C) == 'L' ? (VALUE) == 0xffff : \
759 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
760 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
761 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \
764 /* Similar, but for floating constants, and defining letters G and H.
765 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
766 TARGET_387 isn't set, because the stack register converter may need to
767 load 0.0 into the function value register. */
769 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
770 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
772 /* Place additional restrictions on the register class to use when it
773 is necessary to be able to hold a value of mode MODE in a reload
774 register for which class CLASS would ordinarily be used. */
776 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
777 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
780 /* Given an rtx X being reloaded into a reg required to be
781 in class CLASS, return the class of reg to actually use.
782 In general this is just CLASS; but on some machines
783 in some cases it is preferable to use a more restrictive class.
784 On the 80386 series, we prevent floating constants from being
785 reloaded into floating registers (since no move-insn can do that)
786 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
788 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
789 QImode must go into class Q_REGS.
790 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
791 movdf to do mem-to-mem moves through integer regs. */
793 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
794 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
795 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
796 : ((CLASS) == ALL_REGS \
797 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
800 /* If we are copying between general and FP registers, we need a memory
803 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
804 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
805 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
807 /* Return the maximum number of consecutive registers
808 needed to represent mode MODE in a register of class CLASS. */
809 /* On the 80386, this is the size of MODE in words,
810 except in the FP regs, where a single reg is always enough. */
811 #define CLASS_MAX_NREGS(CLASS, MODE) \
812 (FLOAT_CLASS_P (CLASS) ? 1 : \
813 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
815 /* A C expression whose value is nonzero if pseudos that have been
816 assigned to registers of class CLASS would likely be spilled
817 because registers of CLASS are needed for spill registers.
819 The default value of this macro returns 1 if CLASS has exactly one
820 register and zero otherwise. On most machines, this default
821 should be used. Only define this macro to some other expression
822 if pseudo allocated by `local-alloc.c' end up in memory because
823 their hard registers were needed for spill registers. If this
824 macro returns nonzero for those classes, those pseudos will only
825 be allocated by `global.c', which knows how to reallocate the
826 pseudo to another register. If there would not be another
827 register available for reallocation, you should not change the
828 definition of this macro since the only effect of such a
829 definition would be to slow down register allocation. */
831 #define CLASS_LIKELY_SPILLED_P(CLASS) \
833 || ((CLASS) == DREG) \
834 || ((CLASS) == CREG) \
835 || ((CLASS) == BREG) \
836 || ((CLASS) == AD_REGS) \
837 || ((CLASS) == SIREG) \
838 || ((CLASS) == DIREG))
841 /* Stack layout; function entry, exit and calling. */
843 /* Define this if pushing a word on the stack
844 makes the stack pointer a smaller address. */
845 #define STACK_GROWS_DOWNWARD
847 /* Define this if the nominal address of the stack frame
848 is at the high-address end of the local variables;
849 that is, each additional local variable allocated
850 goes at a more negative offset in the frame. */
851 #define FRAME_GROWS_DOWNWARD
853 /* Offset within stack frame to start allocating local variables at.
854 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
855 first local allocated. Otherwise, it is the offset to the BEGINNING
856 of the first local allocated. */
857 #define STARTING_FRAME_OFFSET 0
859 /* If we generate an insn to push BYTES bytes,
860 this says how many the stack pointer really advances by.
861 On 386 pushw decrements by exactly 2 no matter what the position was.
862 On the 386 there is no pushb; we use pushw instead, and this
863 has the effect of rounding up to 2. */
865 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
867 /* Offset of first parameter from the argument pointer register value. */
868 #define FIRST_PARM_OFFSET(FNDECL) 0
870 /* Value is the number of bytes of arguments automatically
871 popped when returning from a subroutine call.
872 FUNDECL is the declaration node of the function (as a tree),
873 FUNTYPE is the data type of the function (as a tree),
874 or for a library call it is an identifier node for the subroutine name.
875 SIZE is the number of bytes of arguments passed on the stack.
877 On the 80386, the RTD insn may be used to pop them if the number
878 of args is fixed, but if the number is variable then the caller
879 must pop them all. RTD can't be used for library calls now
880 because the library is compiled with the Unix compiler.
881 Use of RTD is a selectable option, since it is incompatible with
882 standard Unix calling sequences. If the option is not selected,
883 the caller must always pop the args.
885 The attribute stdcall is equivalent to RTD on a per module basis. */
887 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
888 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
890 /* Define how to find the value returned by a function.
891 VALTYPE is the data type of the value (as a tree).
892 If the precise function being called is known, FUNC is its FUNCTION_DECL;
893 otherwise, FUNC is 0. */
894 #define FUNCTION_VALUE(VALTYPE, FUNC) \
895 gen_rtx (REG, TYPE_MODE (VALTYPE), \
896 VALUE_REGNO (TYPE_MODE (VALTYPE)))
898 /* Define how to find the value returned by a library function
899 assuming the value has mode MODE. */
901 #define LIBCALL_VALUE(MODE) \
902 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
904 /* Define the size of the result block used for communication between
905 untyped_call and untyped_return. The block contains a DImode value
906 followed by the block used by fnsave and frstor. */
908 #define APPLY_RESULT_SIZE (8+108)
910 /* 1 if N is a possible register number for function argument passing. */
911 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
913 /* Define a data type for recording info about an argument list
914 during the scan of that argument list. This data type should
915 hold all necessary information about the function itself
916 and about the args processed so far, enough to enable macros
917 such as FUNCTION_ARG to determine where the next arg should go. */
919 typedef struct i386_args {
920 int words; /* # words passed so far */
921 int nregs; /* # registers available for passing */
922 int regno; /* next available register number */
925 /* Initialize a variable CUM of type CUMULATIVE_ARGS
926 for a call to a function whose data type is FNTYPE.
927 For a library call, FNTYPE is 0. */
929 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
930 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
932 /* Update the data in CUM to advance over an argument
933 of mode MODE and data type TYPE.
934 (TYPE is null for libcalls where that information may not be available.) */
936 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
937 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
939 /* Define where to put the arguments to a function.
940 Value is zero to push the argument on the stack,
941 or a hard register in which to store the argument.
943 MODE is the argument's machine mode.
944 TYPE is the data type of the argument (as a tree).
945 This is null for libcalls where that information may
947 CUM is a variable of type CUMULATIVE_ARGS which gives info about
948 the preceding args and about the function being called.
949 NAMED is nonzero if this argument is a named parameter
950 (otherwise it is an extra parameter matching an ellipsis). */
952 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
953 (function_arg (&CUM, MODE, TYPE, NAMED))
955 /* For an arg passed partly in registers and partly in memory,
956 this is the number of registers used.
957 For args passed entirely in registers or entirely in memory, zero. */
959 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
960 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
962 /* This macro is invoked just before the start of a function.
963 It is used here to output code for -fpic that will load the
964 return address into %ebx. */
966 #undef ASM_OUTPUT_FUNCTION_PREFIX
967 #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME) \
968 asm_output_function_prefix (FILE, FNNAME)
970 /* This macro generates the assembly code for function entry.
971 FILE is a stdio stream to output the code to.
972 SIZE is an int: how many units of temporary storage to allocate.
973 Refer to the array `regs_ever_live' to determine which registers
974 to save; `regs_ever_live[I]' is nonzero if register number I
975 is ever used in the function. This macro is responsible for
976 knowing which registers should not be saved even if used. */
978 #define FUNCTION_PROLOGUE(FILE, SIZE) \
979 function_prologue (FILE, SIZE)
981 /* Output assembler code to FILE to increment profiler label # LABELNO
982 for profiling a function entry. */
984 #define FUNCTION_PROFILER(FILE, LABELNO) \
988 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
989 LPREFIX, (LABELNO)); \
990 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
994 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
995 fprintf (FILE, "\tcall _mcount\n"); \
1000 /* There are three profiling modes for basic blocks available.
1001 The modes are selected at compile time by using the options
1002 -a or -ax of the gnu compiler.
1003 The variable `profile_block_flag' will be set according to the
1006 profile_block_flag == 0, no option used:
1010 profile_block_flag == 1, -a option used.
1012 Count frequency of execution of every basic block.
1014 profile_block_flag == 2, -ax option used.
1016 Generate code to allow several different profiling modes at run time.
1017 Available modes are:
1018 Produce a trace of all basic blocks.
1019 Count frequency of jump instructions executed.
1020 In every mode it is possible to start profiling upon entering
1021 certain functions and to disable profiling of some other functions.
1023 The result of basic-block profiling will be written to a file `bb.out'.
1024 If the -ax option is used parameters for the profiling will be read
1029 /* The following macro shall output assembler code to FILE
1030 to initialize basic-block profiling.
1032 If profile_block_flag == 2
1034 Output code to call the subroutine `__bb_init_trace_func'
1035 and pass two parameters to it. The first parameter is
1036 the address of a block allocated in the object module.
1037 The second parameter is the number of the first basic block
1040 The name of the block is a local symbol made with this statement:
1042 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1044 Of course, since you are writing the definition of
1045 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1046 can take a short cut in the definition of this macro and use the
1047 name that you know will result.
1049 The number of the first basic block of the function is
1050 passed to the macro in BLOCK_OR_LABEL.
1052 If described in a virtual assembler language the code to be
1056 parameter2 <- BLOCK_OR_LABEL
1057 call __bb_init_trace_func
1059 else if profile_block_flag != 0
1061 Output code to call the subroutine `__bb_init_func'
1062 and pass one single parameter to it, which is the same
1063 as the first parameter to `__bb_init_trace_func'.
1065 The first word of this parameter is a flag which will be nonzero if
1066 the object module has already been initialized. So test this word
1067 first, and do not call `__bb_init_func' if the flag is nonzero.
1068 Note: When profile_block_flag == 2 the test need not be done
1069 but `__bb_init_trace_func' *must* be called.
1071 BLOCK_OR_LABEL may be used to generate a label number as a
1072 branch destination in case `__bb_init_func' will not be called.
1074 If described in a virtual assembler language the code to be
1085 #undef FUNCTION_BLOCK_PROFILER
1086 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
1089 static int num_func = 0; \
1091 char block_table[80], false_label[80]; \
1093 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1095 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
1096 xops[5] = stack_pointer_rtx; \
1097 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
1099 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1101 switch (profile_block_flag) \
1106 xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \
1107 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_trace_func")); \
1108 xops[6] = GEN_INT (8); \
1110 output_asm_insn (AS1(push%L2,%2), xops); \
1112 output_asm_insn (AS1(push%L1,%1), xops); \
1115 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1116 output_asm_insn (AS1 (push%L7,%7), xops); \
1119 output_asm_insn (AS1(call,%P3), xops); \
1120 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1126 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
1128 xops[0] = const0_rtx; \
1129 xops[2] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, false_label)); \
1130 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_func")); \
1131 xops[4] = gen_rtx (MEM, Pmode, xops[1]); \
1132 xops[6] = GEN_INT (4); \
1134 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
1136 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
1137 output_asm_insn (AS1(jne,%2), xops); \
1140 output_asm_insn (AS1(push%L1,%1), xops); \
1143 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1144 output_asm_insn (AS1 (push%L7,%7), xops); \
1147 output_asm_insn (AS1(call,%P3), xops); \
1148 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1149 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LPBZ", num_func); \
1158 /* The following macro shall output assembler code to FILE
1159 to increment a counter associated with basic block number BLOCKNO.
1161 If profile_block_flag == 2
1163 Output code to initialize the global structure `__bb' and
1164 call the function `__bb_trace_func' which will increment the
1167 `__bb' consists of two words. In the first word the number
1168 of the basic block has to be stored. In the second word
1169 the address of a block allocated in the object module
1172 The basic block number is given by BLOCKNO.
1174 The address of the block is given by the label created with
1176 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1178 by FUNCTION_BLOCK_PROFILER.
1180 Of course, since you are writing the definition of
1181 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1182 can take a short cut in the definition of this macro and use the
1183 name that you know will result.
1185 If described in a virtual assembler language the code to be
1188 move BLOCKNO -> (__bb)
1189 move LPBX0 -> (__bb+4)
1190 call __bb_trace_func
1192 Note that function `__bb_trace_func' must not change the
1193 machine state, especially the flag register. To grant
1194 this, you must output code to save and restore registers
1195 either in this macro or in the macros MACHINE_STATE_SAVE
1196 and MACHINE_STATE_RESTORE. The last two macros will be
1197 used in the function `__bb_trace_func', so you must make
1198 sure that the function prologue does not change any
1199 register prior to saving it with MACHINE_STATE_SAVE.
1201 else if profile_block_flag != 0
1203 Output code to increment the counter directly.
1204 Basic blocks are numbered separately from zero within each
1205 compiled object module. The count associated with block number
1206 BLOCKNO is at index BLOCKNO in an array of words; the name of
1207 this array is a local symbol made with this statement:
1209 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1211 Of course, since you are writing the definition of
1212 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1213 can take a short cut in the definition of this macro and use the
1214 name that you know will result.
1216 If described in a virtual assembler language the code to be
1219 inc (LPBX2+4*BLOCKNO)
1223 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1226 rtx xops[8], cnt_rtx; \
1228 char *block_table = counts; \
1230 switch (profile_block_flag) \
1235 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1237 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
1238 xops[2] = GEN_INT ((BLOCKNO)); \
1239 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_func")); \
1240 xops[4] = gen_rtx (SYMBOL_REF, VOIDmode, "__bb"); \
1241 xops[5] = plus_constant (xops[4], 4); \
1242 xops[0] = gen_rtx (MEM, SImode, xops[4]); \
1243 xops[6] = gen_rtx (MEM, SImode, xops[5]); \
1245 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1247 fprintf(FILE, "\tpushf\n"); \
1248 output_asm_insn (AS2(mov%L0,%2,%0), xops); \
1251 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
1252 output_asm_insn (AS1(push%L7,%7), xops); \
1253 output_asm_insn (AS2(lea%L7,%a1,%7), xops); \
1254 output_asm_insn (AS2(mov%L6,%7,%6), xops); \
1255 output_asm_insn (AS1(pop%L7,%7), xops); \
1258 output_asm_insn (AS2(mov%L6,%1,%6), xops); \
1259 output_asm_insn (AS1(call,%P3), xops); \
1260 fprintf(FILE, "\tpopf\n"); \
1266 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
1267 cnt_rtx = gen_rtx (SYMBOL_REF, VOIDmode, counts); \
1268 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
1271 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
1274 cnt_rtx = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, cnt_rtx); \
1276 xops[0] = gen_rtx (MEM, SImode, cnt_rtx); \
1277 output_asm_insn (AS1(inc%L0,%0), xops); \
1285 /* The following macro shall output assembler code to FILE
1286 to indicate a return from function during basic-block profiling.
1288 If profiling_block_flag == 2:
1290 Output assembler code to call function `__bb_trace_ret'.
1292 Note that function `__bb_trace_ret' must not change the
1293 machine state, especially the flag register. To grant
1294 this, you must output code to save and restore registers
1295 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1296 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1297 used in the function `__bb_trace_ret', so you must make
1298 sure that the function prologue does not change any
1299 register prior to saving it with MACHINE_STATE_SAVE_RET.
1301 else if profiling_block_flag != 0:
1303 The macro will not be used, so it need not distinguish
1307 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1312 xops[0] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_ret")); \
1314 output_asm_insn (AS1(call,%P0), xops); \
1319 /* The function `__bb_trace_func' is called in every basic block
1320 and is not allowed to change the machine state. Saving (restoring)
1321 the state can either be done in the BLOCK_PROFILER macro,
1322 before calling function (rsp. after returning from function)
1323 `__bb_trace_func', or it can be done inside the function by
1324 defining the macros:
1326 MACHINE_STATE_SAVE(ID)
1327 MACHINE_STATE_RESTORE(ID)
1329 In the latter case care must be taken, that the prologue code
1330 of function `__bb_trace_func' does not already change the
1331 state prior to saving it with MACHINE_STATE_SAVE.
1333 The parameter `ID' is a string identifying a unique macro use.
1335 On the i386 the initialization code at the begin of
1336 function `__bb_trace_func' contains a `sub' instruction
1337 therefore we handle save and restore of the flag register
1338 in the BLOCK_PROFILER macro. */
1340 #define MACHINE_STATE_SAVE(ID) \
1341 asm (" pushl %eax"); \
1342 asm (" pushl %ecx"); \
1343 asm (" pushl %edx"); \
1344 asm (" pushl %esi");
1346 #define MACHINE_STATE_RESTORE(ID) \
1347 asm (" popl %esi"); \
1348 asm (" popl %edx"); \
1349 asm (" popl %ecx"); \
1352 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1353 the stack pointer does not matter. The value is tested only in
1354 functions that have frame pointers.
1355 No definition is equivalent to always zero. */
1356 /* Note on the 386 it might be more efficient not to define this since
1357 we have to restore it ourselves from the frame pointer, in order to
1360 #define EXIT_IGNORE_STACK 1
1362 /* This macro generates the assembly code for function exit,
1363 on machines that need it. If FUNCTION_EPILOGUE is not defined
1364 then individual return instructions are generated for each
1365 return statement. Args are same as for FUNCTION_PROLOGUE.
1367 The function epilogue should not depend on the current stack pointer!
1368 It should use the frame pointer only. This is mandatory because
1369 of alloca; we also take advantage of it to omit stack adjustments
1372 If the last non-note insn in the function is a BARRIER, then there
1373 is no need to emit a function prologue, because control does not fall
1374 off the end. This happens if the function ends in an "exit" call, or
1375 if a `return' insn is emitted directly into the function. */
1378 #define FUNCTION_BEGIN_EPILOGUE(FILE) \
1380 rtx last = get_last_insn (); \
1381 if (last && GET_CODE (last) == NOTE) \
1382 last = prev_nonnote_insn (last); \
1383 /* if (! last || GET_CODE (last) != BARRIER) \
1384 function_epilogue (FILE, SIZE);*/ \
1388 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1389 function_epilogue (FILE, SIZE)
1391 /* Output assembler code for a block containing the constant parts
1392 of a trampoline, leaving space for the variable parts. */
1394 /* On the 386, the trampoline contains three instructions:
1398 #define TRAMPOLINE_TEMPLATE(FILE) \
1400 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
1401 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1402 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1403 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
1404 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1405 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1406 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
1407 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
1410 /* Length in units of the trampoline for entering a nested function. */
1412 #define TRAMPOLINE_SIZE 12
1414 /* Emit RTL insns to initialize the variable parts of a trampoline.
1415 FNADDR is an RTX for the address of the function's pure code.
1416 CXT is an RTX for the static chain value for the function. */
1418 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1420 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
1421 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
1424 /* Definitions for register eliminations.
1426 This is an array of structures. Each structure initializes one pair
1427 of eliminable registers. The "from" register number is given first,
1428 followed by "to". Eliminations of the same "from" register are listed
1429 in order of preference.
1431 We have two registers that can be eliminated on the i386. First, the
1432 frame pointer register can often be eliminated in favor of the stack
1433 pointer register. Secondly, the argument pointer register can always be
1434 eliminated; it is replaced with either the stack or frame pointer. */
1436 #define ELIMINABLE_REGS \
1437 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1438 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1439 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1441 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1442 Frame pointer elimination is automatically handled.
1444 For the i386, if frame pointer elimination is being done, we would like to
1445 convert ap into sp, not fp.
1447 All other eliminations are valid. */
1449 #define CAN_ELIMINATE(FROM, TO) \
1450 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1451 ? ! frame_pointer_needed \
1454 /* Define the offset between two registers, one to be eliminated, and the other
1455 its replacement, at the start of a routine. */
1457 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1459 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1460 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1466 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1467 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
1468 || (current_function_uses_pic_offset_table \
1469 && regno == PIC_OFFSET_TABLE_REGNUM)) \
1472 (OFFSET) = offset + get_frame_size (); \
1474 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1475 (OFFSET) += 4; /* Skip saved PC */ \
1479 /* Addressing modes, and classification of registers for them. */
1481 /* #define HAVE_POST_INCREMENT */
1482 /* #define HAVE_POST_DECREMENT */
1484 /* #define HAVE_PRE_DECREMENT */
1485 /* #define HAVE_PRE_INCREMENT */
1487 /* Macros to check register numbers against specific register classes. */
1489 /* These assume that REGNO is a hard or pseudo reg number.
1490 They give nonzero only if REGNO is a hard reg of the suitable class
1491 or a pseudo reg currently allocated to a suitable hard reg.
1492 Since they use reg_renumber, they are safe only once reg_renumber
1493 has been allocated, which happens in local-alloc.c. */
1495 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1496 ((REGNO) < STACK_POINTER_REGNUM \
1497 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1499 #define REGNO_OK_FOR_BASE_P(REGNO) \
1500 ((REGNO) <= STACK_POINTER_REGNUM \
1501 || (REGNO) == ARG_POINTER_REGNUM \
1502 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1504 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1505 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1507 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1508 and check its validity for a certain class.
1509 We have two alternate definitions for each of them.
1510 The usual definition accepts all pseudo regs; the other rejects
1511 them unless they have been allocated suitable hard regs.
1512 The symbol REG_OK_STRICT causes the latter definition to be used.
1514 Most source files want to accept pseudo regs in the hope that
1515 they will get allocated to the class that the insn wants them to be in.
1516 Source files for reload pass need to be strict.
1517 After reload, it makes no difference, since pseudo regs have
1518 been eliminated by then. */
1521 /* Non strict versions, pseudos are ok */
1522 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1523 (REGNO (X) < STACK_POINTER_REGNUM \
1524 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1526 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1527 (REGNO (X) <= STACK_POINTER_REGNUM \
1528 || REGNO (X) == ARG_POINTER_REGNUM \
1529 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1531 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1532 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1534 /* Strict versions, hard registers only */
1535 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1536 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1537 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1538 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1540 #ifndef REG_OK_STRICT
1541 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1542 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1543 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1546 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1547 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1548 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1551 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1552 that is a valid memory address for an instruction.
1553 The MODE argument is the machine mode for the MEM expression
1554 that wants to use this address.
1556 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1557 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1559 See legitimize_pic_address in i386.c for details as to what
1560 constitutes a legitimate address when -fpic is used. */
1562 #define MAX_REGS_PER_ADDRESS 2
1564 #define CONSTANT_ADDRESS_P(X) \
1565 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1566 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1567 || GET_CODE (X) == HIGH)
1569 /* Nonzero if the constant value X is a legitimate general operand.
1570 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1572 #define LEGITIMATE_CONSTANT_P(X) 1
1574 #ifdef REG_OK_STRICT
1575 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1577 if (legitimate_address_p (MODE, X, 1)) \
1582 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1584 if (legitimate_address_p (MODE, X, 0)) \
1590 /* Try machine-dependent ways of modifying an illegitimate address
1591 to be legitimate. If we find one, return the new, valid address.
1592 This macro is used in only one place: `memory_address' in explow.c.
1594 OLDX is the address as it was before break_out_memory_refs was called.
1595 In some cases it is useful to look at this to decide what needs to be done.
1597 MODE and WIN are passed so that this macro can use
1598 GO_IF_LEGITIMATE_ADDRESS.
1600 It is always safe for this macro to do nothing. It exists to recognize
1601 opportunities to optimize the output.
1603 For the 80386, we handle X+REG by loading X into a register R and
1604 using R+REG. R will go in a general reg and indexing will be used.
1605 However, if REG is a broken-out memory address or multiplication,
1606 nothing needs to be done because REG can certainly go in a general reg.
1608 When -fpic is used, special handling is needed for symbolic references.
1609 See comments by legitimize_pic_address in i386.c for details. */
1611 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1614 (X) = legitimize_address (X, OLDX, MODE); \
1615 if (memory_address_p (MODE, X)) \
1619 #define REWRITE_ADDRESS(x) rewrite_address(x)
1621 /* Nonzero if the constant value X is a legitimate general operand
1622 when generating PIC code. It is given that flag_pic is on and
1623 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1625 #define LEGITIMATE_PIC_OPERAND_P(X) \
1626 (! SYMBOLIC_CONST (X) \
1627 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1629 #define SYMBOLIC_CONST(X) \
1630 (GET_CODE (X) == SYMBOL_REF \
1631 || GET_CODE (X) == LABEL_REF \
1632 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1634 /* Go to LABEL if ADDR (a legitimate address expression)
1635 has an effect that depends on the machine mode it is used for.
1636 On the 80386, only postdecrement and postincrement address depend thus
1637 (the amount of decrement or increment being the length of the operand). */
1638 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1639 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1641 /* Define this macro if references to a symbol must be treated
1642 differently depending on something about the variable or
1643 function named by the symbol (such as what section it is in).
1645 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1646 so that we may access it directly in the GOT. */
1648 #define ENCODE_SECTION_INFO(DECL) \
1653 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1654 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1656 if (TARGET_DEBUG_ADDR \
1657 && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \
1659 fprintf (stderr, "Encode %s, public = %s\n", \
1660 IDENTIFIER_POINTER (DECL_NAME (DECL)), \
1661 TREE_PUBLIC (DECL)); \
1664 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1665 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1666 || ! TREE_PUBLIC (DECL)); \
1671 /* Initialize data used by insn expanders. This is called from
1672 init_emit, once for each function, before code is generated.
1673 For 386, clear stack slot assignments remembered from previous
1676 #define INIT_EXPANDERS clear_386_stack_locals ()
1678 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1679 codes once the function is being compiled into assembly code, but
1680 not before. (It is not done before, because in the case of
1681 compiling an inline function, it would lead to multiple PIC
1682 prologues being included in functions which used inline functions
1683 and were compiled to assembly language.) */
1685 #define FINALIZE_PIC \
1688 extern int current_function_uses_pic_offset_table; \
1690 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1695 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1696 with arguments ARGS is a valid machine specific attribute for DECL.
1697 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1699 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1700 (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1702 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1703 with arguments ARGS is a valid machine specific attribute for TYPE.
1704 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1706 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1707 (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1709 /* If defined, a C expression whose value is zero if the attributes on
1710 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1711 two if they are nearly compatible (which causes a warning to be
1714 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1715 (i386_comp_type_attributes (TYPE1, TYPE2))
1717 /* If defined, a C statement that assigns default attributes to newly
1720 /* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1722 /* Max number of args passed in registers. If this is more than 3, we will
1723 have problems with ebx (register #4), since it is a caller save register and
1724 is also used as the pic register in ELF. So for now, don't allow more than
1725 3 registers to be passed in registers. */
1727 #define REGPARM_MAX 3
1730 /* Specify the machine mode that this machine uses
1731 for the index in the tablejump instruction. */
1732 #define CASE_VECTOR_MODE Pmode
1734 /* Define this if the tablejump instruction expects the table
1735 to contain offsets from the address of the table.
1736 Do not define this if the table should contain absolute addresses. */
1737 /* #define CASE_VECTOR_PC_RELATIVE */
1739 /* Specify the tree operation to be used to convert reals to integers.
1740 This should be changed to take advantage of fist --wfs ??
1742 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1744 /* This is the kind of divide that is easiest to do in the general case. */
1745 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1747 /* Define this as 1 if `char' should by default be signed; else as 0. */
1748 #define DEFAULT_SIGNED_CHAR 1
1750 /* Max number of bytes we can move from memory to memory
1751 in one reasonably fast instruction. */
1754 /* The number of scalar move insns which should be generated instead
1755 of a string move insn or a library call. Increasing the value
1756 will always make code faster, but eventually incurs high cost in
1757 increased code size.
1759 If you don't define this, a reasonable default is used.
1761 Make this large on i386, since the block move is very inefficient with small
1762 blocks, and the hard register needs of the block move require much reload
1765 #define MOVE_RATIO 5
1767 /* Define if shifts truncate the shift count
1768 which implies one can omit a sign-extension or zero-extension
1769 of a shift count. */
1770 /* On i386, shifts do truncate the count. But bit opcodes don't. */
1772 /* #define SHIFT_COUNT_TRUNCATED */
1774 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1775 is done just by pretending it is already truncated. */
1776 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1778 /* We assume that the store-condition-codes instructions store 0 for false
1779 and some other value for true. This is the value stored for true. */
1781 #define STORE_FLAG_VALUE 1
1783 /* When a prototype says `char' or `short', really pass an `int'.
1784 (The 386 can't easily push less than an int.) */
1786 #define PROMOTE_PROTOTYPES
1788 /* Specify the machine mode that pointers have.
1789 After generation of rtl, the compiler makes no further distinction
1790 between pointers and any other objects of this machine mode. */
1791 #define Pmode SImode
1793 /* A function address in a call instruction
1794 is a byte address (for indexing purposes)
1795 so give the MEM rtx a byte's mode. */
1796 #define FUNCTION_MODE QImode
1798 /* A part of a C `switch' statement that describes the relative costs
1799 of constant RTL expressions. It must contain `case' labels for
1800 expression codes `const_int', `const', `symbol_ref', `label_ref'
1801 and `const_double'. Each case must ultimately reach a `return'
1802 statement to return the relative cost of the use of that kind of
1803 constant value in an expression. The cost may depend on the
1804 precise value of the constant, which is available for examination
1805 in X, and the rtx code of the expression in which it is contained,
1806 found in OUTER_CODE.
1808 CODE is the expression code--redundant, since it can be obtained
1809 with `GET_CODE (X)'. */
1811 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1816 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 1; \
1818 case CONST_DOUBLE: \
1821 if (GET_MODE (RTX) == VOIDmode) \
1824 code = standard_80387_constant_p (RTX); \
1825 return code == 1 ? 0 : \
1830 /* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */
1831 #define TOPLEVEL_COSTS_N_INSNS(N) {total = COSTS_N_INSNS (N); break;}
1833 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1834 This can be used, for example, to indicate how costly a multiply
1835 instruction is. In writing this macro, you can use the construct
1836 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1837 instructions. OUTER_CODE is the code of the expression in which X
1840 This macro is optional; do not define it if the default cost
1841 assumptions are adequate for the target machine. */
1843 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1845 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1846 && GET_MODE (XEXP (X, 0)) == SImode) \
1848 HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1851 return COSTS_N_INSNS (ix86_cost->add) \
1852 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1854 if (value == 2 || value == 3) \
1855 return COSTS_N_INSNS (ix86_cost->lea) \
1856 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1858 /* fall through */ \
1864 if (GET_MODE (XEXP (X, 0)) == DImode) \
1866 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1867 if (INTVAL (XEXP (X, 1)) > 32) \
1868 return COSTS_N_INSNS(ix86_cost->shift_const + 2); \
1870 return COSTS_N_INSNS(ix86_cost->shift_const * 2); \
1871 return ((GET_CODE (XEXP (X, 1)) == AND \
1872 ? COSTS_N_INSNS(ix86_cost->shift_var * 2) \
1873 : COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2)) \
1874 + rtx_cost(XEXP (X, 0), OUTER_CODE)); \
1876 return COSTS_N_INSNS (GET_CODE (XEXP (X, 1)) == CONST_INT \
1877 ? ix86_cost->shift_const \
1878 : ix86_cost->shift_var) \
1879 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1882 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1884 unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1888 return COSTS_N_INSNS (ix86_cost->add) \
1889 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1890 if (value == 4 || value == 8) \
1891 return COSTS_N_INSNS (ix86_cost->lea) \
1892 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1894 while (value != 0) \
1901 return COSTS_N_INSNS (ix86_cost->shift_const) \
1902 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1904 return COSTS_N_INSNS (ix86_cost->mult_init \
1905 + nbits * ix86_cost->mult_bit) \
1906 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1909 else /* This is arbitrary */ \
1910 TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \
1911 + 7 * ix86_cost->mult_bit); \
1917 TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \
1920 if (GET_CODE (XEXP (X, 0)) == REG \
1921 && GET_MODE (XEXP (X, 0)) == SImode \
1922 && GET_CODE (XEXP (X, 1)) == PLUS) \
1923 return COSTS_N_INSNS (ix86_cost->lea); \
1925 /* fall through */ \
1930 if (GET_MODE (X) == DImode) \
1931 return COSTS_N_INSNS (ix86_cost->add) * 2 \
1932 + (rtx_cost (XEXP (X, 0), OUTER_CODE) \
1933 << (GET_MODE (XEXP (X, 0)) != DImode)) \
1934 + (rtx_cost (XEXP (X, 1), OUTER_CODE) \
1935 << (GET_MODE (XEXP (X, 1)) != DImode)); \
1938 if (GET_MODE (X) == DImode) \
1939 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2) \
1940 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add)
1943 /* An expression giving the cost of an addressing mode that contains
1944 ADDRESS. If not defined, the cost is computed from the ADDRESS
1945 expression and the `CONST_COSTS' values.
1947 For most CISC machines, the default cost is a good approximation
1948 of the true cost of the addressing mode. However, on RISC
1949 machines, all instructions normally have the same length and
1950 execution time. Hence all addresses will have equal costs.
1952 In cases where more than one form of an address is known, the form
1953 with the lowest cost will be used. If multiple forms have the
1954 same, lowest, cost, the one that is the most complex will be used.
1956 For example, suppose an address that is equal to the sum of a
1957 register and a constant is used twice in the same basic block.
1958 When this macro is not defined, the address will be computed in a
1959 register and memory references will be indirect through that
1960 register. On machines where the cost of the addressing mode
1961 containing the sum is no higher than that of a simple indirect
1962 reference, this will produce an additional instruction and
1963 possibly require an additional register. Proper specification of
1964 this macro eliminates this overhead for such machines.
1966 Similar use of this macro is made in strength reduction of loops.
1968 ADDRESS need not be valid as an address. In such a case, the cost
1969 is not relevant and can be any value; invalid addresses need not be
1970 assigned a different cost.
1972 On machines where an address involving more than one register is as
1973 cheap as an address computation involving only one register,
1974 defining `ADDRESS_COST' to reflect this can cause two registers to
1975 be live over a region of code where only one would have been if
1976 `ADDRESS_COST' were not defined in that manner. This effect should
1977 be considered in the definition of this macro. Equivalent costs
1978 should probably only be given to addresses with different numbers
1979 of registers on machines with lots of registers.
1981 This macro will normally either not be defined or be defined as a
1984 For i386, it is better to use a complex address than let gcc copy
1985 the address into a reg and make a new pseudo. But not if the address
1986 requires to two regs - that would mean more pseudos with longer
1989 #define ADDRESS_COST(RTX) \
1990 ((CONSTANT_P (RTX) \
1991 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1992 && REG_P (XEXP (RTX, 0)))) ? 0 \
1996 /* A C expression for the cost of moving data of mode M between a
1997 register and memory. A value of 2 is the default; this cost is
1998 relative to those in `REGISTER_MOVE_COST'.
2000 If moving between registers and memory is more expensive than
2001 between two registers, you should define this macro to express the
2004 On the i386, copying between floating-point and fixed-point
2005 registers is expensive. */
2007 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
2008 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
2009 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
2013 /* A C expression for the cost of moving data of mode M between a
2014 register and memory. A value of 2 is the default; this cost is
2015 relative to those in `REGISTER_MOVE_COST'.
2017 If moving between registers and memory is more expensive than
2018 between two registers, you should define this macro to express the
2021 /* #define MEMORY_MOVE_COST(M) 2 */
2023 /* A C expression for the cost of a branch instruction. A value of 1
2024 is the default; other values are interpreted relative to that. */
2026 #define BRANCH_COST i386_branch_cost
2028 /* Define this macro as a C expression which is nonzero if accessing
2029 less than a word of memory (i.e. a `char' or a `short') is no
2030 faster than accessing a word of memory, i.e., if such access
2031 require more than one instruction or if there is no difference in
2032 cost between byte and (aligned) word loads.
2034 When this macro is not defined, the compiler will access a field by
2035 finding the smallest containing object; when it is defined, a
2036 fullword load will be used if alignment permits. Unless bytes
2037 accesses are faster than word accesses, using word accesses is
2038 preferable since it may eliminate subsequent memory access if
2039 subsequent accesses occur to other fields in the same word of the
2040 structure, but to different bytes. */
2042 #define SLOW_BYTE_ACCESS 0
2044 /* Nonzero if access to memory by shorts is slow and undesirable. */
2045 #define SLOW_SHORT_ACCESS 0
2047 /* Define this macro if zero-extension (of a `char' or `short' to an
2048 `int') can be done faster if the destination is a register that is
2051 If you define this macro, you must have instruction patterns that
2052 recognize RTL structures like this:
2054 (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
2056 and likewise for `HImode'. */
2058 /* #define SLOW_ZERO_EXTEND */
2060 /* Define this macro to be the value 1 if unaligned accesses have a
2061 cost many times greater than aligned accesses, for example if they
2062 are emulated in a trap handler.
2064 When this macro is non-zero, the compiler will act as if
2065 `STRICT_ALIGNMENT' were non-zero when generating code for block
2066 moves. This can cause significantly more instructions to be
2067 produced. Therefore, do not set this macro non-zero if unaligned
2068 accesses only add a cycle or two to the time for a memory access.
2070 If the value of this macro is always zero, it need not be defined. */
2072 /* #define SLOW_UNALIGNED_ACCESS 0 */
2074 /* Define this macro to inhibit strength reduction of memory
2075 addresses. (On some machines, such strength reduction seems to do
2076 harm rather than good.) */
2078 /* #define DONT_REDUCE_ADDR */
2080 /* Define this macro if it is as good or better to call a constant
2081 function address than to call an address kept in a register.
2083 Desirable on the 386 because a CALL with a constant address is
2084 faster than one with a register address. */
2086 #define NO_FUNCTION_CSE
2088 /* Define this macro if it is as good or better for a function to call
2089 itself with an explicit address than to call an address kept in a
2092 #define NO_RECURSIVE_FUNCTION_CSE
2094 /* A C statement (sans semicolon) to update the integer variable COST
2095 based on the relationship between INSN that is dependent on
2096 DEP_INSN through the dependence LINK. The default is to make no
2097 adjustment to COST. This can be used for example to specify to
2098 the scheduler that an output- or anti-dependence does not incur
2099 the same cost as a data-dependence. */
2101 #define ADJUST_COST(insn,link,dep_insn,cost) \
2104 if (GET_CODE (dep_insn) == CALL_INSN) \
2107 else if (GET_CODE (dep_insn) == INSN \
2108 && GET_CODE (PATTERN (dep_insn)) == SET \
2109 && GET_CODE (SET_DEST (PATTERN (dep_insn))) == REG \
2110 && GET_CODE (insn) == INSN \
2111 && GET_CODE (PATTERN (insn)) == SET \
2112 && !reg_overlap_mentioned_p (SET_DEST (PATTERN (dep_insn)), \
2113 SET_SRC (PATTERN (insn)))) \
2118 else if (GET_CODE (insn) == JUMP_INSN) \
2123 if (TARGET_PENTIUM) \
2125 if (cost !=0 && is_fp_insn (insn) && is_fp_insn (dep_insn) \
2126 && !is_fp_dest (dep_insn)) \
2131 if (agi_dependent (insn, dep_insn)) \
2135 else if (GET_CODE (insn) == INSN \
2136 && GET_CODE (PATTERN (insn)) == SET \
2137 && SET_DEST (PATTERN (insn)) == cc0_rtx \
2138 && (next_inst = next_nonnote_insn (insn)) \
2139 && GET_CODE (next_inst) == JUMP_INSN) \
2140 { /* compare probably paired with jump */ \
2145 if (!is_fp_dest (dep_insn)) \
2147 if(!agi_dependent (insn, dep_insn)) \
2149 else if (TARGET_486) \
2153 if (is_fp_store (insn) && is_fp_insn (dep_insn) \
2154 && NEXT_INSN (insn) && NEXT_INSN (NEXT_INSN (insn)) \
2155 && NEXT_INSN (NEXT_INSN (NEXT_INSN (insn))) \
2156 && (GET_CODE (NEXT_INSN (insn)) == INSN) \
2157 && (GET_CODE (NEXT_INSN (NEXT_INSN (insn))) == JUMP_INSN) \
2158 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) == NOTE) \
2159 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) \
2160 == NOTE_INSN_LOOP_END)) \
2167 #define ADJUST_BLOCKAGE(last_insn,insn,blockage) \
2169 if (is_fp_store (last_insn) && is_fp_insn (insn) \
2170 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \
2171 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \
2172 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \
2173 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \
2174 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \
2175 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \
2176 == NOTE_INSN_LOOP_END)) \
2183 /* Add any extra modes needed to represent the condition code.
2185 For the i386, we need separate modes when floating-point equality
2186 comparisons are being done. */
2188 #define EXTRA_CC_MODES CCFPEQmode
2190 /* Define the names for the modes specified above. */
2191 #define EXTRA_CC_NAMES "CCFPEQ"
2193 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
2194 return the mode to be used for the comparison.
2196 For floating-point equality comparisons, CCFPEQmode should be used.
2197 VOIDmode should be used in all other cases. */
2199 #define SELECT_CC_MODE(OP,X,Y) \
2200 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2201 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
2203 /* Define the information needed to generate branch and scc insns. This is
2204 stored from the compare operation. Note that we can't use "rtx" here
2205 since it hasn't been defined! */
2207 extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
2209 /* Tell final.c how to eliminate redundant test instructions. */
2211 /* Here we define machine-dependent flags and fields in cc_status
2212 (see `conditions.h'). */
2214 /* Set if the cc value is was actually from the 80387 and
2215 we are testing eax directly (i.e. no sahf) */
2216 #define CC_TEST_AX 020000
2218 /* Set if the cc value is actually in the 80387, so a floating point
2219 conditional branch must be output. */
2220 #define CC_IN_80387 04000
2222 /* Set if the CC value was stored in a nonstandard way, so that
2223 the state of equality is indicated by zero in the carry bit. */
2224 #define CC_Z_IN_NOT_C 010000
2226 /* Store in cc_status the expressions
2227 that the condition codes will describe
2228 after execution of an instruction whose pattern is EXP.
2229 Do not alter them if the instruction would not alter the cc's. */
2231 #define NOTICE_UPDATE_CC(EXP, INSN) \
2232 notice_update_cc((EXP))
2234 /* Output a signed jump insn. Use template NORMAL ordinarily, or
2235 FLOAT following a floating point comparison.
2236 Use NO_OV following an arithmetic insn that set the cc's
2237 before a test insn that was deleted.
2238 NO_OV may be zero, meaning final should reinsert the test insn
2239 because the jump cannot be handled properly without it. */
2241 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
2243 if (cc_prev_status.flags & CC_IN_80387) \
2245 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
2250 /* Control the assembler format that we output, to the extent
2251 this does not vary between assemblers. */
2253 /* How to refer to registers in assembler output.
2254 This sequence is indexed by compiler's hard-register-number (see above). */
2256 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
2257 For non floating point regs, the following are the HImode names.
2259 For float regs, the stack top is sometimes referred to as "%st(0)"
2260 instead of just "%st". PRINT_REG handles this with the "y" code. */
2262 #define HI_REGISTER_NAMES \
2263 {"ax","dx","cx","bx","si","di","bp","sp", \
2264 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
2266 #define REGISTER_NAMES HI_REGISTER_NAMES
2268 /* Table of additional register names to use in user input. */
2270 #define ADDITIONAL_REGISTER_NAMES \
2271 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
2272 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
2273 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
2274 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
2276 /* Note we are omitting these since currently I don't know how
2277 to get gcc to use these, since they want the same but different
2278 number as al, and ax.
2281 /* note the last four are not really qi_registers, but
2282 the md will have to never output movb into one of them
2283 only a movw . There is no movb into the last four regs */
2285 #define QI_REGISTER_NAMES \
2286 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
2288 /* These parallel the array above, and can be used to access bits 8:15
2289 of regs 0 through 3. */
2291 #define QI_HIGH_REGISTER_NAMES \
2292 {"ah", "dh", "ch", "bh", }
2294 /* How to renumber registers for dbx and gdb. */
2296 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
2297 #define DBX_REGISTER_NUMBER(n) \
2308 /* This is how to output the definition of a user-level label named NAME,
2309 such as the label on a static function or variable NAME. */
2311 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2312 (assemble_name (FILE, NAME), fputs (":\n", FILE))
2314 /* This is how to output an assembler line defining a `double' constant. */
2316 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2318 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
2319 if (sizeof (int) == sizeof (long)) \
2320 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, l[0], l[1]); \
2322 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
2325 /* This is how to output a `long double' extended real constant. */
2327 #undef ASM_OUTPUT_LONG_DOUBLE
2328 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
2330 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
2331 if (sizeof (int) == sizeof (long)) \
2332 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, l[0], l[1], l[2]); \
2334 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
2337 /* This is how to output an assembler line defining a `float' constant. */
2339 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2341 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
2342 if (sizeof (int) == sizeof (long)) \
2343 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, l); \
2345 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
2348 /* Store in OUTPUT a string (made with alloca) containing
2349 an assembler-name for a local static variable named NAME.
2350 LABELNO is an integer which is different for each call. */
2352 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2353 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2354 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2358 /* This is how to output an assembler line defining an `int' constant. */
2360 #define ASM_OUTPUT_INT(FILE,VALUE) \
2361 ( fprintf (FILE, "%s ", ASM_LONG), \
2362 output_addr_const (FILE,(VALUE)), \
2365 /* Likewise for `char' and `short' constants. */
2366 /* is this supposed to do align too?? */
2368 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2369 ( fprintf (FILE, "%s ", ASM_SHORT), \
2370 output_addr_const (FILE,(VALUE)), \
2374 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2375 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2376 output_addr_const (FILE,(VALUE)), \
2377 fputs (",", FILE), \
2378 output_addr_const (FILE,(VALUE)), \
2379 fputs (" >> 8\n",FILE))
2383 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2384 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2385 output_addr_const (FILE, (VALUE)), \
2388 /* This is how to output an assembler line for a numeric constant byte. */
2390 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2391 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
2393 /* This is how to output an insn to push a register on the stack.
2394 It need not be very fast code. */
2396 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2397 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
2399 /* This is how to output an insn to pop a register from the stack.
2400 It need not be very fast code. */
2402 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2403 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
2405 /* This is how to output an element of a case-vector that is absolute.
2408 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2409 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
2411 /* This is how to output an element of a case-vector that is relative.
2412 We don't use these on the 386 yet, because the ATT assembler can't do
2413 forward reference the differences.
2416 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2417 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
2419 /* Define the parentheses used to group arithmetic operations
2420 in assembler code. */
2422 #define ASM_OPEN_PAREN ""
2423 #define ASM_CLOSE_PAREN ""
2425 /* Define results of standard character escape sequences. */
2426 #define TARGET_BELL 007
2427 #define TARGET_BS 010
2428 #define TARGET_TAB 011
2429 #define TARGET_NEWLINE 012
2430 #define TARGET_VT 013
2431 #define TARGET_FF 014
2432 #define TARGET_CR 015
2434 /* Print operand X (an rtx) in assembler syntax to file FILE.
2435 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2436 The CODE z takes the size of operand from the following digit, and
2437 outputs b,w,or l respectively.
2439 On the 80386, we use several such letters:
2440 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
2441 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
2442 R -- print the prefix for register names.
2443 z -- print the opcode suffix for the size of the current operand.
2444 * -- print a star (in certain assembler syntax)
2445 w -- print the operand as if it's a "word" (HImode) even if it isn't.
2446 b -- print the operand as if it's a byte (QImode) even if it isn't.
2447 c -- don't print special prefixes before constant operands. */
2449 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2452 /* Print the name of a register based on its machine mode and number.
2453 If CODE is 'w', pretend the mode is HImode.
2454 If CODE is 'b', pretend the mode is QImode.
2455 If CODE is 'k', pretend the mode is SImode.
2456 If CODE is 'h', pretend the reg is the `high' byte register.
2457 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2459 extern char *hi_reg_name[];
2460 extern char *qi_reg_name[];
2461 extern char *qi_high_reg_name[];
2463 #define PRINT_REG(X, CODE, FILE) \
2464 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
2466 fprintf (FILE, "%s", RP); \
2467 switch ((CODE == 'w' ? 2 \
2472 : GET_MODE_SIZE (GET_MODE (X)))) \
2475 if (STACK_TOP_P (X)) \
2477 fputs ("st(0)", FILE); \
2483 if (! FP_REG_P (X)) fputs ("e", FILE); \
2485 fputs (hi_reg_name[REGNO (X)], FILE); \
2488 fputs (qi_reg_name[REGNO (X)], FILE); \
2491 fputs (qi_high_reg_name[REGNO (X)], FILE); \
2496 #define PRINT_OPERAND(FILE, X, CODE) \
2497 print_operand (FILE, X, CODE)
2499 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2500 print_operand_address (FILE, ADDR)
2502 /* Print the name of a register for based on its machine mode and number.
2503 This macro is used to print debugging output.
2504 This macro is different from PRINT_REG in that it may be used in
2505 programs that are not linked with aux-output.o. */
2507 #define DEBUG_PRINT_REG(X, CODE, FILE) \
2508 do { static char *hi_name[] = HI_REGISTER_NAMES; \
2509 static char *qi_name[] = QI_REGISTER_NAMES; \
2510 fprintf (FILE, "%d %s", REGNO (X), RP); \
2511 if (REGNO (X) == ARG_POINTER_REGNUM) \
2512 { fputs ("argp", FILE); break; } \
2513 if (STACK_TOP_P (X)) \
2514 { fputs ("st(0)", FILE); break; } \
2516 { fputs (hi_name[REGNO(X)], FILE); break; } \
2517 switch (GET_MODE_SIZE (GET_MODE (X))) \
2520 fputs ("e", FILE); \
2522 fputs (hi_name[REGNO (X)], FILE); \
2525 fputs (qi_name[REGNO (X)], FILE); \
2530 /* Output the prefix for an immediate operand, or for an offset operand. */
2531 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
2532 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
2534 /* Routines in libgcc that return floats must return them in an fp reg,
2535 just as other functions do which return such values.
2536 These macros make that happen. */
2538 #define FLOAT_VALUE_TYPE float
2539 #define INTIFY(FLOATVAL) FLOATVAL
2541 /* Nonzero if INSN magically clobbers register REGNO. */
2543 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
2544 (FP_REGNO_P (REGNO) \
2545 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
2548 /* a letter which is not needed by the normal asm syntax, which
2549 we can use for operand syntax in the extended asm */
2551 #define ASM_OPERAND_LETTER '#'
2553 #define RET return ""
2554 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
2556 /* Helper macros to expand a binary/unary operator if needed */
2557 #define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \
2559 if (!ix86_expand_binary_operator (OP, MODE, OPERANDS)) \
2563 #define IX86_EXPAND_UNARY_OPERATOR(OP, MODE, OPERANDS) \
2565 if (!ix86_expand_unary_operator (OP, MODE, OPERANDS,)) \
2570 /* Functions in i386.c */
2571 extern void override_options ();
2572 extern void order_regs_for_local_alloc ();
2573 extern char *output_strlen_unroll ();
2574 extern int i386_valid_decl_attribute_p ();
2575 extern int i386_valid_type_attribute_p ();
2576 extern int i386_return_pops_args ();
2577 extern int i386_comp_type_attributes ();
2578 extern void init_cumulative_args ();
2579 extern void function_arg_advance ();
2580 extern struct rtx_def *function_arg ();
2581 extern int function_arg_partial_nregs ();
2582 extern char *output_strlen_unroll ();
2583 extern void output_op_from_reg ();
2584 extern void output_to_reg ();
2585 extern char *singlemove_string ();
2586 extern char *output_move_double ();
2587 extern char *output_move_memory ();
2588 extern char *output_move_pushmem ();
2589 extern int standard_80387_constant_p ();
2590 extern char *output_move_const_single ();
2591 extern int symbolic_operand ();
2592 extern int call_insn_operand ();
2593 extern int expander_call_insn_operand ();
2594 extern int symbolic_reference_mentioned_p ();
2595 extern int ix86_expand_binary_operator ();
2596 extern int ix86_binary_operator_ok ();
2597 extern int ix86_expand_unary_operator ();
2598 extern int ix86_unary_operator_ok ();
2599 extern void emit_pic_move ();
2600 extern void function_prologue ();
2601 extern int simple_386_epilogue ();
2602 extern void function_epilogue ();
2603 extern int legitimate_address_p ();
2604 extern struct rtx_def *legitimize_pic_address ();
2605 extern struct rtx_def *legitimize_address ();
2606 extern void print_operand ();
2607 extern void print_operand_address ();
2608 extern void notice_update_cc ();
2609 extern void split_di ();
2610 extern int binary_387_op ();
2611 extern int shift_op ();
2612 extern int VOIDmode_compare_op ();
2613 extern char *output_387_binary_op ();
2614 extern char *output_fix_trunc ();
2615 extern char *output_float_compare ();
2616 extern char *output_fp_cc0_set ();
2617 extern void save_386_machine_status ();
2618 extern void restore_386_machine_status ();
2619 extern void clear_386_stack_locals ();
2620 extern struct rtx_def *assign_386_stack_local ();
2621 extern int is_mul ();
2622 extern int is_div ();
2623 extern int last_to_set_cc ();
2624 extern int doesnt_set_condition_code ();
2625 extern int sets_condition_code ();
2626 extern int str_immediate_operand ();
2627 extern int is_fp_insn ();
2628 extern int is_fp_dest ();
2629 extern int is_fp_store ();
2630 extern int agi_dependent ();
2631 extern int reg_mentioned_in_mem ();
2634 extern struct rtx_def *copy_all_rtx ();
2635 extern void rewrite_address ();
2638 /* Variables in i386.c */
2639 extern char *ix86_cpu_string; /* for -mcpu=<xxx> */
2640 extern char *ix86_isa_string; /* for -mcpu=<xxx> */
2641 extern char *i386_reg_alloc_order; /* register allocation order */
2642 extern char *i386_regparm_string; /* # registers to use to pass args */
2643 extern char *i386_align_loops_string; /* power of two alignment for loops */
2644 extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */
2645 extern char *i386_align_funcs_string; /* power of two alignment for functions */
2646 extern char *i386_branch_cost_string; /* values 1-5: see jump.c */
2647 extern int i386_regparm; /* i386_regparm_string as a number */
2648 extern int i386_align_loops; /* power of two alignment for loops */
2649 extern int i386_align_jumps; /* power of two alignment for non-loop jumps */
2650 extern int i386_align_funcs; /* power of two alignment for functions */
2651 extern int i386_branch_cost; /* values 1-5: see jump.c */
2652 extern char *hi_reg_name[]; /* names for 16 bit regs */
2653 extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
2654 extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
2655 extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
2656 extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
2657 extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
2659 /* External variables used */
2660 extern int optimize; /* optimization level */
2661 extern int obey_regdecls; /* TRUE if stupid register allocation */
2663 /* External functions used */
2664 extern struct rtx_def *force_operand ();
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