1 /* Definitions of target machine for GNU compiler for IA-32.
2 Copyright (C) 1988, 92, 94-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* The purpose of this file is to define the characteristics of the i386,
22 independent of assembler syntax or operating system.
24 Three other files build on this one to describe a specific assembler syntax:
25 bsd386.h, att386.h, and sun386.h.
27 The actual tm.h file for a particular system should include
28 this file, and then the file for the appropriate assembler syntax.
30 Many macros that specify assembler syntax are omitted entirely from
31 this file because they really belong in the files for particular
32 assemblers. These include RP, IP, LPREFIX, PUT_OP_SIZE, USE_STAR,
33 ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE, PRINT_B_I_S, and many
34 that start with ASM_ or end in ASM_OP. */
36 /* Names to predefine in the preprocessor for this target machine. */
40 /* Stubs for half-pic support if not OSF/1 reference platform. */
43 #define HALF_PIC_P() 0
44 #define HALF_PIC_NUMBER_PTRS 0
45 #define HALF_PIC_NUMBER_REFS 0
46 #define HALF_PIC_ENCODE(DECL)
47 #define HALF_PIC_DECLARE(NAME)
48 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
49 #define HALF_PIC_ADDRESS_P(X) 0
50 #define HALF_PIC_PTR(X) X
51 #define HALF_PIC_FINISH(STREAM)
54 /* Define the specific costs for a given cpu */
56 struct processor_costs {
57 int add; /* cost of an add instruction */
58 int lea; /* cost of a lea instruction */
59 int shift_var; /* variable shift costs */
60 int shift_const; /* constant shift costs */
61 int mult_init; /* cost of starting a multiply */
62 int mult_bit; /* cost of multiply per each bit set */
63 int divide; /* cost of a divide/mod */
64 int large_insn; /* insns larger than this cost more */
65 int movzbl_load; /* cost of loading using movzbl */
66 int int_load[3]; /* cost of loading integer registers
67 in QImode, HImode and SImode relative
68 to reg-reg move (2). */
69 int int_store[3]; /* cost of storing integer register
70 in QImode, HImode and SImode */
71 int fp_move; /* cost of reg,reg fld/fst */
72 int fp_load[3]; /* cost of loading FP register
73 in SFmode, DFmode and XFmode */
74 int fp_store[3]; /* cost of storing FP register
75 in SFmode, DFmode and XFmode */
78 extern struct processor_costs *ix86_cost;
80 /* Run-time compilation parameters selecting different hardware subsets. */
82 extern int target_flags;
84 /* Macros used in the machine description to test the flags. */
86 /* configure can arrange to make this 2, to force a 486. */
88 #ifndef TARGET_CPU_DEFAULT
89 #define TARGET_CPU_DEFAULT 0
92 /* Masks for the -m switches */
93 #define MASK_80387 0x00000001 /* Hardware floating point */
94 #define MASK_RTD 0x00000002 /* Use ret that pops args */
95 #define MASK_ALIGN_DOUBLE 0x00000004 /* align doubles to 2 word boundary */
96 #define MASK_SVR3_SHLIB 0x00000008 /* Uninit locals into bss */
97 #define MASK_IEEE_FP 0x00000010 /* IEEE fp comparisons */
98 #define MASK_FLOAT_RETURNS 0x00000020 /* Return float in st(0) */
99 #define MASK_NO_FANCY_MATH_387 0x00000040 /* Disable sin, cos, sqrt */
100 #define MASK_OMIT_LEAF_FRAME_POINTER 0x080 /* omit leaf frame pointers */
101 #define MASK_STACK_PROBE 0x00000100 /* Enable stack probing */
103 /* Temporary codegen switches */
104 #define MASK_INTEL_SYNTAX 0x00000200
105 #define MASK_DEBUG_ARG 0x00000400 /* function_arg */
106 #define MASK_DEBUG_ADDR 0x00000800 /* GO_IF_LEGITIMATE_ADDRESS */
108 /* Use the floating point instructions */
109 #define TARGET_80387 (target_flags & MASK_80387)
111 /* Compile using ret insn that pops args.
112 This will not work unless you use prototypes at least
113 for all functions that can take varying numbers of args. */
114 #define TARGET_RTD (target_flags & MASK_RTD)
116 /* Align doubles to a two word boundary. This breaks compatibility with
117 the published ABI's for structures containing doubles, but produces
118 faster code on the pentium. */
119 #define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
121 /* Put uninitialized locals into bss, not data.
122 Meaningful only on svr3. */
123 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
125 /* Use IEEE floating point comparisons. These handle correctly the cases
126 where the result of a comparison is unordered. Normally SIGFPE is
127 generated in such cases, in which case this isn't needed. */
128 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
130 /* Functions that return a floating point value may return that value
131 in the 387 FPU or in 386 integer registers. If set, this flag causes
132 the 387 to be used, which is compatible with most calling conventions. */
133 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
135 /* Disable generation of FP sin, cos and sqrt operations for 387.
136 This is because FreeBSD lacks these in the math-emulator-code */
137 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
139 /* Don't create frame pointers for leaf functions */
140 #define TARGET_OMIT_LEAF_FRAME_POINTER \
141 (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
143 /* Debug GO_IF_LEGITIMATE_ADDRESS */
144 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
146 /* Debug FUNCTION_ARG macros */
147 #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
149 #define TARGET_386 (ix86_cpu == PROCESSOR_I386)
150 #define TARGET_486 (ix86_cpu == PROCESSOR_I486)
151 #define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
152 #define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO)
153 #define TARGET_K6 (ix86_cpu == PROCESSOR_K6)
154 #define TARGET_ATHLON (ix86_cpu == PROCESSOR_ATHLON)
156 #define CPUMASK (1 << ix86_cpu)
157 extern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and;
158 extern const int x86_use_bit_test, x86_cmove, x86_deep_branch;
159 extern const int x86_unroll_strlen, x86_use_q_reg, x86_use_any_reg;
160 extern const int x86_double_with_add, x86_partial_reg_stall, x86_movx;
161 extern const int x86_use_loop, x86_use_fiop, x86_use_mov0;
162 extern const int x86_use_cltd, x86_read_modify_write;
163 extern const int x86_read_modify, x86_split_long_moves;
165 #define TARGET_USE_LEAVE (x86_use_leave & CPUMASK)
166 #define TARGET_PUSH_MEMORY (x86_push_memory & CPUMASK)
167 #define TARGET_ZERO_EXTEND_WITH_AND (x86_zero_extend_with_and & CPUMASK)
168 #define TARGET_USE_BIT_TEST (x86_use_bit_test & CPUMASK)
169 #define TARGET_UNROLL_STRLEN (x86_unroll_strlen & CPUMASK)
170 #define TARGET_USE_Q_REG (x86_use_q_reg & CPUMASK)
171 #define TARGET_USE_ANY_REG (x86_use_any_reg & CPUMASK)
172 #define TARGET_CMOVE (x86_cmove & (1 << ix86_arch))
173 #define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & CPUMASK)
174 #define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & CPUMASK)
175 #define TARGET_USE_SAHF (x86_use_sahf & CPUMASK)
176 #define TARGET_MOVX (x86_movx & CPUMASK)
177 #define TARGET_PARTIAL_REG_STALL (x86_partial_reg_stall & CPUMASK)
178 #define TARGET_USE_LOOP (x86_use_loop & CPUMASK)
179 #define TARGET_USE_FIOP (x86_use_fiop & CPUMASK)
180 #define TARGET_USE_MOV0 (x86_use_mov0 & CPUMASK)
181 #define TARGET_USE_CLTD (x86_use_cltd & CPUMASK)
182 #define TARGET_SPLIT_LONG_MOVES (x86_split_long_moves & CPUMASK)
183 #define TARGET_READ_MODIFY_WRITE (x86_read_modify_write & CPUMASK)
184 #define TARGET_READ_MODIFY (x86_read_modify & CPUMASK)
186 #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
188 #define ASSEMBLER_DIALECT ((target_flags & MASK_INTEL_SYNTAX) != 0)
190 #define TARGET_SWITCHES \
191 { { "80387", MASK_80387, "Use hardware fp" }, \
192 { "no-80387", -MASK_80387, "Do not use hardware fp" }, \
193 { "hard-float", MASK_80387, "Use hardware fp" }, \
194 { "soft-float", -MASK_80387, "Do not use hardware fp" }, \
195 { "no-soft-float", MASK_80387, "Use hardware fp" }, \
196 { "386", 0, "Same as -mcpu=i386" }, \
197 { "486", 0, "Same as -mcpu=i486" }, \
198 { "pentium", 0, "Same as -mcpu=pentium" }, \
199 { "pentiumpro", 0, "Same as -mcpu=pentiumpro" }, \
200 { "rtd", MASK_RTD, "Alternate calling convention" }, \
201 { "no-rtd", -MASK_RTD, "Use normal calling convention" }, \
202 { "align-double", MASK_ALIGN_DOUBLE, \
203 "Align some doubles on dword boundary" }, \
204 { "no-align-double", -MASK_ALIGN_DOUBLE, \
205 "Align doubles on word boundary" }, \
206 { "svr3-shlib", MASK_SVR3_SHLIB, \
207 "Uninitialized locals in .bss" }, \
208 { "no-svr3-shlib", -MASK_SVR3_SHLIB, \
209 "Uninitialized locals in .data" }, \
210 { "ieee-fp", MASK_IEEE_FP, \
211 "Use IEEE math for fp comparisons" }, \
212 { "no-ieee-fp", -MASK_IEEE_FP, \
213 "Do not use IEEE math for fp comparisons" }, \
214 { "fp-ret-in-387", MASK_FLOAT_RETURNS, \
215 "Return values of functions in FPU registers" }, \
216 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS , \
217 "Do not return values of functions in FPU registers"}, \
218 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387, \
219 "Do not generate sin, cos, sqrt for FPU" }, \
220 { "fancy-math-387", -MASK_NO_FANCY_MATH_387, \
221 "Generate sin, cos, sqrt for FPU"}, \
222 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER, \
223 "Omit the frame pointer in leaf functions" }, \
224 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER, "" }, \
225 { "debug-addr", MASK_DEBUG_ADDR, 0 /* undocumented */ }, \
226 { "no-debug-addr", -MASK_DEBUG_ADDR, 0 /* undocumented */ }, \
227 { "debug-arg", MASK_DEBUG_ARG, 0 /* undocumented */ }, \
228 { "no-debug-arg", -MASK_DEBUG_ARG, 0 /* undocumented */ }, \
229 { "stack-arg-probe", MASK_STACK_PROBE, "Enable stack probing" }, \
230 { "no-stack-arg-probe", -MASK_STACK_PROBE, "" }, \
231 { "windows", 0, 0 /* undocumented */ }, \
232 { "dll", 0, 0 /* undocumented */ }, \
233 { "intel-syntax", MASK_INTEL_SYNTAX, \
234 "Emit Intel syntax assembler opcodes" }, \
235 { "no-intel-syntax", -MASK_INTEL_SYNTAX, "" }, \
237 { "", TARGET_DEFAULT, 0 }}
239 /* Which processor to schedule for. The cpu attribute defines a list that
240 mirrors this list, so changes to i386.md must be made at the same time. */
244 PROCESSOR_I386, /* 80386 */
245 PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */
247 PROCESSOR_PENTIUMPRO,
253 extern enum processor_type ix86_cpu;
255 extern int ix86_arch;
257 /* This macro is similar to `TARGET_SWITCHES' but defines names of
258 command options that have values. Its definition is an
259 initializer with a subgrouping for each command option.
261 Each subgrouping contains a string constant, that defines the
262 fixed part of the option name, and the address of a variable. The
263 variable, type `char *', is set to the variable part of the given
264 option if the fixed part matches. The actual option name is made
265 by appending `-m' to the specified name. */
266 #define TARGET_OPTIONS \
267 { { "cpu=", &ix86_cpu_string, \
268 "Schedule code for given CPU"}, \
269 { "arch=", &ix86_arch_string, \
270 "Generate code for given CPU"}, \
271 { "reg-alloc=", &ix86_reg_alloc_order, \
272 "Control allocation order of integer registers" }, \
273 { "regparm=", &ix86_regparm_string, \
274 "Number of registers used to pass integer arguments" }, \
275 { "align-loops=", &ix86_align_loops_string, \
276 "Loop code aligned to this power of 2" }, \
277 { "align-jumps=", &ix86_align_jumps_string, \
278 "Jump targets are aligned to this power of 2" }, \
279 { "align-functions=", &ix86_align_funcs_string, \
280 "Function starts are aligned to this power of 2" }, \
281 { "preferred-stack-boundary=", \
282 &ix86_preferred_stack_boundary_string, \
283 "Attempt to keep stack aligned to this power of 2" }, \
284 { "branch-cost=", &ix86_branch_cost_string, \
285 "Branches are this expensive (1-5, arbitrary units)" }, \
289 /* Sometimes certain combinations of command options do not make
290 sense on a particular target machine. You can define a macro
291 `OVERRIDE_OPTIONS' to take account of this. This macro, if
292 defined, is executed once just after all the command options have
295 Don't use this macro to turn on various extra optimizations for
296 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
298 #define OVERRIDE_OPTIONS override_options ()
300 /* These are meant to be redefined in the host dependent files */
301 #define SUBTARGET_SWITCHES
302 #define SUBTARGET_OPTIONS
304 /* Define this to change the optimizations performed by default. */
305 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE)
307 /* Specs for the compiler proper */
310 #define CC1_CPU_SPEC "\
314 %{mpentium:-mcpu=pentium} \
315 %{mpentiumpro:-mcpu=pentiumpro}}"
318 #ifndef CPP_CPU_DEFAULT_SPEC
319 #if TARGET_CPU_DEFAULT == 1
320 #define CPP_CPU_DEFAULT_SPEC "-D__tune_i486__"
322 #if TARGET_CPU_DEFAULT == 2
323 #define CPP_CPU_DEFAULT_SPEC "-D__tune_pentium__"
325 #if TARGET_CPU_DEFAULT == 3
326 #define CPP_CPU_DEFAULT_SPEC "-D__tune_pentiumpro__"
328 #if TARGET_CPU_DEFAULT == 4
329 #define CPP_CPU_DEFAULT_SPEC "-D__tune_k6__"
331 #if TARGET_CPU_DEFAULT == 5
332 #define CPP_CPU_DEFAULT_SPEC "-D__tune_athlon__"
334 #ifndef CPP_CPU_DEFAULT_SPEC
335 #define CPP_CPU_DEFAULT_SPEC "-D__tune_i386__"
337 #endif /* CPP_CPU_DEFAULT_SPEC */
340 #define CPP_CPU_SPEC "\
341 -Acpu(i386) -Amachine(i386) \
342 %{!ansi:-Di386} -D__i386 -D__i386__ \
343 %{march=i386:%{!mcpu*:-D__tune_i386__ }}\
344 %{march=i486:-D__i486 -D__i486__ %{!mcpu*:-D__tune_i486__ }}\
345 %{march=pentium|march=i586:-D__pentium -D__pentium__ \
346 %{!mcpu*:-D__tune_pentium__ }}\
347 %{march=pentiumpro|march=i686:-D__pentiumpro -D__pentiumpro__ \
348 %{!mcpu*:-D__tune_pentiumpro__ }}\
349 %{march=k6:-D__k6 -D__k6__ %{!mcpu*:-D__tune_k6__ }}\
350 %{march=athlon:-D__athlon -D__athlon__ %{!mcpu*:-D__tune_athlon__ }}\
351 %{m386|mcpu=i386:-D__tune_i386__ }\
352 %{m486|mcpu=i486:-D__tune_i486__ }\
353 %{mpentium|mcpu=pentium|mcpu=i586:-D__tune_pentium__ }\
354 %{mpentiumpro|mcpu=pentiumpro|mcpu=i686:-D__tune_pentiumpro__ }\
355 %{mcpu=k6:-D__tune_k6__ }\
356 %{mcpu=athlon:-D__tune_athlon__ }\
357 %{!march*:%{!mcpu*:%{!m386:%{!m486:%{!mpentium*:%(cpp_cpu_default)}}}}}"
361 #define CC1_SPEC "%(cc1_cpu) "
364 /* This macro defines names of additional specifications to put in the
365 specs that can be used in various specifications like CC1_SPEC. Its
366 definition is an initializer with a subgrouping for each command option.
368 Each subgrouping contains a string constant, that defines the
369 specification name, and a string constant that used by the GNU CC driver
372 Do not define this macro if it does not need to do anything. */
374 #ifndef SUBTARGET_EXTRA_SPECS
375 #define SUBTARGET_EXTRA_SPECS
378 #define EXTRA_SPECS \
379 { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \
380 { "cpp_cpu", CPP_CPU_SPEC }, \
381 { "cc1_cpu", CC1_CPU_SPEC }, \
382 SUBTARGET_EXTRA_SPECS
384 /* target machine storage layout */
386 /* Define for XFmode extended real floating point support.
387 This will automatically cause REAL_ARITHMETIC to be defined. */
388 #define LONG_DOUBLE_TYPE_SIZE 96
390 /* Define if you don't want extended real, but do want to use the
391 software floating point emulator for REAL_ARITHMETIC and
392 decimal <-> binary conversion. */
393 /* #define REAL_ARITHMETIC */
395 /* Define this if most significant byte of a word is the lowest numbered. */
396 /* That is true on the 80386. */
398 #define BITS_BIG_ENDIAN 0
400 /* Define this if most significant byte of a word is the lowest numbered. */
401 /* That is not true on the 80386. */
402 #define BYTES_BIG_ENDIAN 0
404 /* Define this if most significant word of a multiword number is the lowest
406 /* Not true for 80386 */
407 #define WORDS_BIG_ENDIAN 0
409 /* number of bits in an addressable storage unit */
410 #define BITS_PER_UNIT 8
412 /* Width in bits of a "word", which is the contents of a machine register.
413 Note that this is not necessarily the width of data type `int';
414 if using 16-bit ints on a 80386, this would still be 32.
415 But on a machine with 16-bit registers, this would be 16. */
416 #define BITS_PER_WORD 32
418 /* Width of a word, in units (bytes). */
419 #define UNITS_PER_WORD 4
421 /* Width in bits of a pointer.
422 See also the macro `Pmode' defined below. */
423 #define POINTER_SIZE 32
425 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
426 #define PARM_BOUNDARY 32
428 /* Boundary (in *bits*) on which stack pointer should be aligned. */
429 #define STACK_BOUNDARY 32
431 /* Boundary (in *bits*) on which the stack pointer preferrs to be
432 aligned; the compiler cannot rely on having this alignment. */
433 #define PREFERRED_STACK_BOUNDARY ix86_preferred_stack_boundary
435 /* Allocation boundary for the code of a function. */
436 #define FUNCTION_BOUNDARY \
437 (1 << ((ix86_align_funcs >= 0 ? ix86_align_funcs : -ix86_align_funcs) + 3))
439 /* Alignment of field after `int : 0' in a structure. */
441 #define EMPTY_FIELD_BOUNDARY 32
443 /* Minimum size in bits of the largest boundary to which any
444 and all fundamental data types supported by the hardware
445 might need to be aligned. No data type wants to be aligned
446 rounder than this. The i386 supports 64-bit floating point
447 quantities, but these can be aligned on any 32-bit boundary.
448 The published ABIs say that doubles should be aligned on word
449 boundaries, but the Pentium gets better performance with them
450 aligned on 64 bit boundaries. */
451 #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
453 /* If defined, a C expression to compute the alignment given to a
454 constant that is being placed in memory. CONSTANT is the constant
455 and ALIGN is the alignment that the object would ordinarily have.
456 The value of this macro is used instead of that alignment to align
459 If this macro is not defined, then ALIGN is used.
461 The typical use of this macro is to increase alignment for string
462 constants to be word aligned so that `strcpy' calls that copy
463 constants can be done inline. */
465 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
466 (TREE_CODE (EXP) == REAL_CST \
467 ? ((TYPE_MODE (TREE_TYPE (EXP)) == DFmode && (ALIGN) < 64) \
469 : (TYPE_MODE (TREE_TYPE (EXP)) == XFmode && (ALIGN) < 128) \
472 : TREE_CODE (EXP) == STRING_CST \
473 ? ((TREE_STRING_LENGTH (EXP) >= 31 && (ALIGN) < 256) \
478 /* If defined, a C expression to compute the alignment for a static
479 variable. TYPE is the data type, and ALIGN is the alignment that
480 the object would ordinarily have. The value of this macro is used
481 instead of that alignment to align the object.
483 If this macro is not defined, then ALIGN is used.
485 One use of this macro is to increase alignment of medium-size
486 data to make it all fit in fewer cache lines. Another is to
487 cause character arrays to be word-aligned so that `strcpy' calls
488 that copy constants to character arrays can be done inline. */
490 #define DATA_ALIGNMENT(TYPE, ALIGN) \
491 ((AGGREGATE_TYPE_P (TYPE) \
492 && TYPE_SIZE (TYPE) \
493 && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \
494 && (TREE_INT_CST_LOW (TYPE_SIZE (TYPE)) >= 256 \
495 || TREE_INT_CST_HIGH (TYPE_SIZE (TYPE))) && (ALIGN) < 256) \
497 : TREE_CODE (TYPE) == ARRAY_TYPE \
498 ? ((TYPE_MODE (TREE_TYPE (TYPE)) == DFmode && (ALIGN) < 64) \
500 : (TYPE_MODE (TREE_TYPE (TYPE)) == XFmode && (ALIGN) < 128) \
503 : TREE_CODE (TYPE) == COMPLEX_TYPE \
504 ? ((TYPE_MODE (TYPE) == DCmode && (ALIGN) < 64) \
506 : (TYPE_MODE (TYPE) == XCmode && (ALIGN) < 128) \
509 : ((TREE_CODE (TYPE) == RECORD_TYPE \
510 || TREE_CODE (TYPE) == UNION_TYPE \
511 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \
512 && TYPE_FIELDS (TYPE)) \
513 ? ((DECL_MODE (TYPE_FIELDS (TYPE)) == DFmode && (ALIGN) < 64) \
515 : (DECL_MODE (TYPE_FIELDS (TYPE)) == XFmode && (ALIGN) < 128) \
518 : TREE_CODE (TYPE) == REAL_TYPE \
519 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \
521 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \
526 /* If defined, a C expression to compute the alignment for a local
527 variable. TYPE is the data type, and ALIGN is the alignment that
528 the object would ordinarily have. The value of this macro is used
529 instead of that alignment to align the object.
531 If this macro is not defined, then ALIGN is used.
533 One use of this macro is to increase alignment of medium-size
534 data to make it all fit in fewer cache lines. */
536 #define LOCAL_ALIGNMENT(TYPE, ALIGN) \
537 (TREE_CODE (TYPE) == ARRAY_TYPE \
538 ? ((TYPE_MODE (TREE_TYPE (TYPE)) == DFmode && (ALIGN) < 64) \
540 : (TYPE_MODE (TREE_TYPE (TYPE)) == XFmode && (ALIGN) < 128) \
543 : TREE_CODE (TYPE) == COMPLEX_TYPE \
544 ? ((TYPE_MODE (TYPE) == DCmode && (ALIGN) < 64) \
546 : (TYPE_MODE (TYPE) == XCmode && (ALIGN) < 128) \
549 : ((TREE_CODE (TYPE) == RECORD_TYPE \
550 || TREE_CODE (TYPE) == UNION_TYPE \
551 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \
552 && TYPE_FIELDS (TYPE)) \
553 ? ((DECL_MODE (TYPE_FIELDS (TYPE)) == DFmode && (ALIGN) < 64) \
555 : (DECL_MODE (TYPE_FIELDS (TYPE)) == XFmode && (ALIGN) < 128) \
558 : TREE_CODE (TYPE) == REAL_TYPE \
559 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \
561 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \
566 /* Set this non-zero if move instructions will actually fail to work
567 when given unaligned data. */
568 #define STRICT_ALIGNMENT 0
570 /* If bit field type is int, don't let it cross an int,
571 and give entire struct the alignment of an int. */
572 /* Required on the 386 since it doesn't have bitfield insns. */
573 #define PCC_BITFIELD_TYPE_MATTERS 1
575 /* Align loop starts for optimal branching. */
576 #define LOOP_ALIGN(LABEL) \
577 (ix86_align_loops < 0 ? -ix86_align_loops : ix86_align_loops)
578 #define LOOP_ALIGN_MAX_SKIP \
579 (ix86_align_loops < -3 ? (1<<(-ix86_align_loops-1))-1 : 0)
581 /* This is how to align an instruction for optimal branching. */
582 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) \
583 (ix86_align_jumps < 0 ? -ix86_align_jumps : ix86_align_jumps)
584 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP \
585 (ix86_align_jumps < -3 ? (1<<(-ix86_align_jumps-1))-1 : 0)
587 /* Standard register usage. */
589 /* This processor has special stack-like registers. See reg-stack.c
593 #define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode)
595 /* Number of actual hardware registers.
596 The hardware registers are assigned numbers for the compiler
597 from 0 to just below FIRST_PSEUDO_REGISTER.
598 All registers that the compiler knows about must be given numbers,
599 even those that are not normally considered general registers.
601 In the 80386 we give the 8 general purpose registers the numbers 0-7.
602 We number the floating point registers 8-15.
603 Note that registers 0-7 can be accessed as a short or int,
604 while only 0-3 may be used with byte `mov' instructions.
606 Reg 16 does not correspond to any hardware register, but instead
607 appears in the RTL as an argument pointer prior to reload, and is
608 eliminated during reloading in favor of either the stack or frame
611 #define FIRST_PSEUDO_REGISTER 19
613 /* 1 for registers that have pervasive standard uses
614 and are not available for the register allocator.
615 On the 80386, the stack pointer is such, as is the arg pointer. */
616 #define FIXED_REGISTERS \
617 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg,flags,fpsr*/ \
618 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0 }
620 /* 1 for registers not available across function calls.
621 These must include the FIXED_REGISTERS and also any
622 registers that can be used without being saved.
623 The latter must include the registers where values are returned
624 and the register where structure-value addresses are passed.
625 Aside from that, you can include as many other registers as you like. */
627 #define CALL_USED_REGISTERS \
628 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg,flags,fpsr*/ \
629 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
631 /* Order in which to allocate registers. Each register must be
632 listed once, even those in FIXED_REGISTERS. List frame pointer
633 late and fixed registers last. Note that, in general, we prefer
634 registers listed in CALL_USED_REGISTERS, keeping the others
635 available for storage of persistent values.
637 Three different versions of REG_ALLOC_ORDER have been tried:
639 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
640 but slower code on simple functions returning values in eax.
642 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
643 perl 4.036 due to not being able to create a DImode register (to hold a 2
646 If the order is eax, edx, ecx, ... it produces better code for simple
647 functions, and a slightly slower compiler. Users complained about the code
648 generated by allocating edx first, so restore the 'natural' order of things. */
650 #define REG_ALLOC_ORDER \
651 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg,cc,fpsr*/ \
652 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16,17, 18 }
654 /* A C statement (sans semicolon) to choose the order in which to
655 allocate hard registers for pseudo-registers local to a basic
658 Store the desired register order in the array `reg_alloc_order'.
659 Element 0 should be the register to allocate first; element 1, the
660 next register; and so on.
662 The macro body should not assume anything about the contents of
663 `reg_alloc_order' before execution of the macro.
665 On most machines, it is not necessary to define this macro. */
667 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
669 /* Macro to conditionally modify fixed_regs/call_used_regs. */
670 #define CONDITIONAL_REGISTER_USAGE \
674 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
675 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
677 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
681 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
682 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
683 if (TEST_HARD_REG_BIT (x, i)) \
684 fixed_regs[i] = call_used_regs[i] = 1; \
688 /* Return number of consecutive hard regs needed starting at reg REGNO
689 to hold something of mode MODE.
690 This is ordinarily the length in words of a value of mode MODE
691 but can be less for certain modes in special long registers.
693 Actually there are no two word move instructions for consecutive
694 registers. And only registers 0-3 may have mov byte instructions
698 #define HARD_REGNO_NREGS(REGNO, MODE) \
699 (FP_REGNO_P (REGNO) ? 1 \
700 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
702 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
704 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
705 /* Flags and only flags can only hold CCmode values. */ \
706 (CC_REGNO_P (REGNO) \
707 ? GET_MODE_CLASS (MODE) == MODE_CC \
708 : GET_MODE_CLASS (MODE) == MODE_CC ? 0 \
709 /* FP regs can only hold floating point; make it clear they \
710 cannot hold TFmode floats. */ \
711 : FP_REGNO_P (REGNO) \
712 ? ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
713 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
714 && GET_MODE_UNIT_SIZE (MODE) <= (LONG_DOUBLE_TYPE_SIZE == 96 ? 12 : 8))\
716 /* Other regs cannot do byte accesses. */ \
717 : (MODE) != QImode ? 1 \
718 : reload_in_progress || reload_completed \
719 || !TARGET_PARTIAL_REG_STALL)
721 /* Value is 1 if it is a good idea to tie two pseudo registers
722 when one has mode MODE1 and one has mode MODE2.
723 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
724 for any hard reg, then this must be 0 for correct output. */
726 #define MODES_TIEABLE_P(MODE1, MODE2) \
727 ((MODE1) == (MODE2) \
728 || ((MODE1) == SImode && (MODE2) == HImode) \
729 || ((MODE1) == HImode && (MODE2) == SImode))
731 /* Specify the modes required to caller save a given hard regno.
732 We do this on i386 to prevent flags from being saved at all. */
734 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO, NREGS) \
735 (CC_REGNO_P (REGNO) ? VOIDmode \
736 : choose_hard_reg_mode ((REGNO), (NREGS)))
738 /* Specify the registers used for certain standard purposes.
739 The values of these macros are register numbers. */
741 /* on the 386 the pc register is %eip, and is not usable as a general
742 register. The ordinary mov instructions won't work */
743 /* #define PC_REGNUM */
745 /* Register to use for pushing function arguments. */
746 #define STACK_POINTER_REGNUM 7
748 /* Base register for access to local variables of the function. */
749 #define FRAME_POINTER_REGNUM 6
751 /* First floating point reg */
752 #define FIRST_FLOAT_REG 8
754 /* First & last stack-like regs */
755 #define FIRST_STACK_REG FIRST_FLOAT_REG
756 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
761 /* Value should be nonzero if functions must have frame pointers.
762 Zero means the frame pointer need not be set up (and parms
763 may be accessed via the stack pointer) in functions that seem suitable.
764 This is computed in `reload', in reload1.c. */
765 #define FRAME_POINTER_REQUIRED (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ())
767 /* Base register for access to arguments of the function. */
768 #define ARG_POINTER_REGNUM 16
770 /* Register in which static-chain is passed to a function. */
771 #define STATIC_CHAIN_REGNUM 2
773 /* Register to hold the addressing base for position independent
774 code access to data items. */
775 #define PIC_OFFSET_TABLE_REGNUM 3
777 /* Register in which address to store a structure value
778 arrives in the function. On the 386, the prologue
779 copies this from the stack to register %eax. */
780 #define STRUCT_VALUE_INCOMING 0
782 /* Place in which caller passes the structure value address.
783 0 means push the value on the stack like an argument. */
784 #define STRUCT_VALUE 0
786 /* A C expression which can inhibit the returning of certain function
787 values in registers, based on the type of value. A nonzero value
788 says to return the function value in memory, just as large
789 structures are always returned. Here TYPE will be a C expression
790 of type `tree', representing the data type of the value.
792 Note that values of mode `BLKmode' must be explicitly handled by
793 this macro. Also, the option `-fpcc-struct-return' takes effect
794 regardless of this macro. On most systems, it is possible to
795 leave the macro undefined; this causes a default definition to be
796 used, whose value is the constant 1 for `BLKmode' values, and 0
799 Do not use this macro to indicate that structures and unions
800 should always be returned in memory. You should instead use
801 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
803 #define RETURN_IN_MEMORY(TYPE) \
804 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
807 /* Define the classes of registers for register constraints in the
808 machine description. Also define ranges of constants.
810 One of the classes must always be named ALL_REGS and include all hard regs.
811 If there is more than one class, another class must be named NO_REGS
812 and contain no registers.
814 The name GENERAL_REGS must be the name of a class (or an alias for
815 another name such as ALL_REGS). This is the class of registers
816 that is allowed by "g" or "r" in a register constraint.
817 Also, registers outside this class are allocated only when
818 instructions express preferences for them.
820 The classes must be numbered in nondecreasing order; that is,
821 a larger-numbered class must never be contained completely
822 in a smaller-numbered class.
824 For any two classes, it is very desirable that there be another
825 class that represents their union.
827 It might seem that class BREG is unnecessary, since no useful 386
828 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
829 and the "b" register constraint is useful in asms for syscalls.
831 The flags and fpsr registers are in no class. */
836 AREG, DREG, CREG, BREG, SIREG, DIREG,
837 AD_REGS, /* %eax/%edx for DImode */
838 Q_REGS, /* %eax %ebx %ecx %edx */
839 NON_Q_REGS, /* %esi %edi %ebp %esi */
840 INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
841 GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
842 FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
844 FLOAT_INT_REGS, /* FLOAT_REGS and GENERAL_REGS. */
845 ALL_REGS, LIM_REG_CLASSES
848 #define N_REG_CLASSES (int) LIM_REG_CLASSES
850 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
852 #define Q_CLASS_P(CLASS) (reg_class_subset_p (CLASS, Q_REGS))
854 /* Give names of register classes as strings for dump file. */
856 #define REG_CLASS_NAMES \
858 "AREG", "DREG", "CREG", "BREG", \
861 "Q_REGS", "NON_Q_REGS", \
864 "FP_TOP_REG", "FP_SECOND_REG", \
869 /* Define which registers fit in which classes.
870 This is an initializer for a vector of HARD_REG_SET
871 of length N_REG_CLASSES. */
873 #define REG_CLASS_CONTENTS \
875 {0x1}, {0x2}, {0x4}, {0x8},/* AREG, DREG, CREG, BREG */ \
876 {0x10}, {0x20}, /* SIREG, DIREG */ \
877 {0x3}, /* AD_REGS */ \
878 {0xf}, /* Q_REGS */ \
879 {0xf0}, /* NON_Q_REGS */ \
880 {0x7f}, /* INDEX_REGS */ \
881 {0x100ff}, /* GENERAL_REGS */ \
882 {0x0100}, {0x0200}, /* FP_TOP_REG, FP_SECOND_REG */ \
883 {0xff00}, /* FLOAT_REGS */ \
884 {0x1ffff}, /* FLOAT_INT_REGS */ \
888 /* The same information, inverted:
889 Return the class number of the smallest class containing
890 reg number REGNO. This could be a conditional expression
891 or could index an array. */
893 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
895 /* When defined, the compiler allows registers explicitly used in the
896 rtl to be used as spill registers but prevents the compiler from
897 extending the lifetime of these registers. */
899 #define SMALL_REGISTER_CLASSES 1
901 #define QI_REG_P(X) \
902 (REG_P (X) && REGNO (X) < 4)
903 #define NON_QI_REG_P(X) \
904 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
906 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
907 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
909 #define STACK_REG_P(xop) (REG_P (xop) && \
910 REGNO (xop) >= FIRST_STACK_REG && \
911 REGNO (xop) <= LAST_STACK_REG)
913 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
915 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
917 #define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
918 #define CC_REGNO_P(X) ((X) == FLAGS_REG || (X) == FPSR_REG)
920 /* The class value for index registers, and the one for base regs. */
922 #define INDEX_REG_CLASS INDEX_REGS
923 #define BASE_REG_CLASS GENERAL_REGS
925 /* Get reg_class from a letter such as appears in the machine description. */
927 #define REG_CLASS_FROM_LETTER(C) \
928 ((C) == 'r' ? GENERAL_REGS : \
929 (C) == 'q' ? Q_REGS : \
930 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
933 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
936 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
939 (C) == 'a' ? AREG : \
940 (C) == 'b' ? BREG : \
941 (C) == 'c' ? CREG : \
942 (C) == 'd' ? DREG : \
943 (C) == 'A' ? AD_REGS : \
944 (C) == 'D' ? DIREG : \
945 (C) == 'S' ? SIREG : NO_REGS)
947 /* The letters I, J, K, L and M in a register constraint string
948 can be used to stand for particular ranges of immediate operands.
949 This macro defines what the ranges are.
950 C is the letter, and VALUE is a constant value.
951 Return 1 if VALUE is in the range specified by C.
953 I is for non-DImode shifts.
954 J is for DImode shifts.
955 K is for signed imm8 operands.
956 L is for andsi as zero-extending move.
957 M is for shifts that can be executed by the "lea" opcode.
960 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
961 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 \
962 : (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 \
963 : (C) == 'K' ? (VALUE) >= -128 && (VALUE) <= 127 \
964 : (C) == 'L' ? (VALUE) == 0xff || (VALUE) == 0xffff \
965 : (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 \
968 /* Similar, but for floating constants, and defining letters G and H.
969 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
970 TARGET_387 isn't set, because the stack register converter may need to
971 load 0.0 into the function value register. */
973 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
974 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
976 /* Place additional restrictions on the register class to use when it
977 is necessary to be able to hold a value of mode MODE in a reload
978 register for which class CLASS would ordinarily be used. */
980 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
981 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
984 /* Given an rtx X being reloaded into a reg required to be
985 in class CLASS, return the class of reg to actually use.
986 In general this is just CLASS; but on some machines
987 in some cases it is preferable to use a more restrictive class.
988 On the 80386 series, we prevent floating constants from being
989 reloaded into floating registers (since no move-insn can do that)
990 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
992 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
993 QImode must go into class Q_REGS.
994 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
995 movdf to do mem-to-mem moves through integer regs. */
997 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
998 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode \
999 ? (standard_80387_constant_p (X) \
1000 ? reg_class_subset_p (CLASS, FLOAT_REGS) ? CLASS : FLOAT_REGS \
1002 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
1003 : ((CLASS) == ALL_REGS \
1004 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
1007 /* If we are copying between general and FP registers, we need a memory
1010 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
1011 (FLOAT_CLASS_P (CLASS1) != FLOAT_CLASS_P (CLASS2))
1013 /* QImode spills from non-QI registers need a scratch. This does not
1014 happen often -- the only example so far requires an uninitialized
1017 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
1018 ((CLASS) == GENERAL_REGS && (MODE) == QImode ? Q_REGS : NO_REGS)
1020 /* Return the maximum number of consecutive registers
1021 needed to represent mode MODE in a register of class CLASS. */
1022 /* On the 80386, this is the size of MODE in words,
1023 except in the FP regs, where a single reg is always enough. */
1024 #define CLASS_MAX_NREGS(CLASS, MODE) \
1025 (FLOAT_CLASS_P (CLASS) ? 1 : \
1026 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
1028 /* A C expression whose value is nonzero if pseudos that have been
1029 assigned to registers of class CLASS would likely be spilled
1030 because registers of CLASS are needed for spill registers.
1032 The default value of this macro returns 1 if CLASS has exactly one
1033 register and zero otherwise. On most machines, this default
1034 should be used. Only define this macro to some other expression
1035 if pseudo allocated by `local-alloc.c' end up in memory because
1036 their hard registers were needed for spill registers. If this
1037 macro returns nonzero for those classes, those pseudos will only
1038 be allocated by `global.c', which knows how to reallocate the
1039 pseudo to another register. If there would not be another
1040 register available for reallocation, you should not change the
1041 definition of this macro since the only effect of such a
1042 definition would be to slow down register allocation. */
1044 #define CLASS_LIKELY_SPILLED_P(CLASS) \
1045 (((CLASS) == AREG) \
1046 || ((CLASS) == DREG) \
1047 || ((CLASS) == CREG) \
1048 || ((CLASS) == BREG) \
1049 || ((CLASS) == AD_REGS) \
1050 || ((CLASS) == SIREG) \
1051 || ((CLASS) == DIREG))
1053 /* A C statement that adds to CLOBBERS any hard regs the port wishes
1054 to automatically clobber for all asms.
1056 We do this in the new i386 backend to maintain source compatibility
1057 with the old cc0-based compiler. */
1059 #define MD_ASM_CLOBBERS(CLOBBERS) \
1061 (CLOBBERS) = tree_cons (NULL_TREE, build_string (5, "flags"), (CLOBBERS));\
1062 (CLOBBERS) = tree_cons (NULL_TREE, build_string (4, "fpsr"), (CLOBBERS)); \
1065 /* Stack layout; function entry, exit and calling. */
1067 /* Define this if pushing a word on the stack
1068 makes the stack pointer a smaller address. */
1069 #define STACK_GROWS_DOWNWARD
1071 /* Define this if the nominal address of the stack frame
1072 is at the high-address end of the local variables;
1073 that is, each additional local variable allocated
1074 goes at a more negative offset in the frame. */
1075 #define FRAME_GROWS_DOWNWARD
1077 /* Offset within stack frame to start allocating local variables at.
1078 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1079 first local allocated. Otherwise, it is the offset to the BEGINNING
1080 of the first local allocated. */
1081 #define STARTING_FRAME_OFFSET 0
1083 /* If we generate an insn to push BYTES bytes,
1084 this says how many the stack pointer really advances by.
1085 On 386 pushw decrements by exactly 2 no matter what the position was.
1086 On the 386 there is no pushb; we use pushw instead, and this
1087 has the effect of rounding up to 2. */
1089 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
1091 /* Offset of first parameter from the argument pointer register value. */
1092 #define FIRST_PARM_OFFSET(FNDECL) 0
1094 /* Value is the number of bytes of arguments automatically
1095 popped when returning from a subroutine call.
1096 FUNDECL is the declaration node of the function (as a tree),
1097 FUNTYPE is the data type of the function (as a tree),
1098 or for a library call it is an identifier node for the subroutine name.
1099 SIZE is the number of bytes of arguments passed on the stack.
1101 On the 80386, the RTD insn may be used to pop them if the number
1102 of args is fixed, but if the number is variable then the caller
1103 must pop them all. RTD can't be used for library calls now
1104 because the library is compiled with the Unix compiler.
1105 Use of RTD is a selectable option, since it is incompatible with
1106 standard Unix calling sequences. If the option is not selected,
1107 the caller must always pop the args.
1109 The attribute stdcall is equivalent to RTD on a per module basis. */
1111 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
1112 (ix86_return_pops_args (FUNDECL, FUNTYPE, SIZE))
1114 /* Define how to find the value returned by a function.
1115 VALTYPE is the data type of the value (as a tree).
1116 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1117 otherwise, FUNC is 0. */
1118 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1119 gen_rtx_REG (TYPE_MODE (VALTYPE), \
1120 VALUE_REGNO (TYPE_MODE (VALTYPE)))
1122 /* Define how to find the value returned by a library function
1123 assuming the value has mode MODE. */
1125 #define LIBCALL_VALUE(MODE) \
1126 gen_rtx_REG (MODE, VALUE_REGNO (MODE))
1128 /* Define the size of the result block used for communication between
1129 untyped_call and untyped_return. The block contains a DImode value
1130 followed by the block used by fnsave and frstor. */
1132 #define APPLY_RESULT_SIZE (8+108)
1134 /* 1 if N is a possible register number for function argument passing. */
1135 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
1137 /* Define a data type for recording info about an argument list
1138 during the scan of that argument list. This data type should
1139 hold all necessary information about the function itself
1140 and about the args processed so far, enough to enable macros
1141 such as FUNCTION_ARG to determine where the next arg should go. */
1143 typedef struct ix86_args {
1144 int words; /* # words passed so far */
1145 int nregs; /* # registers available for passing */
1146 int regno; /* next available register number */
1149 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1150 for a call to a function whose data type is FNTYPE.
1151 For a library call, FNTYPE is 0. */
1153 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
1154 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
1156 /* Update the data in CUM to advance over an argument
1157 of mode MODE and data type TYPE.
1158 (TYPE is null for libcalls where that information may not be available.) */
1160 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1161 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
1163 /* Define where to put the arguments to a function.
1164 Value is zero to push the argument on the stack,
1165 or a hard register in which to store the argument.
1167 MODE is the argument's machine mode.
1168 TYPE is the data type of the argument (as a tree).
1169 This is null for libcalls where that information may
1171 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1172 the preceding args and about the function being called.
1173 NAMED is nonzero if this argument is a named parameter
1174 (otherwise it is an extra parameter matching an ellipsis). */
1176 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1177 (function_arg (&CUM, MODE, TYPE, NAMED))
1179 /* For an arg passed partly in registers and partly in memory,
1180 this is the number of registers used.
1181 For args passed entirely in registers or entirely in memory, zero. */
1183 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
1185 /* This macro is invoked just before the start of a function.
1186 It is used here to output code for -fpic that will load the
1187 return address into %ebx. */
1189 #undef ASM_OUTPUT_FUNCTION_PREFIX
1190 #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME) \
1191 asm_output_function_prefix (FILE, FNNAME)
1193 /* Output assembler code to FILE to increment profiler label # LABELNO
1194 for profiling a function entry. */
1196 #define FUNCTION_PROFILER(FILE, LABELNO) \
1200 fprintf (FILE, "\tleal\t%sP%d@GOTOFF(%%ebx),%%edx\n", \
1201 LPREFIX, (LABELNO)); \
1202 fprintf (FILE, "\tcall\t*_mcount@GOT(%%ebx)\n"); \
1206 fprintf (FILE, "\tmovl\t$%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
1207 fprintf (FILE, "\tcall\t_mcount\n"); \
1212 /* There are three profiling modes for basic blocks available.
1213 The modes are selected at compile time by using the options
1214 -a or -ax of the gnu compiler.
1215 The variable `profile_block_flag' will be set according to the
1218 profile_block_flag == 0, no option used:
1222 profile_block_flag == 1, -a option used.
1224 Count frequency of execution of every basic block.
1226 profile_block_flag == 2, -ax option used.
1228 Generate code to allow several different profiling modes at run time.
1229 Available modes are:
1230 Produce a trace of all basic blocks.
1231 Count frequency of jump instructions executed.
1232 In every mode it is possible to start profiling upon entering
1233 certain functions and to disable profiling of some other functions.
1235 The result of basic-block profiling will be written to a file `bb.out'.
1236 If the -ax option is used parameters for the profiling will be read
1241 /* The following macro shall output assembler code to FILE
1242 to initialize basic-block profiling. */
1244 #undef FUNCTION_BLOCK_PROFILER
1245 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
1246 ix86_output_function_block_profiler (FILE, BLOCK_OR_LABEL)
1248 /* The following macro shall output assembler code to FILE
1249 to increment a counter associated with basic block number BLOCKNO. */
1251 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1252 ix86_output_block_profiler (FILE, BLOCKNO)
1254 /* The following macro shall output rtl for the epilogue
1255 to indicate a return from function during basic-block profiling.
1257 If profiling_block_flag == 2:
1259 Output assembler code to call function `__bb_trace_ret'.
1261 Note that function `__bb_trace_ret' must not change the
1262 machine state, especially the flag register. To grant
1263 this, you must output code to save and restore registers
1264 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1265 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1266 used in the function `__bb_trace_ret', so you must make
1267 sure that the function prologue does not change any
1268 register prior to saving it with MACHINE_STATE_SAVE_RET.
1270 else if profiling_block_flag != 0:
1272 The macro will not be used, so it need not distinguish
1276 #define FUNCTION_BLOCK_PROFILER_EXIT \
1277 emit_call_insn (gen_call (gen_rtx_MEM (Pmode, \
1278 gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_ret")), \
1281 /* The function `__bb_trace_func' is called in every basic block
1282 and is not allowed to change the machine state. Saving (restoring)
1283 the state can either be done in the BLOCK_PROFILER macro,
1284 before calling function (rsp. after returning from function)
1285 `__bb_trace_func', or it can be done inside the function by
1286 defining the macros:
1288 MACHINE_STATE_SAVE(ID)
1289 MACHINE_STATE_RESTORE(ID)
1291 In the latter case care must be taken, that the prologue code
1292 of function `__bb_trace_func' does not already change the
1293 state prior to saving it with MACHINE_STATE_SAVE.
1295 The parameter `ID' is a string identifying a unique macro use.
1297 On the i386 the initialization code at the begin of
1298 function `__bb_trace_func' contains a `sub' instruction
1299 therefore we handle save and restore of the flag register
1300 in the BLOCK_PROFILER macro. */
1302 #define MACHINE_STATE_SAVE(ID) \
1304 register int eax_ __asm__("eax"); \
1305 register int ecx_ __asm__("ecx"); \
1306 register int edx_ __asm__("edx"); \
1307 register int esi_ __asm__("esi"); \
1308 __asm__ __volatile__ ( \
1313 : : "r"(eax_), "r"(ecx_), "r"(edx_), "r"(esi_)); \
1316 #define MACHINE_STATE_RESTORE(ID) \
1318 register int eax_ __asm__("eax"); \
1319 register int ecx_ __asm__("ecx"); \
1320 register int edx_ __asm__("edx"); \
1321 register int esi_ __asm__("esi"); \
1322 __asm__ __volatile__ ( \
1327 : "=r"(eax_), "=r"(ecx_), "=r"(edx_), "=r"(esi_)); \
1330 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1331 the stack pointer does not matter. The value is tested only in
1332 functions that have frame pointers.
1333 No definition is equivalent to always zero. */
1334 /* Note on the 386 it might be more efficient not to define this since
1335 we have to restore it ourselves from the frame pointer, in order to
1338 #define EXIT_IGNORE_STACK 1
1340 /* Output assembler code for a block containing the constant parts
1341 of a trampoline, leaving space for the variable parts. */
1343 /* On the 386, the trampoline contains two instructions:
1346 The trampoline is generated entirely at runtime. The operand of JMP
1347 is the address of FUNCTION relative to the instruction following the
1348 JMP (which is 5 bytes long). */
1350 /* Length in units of the trampoline for entering a nested function. */
1352 #define TRAMPOLINE_SIZE 10
1354 /* Emit RTL insns to initialize the variable parts of a trampoline.
1355 FNADDR is an RTX for the address of the function's pure code.
1356 CXT is an RTX for the static chain value for the function. */
1358 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1360 /* Compute offset from the end of the jmp to the target function. */ \
1361 rtx disp = expand_binop (SImode, sub_optab, FNADDR, \
1362 plus_constant (TRAMP, 10), \
1363 NULL_RTX, 1, OPTAB_DIRECT); \
1364 emit_move_insn (gen_rtx_MEM (QImode, TRAMP), GEN_INT (0xb9)); \
1365 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 1)), CXT); \
1366 emit_move_insn (gen_rtx_MEM (QImode, plus_constant (TRAMP, 5)), GEN_INT (0xe9));\
1367 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 6)), disp); \
1370 /* Definitions for register eliminations.
1372 This is an array of structures. Each structure initializes one pair
1373 of eliminable registers. The "from" register number is given first,
1374 followed by "to". Eliminations of the same "from" register are listed
1375 in order of preference.
1377 We have two registers that can be eliminated on the i386. First, the
1378 frame pointer register can often be eliminated in favor of the stack
1379 pointer register. Secondly, the argument pointer register can always be
1380 eliminated; it is replaced with either the stack or frame pointer. */
1382 #define ELIMINABLE_REGS \
1383 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1384 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1385 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1387 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1388 Frame pointer elimination is automatically handled.
1390 For the i386, if frame pointer elimination is being done, we would like to
1391 convert ap into sp, not fp.
1393 All other eliminations are valid. */
1395 #define CAN_ELIMINATE(FROM, TO) \
1396 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1397 ? ! frame_pointer_needed \
1400 /* Define the offset between two registers, one to be eliminated, and the other
1401 its replacement, at the start of a routine. */
1403 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1405 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1406 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1411 int preferred_alignment = PREFERRED_STACK_BOUNDARY / BITS_PER_UNIT; \
1412 HOST_WIDE_INT tsize = ix86_compute_frame_size (get_frame_size (), \
1415 (OFFSET) = (tsize + nregs * UNITS_PER_WORD); \
1418 if (frame_pointer_needed) \
1419 offset += UNITS_PER_WORD; \
1421 if ((FROM) == ARG_POINTER_REGNUM) \
1422 (OFFSET) += offset; \
1424 (OFFSET) -= ((offset + preferred_alignment - 1) \
1425 & -preferred_alignment) - offset; \
1429 /* Addressing modes, and classification of registers for them. */
1431 /* #define HAVE_POST_INCREMENT 0 */
1432 /* #define HAVE_POST_DECREMENT 0 */
1434 /* #define HAVE_PRE_DECREMENT 0 */
1435 /* #define HAVE_PRE_INCREMENT 0 */
1437 /* Macros to check register numbers against specific register classes. */
1439 /* These assume that REGNO is a hard or pseudo reg number.
1440 They give nonzero only if REGNO is a hard reg of the suitable class
1441 or a pseudo reg currently allocated to a suitable hard reg.
1442 Since they use reg_renumber, they are safe only once reg_renumber
1443 has been allocated, which happens in local-alloc.c. */
1445 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1446 ((REGNO) < STACK_POINTER_REGNUM \
1447 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1449 #define REGNO_OK_FOR_BASE_P(REGNO) \
1450 ((REGNO) <= STACK_POINTER_REGNUM \
1451 || (REGNO) == ARG_POINTER_REGNUM \
1452 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1454 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1455 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1457 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1458 and check its validity for a certain class.
1459 We have two alternate definitions for each of them.
1460 The usual definition accepts all pseudo regs; the other rejects
1461 them unless they have been allocated suitable hard regs.
1462 The symbol REG_OK_STRICT causes the latter definition to be used.
1464 Most source files want to accept pseudo regs in the hope that
1465 they will get allocated to the class that the insn wants them to be in.
1466 Source files for reload pass need to be strict.
1467 After reload, it makes no difference, since pseudo regs have
1468 been eliminated by then. */
1471 /* Non strict versions, pseudos are ok */
1472 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1473 (REGNO (X) < STACK_POINTER_REGNUM \
1474 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1476 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1477 (REGNO (X) <= STACK_POINTER_REGNUM \
1478 || REGNO (X) == ARG_POINTER_REGNUM \
1479 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1481 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1482 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1484 /* Strict versions, hard registers only */
1485 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1486 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1487 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1488 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1490 #ifndef REG_OK_STRICT
1491 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1492 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1493 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1496 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1497 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1498 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1501 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1502 that is a valid memory address for an instruction.
1503 The MODE argument is the machine mode for the MEM expression
1504 that wants to use this address.
1506 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1507 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1509 See legitimize_pic_address in i386.c for details as to what
1510 constitutes a legitimate address when -fpic is used. */
1512 #define MAX_REGS_PER_ADDRESS 2
1514 #define CONSTANT_ADDRESS_P(X) \
1515 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1516 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
1518 /* Nonzero if the constant value X is a legitimate general operand.
1519 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1521 #define LEGITIMATE_CONSTANT_P(X) \
1522 (GET_CODE (X) == CONST_DOUBLE ? standard_80387_constant_p (X) : 1)
1524 #ifdef REG_OK_STRICT
1525 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1527 if (legitimate_address_p (MODE, X, 1)) \
1532 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1534 if (legitimate_address_p (MODE, X, 0)) \
1540 /* Try machine-dependent ways of modifying an illegitimate address
1541 to be legitimate. If we find one, return the new, valid address.
1542 This macro is used in only one place: `memory_address' in explow.c.
1544 OLDX is the address as it was before break_out_memory_refs was called.
1545 In some cases it is useful to look at this to decide what needs to be done.
1547 MODE and WIN are passed so that this macro can use
1548 GO_IF_LEGITIMATE_ADDRESS.
1550 It is always safe for this macro to do nothing. It exists to recognize
1551 opportunities to optimize the output.
1553 For the 80386, we handle X+REG by loading X into a register R and
1554 using R+REG. R will go in a general reg and indexing will be used.
1555 However, if REG is a broken-out memory address or multiplication,
1556 nothing needs to be done because REG can certainly go in a general reg.
1558 When -fpic is used, special handling is needed for symbolic references.
1559 See comments by legitimize_pic_address in i386.c for details. */
1561 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1563 (X) = legitimize_address (X, OLDX, MODE); \
1564 if (memory_address_p (MODE, X)) \
1568 #define REWRITE_ADDRESS(x) rewrite_address(x)
1570 /* Nonzero if the constant value X is a legitimate general operand
1571 when generating PIC code. It is given that flag_pic is on and
1572 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1574 #define LEGITIMATE_PIC_OPERAND_P(X) \
1575 (! SYMBOLIC_CONST (X) \
1576 || legitimate_pic_address_disp_p (X))
1578 #define SYMBOLIC_CONST(X) \
1579 (GET_CODE (X) == SYMBOL_REF \
1580 || GET_CODE (X) == LABEL_REF \
1581 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1583 /* Go to LABEL if ADDR (a legitimate address expression)
1584 has an effect that depends on the machine mode it is used for.
1585 On the 80386, only postdecrement and postincrement address depend thus
1586 (the amount of decrement or increment being the length of the operand). */
1587 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1588 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1590 /* Define this macro if references to a symbol must be treated
1591 differently depending on something about the variable or
1592 function named by the symbol (such as what section it is in).
1594 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1595 so that we may access it directly in the GOT. */
1597 #define ENCODE_SECTION_INFO(DECL) \
1602 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1603 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1605 if (GET_CODE (rtl) == MEM) \
1607 if (TARGET_DEBUG_ADDR \
1608 && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \
1610 fprintf (stderr, "Encode %s, public = %d\n", \
1611 IDENTIFIER_POINTER (DECL_NAME (DECL)), \
1612 TREE_PUBLIC (DECL)); \
1615 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1616 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1617 || ! TREE_PUBLIC (DECL)); \
1623 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1624 codes once the function is being compiled into assembly code, but
1625 not before. (It is not done before, because in the case of
1626 compiling an inline function, it would lead to multiple PIC
1627 prologues being included in functions which used inline functions
1628 and were compiled to assembly language.) */
1630 #define FINALIZE_PIC \
1633 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1638 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1639 with arguments ARGS is a valid machine specific attribute for DECL.
1640 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1642 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1643 (ix86_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1645 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1646 with arguments ARGS is a valid machine specific attribute for TYPE.
1647 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1649 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1650 (ix86_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1652 /* If defined, a C expression whose value is zero if the attributes on
1653 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1654 two if they are nearly compatible (which causes a warning to be
1657 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1658 (ix86_comp_type_attributes (TYPE1, TYPE2))
1660 /* If defined, a C statement that assigns default attributes to newly
1663 /* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1665 /* Max number of args passed in registers. If this is more than 3, we will
1666 have problems with ebx (register #4), since it is a caller save register and
1667 is also used as the pic register in ELF. So for now, don't allow more than
1668 3 registers to be passed in registers. */
1670 #define REGPARM_MAX 3
1673 /* Specify the machine mode that this machine uses
1674 for the index in the tablejump instruction. */
1675 #define CASE_VECTOR_MODE Pmode
1677 /* Define as C expression which evaluates to nonzero if the tablejump
1678 instruction expects the table to contain offsets from the address of the
1680 Do not define this if the table should contain absolute addresses. */
1681 /* #define CASE_VECTOR_PC_RELATIVE 1 */
1683 /* Specify the tree operation to be used to convert reals to integers.
1684 This should be changed to take advantage of fist --wfs ??
1686 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1688 /* This is the kind of divide that is easiest to do in the general case. */
1689 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1691 /* Define this as 1 if `char' should by default be signed; else as 0. */
1692 #define DEFAULT_SIGNED_CHAR 1
1694 /* Max number of bytes we can move from memory to memory
1695 in one reasonably fast instruction. */
1698 /* If a memory-to-memory move would take MOVE_RATIO or more simple
1699 move-instruction pairs, we will do a movstr or libcall instead.
1700 Increasing the value will always make code faster, but eventually
1701 incurs high cost in increased code size.
1703 If you don't define this, a reasonable default is used.
1705 Make this large on i386, since the block move is very inefficient with small
1706 blocks, and the hard register needs of the block move require much reload
1709 #define MOVE_RATIO 5
1711 /* Define if shifts truncate the shift count
1712 which implies one can omit a sign-extension or zero-extension
1713 of a shift count. */
1714 /* On i386, shifts do truncate the count. But bit opcodes don't. */
1716 /* #define SHIFT_COUNT_TRUNCATED */
1718 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1719 is done just by pretending it is already truncated. */
1720 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1722 /* We assume that the store-condition-codes instructions store 0 for false
1723 and some other value for true. This is the value stored for true. */
1725 #define STORE_FLAG_VALUE 1
1727 /* When a prototype says `char' or `short', really pass an `int'.
1728 (The 386 can't easily push less than an int.) */
1730 #define PROMOTE_PROTOTYPES 1
1732 /* Specify the machine mode that pointers have.
1733 After generation of rtl, the compiler makes no further distinction
1734 between pointers and any other objects of this machine mode. */
1735 #define Pmode SImode
1737 /* A function address in a call instruction
1738 is a byte address (for indexing purposes)
1739 so give the MEM rtx a byte's mode. */
1740 #define FUNCTION_MODE QImode
1742 /* A part of a C `switch' statement that describes the relative costs
1743 of constant RTL expressions. It must contain `case' labels for
1744 expression codes `const_int', `const', `symbol_ref', `label_ref'
1745 and `const_double'. Each case must ultimately reach a `return'
1746 statement to return the relative cost of the use of that kind of
1747 constant value in an expression. The cost may depend on the
1748 precise value of the constant, which is available for examination
1749 in X, and the rtx code of the expression in which it is contained,
1750 found in OUTER_CODE.
1752 CODE is the expression code--redundant, since it can be obtained
1753 with `GET_CODE (X)'. */
1755 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1757 return (unsigned) INTVAL (RTX) < 256 ? 0 : 1; \
1761 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 1; \
1763 case CONST_DOUBLE: \
1766 if (GET_MODE (RTX) == VOIDmode) \
1769 code = standard_80387_constant_p (RTX); \
1770 return code == 1 ? 0 : \
1775 /* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */
1776 #define TOPLEVEL_COSTS_N_INSNS(N) \
1777 do { total = COSTS_N_INSNS (N); goto egress_rtx_costs; } while (0)
1779 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1780 This can be used, for example, to indicate how costly a multiply
1781 instruction is. In writing this macro, you can use the construct
1782 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1783 instructions. OUTER_CODE is the code of the expression in which X
1786 This macro is optional; do not define it if the default cost
1787 assumptions are adequate for the target machine. */
1789 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1791 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1792 && GET_MODE (XEXP (X, 0)) == SImode) \
1794 HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1796 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add); \
1797 if (value == 2 || value == 3) \
1798 TOPLEVEL_COSTS_N_INSNS (ix86_cost->lea); \
1800 /* fall through */ \
1806 if (GET_MODE (XEXP (X, 0)) == DImode) \
1808 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1810 if (INTVAL (XEXP (X, 1)) > 32) \
1811 TOPLEVEL_COSTS_N_INSNS(ix86_cost->shift_const + 2); \
1813 TOPLEVEL_COSTS_N_INSNS(ix86_cost->shift_const * 2); \
1817 if (GET_CODE (XEXP (X, 1)) == AND) \
1818 TOPLEVEL_COSTS_N_INSNS(ix86_cost->shift_var * 2); \
1820 TOPLEVEL_COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2); \
1825 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1826 TOPLEVEL_COSTS_N_INSNS (ix86_cost->shift_const); \
1828 TOPLEVEL_COSTS_N_INSNS (ix86_cost->shift_var); \
1833 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1835 unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1839 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add); \
1840 if (value == 4 || value == 8) \
1841 TOPLEVEL_COSTS_N_INSNS (ix86_cost->lea); \
1843 while (value != 0) \
1850 TOPLEVEL_COSTS_N_INSNS (ix86_cost->shift_const); \
1852 TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \
1853 + nbits * ix86_cost->mult_bit); \
1855 else /* This is arbitrary */ \
1856 TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \
1857 + 7 * ix86_cost->mult_bit); \
1863 TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \
1866 if (GET_CODE (XEXP (X, 0)) == PLUS \
1867 && GET_CODE (XEXP (XEXP (X, 0), 0)) == MULT \
1868 && GET_CODE (XEXP (XEXP (XEXP (X, 0), 0), 1)) == CONST_INT \
1869 && GET_CODE (XEXP (X, 1)) == CONST_INT) \
1871 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (XEXP (X, 0), 0), 1)); \
1872 if (val == 2 || val == 4 || val == 8) \
1874 return (COSTS_N_INSNS (ix86_cost->lea) \
1875 + rtx_cost (XEXP (XEXP (X, 0), 1), OUTER_CODE) \
1876 + rtx_cost (XEXP (XEXP (XEXP (X, 0), 0), 0), OUTER_CODE) \
1877 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1880 else if (GET_CODE (XEXP (X, 0)) == MULT \
1881 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT) \
1883 HOST_WIDE_INT val = INTVAL (XEXP (XEXP (X, 0), 1)); \
1884 if (val == 2 || val == 4 || val == 8) \
1886 return (COSTS_N_INSNS (ix86_cost->lea) \
1887 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1888 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1891 else if (GET_CODE (XEXP (X, 0)) == PLUS) \
1893 return (COSTS_N_INSNS (ix86_cost->lea) \
1894 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1895 + rtx_cost (XEXP (XEXP (X, 0), 1), OUTER_CODE) \
1896 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1899 /* fall through */ \
1904 if (GET_MODE (X) == DImode) \
1905 return (COSTS_N_INSNS (ix86_cost->add) * 2 \
1906 + (rtx_cost (XEXP (X, 0), OUTER_CODE) \
1907 << (GET_MODE (XEXP (X, 0)) != DImode)) \
1908 + (rtx_cost (XEXP (X, 1), OUTER_CODE) \
1909 << (GET_MODE (XEXP (X, 1)) != DImode))); \
1911 /* fall through */ \
1914 if (GET_MODE (X) == DImode) \
1915 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2); \
1916 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add); \
1922 /* An expression giving the cost of an addressing mode that contains
1923 ADDRESS. If not defined, the cost is computed from the ADDRESS
1924 expression and the `CONST_COSTS' values.
1926 For most CISC machines, the default cost is a good approximation
1927 of the true cost of the addressing mode. However, on RISC
1928 machines, all instructions normally have the same length and
1929 execution time. Hence all addresses will have equal costs.
1931 In cases where more than one form of an address is known, the form
1932 with the lowest cost will be used. If multiple forms have the
1933 same, lowest, cost, the one that is the most complex will be used.
1935 For example, suppose an address that is equal to the sum of a
1936 register and a constant is used twice in the same basic block.
1937 When this macro is not defined, the address will be computed in a
1938 register and memory references will be indirect through that
1939 register. On machines where the cost of the addressing mode
1940 containing the sum is no higher than that of a simple indirect
1941 reference, this will produce an additional instruction and
1942 possibly require an additional register. Proper specification of
1943 this macro eliminates this overhead for such machines.
1945 Similar use of this macro is made in strength reduction of loops.
1947 ADDRESS need not be valid as an address. In such a case, the cost
1948 is not relevant and can be any value; invalid addresses need not be
1949 assigned a different cost.
1951 On machines where an address involving more than one register is as
1952 cheap as an address computation involving only one register,
1953 defining `ADDRESS_COST' to reflect this can cause two registers to
1954 be live over a region of code where only one would have been if
1955 `ADDRESS_COST' were not defined in that manner. This effect should
1956 be considered in the definition of this macro. Equivalent costs
1957 should probably only be given to addresses with different numbers
1958 of registers on machines with lots of registers.
1960 This macro will normally either not be defined or be defined as a
1963 For i386, it is better to use a complex address than let gcc copy
1964 the address into a reg and make a new pseudo. But not if the address
1965 requires to two regs - that would mean more pseudos with longer
1968 #define ADDRESS_COST(RTX) \
1969 ((CONSTANT_P (RTX) \
1970 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1971 && REG_P (XEXP (RTX, 0)))) ? 0 \
1975 /* A C expression for the cost of moving data from a register in class FROM to
1976 one in class TO. The classes are expressed using the enumeration values
1977 such as `GENERAL_REGS'. A value of 2 is the default; other values are
1978 interpreted relative to that.
1980 It is not required that the cost always equal 2 when FROM is the same as TO;
1981 on some machines it is expensive to move between registers if they are not
1984 On the i386, copying between floating-point and fixed-point
1985 registers is done trough memory.
1987 Integer -> fp moves are noticeably slower than the opposite direction
1988 because of the partial memory stall they cause. Give it an
1992 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
1993 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
1994 ? (MEMORY_MOVE_COST (DFmode, CLASS1, 0) \
1995 + MEMORY_MOVE_COST (DFmode, CLASS2, 1)) \
1996 : (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)) ? 10 : 2)
1998 /* A C expression for the cost of moving data of mode M between a
1999 register and memory. A value of 2 is the default; this cost is
2000 relative to those in `REGISTER_MOVE_COST'.
2002 If moving between registers and memory is more expensive than
2003 between two registers, you should define this macro to express the
2006 Model also increased moving costs of QImode registers in non
2010 #define MEMORY_MOVE_COST(MODE,CLASS,IN) \
2011 (FLOAT_CLASS_P (CLASS) \
2012 ? (GET_MODE_SIZE (MODE)==4 \
2013 ? (IN ? ix86_cost->fp_load[0] : ix86_cost->fp_store[0]) \
2014 : (GET_MODE_SIZE (MODE)==8 \
2015 ? (IN ? ix86_cost->fp_load[1] : ix86_cost->fp_store[1]) \
2016 : (IN ? ix86_cost->fp_load[2] : ix86_cost->fp_store[2]))) \
2017 : (GET_MODE_SIZE (MODE)==1 \
2018 ? (IN ? (Q_CLASS_P (CLASS) ? ix86_cost->int_load[0] \
2019 : ix86_cost->movzbl_load) \
2020 : (Q_CLASS_P (CLASS) ? ix86_cost->int_store[0] \
2021 : ix86_cost->int_store[0] + 4)) \
2022 : (GET_MODE_SIZE (MODE)==2 \
2023 ? (IN ? ix86_cost->int_load[1] : ix86_cost->int_store[1]) \
2024 : ((IN ? ix86_cost->int_load[2] : ix86_cost->int_store[2]) \
2025 * GET_MODE_SIZE (MODE) / 4))))
2027 /* A C expression for the cost of a branch instruction. A value of 1
2028 is the default; other values are interpreted relative to that. */
2030 #define BRANCH_COST ix86_branch_cost
2032 /* Define this macro as a C expression which is nonzero if accessing
2033 less than a word of memory (i.e. a `char' or a `short') is no
2034 faster than accessing a word of memory, i.e., if such access
2035 require more than one instruction or if there is no difference in
2036 cost between byte and (aligned) word loads.
2038 When this macro is not defined, the compiler will access a field by
2039 finding the smallest containing object; when it is defined, a
2040 fullword load will be used if alignment permits. Unless bytes
2041 accesses are faster than word accesses, using word accesses is
2042 preferable since it may eliminate subsequent memory access if
2043 subsequent accesses occur to other fields in the same word of the
2044 structure, but to different bytes. */
2046 #define SLOW_BYTE_ACCESS 0
2048 /* Nonzero if access to memory by shorts is slow and undesirable. */
2049 #define SLOW_SHORT_ACCESS 0
2051 /* Define this macro if zero-extension (of a `char' or `short' to an
2052 `int') can be done faster if the destination is a register that is
2055 If you define this macro, you must have instruction patterns that
2056 recognize RTL structures like this:
2058 (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
2060 and likewise for `HImode'. */
2062 /* #define SLOW_ZERO_EXTEND */
2064 /* Define this macro to be the value 1 if unaligned accesses have a
2065 cost many times greater than aligned accesses, for example if they
2066 are emulated in a trap handler.
2068 When this macro is non-zero, the compiler will act as if
2069 `STRICT_ALIGNMENT' were non-zero when generating code for block
2070 moves. This can cause significantly more instructions to be
2071 produced. Therefore, do not set this macro non-zero if unaligned
2072 accesses only add a cycle or two to the time for a memory access.
2074 If the value of this macro is always zero, it need not be defined. */
2076 /* #define SLOW_UNALIGNED_ACCESS 0 */
2078 /* Define this macro to inhibit strength reduction of memory
2079 addresses. (On some machines, such strength reduction seems to do
2080 harm rather than good.) */
2082 /* #define DONT_REDUCE_ADDR */
2084 /* Define this macro if it is as good or better to call a constant
2085 function address than to call an address kept in a register.
2087 Desirable on the 386 because a CALL with a constant address is
2088 faster than one with a register address. */
2090 #define NO_FUNCTION_CSE
2092 /* Define this macro if it is as good or better for a function to call
2093 itself with an explicit address than to call an address kept in a
2096 #define NO_RECURSIVE_FUNCTION_CSE
2098 /* A C statement (sans semicolon) to update the integer variable COST
2099 based on the relationship between INSN that is dependent on
2100 DEP_INSN through the dependence LINK. The default is to make no
2101 adjustment to COST. This can be used for example to specify to
2102 the scheduler that an output- or anti-dependence does not incur
2103 the same cost as a data-dependence. */
2105 #define ADJUST_COST(insn,link,dep_insn,cost) \
2106 (cost) = ix86_adjust_cost(insn, link, dep_insn, cost)
2108 #define ISSUE_RATE \
2111 #define MD_SCHED_INIT(DUMP, SCHED_VERBOSE) \
2112 ix86_sched_init (DUMP, SCHED_VERBOSE)
2114 #define MD_SCHED_REORDER(DUMP, SCHED_VERBOSE, READY, N_READY, CLOCK, CIM) \
2115 (CIM) = ix86_sched_reorder (DUMP, SCHED_VERBOSE, READY, N_READY, CLOCK)
2117 #define MD_SCHED_VARIABLE_ISSUE(DUMP, SCHED_VERBOSE, INSN, CAN_ISSUE_MORE) \
2118 ((CAN_ISSUE_MORE) = \
2119 ix86_variable_issue (DUMP, SCHED_VERBOSE, INSN, CAN_ISSUE_MORE))
2121 /* Add any extra modes needed to represent the condition code.
2123 For the i386, we need separate modes when floating-point
2124 equality comparisons are being done.
2126 Add CCNO to indicate No Overflow, which is often also includes
2127 No Carry. This is typically used on the output of logicals,
2128 and is only valid in comparisons against zero. */
2130 #define EXTRA_CC_MODES \
2131 CC(CCNOmode, "CCNO") \
2132 CC(CCFPmode, "CCFP") \
2133 CC(CCFPUmode, "CCFPU")
2135 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
2136 return the mode to be used for the comparison.
2138 For floating-point equality comparisons, CCFPEQmode should be used.
2139 VOIDmode should be used in all other cases.
2141 For integer comparisons against zero, reduce to CCNOmode if
2142 possible, to allow for more combinations. */
2144 #define SELECT_CC_MODE(OP,X,Y) \
2145 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2146 ? (OP) == EQ || (OP) == NE ? CCFPUmode : CCFPmode \
2147 : (OP) == LE || (OP) == GT ? CCmode \
2148 : (Y) != const0_rtx ? CCmode \
2151 /* Control the assembler format that we output, to the extent
2152 this does not vary between assemblers. */
2154 /* How to refer to registers in assembler output.
2155 This sequence is indexed by compiler's hard-register-number (see above). */
2157 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
2158 For non floating point regs, the following are the HImode names.
2160 For float regs, the stack top is sometimes referred to as "%st(0)"
2161 instead of just "%st". PRINT_REG handles this with the "y" code. */
2163 #define HI_REGISTER_NAMES \
2164 {"ax","dx","cx","bx","si","di","bp","sp", \
2165 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","", \
2168 #define REGISTER_NAMES HI_REGISTER_NAMES
2170 /* Table of additional register names to use in user input. */
2172 #define ADDITIONAL_REGISTER_NAMES \
2173 { { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \
2174 { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \
2175 { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \
2176 { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 } }
2178 /* Note we are omitting these since currently I don't know how
2179 to get gcc to use these, since they want the same but different
2180 number as al, and ax.
2183 /* note the last four are not really qi_registers, but
2184 the md will have to never output movb into one of them
2185 only a movw . There is no movb into the last four regs */
2187 #define QI_REGISTER_NAMES \
2188 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
2190 /* These parallel the array above, and can be used to access bits 8:15
2191 of regs 0 through 3. */
2193 #define QI_HIGH_REGISTER_NAMES \
2194 {"ah", "dh", "ch", "bh", }
2196 /* How to renumber registers for dbx and gdb. */
2198 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
2199 #define DBX_REGISTER_NUMBER(n) \
2210 /* Before the prologue, RA is at 0(%esp). */
2211 #define INCOMING_RETURN_ADDR_RTX \
2212 gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
2214 /* After the prologue, RA is at -4(AP) in the current frame. */
2215 #define RETURN_ADDR_RTX(COUNT, FRAME) \
2217 ? gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, -4))\
2218 : gen_rtx_MEM (Pmode, plus_constant (FRAME, 4)))
2220 /* PC is dbx register 8; let's use that column for RA. */
2221 #define DWARF_FRAME_RETURN_COLUMN 8
2223 /* Before the prologue, the top of the frame is at 4(%esp). */
2224 #define INCOMING_FRAME_SP_OFFSET 4
2226 /* This is how to output the definition of a user-level label named NAME,
2227 such as the label on a static function or variable NAME. */
2229 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2230 (assemble_name (FILE, NAME), fputs (":\n", FILE))
2232 /* This is how to output an assembler line defining a `double' constant. */
2234 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2236 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
2237 fprintf (FILE, "%s\t0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
2240 /* This is how to output a `long double' extended real constant. */
2242 #undef ASM_OUTPUT_LONG_DOUBLE
2243 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
2245 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
2246 fprintf (FILE, "%s\t0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
2249 /* This is how to output an assembler line defining a `float' constant. */
2251 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2253 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
2254 fprintf ((FILE), "%s\t0x%lx\n", ASM_LONG, l); \
2257 /* Store in OUTPUT a string (made with alloca) containing
2258 an assembler-name for a local static variable named NAME.
2259 LABELNO is an integer which is different for each call. */
2261 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2262 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2263 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2265 /* This is how to output an assembler line defining an `int' constant. */
2267 #define ASM_OUTPUT_INT(FILE,VALUE) \
2268 ( fprintf (FILE, "%s\t", ASM_LONG), \
2269 output_addr_const (FILE,(VALUE)), \
2272 /* Likewise for `char' and `short' constants. */
2273 /* is this supposed to do align too?? */
2275 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2276 ( fprintf (FILE, "%s\t", ASM_SHORT), \
2277 output_addr_const (FILE,(VALUE)), \
2280 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2281 ( fprintf (FILE, "%s\t", ASM_BYTE_OP), \
2282 output_addr_const (FILE, (VALUE)), \
2285 /* This is how to output an assembler line for a numeric constant byte. */
2287 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2288 asm_fprintf ((FILE), "%s\t0x%x\n", ASM_BYTE_OP, (VALUE))
2290 /* This is how to output an insn to push a register on the stack.
2291 It need not be very fast code. */
2293 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2294 asm_fprintf (FILE, "\tpush{l}\t%%e%s\n", reg_names[REGNO])
2296 /* This is how to output an insn to pop a register from the stack.
2297 It need not be very fast code. */
2299 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2300 asm_fprintf (FILE, "\tpop{l}\t%%e%s\n", reg_names[REGNO])
2302 /* This is how to output an element of a case-vector that is absolute.
2305 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2306 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
2308 /* This is how to output an element of a case-vector that is relative.
2309 We don't use these on the 386 yet, because the ATT assembler can't do
2310 forward reference the differences.
2313 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
2314 fprintf (FILE, "\t%s\t%s%d-%s%d\n",ASM_LONG, LPREFIX, VALUE, LPREFIX, REL)
2316 /* Define the parentheses used to group arithmetic operations
2317 in assembler code. */
2319 #define ASM_OPEN_PAREN ""
2320 #define ASM_CLOSE_PAREN ""
2322 /* Define results of standard character escape sequences. */
2323 #define TARGET_BELL 007
2324 #define TARGET_BS 010
2325 #define TARGET_TAB 011
2326 #define TARGET_NEWLINE 012
2327 #define TARGET_VT 013
2328 #define TARGET_FF 014
2329 #define TARGET_CR 015
2331 /* Print operand X (an rtx) in assembler syntax to file FILE.
2332 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2333 The CODE z takes the size of operand from the following digit, and
2334 outputs b,w,or l respectively.
2336 On the 80386, we use several such letters:
2337 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
2338 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
2339 R -- print the prefix for register names.
2340 z -- print the opcode suffix for the size of the current operand.
2341 * -- print a star (in certain assembler syntax)
2342 P -- if PIC, print an @PLT suffix.
2343 X -- don't print any sort of PIC '@' suffix for a symbol.
2344 s -- ??? something to do with double shifts. not actually used, afaik.
2345 C -- print a conditional move suffix corresponding to the op code.
2346 c -- likewise, but reverse the condition.
2347 F,f -- likewise, but for floating-point. */
2349 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2352 /* Print the name of a register based on its machine mode and number.
2353 If CODE is 'w', pretend the mode is HImode.
2354 If CODE is 'b', pretend the mode is QImode.
2355 If CODE is 'k', pretend the mode is SImode.
2356 If CODE is 'h', pretend the reg is the `high' byte register.
2357 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2359 #define PRINT_REG(X, CODE, FILE) \
2360 print_reg (X, CODE, FILE)
2362 #define PRINT_OPERAND(FILE, X, CODE) \
2363 print_operand (FILE, X, CODE)
2365 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2366 print_operand_address (FILE, ADDR)
2368 /* Print the name of a register for based on its machine mode and number.
2369 This macro is used to print debugging output.
2370 This macro is different from PRINT_REG in that it may be used in
2371 programs that are not linked with aux-output.o. */
2373 #define DEBUG_PRINT_REG(X, CODE, FILE) \
2374 do { static const char * const hi_name[] = HI_REGISTER_NAMES; \
2375 static const char * const qi_name[] = QI_REGISTER_NAMES; \
2376 fprintf (FILE, "%d ", REGNO (X)); \
2377 if (REGNO (X) == FLAGS_REG) \
2378 { fputs ("flags", FILE); break; } \
2379 if (REGNO (X) == FPSR_REG) \
2380 { fputs ("fpsr", FILE); break; } \
2381 if (REGNO (X) == ARG_POINTER_REGNUM) \
2382 { fputs ("argp", FILE); break; } \
2383 if (STACK_TOP_P (X)) \
2384 { fputs ("st(0)", FILE); break; } \
2386 { fputs (hi_name[REGNO(X)], FILE); break; } \
2387 switch (GET_MODE_SIZE (GET_MODE (X))) \
2390 fputs ("e", FILE); \
2392 fputs (hi_name[REGNO (X)], FILE); \
2395 fputs (qi_name[REGNO (X)], FILE); \
2400 /* Routines in libgcc that return floats must return them in an fp reg,
2401 just as other functions do which return such values.
2402 These macros make that happen. */
2404 #define FLOAT_VALUE_TYPE float
2405 #define INTIFY(FLOATVAL) FLOATVAL
2407 /* a letter which is not needed by the normal asm syntax, which
2408 we can use for operand syntax in the extended asm */
2410 #define ASM_OPERAND_LETTER '#'
2411 #define RET return ""
2412 #define AT_SP(mode) (gen_rtx_MEM ((mode), stack_pointer_rtx))
2414 /* Define the codes that are matched by predicates in i386.c. */
2416 #define PREDICATE_CODES \
2417 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
2418 {"pic_symbolic_operand", {CONST}}, \
2419 {"call_insn_operand", {MEM}}, \
2420 {"expander_call_insn_operand", {MEM}}, \
2421 {"constant_call_address_operand", {MEM}}, \
2422 {"const0_operand", {CONST_INT, CONST_DOUBLE}}, \
2423 {"const1_operand", {CONST_INT}}, \
2424 {"const248_operand", {CONST_INT}}, \
2425 {"incdec_operand", {CONST_INT}}, \
2426 {"reg_no_sp_operand", {SUBREG, REG}}, \
2427 {"q_regs_operand", {SUBREG, REG}}, \
2428 {"non_q_regs_operand", {SUBREG, REG}}, \
2429 {"no_comparison_operator", {EQ, NE, LT, GE, LTU, GTU, LEU, GEU}}, \
2430 {"fcmov_comparison_operator", {EQ, NE, LTU, GTU, LEU, GEU}}, \
2431 {"cmp_fp_expander_operand", {CONST_DOUBLE, SUBREG, REG, MEM}}, \
2432 {"ext_register_operand", {SUBREG, REG}}, \
2433 {"binary_fp_operator", {PLUS, MINUS, MULT, DIV}}, \
2434 {"mult_operator", {MULT}}, \
2435 {"div_operator", {DIV}}, \
2436 {"arith_or_logical_operator", {PLUS, MULT, AND, IOR, XOR, SMIN, SMAX, \
2437 UMIN, UMAX, COMPARE, MINUS, DIV, MOD, \
2438 UDIV, UMOD, ASHIFT, ROTATE, ASHIFTRT, \
2439 LSHIFTRT, ROTATERT}}, \
2440 {"memory_displacement_operand", {MEM}}, \
2441 {"cmpsi_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
2442 LABEL_REF, SUBREG, REG, MEM, AND}}, \
2443 {"long_memory_operand", {MEM}},
2445 /* A list of predicates that do special things with modes, and so
2446 should not elicit warnings for VOIDmode match_operand. */
2448 #define SPECIAL_MODE_PREDICATES \
2449 "ext_register_operand",
2451 /* Variables in i386.c */
2452 extern const char *ix86_cpu_string; /* for -mcpu=<xxx> */
2453 extern const char *ix86_arch_string; /* for -march=<xxx> */
2454 extern const char *ix86_reg_alloc_order; /* register allocation order */
2455 extern const char *ix86_regparm_string; /* # registers to use to pass args */
2456 extern const char *ix86_align_loops_string; /* power of two alignment for loops */
2457 extern const char *ix86_align_jumps_string; /* power of two alignment for non-loop jumps */
2458 extern const char *ix86_align_funcs_string; /* power of two alignment for functions */
2459 extern const char *ix86_preferred_stack_boundary_string;/* power of two alignment for stack boundary */
2460 extern const char *ix86_branch_cost_string; /* values 1-5: see jump.c */
2461 extern int ix86_regparm; /* ix86_regparm_string as a number */
2462 extern int ix86_align_loops; /* power of two alignment for loops */
2463 extern int ix86_align_jumps; /* power of two alignment for non-loop jumps */
2464 extern int ix86_align_funcs; /* power of two alignment for functions */
2465 extern int ix86_preferred_stack_boundary; /* preferred stack boundary alignment in bits */
2466 extern int ix86_branch_cost; /* values 1-5: see jump.c */
2467 extern const char * const hi_reg_name[]; /* names for 16 bit regs */
2468 extern const char * const qi_reg_name[]; /* names for 8 bit regs (low) */
2469 extern const char * const qi_high_reg_name[]; /* names for 8 bit regs (high) */
2470 extern enum reg_class const regclass_map[]; /* smalled class containing REGNO */
2471 extern struct rtx_def *ix86_compare_op0; /* operand 0 for comparisons */
2472 extern struct rtx_def *ix86_compare_op1; /* operand 1 for comparisons */
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