1 /* Definitions of target machine for GNU compiler for Intel X86
3 Copyright (C) 1988, 92, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* The purpose of this file is to define the characteristics of the i386,
23 independent of assembler syntax or operating system.
25 Three other files build on this one to describe a specific assembler syntax:
26 bsd386.h, att386.h, and sun386.h.
28 The actual tm.h file for a particular system should include
29 this file, and then the file for the appropriate assembler syntax.
31 Many macros that specify assembler syntax are omitted entirely from
32 this file because they really belong in the files for particular
33 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
34 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
35 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
37 /* Names to predefine in the preprocessor for this target machine. */
41 /* Stubs for half-pic support if not OSF/1 reference platform. */
44 #define HALF_PIC_P() 0
45 #define HALF_PIC_NUMBER_PTRS 0
46 #define HALF_PIC_NUMBER_REFS 0
47 #define HALF_PIC_ENCODE(DECL)
48 #define HALF_PIC_DECLARE(NAME)
49 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
50 #define HALF_PIC_ADDRESS_P(X) 0
51 #define HALF_PIC_PTR(X) X
52 #define HALF_PIC_FINISH(STREAM)
55 /* Define the specific costs for a given cpu */
57 struct processor_costs {
58 int add; /* cost of an add instruction */
59 int lea; /* cost of a lea instruction */
60 int shift_var; /* variable shift costs */
61 int shift_const; /* constant shift costs */
62 int mult_init; /* cost of starting a multiply */
63 int mult_bit; /* cost of multiply per each bit set */
64 int divide; /* cost of a divide/mod */
67 extern struct processor_costs *ix86_cost;
69 /* Run-time compilation parameters selecting different hardware subsets. */
71 extern int target_flags;
73 /* Macros used in the machine description to test the flags. */
75 /* configure can arrange to make this 2, to force a 486. */
76 #ifndef TARGET_CPU_DEFAULT
77 #define TARGET_CPU_DEFAULT 0
80 /* Masks for the -m switches */
81 #define MASK_80387 000000000001 /* Hardware floating point */
82 #define MASK_NOTUSED1 000000000002 /* bit not currently used */
83 #define MASK_NOTUSED2 000000000004 /* bit not currently used */
84 #define MASK_RTD 000000000010 /* Use ret that pops args */
85 #define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
86 #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
87 #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
88 #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
89 #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
90 #define MASK_OMIT_LEAF_FRAME_POINTER 0x00000800 /* omit leaf frame pointers */
91 /* Temporary codegen switches */
92 #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
93 #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
94 #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
95 #define MASK_NO_PSEUDO 000010000000 /* Move op's args -> pseudos */
96 #define MASK_DEBUG_ARG 000020000000 /* Debug function_arg */
97 #define MASK_SCHEDULE_PROLOGUE 000040000000 /* Emit prologue as rtl */
98 #define MASK_STACK_PROBE 000100000000 /* Enable stack probing */
100 /* Use the floating point instructions */
101 #define TARGET_80387 (target_flags & MASK_80387)
103 /* Compile using ret insn that pops args.
104 This will not work unless you use prototypes at least
105 for all functions that can take varying numbers of args. */
106 #define TARGET_RTD (target_flags & MASK_RTD)
108 /* Align doubles to a two word boundary. This breaks compatibility with
109 the published ABI's for structures containing doubles, but produces
110 faster code on the pentium. */
111 #define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
113 /* Put uninitialized locals into bss, not data.
114 Meaningful only on svr3. */
115 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
117 /* Use IEEE floating point comparisons. These handle correctly the cases
118 where the result of a comparison is unordered. Normally SIGFPE is
119 generated in such cases, in which case this isn't needed. */
120 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
122 /* Functions that return a floating point value may return that value
123 in the 387 FPU or in 386 integer registers. If set, this flag causes
124 the 387 to be used, which is compatible with most calling conventions. */
125 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
127 /* Disable generation of FP sin, cos and sqrt operations for 387.
128 This is because FreeBSD lacks these in the math-emulator-code */
129 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
131 /* Don't create frame pointers for leaf functions */
132 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
134 /* Temporary switches for tuning code generation */
136 /* Disable 32x32->64 bit multiplies that are used for long long multiplies
137 and division by constants, but sometimes cause reload problems. */
138 #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
139 #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
141 /* Emit/Don't emit prologue as rtl */
142 #define TARGET_SCHEDULE_PROLOGUE (target_flags & MASK_SCHEDULE_PROLOGUE)
144 /* Debug GO_IF_LEGITIMATE_ADDRESS */
145 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
147 /* Debug FUNCTION_ARG macros */
148 #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
150 /* Hack macros for tuning code generation */
151 #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
152 #define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */
154 #define TARGET_386 (ix86_cpu == PROCESSOR_I386)
155 #define TARGET_486 (ix86_cpu == PROCESSOR_I486)
156 #define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
157 #define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO)
158 #define TARGET_K6 (ix86_cpu == PROCESSOR_K6)
160 #define CPUMASK (1 << ix86_cpu)
161 extern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and;
162 extern const int x86_use_bit_test, x86_cmove, x86_deep_branch;
163 extern const int x86_unroll_strlen, x86_use_q_reg, x86_use_any_reg;
164 extern const int x86_double_with_add;
166 #define TARGET_USE_LEAVE (x86_use_leave & CPUMASK)
167 #define TARGET_PUSH_MEMORY (x86_push_memory & CPUMASK)
168 #define TARGET_ZERO_EXTEND_WITH_AND (x86_zero_extend_with_and & CPUMASK)
169 #define TARGET_USE_BIT_TEST (x86_use_bit_test & CPUMASK)
170 #define TARGET_UNROLL_STRLEN (x86_unroll_strlen & CPUMASK)
171 #define TARGET_USE_Q_REG (x86_use_q_reg & CPUMASK)
172 #define TARGET_USE_ANY_REG (x86_use_any_reg & CPUMASK)
173 #define TARGET_CMOVE (x86_cmove & (1 << ix86_arch))
174 #define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & CPUMASK)
175 #define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & CPUMASK)
177 #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
179 #define TARGET_SWITCHES \
180 { { "80387", MASK_80387, "Use hardware fp" }, \
181 { "no-80387", -MASK_80387, "Do not use hardware fp" },\
182 { "hard-float", MASK_80387, "Use hardware fp" }, \
183 { "soft-float", -MASK_80387, "Do not use hardware fp" },\
184 { "no-soft-float", MASK_80387, "Use hardware fp" }, \
185 { "386", 0, "Optimize for i80386" }, \
186 { "no-386", 0, "" }, \
187 { "486", 0, "Optimize for i80486" }, \
188 { "no-486", 0, "" }, \
189 { "pentium", 0, "Optimize for Pentium" }, \
190 { "pentiumpro", 0, "Optimize for Pentium Pro, Pentium II" },\
191 { "rtd", MASK_RTD, "Alternate calling convention" },\
192 { "no-rtd", -MASK_RTD, "Use normal calling convention" },\
193 { "align-double", MASK_ALIGN_DOUBLE, "Align some doubles on dword boundary" },\
194 { "no-align-double", -MASK_ALIGN_DOUBLE, "Align doubles on word boundary" }, \
195 { "svr3-shlib", MASK_SVR3_SHLIB, "Uninitialized locals in .bss" }, \
196 { "no-svr3-shlib", -MASK_SVR3_SHLIB, "Uninitialized locals in .data" }, \
197 { "ieee-fp", MASK_IEEE_FP, "Use IEEE math for fp comparisons" }, \
198 { "no-ieee-fp", -MASK_IEEE_FP, "Do not use IEEE math for fp comparisons" }, \
199 { "fp-ret-in-387", MASK_FLOAT_RETURNS, "Return values of functions in FPU registers" }, \
200 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS , "Do not return values of functions in FPU registers"}, \
201 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387, "Do not generate sin, cos, sqrt for 387" }, \
202 { "fancy-math-387", -MASK_NO_FANCY_MATH_387, "Generate sin, cos, sqrt for FPU"}, \
203 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
204 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER }, \
205 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY, "multiplies of 32 bits constrained to 32 bits" }, \
206 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY, "multiplies of 32 bits are 64 bits" }, \
207 { "schedule-prologue", MASK_SCHEDULE_PROLOGUE }, \
208 { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE }, \
209 { "debug-addr", MASK_DEBUG_ADDR }, \
210 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
211 { "move", -MASK_NO_MOVE }, \
212 { "no-move", MASK_NO_MOVE }, \
213 { "debug-arg", MASK_DEBUG_ARG }, \
214 { "no-debug-arg", -MASK_DEBUG_ARG }, \
215 { "stack-arg-probe", MASK_STACK_PROBE }, \
216 { "no-stack-arg-probe", -MASK_STACK_PROBE }, \
220 { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT}}
222 /* Which processor to schedule for. The cpu attribute defines a list that
223 mirrors this list, so changes to i386.md must be made at the same time. */
226 {PROCESSOR_I386, /* 80386 */
227 PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */
229 PROCESSOR_PENTIUMPRO,
232 #define PROCESSOR_I386_STRING "i386"
233 #define PROCESSOR_I486_STRING "i486"
234 #define PROCESSOR_I586_STRING "i586"
235 #define PROCESSOR_PENTIUM_STRING "pentium"
236 #define PROCESSOR_I686_STRING "i686"
237 #define PROCESSOR_PENTIUMPRO_STRING "pentiumpro"
238 #define PROCESSOR_K6_STRING "k6"
240 extern enum processor_type ix86_cpu;
242 extern int ix86_arch;
244 /* Define the default processor. This is overridden by other tm.h files. */
245 #define PROCESSOR_DEFAULT (enum processor_type) TARGET_CPU_DEFAULT
246 #define PROCESSOR_DEFAULT_STRING \
247 (PROCESSOR_DEFAULT == PROCESSOR_I486 ? PROCESSOR_I486_STRING \
248 : PROCESSOR_DEFAULT == PROCESSOR_PENTIUM ? PROCESSOR_PENTIUM_STRING \
249 : PROCESSOR_DEFAULT == PROCESSOR_PENTIUMPRO ? PROCESSOR_PENTIUMPRO_STRING \
250 : PROCESSOR_DEFAULT == PROCESSOR_K6 ? PROCESSOR_K6_STRING \
251 : PROCESSOR_I386_STRING)
253 /* This macro is similar to `TARGET_SWITCHES' but defines names of
254 command options that have values. Its definition is an
255 initializer with a subgrouping for each command option.
257 Each subgrouping contains a string constant, that defines the
258 fixed part of the option name, and the address of a variable. The
259 variable, type `char *', is set to the variable part of the given
260 option if the fixed part matches. The actual option name is made
261 by appending `-m' to the specified name. */
262 #define TARGET_OPTIONS \
263 { { "cpu=", &ix86_cpu_string, "Schedule code for given CPU"}, \
264 { "arch=", &ix86_arch_string, "Generate code for given CPU"}, \
265 { "reg-alloc=", &i386_reg_alloc_order, "Control allocation order of integer registers" }, \
266 { "regparm=", &i386_regparm_string, "Number of registers used to pass integer arguments" }, \
267 { "align-loops=", &i386_align_loops_string, "Loop code aligned to this power of 2" }, \
268 { "align-jumps=", &i386_align_jumps_string, "Jump targets are aligned to this power of 2" }, \
269 { "align-functions=", &i386_align_funcs_string, "Function starts are aligned to this power of 2" }, \
270 { "branch-cost=", &i386_branch_cost_string }, \
274 /* Sometimes certain combinations of command options do not make
275 sense on a particular target machine. You can define a macro
276 `OVERRIDE_OPTIONS' to take account of this. This macro, if
277 defined, is executed once just after all the command options have
280 Don't use this macro to turn on various extra optimizations for
281 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
283 #define OVERRIDE_OPTIONS override_options ()
285 /* These are meant to be redefined in the host dependent files */
286 #define SUBTARGET_SWITCHES
287 #define SUBTARGET_OPTIONS
289 /* Define this to change the optimizations performed by default. */
290 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE)
292 /* Specs for the compiler proper */
295 #define CC1_CPU_SPEC "\
297 %{m386:-mcpu=i386 -march=i386} \
298 %{mno-486:-mcpu=i386 -march=i386} \
299 %{m486:-mcpu=i486 -march=i486} \
300 %{mno-386:-mcpu=i486 -march=i486} \
301 %{mno-pentium:-mcpu=i486 -march=i486} \
302 %{mpentium:-mcpu=pentium} \
303 %{mno-pentiumpro:-mcpu=pentium} \
304 %{mpentiumpro:-mcpu=pentiumpro}}"
307 #define CPP_486_SPEC "%{!ansi:-Di486} -D__i486 -D__i486__"
308 #define CPP_586_SPEC "%{!ansi:-Di586 -Dpentium} \
309 -D__i586 -D__i586__ -D__pentium -D__pentium__"
310 #define CPP_686_SPEC "%{!ansi:-Di686 -Dpentiumpro} \
311 -D__i686 -D__i686__ -D__pentiumpro -D__pentiumpro__"
313 #ifndef CPP_CPU_DEFAULT_SPEC
314 #if TARGET_CPU_DEFAULT == 1
315 #define CPP_CPU_DEFAULT_SPEC "%(cpp_486)"
317 #if TARGET_CPU_DEFAULT == 2
318 #define CPP_CPU_DEFAULT_SPEC "%(cpp_586)"
320 #if TARGET_CPU_DEFAULT == 3
321 #define CPP_CPU_DEFAULT_SPEC "%(cpp_686)"
323 #define CPP_CPU_DEFAULT_SPEC ""
327 #endif /* CPP_CPU_DEFAULT_SPEC */
330 #define CPP_CPU_SPEC "\
331 -Acpu(i386) -Amachine(i386) \
332 %{!ansi:-Di386} -D__i386 -D__i386__ \
333 %{mcpu=i486:%(cpp_486)} %{m486:%(cpp_486)} \
334 %{mpentium:%(cpp_586)} %{mcpu=pentium:%(cpp_586)} \
335 %{mpentiumpro:%(cpp_686)} %{mcpu=pentiumpro:%(cpp_686)} \
336 %{!mcpu*:%{!m486:%{!mpentium*:%(cpp_cpu_default)}}}"
340 #define CC1_SPEC "%(cc1_spec) "
343 /* This macro defines names of additional specifications to put in the
344 specs that can be used in various specifications like CC1_SPEC. Its
345 definition is an initializer with a subgrouping for each command option.
347 Each subgrouping contains a string constant, that defines the
348 specification name, and a string constant that used by the GNU CC driver
351 Do not define this macro if it does not need to do anything. */
353 #ifndef SUBTARGET_EXTRA_SPECS
354 #define SUBTARGET_EXTRA_SPECS
357 #define EXTRA_SPECS \
358 { "cpp_486", CPP_486_SPEC}, \
359 { "cpp_586", CPP_586_SPEC}, \
360 { "cpp_686", CPP_686_SPEC}, \
361 { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \
362 { "cpp_cpu", CPP_CPU_SPEC }, \
363 { "cc1_cpu", CC1_CPU_SPEC }, \
364 SUBTARGET_EXTRA_SPECS
366 /* target machine storage layout */
368 /* Define for XFmode extended real floating point support.
369 This will automatically cause REAL_ARITHMETIC to be defined. */
370 #define LONG_DOUBLE_TYPE_SIZE 96
372 /* Define if you don't want extended real, but do want to use the
373 software floating point emulator for REAL_ARITHMETIC and
374 decimal <-> binary conversion. */
375 /* #define REAL_ARITHMETIC */
377 /* Define this if most significant byte of a word is the lowest numbered. */
378 /* That is true on the 80386. */
380 #define BITS_BIG_ENDIAN 0
382 /* Define this if most significant byte of a word is the lowest numbered. */
383 /* That is not true on the 80386. */
384 #define BYTES_BIG_ENDIAN 0
386 /* Define this if most significant word of a multiword number is the lowest
388 /* Not true for 80386 */
389 #define WORDS_BIG_ENDIAN 0
391 /* number of bits in an addressable storage unit */
392 #define BITS_PER_UNIT 8
394 /* Width in bits of a "word", which is the contents of a machine register.
395 Note that this is not necessarily the width of data type `int';
396 if using 16-bit ints on a 80386, this would still be 32.
397 But on a machine with 16-bit registers, this would be 16. */
398 #define BITS_PER_WORD 32
400 /* Width of a word, in units (bytes). */
401 #define UNITS_PER_WORD 4
403 /* Width in bits of a pointer.
404 See also the macro `Pmode' defined below. */
405 #define POINTER_SIZE 32
407 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
408 #define PARM_BOUNDARY 32
410 /* Boundary (in *bits*) on which stack pointer should be aligned. */
411 #define STACK_BOUNDARY 32
413 /* Allocation boundary (in *bits*) for the code of a function.
414 For i486, we get better performance by aligning to a cache
415 line (i.e. 16 byte) boundary. */
416 #define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
418 /* Alignment of field after `int : 0' in a structure. */
420 #define EMPTY_FIELD_BOUNDARY 32
422 /* Minimum size in bits of the largest boundary to which any
423 and all fundamental data types supported by the hardware
424 might need to be aligned. No data type wants to be aligned
425 rounder than this. The i386 supports 64-bit floating point
426 quantities, but these can be aligned on any 32-bit boundary.
427 The published ABIs say that doubles should be aligned on word
428 boundaries, but the Pentium gets better performance with them
429 aligned on 64 bit boundaries. */
430 #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
432 /* If defined, a C expression to compute the alignment given to a
433 constant that is being placed in memory. CONSTANT is the constant
434 and ALIGN is the alignment that the object would ordinarily have.
435 The value of this macro is used instead of that alignment to align
438 If this macro is not defined, then ALIGN is used.
440 The typical use of this macro is to increase alignment for string
441 constants to be word aligned so that `strcpy' calls that copy
442 constants can be done inline. */
444 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
445 (TREE_CODE (EXP) == REAL_CST \
446 ? ((TYPE_MODE (TREE_TYPE (EXP)) == DFmode && (ALIGN) < 64) \
448 : (TYPE_MODE (TREE_TYPE (EXP)) == XFmode && (ALIGN) < 128) \
451 : TREE_CODE (EXP) == STRING_CST \
452 ? ((TREE_STRING_LENGTH (EXP) >= 31 && (ALIGN) < 256) \
457 /* If defined, a C expression to compute the alignment for a static
458 variable. TYPE is the data type, and ALIGN is the alignment that
459 the object would ordinarily have. The value of this macro is used
460 instead of that alignment to align the object.
462 If this macro is not defined, then ALIGN is used.
464 One use of this macro is to increase alignment of medium-size
465 data to make it all fit in fewer cache lines. Another is to
466 cause character arrays to be word-aligned so that `strcpy' calls
467 that copy constants to character arrays can be done inline. */
469 #define DATA_ALIGNMENT(TYPE, ALIGN) \
470 ((AGGREGATE_TYPE_P (TYPE) \
471 && TYPE_SIZE (TYPE) \
472 && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \
473 && (TREE_INT_CST_LOW (TYPE_SIZE (TYPE)) >= 256 \
474 || TREE_INT_CST_HIGH (TYPE_SIZE (TYPE))) && (ALIGN) < 256) \
476 : TREE_CODE (TYPE) == ARRAY_TYPE \
477 ? ((TYPE_MODE (TREE_TYPE (TYPE)) == DFmode && (ALIGN) < 64) \
479 : (TYPE_MODE (TREE_TYPE (TYPE)) == XFmode && (ALIGN) < 128) \
482 : TREE_CODE (TYPE) == COMPLEX_TYPE \
483 ? ((TYPE_MODE (TYPE) == DCmode && (ALIGN) < 64) \
485 : (TYPE_MODE (TYPE) == XCmode && (ALIGN) < 128) \
488 : ((TREE_CODE (TYPE) == RECORD_TYPE \
489 || TREE_CODE (TYPE) == UNION_TYPE \
490 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \
491 && TYPE_FIELDS (TYPE)) \
492 ? ((DECL_MODE (TYPE_FIELDS (TYPE)) == DFmode && (ALIGN) < 64) \
494 : (DECL_MODE (TYPE_FIELDS (TYPE)) == XFmode && (ALIGN) < 128) \
497 : TREE_CODE (TYPE) == REAL_TYPE \
498 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \
500 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \
505 /* If defined, a C expression to compute the alignment for a local
506 variable. TYPE is the data type, and ALIGN is the alignment that
507 the object would ordinarily have. The value of this macro is used
508 instead of that alignment to align the object.
510 If this macro is not defined, then ALIGN is used.
512 One use of this macro is to increase alignment of medium-size
513 data to make it all fit in fewer cache lines. */
515 #define LOCAL_ALIGNMENT(TYPE, ALIGN) \
516 (TREE_CODE (TYPE) == ARRAY_TYPE \
517 ? ((TYPE_MODE (TREE_TYPE (TYPE)) == DFmode && (ALIGN) < 64) \
519 : (TYPE_MODE (TREE_TYPE (TYPE)) == XFmode && (ALIGN) < 128) \
522 : TREE_CODE (TYPE) == COMPLEX_TYPE \
523 ? ((TYPE_MODE (TYPE) == DCmode && (ALIGN) < 64) \
525 : (TYPE_MODE (TYPE) == XCmode && (ALIGN) < 128) \
528 : ((TREE_CODE (TYPE) == RECORD_TYPE \
529 || TREE_CODE (TYPE) == UNION_TYPE \
530 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \
531 && TYPE_FIELDS (TYPE)) \
532 ? ((DECL_MODE (TYPE_FIELDS (TYPE)) == DFmode && (ALIGN) < 64) \
534 : (DECL_MODE (TYPE_FIELDS (TYPE)) == XFmode && (ALIGN) < 128) \
537 : TREE_CODE (TYPE) == REAL_TYPE \
538 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \
540 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \
545 /* Set this non-zero if move instructions will actually fail to work
546 when given unaligned data. */
547 #define STRICT_ALIGNMENT 0
549 /* If bit field type is int, don't let it cross an int,
550 and give entire struct the alignment of an int. */
551 /* Required on the 386 since it doesn't have bitfield insns. */
552 #define PCC_BITFIELD_TYPE_MATTERS 1
554 /* Maximum power of 2 that code can be aligned to. */
555 #define MAX_CODE_ALIGN 6 /* 64 byte alignment */
557 /* Align loop starts for optimal branching. */
558 #define LOOP_ALIGN(LABEL) (i386_align_loops)
559 #define LOOP_ALIGN_MAX_SKIP (i386_align_loops_string ? 0 : 7)
561 /* This is how to align an instruction for optimal branching.
562 On i486 we'll get better performance by aligning on a
563 cache line (i.e. 16 byte) boundary. */
564 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (i386_align_jumps)
565 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (i386_align_jumps_string ? 0 : 7)
568 /* Standard register usage. */
570 /* This processor has special stack-like registers. See reg-stack.c
574 #define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode)
576 /* Number of actual hardware registers.
577 The hardware registers are assigned numbers for the compiler
578 from 0 to just below FIRST_PSEUDO_REGISTER.
579 All registers that the compiler knows about must be given numbers,
580 even those that are not normally considered general registers.
582 In the 80386 we give the 8 general purpose registers the numbers 0-7.
583 We number the floating point registers 8-15.
584 Note that registers 0-7 can be accessed as a short or int,
585 while only 0-3 may be used with byte `mov' instructions.
587 Reg 16 does not correspond to any hardware register, but instead
588 appears in the RTL as an argument pointer prior to reload, and is
589 eliminated during reloading in favor of either the stack or frame
592 #define FIRST_PSEUDO_REGISTER 17
594 /* 1 for registers that have pervasive standard uses
595 and are not available for the register allocator.
596 On the 80386, the stack pointer is such, as is the arg pointer. */
597 #define FIXED_REGISTERS \
598 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
599 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
601 /* 1 for registers not available across function calls.
602 These must include the FIXED_REGISTERS and also any
603 registers that can be used without being saved.
604 The latter must include the registers where values are returned
605 and the register where structure-value addresses are passed.
606 Aside from that, you can include as many other registers as you like. */
608 #define CALL_USED_REGISTERS \
609 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
610 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
612 /* Order in which to allocate registers. Each register must be
613 listed once, even those in FIXED_REGISTERS. List frame pointer
614 late and fixed registers last. Note that, in general, we prefer
615 registers listed in CALL_USED_REGISTERS, keeping the others
616 available for storage of persistent values.
618 Three different versions of REG_ALLOC_ORDER have been tried:
620 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
621 but slower code on simple functions returning values in eax.
623 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
624 perl 4.036 due to not being able to create a DImode register (to hold a 2
627 If the order is eax, edx, ecx, ... it produces better code for simple
628 functions, and a slightly slower compiler. Users complained about the code
629 generated by allocating edx first, so restore the 'natural' order of things. */
631 #define REG_ALLOC_ORDER \
632 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
633 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
635 /* A C statement (sans semicolon) to choose the order in which to
636 allocate hard registers for pseudo-registers local to a basic
639 Store the desired register order in the array `reg_alloc_order'.
640 Element 0 should be the register to allocate first; element 1, the
641 next register; and so on.
643 The macro body should not assume anything about the contents of
644 `reg_alloc_order' before execution of the macro.
646 On most machines, it is not necessary to define this macro. */
648 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
650 /* Macro to conditionally modify fixed_regs/call_used_regs. */
651 #define CONDITIONAL_REGISTER_USAGE \
655 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
656 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
658 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
662 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
663 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
664 if (TEST_HARD_REG_BIT (x, i)) \
665 fixed_regs[i] = call_used_regs[i] = 1; \
669 /* Return number of consecutive hard regs needed starting at reg REGNO
670 to hold something of mode MODE.
671 This is ordinarily the length in words of a value of mode MODE
672 but can be less for certain modes in special long registers.
674 Actually there are no two word move instructions for consecutive
675 registers. And only registers 0-3 may have mov byte instructions
679 #define HARD_REGNO_NREGS(REGNO, MODE) \
680 (FP_REGNO_P (REGNO) ? 1 \
681 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
683 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
684 On the 80386, the first 4 cpu registers can hold any mode
685 while the floating point registers may hold only floating point.
686 Make it clear that the fp regs could not hold a 16-byte float. */
688 /* The casts to int placate a compiler on a microvax,
689 for cross-compiler testing. */
691 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
693 : FP_REGNO_P (REGNO) \
694 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
695 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
696 && GET_MODE_UNIT_SIZE (MODE) <= (LONG_DOUBLE_TYPE_SIZE == 96 ? 12 : 8))\
697 : (int) (MODE) != (int) QImode ? 1 \
698 : (reload_in_progress | reload_completed) == 1)
700 /* Value is 1 if it is a good idea to tie two pseudo registers
701 when one has mode MODE1 and one has mode MODE2.
702 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
703 for any hard reg, then this must be 0 for correct output. */
705 #define MODES_TIEABLE_P(MODE1, MODE2) \
706 ((MODE1) == (MODE2) \
707 || ((MODE1) == SImode && (MODE2) == HImode) \
708 || ((MODE1) == HImode && (MODE2) == SImode))
710 /* Specify the registers used for certain standard purposes.
711 The values of these macros are register numbers. */
713 /* on the 386 the pc register is %eip, and is not usable as a general
714 register. The ordinary mov instructions won't work */
715 /* #define PC_REGNUM */
717 /* Register to use for pushing function arguments. */
718 #define STACK_POINTER_REGNUM 7
720 /* Base register for access to local variables of the function. */
721 #define FRAME_POINTER_REGNUM 6
723 /* First floating point reg */
724 #define FIRST_FLOAT_REG 8
726 /* First & last stack-like regs */
727 #define FIRST_STACK_REG FIRST_FLOAT_REG
728 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
730 /* Value should be nonzero if functions must have frame pointers.
731 Zero means the frame pointer need not be set up (and parms
732 may be accessed via the stack pointer) in functions that seem suitable.
733 This is computed in `reload', in reload1.c. */
734 #define FRAME_POINTER_REQUIRED (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ())
736 /* Base register for access to arguments of the function. */
737 #define ARG_POINTER_REGNUM 16
739 /* Register in which static-chain is passed to a function. */
740 #define STATIC_CHAIN_REGNUM 2
742 /* Register to hold the addressing base for position independent
743 code access to data items. */
744 #define PIC_OFFSET_TABLE_REGNUM 3
746 /* Register in which address to store a structure value
747 arrives in the function. On the 386, the prologue
748 copies this from the stack to register %eax. */
749 #define STRUCT_VALUE_INCOMING 0
751 /* Place in which caller passes the structure value address.
752 0 means push the value on the stack like an argument. */
753 #define STRUCT_VALUE 0
755 /* A C expression which can inhibit the returning of certain function
756 values in registers, based on the type of value. A nonzero value
757 says to return the function value in memory, just as large
758 structures are always returned. Here TYPE will be a C expression
759 of type `tree', representing the data type of the value.
761 Note that values of mode `BLKmode' must be explicitly handled by
762 this macro. Also, the option `-fpcc-struct-return' takes effect
763 regardless of this macro. On most systems, it is possible to
764 leave the macro undefined; this causes a default definition to be
765 used, whose value is the constant 1 for `BLKmode' values, and 0
768 Do not use this macro to indicate that structures and unions
769 should always be returned in memory. You should instead use
770 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
772 #define RETURN_IN_MEMORY(TYPE) \
773 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
776 /* Define the classes of registers for register constraints in the
777 machine description. Also define ranges of constants.
779 One of the classes must always be named ALL_REGS and include all hard regs.
780 If there is more than one class, another class must be named NO_REGS
781 and contain no registers.
783 The name GENERAL_REGS must be the name of a class (or an alias for
784 another name such as ALL_REGS). This is the class of registers
785 that is allowed by "g" or "r" in a register constraint.
786 Also, registers outside this class are allocated only when
787 instructions express preferences for them.
789 The classes must be numbered in nondecreasing order; that is,
790 a larger-numbered class must never be contained completely
791 in a smaller-numbered class.
793 For any two classes, it is very desirable that there be another
794 class that represents their union.
796 It might seem that class BREG is unnecessary, since no useful 386
797 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
798 and the "b" register constraint is useful in asms for syscalls. */
803 AREG, DREG, CREG, BREG,
804 AD_REGS, /* %eax/%edx for DImode */
805 Q_REGS, /* %eax %ebx %ecx %edx */
807 INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
808 GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
809 FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
811 ALL_REGS, LIM_REG_CLASSES
814 #define N_REG_CLASSES (int) LIM_REG_CLASSES
816 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
818 /* Give names of register classes as strings for dump file. */
820 #define REG_CLASS_NAMES \
822 "AREG", "DREG", "CREG", "BREG", \
828 "FP_TOP_REG", "FP_SECOND_REG", \
832 /* Define which registers fit in which classes.
833 This is an initializer for a vector of HARD_REG_SET
834 of length N_REG_CLASSES. */
836 #define REG_CLASS_CONTENTS \
838 {0x1}, {0x2}, {0x4}, {0x8}, /* AREG, DREG, CREG, BREG */ \
839 {0x3}, /* AD_REGS */ \
840 {0xf}, /* Q_REGS */ \
841 {0x10}, {0x20}, /* SIREG, DIREG */ \
842 {0x7f}, /* INDEX_REGS */ \
843 {0x100ff}, /* GENERAL_REGS */ \
844 {0x0100}, {0x0200}, /* FP_TOP_REG, FP_SECOND_REG */ \
845 {0xff00}, /* FLOAT_REGS */ \
848 /* The same information, inverted:
849 Return the class number of the smallest class containing
850 reg number REGNO. This could be a conditional expression
851 or could index an array. */
853 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
855 /* When defined, the compiler allows registers explicitly used in the
856 rtl to be used as spill registers but prevents the compiler from
857 extending the lifetime of these registers. */
859 #define SMALL_REGISTER_CLASSES 1
861 #define QI_REG_P(X) \
862 (REG_P (X) && REGNO (X) < 4)
863 #define NON_QI_REG_P(X) \
864 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
866 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
867 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
869 #define STACK_REG_P(xop) (REG_P (xop) && \
870 REGNO (xop) >= FIRST_STACK_REG && \
871 REGNO (xop) <= LAST_STACK_REG)
873 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
875 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
877 /* 1 if register REGNO can magically overlap other regs.
878 Note that nonzero values work only in very special circumstances. */
880 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
882 /* The class value for index registers, and the one for base regs. */
884 #define INDEX_REG_CLASS INDEX_REGS
885 #define BASE_REG_CLASS GENERAL_REGS
887 /* Get reg_class from a letter such as appears in the machine description. */
889 #define REG_CLASS_FROM_LETTER(C) \
890 ((C) == 'r' ? GENERAL_REGS : \
891 (C) == 'q' ? Q_REGS : \
892 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
895 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
898 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
901 (C) == 'a' ? AREG : \
902 (C) == 'b' ? BREG : \
903 (C) == 'c' ? CREG : \
904 (C) == 'd' ? DREG : \
905 (C) == 'A' ? AD_REGS : \
906 (C) == 'D' ? DIREG : \
907 (C) == 'S' ? SIREG : NO_REGS)
909 /* The letters I, J, K, L and M in a register constraint string
910 can be used to stand for particular ranges of immediate operands.
911 This macro defines what the ranges are.
912 C is the letter, and VALUE is a constant value.
913 Return 1 if VALUE is in the range specified by C.
915 I is for non-DImode shifts.
916 J is for DImode shifts.
917 K and L are for an `andsi' optimization.
918 M is for shifts that can be executed by the "lea" opcode.
921 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
922 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
923 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
924 (C) == 'K' ? (VALUE) == 0xff : \
925 (C) == 'L' ? (VALUE) == 0xffff : \
926 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
927 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
928 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \
931 /* Similar, but for floating constants, and defining letters G and H.
932 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
933 TARGET_387 isn't set, because the stack register converter may need to
934 load 0.0 into the function value register. */
936 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
937 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
939 /* Place additional restrictions on the register class to use when it
940 is necessary to be able to hold a value of mode MODE in a reload
941 register for which class CLASS would ordinarily be used. */
943 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
944 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
947 /* Given an rtx X being reloaded into a reg required to be
948 in class CLASS, return the class of reg to actually use.
949 In general this is just CLASS; but on some machines
950 in some cases it is preferable to use a more restrictive class.
951 On the 80386 series, we prevent floating constants from being
952 reloaded into floating registers (since no move-insn can do that)
953 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
955 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
956 QImode must go into class Q_REGS.
957 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
958 movdf to do mem-to-mem moves through integer regs. */
960 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
961 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode \
962 ? (standard_80387_constant_p (X) \
963 ? reg_class_subset_p (CLASS, FLOAT_REGS) ? CLASS : FLOAT_REGS \
965 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
966 : ((CLASS) == ALL_REGS \
967 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
970 /* If we are copying between general and FP registers, we need a memory
973 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
974 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
975 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
977 /* Return the maximum number of consecutive registers
978 needed to represent mode MODE in a register of class CLASS. */
979 /* On the 80386, this is the size of MODE in words,
980 except in the FP regs, where a single reg is always enough. */
981 #define CLASS_MAX_NREGS(CLASS, MODE) \
982 (FLOAT_CLASS_P (CLASS) ? 1 : \
983 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
985 /* A C expression whose value is nonzero if pseudos that have been
986 assigned to registers of class CLASS would likely be spilled
987 because registers of CLASS are needed for spill registers.
989 The default value of this macro returns 1 if CLASS has exactly one
990 register and zero otherwise. On most machines, this default
991 should be used. Only define this macro to some other expression
992 if pseudo allocated by `local-alloc.c' end up in memory because
993 their hard registers were needed for spill registers. If this
994 macro returns nonzero for those classes, those pseudos will only
995 be allocated by `global.c', which knows how to reallocate the
996 pseudo to another register. If there would not be another
997 register available for reallocation, you should not change the
998 definition of this macro since the only effect of such a
999 definition would be to slow down register allocation. */
1001 #define CLASS_LIKELY_SPILLED_P(CLASS) \
1002 (((CLASS) == AREG) \
1003 || ((CLASS) == DREG) \
1004 || ((CLASS) == CREG) \
1005 || ((CLASS) == BREG) \
1006 || ((CLASS) == AD_REGS) \
1007 || ((CLASS) == SIREG) \
1008 || ((CLASS) == DIREG))
1011 /* Stack layout; function entry, exit and calling. */
1013 /* Define this if pushing a word on the stack
1014 makes the stack pointer a smaller address. */
1015 #define STACK_GROWS_DOWNWARD
1017 /* Define this if the nominal address of the stack frame
1018 is at the high-address end of the local variables;
1019 that is, each additional local variable allocated
1020 goes at a more negative offset in the frame. */
1021 #define FRAME_GROWS_DOWNWARD
1023 /* Offset within stack frame to start allocating local variables at.
1024 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1025 first local allocated. Otherwise, it is the offset to the BEGINNING
1026 of the first local allocated. */
1027 #define STARTING_FRAME_OFFSET 0
1029 /* If we generate an insn to push BYTES bytes,
1030 this says how many the stack pointer really advances by.
1031 On 386 pushw decrements by exactly 2 no matter what the position was.
1032 On the 386 there is no pushb; we use pushw instead, and this
1033 has the effect of rounding up to 2. */
1035 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
1037 /* Offset of first parameter from the argument pointer register value. */
1038 #define FIRST_PARM_OFFSET(FNDECL) 0
1040 /* Value is the number of bytes of arguments automatically
1041 popped when returning from a subroutine call.
1042 FUNDECL is the declaration node of the function (as a tree),
1043 FUNTYPE is the data type of the function (as a tree),
1044 or for a library call it is an identifier node for the subroutine name.
1045 SIZE is the number of bytes of arguments passed on the stack.
1047 On the 80386, the RTD insn may be used to pop them if the number
1048 of args is fixed, but if the number is variable then the caller
1049 must pop them all. RTD can't be used for library calls now
1050 because the library is compiled with the Unix compiler.
1051 Use of RTD is a selectable option, since it is incompatible with
1052 standard Unix calling sequences. If the option is not selected,
1053 the caller must always pop the args.
1055 The attribute stdcall is equivalent to RTD on a per module basis. */
1057 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
1058 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
1060 /* Define how to find the value returned by a function.
1061 VALTYPE is the data type of the value (as a tree).
1062 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1063 otherwise, FUNC is 0. */
1064 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1065 gen_rtx_REG (TYPE_MODE (VALTYPE), \
1066 VALUE_REGNO (TYPE_MODE (VALTYPE)))
1068 /* Define how to find the value returned by a library function
1069 assuming the value has mode MODE. */
1071 #define LIBCALL_VALUE(MODE) \
1072 gen_rtx_REG (MODE, VALUE_REGNO (MODE))
1074 /* Define the size of the result block used for communication between
1075 untyped_call and untyped_return. The block contains a DImode value
1076 followed by the block used by fnsave and frstor. */
1078 #define APPLY_RESULT_SIZE (8+108)
1080 /* 1 if N is a possible register number for function argument passing. */
1081 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
1083 /* Define a data type for recording info about an argument list
1084 during the scan of that argument list. This data type should
1085 hold all necessary information about the function itself
1086 and about the args processed so far, enough to enable macros
1087 such as FUNCTION_ARG to determine where the next arg should go. */
1089 typedef struct i386_args {
1090 int words; /* # words passed so far */
1091 int nregs; /* # registers available for passing */
1092 int regno; /* next available register number */
1095 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1096 for a call to a function whose data type is FNTYPE.
1097 For a library call, FNTYPE is 0. */
1099 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
1100 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
1102 /* Update the data in CUM to advance over an argument
1103 of mode MODE and data type TYPE.
1104 (TYPE is null for libcalls where that information may not be available.) */
1106 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1107 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
1109 /* Define where to put the arguments to a function.
1110 Value is zero to push the argument on the stack,
1111 or a hard register in which to store the argument.
1113 MODE is the argument's machine mode.
1114 TYPE is the data type of the argument (as a tree).
1115 This is null for libcalls where that information may
1117 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1118 the preceding args and about the function being called.
1119 NAMED is nonzero if this argument is a named parameter
1120 (otherwise it is an extra parameter matching an ellipsis). */
1122 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1123 (function_arg (&CUM, MODE, TYPE, NAMED))
1125 /* For an arg passed partly in registers and partly in memory,
1126 this is the number of registers used.
1127 For args passed entirely in registers or entirely in memory, zero. */
1129 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1130 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
1132 /* This macro is invoked just before the start of a function.
1133 It is used here to output code for -fpic that will load the
1134 return address into %ebx. */
1136 #undef ASM_OUTPUT_FUNCTION_PREFIX
1137 #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME) \
1138 asm_output_function_prefix (FILE, FNNAME)
1140 /* This macro generates the assembly code for function entry.
1141 FILE is a stdio stream to output the code to.
1142 SIZE is an int: how many units of temporary storage to allocate.
1143 Refer to the array `regs_ever_live' to determine which registers
1144 to save; `regs_ever_live[I]' is nonzero if register number I
1145 is ever used in the function. This macro is responsible for
1146 knowing which registers should not be saved even if used. */
1148 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1149 function_prologue (FILE, SIZE)
1151 /* Output assembler code to FILE to increment profiler label # LABELNO
1152 for profiling a function entry. */
1154 #define FUNCTION_PROFILER(FILE, LABELNO) \
1158 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
1159 LPREFIX, (LABELNO)); \
1160 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
1164 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
1165 fprintf (FILE, "\tcall _mcount\n"); \
1170 /* There are three profiling modes for basic blocks available.
1171 The modes are selected at compile time by using the options
1172 -a or -ax of the gnu compiler.
1173 The variable `profile_block_flag' will be set according to the
1176 profile_block_flag == 0, no option used:
1180 profile_block_flag == 1, -a option used.
1182 Count frequency of execution of every basic block.
1184 profile_block_flag == 2, -ax option used.
1186 Generate code to allow several different profiling modes at run time.
1187 Available modes are:
1188 Produce a trace of all basic blocks.
1189 Count frequency of jump instructions executed.
1190 In every mode it is possible to start profiling upon entering
1191 certain functions and to disable profiling of some other functions.
1193 The result of basic-block profiling will be written to a file `bb.out'.
1194 If the -ax option is used parameters for the profiling will be read
1199 /* The following macro shall output assembler code to FILE
1200 to initialize basic-block profiling.
1202 If profile_block_flag == 2
1204 Output code to call the subroutine `__bb_init_trace_func'
1205 and pass two parameters to it. The first parameter is
1206 the address of a block allocated in the object module.
1207 The second parameter is the number of the first basic block
1210 The name of the block is a local symbol made with this statement:
1212 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1214 Of course, since you are writing the definition of
1215 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1216 can take a short cut in the definition of this macro and use the
1217 name that you know will result.
1219 The number of the first basic block of the function is
1220 passed to the macro in BLOCK_OR_LABEL.
1222 If described in a virtual assembler language the code to be
1226 parameter2 <- BLOCK_OR_LABEL
1227 call __bb_init_trace_func
1229 else if profile_block_flag != 0
1231 Output code to call the subroutine `__bb_init_func'
1232 and pass one single parameter to it, which is the same
1233 as the first parameter to `__bb_init_trace_func'.
1235 The first word of this parameter is a flag which will be nonzero if
1236 the object module has already been initialized. So test this word
1237 first, and do not call `__bb_init_func' if the flag is nonzero.
1238 Note: When profile_block_flag == 2 the test need not be done
1239 but `__bb_init_trace_func' *must* be called.
1241 BLOCK_OR_LABEL may be used to generate a label number as a
1242 branch destination in case `__bb_init_func' will not be called.
1244 If described in a virtual assembler language the code to be
1255 #undef FUNCTION_BLOCK_PROFILER
1256 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
1259 static int num_func = 0; \
1261 char block_table[80], false_label[80]; \
1263 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1265 xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \
1266 xops[5] = stack_pointer_rtx; \
1267 xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \
1269 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1271 switch (profile_block_flag) \
1276 xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \
1277 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_trace_func")); \
1278 xops[6] = GEN_INT (8); \
1280 output_asm_insn (AS1(push%L2,%2), xops); \
1282 output_asm_insn (AS1(push%L1,%1), xops); \
1285 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1286 output_asm_insn (AS1 (push%L7,%7), xops); \
1289 output_asm_insn (AS1(call,%P3), xops); \
1290 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1296 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
1298 xops[0] = const0_rtx; \
1299 xops[2] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, false_label)); \
1300 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_func")); \
1301 xops[4] = gen_rtx_MEM (Pmode, xops[1]); \
1302 xops[6] = GEN_INT (4); \
1304 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
1306 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
1307 output_asm_insn (AS1(jne,%2), xops); \
1310 output_asm_insn (AS1(push%L1,%1), xops); \
1313 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1314 output_asm_insn (AS1 (push%L7,%7), xops); \
1317 output_asm_insn (AS1(call,%P3), xops); \
1318 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1319 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LPBZ", num_func); \
1328 /* The following macro shall output assembler code to FILE
1329 to increment a counter associated with basic block number BLOCKNO.
1331 If profile_block_flag == 2
1333 Output code to initialize the global structure `__bb' and
1334 call the function `__bb_trace_func' which will increment the
1337 `__bb' consists of two words. In the first word the number
1338 of the basic block has to be stored. In the second word
1339 the address of a block allocated in the object module
1342 The basic block number is given by BLOCKNO.
1344 The address of the block is given by the label created with
1346 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1348 by FUNCTION_BLOCK_PROFILER.
1350 Of course, since you are writing the definition of
1351 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1352 can take a short cut in the definition of this macro and use the
1353 name that you know will result.
1355 If described in a virtual assembler language the code to be
1358 move BLOCKNO -> (__bb)
1359 move LPBX0 -> (__bb+4)
1360 call __bb_trace_func
1362 Note that function `__bb_trace_func' must not change the
1363 machine state, especially the flag register. To grant
1364 this, you must output code to save and restore registers
1365 either in this macro or in the macros MACHINE_STATE_SAVE
1366 and MACHINE_STATE_RESTORE. The last two macros will be
1367 used in the function `__bb_trace_func', so you must make
1368 sure that the function prologue does not change any
1369 register prior to saving it with MACHINE_STATE_SAVE.
1371 else if profile_block_flag != 0
1373 Output code to increment the counter directly.
1374 Basic blocks are numbered separately from zero within each
1375 compiled object module. The count associated with block number
1376 BLOCKNO is at index BLOCKNO in an array of words; the name of
1377 this array is a local symbol made with this statement:
1379 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1381 Of course, since you are writing the definition of
1382 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1383 can take a short cut in the definition of this macro and use the
1384 name that you know will result.
1386 If described in a virtual assembler language the code to be
1389 inc (LPBX2+4*BLOCKNO)
1393 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1396 rtx xops[8], cnt_rtx; \
1398 char *block_table = counts; \
1400 switch (profile_block_flag) \
1405 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1407 xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \
1408 xops[2] = GEN_INT ((BLOCKNO)); \
1409 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_func")); \
1410 xops[4] = gen_rtx_SYMBOL_REF (VOIDmode, "__bb"); \
1411 xops[5] = plus_constant (xops[4], 4); \
1412 xops[0] = gen_rtx_MEM (SImode, xops[4]); \
1413 xops[6] = gen_rtx_MEM (SImode, xops[5]); \
1415 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1417 fprintf(FILE, "\tpushf\n"); \
1418 output_asm_insn (AS2(mov%L0,%2,%0), xops); \
1421 xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \
1422 output_asm_insn (AS1(push%L7,%7), xops); \
1423 output_asm_insn (AS2(lea%L7,%a1,%7), xops); \
1424 output_asm_insn (AS2(mov%L6,%7,%6), xops); \
1425 output_asm_insn (AS1(pop%L7,%7), xops); \
1428 output_asm_insn (AS2(mov%L6,%1,%6), xops); \
1429 output_asm_insn (AS1(call,%P3), xops); \
1430 fprintf(FILE, "\tpopf\n"); \
1436 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
1437 cnt_rtx = gen_rtx_SYMBOL_REF (VOIDmode, counts); \
1438 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
1441 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
1444 cnt_rtx = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, cnt_rtx); \
1446 xops[0] = gen_rtx_MEM (SImode, cnt_rtx); \
1447 output_asm_insn (AS1(inc%L0,%0), xops); \
1455 /* The following macro shall output assembler code to FILE
1456 to indicate a return from function during basic-block profiling.
1458 If profiling_block_flag == 2:
1460 Output assembler code to call function `__bb_trace_ret'.
1462 Note that function `__bb_trace_ret' must not change the
1463 machine state, especially the flag register. To grant
1464 this, you must output code to save and restore registers
1465 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1466 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1467 used in the function `__bb_trace_ret', so you must make
1468 sure that the function prologue does not change any
1469 register prior to saving it with MACHINE_STATE_SAVE_RET.
1471 else if profiling_block_flag != 0:
1473 The macro will not be used, so it need not distinguish
1477 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1482 xops[0] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_ret")); \
1484 output_asm_insn (AS1(call,%P0), xops); \
1489 /* The function `__bb_trace_func' is called in every basic block
1490 and is not allowed to change the machine state. Saving (restoring)
1491 the state can either be done in the BLOCK_PROFILER macro,
1492 before calling function (rsp. after returning from function)
1493 `__bb_trace_func', or it can be done inside the function by
1494 defining the macros:
1496 MACHINE_STATE_SAVE(ID)
1497 MACHINE_STATE_RESTORE(ID)
1499 In the latter case care must be taken, that the prologue code
1500 of function `__bb_trace_func' does not already change the
1501 state prior to saving it with MACHINE_STATE_SAVE.
1503 The parameter `ID' is a string identifying a unique macro use.
1505 On the i386 the initialization code at the begin of
1506 function `__bb_trace_func' contains a `sub' instruction
1507 therefore we handle save and restore of the flag register
1508 in the BLOCK_PROFILER macro. */
1510 #define MACHINE_STATE_SAVE(ID) \
1511 asm (" pushl %eax"); \
1512 asm (" pushl %ecx"); \
1513 asm (" pushl %edx"); \
1514 asm (" pushl %esi");
1516 #define MACHINE_STATE_RESTORE(ID) \
1517 asm (" popl %esi"); \
1518 asm (" popl %edx"); \
1519 asm (" popl %ecx"); \
1522 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1523 the stack pointer does not matter. The value is tested only in
1524 functions that have frame pointers.
1525 No definition is equivalent to always zero. */
1526 /* Note on the 386 it might be more efficient not to define this since
1527 we have to restore it ourselves from the frame pointer, in order to
1530 #define EXIT_IGNORE_STACK 1
1532 /* This macro generates the assembly code for function exit,
1533 on machines that need it. If FUNCTION_EPILOGUE is not defined
1534 then individual return instructions are generated for each
1535 return statement. Args are same as for FUNCTION_PROLOGUE.
1537 The function epilogue should not depend on the current stack pointer!
1538 It should use the frame pointer only. This is mandatory because
1539 of alloca; we also take advantage of it to omit stack adjustments
1542 If the last non-note insn in the function is a BARRIER, then there
1543 is no need to emit a function prologue, because control does not fall
1544 off the end. This happens if the function ends in an "exit" call, or
1545 if a `return' insn is emitted directly into the function. */
1548 #define FUNCTION_BEGIN_EPILOGUE(FILE) \
1550 rtx last = get_last_insn (); \
1551 if (last && GET_CODE (last) == NOTE) \
1552 last = prev_nonnote_insn (last); \
1553 /* if (! last || GET_CODE (last) != BARRIER) \
1554 function_epilogue (FILE, SIZE);*/ \
1558 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1559 function_epilogue (FILE, SIZE)
1561 /* Output assembler code for a block containing the constant parts
1562 of a trampoline, leaving space for the variable parts. */
1564 /* On the 386, the trampoline contains two instructions:
1567 The trampoline is generated entirely at runtime. The operand of JMP
1568 is the address of FUNCTION relative to the instruction following the
1569 JMP (which is 5 bytes long). */
1571 /* Length in units of the trampoline for entering a nested function. */
1573 #define TRAMPOLINE_SIZE 10
1575 /* Emit RTL insns to initialize the variable parts of a trampoline.
1576 FNADDR is an RTX for the address of the function's pure code.
1577 CXT is an RTX for the static chain value for the function. */
1579 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1581 /* Compute offset from the end of the jmp to the target function. */ \
1582 rtx disp = expand_binop (SImode, sub_optab, FNADDR, \
1583 plus_constant (TRAMP, 10), \
1584 NULL_RTX, 1, OPTAB_DIRECT); \
1585 emit_move_insn (gen_rtx_MEM (QImode, TRAMP), GEN_INT (0xb9)); \
1586 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 1)), CXT); \
1587 emit_move_insn (gen_rtx_MEM (QImode, plus_constant (TRAMP, 5)), GEN_INT (0xe9));\
1588 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 6)), disp); \
1591 /* Definitions for register eliminations.
1593 This is an array of structures. Each structure initializes one pair
1594 of eliminable registers. The "from" register number is given first,
1595 followed by "to". Eliminations of the same "from" register are listed
1596 in order of preference.
1598 We have two registers that can be eliminated on the i386. First, the
1599 frame pointer register can often be eliminated in favor of the stack
1600 pointer register. Secondly, the argument pointer register can always be
1601 eliminated; it is replaced with either the stack or frame pointer. */
1603 #define ELIMINABLE_REGS \
1604 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1605 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1606 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1608 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1609 Frame pointer elimination is automatically handled.
1611 For the i386, if frame pointer elimination is being done, we would like to
1612 convert ap into sp, not fp.
1614 All other eliminations are valid. */
1616 #define CAN_ELIMINATE(FROM, TO) \
1617 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1618 ? ! frame_pointer_needed \
1621 /* Define the offset between two registers, one to be eliminated, and the other
1622 its replacement, at the start of a routine. */
1624 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1626 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1627 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1633 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1634 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
1635 || ((current_function_uses_pic_offset_table \
1636 || current_function_uses_const_pool) \
1637 && flag_pic && regno == PIC_OFFSET_TABLE_REGNUM)) \
1640 (OFFSET) = offset + get_frame_size (); \
1642 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1643 (OFFSET) += 4; /* Skip saved PC */ \
1647 /* Addressing modes, and classification of registers for them. */
1649 /* #define HAVE_POST_INCREMENT 0 */
1650 /* #define HAVE_POST_DECREMENT 0 */
1652 /* #define HAVE_PRE_DECREMENT 0 */
1653 /* #define HAVE_PRE_INCREMENT 0 */
1655 /* Macros to check register numbers against specific register classes. */
1657 /* These assume that REGNO is a hard or pseudo reg number.
1658 They give nonzero only if REGNO is a hard reg of the suitable class
1659 or a pseudo reg currently allocated to a suitable hard reg.
1660 Since they use reg_renumber, they are safe only once reg_renumber
1661 has been allocated, which happens in local-alloc.c. */
1663 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1664 ((REGNO) < STACK_POINTER_REGNUM \
1665 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1667 #define REGNO_OK_FOR_BASE_P(REGNO) \
1668 ((REGNO) <= STACK_POINTER_REGNUM \
1669 || (REGNO) == ARG_POINTER_REGNUM \
1670 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1672 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1673 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1675 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1676 and check its validity for a certain class.
1677 We have two alternate definitions for each of them.
1678 The usual definition accepts all pseudo regs; the other rejects
1679 them unless they have been allocated suitable hard regs.
1680 The symbol REG_OK_STRICT causes the latter definition to be used.
1682 Most source files want to accept pseudo regs in the hope that
1683 they will get allocated to the class that the insn wants them to be in.
1684 Source files for reload pass need to be strict.
1685 After reload, it makes no difference, since pseudo regs have
1686 been eliminated by then. */
1689 /* Non strict versions, pseudos are ok */
1690 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1691 (REGNO (X) < STACK_POINTER_REGNUM \
1692 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1694 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1695 (REGNO (X) <= STACK_POINTER_REGNUM \
1696 || REGNO (X) == ARG_POINTER_REGNUM \
1697 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1699 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1700 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1702 /* Strict versions, hard registers only */
1703 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1704 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1705 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1706 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1708 #ifndef REG_OK_STRICT
1709 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1710 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1711 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1714 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1715 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1716 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1719 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1720 that is a valid memory address for an instruction.
1721 The MODE argument is the machine mode for the MEM expression
1722 that wants to use this address.
1724 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1725 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1727 See legitimize_pic_address in i386.c for details as to what
1728 constitutes a legitimate address when -fpic is used. */
1730 #define MAX_REGS_PER_ADDRESS 2
1732 #define CONSTANT_ADDRESS_P(X) \
1733 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1734 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
1736 /* Nonzero if the constant value X is a legitimate general operand.
1737 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1739 #define LEGITIMATE_CONSTANT_P(X) \
1740 (GET_CODE (X) == CONST_DOUBLE ? standard_80387_constant_p (X) : 1)
1742 #ifdef REG_OK_STRICT
1743 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1745 if (legitimate_address_p (MODE, X, 1)) \
1750 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1752 if (legitimate_address_p (MODE, X, 0)) \
1758 /* Try machine-dependent ways of modifying an illegitimate address
1759 to be legitimate. If we find one, return the new, valid address.
1760 This macro is used in only one place: `memory_address' in explow.c.
1762 OLDX is the address as it was before break_out_memory_refs was called.
1763 In some cases it is useful to look at this to decide what needs to be done.
1765 MODE and WIN are passed so that this macro can use
1766 GO_IF_LEGITIMATE_ADDRESS.
1768 It is always safe for this macro to do nothing. It exists to recognize
1769 opportunities to optimize the output.
1771 For the 80386, we handle X+REG by loading X into a register R and
1772 using R+REG. R will go in a general reg and indexing will be used.
1773 However, if REG is a broken-out memory address or multiplication,
1774 nothing needs to be done because REG can certainly go in a general reg.
1776 When -fpic is used, special handling is needed for symbolic references.
1777 See comments by legitimize_pic_address in i386.c for details. */
1779 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1781 (X) = legitimize_address (X, OLDX, MODE); \
1782 if (memory_address_p (MODE, X)) \
1786 #define REWRITE_ADDRESS(x) rewrite_address(x)
1788 /* Nonzero if the constant value X is a legitimate general operand
1789 when generating PIC code. It is given that flag_pic is on and
1790 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1792 #define LEGITIMATE_PIC_OPERAND_P(X) \
1793 (! SYMBOLIC_CONST (X) \
1794 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1796 #define SYMBOLIC_CONST(X) \
1797 (GET_CODE (X) == SYMBOL_REF \
1798 || GET_CODE (X) == LABEL_REF \
1799 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1801 /* Go to LABEL if ADDR (a legitimate address expression)
1802 has an effect that depends on the machine mode it is used for.
1803 On the 80386, only postdecrement and postincrement address depend thus
1804 (the amount of decrement or increment being the length of the operand). */
1805 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1806 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1808 /* Define this macro if references to a symbol must be treated
1809 differently depending on something about the variable or
1810 function named by the symbol (such as what section it is in).
1812 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1813 so that we may access it directly in the GOT. */
1815 #define ENCODE_SECTION_INFO(DECL) \
1820 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1821 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1823 if (TARGET_DEBUG_ADDR \
1824 && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \
1826 fprintf (stderr, "Encode %s, public = %d\n", \
1827 IDENTIFIER_POINTER (DECL_NAME (DECL)), \
1828 TREE_PUBLIC (DECL)); \
1831 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1832 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1833 || ! TREE_PUBLIC (DECL)); \
1838 /* Initialize data used by insn expanders. This is called from
1839 init_emit, once for each function, before code is generated.
1840 For 386, clear stack slot assignments remembered from previous
1843 #define INIT_EXPANDERS clear_386_stack_locals ()
1845 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1846 codes once the function is being compiled into assembly code, but
1847 not before. (It is not done before, because in the case of
1848 compiling an inline function, it would lead to multiple PIC
1849 prologues being included in functions which used inline functions
1850 and were compiled to assembly language.) */
1852 #define FINALIZE_PIC \
1855 extern int current_function_uses_pic_offset_table; \
1857 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1862 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1863 with arguments ARGS is a valid machine specific attribute for DECL.
1864 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1866 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1867 (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1869 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1870 with arguments ARGS is a valid machine specific attribute for TYPE.
1871 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1873 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1874 (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1876 /* If defined, a C expression whose value is zero if the attributes on
1877 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1878 two if they are nearly compatible (which causes a warning to be
1881 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1882 (i386_comp_type_attributes (TYPE1, TYPE2))
1884 /* If defined, a C statement that assigns default attributes to newly
1887 /* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1889 /* Max number of args passed in registers. If this is more than 3, we will
1890 have problems with ebx (register #4), since it is a caller save register and
1891 is also used as the pic register in ELF. So for now, don't allow more than
1892 3 registers to be passed in registers. */
1894 #define REGPARM_MAX 3
1897 /* Specify the machine mode that this machine uses
1898 for the index in the tablejump instruction. */
1899 #define CASE_VECTOR_MODE Pmode
1901 /* Define as C expression which evaluates to nonzero if the tablejump
1902 instruction expects the table to contain offsets from the address of the
1904 Do not define this if the table should contain absolute addresses. */
1905 /* #define CASE_VECTOR_PC_RELATIVE 1 */
1907 /* Specify the tree operation to be used to convert reals to integers.
1908 This should be changed to take advantage of fist --wfs ??
1910 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1912 /* This is the kind of divide that is easiest to do in the general case. */
1913 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1915 /* Define this as 1 if `char' should by default be signed; else as 0. */
1916 #define DEFAULT_SIGNED_CHAR 1
1918 /* Max number of bytes we can move from memory to memory
1919 in one reasonably fast instruction. */
1922 /* If a memory-to-memory move would take MOVE_RATIO or more simple
1923 move-instruction pairs, we will do a movstr or libcall instead.
1924 Increasing the value will always make code faster, but eventually
1925 incurs high cost in increased code size.
1927 If you don't define this, a reasonable default is used.
1929 Make this large on i386, since the block move is very inefficient with small
1930 blocks, and the hard register needs of the block move require much reload
1933 #define MOVE_RATIO 5
1935 /* Define if shifts truncate the shift count
1936 which implies one can omit a sign-extension or zero-extension
1937 of a shift count. */
1938 /* On i386, shifts do truncate the count. But bit opcodes don't. */
1940 /* #define SHIFT_COUNT_TRUNCATED */
1942 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1943 is done just by pretending it is already truncated. */
1944 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1946 /* We assume that the store-condition-codes instructions store 0 for false
1947 and some other value for true. This is the value stored for true. */
1949 #define STORE_FLAG_VALUE 1
1951 /* When a prototype says `char' or `short', really pass an `int'.
1952 (The 386 can't easily push less than an int.) */
1954 #define PROMOTE_PROTOTYPES
1956 /* Specify the machine mode that pointers have.
1957 After generation of rtl, the compiler makes no further distinction
1958 between pointers and any other objects of this machine mode. */
1959 #define Pmode SImode
1961 /* A function address in a call instruction
1962 is a byte address (for indexing purposes)
1963 so give the MEM rtx a byte's mode. */
1964 #define FUNCTION_MODE QImode
1966 /* A part of a C `switch' statement that describes the relative costs
1967 of constant RTL expressions. It must contain `case' labels for
1968 expression codes `const_int', `const', `symbol_ref', `label_ref'
1969 and `const_double'. Each case must ultimately reach a `return'
1970 statement to return the relative cost of the use of that kind of
1971 constant value in an expression. The cost may depend on the
1972 precise value of the constant, which is available for examination
1973 in X, and the rtx code of the expression in which it is contained,
1974 found in OUTER_CODE.
1976 CODE is the expression code--redundant, since it can be obtained
1977 with `GET_CODE (X)'. */
1979 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1981 return (unsigned) INTVAL (RTX) < 256 ? 0 : 1; \
1985 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 1; \
1987 case CONST_DOUBLE: \
1990 if (GET_MODE (RTX) == VOIDmode) \
1993 code = standard_80387_constant_p (RTX); \
1994 return code == 1 ? 0 : \
1999 /* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */
2000 #define TOPLEVEL_COSTS_N_INSNS(N) {total = COSTS_N_INSNS (N); break;}
2002 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
2003 This can be used, for example, to indicate how costly a multiply
2004 instruction is. In writing this macro, you can use the construct
2005 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
2006 instructions. OUTER_CODE is the code of the expression in which X
2009 This macro is optional; do not define it if the default cost
2010 assumptions are adequate for the target machine. */
2012 #define RTX_COSTS(X,CODE,OUTER_CODE) \
2014 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
2015 && GET_MODE (XEXP (X, 0)) == SImode) \
2017 HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
2020 return COSTS_N_INSNS (ix86_cost->add) \
2021 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2023 if (value == 2 || value == 3) \
2024 return COSTS_N_INSNS (ix86_cost->lea) \
2025 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2027 /* fall through */ \
2033 if (GET_MODE (XEXP (X, 0)) == DImode) \
2035 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
2037 if (INTVAL (XEXP (X, 1)) > 32) \
2038 return COSTS_N_INSNS(ix86_cost->shift_const + 2); \
2039 return COSTS_N_INSNS(ix86_cost->shift_const * 2); \
2041 return ((GET_CODE (XEXP (X, 1)) == AND \
2042 ? COSTS_N_INSNS(ix86_cost->shift_var * 2) \
2043 : COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2)) \
2044 + rtx_cost(XEXP (X, 0), OUTER_CODE)); \
2046 return COSTS_N_INSNS (GET_CODE (XEXP (X, 1)) == CONST_INT \
2047 ? ix86_cost->shift_const \
2048 : ix86_cost->shift_var) \
2049 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2052 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
2054 unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
2058 return COSTS_N_INSNS (ix86_cost->add) \
2059 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2060 if (value == 4 || value == 8) \
2061 return COSTS_N_INSNS (ix86_cost->lea) \
2062 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2064 while (value != 0) \
2071 return COSTS_N_INSNS (ix86_cost->shift_const) \
2072 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2074 return COSTS_N_INSNS (ix86_cost->mult_init \
2075 + nbits * ix86_cost->mult_bit) \
2076 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2079 else /* This is arbitrary */ \
2080 TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \
2081 + 7 * ix86_cost->mult_bit); \
2087 TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \
2090 if (GET_CODE (XEXP (X, 0)) == REG \
2091 && GET_MODE (XEXP (X, 0)) == SImode \
2092 && GET_CODE (XEXP (X, 1)) == PLUS) \
2093 return COSTS_N_INSNS (ix86_cost->lea); \
2095 /* fall through */ \
2100 if (GET_MODE (X) == DImode) \
2101 return COSTS_N_INSNS (ix86_cost->add) * 2 \
2102 + (rtx_cost (XEXP (X, 0), OUTER_CODE) \
2103 << (GET_MODE (XEXP (X, 0)) != DImode)) \
2104 + (rtx_cost (XEXP (X, 1), OUTER_CODE) \
2105 << (GET_MODE (XEXP (X, 1)) != DImode)); \
2108 if (GET_MODE (X) == DImode) \
2109 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2) \
2110 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add)
2113 /* An expression giving the cost of an addressing mode that contains
2114 ADDRESS. If not defined, the cost is computed from the ADDRESS
2115 expression and the `CONST_COSTS' values.
2117 For most CISC machines, the default cost is a good approximation
2118 of the true cost of the addressing mode. However, on RISC
2119 machines, all instructions normally have the same length and
2120 execution time. Hence all addresses will have equal costs.
2122 In cases where more than one form of an address is known, the form
2123 with the lowest cost will be used. If multiple forms have the
2124 same, lowest, cost, the one that is the most complex will be used.
2126 For example, suppose an address that is equal to the sum of a
2127 register and a constant is used twice in the same basic block.
2128 When this macro is not defined, the address will be computed in a
2129 register and memory references will be indirect through that
2130 register. On machines where the cost of the addressing mode
2131 containing the sum is no higher than that of a simple indirect
2132 reference, this will produce an additional instruction and
2133 possibly require an additional register. Proper specification of
2134 this macro eliminates this overhead for such machines.
2136 Similar use of this macro is made in strength reduction of loops.
2138 ADDRESS need not be valid as an address. In such a case, the cost
2139 is not relevant and can be any value; invalid addresses need not be
2140 assigned a different cost.
2142 On machines where an address involving more than one register is as
2143 cheap as an address computation involving only one register,
2144 defining `ADDRESS_COST' to reflect this can cause two registers to
2145 be live over a region of code where only one would have been if
2146 `ADDRESS_COST' were not defined in that manner. This effect should
2147 be considered in the definition of this macro. Equivalent costs
2148 should probably only be given to addresses with different numbers
2149 of registers on machines with lots of registers.
2151 This macro will normally either not be defined or be defined as a
2154 For i386, it is better to use a complex address than let gcc copy
2155 the address into a reg and make a new pseudo. But not if the address
2156 requires to two regs - that would mean more pseudos with longer
2159 #define ADDRESS_COST(RTX) \
2160 ((CONSTANT_P (RTX) \
2161 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
2162 && REG_P (XEXP (RTX, 0)))) ? 0 \
2166 /* A C expression for the cost of moving data of mode M between a
2167 register and memory. A value of 2 is the default; this cost is
2168 relative to those in `REGISTER_MOVE_COST'.
2170 If moving between registers and memory is more expensive than
2171 between two registers, you should define this macro to express the
2174 On the i386, copying between floating-point and fixed-point
2175 registers is expensive. */
2177 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
2178 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
2179 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
2183 /* A C expression for the cost of moving data of mode M between a
2184 register and memory. A value of 2 is the default; this cost is
2185 relative to those in `REGISTER_MOVE_COST'.
2187 If moving between registers and memory is more expensive than
2188 between two registers, you should define this macro to express the
2191 /* #define MEMORY_MOVE_COST(M,C,I) 2 */
2193 /* A C expression for the cost of a branch instruction. A value of 1
2194 is the default; other values are interpreted relative to that. */
2196 #define BRANCH_COST i386_branch_cost
2198 /* Define this macro as a C expression which is nonzero if accessing
2199 less than a word of memory (i.e. a `char' or a `short') is no
2200 faster than accessing a word of memory, i.e., if such access
2201 require more than one instruction or if there is no difference in
2202 cost between byte and (aligned) word loads.
2204 When this macro is not defined, the compiler will access a field by
2205 finding the smallest containing object; when it is defined, a
2206 fullword load will be used if alignment permits. Unless bytes
2207 accesses are faster than word accesses, using word accesses is
2208 preferable since it may eliminate subsequent memory access if
2209 subsequent accesses occur to other fields in the same word of the
2210 structure, but to different bytes. */
2212 #define SLOW_BYTE_ACCESS 0
2214 /* Nonzero if access to memory by shorts is slow and undesirable. */
2215 #define SLOW_SHORT_ACCESS 0
2217 /* Define this macro if zero-extension (of a `char' or `short' to an
2218 `int') can be done faster if the destination is a register that is
2221 If you define this macro, you must have instruction patterns that
2222 recognize RTL structures like this:
2224 (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
2226 and likewise for `HImode'. */
2228 /* #define SLOW_ZERO_EXTEND */
2230 /* Define this macro to be the value 1 if unaligned accesses have a
2231 cost many times greater than aligned accesses, for example if they
2232 are emulated in a trap handler.
2234 When this macro is non-zero, the compiler will act as if
2235 `STRICT_ALIGNMENT' were non-zero when generating code for block
2236 moves. This can cause significantly more instructions to be
2237 produced. Therefore, do not set this macro non-zero if unaligned
2238 accesses only add a cycle or two to the time for a memory access.
2240 If the value of this macro is always zero, it need not be defined. */
2242 /* #define SLOW_UNALIGNED_ACCESS 0 */
2244 /* Define this macro to inhibit strength reduction of memory
2245 addresses. (On some machines, such strength reduction seems to do
2246 harm rather than good.) */
2248 /* #define DONT_REDUCE_ADDR */
2250 /* Define this macro if it is as good or better to call a constant
2251 function address than to call an address kept in a register.
2253 Desirable on the 386 because a CALL with a constant address is
2254 faster than one with a register address. */
2256 #define NO_FUNCTION_CSE
2258 /* Define this macro if it is as good or better for a function to call
2259 itself with an explicit address than to call an address kept in a
2262 #define NO_RECURSIVE_FUNCTION_CSE
2264 /* A C statement (sans semicolon) to update the integer variable COST
2265 based on the relationship between INSN that is dependent on
2266 DEP_INSN through the dependence LINK. The default is to make no
2267 adjustment to COST. This can be used for example to specify to
2268 the scheduler that an output- or anti-dependence does not incur
2269 the same cost as a data-dependence. */
2271 #define ADJUST_COST(insn,link,dep_insn,cost) \
2272 (cost) = x86_adjust_cost(insn, link, dep_insn, cost)
2274 #define ADJUST_BLOCKAGE(last_insn,insn,blockage) \
2276 if (is_fp_store (last_insn) && is_fp_insn (insn) \
2277 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \
2278 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \
2279 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \
2280 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \
2281 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \
2282 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \
2283 == NOTE_INSN_LOOP_END)) \
2289 #define ISSUE_RATE ((int)ix86_cpu > (int)PROCESSOR_I486 ? 2 : 1)
2292 /* Add any extra modes needed to represent the condition code.
2294 For the i386, we need separate modes when floating-point equality
2295 comparisons are being done. */
2297 #define EXTRA_CC_MODES CCFPEQmode
2299 /* Define the names for the modes specified above. */
2300 #define EXTRA_CC_NAMES "CCFPEQ"
2302 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
2303 return the mode to be used for the comparison.
2305 For floating-point equality comparisons, CCFPEQmode should be used.
2306 VOIDmode should be used in all other cases. */
2308 #define SELECT_CC_MODE(OP,X,Y) \
2309 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2310 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
2312 /* Define the information needed to generate branch and scc insns. This is
2313 stored from the compare operation. Note that we can't use "rtx" here
2314 since it hasn't been defined! */
2316 extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
2318 /* Tell final.c how to eliminate redundant test instructions. */
2320 /* Here we define machine-dependent flags and fields in cc_status
2321 (see `conditions.h'). */
2323 /* Set if the cc value was actually from the 80387 and
2324 we are testing eax directly (i.e. no sahf) */
2325 #define CC_TEST_AX 020000
2327 /* Set if the cc value is actually in the 80387, so a floating point
2328 conditional branch must be output. */
2329 #define CC_IN_80387 04000
2331 /* Set if the CC value was stored in a nonstandard way, so that
2332 the state of equality is indicated by zero in the carry bit. */
2333 #define CC_Z_IN_NOT_C 010000
2335 /* Set if the CC value was actually from the 80387 and loaded directly
2336 into the eflags instead of via eax/sahf. */
2337 #define CC_FCOMI 040000
2339 /* Store in cc_status the expressions
2340 that the condition codes will describe
2341 after execution of an instruction whose pattern is EXP.
2342 Do not alter them if the instruction would not alter the cc's. */
2344 #define NOTICE_UPDATE_CC(EXP, INSN) \
2345 notice_update_cc((EXP))
2347 /* Output a signed jump insn. Use template NORMAL ordinarily, or
2348 FLOAT following a floating point comparison.
2349 Use NO_OV following an arithmetic insn that set the cc's
2350 before a test insn that was deleted.
2351 NO_OV may be zero, meaning final should reinsert the test insn
2352 because the jump cannot be handled properly without it. */
2354 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
2356 if (cc_prev_status.flags & CC_IN_80387) \
2358 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
2363 /* Control the assembler format that we output, to the extent
2364 this does not vary between assemblers. */
2366 /* How to refer to registers in assembler output.
2367 This sequence is indexed by compiler's hard-register-number (see above). */
2369 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
2370 For non floating point regs, the following are the HImode names.
2372 For float regs, the stack top is sometimes referred to as "%st(0)"
2373 instead of just "%st". PRINT_REG handles this with the "y" code. */
2375 #define HI_REGISTER_NAMES \
2376 {"ax","dx","cx","bx","si","di","bp","sp", \
2377 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
2379 #define REGISTER_NAMES HI_REGISTER_NAMES
2381 /* Table of additional register names to use in user input. */
2383 #define ADDITIONAL_REGISTER_NAMES \
2384 { { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \
2385 { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \
2386 { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \
2387 { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 } }
2389 /* Note we are omitting these since currently I don't know how
2390 to get gcc to use these, since they want the same but different
2391 number as al, and ax.
2394 /* note the last four are not really qi_registers, but
2395 the md will have to never output movb into one of them
2396 only a movw . There is no movb into the last four regs */
2398 #define QI_REGISTER_NAMES \
2399 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
2401 /* These parallel the array above, and can be used to access bits 8:15
2402 of regs 0 through 3. */
2404 #define QI_HIGH_REGISTER_NAMES \
2405 {"ah", "dh", "ch", "bh", }
2407 /* How to renumber registers for dbx and gdb. */
2409 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
2410 #define DBX_REGISTER_NUMBER(n) \
2421 /* Before the prologue, RA is at 0(%esp). */
2422 #define INCOMING_RETURN_ADDR_RTX \
2423 gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
2425 /* After the prologue, RA is at -4(AP) in the current frame. */
2426 #define RETURN_ADDR_RTX(COUNT, FRAME) \
2428 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT(-4)))\
2429 : gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4))))
2431 /* PC is dbx register 8; let's use that column for RA. */
2432 #define DWARF_FRAME_RETURN_COLUMN 8
2434 /* Before the prologue, the top of the frame is at 4(%esp). */
2435 #define INCOMING_FRAME_SP_OFFSET 4
2437 /* This is how to output the definition of a user-level label named NAME,
2438 such as the label on a static function or variable NAME. */
2440 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2441 (assemble_name (FILE, NAME), fputs (":\n", FILE))
2443 /* This is how to output an assembler line defining a `double' constant. */
2445 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2447 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
2448 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
2451 /* This is how to output a `long double' extended real constant. */
2453 #undef ASM_OUTPUT_LONG_DOUBLE
2454 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
2456 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
2457 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
2460 /* This is how to output an assembler line defining a `float' constant. */
2462 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2464 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
2465 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
2468 /* Store in OUTPUT a string (made with alloca) containing
2469 an assembler-name for a local static variable named NAME.
2470 LABELNO is an integer which is different for each call. */
2472 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2473 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2474 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2478 /* This is how to output an assembler line defining an `int' constant. */
2480 #define ASM_OUTPUT_INT(FILE,VALUE) \
2481 ( fprintf (FILE, "%s ", ASM_LONG), \
2482 output_addr_const (FILE,(VALUE)), \
2485 /* Likewise for `char' and `short' constants. */
2486 /* is this supposed to do align too?? */
2488 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2489 ( fprintf (FILE, "%s ", ASM_SHORT), \
2490 output_addr_const (FILE,(VALUE)), \
2494 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2495 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2496 output_addr_const (FILE,(VALUE)), \
2497 fputs (",", FILE), \
2498 output_addr_const (FILE,(VALUE)), \
2499 fputs (" >> 8\n",FILE))
2503 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2504 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2505 output_addr_const (FILE, (VALUE)), \
2508 /* This is how to output an assembler line for a numeric constant byte. */
2510 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2511 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
2513 /* This is how to output an insn to push a register on the stack.
2514 It need not be very fast code. */
2516 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2517 fprintf (FILE, "\tpushl %%e%s\n", reg_names[REGNO])
2519 /* This is how to output an insn to pop a register from the stack.
2520 It need not be very fast code. */
2522 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2523 fprintf (FILE, "\tpopl %%e%s\n", reg_names[REGNO])
2525 /* This is how to output an element of a case-vector that is absolute.
2528 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2529 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
2531 /* This is how to output an element of a case-vector that is relative.
2532 We don't use these on the 386 yet, because the ATT assembler can't do
2533 forward reference the differences.
2536 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
2537 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
2539 /* Define the parentheses used to group arithmetic operations
2540 in assembler code. */
2542 #define ASM_OPEN_PAREN ""
2543 #define ASM_CLOSE_PAREN ""
2545 /* Define results of standard character escape sequences. */
2546 #define TARGET_BELL 007
2547 #define TARGET_BS 010
2548 #define TARGET_TAB 011
2549 #define TARGET_NEWLINE 012
2550 #define TARGET_VT 013
2551 #define TARGET_FF 014
2552 #define TARGET_CR 015
2554 /* Print operand X (an rtx) in assembler syntax to file FILE.
2555 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2556 The CODE z takes the size of operand from the following digit, and
2557 outputs b,w,or l respectively.
2559 On the 80386, we use several such letters:
2560 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
2561 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
2562 R -- print the prefix for register names.
2563 z -- print the opcode suffix for the size of the current operand.
2564 * -- print a star (in certain assembler syntax)
2565 P -- if PIC, print an @PLT suffix.
2566 X -- don't print any sort of PIC '@' suffix for a symbol.
2567 J -- print jump insn for arithmetic_comparison_operator.
2568 s -- ??? something to do with double shifts. not actually used, afaik.
2569 C -- print a conditional move suffix corresponding to the op code.
2570 c -- likewise, but reverse the condition.
2571 F,f -- likewise, but for floating-point. */
2573 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2576 /* Print the name of a register based on its machine mode and number.
2577 If CODE is 'w', pretend the mode is HImode.
2578 If CODE is 'b', pretend the mode is QImode.
2579 If CODE is 'k', pretend the mode is SImode.
2580 If CODE is 'h', pretend the reg is the `high' byte register.
2581 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2583 extern char *hi_reg_name[];
2584 extern char *qi_reg_name[];
2585 extern char *qi_high_reg_name[];
2587 #define PRINT_REG(X, CODE, FILE) \
2588 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
2590 fprintf (FILE, "%s", RP); \
2591 switch ((CODE == 'w' ? 2 \
2596 : GET_MODE_SIZE (GET_MODE (X)))) \
2599 if (STACK_TOP_P (X)) \
2601 fputs ("st(0)", FILE); \
2607 if (! FP_REG_P (X)) fputs ("e", FILE); \
2609 fputs (hi_reg_name[REGNO (X)], FILE); \
2612 fputs (qi_reg_name[REGNO (X)], FILE); \
2615 fputs (qi_high_reg_name[REGNO (X)], FILE); \
2620 #define PRINT_OPERAND(FILE, X, CODE) \
2621 print_operand (FILE, X, CODE)
2623 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2624 print_operand_address (FILE, ADDR)
2626 /* Print the name of a register for based on its machine mode and number.
2627 This macro is used to print debugging output.
2628 This macro is different from PRINT_REG in that it may be used in
2629 programs that are not linked with aux-output.o. */
2631 #define DEBUG_PRINT_REG(X, CODE, FILE) \
2632 do { static char *hi_name[] = HI_REGISTER_NAMES; \
2633 static char *qi_name[] = QI_REGISTER_NAMES; \
2634 fprintf (FILE, "%d %s", REGNO (X), RP); \
2635 if (REGNO (X) == ARG_POINTER_REGNUM) \
2636 { fputs ("argp", FILE); break; } \
2637 if (STACK_TOP_P (X)) \
2638 { fputs ("st(0)", FILE); break; } \
2640 { fputs (hi_name[REGNO(X)], FILE); break; } \
2641 switch (GET_MODE_SIZE (GET_MODE (X))) \
2644 fputs ("e", FILE); \
2646 fputs (hi_name[REGNO (X)], FILE); \
2649 fputs (qi_name[REGNO (X)], FILE); \
2654 /* Output the prefix for an immediate operand, or for an offset operand. */
2655 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
2656 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
2658 /* Routines in libgcc that return floats must return them in an fp reg,
2659 just as other functions do which return such values.
2660 These macros make that happen. */
2662 #define FLOAT_VALUE_TYPE float
2663 #define INTIFY(FLOATVAL) FLOATVAL
2665 /* Nonzero if INSN magically clobbers register REGNO. */
2667 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
2668 (FP_REGNO_P (REGNO) \
2669 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
2672 /* a letter which is not needed by the normal asm syntax, which
2673 we can use for operand syntax in the extended asm */
2675 #define ASM_OPERAND_LETTER '#'
2676 #define RET return ""
2677 #define AT_SP(mode) (gen_rtx_MEM ((mode), stack_pointer_rtx))
2679 /* Helper macros to expand a binary/unary operator if needed */
2680 #define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \
2682 if (!ix86_expand_binary_operator (OP, MODE, OPERANDS)) \
2686 #define IX86_EXPAND_UNARY_OPERATOR(OP, MODE, OPERANDS) \
2688 if (!ix86_expand_unary_operator (OP, MODE, OPERANDS,)) \
2693 /* Functions in i386.c */
2694 extern void override_options ();
2695 extern void order_regs_for_local_alloc ();
2696 extern char *output_strlen_unroll ();
2697 extern struct rtx_def *i386_sext16_if_const ();
2698 extern int i386_aligned_p ();
2699 extern int i386_cc_probably_useless_p ();
2700 extern int i386_valid_decl_attribute_p ();
2701 extern int i386_valid_type_attribute_p ();
2702 extern int i386_return_pops_args ();
2703 extern int i386_comp_type_attributes ();
2704 extern void init_cumulative_args ();
2705 extern void function_arg_advance ();
2706 extern struct rtx_def *function_arg ();
2707 extern int function_arg_partial_nregs ();
2708 extern char *output_strlen_unroll ();
2709 extern void output_op_from_reg ();
2710 extern void output_to_reg ();
2711 extern char *singlemove_string ();
2712 extern char *output_move_double ();
2713 extern char *output_move_memory ();
2714 extern char *output_move_pushmem ();
2715 extern int standard_80387_constant_p ();
2716 extern char *output_move_const_single ();
2717 extern int symbolic_operand ();
2718 extern int call_insn_operand ();
2719 extern int expander_call_insn_operand ();
2720 extern int symbolic_reference_mentioned_p ();
2721 extern int ix86_expand_binary_operator ();
2722 extern int ix86_binary_operator_ok ();
2723 extern int ix86_expand_unary_operator ();
2724 extern int ix86_unary_operator_ok ();
2725 extern void emit_pic_move ();
2726 extern void function_prologue ();
2727 extern int simple_386_epilogue ();
2728 extern void function_epilogue ();
2729 extern int legitimate_address_p ();
2730 extern struct rtx_def *legitimize_pic_address ();
2731 extern struct rtx_def *legitimize_address ();
2732 extern void print_operand ();
2733 extern void print_operand_address ();
2734 extern void notice_update_cc ();
2735 extern void split_di ();
2736 extern int binary_387_op ();
2737 extern int shift_op ();
2738 extern int VOIDmode_compare_op ();
2739 extern char *output_387_binary_op ();
2740 extern char *output_fix_trunc ();
2741 extern char *output_float_compare ();
2742 extern char *output_fp_cc0_set ();
2743 extern void save_386_machine_status ();
2744 extern void restore_386_machine_status ();
2745 extern void clear_386_stack_locals ();
2746 extern struct rtx_def *assign_386_stack_local ();
2747 extern int is_mul ();
2748 extern int is_div ();
2749 extern int last_to_set_cc ();
2750 extern int doesnt_set_condition_code ();
2751 extern int sets_condition_code ();
2752 extern int str_immediate_operand ();
2753 extern int is_fp_insn ();
2754 extern int is_fp_dest ();
2755 extern int is_fp_store ();
2756 extern int agi_dependent ();
2757 extern int reg_mentioned_in_mem ();
2758 extern char *output_int_conditional_move ();
2759 extern char *output_fp_conditional_move ();
2760 extern int ix86_can_use_return_insn_p ();
2763 extern struct rtx_def *copy_all_rtx ();
2764 extern void rewrite_address ();
2767 /* Variables in i386.c */
2768 extern char *ix86_cpu_string; /* for -mcpu=<xxx> */
2769 extern char *ix86_arch_string; /* for -march=<xxx> */
2770 extern char *i386_reg_alloc_order; /* register allocation order */
2771 extern char *i386_regparm_string; /* # registers to use to pass args */
2772 extern char *i386_align_loops_string; /* power of two alignment for loops */
2773 extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */
2774 extern char *i386_align_funcs_string; /* power of two alignment for functions */
2775 extern char *i386_branch_cost_string; /* values 1-5: see jump.c */
2776 extern int i386_regparm; /* i386_regparm_string as a number */
2777 extern int i386_align_loops; /* power of two alignment for loops */
2778 extern int i386_align_jumps; /* power of two alignment for non-loop jumps */
2779 extern int i386_align_funcs; /* power of two alignment for functions */
2780 extern int i386_branch_cost; /* values 1-5: see jump.c */
2781 extern char *hi_reg_name[]; /* names for 16 bit regs */
2782 extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
2783 extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
2784 extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
2785 extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
2786 extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
2788 /* External variables used */
2789 extern int optimize; /* optimization level */
2790 extern int obey_regdecls; /* TRUE if stupid register allocation */
2792 /* External functions used */
2793 extern struct rtx_def *force_operand ();
OSDN Git Service
