1 /* Definitions of target machine for GNU compiler for Intel X86
3 Copyright (C) 1988, 92, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* The purpose of this file is to define the characteristics of the i386,
23 independent of assembler syntax or operating system.
25 Three other files build on this one to describe a specific assembler syntax:
26 bsd386.h, att386.h, and sun386.h.
28 The actual tm.h file for a particular system should include
29 this file, and then the file for the appropriate assembler syntax.
31 Many macros that specify assembler syntax are omitted entirely from
32 this file because they really belong in the files for particular
33 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
34 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
35 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
37 /* Names to predefine in the preprocessor for this target machine. */
41 /* Stubs for half-pic support if not OSF/1 reference platform. */
44 #define HALF_PIC_P() 0
45 #define HALF_PIC_NUMBER_PTRS 0
46 #define HALF_PIC_NUMBER_REFS 0
47 #define HALF_PIC_ENCODE(DECL)
48 #define HALF_PIC_DECLARE(NAME)
49 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
50 #define HALF_PIC_ADDRESS_P(X) 0
51 #define HALF_PIC_PTR(X) X
52 #define HALF_PIC_FINISH(STREAM)
55 /* Define the specific costs for a given cpu */
57 struct processor_costs {
58 int add; /* cost of an add instruction */
59 int lea; /* cost of a lea instruction */
60 int shift_var; /* variable shift costs */
61 int shift_const; /* constant shift costs */
62 int mult_init; /* cost of starting a multiply */
63 int mult_bit; /* cost of multiply per each bit set */
64 int divide; /* cost of a divide/mod */
67 extern struct processor_costs *ix86_cost;
69 /* Run-time compilation parameters selecting different hardware subsets. */
71 extern int target_flags;
73 /* Macros used in the machine description to test the flags. */
75 /* configure can arrange to make this 2, to force a 486. */
76 #ifndef TARGET_CPU_DEFAULT
77 #define TARGET_CPU_DEFAULT 0
80 /* Masks for the -m switches */
81 #define MASK_80387 000000000001 /* Hardware floating point */
82 #define MASK_NOTUSED1 000000000002 /* bit not currently used */
83 #define MASK_NOTUSED2 000000000004 /* bit not currently used */
84 #define MASK_RTD 000000000010 /* Use ret that pops args */
85 #define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
86 #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
87 #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
88 #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
89 #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
90 #define MASK_OMIT_LEAF_FRAME_POINTER 0x00000800 /* omit leaf frame pointers */
91 /* Temporary codegen switches */
92 #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
93 #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
94 #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
95 #define MASK_NO_PSEUDO 000010000000 /* Move op's args -> pseudos */
96 #define MASK_DEBUG_ARG 000020000000 /* Debug function_arg */
97 #define MASK_SCHEDULE_PROLOGUE 000040000000 /* Emit prologue as rtl */
98 #define MASK_STACK_PROBE 000100000000 /* Enable stack probing */
100 /* Use the floating point instructions */
101 #define TARGET_80387 (target_flags & MASK_80387)
103 /* Compile using ret insn that pops args.
104 This will not work unless you use prototypes at least
105 for all functions that can take varying numbers of args. */
106 #define TARGET_RTD (target_flags & MASK_RTD)
108 /* Align doubles to a two word boundary. This breaks compatibility with
109 the published ABI's for structures containing doubles, but produces
110 faster code on the pentium. */
111 #define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
113 /* Put uninitialized locals into bss, not data.
114 Meaningful only on svr3. */
115 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
117 /* Use IEEE floating point comparisons. These handle correctly the cases
118 where the result of a comparison is unordered. Normally SIGFPE is
119 generated in such cases, in which case this isn't needed. */
120 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
122 /* Functions that return a floating point value may return that value
123 in the 387 FPU or in 386 integer registers. If set, this flag causes
124 the 387 to be used, which is compatible with most calling conventions. */
125 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
127 /* Disable generation of FP sin, cos and sqrt operations for 387.
128 This is because FreeBSD lacks these in the math-emulator-code */
129 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
131 /* Don't create frame pointers for leaf functions */
132 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
134 /* Temporary switches for tuning code generation */
136 /* Disable 32x32->64 bit multiplies that are used for long long multiplies
137 and division by constants, but sometimes cause reload problems. */
138 #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
139 #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
141 /* Emit/Don't emit prologue as rtl */
142 #define TARGET_SCHEDULE_PROLOGUE (target_flags & MASK_SCHEDULE_PROLOGUE)
144 /* Debug GO_IF_LEGITIMATE_ADDRESS */
145 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
147 /* Debug FUNCTION_ARG macros */
148 #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
150 /* Hack macros for tuning code generation */
151 #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
152 #define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */
154 #define TARGET_386 (ix86_cpu == PROCESSOR_I386)
155 #define TARGET_486 (ix86_cpu == PROCESSOR_I486)
156 #define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
157 #define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO)
158 #define TARGET_K6 (ix86_cpu == PROCESSOR_K6)
160 #define CPUMASK (1 << ix86_cpu)
161 extern const int x86_use_leave, x86_push_memory, x86_zero_extend_with_and;
162 extern const int x86_use_bit_test, x86_cmove, x86_deep_branch;
163 extern const int x86_unroll_strlen, x86_use_q_reg, x86_use_any_reg;
164 extern const int x86_double_with_add;
166 #define TARGET_USE_LEAVE (x86_use_leave & CPUMASK)
167 #define TARGET_PUSH_MEMORY (x86_push_memory & CPUMASK)
168 #define TARGET_ZERO_EXTEND_WITH_AND (x86_zero_extend_with_and & CPUMASK)
169 #define TARGET_USE_BIT_TEST (x86_use_bit_test & CPUMASK)
170 #define TARGET_UNROLL_STRLEN (x86_unroll_strlen & CPUMASK)
171 #define TARGET_USE_Q_REG (x86_use_q_reg & CPUMASK)
172 #define TARGET_USE_ANY_REG (x86_use_any_reg & CPUMASK)
173 #define TARGET_CMOVE (x86_cmove & (1 << ix86_arch))
174 #define TARGET_DEEP_BRANCH_PREDICTION (x86_deep_branch & CPUMASK)
175 #define TARGET_DOUBLE_WITH_ADD (x86_double_with_add & CPUMASK)
177 #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
179 #define TARGET_SWITCHES \
180 { { "80387", MASK_80387, "Use hardware fp" }, \
181 { "no-80387", -MASK_80387, "Do not use hardware fp" },\
182 { "hard-float", MASK_80387, "Use hardware fp" }, \
183 { "soft-float", -MASK_80387, "Do not use hardware fp" },\
184 { "no-soft-float", MASK_80387, "Use hardware fp" }, \
185 { "386", 0, "Optimize for i80386" }, \
186 { "no-386", 0, "" }, \
187 { "486", 0, "Optimize for i80486" }, \
188 { "no-486", 0, "" }, \
189 { "pentium", 0, "Optimize for Pentium" }, \
190 { "pentiumpro", 0, "Optimize for Pentium Pro, Pentium II" },\
191 { "rtd", MASK_RTD, "Alternate calling convention" },\
192 { "no-rtd", -MASK_RTD, "Use normal calling convention" },\
193 { "align-double", MASK_ALIGN_DOUBLE, "Align some doubles on dword boundary" },\
194 { "no-align-double", -MASK_ALIGN_DOUBLE, "Align doubles on word boundary" }, \
195 { "svr3-shlib", MASK_SVR3_SHLIB, "Uninitialized locals in .bss" }, \
196 { "no-svr3-shlib", -MASK_SVR3_SHLIB, "Uninitialized locals in .data" }, \
197 { "ieee-fp", MASK_IEEE_FP, "Use IEEE math for fp comparisons" }, \
198 { "no-ieee-fp", -MASK_IEEE_FP, "Do not use IEEE math for fp comparisons" }, \
199 { "fp-ret-in-387", MASK_FLOAT_RETURNS, "Return values of functions in FPU registers" }, \
200 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS , "Do not return values of functions in FPU registers"}, \
201 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387, "Do not generate sin, cos, sqrt for 387" }, \
202 { "fancy-math-387", -MASK_NO_FANCY_MATH_387, "Generate sin, cos, sqrt for FPU"}, \
203 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER, "Omit the frame pointer in leaf functions" }, \
204 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER, "" }, \
205 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY, "multiplies of 32 bits constrained to 32 bits" }, \
206 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY, "multiplies of 32 bits are 64 bits" }, \
207 { "schedule-prologue", MASK_SCHEDULE_PROLOGUE, "Schedule function prologues" }, \
208 { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE, "" }, \
209 { "debug-addr", MASK_DEBUG_ADDR, 0 /* intentionally undoc */ }, \
210 { "no-debug-addr", -MASK_DEBUG_ADDR, 0 /* intentionally undoc */ }, \
211 { "move", -MASK_NO_MOVE, "Generate mem-mem moves" }, \
212 { "no-move", MASK_NO_MOVE, "Don't generate mem-mem moves" }, \
213 { "debug-arg", MASK_DEBUG_ARG, 0 /* intentionally undoc */ }, \
214 { "no-debug-arg", -MASK_DEBUG_ARG, 0 /* intentionally undoc */ }, \
215 { "stack-arg-probe", MASK_STACK_PROBE, "Enable stack probing" }, \
216 { "no-stack-arg-probe", -MASK_STACK_PROBE, "" }, \
217 { "windows", 0, 0 /* intentionally undoc */ }, \
218 { "dll", 0, 0 /* intentionally undoc */ }, \
220 { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT, 0 }}
222 /* Which processor to schedule for. The cpu attribute defines a list that
223 mirrors this list, so changes to i386.md must be made at the same time. */
226 {PROCESSOR_I386, /* 80386 */
227 PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */
229 PROCESSOR_PENTIUMPRO,
232 #define PROCESSOR_I386_STRING "i386"
233 #define PROCESSOR_I486_STRING "i486"
234 #define PROCESSOR_I586_STRING "i586"
235 #define PROCESSOR_PENTIUM_STRING "pentium"
236 #define PROCESSOR_I686_STRING "i686"
237 #define PROCESSOR_PENTIUMPRO_STRING "pentiumpro"
238 #define PROCESSOR_K6_STRING "k6"
240 extern enum processor_type ix86_cpu;
242 extern int ix86_arch;
244 /* Define the default processor. This is overridden by other tm.h files. */
245 #define PROCESSOR_DEFAULT (enum processor_type) TARGET_CPU_DEFAULT
246 #define PROCESSOR_DEFAULT_STRING \
247 (PROCESSOR_DEFAULT == PROCESSOR_I486 ? PROCESSOR_I486_STRING \
248 : PROCESSOR_DEFAULT == PROCESSOR_PENTIUM ? PROCESSOR_PENTIUM_STRING \
249 : PROCESSOR_DEFAULT == PROCESSOR_PENTIUMPRO ? PROCESSOR_PENTIUMPRO_STRING \
250 : PROCESSOR_DEFAULT == PROCESSOR_K6 ? PROCESSOR_K6_STRING \
251 : PROCESSOR_I386_STRING)
253 /* This macro is similar to `TARGET_SWITCHES' but defines names of
254 command options that have values. Its definition is an
255 initializer with a subgrouping for each command option.
257 Each subgrouping contains a string constant, that defines the
258 fixed part of the option name, and the address of a variable. The
259 variable, type `char *', is set to the variable part of the given
260 option if the fixed part matches. The actual option name is made
261 by appending `-m' to the specified name. */
262 #define TARGET_OPTIONS \
263 { { "cpu=", &ix86_cpu_string, "Schedule code for given CPU"}, \
264 { "arch=", &ix86_arch_string, "Generate code for given CPU"}, \
265 { "reg-alloc=", &i386_reg_alloc_order, "Control allocation order of integer registers" }, \
266 { "regparm=", &i386_regparm_string, "Number of registers used to pass integer arguments" }, \
267 { "align-loops=", &i386_align_loops_string, "Loop code aligned to this power of 2" }, \
268 { "align-jumps=", &i386_align_jumps_string, "Jump targets are aligned to this power of 2" }, \
269 { "align-functions=", &i386_align_funcs_string, "Function starts are aligned to this power of 2" }, \
270 { "branch-cost=", &i386_branch_cost_string, "Branches are this expensive (1-5, arbitrary units)" }, \
274 /* Sometimes certain combinations of command options do not make
275 sense on a particular target machine. You can define a macro
276 `OVERRIDE_OPTIONS' to take account of this. This macro, if
277 defined, is executed once just after all the command options have
280 Don't use this macro to turn on various extra optimizations for
281 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
283 #define OVERRIDE_OPTIONS override_options ()
285 /* These are meant to be redefined in the host dependent files */
286 #define SUBTARGET_SWITCHES
287 #define SUBTARGET_OPTIONS
289 /* Define this to change the optimizations performed by default. */
290 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE)
292 /* Specs for the compiler proper */
295 #define CC1_CPU_SPEC "\
297 %{m386:-mcpu=i386 -march=i386} \
298 %{mno-486:-mcpu=i386 -march=i386} \
299 %{m486:-mcpu=i486 -march=i486} \
300 %{mno-386:-mcpu=i486 -march=i486} \
301 %{mno-pentium:-mcpu=i486 -march=i486} \
302 %{mpentium:-mcpu=pentium} \
303 %{mno-pentiumpro:-mcpu=pentium} \
304 %{mpentiumpro:-mcpu=pentiumpro}}"
307 #define CPP_486_SPEC "%{!ansi:-Di486} -D__i486 -D__i486__"
308 #define CPP_586_SPEC "%{!ansi:-Di586 -Dpentium} \
309 -D__i586 -D__i586__ -D__pentium -D__pentium__"
310 #define CPP_686_SPEC "%{!ansi:-Di686 -Dpentiumpro} \
311 -D__i686 -D__i686__ -D__pentiumpro -D__pentiumpro__"
313 #ifndef CPP_CPU_DEFAULT_SPEC
314 #if TARGET_CPU_DEFAULT == 1
315 #define CPP_CPU_DEFAULT_SPEC "%(cpp_486)"
317 #if TARGET_CPU_DEFAULT == 2
318 #define CPP_CPU_DEFAULT_SPEC "%(cpp_586)"
320 #if TARGET_CPU_DEFAULT == 3
321 #define CPP_CPU_DEFAULT_SPEC "%(cpp_686)"
323 #define CPP_CPU_DEFAULT_SPEC ""
327 #endif /* CPP_CPU_DEFAULT_SPEC */
330 #define CPP_CPU_SPEC "\
331 -Acpu(i386) -Amachine(i386) \
332 %{!ansi:-Di386} -D__i386 -D__i386__ \
333 %{mcpu=i486:%(cpp_486)} %{m486:%(cpp_486)} \
334 %{mpentium:%(cpp_586)} %{mcpu=pentium:%(cpp_586)} \
335 %{mpentiumpro:%(cpp_686)} %{mcpu=pentiumpro:%(cpp_686)} \
336 %{!mcpu*:%{!m486:%{!mpentium*:%(cpp_cpu_default)}}}"
340 #define CC1_SPEC "%(cc1_spec) "
343 /* This macro defines names of additional specifications to put in the
344 specs that can be used in various specifications like CC1_SPEC. Its
345 definition is an initializer with a subgrouping for each command option.
347 Each subgrouping contains a string constant, that defines the
348 specification name, and a string constant that used by the GNU CC driver
351 Do not define this macro if it does not need to do anything. */
353 #ifndef SUBTARGET_EXTRA_SPECS
354 #define SUBTARGET_EXTRA_SPECS
357 #define EXTRA_SPECS \
358 { "cpp_486", CPP_486_SPEC}, \
359 { "cpp_586", CPP_586_SPEC}, \
360 { "cpp_686", CPP_686_SPEC}, \
361 { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \
362 { "cpp_cpu", CPP_CPU_SPEC }, \
363 { "cc1_cpu", CC1_CPU_SPEC }, \
364 SUBTARGET_EXTRA_SPECS
366 /* target machine storage layout */
368 /* Define for XFmode extended real floating point support.
369 This will automatically cause REAL_ARITHMETIC to be defined. */
370 #define LONG_DOUBLE_TYPE_SIZE 96
372 /* Define if you don't want extended real, but do want to use the
373 software floating point emulator for REAL_ARITHMETIC and
374 decimal <-> binary conversion. */
375 /* #define REAL_ARITHMETIC */
377 /* Define this if most significant byte of a word is the lowest numbered. */
378 /* That is true on the 80386. */
380 #define BITS_BIG_ENDIAN 0
382 /* Define this if most significant byte of a word is the lowest numbered. */
383 /* That is not true on the 80386. */
384 #define BYTES_BIG_ENDIAN 0
386 /* Define this if most significant word of a multiword number is the lowest
388 /* Not true for 80386 */
389 #define WORDS_BIG_ENDIAN 0
391 /* number of bits in an addressable storage unit */
392 #define BITS_PER_UNIT 8
394 /* Width in bits of a "word", which is the contents of a machine register.
395 Note that this is not necessarily the width of data type `int';
396 if using 16-bit ints on a 80386, this would still be 32.
397 But on a machine with 16-bit registers, this would be 16. */
398 #define BITS_PER_WORD 32
400 /* Width of a word, in units (bytes). */
401 #define UNITS_PER_WORD 4
403 /* Width in bits of a pointer.
404 See also the macro `Pmode' defined below. */
405 #define POINTER_SIZE 32
407 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
408 #define PARM_BOUNDARY 32
410 /* Boundary (in *bits*) on which stack pointer should be aligned. */
411 #define STACK_BOUNDARY 32
413 /* We want to keep the stack aligned to 128 bits when possible, for the
414 benefit of doubles and SSE __m128. But the compiler can not rely on
415 the stack having this alignment.*/
416 #define PREFERRED_STACK_BOUNDARY 128
418 /* Allocation boundary (in *bits*) for the code of a function.
419 For i486, we get better performance by aligning to a cache
420 line (i.e. 16 byte) boundary. */
421 #define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
423 /* Alignment of field after `int : 0' in a structure. */
425 #define EMPTY_FIELD_BOUNDARY 32
427 /* Minimum size in bits of the largest boundary to which any
428 and all fundamental data types supported by the hardware
429 might need to be aligned. No data type wants to be aligned
430 rounder than this. The i386 supports 64-bit floating point
431 quantities, but these can be aligned on any 32-bit boundary.
432 The published ABIs say that doubles should be aligned on word
433 boundaries, but the Pentium gets better performance with them
434 aligned on 64 bit boundaries. */
435 #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
437 /* If defined, a C expression to compute the alignment given to a
438 constant that is being placed in memory. CONSTANT is the constant
439 and ALIGN is the alignment that the object would ordinarily have.
440 The value of this macro is used instead of that alignment to align
443 If this macro is not defined, then ALIGN is used.
445 The typical use of this macro is to increase alignment for string
446 constants to be word aligned so that `strcpy' calls that copy
447 constants can be done inline. */
449 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
450 (TREE_CODE (EXP) == REAL_CST \
451 ? ((TYPE_MODE (TREE_TYPE (EXP)) == DFmode && (ALIGN) < 64) \
453 : (TYPE_MODE (TREE_TYPE (EXP)) == XFmode && (ALIGN) < 128) \
456 : TREE_CODE (EXP) == STRING_CST \
457 ? ((TREE_STRING_LENGTH (EXP) >= 31 && (ALIGN) < 256) \
462 /* If defined, a C expression to compute the alignment for a static
463 variable. TYPE is the data type, and ALIGN is the alignment that
464 the object would ordinarily have. The value of this macro is used
465 instead of that alignment to align the object.
467 If this macro is not defined, then ALIGN is used.
469 One use of this macro is to increase alignment of medium-size
470 data to make it all fit in fewer cache lines. Another is to
471 cause character arrays to be word-aligned so that `strcpy' calls
472 that copy constants to character arrays can be done inline. */
474 #define DATA_ALIGNMENT(TYPE, ALIGN) \
475 ((AGGREGATE_TYPE_P (TYPE) \
476 && TYPE_SIZE (TYPE) \
477 && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \
478 && (TREE_INT_CST_LOW (TYPE_SIZE (TYPE)) >= 256 \
479 || TREE_INT_CST_HIGH (TYPE_SIZE (TYPE))) && (ALIGN) < 256) \
481 : TREE_CODE (TYPE) == ARRAY_TYPE \
482 ? ((TYPE_MODE (TREE_TYPE (TYPE)) == DFmode && (ALIGN) < 64) \
484 : (TYPE_MODE (TREE_TYPE (TYPE)) == XFmode && (ALIGN) < 128) \
487 : TREE_CODE (TYPE) == COMPLEX_TYPE \
488 ? ((TYPE_MODE (TYPE) == DCmode && (ALIGN) < 64) \
490 : (TYPE_MODE (TYPE) == XCmode && (ALIGN) < 128) \
493 : ((TREE_CODE (TYPE) == RECORD_TYPE \
494 || TREE_CODE (TYPE) == UNION_TYPE \
495 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \
496 && TYPE_FIELDS (TYPE)) \
497 ? ((DECL_MODE (TYPE_FIELDS (TYPE)) == DFmode && (ALIGN) < 64) \
499 : (DECL_MODE (TYPE_FIELDS (TYPE)) == XFmode && (ALIGN) < 128) \
502 : TREE_CODE (TYPE) == REAL_TYPE \
503 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \
505 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \
510 /* If defined, a C expression to compute the alignment for a local
511 variable. TYPE is the data type, and ALIGN is the alignment that
512 the object would ordinarily have. The value of this macro is used
513 instead of that alignment to align the object.
515 If this macro is not defined, then ALIGN is used.
517 One use of this macro is to increase alignment of medium-size
518 data to make it all fit in fewer cache lines. */
520 #define LOCAL_ALIGNMENT(TYPE, ALIGN) \
521 (TREE_CODE (TYPE) == ARRAY_TYPE \
522 ? ((TYPE_MODE (TREE_TYPE (TYPE)) == DFmode && (ALIGN) < 64) \
524 : (TYPE_MODE (TREE_TYPE (TYPE)) == XFmode && (ALIGN) < 128) \
527 : TREE_CODE (TYPE) == COMPLEX_TYPE \
528 ? ((TYPE_MODE (TYPE) == DCmode && (ALIGN) < 64) \
530 : (TYPE_MODE (TYPE) == XCmode && (ALIGN) < 128) \
533 : ((TREE_CODE (TYPE) == RECORD_TYPE \
534 || TREE_CODE (TYPE) == UNION_TYPE \
535 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \
536 && TYPE_FIELDS (TYPE)) \
537 ? ((DECL_MODE (TYPE_FIELDS (TYPE)) == DFmode && (ALIGN) < 64) \
539 : (DECL_MODE (TYPE_FIELDS (TYPE)) == XFmode && (ALIGN) < 128) \
542 : TREE_CODE (TYPE) == REAL_TYPE \
543 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \
545 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \
550 /* Set this non-zero if move instructions will actually fail to work
551 when given unaligned data. */
552 #define STRICT_ALIGNMENT 0
554 /* If bit field type is int, don't let it cross an int,
555 and give entire struct the alignment of an int. */
556 /* Required on the 386 since it doesn't have bitfield insns. */
557 #define PCC_BITFIELD_TYPE_MATTERS 1
559 /* Maximum power of 2 that code can be aligned to. */
560 #define MAX_CODE_ALIGN 6 /* 64 byte alignment */
562 /* Align loop starts for optimal branching. */
563 #define LOOP_ALIGN(LABEL) (i386_align_loops)
564 #define LOOP_ALIGN_MAX_SKIP (i386_align_loops_string ? 0 : 7)
566 /* This is how to align an instruction for optimal branching.
567 On i486 we'll get better performance by aligning on a
568 cache line (i.e. 16 byte) boundary. */
569 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (i386_align_jumps)
570 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (i386_align_jumps_string ? 0 : 7)
573 /* Standard register usage. */
575 /* This processor has special stack-like registers. See reg-stack.c
579 #define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode)
581 /* Number of actual hardware registers.
582 The hardware registers are assigned numbers for the compiler
583 from 0 to just below FIRST_PSEUDO_REGISTER.
584 All registers that the compiler knows about must be given numbers,
585 even those that are not normally considered general registers.
587 In the 80386 we give the 8 general purpose registers the numbers 0-7.
588 We number the floating point registers 8-15.
589 Note that registers 0-7 can be accessed as a short or int,
590 while only 0-3 may be used with byte `mov' instructions.
592 Reg 16 does not correspond to any hardware register, but instead
593 appears in the RTL as an argument pointer prior to reload, and is
594 eliminated during reloading in favor of either the stack or frame
597 #define FIRST_PSEUDO_REGISTER 17
599 /* 1 for registers that have pervasive standard uses
600 and are not available for the register allocator.
601 On the 80386, the stack pointer is such, as is the arg pointer. */
602 #define FIXED_REGISTERS \
603 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
604 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
606 /* 1 for registers not available across function calls.
607 These must include the FIXED_REGISTERS and also any
608 registers that can be used without being saved.
609 The latter must include the registers where values are returned
610 and the register where structure-value addresses are passed.
611 Aside from that, you can include as many other registers as you like. */
613 #define CALL_USED_REGISTERS \
614 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
615 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
617 /* Order in which to allocate registers. Each register must be
618 listed once, even those in FIXED_REGISTERS. List frame pointer
619 late and fixed registers last. Note that, in general, we prefer
620 registers listed in CALL_USED_REGISTERS, keeping the others
621 available for storage of persistent values.
623 Three different versions of REG_ALLOC_ORDER have been tried:
625 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
626 but slower code on simple functions returning values in eax.
628 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
629 perl 4.036 due to not being able to create a DImode register (to hold a 2
632 If the order is eax, edx, ecx, ... it produces better code for simple
633 functions, and a slightly slower compiler. Users complained about the code
634 generated by allocating edx first, so restore the 'natural' order of things. */
636 #define REG_ALLOC_ORDER \
637 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
638 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
640 /* A C statement (sans semicolon) to choose the order in which to
641 allocate hard registers for pseudo-registers local to a basic
644 Store the desired register order in the array `reg_alloc_order'.
645 Element 0 should be the register to allocate first; element 1, the
646 next register; and so on.
648 The macro body should not assume anything about the contents of
649 `reg_alloc_order' before execution of the macro.
651 On most machines, it is not necessary to define this macro. */
653 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
655 /* Macro to conditionally modify fixed_regs/call_used_regs. */
656 #define CONDITIONAL_REGISTER_USAGE \
660 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
661 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
663 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
667 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
668 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
669 if (TEST_HARD_REG_BIT (x, i)) \
670 fixed_regs[i] = call_used_regs[i] = 1; \
674 /* Return number of consecutive hard regs needed starting at reg REGNO
675 to hold something of mode MODE.
676 This is ordinarily the length in words of a value of mode MODE
677 but can be less for certain modes in special long registers.
679 Actually there are no two word move instructions for consecutive
680 registers. And only registers 0-3 may have mov byte instructions
684 #define HARD_REGNO_NREGS(REGNO, MODE) \
685 (FP_REGNO_P (REGNO) ? 1 \
686 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
688 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
689 On the 80386, the first 4 cpu registers can hold any mode
690 while the floating point registers may hold only floating point.
691 Make it clear that the fp regs could not hold a 16-byte float. */
693 /* The casts to int placate a compiler on a microvax,
694 for cross-compiler testing. */
696 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
698 : FP_REGNO_P (REGNO) \
699 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
700 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
701 && GET_MODE_UNIT_SIZE (MODE) <= (LONG_DOUBLE_TYPE_SIZE == 96 ? 12 : 8))\
702 : (int) (MODE) != (int) QImode ? 1 \
703 : (reload_in_progress | reload_completed) == 1)
705 /* Value is 1 if it is a good idea to tie two pseudo registers
706 when one has mode MODE1 and one has mode MODE2.
707 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
708 for any hard reg, then this must be 0 for correct output. */
710 #define MODES_TIEABLE_P(MODE1, MODE2) \
711 ((MODE1) == (MODE2) \
712 || ((MODE1) == SImode && (MODE2) == HImode) \
713 || ((MODE1) == HImode && (MODE2) == SImode))
715 /* Specify the registers used for certain standard purposes.
716 The values of these macros are register numbers. */
718 /* on the 386 the pc register is %eip, and is not usable as a general
719 register. The ordinary mov instructions won't work */
720 /* #define PC_REGNUM */
722 /* Register to use for pushing function arguments. */
723 #define STACK_POINTER_REGNUM 7
725 /* Base register for access to local variables of the function. */
726 #define FRAME_POINTER_REGNUM 6
728 /* First floating point reg */
729 #define FIRST_FLOAT_REG 8
731 /* First & last stack-like regs */
732 #define FIRST_STACK_REG FIRST_FLOAT_REG
733 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
735 /* Value should be nonzero if functions must have frame pointers.
736 Zero means the frame pointer need not be set up (and parms
737 may be accessed via the stack pointer) in functions that seem suitable.
738 This is computed in `reload', in reload1.c. */
739 #define FRAME_POINTER_REQUIRED (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ())
741 /* Base register for access to arguments of the function. */
742 #define ARG_POINTER_REGNUM 16
744 /* Register in which static-chain is passed to a function. */
745 #define STATIC_CHAIN_REGNUM 2
747 /* Register to hold the addressing base for position independent
748 code access to data items. */
749 #define PIC_OFFSET_TABLE_REGNUM 3
751 /* Register in which address to store a structure value
752 arrives in the function. On the 386, the prologue
753 copies this from the stack to register %eax. */
754 #define STRUCT_VALUE_INCOMING 0
756 /* Place in which caller passes the structure value address.
757 0 means push the value on the stack like an argument. */
758 #define STRUCT_VALUE 0
760 /* A C expression which can inhibit the returning of certain function
761 values in registers, based on the type of value. A nonzero value
762 says to return the function value in memory, just as large
763 structures are always returned. Here TYPE will be a C expression
764 of type `tree', representing the data type of the value.
766 Note that values of mode `BLKmode' must be explicitly handled by
767 this macro. Also, the option `-fpcc-struct-return' takes effect
768 regardless of this macro. On most systems, it is possible to
769 leave the macro undefined; this causes a default definition to be
770 used, whose value is the constant 1 for `BLKmode' values, and 0
773 Do not use this macro to indicate that structures and unions
774 should always be returned in memory. You should instead use
775 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
777 #define RETURN_IN_MEMORY(TYPE) \
778 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
781 /* Define the classes of registers for register constraints in the
782 machine description. Also define ranges of constants.
784 One of the classes must always be named ALL_REGS and include all hard regs.
785 If there is more than one class, another class must be named NO_REGS
786 and contain no registers.
788 The name GENERAL_REGS must be the name of a class (or an alias for
789 another name such as ALL_REGS). This is the class of registers
790 that is allowed by "g" or "r" in a register constraint.
791 Also, registers outside this class are allocated only when
792 instructions express preferences for them.
794 The classes must be numbered in nondecreasing order; that is,
795 a larger-numbered class must never be contained completely
796 in a smaller-numbered class.
798 For any two classes, it is very desirable that there be another
799 class that represents their union.
801 It might seem that class BREG is unnecessary, since no useful 386
802 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
803 and the "b" register constraint is useful in asms for syscalls. */
808 AREG, DREG, CREG, BREG,
809 AD_REGS, /* %eax/%edx for DImode */
810 Q_REGS, /* %eax %ebx %ecx %edx */
812 INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
813 GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
814 FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
816 ALL_REGS, LIM_REG_CLASSES
819 #define N_REG_CLASSES (int) LIM_REG_CLASSES
821 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
823 /* Give names of register classes as strings for dump file. */
825 #define REG_CLASS_NAMES \
827 "AREG", "DREG", "CREG", "BREG", \
833 "FP_TOP_REG", "FP_SECOND_REG", \
837 /* Define which registers fit in which classes.
838 This is an initializer for a vector of HARD_REG_SET
839 of length N_REG_CLASSES. */
841 #define REG_CLASS_CONTENTS \
843 {0x1}, {0x2}, {0x4}, {0x8}, /* AREG, DREG, CREG, BREG */ \
844 {0x3}, /* AD_REGS */ \
845 {0xf}, /* Q_REGS */ \
846 {0x10}, {0x20}, /* SIREG, DIREG */ \
847 {0x7f}, /* INDEX_REGS */ \
848 {0x100ff}, /* GENERAL_REGS */ \
849 {0x0100}, {0x0200}, /* FP_TOP_REG, FP_SECOND_REG */ \
850 {0xff00}, /* FLOAT_REGS */ \
853 /* The same information, inverted:
854 Return the class number of the smallest class containing
855 reg number REGNO. This could be a conditional expression
856 or could index an array. */
858 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
860 /* When defined, the compiler allows registers explicitly used in the
861 rtl to be used as spill registers but prevents the compiler from
862 extending the lifetime of these registers. */
864 #define SMALL_REGISTER_CLASSES 1
866 #define QI_REG_P(X) \
867 (REG_P (X) && REGNO (X) < 4)
868 #define NON_QI_REG_P(X) \
869 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
871 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
872 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
874 #define STACK_REG_P(xop) (REG_P (xop) && \
875 REGNO (xop) >= FIRST_STACK_REG && \
876 REGNO (xop) <= LAST_STACK_REG)
878 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
880 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
882 /* 1 if register REGNO can magically overlap other regs.
883 Note that nonzero values work only in very special circumstances. */
885 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
887 /* The class value for index registers, and the one for base regs. */
889 #define INDEX_REG_CLASS INDEX_REGS
890 #define BASE_REG_CLASS GENERAL_REGS
892 /* Get reg_class from a letter such as appears in the machine description. */
894 #define REG_CLASS_FROM_LETTER(C) \
895 ((C) == 'r' ? GENERAL_REGS : \
896 (C) == 'q' ? Q_REGS : \
897 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
900 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
903 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
906 (C) == 'a' ? AREG : \
907 (C) == 'b' ? BREG : \
908 (C) == 'c' ? CREG : \
909 (C) == 'd' ? DREG : \
910 (C) == 'A' ? AD_REGS : \
911 (C) == 'D' ? DIREG : \
912 (C) == 'S' ? SIREG : NO_REGS)
914 /* The letters I, J, K, L and M in a register constraint string
915 can be used to stand for particular ranges of immediate operands.
916 This macro defines what the ranges are.
917 C is the letter, and VALUE is a constant value.
918 Return 1 if VALUE is in the range specified by C.
920 I is for non-DImode shifts.
921 J is for DImode shifts.
922 K and L are for an `andsi' optimization.
923 M is for shifts that can be executed by the "lea" opcode.
926 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
927 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
928 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
929 (C) == 'K' ? (VALUE) == 0xff : \
930 (C) == 'L' ? (VALUE) == 0xffff : \
931 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
932 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
933 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \
936 /* Similar, but for floating constants, and defining letters G and H.
937 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
938 TARGET_387 isn't set, because the stack register converter may need to
939 load 0.0 into the function value register. */
941 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
942 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
944 /* Place additional restrictions on the register class to use when it
945 is necessary to be able to hold a value of mode MODE in a reload
946 register for which class CLASS would ordinarily be used. */
948 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
949 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
952 /* Given an rtx X being reloaded into a reg required to be
953 in class CLASS, return the class of reg to actually use.
954 In general this is just CLASS; but on some machines
955 in some cases it is preferable to use a more restrictive class.
956 On the 80386 series, we prevent floating constants from being
957 reloaded into floating registers (since no move-insn can do that)
958 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
960 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
961 QImode must go into class Q_REGS.
962 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
963 movdf to do mem-to-mem moves through integer regs. */
965 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
966 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode \
967 ? (standard_80387_constant_p (X) \
968 ? reg_class_subset_p (CLASS, FLOAT_REGS) ? CLASS : FLOAT_REGS \
970 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
971 : ((CLASS) == ALL_REGS \
972 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
975 /* If we are copying between general and FP registers, we need a memory
978 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
979 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
980 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
982 /* Return the maximum number of consecutive registers
983 needed to represent mode MODE in a register of class CLASS. */
984 /* On the 80386, this is the size of MODE in words,
985 except in the FP regs, where a single reg is always enough. */
986 #define CLASS_MAX_NREGS(CLASS, MODE) \
987 (FLOAT_CLASS_P (CLASS) ? 1 : \
988 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
990 /* A C expression whose value is nonzero if pseudos that have been
991 assigned to registers of class CLASS would likely be spilled
992 because registers of CLASS are needed for spill registers.
994 The default value of this macro returns 1 if CLASS has exactly one
995 register and zero otherwise. On most machines, this default
996 should be used. Only define this macro to some other expression
997 if pseudo allocated by `local-alloc.c' end up in memory because
998 their hard registers were needed for spill registers. If this
999 macro returns nonzero for those classes, those pseudos will only
1000 be allocated by `global.c', which knows how to reallocate the
1001 pseudo to another register. If there would not be another
1002 register available for reallocation, you should not change the
1003 definition of this macro since the only effect of such a
1004 definition would be to slow down register allocation. */
1006 #define CLASS_LIKELY_SPILLED_P(CLASS) \
1007 (((CLASS) == AREG) \
1008 || ((CLASS) == DREG) \
1009 || ((CLASS) == CREG) \
1010 || ((CLASS) == BREG) \
1011 || ((CLASS) == AD_REGS) \
1012 || ((CLASS) == SIREG) \
1013 || ((CLASS) == DIREG))
1016 /* Stack layout; function entry, exit and calling. */
1018 /* Define this if pushing a word on the stack
1019 makes the stack pointer a smaller address. */
1020 #define STACK_GROWS_DOWNWARD
1022 /* Define this if the nominal address of the stack frame
1023 is at the high-address end of the local variables;
1024 that is, each additional local variable allocated
1025 goes at a more negative offset in the frame. */
1026 #define FRAME_GROWS_DOWNWARD
1028 /* Offset within stack frame to start allocating local variables at.
1029 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1030 first local allocated. Otherwise, it is the offset to the BEGINNING
1031 of the first local allocated. */
1032 #define STARTING_FRAME_OFFSET 0
1034 /* If we generate an insn to push BYTES bytes,
1035 this says how many the stack pointer really advances by.
1036 On 386 pushw decrements by exactly 2 no matter what the position was.
1037 On the 386 there is no pushb; we use pushw instead, and this
1038 has the effect of rounding up to 2. */
1040 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
1042 /* Offset of first parameter from the argument pointer register value. */
1043 #define FIRST_PARM_OFFSET(FNDECL) 0
1045 /* Value is the number of bytes of arguments automatically
1046 popped when returning from a subroutine call.
1047 FUNDECL is the declaration node of the function (as a tree),
1048 FUNTYPE is the data type of the function (as a tree),
1049 or for a library call it is an identifier node for the subroutine name.
1050 SIZE is the number of bytes of arguments passed on the stack.
1052 On the 80386, the RTD insn may be used to pop them if the number
1053 of args is fixed, but if the number is variable then the caller
1054 must pop them all. RTD can't be used for library calls now
1055 because the library is compiled with the Unix compiler.
1056 Use of RTD is a selectable option, since it is incompatible with
1057 standard Unix calling sequences. If the option is not selected,
1058 the caller must always pop the args.
1060 The attribute stdcall is equivalent to RTD on a per module basis. */
1062 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
1063 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
1065 /* Define how to find the value returned by a function.
1066 VALTYPE is the data type of the value (as a tree).
1067 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1068 otherwise, FUNC is 0. */
1069 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1070 gen_rtx_REG (TYPE_MODE (VALTYPE), \
1071 VALUE_REGNO (TYPE_MODE (VALTYPE)))
1073 /* Define how to find the value returned by a library function
1074 assuming the value has mode MODE. */
1076 #define LIBCALL_VALUE(MODE) \
1077 gen_rtx_REG (MODE, VALUE_REGNO (MODE))
1079 /* Define the size of the result block used for communication between
1080 untyped_call and untyped_return. The block contains a DImode value
1081 followed by the block used by fnsave and frstor. */
1083 #define APPLY_RESULT_SIZE (8+108)
1085 /* 1 if N is a possible register number for function argument passing. */
1086 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
1088 /* Define a data type for recording info about an argument list
1089 during the scan of that argument list. This data type should
1090 hold all necessary information about the function itself
1091 and about the args processed so far, enough to enable macros
1092 such as FUNCTION_ARG to determine where the next arg should go. */
1094 typedef struct i386_args {
1095 int words; /* # words passed so far */
1096 int nregs; /* # registers available for passing */
1097 int regno; /* next available register number */
1100 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1101 for a call to a function whose data type is FNTYPE.
1102 For a library call, FNTYPE is 0. */
1104 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
1105 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
1107 /* Update the data in CUM to advance over an argument
1108 of mode MODE and data type TYPE.
1109 (TYPE is null for libcalls where that information may not be available.) */
1111 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1112 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
1114 /* Define where to put the arguments to a function.
1115 Value is zero to push the argument on the stack,
1116 or a hard register in which to store the argument.
1118 MODE is the argument's machine mode.
1119 TYPE is the data type of the argument (as a tree).
1120 This is null for libcalls where that information may
1122 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1123 the preceding args and about the function being called.
1124 NAMED is nonzero if this argument is a named parameter
1125 (otherwise it is an extra parameter matching an ellipsis). */
1127 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1128 (function_arg (&CUM, MODE, TYPE, NAMED))
1130 /* For an arg passed partly in registers and partly in memory,
1131 this is the number of registers used.
1132 For args passed entirely in registers or entirely in memory, zero. */
1134 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1135 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
1137 /* This macro is invoked just before the start of a function.
1138 It is used here to output code for -fpic that will load the
1139 return address into %ebx. */
1141 #undef ASM_OUTPUT_FUNCTION_PREFIX
1142 #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME) \
1143 asm_output_function_prefix (FILE, FNNAME)
1145 /* This macro generates the assembly code for function entry.
1146 FILE is a stdio stream to output the code to.
1147 SIZE is an int: how many units of temporary storage to allocate.
1148 Refer to the array `regs_ever_live' to determine which registers
1149 to save; `regs_ever_live[I]' is nonzero if register number I
1150 is ever used in the function. This macro is responsible for
1151 knowing which registers should not be saved even if used. */
1153 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1154 function_prologue (FILE, SIZE)
1156 /* Output assembler code to FILE to increment profiler label # LABELNO
1157 for profiling a function entry. */
1159 #define FUNCTION_PROFILER(FILE, LABELNO) \
1163 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
1164 LPREFIX, (LABELNO)); \
1165 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
1169 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
1170 fprintf (FILE, "\tcall _mcount\n"); \
1175 /* There are three profiling modes for basic blocks available.
1176 The modes are selected at compile time by using the options
1177 -a or -ax of the gnu compiler.
1178 The variable `profile_block_flag' will be set according to the
1181 profile_block_flag == 0, no option used:
1185 profile_block_flag == 1, -a option used.
1187 Count frequency of execution of every basic block.
1189 profile_block_flag == 2, -ax option used.
1191 Generate code to allow several different profiling modes at run time.
1192 Available modes are:
1193 Produce a trace of all basic blocks.
1194 Count frequency of jump instructions executed.
1195 In every mode it is possible to start profiling upon entering
1196 certain functions and to disable profiling of some other functions.
1198 The result of basic-block profiling will be written to a file `bb.out'.
1199 If the -ax option is used parameters for the profiling will be read
1204 /* The following macro shall output assembler code to FILE
1205 to initialize basic-block profiling.
1207 If profile_block_flag == 2
1209 Output code to call the subroutine `__bb_init_trace_func'
1210 and pass two parameters to it. The first parameter is
1211 the address of a block allocated in the object module.
1212 The second parameter is the number of the first basic block
1215 The name of the block is a local symbol made with this statement:
1217 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1219 Of course, since you are writing the definition of
1220 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1221 can take a short cut in the definition of this macro and use the
1222 name that you know will result.
1224 The number of the first basic block of the function is
1225 passed to the macro in BLOCK_OR_LABEL.
1227 If described in a virtual assembler language the code to be
1231 parameter2 <- BLOCK_OR_LABEL
1232 call __bb_init_trace_func
1234 else if profile_block_flag != 0
1236 Output code to call the subroutine `__bb_init_func'
1237 and pass one single parameter to it, which is the same
1238 as the first parameter to `__bb_init_trace_func'.
1240 The first word of this parameter is a flag which will be nonzero if
1241 the object module has already been initialized. So test this word
1242 first, and do not call `__bb_init_func' if the flag is nonzero.
1243 Note: When profile_block_flag == 2 the test need not be done
1244 but `__bb_init_trace_func' *must* be called.
1246 BLOCK_OR_LABEL may be used to generate a label number as a
1247 branch destination in case `__bb_init_func' will not be called.
1249 If described in a virtual assembler language the code to be
1260 #undef FUNCTION_BLOCK_PROFILER
1261 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
1264 static int num_func = 0; \
1266 char block_table[80], false_label[80]; \
1268 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1270 xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \
1271 xops[5] = stack_pointer_rtx; \
1272 xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \
1274 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1276 switch (profile_block_flag) \
1281 xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \
1282 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_trace_func")); \
1283 xops[6] = GEN_INT (8); \
1285 output_asm_insn (AS1(push%L2,%2), xops); \
1287 output_asm_insn (AS1(push%L1,%1), xops); \
1290 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1291 output_asm_insn (AS1 (push%L7,%7), xops); \
1294 output_asm_insn (AS1(call,%P3), xops); \
1295 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1301 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
1303 xops[0] = const0_rtx; \
1304 xops[2] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, false_label)); \
1305 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_func")); \
1306 xops[4] = gen_rtx_MEM (Pmode, xops[1]); \
1307 xops[6] = GEN_INT (4); \
1309 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
1311 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
1312 output_asm_insn (AS1(jne,%2), xops); \
1315 output_asm_insn (AS1(push%L1,%1), xops); \
1318 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1319 output_asm_insn (AS1 (push%L7,%7), xops); \
1322 output_asm_insn (AS1(call,%P3), xops); \
1323 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1324 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LPBZ", num_func); \
1333 /* The following macro shall output assembler code to FILE
1334 to increment a counter associated with basic block number BLOCKNO.
1336 If profile_block_flag == 2
1338 Output code to initialize the global structure `__bb' and
1339 call the function `__bb_trace_func' which will increment the
1342 `__bb' consists of two words. In the first word the number
1343 of the basic block has to be stored. In the second word
1344 the address of a block allocated in the object module
1347 The basic block number is given by BLOCKNO.
1349 The address of the block is given by the label created with
1351 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1353 by FUNCTION_BLOCK_PROFILER.
1355 Of course, since you are writing the definition of
1356 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1357 can take a short cut in the definition of this macro and use the
1358 name that you know will result.
1360 If described in a virtual assembler language the code to be
1363 move BLOCKNO -> (__bb)
1364 move LPBX0 -> (__bb+4)
1365 call __bb_trace_func
1367 Note that function `__bb_trace_func' must not change the
1368 machine state, especially the flag register. To grant
1369 this, you must output code to save and restore registers
1370 either in this macro or in the macros MACHINE_STATE_SAVE
1371 and MACHINE_STATE_RESTORE. The last two macros will be
1372 used in the function `__bb_trace_func', so you must make
1373 sure that the function prologue does not change any
1374 register prior to saving it with MACHINE_STATE_SAVE.
1376 else if profile_block_flag != 0
1378 Output code to increment the counter directly.
1379 Basic blocks are numbered separately from zero within each
1380 compiled object module. The count associated with block number
1381 BLOCKNO is at index BLOCKNO in an array of words; the name of
1382 this array is a local symbol made with this statement:
1384 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1386 Of course, since you are writing the definition of
1387 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1388 can take a short cut in the definition of this macro and use the
1389 name that you know will result.
1391 If described in a virtual assembler language the code to be
1394 inc (LPBX2+4*BLOCKNO)
1398 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1401 rtx xops[8], cnt_rtx; \
1403 char *block_table = counts; \
1405 switch (profile_block_flag) \
1410 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1412 xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \
1413 xops[2] = GEN_INT ((BLOCKNO)); \
1414 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_func")); \
1415 xops[4] = gen_rtx_SYMBOL_REF (VOIDmode, "__bb"); \
1416 xops[5] = plus_constant (xops[4], 4); \
1417 xops[0] = gen_rtx_MEM (SImode, xops[4]); \
1418 xops[6] = gen_rtx_MEM (SImode, xops[5]); \
1420 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1422 fprintf(FILE, "\tpushf\n"); \
1423 output_asm_insn (AS2(mov%L0,%2,%0), xops); \
1426 xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \
1427 output_asm_insn (AS1(push%L7,%7), xops); \
1428 output_asm_insn (AS2(lea%L7,%a1,%7), xops); \
1429 output_asm_insn (AS2(mov%L6,%7,%6), xops); \
1430 output_asm_insn (AS1(pop%L7,%7), xops); \
1433 output_asm_insn (AS2(mov%L6,%1,%6), xops); \
1434 output_asm_insn (AS1(call,%P3), xops); \
1435 fprintf(FILE, "\tpopf\n"); \
1441 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
1442 cnt_rtx = gen_rtx_SYMBOL_REF (VOIDmode, counts); \
1443 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
1446 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
1449 cnt_rtx = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, cnt_rtx); \
1451 xops[0] = gen_rtx_MEM (SImode, cnt_rtx); \
1452 output_asm_insn (AS1(inc%L0,%0), xops); \
1460 /* The following macro shall output assembler code to FILE
1461 to indicate a return from function during basic-block profiling.
1463 If profiling_block_flag == 2:
1465 Output assembler code to call function `__bb_trace_ret'.
1467 Note that function `__bb_trace_ret' must not change the
1468 machine state, especially the flag register. To grant
1469 this, you must output code to save and restore registers
1470 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1471 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1472 used in the function `__bb_trace_ret', so you must make
1473 sure that the function prologue does not change any
1474 register prior to saving it with MACHINE_STATE_SAVE_RET.
1476 else if profiling_block_flag != 0:
1478 The macro will not be used, so it need not distinguish
1482 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1487 xops[0] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_ret")); \
1489 output_asm_insn (AS1(call,%P0), xops); \
1494 /* The function `__bb_trace_func' is called in every basic block
1495 and is not allowed to change the machine state. Saving (restoring)
1496 the state can either be done in the BLOCK_PROFILER macro,
1497 before calling function (rsp. after returning from function)
1498 `__bb_trace_func', or it can be done inside the function by
1499 defining the macros:
1501 MACHINE_STATE_SAVE(ID)
1502 MACHINE_STATE_RESTORE(ID)
1504 In the latter case care must be taken, that the prologue code
1505 of function `__bb_trace_func' does not already change the
1506 state prior to saving it with MACHINE_STATE_SAVE.
1508 The parameter `ID' is a string identifying a unique macro use.
1510 On the i386 the initialization code at the begin of
1511 function `__bb_trace_func' contains a `sub' instruction
1512 therefore we handle save and restore of the flag register
1513 in the BLOCK_PROFILER macro. */
1515 #define MACHINE_STATE_SAVE(ID) \
1516 asm (" pushl %eax"); \
1517 asm (" pushl %ecx"); \
1518 asm (" pushl %edx"); \
1519 asm (" pushl %esi");
1521 #define MACHINE_STATE_RESTORE(ID) \
1522 asm (" popl %esi"); \
1523 asm (" popl %edx"); \
1524 asm (" popl %ecx"); \
1527 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1528 the stack pointer does not matter. The value is tested only in
1529 functions that have frame pointers.
1530 No definition is equivalent to always zero. */
1531 /* Note on the 386 it might be more efficient not to define this since
1532 we have to restore it ourselves from the frame pointer, in order to
1535 #define EXIT_IGNORE_STACK 1
1537 /* This macro generates the assembly code for function exit,
1538 on machines that need it. If FUNCTION_EPILOGUE is not defined
1539 then individual return instructions are generated for each
1540 return statement. Args are same as for FUNCTION_PROLOGUE.
1542 The function epilogue should not depend on the current stack pointer!
1543 It should use the frame pointer only. This is mandatory because
1544 of alloca; we also take advantage of it to omit stack adjustments
1547 If the last non-note insn in the function is a BARRIER, then there
1548 is no need to emit a function prologue, because control does not fall
1549 off the end. This happens if the function ends in an "exit" call, or
1550 if a `return' insn is emitted directly into the function. */
1553 #define FUNCTION_BEGIN_EPILOGUE(FILE) \
1555 rtx last = get_last_insn (); \
1556 if (last && GET_CODE (last) == NOTE) \
1557 last = prev_nonnote_insn (last); \
1558 /* if (! last || GET_CODE (last) != BARRIER) \
1559 function_epilogue (FILE, SIZE);*/ \
1563 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1564 function_epilogue (FILE, SIZE)
1566 /* Output assembler code for a block containing the constant parts
1567 of a trampoline, leaving space for the variable parts. */
1569 /* On the 386, the trampoline contains two instructions:
1572 The trampoline is generated entirely at runtime. The operand of JMP
1573 is the address of FUNCTION relative to the instruction following the
1574 JMP (which is 5 bytes long). */
1576 /* Length in units of the trampoline for entering a nested function. */
1578 #define TRAMPOLINE_SIZE 10
1580 /* Emit RTL insns to initialize the variable parts of a trampoline.
1581 FNADDR is an RTX for the address of the function's pure code.
1582 CXT is an RTX for the static chain value for the function. */
1584 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1586 /* Compute offset from the end of the jmp to the target function. */ \
1587 rtx disp = expand_binop (SImode, sub_optab, FNADDR, \
1588 plus_constant (TRAMP, 10), \
1589 NULL_RTX, 1, OPTAB_DIRECT); \
1590 emit_move_insn (gen_rtx_MEM (QImode, TRAMP), GEN_INT (0xb9)); \
1591 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 1)), CXT); \
1592 emit_move_insn (gen_rtx_MEM (QImode, plus_constant (TRAMP, 5)), GEN_INT (0xe9));\
1593 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 6)), disp); \
1596 /* Definitions for register eliminations.
1598 This is an array of structures. Each structure initializes one pair
1599 of eliminable registers. The "from" register number is given first,
1600 followed by "to". Eliminations of the same "from" register are listed
1601 in order of preference.
1603 We have two registers that can be eliminated on the i386. First, the
1604 frame pointer register can often be eliminated in favor of the stack
1605 pointer register. Secondly, the argument pointer register can always be
1606 eliminated; it is replaced with either the stack or frame pointer. */
1608 #define ELIMINABLE_REGS \
1609 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1610 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1611 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1613 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1614 Frame pointer elimination is automatically handled.
1616 For the i386, if frame pointer elimination is being done, we would like to
1617 convert ap into sp, not fp.
1619 All other eliminations are valid. */
1621 #define CAN_ELIMINATE(FROM, TO) \
1622 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1623 ? ! frame_pointer_needed \
1626 /* Define the offset between two registers, one to be eliminated, and the other
1627 its replacement, at the start of a routine. */
1629 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1631 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1632 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1637 int preferred_alignment = PREFERRED_STACK_BOUNDARY / BITS_PER_UNIT; \
1638 HOST_WIDE_INT tsize = ix86_compute_frame_size (get_frame_size (), \
1641 (OFFSET) = (tsize + nregs * UNITS_PER_WORD); \
1644 if (frame_pointer_needed) \
1645 offset += UNITS_PER_WORD; \
1647 if ((FROM) == ARG_POINTER_REGNUM) \
1648 (OFFSET) += offset; \
1650 (OFFSET) -= ((offset + preferred_alignment - 1) \
1651 & -preferred_alignment) - offset; \
1655 /* Addressing modes, and classification of registers for them. */
1657 /* #define HAVE_POST_INCREMENT 0 */
1658 /* #define HAVE_POST_DECREMENT 0 */
1660 /* #define HAVE_PRE_DECREMENT 0 */
1661 /* #define HAVE_PRE_INCREMENT 0 */
1663 /* Macros to check register numbers against specific register classes. */
1665 /* These assume that REGNO is a hard or pseudo reg number.
1666 They give nonzero only if REGNO is a hard reg of the suitable class
1667 or a pseudo reg currently allocated to a suitable hard reg.
1668 Since they use reg_renumber, they are safe only once reg_renumber
1669 has been allocated, which happens in local-alloc.c. */
1671 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1672 ((REGNO) < STACK_POINTER_REGNUM \
1673 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1675 #define REGNO_OK_FOR_BASE_P(REGNO) \
1676 ((REGNO) <= STACK_POINTER_REGNUM \
1677 || (REGNO) == ARG_POINTER_REGNUM \
1678 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1680 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1681 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1683 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1684 and check its validity for a certain class.
1685 We have two alternate definitions for each of them.
1686 The usual definition accepts all pseudo regs; the other rejects
1687 them unless they have been allocated suitable hard regs.
1688 The symbol REG_OK_STRICT causes the latter definition to be used.
1690 Most source files want to accept pseudo regs in the hope that
1691 they will get allocated to the class that the insn wants them to be in.
1692 Source files for reload pass need to be strict.
1693 After reload, it makes no difference, since pseudo regs have
1694 been eliminated by then. */
1697 /* Non strict versions, pseudos are ok */
1698 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1699 (REGNO (X) < STACK_POINTER_REGNUM \
1700 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1702 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1703 (REGNO (X) <= STACK_POINTER_REGNUM \
1704 || REGNO (X) == ARG_POINTER_REGNUM \
1705 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1707 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1708 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1710 /* Strict versions, hard registers only */
1711 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1712 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1713 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1714 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1716 #ifndef REG_OK_STRICT
1717 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1718 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1719 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1722 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1723 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1724 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1727 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1728 that is a valid memory address for an instruction.
1729 The MODE argument is the machine mode for the MEM expression
1730 that wants to use this address.
1732 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1733 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1735 See legitimize_pic_address in i386.c for details as to what
1736 constitutes a legitimate address when -fpic is used. */
1738 #define MAX_REGS_PER_ADDRESS 2
1740 #define CONSTANT_ADDRESS_P(X) \
1741 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1742 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
1744 /* Nonzero if the constant value X is a legitimate general operand.
1745 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1747 #define LEGITIMATE_CONSTANT_P(X) \
1748 (GET_CODE (X) == CONST_DOUBLE ? standard_80387_constant_p (X) : 1)
1750 #ifdef REG_OK_STRICT
1751 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1753 if (legitimate_address_p (MODE, X, 1)) \
1758 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1760 if (legitimate_address_p (MODE, X, 0)) \
1766 /* Try machine-dependent ways of modifying an illegitimate address
1767 to be legitimate. If we find one, return the new, valid address.
1768 This macro is used in only one place: `memory_address' in explow.c.
1770 OLDX is the address as it was before break_out_memory_refs was called.
1771 In some cases it is useful to look at this to decide what needs to be done.
1773 MODE and WIN are passed so that this macro can use
1774 GO_IF_LEGITIMATE_ADDRESS.
1776 It is always safe for this macro to do nothing. It exists to recognize
1777 opportunities to optimize the output.
1779 For the 80386, we handle X+REG by loading X into a register R and
1780 using R+REG. R will go in a general reg and indexing will be used.
1781 However, if REG is a broken-out memory address or multiplication,
1782 nothing needs to be done because REG can certainly go in a general reg.
1784 When -fpic is used, special handling is needed for symbolic references.
1785 See comments by legitimize_pic_address in i386.c for details. */
1787 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1789 (X) = legitimize_address (X, OLDX, MODE); \
1790 if (memory_address_p (MODE, X)) \
1794 #define REWRITE_ADDRESS(x) rewrite_address(x)
1796 /* Nonzero if the constant value X is a legitimate general operand
1797 when generating PIC code. It is given that flag_pic is on and
1798 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1800 #define LEGITIMATE_PIC_OPERAND_P(X) \
1801 (! SYMBOLIC_CONST (X) || legitimate_pic_address_disp_p (X))
1803 #define SYMBOLIC_CONST(X) \
1804 (GET_CODE (X) == SYMBOL_REF \
1805 || GET_CODE (X) == LABEL_REF \
1806 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1808 /* Go to LABEL if ADDR (a legitimate address expression)
1809 has an effect that depends on the machine mode it is used for.
1810 On the 80386, only postdecrement and postincrement address depend thus
1811 (the amount of decrement or increment being the length of the operand). */
1812 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1813 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1815 /* Define this macro if references to a symbol must be treated
1816 differently depending on something about the variable or
1817 function named by the symbol (such as what section it is in).
1819 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1820 so that we may access it directly in the GOT. */
1822 #define ENCODE_SECTION_INFO(DECL) \
1827 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1828 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1830 if (TARGET_DEBUG_ADDR \
1831 && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \
1833 fprintf (stderr, "Encode %s, public = %d\n", \
1834 IDENTIFIER_POINTER (DECL_NAME (DECL)), \
1835 TREE_PUBLIC (DECL)); \
1838 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1839 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1840 || ! TREE_PUBLIC (DECL)); \
1845 /* Initialize data used by insn expanders. This is called from
1846 init_emit, once for each function, before code is generated.
1847 For 386, clear stack slot assignments remembered from previous
1850 #define INIT_EXPANDERS clear_386_stack_locals ()
1852 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1853 codes once the function is being compiled into assembly code, but
1854 not before. (It is not done before, because in the case of
1855 compiling an inline function, it would lead to multiple PIC
1856 prologues being included in functions which used inline functions
1857 and were compiled to assembly language.) */
1859 #define FINALIZE_PIC \
1862 extern int current_function_uses_pic_offset_table; \
1864 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1869 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1870 with arguments ARGS is a valid machine specific attribute for DECL.
1871 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1873 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1874 (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1876 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1877 with arguments ARGS is a valid machine specific attribute for TYPE.
1878 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1880 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1881 (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1883 /* If defined, a C expression whose value is zero if the attributes on
1884 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1885 two if they are nearly compatible (which causes a warning to be
1888 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1889 (i386_comp_type_attributes (TYPE1, TYPE2))
1891 /* If defined, a C statement that assigns default attributes to newly
1894 /* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1896 /* Max number of args passed in registers. If this is more than 3, we will
1897 have problems with ebx (register #4), since it is a caller save register and
1898 is also used as the pic register in ELF. So for now, don't allow more than
1899 3 registers to be passed in registers. */
1901 #define REGPARM_MAX 3
1904 /* Specify the machine mode that this machine uses
1905 for the index in the tablejump instruction. */
1906 #define CASE_VECTOR_MODE Pmode
1908 /* Define as C expression which evaluates to nonzero if the tablejump
1909 instruction expects the table to contain offsets from the address of the
1911 Do not define this if the table should contain absolute addresses. */
1912 /* #define CASE_VECTOR_PC_RELATIVE 1 */
1914 /* Specify the tree operation to be used to convert reals to integers.
1915 This should be changed to take advantage of fist --wfs ??
1917 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1919 /* This is the kind of divide that is easiest to do in the general case. */
1920 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1922 /* Define this as 1 if `char' should by default be signed; else as 0. */
1923 #define DEFAULT_SIGNED_CHAR 1
1925 /* Max number of bytes we can move from memory to memory
1926 in one reasonably fast instruction. */
1929 /* If a memory-to-memory move would take MOVE_RATIO or more simple
1930 move-instruction pairs, we will do a movstr or libcall instead.
1931 Increasing the value will always make code faster, but eventually
1932 incurs high cost in increased code size.
1934 If you don't define this, a reasonable default is used.
1936 Make this large on i386, since the block move is very inefficient with small
1937 blocks, and the hard register needs of the block move require much reload
1940 #define MOVE_RATIO 5
1942 /* Define if shifts truncate the shift count
1943 which implies one can omit a sign-extension or zero-extension
1944 of a shift count. */
1945 /* On i386, shifts do truncate the count. But bit opcodes don't. */
1947 /* #define SHIFT_COUNT_TRUNCATED */
1949 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1950 is done just by pretending it is already truncated. */
1951 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1953 /* We assume that the store-condition-codes instructions store 0 for false
1954 and some other value for true. This is the value stored for true. */
1956 #define STORE_FLAG_VALUE 1
1958 /* When a prototype says `char' or `short', really pass an `int'.
1959 (The 386 can't easily push less than an int.) */
1961 #define PROMOTE_PROTOTYPES
1963 /* Specify the machine mode that pointers have.
1964 After generation of rtl, the compiler makes no further distinction
1965 between pointers and any other objects of this machine mode. */
1966 #define Pmode SImode
1968 /* A function address in a call instruction
1969 is a byte address (for indexing purposes)
1970 so give the MEM rtx a byte's mode. */
1971 #define FUNCTION_MODE QImode
1973 /* A part of a C `switch' statement that describes the relative costs
1974 of constant RTL expressions. It must contain `case' labels for
1975 expression codes `const_int', `const', `symbol_ref', `label_ref'
1976 and `const_double'. Each case must ultimately reach a `return'
1977 statement to return the relative cost of the use of that kind of
1978 constant value in an expression. The cost may depend on the
1979 precise value of the constant, which is available for examination
1980 in X, and the rtx code of the expression in which it is contained,
1981 found in OUTER_CODE.
1983 CODE is the expression code--redundant, since it can be obtained
1984 with `GET_CODE (X)'. */
1986 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1988 return (unsigned) INTVAL (RTX) < 256 ? 0 : 1; \
1992 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 1; \
1994 case CONST_DOUBLE: \
1997 if (GET_MODE (RTX) == VOIDmode) \
2000 code = standard_80387_constant_p (RTX); \
2001 return code == 1 ? 0 : \
2006 /* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */
2007 #define TOPLEVEL_COSTS_N_INSNS(N) {total = COSTS_N_INSNS (N); break;}
2009 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
2010 This can be used, for example, to indicate how costly a multiply
2011 instruction is. In writing this macro, you can use the construct
2012 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
2013 instructions. OUTER_CODE is the code of the expression in which X
2016 This macro is optional; do not define it if the default cost
2017 assumptions are adequate for the target machine. */
2019 #define RTX_COSTS(X,CODE,OUTER_CODE) \
2021 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
2022 && GET_MODE (XEXP (X, 0)) == SImode) \
2024 HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
2027 return COSTS_N_INSNS (ix86_cost->add) \
2028 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2030 if (value == 2 || value == 3) \
2031 return COSTS_N_INSNS (ix86_cost->lea) \
2032 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2034 /* fall through */ \
2040 if (GET_MODE (XEXP (X, 0)) == DImode) \
2042 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
2044 if (INTVAL (XEXP (X, 1)) > 32) \
2045 return COSTS_N_INSNS(ix86_cost->shift_const + 2); \
2046 return COSTS_N_INSNS(ix86_cost->shift_const * 2); \
2048 return ((GET_CODE (XEXP (X, 1)) == AND \
2049 ? COSTS_N_INSNS(ix86_cost->shift_var * 2) \
2050 : COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2)) \
2051 + rtx_cost(XEXP (X, 0), OUTER_CODE)); \
2053 return COSTS_N_INSNS (GET_CODE (XEXP (X, 1)) == CONST_INT \
2054 ? ix86_cost->shift_const \
2055 : ix86_cost->shift_var) \
2056 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2059 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
2061 unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
2065 return COSTS_N_INSNS (ix86_cost->add) \
2066 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2067 if (value == 4 || value == 8) \
2068 return COSTS_N_INSNS (ix86_cost->lea) \
2069 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2071 while (value != 0) \
2078 return COSTS_N_INSNS (ix86_cost->shift_const) \
2079 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2081 return COSTS_N_INSNS (ix86_cost->mult_init \
2082 + nbits * ix86_cost->mult_bit) \
2083 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2086 else /* This is arbitrary */ \
2087 TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \
2088 + 7 * ix86_cost->mult_bit); \
2094 TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \
2097 if (GET_CODE (XEXP (X, 0)) == REG \
2098 && GET_MODE (XEXP (X, 0)) == SImode \
2099 && GET_CODE (XEXP (X, 1)) == PLUS) \
2100 return COSTS_N_INSNS (ix86_cost->lea); \
2102 /* fall through */ \
2107 if (GET_MODE (X) == DImode) \
2108 return COSTS_N_INSNS (ix86_cost->add) * 2 \
2109 + (rtx_cost (XEXP (X, 0), OUTER_CODE) \
2110 << (GET_MODE (XEXP (X, 0)) != DImode)) \
2111 + (rtx_cost (XEXP (X, 1), OUTER_CODE) \
2112 << (GET_MODE (XEXP (X, 1)) != DImode)); \
2115 if (GET_MODE (X) == DImode) \
2116 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2) \
2117 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add)
2120 /* An expression giving the cost of an addressing mode that contains
2121 ADDRESS. If not defined, the cost is computed from the ADDRESS
2122 expression and the `CONST_COSTS' values.
2124 For most CISC machines, the default cost is a good approximation
2125 of the true cost of the addressing mode. However, on RISC
2126 machines, all instructions normally have the same length and
2127 execution time. Hence all addresses will have equal costs.
2129 In cases where more than one form of an address is known, the form
2130 with the lowest cost will be used. If multiple forms have the
2131 same, lowest, cost, the one that is the most complex will be used.
2133 For example, suppose an address that is equal to the sum of a
2134 register and a constant is used twice in the same basic block.
2135 When this macro is not defined, the address will be computed in a
2136 register and memory references will be indirect through that
2137 register. On machines where the cost of the addressing mode
2138 containing the sum is no higher than that of a simple indirect
2139 reference, this will produce an additional instruction and
2140 possibly require an additional register. Proper specification of
2141 this macro eliminates this overhead for such machines.
2143 Similar use of this macro is made in strength reduction of loops.
2145 ADDRESS need not be valid as an address. In such a case, the cost
2146 is not relevant and can be any value; invalid addresses need not be
2147 assigned a different cost.
2149 On machines where an address involving more than one register is as
2150 cheap as an address computation involving only one register,
2151 defining `ADDRESS_COST' to reflect this can cause two registers to
2152 be live over a region of code where only one would have been if
2153 `ADDRESS_COST' were not defined in that manner. This effect should
2154 be considered in the definition of this macro. Equivalent costs
2155 should probably only be given to addresses with different numbers
2156 of registers on machines with lots of registers.
2158 This macro will normally either not be defined or be defined as a
2161 For i386, it is better to use a complex address than let gcc copy
2162 the address into a reg and make a new pseudo. But not if the address
2163 requires to two regs - that would mean more pseudos with longer
2166 #define ADDRESS_COST(RTX) \
2167 ((CONSTANT_P (RTX) \
2168 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
2169 && REG_P (XEXP (RTX, 0)))) ? 0 \
2173 /* A C expression for the cost of moving data of mode M between a
2174 register and memory. A value of 2 is the default; this cost is
2175 relative to those in `REGISTER_MOVE_COST'.
2177 If moving between registers and memory is more expensive than
2178 between two registers, you should define this macro to express the
2181 On the i386, copying between floating-point and fixed-point
2182 registers is expensive. */
2184 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
2185 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
2186 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
2190 /* A C expression for the cost of moving data of mode M between a
2191 register and memory. A value of 2 is the default; this cost is
2192 relative to those in `REGISTER_MOVE_COST'.
2194 If moving between registers and memory is more expensive than
2195 between two registers, you should define this macro to express the
2198 /* #define MEMORY_MOVE_COST(M,C,I) 2 */
2200 /* A C expression for the cost of a branch instruction. A value of 1
2201 is the default; other values are interpreted relative to that. */
2203 #define BRANCH_COST i386_branch_cost
2205 /* Define this macro as a C expression which is nonzero if accessing
2206 less than a word of memory (i.e. a `char' or a `short') is no
2207 faster than accessing a word of memory, i.e., if such access
2208 require more than one instruction or if there is no difference in
2209 cost between byte and (aligned) word loads.
2211 When this macro is not defined, the compiler will access a field by
2212 finding the smallest containing object; when it is defined, a
2213 fullword load will be used if alignment permits. Unless bytes
2214 accesses are faster than word accesses, using word accesses is
2215 preferable since it may eliminate subsequent memory access if
2216 subsequent accesses occur to other fields in the same word of the
2217 structure, but to different bytes. */
2219 #define SLOW_BYTE_ACCESS 0
2221 /* Nonzero if access to memory by shorts is slow and undesirable. */
2222 #define SLOW_SHORT_ACCESS 0
2224 /* Define this macro if zero-extension (of a `char' or `short' to an
2225 `int') can be done faster if the destination is a register that is
2228 If you define this macro, you must have instruction patterns that
2229 recognize RTL structures like this:
2231 (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
2233 and likewise for `HImode'. */
2235 /* #define SLOW_ZERO_EXTEND */
2237 /* Define this macro to be the value 1 if unaligned accesses have a
2238 cost many times greater than aligned accesses, for example if they
2239 are emulated in a trap handler.
2241 When this macro is non-zero, the compiler will act as if
2242 `STRICT_ALIGNMENT' were non-zero when generating code for block
2243 moves. This can cause significantly more instructions to be
2244 produced. Therefore, do not set this macro non-zero if unaligned
2245 accesses only add a cycle or two to the time for a memory access.
2247 If the value of this macro is always zero, it need not be defined. */
2249 /* #define SLOW_UNALIGNED_ACCESS 0 */
2251 /* Define this macro to inhibit strength reduction of memory
2252 addresses. (On some machines, such strength reduction seems to do
2253 harm rather than good.) */
2255 /* #define DONT_REDUCE_ADDR */
2257 /* Define this macro if it is as good or better to call a constant
2258 function address than to call an address kept in a register.
2260 Desirable on the 386 because a CALL with a constant address is
2261 faster than one with a register address. */
2263 #define NO_FUNCTION_CSE
2265 /* Define this macro if it is as good or better for a function to call
2266 itself with an explicit address than to call an address kept in a
2269 #define NO_RECURSIVE_FUNCTION_CSE
2271 /* A C statement (sans semicolon) to update the integer variable COST
2272 based on the relationship between INSN that is dependent on
2273 DEP_INSN through the dependence LINK. The default is to make no
2274 adjustment to COST. This can be used for example to specify to
2275 the scheduler that an output- or anti-dependence does not incur
2276 the same cost as a data-dependence. */
2278 #define ADJUST_COST(insn,link,dep_insn,cost) \
2279 (cost) = x86_adjust_cost(insn, link, dep_insn, cost)
2281 #define ADJUST_BLOCKAGE(last_insn,insn,blockage) \
2283 if (is_fp_store (last_insn) && is_fp_insn (insn) \
2284 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \
2285 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \
2286 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \
2287 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \
2288 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \
2289 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \
2290 == NOTE_INSN_LOOP_END)) \
2296 #define ISSUE_RATE ((int)ix86_cpu > (int)PROCESSOR_I486 ? 2 : 1)
2299 /* Add any extra modes needed to represent the condition code.
2301 For the i386, we need separate modes when floating-point equality
2302 comparisons are being done. */
2304 #define EXTRA_CC_MODES CCFPEQmode
2306 /* Define the names for the modes specified above. */
2307 #define EXTRA_CC_NAMES "CCFPEQ"
2309 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
2310 return the mode to be used for the comparison.
2312 For floating-point equality comparisons, CCFPEQmode should be used.
2313 VOIDmode should be used in all other cases. */
2315 #define SELECT_CC_MODE(OP,X,Y) \
2316 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2317 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
2319 /* Define the information needed to generate branch and scc insns. This is
2320 stored from the compare operation. Note that we can't use "rtx" here
2321 since it hasn't been defined! */
2323 extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
2325 /* Tell final.c how to eliminate redundant test instructions. */
2327 /* Here we define machine-dependent flags and fields in cc_status
2328 (see `conditions.h'). */
2330 /* Set if the cc value was actually from the 80387 and
2331 we are testing eax directly (i.e. no sahf) */
2332 #define CC_TEST_AX 020000
2334 /* Set if the cc value is actually in the 80387, so a floating point
2335 conditional branch must be output. */
2336 #define CC_IN_80387 04000
2338 /* Set if the CC value was stored in a nonstandard way, so that
2339 the state of equality is indicated by zero in the carry bit. */
2340 #define CC_Z_IN_NOT_C 010000
2342 /* Set if the CC value was actually from the 80387 and loaded directly
2343 into the eflags instead of via eax/sahf. */
2344 #define CC_FCOMI 040000
2346 /* Store in cc_status the expressions
2347 that the condition codes will describe
2348 after execution of an instruction whose pattern is EXP.
2349 Do not alter them if the instruction would not alter the cc's. */
2351 #define NOTICE_UPDATE_CC(EXP, INSN) \
2352 notice_update_cc((EXP))
2354 /* Output a signed jump insn. Use template NORMAL ordinarily, or
2355 FLOAT following a floating point comparison.
2356 Use NO_OV following an arithmetic insn that set the cc's
2357 before a test insn that was deleted.
2358 NO_OV may be zero, meaning final should reinsert the test insn
2359 because the jump cannot be handled properly without it. */
2361 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
2363 if (cc_prev_status.flags & CC_IN_80387) \
2365 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
2370 /* Control the assembler format that we output, to the extent
2371 this does not vary between assemblers. */
2373 /* How to refer to registers in assembler output.
2374 This sequence is indexed by compiler's hard-register-number (see above). */
2376 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
2377 For non floating point regs, the following are the HImode names.
2379 For float regs, the stack top is sometimes referred to as "%st(0)"
2380 instead of just "%st". PRINT_REG handles this with the "y" code. */
2382 #define HI_REGISTER_NAMES \
2383 {"ax","dx","cx","bx","si","di","bp","sp", \
2384 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
2386 #define REGISTER_NAMES HI_REGISTER_NAMES
2388 /* Table of additional register names to use in user input. */
2390 #define ADDITIONAL_REGISTER_NAMES \
2391 { { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \
2392 { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \
2393 { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \
2394 { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 } }
2396 /* Note we are omitting these since currently I don't know how
2397 to get gcc to use these, since they want the same but different
2398 number as al, and ax.
2401 /* note the last four are not really qi_registers, but
2402 the md will have to never output movb into one of them
2403 only a movw . There is no movb into the last four regs */
2405 #define QI_REGISTER_NAMES \
2406 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
2408 /* These parallel the array above, and can be used to access bits 8:15
2409 of regs 0 through 3. */
2411 #define QI_HIGH_REGISTER_NAMES \
2412 {"ah", "dh", "ch", "bh", }
2414 /* How to renumber registers for dbx and gdb. */
2416 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
2417 #define DBX_REGISTER_NUMBER(n) \
2428 /* Before the prologue, RA is at 0(%esp). */
2429 #define INCOMING_RETURN_ADDR_RTX \
2430 gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
2432 /* After the prologue, RA is at -4(AP) in the current frame. */
2433 #define RETURN_ADDR_RTX(COUNT, FRAME) \
2435 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT(-4)))\
2436 : gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4))))
2438 /* PC is dbx register 8; let's use that column for RA. */
2439 #define DWARF_FRAME_RETURN_COLUMN 8
2441 /* Before the prologue, the top of the frame is at 4(%esp). */
2442 #define INCOMING_FRAME_SP_OFFSET 4
2444 /* This is how to output the definition of a user-level label named NAME,
2445 such as the label on a static function or variable NAME. */
2447 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2448 (assemble_name (FILE, NAME), fputs (":\n", FILE))
2450 /* This is how to output an assembler line defining a `double' constant. */
2452 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2454 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
2455 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
2458 /* This is how to output a `long double' extended real constant. */
2460 #undef ASM_OUTPUT_LONG_DOUBLE
2461 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
2463 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
2464 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
2467 /* This is how to output an assembler line defining a `float' constant. */
2469 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2471 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
2472 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
2475 /* Store in OUTPUT a string (made with alloca) containing
2476 an assembler-name for a local static variable named NAME.
2477 LABELNO is an integer which is different for each call. */
2479 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2480 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2481 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2485 /* This is how to output an assembler line defining an `int' constant. */
2487 #define ASM_OUTPUT_INT(FILE,VALUE) \
2488 ( fprintf (FILE, "%s ", ASM_LONG), \
2489 output_addr_const (FILE,(VALUE)), \
2492 /* Likewise for `char' and `short' constants. */
2493 /* is this supposed to do align too?? */
2495 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2496 ( fprintf (FILE, "%s ", ASM_SHORT), \
2497 output_addr_const (FILE,(VALUE)), \
2501 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2502 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2503 output_addr_const (FILE,(VALUE)), \
2504 fputs (",", FILE), \
2505 output_addr_const (FILE,(VALUE)), \
2506 fputs (" >> 8\n",FILE))
2510 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2511 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2512 output_addr_const (FILE, (VALUE)), \
2515 /* This is how to output an assembler line for a numeric constant byte. */
2517 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2518 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
2520 /* This is how to output an insn to push a register on the stack.
2521 It need not be very fast code. */
2523 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2524 fprintf (FILE, "\tpushl %%e%s\n", reg_names[REGNO])
2526 /* This is how to output an insn to pop a register from the stack.
2527 It need not be very fast code. */
2529 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2530 fprintf (FILE, "\tpopl %%e%s\n", reg_names[REGNO])
2532 /* This is how to output an element of a case-vector that is absolute.
2535 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2536 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
2538 /* This is how to output an element of a case-vector that is relative.
2539 We don't use these on the 386 yet, because the ATT assembler can't do
2540 forward reference the differences.
2543 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
2544 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
2546 /* Define the parentheses used to group arithmetic operations
2547 in assembler code. */
2549 #define ASM_OPEN_PAREN ""
2550 #define ASM_CLOSE_PAREN ""
2552 /* Define results of standard character escape sequences. */
2553 #define TARGET_BELL 007
2554 #define TARGET_BS 010
2555 #define TARGET_TAB 011
2556 #define TARGET_NEWLINE 012
2557 #define TARGET_VT 013
2558 #define TARGET_FF 014
2559 #define TARGET_CR 015
2561 /* Print operand X (an rtx) in assembler syntax to file FILE.
2562 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2563 The CODE z takes the size of operand from the following digit, and
2564 outputs b,w,or l respectively.
2566 On the 80386, we use several such letters:
2567 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
2568 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
2569 R -- print the prefix for register names.
2570 z -- print the opcode suffix for the size of the current operand.
2571 * -- print a star (in certain assembler syntax)
2572 P -- if PIC, print an @PLT suffix.
2573 X -- don't print any sort of PIC '@' suffix for a symbol.
2574 J -- print jump insn for arithmetic_comparison_operator.
2575 s -- ??? something to do with double shifts. not actually used, afaik.
2576 C -- print a conditional move suffix corresponding to the op code.
2577 c -- likewise, but reverse the condition.
2578 F,f -- likewise, but for floating-point. */
2580 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2583 /* Print the name of a register based on its machine mode and number.
2584 If CODE is 'w', pretend the mode is HImode.
2585 If CODE is 'b', pretend the mode is QImode.
2586 If CODE is 'k', pretend the mode is SImode.
2587 If CODE is 'h', pretend the reg is the `high' byte register.
2588 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2590 extern char *hi_reg_name[];
2591 extern char *qi_reg_name[];
2592 extern char *qi_high_reg_name[];
2594 #define PRINT_REG(X, CODE, FILE) \
2595 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
2597 fprintf (FILE, "%s", RP); \
2598 switch ((CODE == 'w' ? 2 \
2603 : GET_MODE_SIZE (GET_MODE (X)))) \
2606 if (STACK_TOP_P (X)) \
2608 fputs ("st(0)", FILE); \
2614 if (! FP_REG_P (X)) fputs ("e", FILE); \
2616 fputs (hi_reg_name[REGNO (X)], FILE); \
2619 fputs (qi_reg_name[REGNO (X)], FILE); \
2622 fputs (qi_high_reg_name[REGNO (X)], FILE); \
2627 #define PRINT_OPERAND(FILE, X, CODE) \
2628 print_operand (FILE, X, CODE)
2630 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2631 print_operand_address (FILE, ADDR)
2633 /* Print the name of a register for based on its machine mode and number.
2634 This macro is used to print debugging output.
2635 This macro is different from PRINT_REG in that it may be used in
2636 programs that are not linked with aux-output.o. */
2638 #define DEBUG_PRINT_REG(X, CODE, FILE) \
2639 do { static char *hi_name[] = HI_REGISTER_NAMES; \
2640 static char *qi_name[] = QI_REGISTER_NAMES; \
2641 fprintf (FILE, "%d %s", REGNO (X), RP); \
2642 if (REGNO (X) == ARG_POINTER_REGNUM) \
2643 { fputs ("argp", FILE); break; } \
2644 if (STACK_TOP_P (X)) \
2645 { fputs ("st(0)", FILE); break; } \
2647 { fputs (hi_name[REGNO(X)], FILE); break; } \
2648 switch (GET_MODE_SIZE (GET_MODE (X))) \
2651 fputs ("e", FILE); \
2653 fputs (hi_name[REGNO (X)], FILE); \
2656 fputs (qi_name[REGNO (X)], FILE); \
2661 /* Output the prefix for an immediate operand, or for an offset operand. */
2662 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
2663 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
2665 /* Routines in libgcc that return floats must return them in an fp reg,
2666 just as other functions do which return such values.
2667 These macros make that happen. */
2669 #define FLOAT_VALUE_TYPE float
2670 #define INTIFY(FLOATVAL) FLOATVAL
2672 /* Nonzero if INSN magically clobbers register REGNO. */
2674 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
2675 (FP_REGNO_P (REGNO) \
2676 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
2679 /* a letter which is not needed by the normal asm syntax, which
2680 we can use for operand syntax in the extended asm */
2682 #define ASM_OPERAND_LETTER '#'
2683 #define RET return ""
2684 #define AT_SP(mode) (gen_rtx_MEM ((mode), stack_pointer_rtx))
2686 /* Helper macros to expand a binary/unary operator if needed */
2687 #define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \
2689 if (!ix86_expand_binary_operator (OP, MODE, OPERANDS)) \
2693 #define IX86_EXPAND_UNARY_OPERATOR(OP, MODE, OPERANDS) \
2695 if (!ix86_expand_unary_operator (OP, MODE, OPERANDS,)) \
2700 /* Functions in i386.c */
2701 extern void override_options ();
2702 extern void order_regs_for_local_alloc ();
2703 extern char *output_strlen_unroll ();
2704 extern struct rtx_def *i386_sext16_if_const ();
2705 extern int i386_aligned_p ();
2706 extern int i386_cc_probably_useless_p ();
2707 extern int i386_valid_decl_attribute_p ();
2708 extern int i386_valid_type_attribute_p ();
2709 extern int i386_return_pops_args ();
2710 extern int i386_comp_type_attributes ();
2711 extern void init_cumulative_args ();
2712 extern void function_arg_advance ();
2713 extern struct rtx_def *function_arg ();
2714 extern int function_arg_partial_nregs ();
2715 extern char *output_strlen_unroll ();
2716 extern void output_op_from_reg ();
2717 extern void output_to_reg ();
2718 extern char *singlemove_string ();
2719 extern char *output_move_double ();
2720 extern char *output_move_memory ();
2721 extern char *output_move_pushmem ();
2722 extern int standard_80387_constant_p ();
2723 extern char *output_move_const_single ();
2724 extern int symbolic_operand ();
2725 extern int call_insn_operand ();
2726 extern int expander_call_insn_operand ();
2727 extern int symbolic_reference_mentioned_p ();
2728 extern int ix86_expand_binary_operator ();
2729 extern int ix86_binary_operator_ok ();
2730 extern int ix86_expand_unary_operator ();
2731 extern int ix86_unary_operator_ok ();
2732 extern void emit_pic_move ();
2733 extern void function_prologue ();
2734 extern int simple_386_epilogue ();
2735 extern void function_epilogue ();
2736 extern int legitimate_address_p ();
2737 extern struct rtx_def *legitimize_pic_address ();
2738 extern struct rtx_def *legitimize_address ();
2739 extern void print_operand ();
2740 extern void print_operand_address ();
2741 extern void notice_update_cc ();
2742 extern void split_di ();
2743 extern int binary_387_op ();
2744 extern int shift_op ();
2745 extern int VOIDmode_compare_op ();
2746 extern char *output_387_binary_op ();
2747 extern char *output_fix_trunc ();
2748 extern char *output_float_compare ();
2749 extern char *output_fp_cc0_set ();
2750 extern void save_386_machine_status ();
2751 extern void restore_386_machine_status ();
2752 extern void clear_386_stack_locals ();
2753 extern struct rtx_def *assign_386_stack_local ();
2754 extern int is_mul ();
2755 extern int is_div ();
2756 extern int last_to_set_cc ();
2757 extern int doesnt_set_condition_code ();
2758 extern int sets_condition_code ();
2759 extern int str_immediate_operand ();
2760 extern int is_fp_insn ();
2761 extern int is_fp_dest ();
2762 extern int is_fp_store ();
2763 extern int agi_dependent ();
2764 extern int reg_mentioned_in_mem ();
2765 extern char *output_int_conditional_move ();
2766 extern char *output_fp_conditional_move ();
2767 extern int ix86_can_use_return_insn_p ();
2770 extern struct rtx_def *copy_all_rtx ();
2771 extern void rewrite_address ();
2774 /* Variables in i386.c */
2775 extern char *ix86_cpu_string; /* for -mcpu=<xxx> */
2776 extern char *ix86_arch_string; /* for -march=<xxx> */
2777 extern char *i386_reg_alloc_order; /* register allocation order */
2778 extern char *i386_regparm_string; /* # registers to use to pass args */
2779 extern char *i386_align_loops_string; /* power of two alignment for loops */
2780 extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */
2781 extern char *i386_align_funcs_string; /* power of two alignment for functions */
2782 extern char *i386_branch_cost_string; /* values 1-5: see jump.c */
2783 extern int i386_regparm; /* i386_regparm_string as a number */
2784 extern int i386_align_loops; /* power of two alignment for loops */
2785 extern int i386_align_jumps; /* power of two alignment for non-loop jumps */
2786 extern int i386_align_funcs; /* power of two alignment for functions */
2787 extern int i386_branch_cost; /* values 1-5: see jump.c */
2788 extern char *hi_reg_name[]; /* names for 16 bit regs */
2789 extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
2790 extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
2791 extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
2792 extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
2793 extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
2795 /* External variables used */
2796 extern int optimize; /* optimization level */
2797 extern int obey_regdecls; /* TRUE if stupid register allocation */
2799 /* External functions used */
2800 extern struct rtx_def *force_operand ();
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