1 /* Definitions of target machine for GNU compiler for Intel X86 (386, 486, pentium)
2 Copyright (C) 1988, 1992, 1994 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 /* The purpose of this file is to define the characteristics of the i386,
22 independent of assembler syntax or operating system.
24 Three other files build on this one to describe a specific assembler syntax:
25 bsd386.h, att386.h, and sun386.h.
27 The actual tm.h file for a particular system should include
28 this file, and then the file for the appropriate assembler syntax.
30 Many macros that specify assembler syntax are omitted entirely from
31 this file because they really belong in the files for particular
32 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
33 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
34 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
36 /* Names to predefine in the preprocessor for this target machine. */
40 /* Stubs for half-pic support if not OSF/1 reference platform. */
43 #define HALF_PIC_P() 0
44 #define HALF_PIC_NUMBER_PTRS 0
45 #define HALF_PIC_NUMBER_REFS 0
46 #define HALF_PIC_ENCODE(DECL)
47 #define HALF_PIC_DECLARE(NAME)
48 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
49 #define HALF_PIC_ADDRESS_P(X) 0
50 #define HALF_PIC_PTR(X) X
51 #define HALF_PIC_FINISH(STREAM)
54 /* Run-time compilation parameters selecting different hardware subsets. */
56 extern int target_flags;
58 /* Macros used in the machine description to test the flags. */
60 /* configure can arrage to make this 2, to force a 486. */
61 #ifndef TARGET_CPU_DEFAULT
62 #define TARGET_CPU_DEFAULT 0
65 /* Masks for the -m switches */
66 #define MASK_80387 000000000001 /* Hardware floating point */
67 #define MASK_486 000000000002 /* 80486 specific */
68 #define MASK_NOTUSED 000000000004 /* bit not currently used */
69 #define MASK_RTD 000000000010 /* Use ret that pops args */
70 #define MASK_REGPARM 000000000020 /* Pass args in eax, edx */
71 #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
72 #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
73 #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
74 #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
76 /* Temporary codegen switches */
77 #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
78 #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
79 #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
81 /* Use the floating point instructions */
82 #define TARGET_80387 (target_flags & MASK_80387)
84 /* Compile using ret insn that pops args.
85 This will not work unless you use prototypes at least
86 for all functions that can take varying numbers of args. */
87 #define TARGET_RTD (target_flags & MASK_RTD)
89 /* Compile passing first two args in regs 0 and 1.
90 This exists only to test compiler features that will
91 be needed for RISC chips. It is not usable
92 and is not intended to be usable on this cpu. */
93 #define TARGET_REGPARM (target_flags & MASK_RTD)
95 /* Put uninitialized locals into bss, not data.
96 Meaningful only on svr3. */
97 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
99 /* Use IEEE floating point comparisons. These handle correctly the cases
100 where the result of a comparison is unordered. Normally SIGFPE is
101 generated in such cases, in which case this isn't needed. */
102 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
104 /* Functions that return a floating point value may return that value
105 in the 387 FPU or in 386 integer registers. If set, this flag causes
106 the 387 to be used, which is compatible with most calling conventions. */
107 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
109 /* Disable generation of FP sin, cos and sqrt operations for 387.
110 This is because FreeBSD lacks these in the math-emulator-code */
111 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
113 /* Temporary switches for tuning code generation */
115 /* Disable 32x32->64 bit multiplies that are used for long long multiplies
116 and division by constants, but sometimes cause reload problems. */
117 #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
118 #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
120 /* Debug GO_IF_LEGITIMATE_ADDRESS */
121 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
123 /* Hack macros for tuning code generation */
124 #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
126 /* Specific hardware switches */
127 #define TARGET_486 (target_flags & MASK_486) /* 80486DX, 80486SX, 80486DX[24] */
128 #define TARGET_386 (!TARGET_486) /* 80386 */
130 #define TARGET_SWITCHES \
131 { { "80387", MASK_80387 }, \
132 { "no-80387", -MASK_80387 }, \
133 { "hard-float", MASK_80387 }, \
134 { "soft-float", -MASK_80387 }, \
135 { "no-soft-float", MASK_80387 }, \
136 { "386", -MASK_486 }, \
137 { "no-386", MASK_486 }, \
138 { "486", MASK_486 }, \
139 { "no-486", -MASK_486 }, \
140 { "rtd", MASK_RTD }, \
141 { "no-rtd", -MASK_RTD }, \
142 { "regparm", MASK_REGPARM }, \
143 { "no-regparm", -MASK_REGPARM }, \
144 { "svr3-shlib", MASK_SVR3_SHLIB }, \
145 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
146 { "ieee-fp", MASK_IEEE_FP }, \
147 { "no-ieee-fp", -MASK_IEEE_FP }, \
148 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
149 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
150 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
151 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
152 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
153 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
154 { "debug-addr", MASK_DEBUG_ADDR }, \
155 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
156 { "move", -MASK_NO_MOVE }, \
157 { "no-move", MASK_NO_MOVE }, \
159 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}}
161 /* This macro is similar to `TARGET_SWITCHES' but defines names of
162 command options that have values. Its definition is an
163 initializer with a subgrouping for each command option.
165 Each subgrouping contains a string constant, that defines the
166 fixed part of the option name, and the address of a variable. The
167 variable, type `char *', is set to the variable part of the given
168 option if the fixed part matches. The actual option name is made
169 by appending `-m' to the specified name. */
170 #define TARGET_OPTIONS \
171 { { "reg-alloc=", &i386_reg_alloc_order }, \
174 /* Sometimes certain combinations of command options do not make
175 sense on a particular target machine. You can define a macro
176 `OVERRIDE_OPTIONS' to take account of this. This macro, if
177 defined, is executed once just after all the command options have
180 Don't use this macro to turn on various extra optimizations for
181 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
183 #define OVERRIDE_OPTIONS override_options ()
185 /* These are meant to be redefined in the host dependent files */
186 #define SUBTARGET_SWITCHES
187 #define SUBTARGET_OPTIONS
190 /* target machine storage layout */
192 /* Define for XFmode extended real floating point support.
193 This will automatically cause REAL_ARITHMETIC to be defined. */
194 #define LONG_DOUBLE_TYPE_SIZE 96
196 /* Define if you don't want extended real, but do want to use the
197 software floating point emulator for REAL_ARITHMETIC and
198 decimal <-> binary conversion. */
199 /* #define REAL_ARITHMETIC */
201 /* Define this if most significant byte of a word is the lowest numbered. */
202 /* That is true on the 80386. */
204 #define BITS_BIG_ENDIAN 0
206 /* Define this if most significant byte of a word is the lowest numbered. */
207 /* That is not true on the 80386. */
208 #define BYTES_BIG_ENDIAN 0
210 /* Define this if most significant word of a multiword number is the lowest
212 /* Not true for 80386 */
213 #define WORDS_BIG_ENDIAN 0
215 /* number of bits in an addressable storage unit */
216 #define BITS_PER_UNIT 8
218 /* Width in bits of a "word", which is the contents of a machine register.
219 Note that this is not necessarily the width of data type `int';
220 if using 16-bit ints on a 80386, this would still be 32.
221 But on a machine with 16-bit registers, this would be 16. */
222 #define BITS_PER_WORD 32
224 /* Width of a word, in units (bytes). */
225 #define UNITS_PER_WORD 4
227 /* Width in bits of a pointer.
228 See also the macro `Pmode' defined below. */
229 #define POINTER_SIZE 32
231 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
232 #define PARM_BOUNDARY 32
234 /* Boundary (in *bits*) on which stack pointer should be aligned. */
235 #define STACK_BOUNDARY 32
237 /* Allocation boundary (in *bits*) for the code of a function.
238 For i486, we get better performance by aligning to a cache
239 line (i.e. 16 byte) boundary. */
240 #define FUNCTION_BOUNDARY (TARGET_486 ? 128 : 32)
242 /* Alignment of field after `int : 0' in a structure. */
244 #define EMPTY_FIELD_BOUNDARY 32
246 /* Minimum size in bits of the largest boundary to which any
247 and all fundamental data types supported by the hardware
248 might need to be aligned. No data type wants to be aligned
249 rounder than this. The i386 supports 64-bit floating point
250 quantities, but these can be aligned on any 32-bit boundary. */
251 #define BIGGEST_ALIGNMENT 32
253 /* Set this non-zero if move instructions will actually fail to work
254 when given unaligned data. */
255 #define STRICT_ALIGNMENT 0
257 /* If bit field type is int, don't let it cross an int,
258 and give entire struct the alignment of an int. */
259 /* Required on the 386 since it doesn't have bitfield insns. */
260 #define PCC_BITFIELD_TYPE_MATTERS 1
262 /* Align loop starts for optimal branching. */
263 #define ASM_OUTPUT_LOOP_ALIGN(FILE) \
264 ASM_OUTPUT_ALIGN (FILE, 2)
266 /* This is how to align an instruction for optimal branching.
267 On i486 we'll get better performance by aligning on a
268 cache line (i.e. 16 byte) boundary. */
269 #define ASM_OUTPUT_ALIGN_CODE(FILE) \
270 ASM_OUTPUT_ALIGN ((FILE), (TARGET_486 ? 4 : 2))
272 /* Standard register usage. */
274 /* This processor has special stack-like registers. See reg-stack.c
279 /* Number of actual hardware registers.
280 The hardware registers are assigned numbers for the compiler
281 from 0 to just below FIRST_PSEUDO_REGISTER.
282 All registers that the compiler knows about must be given numbers,
283 even those that are not normally considered general registers.
285 In the 80386 we give the 8 general purpose registers the numbers 0-7.
286 We number the floating point registers 8-15.
287 Note that registers 0-7 can be accessed as a short or int,
288 while only 0-3 may be used with byte `mov' instructions.
290 Reg 16 does not correspond to any hardware register, but instead
291 appears in the RTL as an argument pointer prior to reload, and is
292 eliminated during reloading in favor of either the stack or frame
295 #define FIRST_PSEUDO_REGISTER 17
297 /* 1 for registers that have pervasive standard uses
298 and are not available for the register allocator.
299 On the 80386, the stack pointer is such, as is the arg pointer. */
300 #define FIXED_REGISTERS \
301 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
302 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
304 /* 1 for registers not available across function calls.
305 These must include the FIXED_REGISTERS and also any
306 registers that can be used without being saved.
307 The latter must include the registers where values are returned
308 and the register where structure-value addresses are passed.
309 Aside from that, you can include as many other registers as you like. */
311 #define CALL_USED_REGISTERS \
312 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
313 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
315 /* Order in which to allocate registers. Each register must be
316 listed once, even those in FIXED_REGISTERS. List frame pointer
317 late and fixed registers last. Note that, in general, we prefer
318 registers listed in CALL_USED_REGISTERS, keeping the others
319 available for storage of persistent values.
321 Three different versions of REG_ALLOC_ORDER have been tried:
323 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
324 but slower code on simple functions returning values in eax.
326 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
327 perl 4.036 due to not being able to create a DImode register (to hold a 2
330 If the order is eax, edx, ecx, ... it produces better code for simple
331 functions, and a slightly slower compiler. Users complained about the code
332 generated by allocating edx first, so restore the 'natural' order of things. */
334 #define REG_ALLOC_ORDER \
335 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
336 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
338 /* A C statement (sans semicolon) to choose the order in which to
339 allocate hard registers for pseudo-registers local to a basic
342 Store the desired register order in the array `reg_alloc_order'.
343 Element 0 should be the register to allocate first; element 1, the
344 next register; and so on.
346 The macro body should not assume anything about the contents of
347 `reg_alloc_order' before execution of the macro.
349 On most machines, it is not necessary to define this macro. */
351 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
353 /* Macro to conditionally modify fixed_regs/call_used_regs. */
354 #define CONDITIONAL_REGISTER_USAGE \
358 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
359 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
361 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
365 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
366 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
367 if (TEST_HARD_REG_BIT (x, i)) \
368 fixed_regs[i] = call_used_regs[i] = 1; \
372 /* Return number of consecutive hard regs needed starting at reg REGNO
373 to hold something of mode MODE.
374 This is ordinarily the length in words of a value of mode MODE
375 but can be less for certain modes in special long registers.
377 Actually there are no two word move instructions for consecutive
378 registers. And only registers 0-3 may have mov byte instructions
382 #define HARD_REGNO_NREGS(REGNO, MODE) \
383 (FP_REGNO_P (REGNO) ? 1 \
384 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
386 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
387 On the 80386, the first 4 cpu registers can hold any mode
388 while the floating point registers may hold only floating point.
389 Make it clear that the fp regs could not hold a 16-byte float. */
391 /* The casts to int placate a compiler on a microvax,
392 for cross-compiler testing. */
394 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
397 : FP_REGNO_P (REGNO) \
398 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
399 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
400 && GET_MODE_UNIT_SIZE (MODE) <= 12) \
401 : (int) (MODE) != (int) QImode)
403 /* Value is 1 if it is a good idea to tie two pseudo registers
404 when one has mode MODE1 and one has mode MODE2.
405 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
406 for any hard reg, then this must be 0 for correct output. */
408 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
410 /* A C expression returning the cost of moving data from a register of class
411 CLASS1 to one of CLASS2.
413 On the i386, copying between floating-point and fixed-point
414 registers is expensive. */
416 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
417 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
418 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
421 /* Specify the registers used for certain standard purposes.
422 The values of these macros are register numbers. */
424 /* on the 386 the pc register is %eip, and is not usable as a general
425 register. The ordinary mov instructions won't work */
426 /* #define PC_REGNUM */
428 /* Register to use for pushing function arguments. */
429 #define STACK_POINTER_REGNUM 7
431 /* Base register for access to local variables of the function. */
432 #define FRAME_POINTER_REGNUM 6
434 /* First floating point reg */
435 #define FIRST_FLOAT_REG 8
437 /* First & last stack-like regs */
438 #define FIRST_STACK_REG FIRST_FLOAT_REG
439 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
441 /* Value should be nonzero if functions must have frame pointers.
442 Zero means the frame pointer need not be set up (and parms
443 may be accessed via the stack pointer) in functions that seem suitable.
444 This is computed in `reload', in reload1.c. */
445 #define FRAME_POINTER_REQUIRED 0
447 /* Base register for access to arguments of the function. */
448 #define ARG_POINTER_REGNUM 16
450 /* Register in which static-chain is passed to a function. */
451 #define STATIC_CHAIN_REGNUM 2
453 /* Register to hold the addressing base for position independent
454 code access to data items. */
455 #define PIC_OFFSET_TABLE_REGNUM 3
457 /* Register in which address to store a structure value
458 arrives in the function. On the 386, the prologue
459 copies this from the stack to register %eax. */
460 #define STRUCT_VALUE_INCOMING 0
462 /* Place in which caller passes the structure value address.
463 0 means push the value on the stack like an argument. */
464 #define STRUCT_VALUE 0
466 /* A C expression which can inhibit the returning of certain function
467 values in registers, based on the type of value. A nonzero value
468 says to return the function value in memory, just as large
469 structures are always returned. Here TYPE will be a C expression
470 of type `tree', representing the data type of the value.
472 Note that values of mode `BLKmode' must be explicitly handled by
473 this macro. Also, the option `-fpcc-struct-return' takes effect
474 regardless of this macro. On most systems, it is possible to
475 leave the macro undefined; this causes a default definition to be
476 used, whose value is the constant 1 for `BLKmode' values, and 0
479 Do not use this macro to indicate that structures and unions
480 should always be returned in memory. You should instead use
481 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
483 #define RETURN_IN_MEMORY(TYPE) \
484 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
487 /* Define the classes of registers for register constraints in the
488 machine description. Also define ranges of constants.
490 One of the classes must always be named ALL_REGS and include all hard regs.
491 If there is more than one class, another class must be named NO_REGS
492 and contain no registers.
494 The name GENERAL_REGS must be the name of a class (or an alias for
495 another name such as ALL_REGS). This is the class of registers
496 that is allowed by "g" or "r" in a register constraint.
497 Also, registers outside this class are allocated only when
498 instructions express preferences for them.
500 The classes must be numbered in nondecreasing order; that is,
501 a larger-numbered class must never be contained completely
502 in a smaller-numbered class.
504 For any two classes, it is very desirable that there be another
505 class that represents their union.
507 It might seem that class BREG is unnecessary, since no useful 386
508 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
509 and the "b" register constraint is useful in asms for syscalls. */
514 AREG, DREG, CREG, BREG,
515 AD_REGS, /* %eax/%edx for DImode */
516 Q_REGS, /* %eax %ebx %ecx %edx */
518 INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
519 GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
520 FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
522 ALL_REGS, LIM_REG_CLASSES
525 #define N_REG_CLASSES (int) LIM_REG_CLASSES
527 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
529 /* Give names of register classes as strings for dump file. */
531 #define REG_CLASS_NAMES \
533 "AREG", "DREG", "CREG", "BREG", \
539 "FP_TOP_REG", "FP_SECOND_REG", \
543 /* Define which registers fit in which classes.
544 This is an initializer for a vector of HARD_REG_SET
545 of length N_REG_CLASSES. */
547 #define REG_CLASS_CONTENTS \
549 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
552 0x10, 0x20, /* SIREG, DIREG */ \
553 0x07f, /* INDEX_REGS */ \
554 0x100ff, /* GENERAL_REGS */ \
555 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
556 0xff00, /* FLOAT_REGS */ \
559 /* The same information, inverted:
560 Return the class number of the smallest class containing
561 reg number REGNO. This could be a conditional expression
562 or could index an array. */
564 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
566 /* When defined, the compiler allows registers explicitly used in the
567 rtl to be used as spill registers but prevents the compiler from
568 extending the lifetime of these registers. */
570 #define SMALL_REGISTER_CLASSES
572 #define QI_REG_P(X) \
573 (REG_P (X) && REGNO (X) < 4)
574 #define NON_QI_REG_P(X) \
575 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
577 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
578 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
580 #define STACK_REG_P(xop) (REG_P (xop) && \
581 REGNO (xop) >= FIRST_STACK_REG && \
582 REGNO (xop) <= LAST_STACK_REG)
584 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
586 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
588 /* Try to maintain the accuracy of the death notes for regs satisfying the
589 following. Important for stack like regs, to know when to pop. */
591 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
593 /* 1 if register REGNO can magically overlap other regs.
594 Note that nonzero values work only in very special circumstances. */
596 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
598 /* The class value for index registers, and the one for base regs. */
600 #define INDEX_REG_CLASS INDEX_REGS
601 #define BASE_REG_CLASS GENERAL_REGS
603 /* Get reg_class from a letter such as appears in the machine description. */
605 #define REG_CLASS_FROM_LETTER(C) \
606 ((C) == 'r' ? GENERAL_REGS : \
607 (C) == 'q' ? Q_REGS : \
608 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
611 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
614 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
617 (C) == 'a' ? AREG : \
618 (C) == 'b' ? BREG : \
619 (C) == 'c' ? CREG : \
620 (C) == 'd' ? DREG : \
621 (C) == 'A' ? AD_REGS : \
622 (C) == 'D' ? DIREG : \
623 (C) == 'S' ? SIREG : NO_REGS)
625 /* The letters I, J, K, L and M in a register constraint string
626 can be used to stand for particular ranges of immediate operands.
627 This macro defines what the ranges are.
628 C is the letter, and VALUE is a constant value.
629 Return 1 if VALUE is in the range specified by C.
631 I is for non-DImode shifts.
632 J is for DImode shifts.
633 K and L are for an `andsi' optimization.
634 M is for shifts that can be executed by the "lea" opcode.
637 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
638 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
639 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
640 (C) == 'K' ? (VALUE) == 0xff : \
641 (C) == 'L' ? (VALUE) == 0xffff : \
642 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
645 /* Similar, but for floating constants, and defining letters G and H.
646 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
647 TARGET_387 isn't set, because the stack register converter may need to
648 load 0.0 into the function value register. */
650 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
651 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
653 /* Place additional restrictions on the register class to use when it
654 is necessary to be able to hold a value of mode MODE in a reload
655 register for which class CLASS would ordinarily be used. */
657 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
658 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
661 /* Given an rtx X being reloaded into a reg required to be
662 in class CLASS, return the class of reg to actually use.
663 In general this is just CLASS; but on some machines
664 in some cases it is preferable to use a more restrictive class.
665 On the 80386 series, we prevent floating constants from being
666 reloaded into floating registers (since no move-insn can do that)
667 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
669 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
670 QImode must go into class Q_REGS.
671 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
672 movdf to do mem-to-mem moves through integer regs. */
674 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
675 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
676 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
677 : ((CLASS) == ALL_REGS \
678 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
681 /* If we are copying between general and FP registers, we need a memory
684 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
685 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
686 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
688 /* Return the maximum number of consecutive registers
689 needed to represent mode MODE in a register of class CLASS. */
690 /* On the 80386, this is the size of MODE in words,
691 except in the FP regs, where a single reg is always enough. */
692 #define CLASS_MAX_NREGS(CLASS, MODE) \
693 (FLOAT_CLASS_P (CLASS) ? 1 : \
694 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
696 /* A C expression whose value is nonzero if pseudos that have been
697 assigned to registers of class CLASS would likely be spilled
698 because registers of CLASS are needed for spill registers.
700 The default value of this macro returns 1 if CLASS has exactly one
701 register and zero otherwise. On most machines, this default
702 should be used. Only define this macro to some other expression
703 if pseudo allocated by `local-alloc.c' end up in memory because
704 their hard registers were needed for spill regisers. If this
705 macro returns nonzero for those classes, those pseudos will only
706 be allocated by `global.c', which knows how to reallocate the
707 pseudo to another register. If there would not be another
708 register available for reallocation, you should not change the
709 definition of this macro since the only effect of such a
710 definition would be to slow down register allocation. */
712 #define CLASS_LIKELY_SPILLED_P(CLASS) \
714 || ((CLASS) == DREG) \
715 || ((CLASS) == CREG) \
716 || ((CLASS) == BREG) \
717 || ((CLASS) == AD_REGS) \
718 || ((CLASS) == SIREG) \
719 || ((CLASS) == DIREG))
722 /* Stack layout; function entry, exit and calling. */
724 /* Define this if pushing a word on the stack
725 makes the stack pointer a smaller address. */
726 #define STACK_GROWS_DOWNWARD
728 /* Define this if the nominal address of the stack frame
729 is at the high-address end of the local variables;
730 that is, each additional local variable allocated
731 goes at a more negative offset in the frame. */
732 #define FRAME_GROWS_DOWNWARD
734 /* Offset within stack frame to start allocating local variables at.
735 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
736 first local allocated. Otherwise, it is the offset to the BEGINNING
737 of the first local allocated. */
738 #define STARTING_FRAME_OFFSET 0
740 /* If we generate an insn to push BYTES bytes,
741 this says how many the stack pointer really advances by.
742 On 386 pushw decrements by exactly 2 no matter what the position was.
743 On the 386 there is no pushb; we use pushw instead, and this
744 has the effect of rounding up to 2. */
746 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
748 /* Offset of first parameter from the argument pointer register value. */
749 #define FIRST_PARM_OFFSET(FNDECL) 0
751 /* Value is the number of bytes of arguments automatically
752 popped when returning from a subroutine call.
753 FUNTYPE is the data type of the function (as a tree),
754 or for a library call it is an identifier node for the subroutine name.
755 SIZE is the number of bytes of arguments passed on the stack.
757 On the 80386, the RTD insn may be used to pop them if the number
758 of args is fixed, but if the number is variable then the caller
759 must pop them all. RTD can't be used for library calls now
760 because the library is compiled with the Unix compiler.
761 Use of RTD is a selectable option, since it is incompatible with
762 standard Unix calling sequences. If the option is not selected,
763 the caller must always pop the args. */
765 #define RETURN_POPS_ARGS(FUNTYPE,SIZE) \
766 (TREE_CODE (FUNTYPE) == IDENTIFIER_NODE ? 0 \
768 && (TYPE_ARG_TYPES (FUNTYPE) == 0 \
769 || (TREE_VALUE (tree_last (TYPE_ARG_TYPES (FUNTYPE))) \
770 == void_type_node))) ? (SIZE) \
771 : (aggregate_value_p (TREE_TYPE (FUNTYPE))) ? GET_MODE_SIZE (Pmode) : 0)
773 /* Define how to find the value returned by a function.
774 VALTYPE is the data type of the value (as a tree).
775 If the precise function being called is known, FUNC is its FUNCTION_DECL;
776 otherwise, FUNC is 0. */
777 #define FUNCTION_VALUE(VALTYPE, FUNC) \
778 gen_rtx (REG, TYPE_MODE (VALTYPE), \
779 VALUE_REGNO (TYPE_MODE (VALTYPE)))
781 /* Define how to find the value returned by a library function
782 assuming the value has mode MODE. */
784 #define LIBCALL_VALUE(MODE) \
785 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
787 /* Define the size of the result block used for communication between
788 untyped_call and untyped_return. The block contains a DImode value
789 followed by the block used by fnsave and frstor. */
791 #define APPLY_RESULT_SIZE (8+108)
793 /* 1 if N is a possible register number for function argument passing.
794 On the 80386, no registers are used in this way.
795 *NOTE* -mregparm does not work.
796 It exists only to test register calling conventions. */
798 #define FUNCTION_ARG_REGNO_P(N) 0
800 /* Define a data type for recording info about an argument list
801 during the scan of that argument list. This data type should
802 hold all necessary information about the function itself
803 and about the args processed so far, enough to enable macros
804 such as FUNCTION_ARG to determine where the next arg should go.
806 On the 80386, this is a single integer, which is a number of bytes
807 of arguments scanned so far. */
809 #define CUMULATIVE_ARGS int
811 /* Initialize a variable CUM of type CUMULATIVE_ARGS
812 for a call to a function whose data type is FNTYPE.
813 For a library call, FNTYPE is 0.
815 On the 80386, the offset starts at 0. */
817 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
820 /* Update the data in CUM to advance over an argument
821 of mode MODE and data type TYPE.
822 (TYPE is null for libcalls where that information may not be available.) */
824 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
825 ((CUM) += ((MODE) != BLKmode \
826 ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
827 : (int_size_in_bytes (TYPE) + 3) & ~3))
829 /* Define where to put the arguments to a function.
830 Value is zero to push the argument on the stack,
831 or a hard register in which to store the argument.
833 MODE is the argument's machine mode.
834 TYPE is the data type of the argument (as a tree).
835 This is null for libcalls where that information may
837 CUM is a variable of type CUMULATIVE_ARGS which gives info about
838 the preceding args and about the function being called.
839 NAMED is nonzero if this argument is a named parameter
840 (otherwise it is an extra parameter matching an ellipsis). */
843 /* On the 80386 all args are pushed, except if -mregparm is specified
844 then the first two words of arguments are passed in EAX, EDX.
845 *NOTE* -mregparm does not work.
846 It exists only to test register calling conventions. */
848 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
849 ((TARGET_REGPARM && (CUM) < 8) ? gen_rtx (REG, (MODE), (CUM) / 4) : 0)
851 /* For an arg passed partly in registers and partly in memory,
852 this is the number of registers used.
853 For args passed entirely in registers or entirely in memory, zero. */
856 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
857 ((TARGET_REGPARM && (CUM) < 8 \
858 && 8 < ((CUM) + ((MODE) == BLKmode \
859 ? int_size_in_bytes (TYPE) \
860 : GET_MODE_SIZE (MODE)))) \
863 /* This macro generates the assembly code for function entry.
864 FILE is a stdio stream to output the code to.
865 SIZE is an int: how many units of temporary storage to allocate.
866 Refer to the array `regs_ever_live' to determine which registers
867 to save; `regs_ever_live[I]' is nonzero if register number I
868 is ever used in the function. This macro is responsible for
869 knowing which registers should not be saved even if used. */
871 #define FUNCTION_PROLOGUE(FILE, SIZE) \
872 function_prologue (FILE, SIZE)
874 /* Output assembler code to FILE to increment profiler label # LABELNO
875 for profiling a function entry. */
877 #define FUNCTION_PROFILER(FILE, LABELNO) \
881 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
882 LPREFIX, (LABELNO)); \
883 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
887 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
888 fprintf (FILE, "\tcall _mcount\n"); \
892 /* A C statement or compound statement to output to FILE some
893 assembler code to initialize basic-block profiling for the current
894 object module. This code should call the subroutine
895 `__bb_init_func' once per object module, passing it as its sole
896 argument the address of a block allocated in the object module.
898 The name of the block is a local symbol made with this statement:
900 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
902 Of course, since you are writing the definition of
903 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
904 can take a short cut in the definition of this macro and use the
905 name that you know will result.
907 The first word of this block is a flag which will be nonzero if the
908 object module has already been initialized. So test this word
909 first, and do not call `__bb_init_func' if the flag is nonzero. */
911 #undef FUNCTION_BLOCK_PROFILER
912 #define FUNCTION_BLOCK_PROFILER(STREAM, LABELNO) \
915 static int num_func = 0; \
917 char block_table[80], false_label[80]; \
919 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
920 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
922 xops[0] = const0_rtx; \
923 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
924 xops[2] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, false_label)); \
925 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_func")); \
926 xops[4] = gen_rtx (MEM, Pmode, xops[1]); \
927 xops[5] = stack_pointer_rtx; \
928 xops[6] = GEN_INT (4); \
929 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
931 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
932 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
934 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
935 output_asm_insn (AS1(jne,%2), xops); \
938 output_asm_insn (AS1(push%L1,%1), xops); \
941 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
942 output_asm_insn (AS1 (push%L7,%7), xops); \
945 output_asm_insn (AS1(call,%P3), xops); \
946 output_asm_insn (AS2(add%L0,%6,%5), xops); \
947 ASM_OUTPUT_INTERNAL_LABEL (STREAM, "LPBZ", num_func); \
953 /* A C statement or compound statement to increment the count
954 associated with the basic block number BLOCKNO. Basic blocks are
955 numbered separately from zero within each compilation. The count
956 associated with block number BLOCKNO is at index BLOCKNO in a
957 vector of words; the name of this array is a local symbol made
960 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
962 Of course, since you are writing the definition of
963 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
964 can take a short cut in the definition of this macro and use the
965 name that you know will result. */
967 #define BLOCK_PROFILER(STREAM, BLOCKNO) \
970 rtx xops[1], cnt_rtx; \
973 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
974 cnt_rtx = gen_rtx (SYMBOL_REF, VOIDmode, counts); \
975 CONSTANT_POOL_ADDRESS_P (cnt_rtx) = TRUE; \
977 xops[0] = gen_rtx (MEM, SImode, plus_constant (cnt_rtx, (BLOCKNO)*4)); \
978 output_asm_insn (AS1(inc%L0,%0), xops); \
982 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
983 the stack pointer does not matter. The value is tested only in
984 functions that have frame pointers.
985 No definition is equivalent to always zero. */
986 /* Note on the 386 it might be more efficient not to define this since
987 we have to restore it ourselves from the frame pointer, in order to
990 #define EXIT_IGNORE_STACK 1
992 /* This macro generates the assembly code for function exit,
993 on machines that need it. If FUNCTION_EPILOGUE is not defined
994 then individual return instructions are generated for each
995 return statement. Args are same as for FUNCTION_PROLOGUE.
997 The function epilogue should not depend on the current stack pointer!
998 It should use the frame pointer only. This is mandatory because
999 of alloca; we also take advantage of it to omit stack adjustments
1002 If the last non-note insn in the function is a BARRIER, then there
1003 is no need to emit a function prologue, because control does not fall
1004 off the end. This happens if the function ends in an "exit" call, or
1005 if a `return' insn is emitted directly into the function. */
1007 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1009 rtx last = get_last_insn (); \
1010 if (last && GET_CODE (last) == NOTE) \
1011 last = prev_nonnote_insn (last); \
1012 if (! last || GET_CODE (last) != BARRIER) \
1013 function_epilogue (FILE, SIZE); \
1016 /* Output assembler code for a block containing the constant parts
1017 of a trampoline, leaving space for the variable parts. */
1019 /* On the 386, the trampoline contains three instructions:
1023 #define TRAMPOLINE_TEMPLATE(FILE) \
1025 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
1026 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1027 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1028 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
1029 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1030 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1031 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
1032 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
1035 /* Length in units of the trampoline for entering a nested function. */
1037 #define TRAMPOLINE_SIZE 12
1039 /* Emit RTL insns to initialize the variable parts of a trampoline.
1040 FNADDR is an RTX for the address of the function's pure code.
1041 CXT is an RTX for the static chain value for the function. */
1043 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1045 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
1046 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
1049 /* Definitions for register eliminations.
1051 This is an array of structures. Each structure initializes one pair
1052 of eliminable registers. The "from" register number is given first,
1053 followed by "to". Eliminations of the same "from" register are listed
1054 in order of preference.
1056 We have two registers that can be eliminated on the i386. First, the
1057 frame pointer register can often be eliminated in favor of the stack
1058 pointer register. Secondly, the argument pointer register can always be
1059 eliminated; it is replaced with either the stack or frame pointer. */
1061 #define ELIMINABLE_REGS \
1062 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1063 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1064 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1066 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1067 Frame pointer elimination is automatically handled.
1069 For the i386, if frame pointer elimination is being done, we would like to
1070 convert ap into sp, not fp.
1072 All other eliminations are valid. */
1074 #define CAN_ELIMINATE(FROM, TO) \
1075 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1076 ? ! frame_pointer_needed \
1079 /* Define the offset between two registers, one to be eliminated, and the other
1080 its replacement, at the start of a routine. */
1082 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1084 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1085 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1091 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1092 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
1093 || (current_function_uses_pic_offset_table \
1094 && regno == PIC_OFFSET_TABLE_REGNUM)) \
1097 (OFFSET) = offset + get_frame_size (); \
1099 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1100 (OFFSET) += 4; /* Skip saved PC */ \
1104 /* Addressing modes, and classification of registers for them. */
1106 /* #define HAVE_POST_INCREMENT */
1107 /* #define HAVE_POST_DECREMENT */
1109 /* #define HAVE_PRE_DECREMENT */
1110 /* #define HAVE_PRE_INCREMENT */
1112 /* Macros to check register numbers against specific register classes. */
1114 /* These assume that REGNO is a hard or pseudo reg number.
1115 They give nonzero only if REGNO is a hard reg of the suitable class
1116 or a pseudo reg currently allocated to a suitable hard reg.
1117 Since they use reg_renumber, they are safe only once reg_renumber
1118 has been allocated, which happens in local-alloc.c. */
1120 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1121 ((REGNO) < STACK_POINTER_REGNUM \
1122 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1124 #define REGNO_OK_FOR_BASE_P(REGNO) \
1125 ((REGNO) <= STACK_POINTER_REGNUM \
1126 || (REGNO) == ARG_POINTER_REGNUM \
1127 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1129 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1130 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1132 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1133 and check its validity for a certain class.
1134 We have two alternate definitions for each of them.
1135 The usual definition accepts all pseudo regs; the other rejects
1136 them unless they have been allocated suitable hard regs.
1137 The symbol REG_OK_STRICT causes the latter definition to be used.
1139 Most source files want to accept pseudo regs in the hope that
1140 they will get allocated to the class that the insn wants them to be in.
1141 Source files for reload pass need to be strict.
1142 After reload, it makes no difference, since pseudo regs have
1143 been eliminated by then. */
1146 /* Non strict versions, pseudos are ok */
1147 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1148 (REGNO (X) < STACK_POINTER_REGNUM \
1149 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1151 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1152 (REGNO (X) <= STACK_POINTER_REGNUM \
1153 || REGNO (X) == ARG_POINTER_REGNUM \
1154 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1156 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1157 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1159 /* Strict versions, hard registers only */
1160 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1161 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1162 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1163 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1165 #ifndef REG_OK_STRICT
1166 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1167 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1168 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1171 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1172 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1173 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1176 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1177 that is a valid memory address for an instruction.
1178 The MODE argument is the machine mode for the MEM expression
1179 that wants to use this address.
1181 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1182 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1184 See legitimize_pic_address in i386.c for details as to what
1185 constitutes a legitimate address when -fpic is used. */
1187 #define MAX_REGS_PER_ADDRESS 2
1189 #define CONSTANT_ADDRESS_P(X) \
1190 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1191 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1192 || GET_CODE (X) == HIGH)
1194 /* Nonzero if the constant value X is a legitimate general operand.
1195 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1197 #define LEGITIMATE_CONSTANT_P(X) 1
1199 #ifdef REG_OK_STRICT
1200 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1202 if (legitimate_address_p (MODE, X, 1)) \
1207 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1209 if (legitimate_address_p (MODE, X, 0)) \
1215 /* Try machine-dependent ways of modifying an illegitimate address
1216 to be legitimate. If we find one, return the new, valid address.
1217 This macro is used in only one place: `memory_address' in explow.c.
1219 OLDX is the address as it was before break_out_memory_refs was called.
1220 In some cases it is useful to look at this to decide what needs to be done.
1222 MODE and WIN are passed so that this macro can use
1223 GO_IF_LEGITIMATE_ADDRESS.
1225 It is always safe for this macro to do nothing. It exists to recognize
1226 opportunities to optimize the output.
1228 For the 80386, we handle X+REG by loading X into a register R and
1229 using R+REG. R will go in a general reg and indexing will be used.
1230 However, if REG is a broken-out memory address or multiplication,
1231 nothing needs to be done because REG can certainly go in a general reg.
1233 When -fpic is used, special handling is needed for symbolic references.
1234 See comments by legitimize_pic_address in i386.c for details. */
1236 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1239 (X) = legitimize_address (X, OLDX, MODE); \
1240 if (memory_address_p (MODE, X)) \
1244 /* Nonzero if the constant value X is a legitimate general operand
1245 when generating PIC code. It is given that flag_pic is on and
1246 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1248 #define LEGITIMATE_PIC_OPERAND_P(X) \
1249 (! SYMBOLIC_CONST (X) \
1250 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1252 #define SYMBOLIC_CONST(X) \
1253 (GET_CODE (X) == SYMBOL_REF \
1254 || GET_CODE (X) == LABEL_REF \
1255 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1257 /* Go to LABEL if ADDR (a legitimate address expression)
1258 has an effect that depends on the machine mode it is used for.
1259 On the 80386, only postdecrement and postincrement address depend thus
1260 (the amount of decrement or increment being the length of the operand). */
1261 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1262 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1264 /* Define this macro if references to a symbol must be treated
1265 differently depending on something about the variable or
1266 function named by the symbol (such as what section it is in).
1268 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1269 so that we may access it directly in the GOT. */
1271 #define ENCODE_SECTION_INFO(DECL) \
1276 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1277 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1278 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1279 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1280 || ! TREE_PUBLIC (DECL)); \
1285 /* Initialize data used by insn expanders. This is called from
1286 init_emit, once for each function, before code is generated.
1287 For 386, clear stack slot assignments remembered from previous
1290 #define INIT_EXPANDERS clear_386_stack_locals ()
1292 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1293 codes once the function is being compiled into assembly code, but
1294 not before. (It is not done before, because in the case of
1295 compiling an inline function, it would lead to multiple PIC
1296 prologues being included in functions which used inline functions
1297 and were compiled to assembly language.) */
1299 #define FINALIZE_PIC \
1302 extern int current_function_uses_pic_offset_table; \
1304 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1309 /* Specify the machine mode that this machine uses
1310 for the index in the tablejump instruction. */
1311 #define CASE_VECTOR_MODE Pmode
1313 /* Define this if the tablejump instruction expects the table
1314 to contain offsets from the address of the table.
1315 Do not define this if the table should contain absolute addresses. */
1316 /* #define CASE_VECTOR_PC_RELATIVE */
1318 /* Specify the tree operation to be used to convert reals to integers.
1319 This should be changed to take advantage of fist --wfs ??
1321 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1323 /* This is the kind of divide that is easiest to do in the general case. */
1324 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1326 /* Define this as 1 if `char' should by default be signed; else as 0. */
1327 #define DEFAULT_SIGNED_CHAR 1
1329 /* Max number of bytes we can move from memory to memory
1330 in one reasonably fast instruction. */
1333 /* MOVE_RATIO is the number of move instructions that is better than a
1334 block move. Make this large on i386, since the block move is very
1335 inefficient with small blocks, and the hard register needs of the
1336 block move require much reload work. */
1337 #define MOVE_RATIO 5
1339 /* Define this if zero-extension is slow (more than one real instruction). */
1340 /* #define SLOW_ZERO_EXTEND */
1342 /* Nonzero if access to memory by bytes is slow and undesirable. */
1343 #define SLOW_BYTE_ACCESS 0
1345 /* Define if shifts truncate the shift count
1346 which implies one can omit a sign-extension or zero-extension
1347 of a shift count. */
1348 /* One i386, shifts do truncate the count. But bit opcodes don't. */
1350 /* #define SHIFT_COUNT_TRUNCATED */
1352 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1353 is done just by pretending it is already truncated. */
1354 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1356 /* We assume that the store-condition-codes instructions store 0 for false
1357 and some other value for true. This is the value stored for true. */
1359 #define STORE_FLAG_VALUE 1
1361 /* When a prototype says `char' or `short', really pass an `int'.
1362 (The 386 can't easily push less than an int.) */
1364 #define PROMOTE_PROTOTYPES
1366 /* Specify the machine mode that pointers have.
1367 After generation of rtl, the compiler makes no further distinction
1368 between pointers and any other objects of this machine mode. */
1369 #define Pmode SImode
1371 /* A function address in a call instruction
1372 is a byte address (for indexing purposes)
1373 so give the MEM rtx a byte's mode. */
1374 #define FUNCTION_MODE QImode
1376 /* Define this if addresses of constant functions
1377 shouldn't be put through pseudo regs where they can be cse'd.
1378 Desirable on the 386 because a CALL with a constant address is
1379 not much slower than one with a register address. */
1380 #define NO_FUNCTION_CSE
1382 /* Provide the costs of a rtl expression. This is in the body of a
1385 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1387 return COSTS_N_INSNS (10); \
1392 return COSTS_N_INSNS (40); \
1394 if (GET_CODE (XEXP (X, 0)) == REG \
1395 && GET_CODE (XEXP (X, 1)) == CONST_INT) \
1400 /* Compute the cost of computing a constant rtl expression RTX
1401 whose rtx-code is CODE. The body of this macro is a portion
1402 of a switch statement. If the code is computed here,
1403 return it with a return statement. Otherwise, break from the switch. */
1405 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1410 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1411 case CONST_DOUBLE: \
1414 if (GET_MODE (RTX) == VOIDmode) \
1416 code = standard_80387_constant_p (RTX); \
1417 return code == 1 ? 0 : \
1422 /* Compute the cost of an address. This is meant to approximate the size
1423 and/or execution delay of an insn using that address. If the cost is
1424 approximated by the RTL complexity, including CONST_COSTS above, as
1425 is usually the case for CISC machines, this macro should not be defined.
1426 For aggressively RISCy machines, only one insn format is allowed, so
1427 this macro should be a constant. The value of this macro only matters
1428 for valid addresses.
1430 For i386, it is better to use a complex address than let gcc copy
1431 the address into a reg and make a new pseudo. But not if the address
1432 requires to two regs - that would mean more pseudos with longer
1435 #define ADDRESS_COST(RTX) \
1436 ((CONSTANT_P (RTX) \
1437 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1438 && REG_P (XEXP (RTX, 0)))) ? 0 \
1442 /* Add any extra modes needed to represent the condition code.
1444 For the i386, we need separate modes when floating-point equality
1445 comparisons are being done. */
1447 #define EXTRA_CC_MODES CCFPEQmode
1449 /* Define the names for the modes specified above. */
1450 #define EXTRA_CC_NAMES "CCFPEQ"
1452 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1453 return the mode to be used for the comparison.
1455 For floating-point equality comparisons, CCFPEQmode should be used.
1456 VOIDmode should be used in all other cases. */
1458 #define SELECT_CC_MODE(OP,X,Y) \
1459 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1460 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
1462 /* Define the information needed to generate branch and scc insns. This is
1463 stored from the compare operation. Note that we can't use "rtx" here
1464 since it hasn't been defined! */
1466 extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
1468 /* Tell final.c how to eliminate redundant test instructions. */
1470 /* Here we define machine-dependent flags and fields in cc_status
1471 (see `conditions.h'). */
1473 /* Set if the cc value is actually in the 80387, so a floating point
1474 conditional branch must be output. */
1475 #define CC_IN_80387 04000
1477 /* Set if the CC value was stored in a nonstandard way, so that
1478 the state of equality is indicated by zero in the carry bit. */
1479 #define CC_Z_IN_NOT_C 010000
1481 /* Store in cc_status the expressions
1482 that the condition codes will describe
1483 after execution of an instruction whose pattern is EXP.
1484 Do not alter them if the instruction would not alter the cc's. */
1486 #define NOTICE_UPDATE_CC(EXP, INSN) \
1487 notice_update_cc((EXP))
1489 /* Output a signed jump insn. Use template NORMAL ordinarily, or
1490 FLOAT following a floating point comparison.
1491 Use NO_OV following an arithmetic insn that set the cc's
1492 before a test insn that was deleted.
1493 NO_OV may be zero, meaning final should reinsert the test insn
1494 because the jump cannot be handled properly without it. */
1496 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1498 if (cc_prev_status.flags & CC_IN_80387) \
1500 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1505 /* Control the assembler format that we output, to the extent
1506 this does not vary between assemblers. */
1508 /* How to refer to registers in assembler output.
1509 This sequence is indexed by compiler's hard-register-number (see above). */
1511 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
1512 For non floating point regs, the following are the HImode names.
1514 For float regs, the stack top is sometimes referred to as "%st(0)"
1515 instead of just "%st". PRINT_REG handles this with the "y" code. */
1517 #define HI_REGISTER_NAMES \
1518 {"ax","dx","cx","bx","si","di","bp","sp", \
1519 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1521 #define REGISTER_NAMES HI_REGISTER_NAMES
1523 /* Table of additional register names to use in user input. */
1525 #define ADDITIONAL_REGISTER_NAMES \
1526 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1527 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1528 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1529 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
1531 /* Note we are omitting these since currently I don't know how
1532 to get gcc to use these, since they want the same but different
1533 number as al, and ax.
1536 /* note the last four are not really qi_registers, but
1537 the md will have to never output movb into one of them
1538 only a movw . There is no movb into the last four regs */
1540 #define QI_REGISTER_NAMES \
1541 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
1543 /* These parallel the array above, and can be used to access bits 8:15
1544 of regs 0 through 3. */
1546 #define QI_HIGH_REGISTER_NAMES \
1547 {"ah", "dh", "ch", "bh", }
1549 /* How to renumber registers for dbx and gdb. */
1551 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
1552 #define DBX_REGISTER_NUMBER(n) \
1563 /* This is how to output the definition of a user-level label named NAME,
1564 such as the label on a static function or variable NAME. */
1566 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1567 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1569 /* This is how to output an assembler line defining a `double' constant. */
1571 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1573 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
1574 if (sizeof (int) == sizeof (long)) \
1575 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, l[0], l[1]); \
1577 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
1580 /* This is how to output a `long double' extended real constant. */
1582 #undef ASM_OUTPUT_LONG_DOUBLE
1583 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
1585 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
1586 if (sizeof (int) == sizeof (long)) \
1587 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, l[0], l[1], l[2]); \
1589 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
1592 /* This is how to output an assembler line defining a `float' constant. */
1594 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1596 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1597 if (sizeof (int) == sizeof (long)) \
1598 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, l); \
1600 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
1603 /* Store in OUTPUT a string (made with alloca) containing
1604 an assembler-name for a local static variable named NAME.
1605 LABELNO is an integer which is different for each call. */
1607 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1608 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1609 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1613 /* This is how to output an assembler line defining an `int' constant. */
1615 #define ASM_OUTPUT_INT(FILE,VALUE) \
1616 ( fprintf (FILE, "%s ", ASM_LONG), \
1617 output_addr_const (FILE,(VALUE)), \
1620 /* Likewise for `char' and `short' constants. */
1621 /* is this supposed to do align too?? */
1623 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1624 ( fprintf (FILE, "%s ", ASM_SHORT), \
1625 output_addr_const (FILE,(VALUE)), \
1629 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
1630 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1631 output_addr_const (FILE,(VALUE)), \
1632 fputs (",", FILE), \
1633 output_addr_const (FILE,(VALUE)), \
1634 fputs (" >> 8\n",FILE))
1638 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1639 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1640 output_addr_const (FILE, (VALUE)), \
1643 /* This is how to output an assembler line for a numeric constant byte. */
1645 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1646 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1648 /* This is how to output an insn to push a register on the stack.
1649 It need not be very fast code. */
1651 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1652 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1654 /* This is how to output an insn to pop a register from the stack.
1655 It need not be very fast code. */
1657 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1658 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1660 /* This is how to output an element of a case-vector that is absolute.
1663 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1664 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1666 /* This is how to output an element of a case-vector that is relative.
1667 We don't use these on the 386 yet, because the ATT assembler can't do
1668 forward reference the differences.
1671 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1672 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1674 /* Define the parentheses used to group arithmetic operations
1675 in assembler code. */
1677 #define ASM_OPEN_PAREN ""
1678 #define ASM_CLOSE_PAREN ""
1680 /* Define results of standard character escape sequences. */
1681 #define TARGET_BELL 007
1682 #define TARGET_BS 010
1683 #define TARGET_TAB 011
1684 #define TARGET_NEWLINE 012
1685 #define TARGET_VT 013
1686 #define TARGET_FF 014
1687 #define TARGET_CR 015
1689 /* Print operand X (an rtx) in assembler syntax to file FILE.
1690 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1691 The CODE z takes the size of operand from the following digit, and
1692 outputs b,w,or l respectively.
1694 On the 80386, we use several such letters:
1695 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1696 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
1697 R -- print the prefix for register names.
1698 z -- print the opcode suffix for the size of the current operand.
1699 * -- print a star (in certain assembler syntax)
1700 w -- print the operand as if it's a "word" (HImode) even if it isn't.
1701 b -- print the operand as if it's a byte (QImode) even if it isn't.
1702 c -- don't print special prefixes before constant operands. */
1704 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1707 /* Print the name of a register based on its machine mode and number.
1708 If CODE is 'w', pretend the mode is HImode.
1709 If CODE is 'b', pretend the mode is QImode.
1710 If CODE is 'k', pretend the mode is SImode.
1711 If CODE is 'h', pretend the reg is the `high' byte register.
1712 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
1714 extern char *hi_reg_name[];
1715 extern char *qi_reg_name[];
1716 extern char *qi_high_reg_name[];
1718 #define PRINT_REG(X, CODE, FILE) \
1719 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
1721 fprintf (FILE, "%s", RP); \
1722 switch ((CODE == 'w' ? 2 \
1727 : GET_MODE_SIZE (GET_MODE (X)))) \
1730 if (STACK_TOP_P (X)) \
1732 fputs ("st(0)", FILE); \
1738 if (! FP_REG_P (X)) fputs ("e", FILE); \
1740 fputs (hi_reg_name[REGNO (X)], FILE); \
1743 fputs (qi_reg_name[REGNO (X)], FILE); \
1746 fputs (qi_high_reg_name[REGNO (X)], FILE); \
1751 #define PRINT_OPERAND(FILE, X, CODE) \
1752 print_operand (FILE, X, CODE)
1754 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1755 print_operand_address (FILE, ADDR)
1757 /* Print the name of a register for based on its machine mode and number.
1758 This macro is used to print debugging output.
1759 This macro is different from PRINT_REG in that it may be used in
1760 programs that are not linked with aux-output.o. */
1762 #define DEBUG_PRINT_REG(X, CODE, FILE) \
1763 do { static char *hi_name[] = HI_REGISTER_NAMES; \
1764 static char *qi_name[] = QI_REGISTER_NAMES; \
1765 fprintf (FILE, "%d %s", REGNO (X), RP); \
1766 if (REGNO (X) == ARG_POINTER_REGNUM) \
1767 { fputs ("argp", FILE); break; } \
1768 if (STACK_TOP_P (X)) \
1769 { fputs ("st(0)", FILE); break; } \
1771 { fputs (hi_name[REGNO(X)], FILE); break; } \
1772 switch (GET_MODE_SIZE (GET_MODE (X))) \
1775 fputs ("e", FILE); \
1777 fputs (hi_name[REGNO (X)], FILE); \
1780 fputs (qi_name[REGNO (X)], FILE); \
1785 /* Output the prefix for an immediate operand, or for an offset operand. */
1786 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
1787 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
1789 /* Routines in libgcc that return floats must return them in an fp reg,
1790 just as other functions do which return such values.
1791 These macros make that happen. */
1793 #define FLOAT_VALUE_TYPE float
1794 #define INTIFY(FLOATVAL) FLOATVAL
1796 /* Nonzero if INSN magically clobbers register REGNO. */
1798 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1799 (FP_REGNO_P (REGNO) \
1800 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1803 /* a letter which is not needed by the normal asm syntax, which
1804 we can use for operand syntax in the extended asm */
1806 #define ASM_OPERAND_LETTER '#'
1808 #define RET return ""
1809 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
1811 /* Functions in i386.c */
1812 extern void override_options ();
1813 extern void order_regs_for_local_alloc ();
1814 extern void output_op_from_reg ();
1815 extern void output_to_reg ();
1816 extern char *singlemove_string ();
1817 extern char *output_move_double ();
1818 extern char *output_move_memory ();
1819 extern char *output_move_pushmem ();
1820 extern int standard_80387_constant_p ();
1821 extern char *output_move_const_single ();
1822 extern int symbolic_operand ();
1823 extern int call_insn_operand ();
1824 extern int expander_call_insn_operand ();
1825 extern int symbolic_reference_mentioned_p ();
1826 extern void emit_pic_move ();
1827 extern void function_prologue ();
1828 extern int simple_386_epilogue ();
1829 extern void function_epilogue ();
1830 extern int legitimate_address_p ();
1831 extern struct rtx_def *legitimize_pic_address ();
1832 extern struct rtx_def *legitimize_address ();
1833 extern void print_operand ();
1834 extern void print_operand_address ();
1835 extern void notice_update_cc ();
1836 extern void split_di ();
1837 extern int binary_387_op ();
1838 extern int shift_op ();
1839 extern int VOIDmode_compare_op ();
1840 extern char *output_387_binary_op ();
1841 extern char *output_fix_trunc ();
1842 extern char *output_float_compare ();
1843 extern char *output_fp_cc0_set ();
1844 extern void save_386_machine_status ();
1845 extern void restore_386_machine_status ();
1846 extern void clear_386_stack_locals ();
1847 extern struct rtx_def *assign_386_stack_local ();
1849 /* Variables in i386.c */
1850 extern char *i386_reg_alloc_order; /* register allocation order */
1851 extern char *hi_reg_name[]; /* names for 16 bit regs */
1852 extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
1853 extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
1854 extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
1855 extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
1856 extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
1858 /* External variables used */
1859 extern int optimize; /* optimization level */
1860 extern int obey_regdecls; /* TRUE if stupid register allocation */
1862 /* External functions used */
1863 extern struct rtx_def *force_operand ();