1 /* Definitions of target machine for GNU compiler for Intel X86
3 Copyright (C) 1988, 92, 94, 95, 96, 1997 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* The purpose of this file is to define the characteristics of the i386,
23 independent of assembler syntax or operating system.
25 Three other files build on this one to describe a specific assembler syntax:
26 bsd386.h, att386.h, and sun386.h.
28 The actual tm.h file for a particular system should include
29 this file, and then the file for the appropriate assembler syntax.
31 Many macros that specify assembler syntax are omitted entirely from
32 this file because they really belong in the files for particular
33 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
34 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
35 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
37 /* Names to predefine in the preprocessor for this target machine. */
41 /* Stubs for half-pic support if not OSF/1 reference platform. */
44 #define HALF_PIC_P() 0
45 #define HALF_PIC_NUMBER_PTRS 0
46 #define HALF_PIC_NUMBER_REFS 0
47 #define HALF_PIC_ENCODE(DECL)
48 #define HALF_PIC_DECLARE(NAME)
49 #define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
50 #define HALF_PIC_ADDRESS_P(X) 0
51 #define HALF_PIC_PTR(X) X
52 #define HALF_PIC_FINISH(STREAM)
55 /* Define the specific costs for a given cpu */
57 struct processor_costs {
58 int add; /* cost of an add instruction */
59 int lea; /* cost of a lea instruction */
60 int shift_var; /* variable shift costs */
61 int shift_const; /* constant shift costs */
62 int mult_init; /* cost of starting a multiply */
63 int mult_bit; /* cost of multiply per each bit set */
64 int divide; /* cost of a divide/mod */
67 extern struct processor_costs *ix86_cost;
69 /* Run-time compilation parameters selecting different hardware subsets. */
71 extern int target_flags;
73 /* Macros used in the machine description to test the flags. */
75 /* configure can arrange to make this 2, to force a 486. */
76 #ifndef TARGET_CPU_DEFAULT
77 #define TARGET_CPU_DEFAULT 0
80 /* Masks for the -m switches */
81 #define MASK_80387 000000000001 /* Hardware floating point */
82 #define MASK_NOTUSED1 000000000002 /* bit not currently used */
83 #define MASK_NOTUSED2 000000000004 /* bit not currently used */
84 #define MASK_RTD 000000000010 /* Use ret that pops args */
85 #define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
86 #define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
87 #define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
88 #define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
89 #define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
90 #define MASK_OMIT_LEAF_FRAME_POINTER 0x00000800 /* omit leaf frame pointers */
91 /* Temporary codegen switches */
92 #define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
93 #define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
94 #define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
95 #define MASK_NO_PSEUDO 000010000000 /* Move op's args -> pseudos */
96 #define MASK_DEBUG_ARG 000020000000 /* Debug function_arg */
97 #define MASK_SCHEDULE_PROLOGUE 000040000000 /* Emit prologue as rtl */
98 #define MASK_STACK_PROBE 000100000000 /* Enable stack probing */
100 /* Use the floating point instructions */
101 #define TARGET_80387 (target_flags & MASK_80387)
103 /* Compile using ret insn that pops args.
104 This will not work unless you use prototypes at least
105 for all functions that can take varying numbers of args. */
106 #define TARGET_RTD (target_flags & MASK_RTD)
108 /* Align doubles to a two word boundary. This breaks compatibility with
109 the published ABI's for structures containing doubles, but produces
110 faster code on the pentium. */
111 #define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
113 /* Put uninitialized locals into bss, not data.
114 Meaningful only on svr3. */
115 #define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
117 /* Use IEEE floating point comparisons. These handle correctly the cases
118 where the result of a comparison is unordered. Normally SIGFPE is
119 generated in such cases, in which case this isn't needed. */
120 #define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
122 /* Functions that return a floating point value may return that value
123 in the 387 FPU or in 386 integer registers. If set, this flag causes
124 the 387 to be used, which is compatible with most calling conventions. */
125 #define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
127 /* Disable generation of FP sin, cos and sqrt operations for 387.
128 This is because FreeBSD lacks these in the math-emulator-code */
129 #define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
131 /* Don't create frame pointers for leaf functions */
132 #define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
134 /* Temporary switches for tuning code generation */
136 /* Disable 32x32->64 bit multiplies that are used for long long multiplies
137 and division by constants, but sometimes cause reload problems. */
138 #define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
139 #define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
141 /* Emit/Don't emit prologue as rtl */
142 #define TARGET_SCHEDULE_PROLOGUE (target_flags & MASK_SCHEDULE_PROLOGUE)
144 /* Debug GO_IF_LEGITIMATE_ADDRESS */
145 #define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
147 /* Debug FUNCTION_ARG macros */
148 #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
150 /* Hack macros for tuning code generation */
151 #define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
152 #define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */
154 #define TARGET_386 (ix86_cpu == PROCESSOR_I386)
155 #define TARGET_486 (ix86_cpu == PROCESSOR_I486)
156 #define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
157 #define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO)
158 #define TARGET_USE_LEAVE (ix86_cpu == PROCESSOR_I386)
159 #define TARGET_PUSH_MEMORY (ix86_cpu == PROCESSOR_I386)
160 #define TARGET_ZERO_EXTEND_WITH_AND (ix86_cpu != PROCESSOR_I386 \
161 && ix86_cpu != PROCESSOR_PENTIUMPRO)
162 #define TARGET_DOUBLE_WITH_ADD (ix86_cpu != PROCESSOR_I386)
163 #define TARGET_USE_BIT_TEST (ix86_cpu == PROCESSOR_I386)
164 #define TARGET_UNROLL_STRLEN (ix86_cpu != PROCESSOR_I386)
165 #define TARGET_USE_Q_REG (ix86_cpu == PROCESSOR_PENTIUM \
166 || ix86_cpu == PROCESSOR_PENTIUMPRO)
167 #define TARGET_USE_ANY_REG (ix86_cpu == PROCESSOR_I486)
168 #define TARGET_CMOVE (ix86_arch == PROCESSOR_PENTIUMPRO)
169 #define TARGET_DEEP_BRANCH_PREDICTION (ix86_cpu == PROCESSOR_PENTIUMPRO)
170 #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
172 #define TARGET_SWITCHES \
173 { { "80387", MASK_80387 }, \
174 { "no-80387", -MASK_80387 }, \
175 { "hard-float", MASK_80387 }, \
176 { "soft-float", -MASK_80387 }, \
177 { "no-soft-float", MASK_80387 }, \
183 { "pentiumpro", 0 }, \
184 { "rtd", MASK_RTD }, \
185 { "no-rtd", -MASK_RTD }, \
186 { "align-double", MASK_ALIGN_DOUBLE }, \
187 { "no-align-double", -MASK_ALIGN_DOUBLE }, \
188 { "svr3-shlib", MASK_SVR3_SHLIB }, \
189 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
190 { "ieee-fp", MASK_IEEE_FP }, \
191 { "no-ieee-fp", -MASK_IEEE_FP }, \
192 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
193 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
194 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
195 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
196 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
197 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER }, \
198 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
199 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
200 { "schedule-prologue", MASK_SCHEDULE_PROLOGUE }, \
201 { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE }, \
202 { "debug-addr", MASK_DEBUG_ADDR }, \
203 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
204 { "move", -MASK_NO_MOVE }, \
205 { "no-move", MASK_NO_MOVE }, \
206 { "debug-arg", MASK_DEBUG_ARG }, \
207 { "no-debug-arg", -MASK_DEBUG_ARG }, \
208 { "stack-arg-probe", MASK_STACK_PROBE }, \
209 { "no-stack-arg-probe", -MASK_STACK_PROBE }, \
211 { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT}}
213 /* Which processor to schedule for. The cpu attribute defines a list that
214 mirrors this list, so changes to i386.md must be made at the same time. */
217 {PROCESSOR_I386, /* 80386 */
218 PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */
220 PROCESSOR_PENTIUMPRO};
222 #define PROCESSOR_I386_STRING "i386"
223 #define PROCESSOR_I486_STRING "i486"
224 #define PROCESSOR_I586_STRING "i586"
225 #define PROCESSOR_PENTIUM_STRING "pentium"
226 #define PROCESSOR_I686_STRING "i686"
227 #define PROCESSOR_PENTIUMPRO_STRING "pentiumpro"
229 extern enum processor_type ix86_cpu;
231 extern int ix86_arch;
233 /* Define the default processor. This is overridden by other tm.h files. */
234 #define PROCESSOR_DEFAULT \
235 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
237 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
238 ? PROCESSOR_PENTIUM \
239 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
240 ? PROCESSOR_PENTIUMPRO \
242 #define PROCESSOR_DEFAULT_STRING \
243 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
244 ? PROCESSOR_I486_STRING \
245 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
246 ? PROCESSOR_PENTIUM_STRING \
247 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
248 ? PROCESSOR_PENTIUMPRO_STRING \
249 : PROCESSOR_I386_STRING
251 /* This macro is similar to `TARGET_SWITCHES' but defines names of
252 command options that have values. Its definition is an
253 initializer with a subgrouping for each command option.
255 Each subgrouping contains a string constant, that defines the
256 fixed part of the option name, and the address of a variable. The
257 variable, type `char *', is set to the variable part of the given
258 option if the fixed part matches. The actual option name is made
259 by appending `-m' to the specified name. */
260 #define TARGET_OPTIONS \
261 { { "cpu=", &ix86_cpu_string}, \
262 { "arch=", &ix86_arch_string}, \
263 { "reg-alloc=", &i386_reg_alloc_order }, \
264 { "regparm=", &i386_regparm_string }, \
265 { "align-loops=", &i386_align_loops_string }, \
266 { "align-jumps=", &i386_align_jumps_string }, \
267 { "align-functions=", &i386_align_funcs_string }, \
268 { "branch-cost=", &i386_branch_cost_string }, \
272 /* Sometimes certain combinations of command options do not make
273 sense on a particular target machine. You can define a macro
274 `OVERRIDE_OPTIONS' to take account of this. This macro, if
275 defined, is executed once just after all the command options have
278 Don't use this macro to turn on various extra optimizations for
279 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
281 #define OVERRIDE_OPTIONS override_options ()
283 /* These are meant to be redefined in the host dependent files */
284 #define SUBTARGET_SWITCHES
285 #define SUBTARGET_OPTIONS
287 /* Define this to change the optimizations performed by default. */
288 #define OPTIMIZATION_OPTIONS(LEVEL) optimization_options(LEVEL)
290 /* Specs for the compiler proper */
293 #define CC1_CPU_SPEC "\
295 %{m386:-mcpu=i386 -march=i386} \
296 %{mno-486:-mcpu=i386 -march=i386} \
297 %{m486:-mcpu=i486 -march=i486} \
298 %{mno-386:-mcpu=i486 -march=i486} \
299 %{mno-pentium:-mcpu=i486 -march=i486} \
300 %{mpentium:-mcpu=pentium} \
301 %{mno-pentiumpro:-mcpu=pentium} \
302 %{mpentiumpro:-mcpu=pentiumpro}}"
307 #if TARGET_CPU_DEFAULT == 1
308 #define CPP_CPU_DEFAULT "-Di486"
309 #elif TARGET_CPU_DEFAULT == 2
310 #define CPP_CPU_DEFAULT "-Di586"
311 #elif TARGET_CPU_DEFAULT == 3
312 #define CPP_CPU_DEFAULT "-Di686"
314 #define CPP_CPU_DEFAULT ""
315 #endif /* TARGET_CPU_DEFAULT */
317 #define CPP_CPU_SPEC "\
318 -Di386 " CPP_CPU_DEFAULT " -Asystem(unix) -Acpu(i386) -Amachine(i386) \
319 %{mcpu=i486:-Di486} %{m486:-Di486} \
320 %{mpentium:-Dpentium -Di586} %{mcpu=pentium:-Dpentium -Di586} \
321 %{mpentiumpro:-Dpentiumpro -Di686} %{mcpu=pentiumpro:-Dpentiumpro -Di686}"
324 #define CPP_CPU_SPEC "\
325 -Di386 -Asystem(unix) -Acpu(i386) -Amachine(i386) \
326 %{mcpu=i486:-Di486} %{m486:-Di486} \
327 %{mpentium:-Dpentium -Di586} %{mcpu=pentium:-Dpentium -Di586} \
328 %{mpentiumpro:-Dpentiumpro -Di686} %{mcpu=pentiumpro:-Dpentiumpro -Di686}"
329 #endif /* __STDC__ */
330 #endif /* CPP_CPU_SPEC */
333 #define CC1_SPEC "%(cc1_spec) "
336 /* This macro defines names of additional specifications to put in the
337 specs that can be used in various specifications like CC1_SPEC. Its
338 definition is an initializer with a subgrouping for each command option.
340 Each subgrouping contains a string constant, that defines the
341 specification name, and a string constant that used by the GNU CC driver
344 Do not define this macro if it does not need to do anything. */
346 #ifndef SUBTARGET_EXTRA_SPECS
347 #define SUBTARGET_EXTRA_SPECS
350 #define EXTRA_SPECS \
351 { "cpp_cpu", CPP_CPU_SPEC }, \
352 { "cc1_cpu", CC1_CPU_SPEC }, \
353 SUBTARGET_EXTRA_SPECS
355 /* target machine storage layout */
357 /* Define for XFmode extended real floating point support.
358 This will automatically cause REAL_ARITHMETIC to be defined. */
359 #define LONG_DOUBLE_TYPE_SIZE 96
361 /* Define if you don't want extended real, but do want to use the
362 software floating point emulator for REAL_ARITHMETIC and
363 decimal <-> binary conversion. */
364 /* #define REAL_ARITHMETIC */
366 /* Define this if most significant byte of a word is the lowest numbered. */
367 /* That is true on the 80386. */
369 #define BITS_BIG_ENDIAN 0
371 /* Define this if most significant byte of a word is the lowest numbered. */
372 /* That is not true on the 80386. */
373 #define BYTES_BIG_ENDIAN 0
375 /* Define this if most significant word of a multiword number is the lowest
377 /* Not true for 80386 */
378 #define WORDS_BIG_ENDIAN 0
380 /* number of bits in an addressable storage unit */
381 #define BITS_PER_UNIT 8
383 /* Width in bits of a "word", which is the contents of a machine register.
384 Note that this is not necessarily the width of data type `int';
385 if using 16-bit ints on a 80386, this would still be 32.
386 But on a machine with 16-bit registers, this would be 16. */
387 #define BITS_PER_WORD 32
389 /* Width of a word, in units (bytes). */
390 #define UNITS_PER_WORD 4
392 /* Width in bits of a pointer.
393 See also the macro `Pmode' defined below. */
394 #define POINTER_SIZE 32
396 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
397 #define PARM_BOUNDARY 32
399 /* Boundary (in *bits*) on which stack pointer should be aligned. */
400 #define STACK_BOUNDARY 32
402 /* Allocation boundary (in *bits*) for the code of a function.
403 For i486, we get better performance by aligning to a cache
404 line (i.e. 16 byte) boundary. */
405 #define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
407 /* Alignment of field after `int : 0' in a structure. */
409 #define EMPTY_FIELD_BOUNDARY 32
411 /* Minimum size in bits of the largest boundary to which any
412 and all fundamental data types supported by the hardware
413 might need to be aligned. No data type wants to be aligned
414 rounder than this. The i386 supports 64-bit floating point
415 quantities, but these can be aligned on any 32-bit boundary.
416 The published ABIs say that doubles should be aligned on word
417 boundaries, but the Pentium gets better performance with them
418 aligned on 64 bit boundaries. */
419 #define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
421 /* align DFmode constants and nonaggregates */
422 #define ALIGN_DFmode (!TARGET_386)
424 /* Set this non-zero if move instructions will actually fail to work
425 when given unaligned data. */
426 #define STRICT_ALIGNMENT 0
428 /* If bit field type is int, don't let it cross an int,
429 and give entire struct the alignment of an int. */
430 /* Required on the 386 since it doesn't have bitfield insns. */
431 #define PCC_BITFIELD_TYPE_MATTERS 1
433 /* An integer expression for the size in bits of the largest integer
434 machine mode that should actually be used. All integer machine modes of
435 this size or smaller can be used for structures and unions with the
436 appropriate sizes. */
437 #define MAX_FIXED_MODE_SIZE 32
439 /* Maximum power of 2 that code can be aligned to. */
440 #define MAX_CODE_ALIGN 6 /* 64 byte alignment */
442 /* Align loop starts for optimal branching. */
443 #define ASM_OUTPUT_LOOP_ALIGN(FILE) ASM_OUTPUT_ALIGN (FILE, i386_align_loops)
445 /* This is how to align an instruction for optimal branching.
446 On i486 we'll get better performance by aligning on a
447 cache line (i.e. 16 byte) boundary. */
448 #define ASM_OUTPUT_ALIGN_CODE(FILE) ASM_OUTPUT_ALIGN ((FILE), i386_align_jumps)
451 /* Standard register usage. */
453 /* This processor has special stack-like registers. See reg-stack.c
457 #define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode)
459 /* Number of actual hardware registers.
460 The hardware registers are assigned numbers for the compiler
461 from 0 to just below FIRST_PSEUDO_REGISTER.
462 All registers that the compiler knows about must be given numbers,
463 even those that are not normally considered general registers.
465 In the 80386 we give the 8 general purpose registers the numbers 0-7.
466 We number the floating point registers 8-15.
467 Note that registers 0-7 can be accessed as a short or int,
468 while only 0-3 may be used with byte `mov' instructions.
470 Reg 16 does not correspond to any hardware register, but instead
471 appears in the RTL as an argument pointer prior to reload, and is
472 eliminated during reloading in favor of either the stack or frame
475 #define FIRST_PSEUDO_REGISTER 17
477 /* 1 for registers that have pervasive standard uses
478 and are not available for the register allocator.
479 On the 80386, the stack pointer is such, as is the arg pointer. */
480 #define FIXED_REGISTERS \
481 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
482 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
484 /* 1 for registers not available across function calls.
485 These must include the FIXED_REGISTERS and also any
486 registers that can be used without being saved.
487 The latter must include the registers where values are returned
488 and the register where structure-value addresses are passed.
489 Aside from that, you can include as many other registers as you like. */
491 #define CALL_USED_REGISTERS \
492 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
493 { 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
495 /* Order in which to allocate registers. Each register must be
496 listed once, even those in FIXED_REGISTERS. List frame pointer
497 late and fixed registers last. Note that, in general, we prefer
498 registers listed in CALL_USED_REGISTERS, keeping the others
499 available for storage of persistent values.
501 Three different versions of REG_ALLOC_ORDER have been tried:
503 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
504 but slower code on simple functions returning values in eax.
506 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
507 perl 4.036 due to not being able to create a DImode register (to hold a 2
510 If the order is eax, edx, ecx, ... it produces better code for simple
511 functions, and a slightly slower compiler. Users complained about the code
512 generated by allocating edx first, so restore the 'natural' order of things. */
514 #define REG_ALLOC_ORDER \
515 /*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
516 { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
518 /* A C statement (sans semicolon) to choose the order in which to
519 allocate hard registers for pseudo-registers local to a basic
522 Store the desired register order in the array `reg_alloc_order'.
523 Element 0 should be the register to allocate first; element 1, the
524 next register; and so on.
526 The macro body should not assume anything about the contents of
527 `reg_alloc_order' before execution of the macro.
529 On most machines, it is not necessary to define this macro. */
531 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
533 /* Macro to conditionally modify fixed_regs/call_used_regs. */
534 #define CONDITIONAL_REGISTER_USAGE \
538 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
539 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
541 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
545 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
546 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
547 if (TEST_HARD_REG_BIT (x, i)) \
548 fixed_regs[i] = call_used_regs[i] = 1; \
552 /* Return number of consecutive hard regs needed starting at reg REGNO
553 to hold something of mode MODE.
554 This is ordinarily the length in words of a value of mode MODE
555 but can be less for certain modes in special long registers.
557 Actually there are no two word move instructions for consecutive
558 registers. And only registers 0-3 may have mov byte instructions
562 #define HARD_REGNO_NREGS(REGNO, MODE) \
563 (FP_REGNO_P (REGNO) ? 1 \
564 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
566 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
567 On the 80386, the first 4 cpu registers can hold any mode
568 while the floating point registers may hold only floating point.
569 Make it clear that the fp regs could not hold a 16-byte float. */
571 /* The casts to int placate a compiler on a microvax,
572 for cross-compiler testing. */
574 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
577 : FP_REGNO_P (REGNO) \
578 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
579 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
580 && GET_MODE_UNIT_SIZE (MODE) <= (LONG_DOUBLE_TYPE_SIZE == 96 ? 12 : 8))\
581 : (int) (MODE) != (int) QImode ? 1 \
582 : (reload_in_progress | reload_completed) == 1)
584 /* Value is 1 if it is a good idea to tie two pseudo registers
585 when one has mode MODE1 and one has mode MODE2.
586 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
587 for any hard reg, then this must be 0 for correct output. */
589 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
591 /* Specify the registers used for certain standard purposes.
592 The values of these macros are register numbers. */
594 /* on the 386 the pc register is %eip, and is not usable as a general
595 register. The ordinary mov instructions won't work */
596 /* #define PC_REGNUM */
598 /* Register to use for pushing function arguments. */
599 #define STACK_POINTER_REGNUM 7
601 /* Base register for access to local variables of the function. */
602 #define FRAME_POINTER_REGNUM 6
604 /* First floating point reg */
605 #define FIRST_FLOAT_REG 8
607 /* First & last stack-like regs */
608 #define FIRST_STACK_REG FIRST_FLOAT_REG
609 #define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
611 /* Value should be nonzero if functions must have frame pointers.
612 Zero means the frame pointer need not be set up (and parms
613 may be accessed via the stack pointer) in functions that seem suitable.
614 This is computed in `reload', in reload1.c. */
615 #define FRAME_POINTER_REQUIRED (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ())
617 /* Base register for access to arguments of the function. */
618 #define ARG_POINTER_REGNUM 16
620 /* Register in which static-chain is passed to a function. */
621 #define STATIC_CHAIN_REGNUM 2
623 /* Register to hold the addressing base for position independent
624 code access to data items. */
625 #define PIC_OFFSET_TABLE_REGNUM 3
627 /* Register in which address to store a structure value
628 arrives in the function. On the 386, the prologue
629 copies this from the stack to register %eax. */
630 #define STRUCT_VALUE_INCOMING 0
632 /* Place in which caller passes the structure value address.
633 0 means push the value on the stack like an argument. */
634 #define STRUCT_VALUE 0
636 /* A C expression which can inhibit the returning of certain function
637 values in registers, based on the type of value. A nonzero value
638 says to return the function value in memory, just as large
639 structures are always returned. Here TYPE will be a C expression
640 of type `tree', representing the data type of the value.
642 Note that values of mode `BLKmode' must be explicitly handled by
643 this macro. Also, the option `-fpcc-struct-return' takes effect
644 regardless of this macro. On most systems, it is possible to
645 leave the macro undefined; this causes a default definition to be
646 used, whose value is the constant 1 for `BLKmode' values, and 0
649 Do not use this macro to indicate that structures and unions
650 should always be returned in memory. You should instead use
651 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
653 #define RETURN_IN_MEMORY(TYPE) \
654 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
657 /* Define the classes of registers for register constraints in the
658 machine description. Also define ranges of constants.
660 One of the classes must always be named ALL_REGS and include all hard regs.
661 If there is more than one class, another class must be named NO_REGS
662 and contain no registers.
664 The name GENERAL_REGS must be the name of a class (or an alias for
665 another name such as ALL_REGS). This is the class of registers
666 that is allowed by "g" or "r" in a register constraint.
667 Also, registers outside this class are allocated only when
668 instructions express preferences for them.
670 The classes must be numbered in nondecreasing order; that is,
671 a larger-numbered class must never be contained completely
672 in a smaller-numbered class.
674 For any two classes, it is very desirable that there be another
675 class that represents their union.
677 It might seem that class BREG is unnecessary, since no useful 386
678 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
679 and the "b" register constraint is useful in asms for syscalls. */
684 AREG, DREG, CREG, BREG,
685 AD_REGS, /* %eax/%edx for DImode */
686 Q_REGS, /* %eax %ebx %ecx %edx */
688 INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
689 GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
690 FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
692 ALL_REGS, LIM_REG_CLASSES
695 #define N_REG_CLASSES (int) LIM_REG_CLASSES
697 #define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
699 /* Give names of register classes as strings for dump file. */
701 #define REG_CLASS_NAMES \
703 "AREG", "DREG", "CREG", "BREG", \
709 "FP_TOP_REG", "FP_SECOND_REG", \
713 /* Define which registers fit in which classes.
714 This is an initializer for a vector of HARD_REG_SET
715 of length N_REG_CLASSES. */
717 #define REG_CLASS_CONTENTS \
719 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
722 0x10, 0x20, /* SIREG, DIREG */ \
723 0x7f, /* INDEX_REGS */ \
724 0x100ff, /* GENERAL_REGS */ \
725 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
726 0xff00, /* FLOAT_REGS */ \
729 /* The same information, inverted:
730 Return the class number of the smallest class containing
731 reg number REGNO. This could be a conditional expression
732 or could index an array. */
734 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
736 /* When defined, the compiler allows registers explicitly used in the
737 rtl to be used as spill registers but prevents the compiler from
738 extending the lifetime of these registers. */
740 #define SMALL_REGISTER_CLASSES 1
742 #define QI_REG_P(X) \
743 (REG_P (X) && REGNO (X) < 4)
744 #define NON_QI_REG_P(X) \
745 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
747 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
748 #define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
750 #define STACK_REG_P(xop) (REG_P (xop) && \
751 REGNO (xop) >= FIRST_STACK_REG && \
752 REGNO (xop) <= LAST_STACK_REG)
754 #define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
756 #define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
758 /* Try to maintain the accuracy of the death notes for regs satisfying the
759 following. Important for stack like regs, to know when to pop. */
761 /* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
763 /* 1 if register REGNO can magically overlap other regs.
764 Note that nonzero values work only in very special circumstances. */
766 /* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
768 /* The class value for index registers, and the one for base regs. */
770 #define INDEX_REG_CLASS INDEX_REGS
771 #define BASE_REG_CLASS GENERAL_REGS
773 /* Get reg_class from a letter such as appears in the machine description. */
775 #define REG_CLASS_FROM_LETTER(C) \
776 ((C) == 'r' ? GENERAL_REGS : \
777 (C) == 'q' ? Q_REGS : \
778 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
781 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
784 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
787 (C) == 'a' ? AREG : \
788 (C) == 'b' ? BREG : \
789 (C) == 'c' ? CREG : \
790 (C) == 'd' ? DREG : \
791 (C) == 'A' ? AD_REGS : \
792 (C) == 'D' ? DIREG : \
793 (C) == 'S' ? SIREG : NO_REGS)
795 /* The letters I, J, K, L and M in a register constraint string
796 can be used to stand for particular ranges of immediate operands.
797 This macro defines what the ranges are.
798 C is the letter, and VALUE is a constant value.
799 Return 1 if VALUE is in the range specified by C.
801 I is for non-DImode shifts.
802 J is for DImode shifts.
803 K and L are for an `andsi' optimization.
804 M is for shifts that can be executed by the "lea" opcode.
807 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
808 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
809 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
810 (C) == 'K' ? (VALUE) == 0xff : \
811 (C) == 'L' ? (VALUE) == 0xffff : \
812 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
813 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
814 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \
817 /* Similar, but for floating constants, and defining letters G and H.
818 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
819 TARGET_387 isn't set, because the stack register converter may need to
820 load 0.0 into the function value register. */
822 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
823 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
825 /* Place additional restrictions on the register class to use when it
826 is necessary to be able to hold a value of mode MODE in a reload
827 register for which class CLASS would ordinarily be used. */
829 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
830 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
833 /* Given an rtx X being reloaded into a reg required to be
834 in class CLASS, return the class of reg to actually use.
835 In general this is just CLASS; but on some machines
836 in some cases it is preferable to use a more restrictive class.
837 On the 80386 series, we prevent floating constants from being
838 reloaded into floating registers (since no move-insn can do that)
839 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
841 /* Put float CONST_DOUBLE in the constant pool instead of fp regs.
842 QImode must go into class Q_REGS.
843 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
844 movdf to do mem-to-mem moves through integer regs. */
846 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
847 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
848 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
849 : ((CLASS) == ALL_REGS \
850 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
853 /* If we are copying between general and FP registers, we need a memory
856 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
857 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
858 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
860 /* Return the maximum number of consecutive registers
861 needed to represent mode MODE in a register of class CLASS. */
862 /* On the 80386, this is the size of MODE in words,
863 except in the FP regs, where a single reg is always enough. */
864 #define CLASS_MAX_NREGS(CLASS, MODE) \
865 (FLOAT_CLASS_P (CLASS) ? 1 : \
866 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
868 /* A C expression whose value is nonzero if pseudos that have been
869 assigned to registers of class CLASS would likely be spilled
870 because registers of CLASS are needed for spill registers.
872 The default value of this macro returns 1 if CLASS has exactly one
873 register and zero otherwise. On most machines, this default
874 should be used. Only define this macro to some other expression
875 if pseudo allocated by `local-alloc.c' end up in memory because
876 their hard registers were needed for spill registers. If this
877 macro returns nonzero for those classes, those pseudos will only
878 be allocated by `global.c', which knows how to reallocate the
879 pseudo to another register. If there would not be another
880 register available for reallocation, you should not change the
881 definition of this macro since the only effect of such a
882 definition would be to slow down register allocation. */
884 #define CLASS_LIKELY_SPILLED_P(CLASS) \
886 || ((CLASS) == DREG) \
887 || ((CLASS) == CREG) \
888 || ((CLASS) == BREG) \
889 || ((CLASS) == AD_REGS) \
890 || ((CLASS) == SIREG) \
891 || ((CLASS) == DIREG))
894 /* Stack layout; function entry, exit and calling. */
896 /* Define this if pushing a word on the stack
897 makes the stack pointer a smaller address. */
898 #define STACK_GROWS_DOWNWARD
900 /* Define this if the nominal address of the stack frame
901 is at the high-address end of the local variables;
902 that is, each additional local variable allocated
903 goes at a more negative offset in the frame. */
904 #define FRAME_GROWS_DOWNWARD
906 /* Offset within stack frame to start allocating local variables at.
907 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
908 first local allocated. Otherwise, it is the offset to the BEGINNING
909 of the first local allocated. */
910 #define STARTING_FRAME_OFFSET 0
912 /* If we generate an insn to push BYTES bytes,
913 this says how many the stack pointer really advances by.
914 On 386 pushw decrements by exactly 2 no matter what the position was.
915 On the 386 there is no pushb; we use pushw instead, and this
916 has the effect of rounding up to 2. */
918 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
920 /* Offset of first parameter from the argument pointer register value. */
921 #define FIRST_PARM_OFFSET(FNDECL) 0
923 /* Value is the number of bytes of arguments automatically
924 popped when returning from a subroutine call.
925 FUNDECL is the declaration node of the function (as a tree),
926 FUNTYPE is the data type of the function (as a tree),
927 or for a library call it is an identifier node for the subroutine name.
928 SIZE is the number of bytes of arguments passed on the stack.
930 On the 80386, the RTD insn may be used to pop them if the number
931 of args is fixed, but if the number is variable then the caller
932 must pop them all. RTD can't be used for library calls now
933 because the library is compiled with the Unix compiler.
934 Use of RTD is a selectable option, since it is incompatible with
935 standard Unix calling sequences. If the option is not selected,
936 the caller must always pop the args.
938 The attribute stdcall is equivalent to RTD on a per module basis. */
940 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
941 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
943 /* Define how to find the value returned by a function.
944 VALTYPE is the data type of the value (as a tree).
945 If the precise function being called is known, FUNC is its FUNCTION_DECL;
946 otherwise, FUNC is 0. */
947 #define FUNCTION_VALUE(VALTYPE, FUNC) \
948 gen_rtx (REG, TYPE_MODE (VALTYPE), \
949 VALUE_REGNO (TYPE_MODE (VALTYPE)))
951 /* Define how to find the value returned by a library function
952 assuming the value has mode MODE. */
954 #define LIBCALL_VALUE(MODE) \
955 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
957 /* Define the size of the result block used for communication between
958 untyped_call and untyped_return. The block contains a DImode value
959 followed by the block used by fnsave and frstor. */
961 #define APPLY_RESULT_SIZE (8+108)
963 /* 1 if N is a possible register number for function argument passing. */
964 #define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
966 /* Define a data type for recording info about an argument list
967 during the scan of that argument list. This data type should
968 hold all necessary information about the function itself
969 and about the args processed so far, enough to enable macros
970 such as FUNCTION_ARG to determine where the next arg should go. */
972 typedef struct i386_args {
973 int words; /* # words passed so far */
974 int nregs; /* # registers available for passing */
975 int regno; /* next available register number */
978 /* Initialize a variable CUM of type CUMULATIVE_ARGS
979 for a call to a function whose data type is FNTYPE.
980 For a library call, FNTYPE is 0. */
982 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
983 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
985 /* Update the data in CUM to advance over an argument
986 of mode MODE and data type TYPE.
987 (TYPE is null for libcalls where that information may not be available.) */
989 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
990 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
992 /* Define where to put the arguments to a function.
993 Value is zero to push the argument on the stack,
994 or a hard register in which to store the argument.
996 MODE is the argument's machine mode.
997 TYPE is the data type of the argument (as a tree).
998 This is null for libcalls where that information may
1000 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1001 the preceding args and about the function being called.
1002 NAMED is nonzero if this argument is a named parameter
1003 (otherwise it is an extra parameter matching an ellipsis). */
1005 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1006 (function_arg (&CUM, MODE, TYPE, NAMED))
1008 /* For an arg passed partly in registers and partly in memory,
1009 this is the number of registers used.
1010 For args passed entirely in registers or entirely in memory, zero. */
1012 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1013 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
1015 /* This macro is invoked just before the start of a function.
1016 It is used here to output code for -fpic that will load the
1017 return address into %ebx. */
1019 #undef ASM_OUTPUT_FUNCTION_PREFIX
1020 #define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME) \
1021 asm_output_function_prefix (FILE, FNNAME)
1023 /* This macro generates the assembly code for function entry.
1024 FILE is a stdio stream to output the code to.
1025 SIZE is an int: how many units of temporary storage to allocate.
1026 Refer to the array `regs_ever_live' to determine which registers
1027 to save; `regs_ever_live[I]' is nonzero if register number I
1028 is ever used in the function. This macro is responsible for
1029 knowing which registers should not be saved even if used. */
1031 #define FUNCTION_PROLOGUE(FILE, SIZE) \
1032 function_prologue (FILE, SIZE)
1034 /* Output assembler code to FILE to increment profiler label # LABELNO
1035 for profiling a function entry. */
1037 #define FUNCTION_PROFILER(FILE, LABELNO) \
1041 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
1042 LPREFIX, (LABELNO)); \
1043 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
1047 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
1048 fprintf (FILE, "\tcall _mcount\n"); \
1053 /* There are three profiling modes for basic blocks available.
1054 The modes are selected at compile time by using the options
1055 -a or -ax of the gnu compiler.
1056 The variable `profile_block_flag' will be set according to the
1059 profile_block_flag == 0, no option used:
1063 profile_block_flag == 1, -a option used.
1065 Count frequency of execution of every basic block.
1067 profile_block_flag == 2, -ax option used.
1069 Generate code to allow several different profiling modes at run time.
1070 Available modes are:
1071 Produce a trace of all basic blocks.
1072 Count frequency of jump instructions executed.
1073 In every mode it is possible to start profiling upon entering
1074 certain functions and to disable profiling of some other functions.
1076 The result of basic-block profiling will be written to a file `bb.out'.
1077 If the -ax option is used parameters for the profiling will be read
1082 /* The following macro shall output assembler code to FILE
1083 to initialize basic-block profiling.
1085 If profile_block_flag == 2
1087 Output code to call the subroutine `__bb_init_trace_func'
1088 and pass two parameters to it. The first parameter is
1089 the address of a block allocated in the object module.
1090 The second parameter is the number of the first basic block
1093 The name of the block is a local symbol made with this statement:
1095 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1097 Of course, since you are writing the definition of
1098 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1099 can take a short cut in the definition of this macro and use the
1100 name that you know will result.
1102 The number of the first basic block of the function is
1103 passed to the macro in BLOCK_OR_LABEL.
1105 If described in a virtual assembler language the code to be
1109 parameter2 <- BLOCK_OR_LABEL
1110 call __bb_init_trace_func
1112 else if profile_block_flag != 0
1114 Output code to call the subroutine `__bb_init_func'
1115 and pass one single parameter to it, which is the same
1116 as the first parameter to `__bb_init_trace_func'.
1118 The first word of this parameter is a flag which will be nonzero if
1119 the object module has already been initialized. So test this word
1120 first, and do not call `__bb_init_func' if the flag is nonzero.
1121 Note: When profile_block_flag == 2 the test need not be done
1122 but `__bb_init_trace_func' *must* be called.
1124 BLOCK_OR_LABEL may be used to generate a label number as a
1125 branch destination in case `__bb_init_func' will not be called.
1127 If described in a virtual assembler language the code to be
1138 #undef FUNCTION_BLOCK_PROFILER
1139 #define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
1142 static int num_func = 0; \
1144 char block_table[80], false_label[80]; \
1146 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1148 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
1149 xops[5] = stack_pointer_rtx; \
1150 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
1152 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1154 switch (profile_block_flag) \
1159 xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \
1160 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_trace_func")); \
1161 xops[6] = GEN_INT (8); \
1163 output_asm_insn (AS1(push%L2,%2), xops); \
1165 output_asm_insn (AS1(push%L1,%1), xops); \
1168 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1169 output_asm_insn (AS1 (push%L7,%7), xops); \
1172 output_asm_insn (AS1(call,%P3), xops); \
1173 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1179 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
1181 xops[0] = const0_rtx; \
1182 xops[2] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, false_label)); \
1183 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_func")); \
1184 xops[4] = gen_rtx (MEM, Pmode, xops[1]); \
1185 xops[6] = GEN_INT (4); \
1187 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
1189 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
1190 output_asm_insn (AS1(jne,%2), xops); \
1193 output_asm_insn (AS1(push%L1,%1), xops); \
1196 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1197 output_asm_insn (AS1 (push%L7,%7), xops); \
1200 output_asm_insn (AS1(call,%P3), xops); \
1201 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1202 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LPBZ", num_func); \
1211 /* The following macro shall output assembler code to FILE
1212 to increment a counter associated with basic block number BLOCKNO.
1214 If profile_block_flag == 2
1216 Output code to initialize the global structure `__bb' and
1217 call the function `__bb_trace_func' which will increment the
1220 `__bb' consists of two words. In the first word the number
1221 of the basic block has to be stored. In the second word
1222 the address of a block allocated in the object module
1225 The basic block number is given by BLOCKNO.
1227 The address of the block is given by the label created with
1229 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1231 by FUNCTION_BLOCK_PROFILER.
1233 Of course, since you are writing the definition of
1234 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1235 can take a short cut in the definition of this macro and use the
1236 name that you know will result.
1238 If described in a virtual assembler language the code to be
1241 move BLOCKNO -> (__bb)
1242 move LPBX0 -> (__bb+4)
1243 call __bb_trace_func
1245 Note that function `__bb_trace_func' must not change the
1246 machine state, especially the flag register. To grant
1247 this, you must output code to save and restore registers
1248 either in this macro or in the macros MACHINE_STATE_SAVE
1249 and MACHINE_STATE_RESTORE. The last two macros will be
1250 used in the function `__bb_trace_func', so you must make
1251 sure that the function prologue does not change any
1252 register prior to saving it with MACHINE_STATE_SAVE.
1254 else if profile_block_flag != 0
1256 Output code to increment the counter directly.
1257 Basic blocks are numbered separately from zero within each
1258 compiled object module. The count associated with block number
1259 BLOCKNO is at index BLOCKNO in an array of words; the name of
1260 this array is a local symbol made with this statement:
1262 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1264 Of course, since you are writing the definition of
1265 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1266 can take a short cut in the definition of this macro and use the
1267 name that you know will result.
1269 If described in a virtual assembler language the code to be
1272 inc (LPBX2+4*BLOCKNO)
1276 #define BLOCK_PROFILER(FILE, BLOCKNO) \
1279 rtx xops[8], cnt_rtx; \
1281 char *block_table = counts; \
1283 switch (profile_block_flag) \
1288 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
1290 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
1291 xops[2] = GEN_INT ((BLOCKNO)); \
1292 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_func")); \
1293 xops[4] = gen_rtx (SYMBOL_REF, VOIDmode, "__bb"); \
1294 xops[5] = plus_constant (xops[4], 4); \
1295 xops[0] = gen_rtx (MEM, SImode, xops[4]); \
1296 xops[6] = gen_rtx (MEM, SImode, xops[5]); \
1298 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1300 fprintf(FILE, "\tpushf\n"); \
1301 output_asm_insn (AS2(mov%L0,%2,%0), xops); \
1304 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
1305 output_asm_insn (AS1(push%L7,%7), xops); \
1306 output_asm_insn (AS2(lea%L7,%a1,%7), xops); \
1307 output_asm_insn (AS2(mov%L6,%7,%6), xops); \
1308 output_asm_insn (AS1(pop%L7,%7), xops); \
1311 output_asm_insn (AS2(mov%L6,%1,%6), xops); \
1312 output_asm_insn (AS1(call,%P3), xops); \
1313 fprintf(FILE, "\tpopf\n"); \
1319 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
1320 cnt_rtx = gen_rtx (SYMBOL_REF, VOIDmode, counts); \
1321 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
1324 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
1327 cnt_rtx = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, cnt_rtx); \
1329 xops[0] = gen_rtx (MEM, SImode, cnt_rtx); \
1330 output_asm_insn (AS1(inc%L0,%0), xops); \
1338 /* The following macro shall output assembler code to FILE
1339 to indicate a return from function during basic-block profiling.
1341 If profiling_block_flag == 2:
1343 Output assembler code to call function `__bb_trace_ret'.
1345 Note that function `__bb_trace_ret' must not change the
1346 machine state, especially the flag register. To grant
1347 this, you must output code to save and restore registers
1348 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1349 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1350 used in the function `__bb_trace_ret', so you must make
1351 sure that the function prologue does not change any
1352 register prior to saving it with MACHINE_STATE_SAVE_RET.
1354 else if profiling_block_flag != 0:
1356 The macro will not be used, so it need not distinguish
1360 #define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1365 xops[0] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_trace_ret")); \
1367 output_asm_insn (AS1(call,%P0), xops); \
1372 /* The function `__bb_trace_func' is called in every basic block
1373 and is not allowed to change the machine state. Saving (restoring)
1374 the state can either be done in the BLOCK_PROFILER macro,
1375 before calling function (rsp. after returning from function)
1376 `__bb_trace_func', or it can be done inside the function by
1377 defining the macros:
1379 MACHINE_STATE_SAVE(ID)
1380 MACHINE_STATE_RESTORE(ID)
1382 In the latter case care must be taken, that the prologue code
1383 of function `__bb_trace_func' does not already change the
1384 state prior to saving it with MACHINE_STATE_SAVE.
1386 The parameter `ID' is a string identifying a unique macro use.
1388 On the i386 the initialization code at the begin of
1389 function `__bb_trace_func' contains a `sub' instruction
1390 therefore we handle save and restore of the flag register
1391 in the BLOCK_PROFILER macro. */
1393 #define MACHINE_STATE_SAVE(ID) \
1394 asm (" pushl %eax"); \
1395 asm (" pushl %ecx"); \
1396 asm (" pushl %edx"); \
1397 asm (" pushl %esi");
1399 #define MACHINE_STATE_RESTORE(ID) \
1400 asm (" popl %esi"); \
1401 asm (" popl %edx"); \
1402 asm (" popl %ecx"); \
1405 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1406 the stack pointer does not matter. The value is tested only in
1407 functions that have frame pointers.
1408 No definition is equivalent to always zero. */
1409 /* Note on the 386 it might be more efficient not to define this since
1410 we have to restore it ourselves from the frame pointer, in order to
1413 #define EXIT_IGNORE_STACK 1
1415 /* This macro generates the assembly code for function exit,
1416 on machines that need it. If FUNCTION_EPILOGUE is not defined
1417 then individual return instructions are generated for each
1418 return statement. Args are same as for FUNCTION_PROLOGUE.
1420 The function epilogue should not depend on the current stack pointer!
1421 It should use the frame pointer only. This is mandatory because
1422 of alloca; we also take advantage of it to omit stack adjustments
1425 If the last non-note insn in the function is a BARRIER, then there
1426 is no need to emit a function prologue, because control does not fall
1427 off the end. This happens if the function ends in an "exit" call, or
1428 if a `return' insn is emitted directly into the function. */
1431 #define FUNCTION_BEGIN_EPILOGUE(FILE) \
1433 rtx last = get_last_insn (); \
1434 if (last && GET_CODE (last) == NOTE) \
1435 last = prev_nonnote_insn (last); \
1436 /* if (! last || GET_CODE (last) != BARRIER) \
1437 function_epilogue (FILE, SIZE);*/ \
1441 #define FUNCTION_EPILOGUE(FILE, SIZE) \
1442 function_epilogue (FILE, SIZE)
1444 /* Output assembler code for a block containing the constant parts
1445 of a trampoline, leaving space for the variable parts. */
1447 /* On the 386, the trampoline contains three instructions:
1451 #define TRAMPOLINE_TEMPLATE(FILE) \
1453 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
1454 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1455 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1456 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
1457 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1458 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1459 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
1460 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
1463 /* Length in units of the trampoline for entering a nested function. */
1465 #define TRAMPOLINE_SIZE 12
1467 /* Emit RTL insns to initialize the variable parts of a trampoline.
1468 FNADDR is an RTX for the address of the function's pure code.
1469 CXT is an RTX for the static chain value for the function. */
1471 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1473 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
1474 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
1477 /* Definitions for register eliminations.
1479 This is an array of structures. Each structure initializes one pair
1480 of eliminable registers. The "from" register number is given first,
1481 followed by "to". Eliminations of the same "from" register are listed
1482 in order of preference.
1484 We have two registers that can be eliminated on the i386. First, the
1485 frame pointer register can often be eliminated in favor of the stack
1486 pointer register. Secondly, the argument pointer register can always be
1487 eliminated; it is replaced with either the stack or frame pointer. */
1489 #define ELIMINABLE_REGS \
1490 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1491 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1492 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1494 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1495 Frame pointer elimination is automatically handled.
1497 For the i386, if frame pointer elimination is being done, we would like to
1498 convert ap into sp, not fp.
1500 All other eliminations are valid. */
1502 #define CAN_ELIMINATE(FROM, TO) \
1503 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1504 ? ! frame_pointer_needed \
1507 /* Define the offset between two registers, one to be eliminated, and the other
1508 its replacement, at the start of a routine. */
1510 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1512 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1513 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1519 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1520 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
1521 || (current_function_uses_pic_offset_table \
1522 && regno == PIC_OFFSET_TABLE_REGNUM)) \
1525 (OFFSET) = offset + get_frame_size (); \
1527 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1528 (OFFSET) += 4; /* Skip saved PC */ \
1532 /* Addressing modes, and classification of registers for them. */
1534 /* #define HAVE_POST_INCREMENT */
1535 /* #define HAVE_POST_DECREMENT */
1537 /* #define HAVE_PRE_DECREMENT */
1538 /* #define HAVE_PRE_INCREMENT */
1540 /* Macros to check register numbers against specific register classes. */
1542 /* These assume that REGNO is a hard or pseudo reg number.
1543 They give nonzero only if REGNO is a hard reg of the suitable class
1544 or a pseudo reg currently allocated to a suitable hard reg.
1545 Since they use reg_renumber, they are safe only once reg_renumber
1546 has been allocated, which happens in local-alloc.c. */
1548 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1549 ((REGNO) < STACK_POINTER_REGNUM \
1550 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1552 #define REGNO_OK_FOR_BASE_P(REGNO) \
1553 ((REGNO) <= STACK_POINTER_REGNUM \
1554 || (REGNO) == ARG_POINTER_REGNUM \
1555 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1557 #define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1558 #define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1560 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1561 and check its validity for a certain class.
1562 We have two alternate definitions for each of them.
1563 The usual definition accepts all pseudo regs; the other rejects
1564 them unless they have been allocated suitable hard regs.
1565 The symbol REG_OK_STRICT causes the latter definition to be used.
1567 Most source files want to accept pseudo regs in the hope that
1568 they will get allocated to the class that the insn wants them to be in.
1569 Source files for reload pass need to be strict.
1570 After reload, it makes no difference, since pseudo regs have
1571 been eliminated by then. */
1574 /* Non strict versions, pseudos are ok */
1575 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1576 (REGNO (X) < STACK_POINTER_REGNUM \
1577 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1579 #define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1580 (REGNO (X) <= STACK_POINTER_REGNUM \
1581 || REGNO (X) == ARG_POINTER_REGNUM \
1582 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1584 #define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1585 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1587 /* Strict versions, hard registers only */
1588 #define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1589 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1590 #define REG_OK_FOR_STRREG_STRICT_P(X) \
1591 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1593 #ifndef REG_OK_STRICT
1594 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1595 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1596 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1599 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1600 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1601 #define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1604 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1605 that is a valid memory address for an instruction.
1606 The MODE argument is the machine mode for the MEM expression
1607 that wants to use this address.
1609 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1610 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1612 See legitimize_pic_address in i386.c for details as to what
1613 constitutes a legitimate address when -fpic is used. */
1615 #define MAX_REGS_PER_ADDRESS 2
1617 #define CONSTANT_ADDRESS_P(X) \
1618 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1619 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1620 || GET_CODE (X) == HIGH)
1622 /* Nonzero if the constant value X is a legitimate general operand.
1623 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1625 #define LEGITIMATE_CONSTANT_P(X) 1
1627 #ifdef REG_OK_STRICT
1628 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1630 if (legitimate_address_p (MODE, X, 1)) \
1635 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1637 if (legitimate_address_p (MODE, X, 0)) \
1643 /* Try machine-dependent ways of modifying an illegitimate address
1644 to be legitimate. If we find one, return the new, valid address.
1645 This macro is used in only one place: `memory_address' in explow.c.
1647 OLDX is the address as it was before break_out_memory_refs was called.
1648 In some cases it is useful to look at this to decide what needs to be done.
1650 MODE and WIN are passed so that this macro can use
1651 GO_IF_LEGITIMATE_ADDRESS.
1653 It is always safe for this macro to do nothing. It exists to recognize
1654 opportunities to optimize the output.
1656 For the 80386, we handle X+REG by loading X into a register R and
1657 using R+REG. R will go in a general reg and indexing will be used.
1658 However, if REG is a broken-out memory address or multiplication,
1659 nothing needs to be done because REG can certainly go in a general reg.
1661 When -fpic is used, special handling is needed for symbolic references.
1662 See comments by legitimize_pic_address in i386.c for details. */
1664 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1667 (X) = legitimize_address (X, OLDX, MODE); \
1668 if (memory_address_p (MODE, X)) \
1672 #define REWRITE_ADDRESS(x) rewrite_address(x)
1674 /* Nonzero if the constant value X is a legitimate general operand
1675 when generating PIC code. It is given that flag_pic is on and
1676 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1678 #define LEGITIMATE_PIC_OPERAND_P(X) \
1679 (! SYMBOLIC_CONST (X) \
1680 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1682 #define SYMBOLIC_CONST(X) \
1683 (GET_CODE (X) == SYMBOL_REF \
1684 || GET_CODE (X) == LABEL_REF \
1685 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1687 /* Go to LABEL if ADDR (a legitimate address expression)
1688 has an effect that depends on the machine mode it is used for.
1689 On the 80386, only postdecrement and postincrement address depend thus
1690 (the amount of decrement or increment being the length of the operand). */
1691 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1692 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1694 /* Define this macro if references to a symbol must be treated
1695 differently depending on something about the variable or
1696 function named by the symbol (such as what section it is in).
1698 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1699 so that we may access it directly in the GOT. */
1701 #define ENCODE_SECTION_INFO(DECL) \
1706 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1707 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1709 if (TARGET_DEBUG_ADDR \
1710 && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \
1712 fprintf (stderr, "Encode %s, public = %s\n", \
1713 IDENTIFIER_POINTER (DECL_NAME (DECL)), \
1714 TREE_PUBLIC (DECL)); \
1717 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1718 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1719 || ! TREE_PUBLIC (DECL)); \
1724 /* Initialize data used by insn expanders. This is called from
1725 init_emit, once for each function, before code is generated.
1726 For 386, clear stack slot assignments remembered from previous
1729 #define INIT_EXPANDERS clear_386_stack_locals ()
1731 /* The `FINALIZE_PIC' macro serves as a hook to emit these special
1732 codes once the function is being compiled into assembly code, but
1733 not before. (It is not done before, because in the case of
1734 compiling an inline function, it would lead to multiple PIC
1735 prologues being included in functions which used inline functions
1736 and were compiled to assembly language.) */
1738 #define FINALIZE_PIC \
1741 extern int current_function_uses_pic_offset_table; \
1743 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1748 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1749 with arguments ARGS is a valid machine specific attribute for DECL.
1750 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1752 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1753 (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1755 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1756 with arguments ARGS is a valid machine specific attribute for TYPE.
1757 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1759 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1760 (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1762 /* If defined, a C expression whose value is zero if the attributes on
1763 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1764 two if they are nearly compatible (which causes a warning to be
1767 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1768 (i386_comp_type_attributes (TYPE1, TYPE2))
1770 /* If defined, a C statement that assigns default attributes to newly
1773 /* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1775 /* Max number of args passed in registers. If this is more than 3, we will
1776 have problems with ebx (register #4), since it is a caller save register and
1777 is also used as the pic register in ELF. So for now, don't allow more than
1778 3 registers to be passed in registers. */
1780 #define REGPARM_MAX 3
1783 /* Specify the machine mode that this machine uses
1784 for the index in the tablejump instruction. */
1785 #define CASE_VECTOR_MODE Pmode
1787 /* Define this if the tablejump instruction expects the table
1788 to contain offsets from the address of the table.
1789 Do not define this if the table should contain absolute addresses. */
1790 /* #define CASE_VECTOR_PC_RELATIVE */
1792 /* Specify the tree operation to be used to convert reals to integers.
1793 This should be changed to take advantage of fist --wfs ??
1795 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1797 /* This is the kind of divide that is easiest to do in the general case. */
1798 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1800 /* Define this as 1 if `char' should by default be signed; else as 0. */
1801 #define DEFAULT_SIGNED_CHAR 1
1803 /* Max number of bytes we can move from memory to memory
1804 in one reasonably fast instruction. */
1807 /* The number of scalar move insns which should be generated instead
1808 of a string move insn or a library call. Increasing the value
1809 will always make code faster, but eventually incurs high cost in
1810 increased code size.
1812 If you don't define this, a reasonable default is used.
1814 Make this large on i386, since the block move is very inefficient with small
1815 blocks, and the hard register needs of the block move require much reload
1818 #define MOVE_RATIO 5
1820 /* Define if shifts truncate the shift count
1821 which implies one can omit a sign-extension or zero-extension
1822 of a shift count. */
1823 /* On i386, shifts do truncate the count. But bit opcodes don't. */
1825 /* #define SHIFT_COUNT_TRUNCATED */
1827 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1828 is done just by pretending it is already truncated. */
1829 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1831 /* We assume that the store-condition-codes instructions store 0 for false
1832 and some other value for true. This is the value stored for true. */
1834 #define STORE_FLAG_VALUE 1
1836 /* When a prototype says `char' or `short', really pass an `int'.
1837 (The 386 can't easily push less than an int.) */
1839 #define PROMOTE_PROTOTYPES
1841 /* Specify the machine mode that pointers have.
1842 After generation of rtl, the compiler makes no further distinction
1843 between pointers and any other objects of this machine mode. */
1844 #define Pmode SImode
1846 /* A function address in a call instruction
1847 is a byte address (for indexing purposes)
1848 so give the MEM rtx a byte's mode. */
1849 #define FUNCTION_MODE QImode
1851 /* A part of a C `switch' statement that describes the relative costs
1852 of constant RTL expressions. It must contain `case' labels for
1853 expression codes `const_int', `const', `symbol_ref', `label_ref'
1854 and `const_double'. Each case must ultimately reach a `return'
1855 statement to return the relative cost of the use of that kind of
1856 constant value in an expression. The cost may depend on the
1857 precise value of the constant, which is available for examination
1858 in X, and the rtx code of the expression in which it is contained,
1859 found in OUTER_CODE.
1861 CODE is the expression code--redundant, since it can be obtained
1862 with `GET_CODE (X)'. */
1864 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1869 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 1; \
1871 case CONST_DOUBLE: \
1874 if (GET_MODE (RTX) == VOIDmode) \
1877 code = standard_80387_constant_p (RTX); \
1878 return code == 1 ? 0 : \
1883 /* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */
1884 #define TOPLEVEL_COSTS_N_INSNS(N) {total = COSTS_N_INSNS (N); break;}
1886 /* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1887 This can be used, for example, to indicate how costly a multiply
1888 instruction is. In writing this macro, you can use the construct
1889 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1890 instructions. OUTER_CODE is the code of the expression in which X
1893 This macro is optional; do not define it if the default cost
1894 assumptions are adequate for the target machine. */
1896 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1898 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1899 && GET_MODE (XEXP (X, 0)) == SImode) \
1901 HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1904 return COSTS_N_INSNS (ix86_cost->add) \
1905 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1907 if (value == 2 || value == 3) \
1908 return COSTS_N_INSNS (ix86_cost->lea) \
1909 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1911 /* fall through */ \
1917 if (GET_MODE (XEXP (X, 0)) == DImode) \
1919 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1920 if (INTVAL (XEXP (X, 1)) > 32) \
1921 return COSTS_N_INSNS(ix86_cost->shift_const + 2); \
1923 return COSTS_N_INSNS(ix86_cost->shift_const * 2); \
1924 return ((GET_CODE (XEXP (X, 1)) == AND \
1925 ? COSTS_N_INSNS(ix86_cost->shift_var * 2) \
1926 : COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2)) \
1927 + rtx_cost(XEXP (X, 0), OUTER_CODE)); \
1929 return COSTS_N_INSNS (GET_CODE (XEXP (X, 1)) == CONST_INT \
1930 ? ix86_cost->shift_const \
1931 : ix86_cost->shift_var) \
1932 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1935 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
1937 unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1941 return COSTS_N_INSNS (ix86_cost->add) \
1942 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1943 if (value == 4 || value == 8) \
1944 return COSTS_N_INSNS (ix86_cost->lea) \
1945 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1947 while (value != 0) \
1954 return COSTS_N_INSNS (ix86_cost->shift_const) \
1955 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1957 return COSTS_N_INSNS (ix86_cost->mult_init \
1958 + nbits * ix86_cost->mult_bit) \
1959 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1962 else /* This is arbitrary */ \
1963 TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \
1964 + 7 * ix86_cost->mult_bit); \
1970 TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \
1973 if (GET_CODE (XEXP (X, 0)) == REG \
1974 && GET_MODE (XEXP (X, 0)) == SImode \
1975 && GET_CODE (XEXP (X, 1)) == PLUS) \
1976 return COSTS_N_INSNS (ix86_cost->lea); \
1978 /* fall through */ \
1983 if (GET_MODE (X) == DImode) \
1984 return COSTS_N_INSNS (ix86_cost->add) * 2 \
1985 + (rtx_cost (XEXP (X, 0), OUTER_CODE) \
1986 << (GET_MODE (XEXP (X, 0)) != DImode)) \
1987 + (rtx_cost (XEXP (X, 1), OUTER_CODE) \
1988 << (GET_MODE (XEXP (X, 1)) != DImode)); \
1991 if (GET_MODE (X) == DImode) \
1992 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2) \
1993 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add)
1996 /* An expression giving the cost of an addressing mode that contains
1997 ADDRESS. If not defined, the cost is computed from the ADDRESS
1998 expression and the `CONST_COSTS' values.
2000 For most CISC machines, the default cost is a good approximation
2001 of the true cost of the addressing mode. However, on RISC
2002 machines, all instructions normally have the same length and
2003 execution time. Hence all addresses will have equal costs.
2005 In cases where more than one form of an address is known, the form
2006 with the lowest cost will be used. If multiple forms have the
2007 same, lowest, cost, the one that is the most complex will be used.
2009 For example, suppose an address that is equal to the sum of a
2010 register and a constant is used twice in the same basic block.
2011 When this macro is not defined, the address will be computed in a
2012 register and memory references will be indirect through that
2013 register. On machines where the cost of the addressing mode
2014 containing the sum is no higher than that of a simple indirect
2015 reference, this will produce an additional instruction and
2016 possibly require an additional register. Proper specification of
2017 this macro eliminates this overhead for such machines.
2019 Similar use of this macro is made in strength reduction of loops.
2021 ADDRESS need not be valid as an address. In such a case, the cost
2022 is not relevant and can be any value; invalid addresses need not be
2023 assigned a different cost.
2025 On machines where an address involving more than one register is as
2026 cheap as an address computation involving only one register,
2027 defining `ADDRESS_COST' to reflect this can cause two registers to
2028 be live over a region of code where only one would have been if
2029 `ADDRESS_COST' were not defined in that manner. This effect should
2030 be considered in the definition of this macro. Equivalent costs
2031 should probably only be given to addresses with different numbers
2032 of registers on machines with lots of registers.
2034 This macro will normally either not be defined or be defined as a
2037 For i386, it is better to use a complex address than let gcc copy
2038 the address into a reg and make a new pseudo. But not if the address
2039 requires to two regs - that would mean more pseudos with longer
2042 #define ADDRESS_COST(RTX) \
2043 ((CONSTANT_P (RTX) \
2044 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
2045 && REG_P (XEXP (RTX, 0)))) ? 0 \
2049 /* A C expression for the cost of moving data of mode M between a
2050 register and memory. A value of 2 is the default; this cost is
2051 relative to those in `REGISTER_MOVE_COST'.
2053 If moving between registers and memory is more expensive than
2054 between two registers, you should define this macro to express the
2057 On the i386, copying between floating-point and fixed-point
2058 registers is expensive. */
2060 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
2061 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
2062 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
2066 /* A C expression for the cost of moving data of mode M between a
2067 register and memory. A value of 2 is the default; this cost is
2068 relative to those in `REGISTER_MOVE_COST'.
2070 If moving between registers and memory is more expensive than
2071 between two registers, you should define this macro to express the
2074 /* #define MEMORY_MOVE_COST(M) 2 */
2076 /* A C expression for the cost of a branch instruction. A value of 1
2077 is the default; other values are interpreted relative to that. */
2079 #define BRANCH_COST i386_branch_cost
2081 /* Define this macro as a C expression which is nonzero if accessing
2082 less than a word of memory (i.e. a `char' or a `short') is no
2083 faster than accessing a word of memory, i.e., if such access
2084 require more than one instruction or if there is no difference in
2085 cost between byte and (aligned) word loads.
2087 When this macro is not defined, the compiler will access a field by
2088 finding the smallest containing object; when it is defined, a
2089 fullword load will be used if alignment permits. Unless bytes
2090 accesses are faster than word accesses, using word accesses is
2091 preferable since it may eliminate subsequent memory access if
2092 subsequent accesses occur to other fields in the same word of the
2093 structure, but to different bytes. */
2095 #define SLOW_BYTE_ACCESS 0
2097 /* Nonzero if access to memory by shorts is slow and undesirable. */
2098 #define SLOW_SHORT_ACCESS 0
2100 /* Define this macro if zero-extension (of a `char' or `short' to an
2101 `int') can be done faster if the destination is a register that is
2104 If you define this macro, you must have instruction patterns that
2105 recognize RTL structures like this:
2107 (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
2109 and likewise for `HImode'. */
2111 /* #define SLOW_ZERO_EXTEND */
2113 /* Define this macro to be the value 1 if unaligned accesses have a
2114 cost many times greater than aligned accesses, for example if they
2115 are emulated in a trap handler.
2117 When this macro is non-zero, the compiler will act as if
2118 `STRICT_ALIGNMENT' were non-zero when generating code for block
2119 moves. This can cause significantly more instructions to be
2120 produced. Therefore, do not set this macro non-zero if unaligned
2121 accesses only add a cycle or two to the time for a memory access.
2123 If the value of this macro is always zero, it need not be defined. */
2125 /* #define SLOW_UNALIGNED_ACCESS 0 */
2127 /* Define this macro to inhibit strength reduction of memory
2128 addresses. (On some machines, such strength reduction seems to do
2129 harm rather than good.) */
2131 /* #define DONT_REDUCE_ADDR */
2133 /* Define this macro if it is as good or better to call a constant
2134 function address than to call an address kept in a register.
2136 Desirable on the 386 because a CALL with a constant address is
2137 faster than one with a register address. */
2139 #define NO_FUNCTION_CSE
2141 /* Define this macro if it is as good or better for a function to call
2142 itself with an explicit address than to call an address kept in a
2145 #define NO_RECURSIVE_FUNCTION_CSE
2147 /* A C statement (sans semicolon) to update the integer variable COST
2148 based on the relationship between INSN that is dependent on
2149 DEP_INSN through the dependence LINK. The default is to make no
2150 adjustment to COST. This can be used for example to specify to
2151 the scheduler that an output- or anti-dependence does not incur
2152 the same cost as a data-dependence. */
2154 #define ADJUST_COST(insn,link,dep_insn,cost) \
2157 if (GET_CODE (dep_insn) == CALL_INSN) \
2160 else if (GET_CODE (dep_insn) == INSN \
2161 && GET_CODE (PATTERN (dep_insn)) == SET \
2162 && GET_CODE (SET_DEST (PATTERN (dep_insn))) == REG \
2163 && GET_CODE (insn) == INSN \
2164 && GET_CODE (PATTERN (insn)) == SET \
2165 && !reg_overlap_mentioned_p (SET_DEST (PATTERN (dep_insn)), \
2166 SET_SRC (PATTERN (insn)))) \
2171 else if (GET_CODE (insn) == JUMP_INSN) \
2176 if (TARGET_PENTIUM) \
2178 if (cost !=0 && is_fp_insn (insn) && is_fp_insn (dep_insn) \
2179 && !is_fp_dest (dep_insn)) \
2184 if (agi_dependent (insn, dep_insn)) \
2188 else if (GET_CODE (insn) == INSN \
2189 && GET_CODE (PATTERN (insn)) == SET \
2190 && SET_DEST (PATTERN (insn)) == cc0_rtx \
2191 && (next_inst = next_nonnote_insn (insn)) \
2192 && GET_CODE (next_inst) == JUMP_INSN) \
2193 { /* compare probably paired with jump */ \
2198 if (!is_fp_dest (dep_insn)) \
2200 if(!agi_dependent (insn, dep_insn)) \
2202 else if (TARGET_486) \
2206 if (is_fp_store (insn) && is_fp_insn (dep_insn) \
2207 && NEXT_INSN (insn) && NEXT_INSN (NEXT_INSN (insn)) \
2208 && NEXT_INSN (NEXT_INSN (NEXT_INSN (insn))) \
2209 && (GET_CODE (NEXT_INSN (insn)) == INSN) \
2210 && (GET_CODE (NEXT_INSN (NEXT_INSN (insn))) == JUMP_INSN) \
2211 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) == NOTE) \
2212 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) \
2213 == NOTE_INSN_LOOP_END)) \
2220 #define ADJUST_BLOCKAGE(last_insn,insn,blockage) \
2222 if (is_fp_store (last_insn) && is_fp_insn (insn) \
2223 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \
2224 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \
2225 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \
2226 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \
2227 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \
2228 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \
2229 == NOTE_INSN_LOOP_END)) \
2236 /* Add any extra modes needed to represent the condition code.
2238 For the i386, we need separate modes when floating-point equality
2239 comparisons are being done. */
2241 #define EXTRA_CC_MODES CCFPEQmode
2243 /* Define the names for the modes specified above. */
2244 #define EXTRA_CC_NAMES "CCFPEQ"
2246 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
2247 return the mode to be used for the comparison.
2249 For floating-point equality comparisons, CCFPEQmode should be used.
2250 VOIDmode should be used in all other cases. */
2252 #define SELECT_CC_MODE(OP,X,Y) \
2253 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2254 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
2256 /* Define the information needed to generate branch and scc insns. This is
2257 stored from the compare operation. Note that we can't use "rtx" here
2258 since it hasn't been defined! */
2260 extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
2262 /* Tell final.c how to eliminate redundant test instructions. */
2264 /* Here we define machine-dependent flags and fields in cc_status
2265 (see `conditions.h'). */
2267 /* Set if the cc value was actually from the 80387 and
2268 we are testing eax directly (i.e. no sahf) */
2269 #define CC_TEST_AX 020000
2271 /* Set if the cc value is actually in the 80387, so a floating point
2272 conditional branch must be output. */
2273 #define CC_IN_80387 04000
2275 /* Set if the CC value was stored in a nonstandard way, so that
2276 the state of equality is indicated by zero in the carry bit. */
2277 #define CC_Z_IN_NOT_C 010000
2279 /* Set if the CC value was actually from the 80387 and loaded directly
2280 into the eflags instead of via eax/sahf. */
2281 #define CC_FCOMI 040000
2283 /* Store in cc_status the expressions
2284 that the condition codes will describe
2285 after execution of an instruction whose pattern is EXP.
2286 Do not alter them if the instruction would not alter the cc's. */
2288 #define NOTICE_UPDATE_CC(EXP, INSN) \
2289 notice_update_cc((EXP))
2291 /* Output a signed jump insn. Use template NORMAL ordinarily, or
2292 FLOAT following a floating point comparison.
2293 Use NO_OV following an arithmetic insn that set the cc's
2294 before a test insn that was deleted.
2295 NO_OV may be zero, meaning final should reinsert the test insn
2296 because the jump cannot be handled properly without it. */
2298 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
2300 if (cc_prev_status.flags & CC_IN_80387) \
2302 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
2307 /* Control the assembler format that we output, to the extent
2308 this does not vary between assemblers. */
2310 /* How to refer to registers in assembler output.
2311 This sequence is indexed by compiler's hard-register-number (see above). */
2313 /* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
2314 For non floating point regs, the following are the HImode names.
2316 For float regs, the stack top is sometimes referred to as "%st(0)"
2317 instead of just "%st". PRINT_REG handles this with the "y" code. */
2319 #define HI_REGISTER_NAMES \
2320 {"ax","dx","cx","bx","si","di","bp","sp", \
2321 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
2323 #define REGISTER_NAMES HI_REGISTER_NAMES
2325 /* Table of additional register names to use in user input. */
2327 #define ADDITIONAL_REGISTER_NAMES \
2328 { "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
2329 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
2330 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
2331 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
2333 /* Note we are omitting these since currently I don't know how
2334 to get gcc to use these, since they want the same but different
2335 number as al, and ax.
2338 /* note the last four are not really qi_registers, but
2339 the md will have to never output movb into one of them
2340 only a movw . There is no movb into the last four regs */
2342 #define QI_REGISTER_NAMES \
2343 {"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
2345 /* These parallel the array above, and can be used to access bits 8:15
2346 of regs 0 through 3. */
2348 #define QI_HIGH_REGISTER_NAMES \
2349 {"ah", "dh", "ch", "bh", }
2351 /* How to renumber registers for dbx and gdb. */
2353 /* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
2354 #define DBX_REGISTER_NUMBER(n) \
2365 /* Before the prologue, RA is at 0(%esp). */
2366 #define INCOMING_RETURN_ADDR_RTX \
2367 gen_rtx (MEM, VOIDmode, gen_rtx (REG, VOIDmode, STACK_POINTER_REGNUM))
2369 /* PC is dbx register 8; let's use that column for RA. */
2370 #define DWARF_FRAME_RETURN_COLUMN 8
2372 /* Before the prologue, the top of the frame is at 4(%esp). */
2373 #define INCOMING_FRAME_SP_OFFSET 4
2375 /* This is how to output the definition of a user-level label named NAME,
2376 such as the label on a static function or variable NAME. */
2378 #define ASM_OUTPUT_LABEL(FILE,NAME) \
2379 (assemble_name (FILE, NAME), fputs (":\n", FILE))
2381 /* This is how to output an assembler line defining a `double' constant. */
2383 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2385 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
2386 if (sizeof (int) == sizeof (long)) \
2387 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, l[0], l[1]); \
2389 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
2392 /* This is how to output a `long double' extended real constant. */
2394 #undef ASM_OUTPUT_LONG_DOUBLE
2395 #define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
2397 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
2398 if (sizeof (int) == sizeof (long)) \
2399 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, l[0], l[1], l[2]); \
2401 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
2404 /* This is how to output an assembler line defining a `float' constant. */
2406 #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2408 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
2409 if (sizeof (int) == sizeof (long)) \
2410 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, l); \
2412 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
2415 /* Store in OUTPUT a string (made with alloca) containing
2416 an assembler-name for a local static variable named NAME.
2417 LABELNO is an integer which is different for each call. */
2419 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2420 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2421 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2425 /* This is how to output an assembler line defining an `int' constant. */
2427 #define ASM_OUTPUT_INT(FILE,VALUE) \
2428 ( fprintf (FILE, "%s ", ASM_LONG), \
2429 output_addr_const (FILE,(VALUE)), \
2432 /* Likewise for `char' and `short' constants. */
2433 /* is this supposed to do align too?? */
2435 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2436 ( fprintf (FILE, "%s ", ASM_SHORT), \
2437 output_addr_const (FILE,(VALUE)), \
2441 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
2442 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2443 output_addr_const (FILE,(VALUE)), \
2444 fputs (",", FILE), \
2445 output_addr_const (FILE,(VALUE)), \
2446 fputs (" >> 8\n",FILE))
2450 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
2451 ( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2452 output_addr_const (FILE, (VALUE)), \
2455 /* This is how to output an assembler line for a numeric constant byte. */
2457 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
2458 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
2460 /* This is how to output an insn to push a register on the stack.
2461 It need not be very fast code. */
2463 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
2464 fprintf (FILE, "\tpushl %%e%s\n", reg_names[REGNO])
2466 /* This is how to output an insn to pop a register from the stack.
2467 It need not be very fast code. */
2469 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
2470 fprintf (FILE, "\tpopl %%e%s\n", reg_names[REGNO])
2472 /* This is how to output an element of a case-vector that is absolute.
2475 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2476 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
2478 /* This is how to output an element of a case-vector that is relative.
2479 We don't use these on the 386 yet, because the ATT assembler can't do
2480 forward reference the differences.
2483 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
2484 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
2486 /* Define the parentheses used to group arithmetic operations
2487 in assembler code. */
2489 #define ASM_OPEN_PAREN ""
2490 #define ASM_CLOSE_PAREN ""
2492 /* Define results of standard character escape sequences. */
2493 #define TARGET_BELL 007
2494 #define TARGET_BS 010
2495 #define TARGET_TAB 011
2496 #define TARGET_NEWLINE 012
2497 #define TARGET_VT 013
2498 #define TARGET_FF 014
2499 #define TARGET_CR 015
2501 /* Print operand X (an rtx) in assembler syntax to file FILE.
2502 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2503 The CODE z takes the size of operand from the following digit, and
2504 outputs b,w,or l respectively.
2506 On the 80386, we use several such letters:
2507 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
2508 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
2509 R -- print the prefix for register names.
2510 z -- print the opcode suffix for the size of the current operand.
2511 * -- print a star (in certain assembler syntax)
2512 w -- print the operand as if it's a "word" (HImode) even if it isn't.
2513 b -- print the operand as if it's a byte (QImode) even if it isn't.
2514 c -- don't print special prefixes before constant operands. */
2516 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2519 /* Print the name of a register based on its machine mode and number.
2520 If CODE is 'w', pretend the mode is HImode.
2521 If CODE is 'b', pretend the mode is QImode.
2522 If CODE is 'k', pretend the mode is SImode.
2523 If CODE is 'h', pretend the reg is the `high' byte register.
2524 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2526 extern char *hi_reg_name[];
2527 extern char *qi_reg_name[];
2528 extern char *qi_high_reg_name[];
2530 #define PRINT_REG(X, CODE, FILE) \
2531 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
2533 fprintf (FILE, "%s", RP); \
2534 switch ((CODE == 'w' ? 2 \
2539 : GET_MODE_SIZE (GET_MODE (X)))) \
2542 if (STACK_TOP_P (X)) \
2544 fputs ("st(0)", FILE); \
2550 if (! FP_REG_P (X)) fputs ("e", FILE); \
2552 fputs (hi_reg_name[REGNO (X)], FILE); \
2555 fputs (qi_reg_name[REGNO (X)], FILE); \
2558 fputs (qi_high_reg_name[REGNO (X)], FILE); \
2563 #define PRINT_OPERAND(FILE, X, CODE) \
2564 print_operand (FILE, X, CODE)
2566 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2567 print_operand_address (FILE, ADDR)
2569 /* Print the name of a register for based on its machine mode and number.
2570 This macro is used to print debugging output.
2571 This macro is different from PRINT_REG in that it may be used in
2572 programs that are not linked with aux-output.o. */
2574 #define DEBUG_PRINT_REG(X, CODE, FILE) \
2575 do { static char *hi_name[] = HI_REGISTER_NAMES; \
2576 static char *qi_name[] = QI_REGISTER_NAMES; \
2577 fprintf (FILE, "%d %s", REGNO (X), RP); \
2578 if (REGNO (X) == ARG_POINTER_REGNUM) \
2579 { fputs ("argp", FILE); break; } \
2580 if (STACK_TOP_P (X)) \
2581 { fputs ("st(0)", FILE); break; } \
2583 { fputs (hi_name[REGNO(X)], FILE); break; } \
2584 switch (GET_MODE_SIZE (GET_MODE (X))) \
2587 fputs ("e", FILE); \
2589 fputs (hi_name[REGNO (X)], FILE); \
2592 fputs (qi_name[REGNO (X)], FILE); \
2597 /* Output the prefix for an immediate operand, or for an offset operand. */
2598 #define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
2599 #define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
2601 /* Routines in libgcc that return floats must return them in an fp reg,
2602 just as other functions do which return such values.
2603 These macros make that happen. */
2605 #define FLOAT_VALUE_TYPE float
2606 #define INTIFY(FLOATVAL) FLOATVAL
2608 /* Nonzero if INSN magically clobbers register REGNO. */
2610 /* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
2611 (FP_REGNO_P (REGNO) \
2612 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
2615 /* a letter which is not needed by the normal asm syntax, which
2616 we can use for operand syntax in the extended asm */
2618 #define ASM_OPERAND_LETTER '#'
2620 #define RET return ""
2621 #define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
2623 /* Helper macros to expand a binary/unary operator if needed */
2624 #define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \
2626 if (!ix86_expand_binary_operator (OP, MODE, OPERANDS)) \
2630 #define IX86_EXPAND_UNARY_OPERATOR(OP, MODE, OPERANDS) \
2632 if (!ix86_expand_unary_operator (OP, MODE, OPERANDS,)) \
2637 /* Functions in i386.c */
2638 extern void override_options ();
2639 extern void order_regs_for_local_alloc ();
2640 extern char *output_strlen_unroll ();
2641 extern struct rtx_def *i386_sext16_if_const ();
2642 extern int i386_aligned_p ();
2643 extern int i386_cc_probably_useless_p ();
2644 extern int i386_valid_decl_attribute_p ();
2645 extern int i386_valid_type_attribute_p ();
2646 extern int i386_return_pops_args ();
2647 extern int i386_comp_type_attributes ();
2648 extern void init_cumulative_args ();
2649 extern void function_arg_advance ();
2650 extern struct rtx_def *function_arg ();
2651 extern int function_arg_partial_nregs ();
2652 extern char *output_strlen_unroll ();
2653 extern void output_op_from_reg ();
2654 extern void output_to_reg ();
2655 extern char *singlemove_string ();
2656 extern char *output_move_double ();
2657 extern char *output_move_memory ();
2658 extern char *output_move_pushmem ();
2659 extern int standard_80387_constant_p ();
2660 extern char *output_move_const_single ();
2661 extern int symbolic_operand ();
2662 extern int call_insn_operand ();
2663 extern int expander_call_insn_operand ();
2664 extern int symbolic_reference_mentioned_p ();
2665 extern int ix86_expand_binary_operator ();
2666 extern int ix86_binary_operator_ok ();
2667 extern int ix86_expand_unary_operator ();
2668 extern int ix86_unary_operator_ok ();
2669 extern void emit_pic_move ();
2670 extern void function_prologue ();
2671 extern int simple_386_epilogue ();
2672 extern void function_epilogue ();
2673 extern int legitimate_address_p ();
2674 extern struct rtx_def *legitimize_pic_address ();
2675 extern struct rtx_def *legitimize_address ();
2676 extern void print_operand ();
2677 extern void print_operand_address ();
2678 extern void notice_update_cc ();
2679 extern void split_di ();
2680 extern int binary_387_op ();
2681 extern int shift_op ();
2682 extern int VOIDmode_compare_op ();
2683 extern char *output_387_binary_op ();
2684 extern char *output_fix_trunc ();
2685 extern char *output_float_compare ();
2686 extern char *output_fp_cc0_set ();
2687 extern void save_386_machine_status ();
2688 extern void restore_386_machine_status ();
2689 extern void clear_386_stack_locals ();
2690 extern struct rtx_def *assign_386_stack_local ();
2691 extern int is_mul ();
2692 extern int is_div ();
2693 extern int last_to_set_cc ();
2694 extern int doesnt_set_condition_code ();
2695 extern int sets_condition_code ();
2696 extern int str_immediate_operand ();
2697 extern int is_fp_insn ();
2698 extern int is_fp_dest ();
2699 extern int is_fp_store ();
2700 extern int agi_dependent ();
2701 extern int reg_mentioned_in_mem ();
2704 extern struct rtx_def *copy_all_rtx ();
2705 extern void rewrite_address ();
2708 /* Variables in i386.c */
2709 extern char *ix86_cpu_string; /* for -mcpu=<xxx> */
2710 extern char *ix86_arch_string; /* for -march=<xxx> */
2711 extern char *i386_reg_alloc_order; /* register allocation order */
2712 extern char *i386_regparm_string; /* # registers to use to pass args */
2713 extern char *i386_align_loops_string; /* power of two alignment for loops */
2714 extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */
2715 extern char *i386_align_funcs_string; /* power of two alignment for functions */
2716 extern char *i386_branch_cost_string; /* values 1-5: see jump.c */
2717 extern int i386_regparm; /* i386_regparm_string as a number */
2718 extern int i386_align_loops; /* power of two alignment for loops */
2719 extern int i386_align_jumps; /* power of two alignment for non-loop jumps */
2720 extern int i386_align_funcs; /* power of two alignment for functions */
2721 extern int i386_branch_cost; /* values 1-5: see jump.c */
2722 extern char *hi_reg_name[]; /* names for 16 bit regs */
2723 extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
2724 extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
2725 extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
2726 extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
2727 extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
2729 /* External variables used */
2730 extern int optimize; /* optimization level */
2731 extern int obey_regdecls; /* TRUE if stupid register allocation */
2733 /* External functions used */
2734 extern struct rtx_def *force_operand ();
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