1 /* Subroutines for the gcc driver.
2 Copyright (C) 2006, 2007 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
26 const char *host_detect_local_cpu (int argc, const char **argv);
31 /* Returns parameters that describe L1_ASSOC associative cache of size
32 L1_SIZEKB with lines of size L1_LINE. */
35 describe_cache (unsigned l1_sizekb, unsigned l1_line,
36 unsigned l1_assoc ATTRIBUTE_UNUSED)
38 char size[100], line[100];
40 /* At the moment, gcc middle-end does not use the information about the
41 associativity of the cache. */
43 sprintf (size, "--param l1-cache-size=%u", l1_sizekb);
44 sprintf (line, "--param l1-cache-line-size=%u", l1_line);
46 return concat (size, " ", line, " ", NULL);
49 /* Returns the description of caches for an AMD processor. */
52 detect_caches_amd (unsigned max_ext_level)
54 unsigned eax, ebx, ecx, edx;
55 unsigned l1_sizekb, l1_line, l1_assoc;
57 if (max_ext_level < 0x80000005)
60 __cpuid (0x80000005, eax, ebx, ecx, edx);
63 l1_sizekb = (ecx >> 24) & 0xff;
64 l1_assoc = (ecx >> 16) & 0xff;
66 return describe_cache (l1_sizekb, l1_line, l1_assoc);
69 /* Stores the size of the L1 cache and cache line, and the associativity
70 of the cache according to REG to L1_SIZEKB, L1_LINE and L1_ASSOC. */
73 decode_caches_intel (unsigned reg, unsigned *l1_sizekb, unsigned *l1_line,
78 if (((reg >> 31) & 1) != 0)
81 for (i = 0; i < 4; i++)
130 /* Returns the description of caches for an intel processor. */
133 detect_caches_intel (unsigned max_level)
135 unsigned eax, ebx, ecx, edx;
136 unsigned l1_sizekb = 0, l1_line = 0, assoc = 0;
141 __cpuid (2, eax, ebx, ecx, edx);
143 decode_caches_intel (eax, &l1_sizekb, &l1_line, &assoc);
144 decode_caches_intel (ebx, &l1_sizekb, &l1_line, &assoc);
145 decode_caches_intel (ecx, &l1_sizekb, &l1_line, &assoc);
146 decode_caches_intel (edx, &l1_sizekb, &l1_line, &assoc);
151 return describe_cache (l1_sizekb, l1_line, assoc);
154 /* This will be called by the spec parser in gcc.c when it sees
155 a %:local_cpu_detect(args) construct. Currently it will be called
156 with either "arch" or "tune" as argument depending on if -march=native
157 or -mtune=native is to be substituted.
159 It returns a string containing new command line parameters to be
160 put at the place of the above two options, depending on what CPU
161 this is executed. E.g. "-march=k8" on an AMD64 machine
164 ARGC and ARGV are set depending on the actual arguments given
167 const char *host_detect_local_cpu (int argc, const char **argv)
169 enum processor_type processor = PROCESSOR_I386;
170 const char *cpu = "i386";
172 const char *cache = "";
173 const char *options = "";
175 unsigned int eax, ebx, ecx, edx;
177 unsigned int max_level, ext_level;
181 unsigned int has_sse3, has_ssse3, has_cmpxchg16b;
182 unsigned int has_cmpxchg8b, has_cmov, has_mmx, has_sse, has_sse2;
184 /* Extended features */
185 unsigned int has_lahf_lm = 0, has_sse4a = 0;
186 unsigned int has_longmode = 0, has_3dnowp = 0, has_3dnow = 0;
193 arch = !strcmp (argv[0], "arch");
195 if (!arch && strcmp (argv[0], "tune"))
198 max_level = __get_cpuid_max (0, &vendor);
202 __cpuid (1, eax, ebx, ecx, edx);
204 /* We don't care for extended family. */
205 family = (eax >> 8) & 0x0f;
207 has_sse3 = ecx & bit_SSE3;
208 has_ssse3 = ecx & bit_SSSE3;
209 has_cmpxchg16b = ecx & bit_CMPXCHG16B;
211 has_cmpxchg8b = edx & bit_CMPXCHG8B;
212 has_cmov = edx & bit_CMOV;
213 has_mmx = edx & bit_MMX;
214 has_sse = edx & bit_SSE;
215 has_sse2 = edx & bit_SSE2;
217 /* Check cpuid level of extended features. */
218 __cpuid (0x80000000, ext_level, ebx, ecx, edx);
220 if (ext_level > 0x80000000)
222 __cpuid (0x80000001, eax, ebx, ecx, edx);
224 has_lahf_lm = ecx & bit_LAHF_LM;
225 has_sse4a = ecx & bit_SSE4a;
227 has_longmode = edx & bit_LM;
228 has_3dnowp = edx & bit_3DNOWP;
229 has_3dnow = edx & bit_3DNOW;
234 if (vendor == *(unsigned int*) "Auth")
235 cache = detect_caches_amd (ext_level);
236 else if (vendor == *(unsigned int*) "Genu")
237 cache = detect_caches_intel (max_level);
240 if (vendor == *(unsigned int*) "Auth")
242 processor = PROCESSOR_PENTIUM;
245 processor = PROCESSOR_K6;
247 processor = PROCESSOR_ATHLON;
248 if (has_sse2 || has_longmode)
249 processor = PROCESSOR_K8;
251 processor = PROCESSOR_AMDFAM10;
253 else if (vendor == *(unsigned int*) "Geod")
254 processor = PROCESSOR_GEODE;
260 processor = PROCESSOR_I486;
263 processor = PROCESSOR_PENTIUM;
266 processor = PROCESSOR_PENTIUMPRO;
269 processor = PROCESSOR_PENTIUM4;
272 /* We have no idea. */
273 processor = PROCESSOR_GENERIC32;
285 case PROCESSOR_PENTIUM:
291 case PROCESSOR_PENTIUMPRO:
293 /* It is Core 2 Duo. */
298 /* It is Core Duo. */
301 /* It is Pentium M. */
304 /* It is Pentium III. */
307 /* It is Pentium II. */
310 /* Default to Pentium Pro. */
314 /* For -mtune, we default to -mtune=generic. */
317 case PROCESSOR_PENTIUM4:
328 case PROCESSOR_GEODE:
332 if (arch && has_3dnow)
337 case PROCESSOR_ATHLON:
344 if (arch && has_sse3)
349 case PROCESSOR_AMDFAM10:
354 /* Use something reasonable. */
372 else if (has_cmpxchg8b)
382 options = concat (options, "-mcx16 ", NULL);
384 options = concat (options, "-msahf ", NULL);
388 return concat (cache, "-m", argv[0], "=", cpu, " ", options, NULL);
392 /* If we aren't compiling with GCC we just provide a minimal
395 const char *host_detect_local_cpu (int argc, const char **argv)
403 arch = !strcmp (argv[0], "arch");
405 if (!arch && strcmp (argv[0], "tune"))
410 /* FIXME: i386 is wrong for 64bit compiler. How can we tell if
411 we are generating 64bit or 32bit code? */
417 return concat ("-m", argv[0], "=", cpu, NULL);
419 #endif /* __GNUC__ */