1 /* Definitions of target machine for GNU compiler. System/370 version.
2 Copyright (C) 1989, 1993, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
3 2003 Free Software Foundation, Inc.
4 Contributed by Jan Stein (jan@cd.chalmers.se).
5 Modified for OS/390 LanguageEnvironment C by Dave Pitts (dpitts@cozx.com)
6 Hacked for Linux-ELF/390 by Linas Vepstas (linas@linas.org)
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
28 /* Target CPU builtins. */
29 #define TARGET_CPU_CPP_BUILTINS() \
32 builtin_define_std ("GCC"); \
33 builtin_define_std ("gcc"); \
34 builtin_assert ("machine=i370"); \
35 builtin_assert ("cpu=i370"); \
39 /* Run-time compilation parameters selecting different hardware subsets. */
41 extern int target_flags;
43 /* The sizes of the code and literals on the current page. */
45 extern int mvs_page_code, mvs_page_lit;
47 /* The current page number and the base page number for the function. */
49 extern int mvs_page_num, function_base_page;
51 /* The name of the current function. */
53 extern char *mvs_function_name;
55 /* The length of the function name malloc'd area. */
57 extern int mvs_function_name_length;
59 /* Compile using char instructions (mvc, nc, oc, xc). On 4341 use this since
60 these are more than twice as fast as load-op-store.
61 On 3090 don't use this since load-op-store is much faster. */
63 #define TARGET_CHAR_INSTRUCTIONS (target_flags & 1)
65 /* Default target switches */
67 #define TARGET_DEFAULT 1
69 /* Macro to define tables used to set the flags. This is a list in braces
70 of pairs in braces, each pair being { "NAME", VALUE }
71 where VALUE is the bits to set or minus the bits to clear.
72 An empty string NAME is used to identify the default VALUE. */
74 #define TARGET_SWITCHES \
75 { { "char-instructions", 1, N_("Generate char instructions")}, \
76 { "no-char-instructions", -1, N_("Do not generate char instructions")}, \
77 { "", TARGET_DEFAULT, 0} }
79 #define OVERRIDE_OPTIONS override_options ()
81 /* To use IBM supplied macro function prologue and epilogue, define the
82 following to 1. Should only be needed if IBM changes the definition
83 of their prologue and epilogue. */
85 #define MACROPROLOGUE 0
86 #define MACROEPILOGUE 0
88 /* Target machine storage layout */
90 /* Define this if most significant bit is lowest numbered in instructions
91 that operate on numbered bit-fields. */
93 #define BITS_BIG_ENDIAN 1
95 /* Define this if most significant byte of a word is the lowest numbered. */
97 #define BYTES_BIG_ENDIAN 1
99 /* Define this if MS word of a multiword is the lowest numbered. */
101 #define WORDS_BIG_ENDIAN 1
103 /* Width of a word, in units (bytes). */
105 #define UNITS_PER_WORD 4
107 /* Allocation boundary (in *bits*) for storing pointers in memory. */
109 #define POINTER_BOUNDARY 32
111 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
113 #define PARM_BOUNDARY 32
115 /* Boundary (in *bits*) on which stack pointer should be aligned. */
117 #define STACK_BOUNDARY 32
119 /* Allocation boundary (in *bits*) for the code of a function. */
121 #define FUNCTION_BOUNDARY 32
123 /* There is no point aligning anything to a rounder boundary than this. */
125 #define BIGGEST_ALIGNMENT 64
127 /* Alignment of field after `int : 0' in a structure. */
129 #define EMPTY_FIELD_BOUNDARY 32
131 /* Define this if move instructions will actually fail to work when given
134 #define STRICT_ALIGNMENT 0
136 /* Define target floating point format. */
138 #define TARGET_FLOAT_FORMAT IBM_FLOAT_FORMAT
140 /* Define character mapping for cross-compiling. */
141 /* but only define it if really needed, since otherwise it will break builds */
145 #define MAP_CHARACTER(c) ((char)(c))
147 #define MAP_CHARACTER(c) ((char)mvs_map_char (c))
152 /* HLASM requires #pragma map. */
153 #define REGISTER_TARGET_PRAGMAS() c_register_pragma (0, "map", i370_pr_map)
154 #endif /* TARGET_HLASM */
156 /* Define maximum length of page minus page escape overhead. */
158 #define MAX_MVS_PAGE_LENGTH 4080
160 /* Define special register allocation order desired.
161 Don't fiddle with this. I did, and I got all sorts of register
162 spill errors when compiling even relatively simple programs...
163 I have no clue why ...
164 E.g. this one is bad:
165 { 0, 1, 2, 9, 8, 7, 6, 5, 10, 15, 14, 12, 3, 4, 16, 17, 18, 19, 11, 13 }
168 #define REG_ALLOC_ORDER \
169 { 0, 1, 2, 3, 14, 15, 12, 10, 9, 8, 7, 6, 5, 4, 16, 17, 18, 19, 11, 13 }
171 /* Standard register usage. */
173 /* Number of actual hardware registers. The hardware registers are
174 assigned numbers for the compiler from 0 to just below
175 FIRST_PSEUDO_REGISTER.
176 All registers that the compiler knows about must be given numbers,
177 even those that are not normally considered general registers.
178 For the 370, we give the data registers numbers 0-15,
179 and the floating point registers numbers 16-19. */
181 #define FIRST_PSEUDO_REGISTER 20
183 /* Define base and page registers. */
185 #define BASE_REGISTER 3
186 #define PAGE_REGISTER 4
189 /* 1 for registers that have pervasive standard uses and are not available
190 for the register allocator. These are registers that must have fixed,
191 valid values stored in them for the entire length of the subroutine call,
192 and must not in any way be moved around, jiggered with, etc. That is,
193 they must never be clobbered, and, if clobbered, the register allocator
194 will never restore them back.
196 We use five registers in this special way:
197 -- R3 which is used as the base register
198 -- R4 the page origin table pointer used to load R3,
199 -- R11 the arg pointer.
200 -- R12 the TCA pointer
201 -- R13 the stack (DSA) pointer
203 A fifth register is also exceptional: R14 is used in many branch
204 instructions to hold the target of the branch. Technically, this
205 does not qualify R14 as a register with a long-term meaning; it should
206 be enough, theoretically, to note that these instructions clobber
207 R14, and let the compiler deal with that. In practice, however,
208 the "clobber" directive acts as a barrier to optimization, and the
209 optimizer appears to be unable to perform optimizations around branches.
210 Thus, a much better strategy appears to give R14 a pervasive use;
211 this eliminates it from the register pool witout hurting optimization.
213 There are other registers which have special meanings, but its OK
214 for them to get clobbered, since other allocator config below will
215 make sure that they always have the right value. These are for
217 -- R1 the returned structure pointer.
218 -- R10 the static chain reg.
219 -- R15 holds the value a subroutine returns.
221 Notice that it is *almost* safe to mark R11 as available to the allocator.
222 By marking it as a call_used_register, in most cases, the compiler
223 can handle it being clobbered. However, there are a few rare
224 circumstances where the register allocator will allocate r11 and
225 also try to use it as the arg pointer ... thus it must be marked fixed.
226 I think this is a bug, but I can't track it down...
229 #define FIXED_REGISTERS \
230 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0, 0 }
231 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
233 /* 1 for registers not available across function calls. These must include
234 the FIXED_REGISTERS and also any registers that can be used without being
236 The latter must include the registers where values are returned
237 and the register where structure-value addresses are passed.
238 NOTE: all floating registers are undefined across calls.
241 #define CALL_USED_REGISTERS \
242 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
243 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
245 /* Return number of consecutive hard regs needed starting at reg REGNO
246 to hold something of mode MODE.
247 This is ordinarily the length in words of a value of mode MODE
248 but can be less for certain modes in special long registers.
249 Note that DCmode (complex double) needs two regs.
251 #endif /* TARGET_HLASM */
253 /* ================= */
254 #ifdef TARGET_ELF_ABI
255 /* The Linux/ELF ABI uses the same register layout as the
256 * the MVS/OE version, with the following exceptions:
257 * -- r12 (rtca) is not used.
260 #define FIXED_REGISTERS \
261 { 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0 }
262 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
264 #define CALL_USED_REGISTERS \
265 { 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1 }
266 /*0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19*/
268 #endif /* TARGET_ELF_ABI */
269 /* ================= */
272 #define HARD_REGNO_NREGS(REGNO, MODE) \
274 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
275 (GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD)
277 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
278 On the 370, the cpu registers can hold QI, HI, SI, SF and DF. The
279 even registers can hold DI. The floating point registers can hold
280 either SF, DF, SC or DC. */
282 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
283 ((REGNO) < 16 ? (((REGNO) & 1) == 0 || \
284 (((MODE) != DImode) && ((MODE) != DFmode))) \
285 : ((MODE) == SFmode || (MODE) == DFmode) || \
286 (MODE) == SCmode || (MODE) == DCmode)
288 /* Value is 1 if it is a good idea to tie two pseudo registers when one has
289 mode MODE1 and one has mode MODE2.
290 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
291 for any hard reg, then this must be 0 for correct output. */
293 #define MODES_TIEABLE_P(MODE1, MODE2) \
294 (((MODE1) == SFmode || (MODE1) == DFmode) \
295 == ((MODE2) == SFmode || (MODE2) == DFmode))
297 /* Specify the registers used for certain standard purposes.
298 The values of these macros are register numbers. */
300 /* 370 PC isn't overloaded on a register. */
302 /* #define PC_REGNUM */
304 /* Register to use for pushing function arguments. */
306 #define STACK_POINTER_REGNUM 13
308 /* Base register for access to local variables of the function. */
310 #define FRAME_POINTER_REGNUM 13
312 /* Value should be nonzero if functions must have frame pointers.
313 Zero means the frame pointer need not be set up (and parms may be
314 accessed via the stack pointer) in functions that seem suitable.
315 This is computed in `reload', in reload1.c. */
317 #define FRAME_POINTER_REQUIRED 1
319 /* Base register for access to arguments of the function. */
321 #define ARG_POINTER_REGNUM 11
323 /* R10 is register in which static-chain is passed to a function.
324 Static-chaining is done when a nested function references as a global
325 a stack variable of its parent: e.g.
326 int parent_func (int arg) {
327 int x; // x is in parents stack
328 void child_func (void) { x++: } // child references x as global var
333 #define STATIC_CHAIN_REGNUM 10
335 /* R1 is register in which address to store a structure value is passed to
336 a function. This is used only when returning 64-bit long-long in a 32-bit arch
337 and when calling functions that return structs by value. e.g.
338 typedef struct A_s { int a,b,c; } A_t;
339 A_t fun_returns_value (void) {
340 A_t a; a.a=1; a.b=2 a.c=3;
343 In the above, the storage for the return value is in the callers stack, and
344 the R1 points at that mem location.
347 #define STRUCT_VALUE_REGNUM 1
349 /* Define the classes of registers for register constraints in the
350 machine description. Also define ranges of constants.
352 One of the classes must always be named ALL_REGS and include all hard regs.
353 If there is more than one class, another class must be named NO_REGS
354 and contain no registers.
356 The name GENERAL_REGS must be the name of a class (or an alias for
357 another name such as ALL_REGS). This is the class of registers
358 that is allowed by "g" or "r" in a register constraint.
359 Also, registers outside this class are allocated only when
360 instructions express preferences for them.
362 The classes must be numbered in nondecreasing order; that is,
363 a larger-numbered class must never be contained completely
364 in a smaller-numbered class.
366 For any two classes, it is very desirable that there be another
367 class that represents their union. */
371 NO_REGS, ADDR_REGS, DATA_REGS,
372 FP_REGS, ALL_REGS, LIM_REG_CLASSES
375 #define GENERAL_REGS DATA_REGS
376 #define N_REG_CLASSES (int) LIM_REG_CLASSES
378 /* Give names of register classes as strings for dump file. */
380 #define REG_CLASS_NAMES \
381 { "NO_REGS", "ADDR_REGS", "DATA_REGS", "FP_REGS", "ALL_REGS" }
383 /* Define which registers fit in which classes. This is an initializer for
384 a vector of HARD_REG_SET of length N_REG_CLASSES. */
386 #define REG_CLASS_CONTENTS {{0}, {0x0fffe}, {0x0ffff}, {0xf0000}, {0xfffff}}
388 /* The same information, inverted:
389 Return the class number of the smallest class containing
390 reg number REGNO. This could be a conditional expression
391 or could index an array. */
393 #define REGNO_REG_CLASS(REGNO) \
394 ((REGNO) >= 16 ? FP_REGS : (REGNO) != 0 ? ADDR_REGS : DATA_REGS)
396 /* The class value for index registers, and the one for base regs. */
398 #define INDEX_REG_CLASS ADDR_REGS
399 #define BASE_REG_CLASS ADDR_REGS
401 /* Get reg_class from a letter such as appears in the machine description. */
403 #define REG_CLASS_FROM_LETTER(C) \
404 ((C) == 'a' ? ADDR_REGS : \
405 ((C) == 'd' ? DATA_REGS : \
406 ((C) == 'f' ? FP_REGS : NO_REGS)))
408 /* The letters I, J, K, L and M in a register constraint string can be used
409 to stand for particular ranges of immediate operands.
410 This macro defines what the ranges are.
411 C is the letter, and VALUE is a constant value.
412 Return 1 if VALUE is in the range specified by C. */
414 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
415 ((C) == 'I' ? (unsigned) (VALUE) < 256 : \
416 (C) == 'J' ? (unsigned) (VALUE) < 4096 : \
417 (C) == 'K' ? (VALUE) >= -32768 && (VALUE) < 32768 : 0)
419 /* Similar, but for floating constants, and defining letters G and H.
420 Here VALUE is the CONST_DOUBLE rtx itself. */
422 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
424 /* see recog.c for details */
425 #define EXTRA_CONSTRAINT(OP,C) \
426 ((C) == 'R' ? r_or_s_operand (OP, GET_MODE(OP)) : \
427 (C) == 'S' ? s_operand (OP, GET_MODE(OP)) : 0) \
429 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
430 return the class of reg to actually use. In general this is just CLASS;
431 but on some machines in some cases it is preferable to use a more
434 XXX We reload CONST_INT's into ADDR not DATA regs because on certain
435 rare occasions when lots of egisters are spilled, reload() will try
436 to put a const int into r0 and then use r0 as an index register.
439 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
440 (GET_CODE(X) == CONST_DOUBLE ? FP_REGS : \
441 GET_CODE(X) == CONST_INT ? (reload_in_progress ? ADDR_REGS : DATA_REGS) : \
442 GET_CODE(X) == LABEL_REF || \
443 GET_CODE(X) == SYMBOL_REF || \
444 GET_CODE(X) == CONST ? ADDR_REGS : (CLASS))
446 /* Return the maximum number of consecutive registers needed to represent
447 mode MODE in a register of class CLASS.
448 Note that DCmode (complex double) needs two regs.
451 #define CLASS_MAX_NREGS(CLASS, MODE) \
452 ((CLASS) == FP_REGS ? \
453 ((GET_MODE_SIZE (MODE) + 2*UNITS_PER_WORD - 1) / (2*UNITS_PER_WORD)) : \
454 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
456 /* Stack layout; function entry, exit and calling. */
458 /* Define this if pushing a word on the stack makes the stack pointer a
460 /* ------------------------------------------------------------------- */
462 /* ================= */
464 /* #define STACK_GROWS_DOWNWARD */
466 /* Define this if the nominal address of the stack frame is at the
467 high-address end of the local variables; that is, each additional local
468 variable allocated goes at a more negative offset in the frame. */
470 /* #define FRAME_GROWS_DOWNWARD */
472 /* Offset within stack frame to start allocating local variables at.
473 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
474 first local allocated. Otherwise, it is the offset to the BEGINNING
475 of the first local allocated. */
477 #define STARTING_FRAME_OFFSET \
478 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
480 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
482 /* If we generate an insn to push BYTES bytes, this says how many the stack
483 pointer really advances by. On the 370, we have no push instruction. */
485 #endif /* TARGET_HLASM */
487 /* ================= */
488 #ifdef TARGET_ELF_ABI
490 /* With ELF/Linux, stack is placed at large virtual addrs and grows down.
491 But we want the compiler to generate posistive displacements from the
492 stack pointer, and so we make the frame lie above the stack. */
494 #define STACK_GROWS_DOWNWARD
495 /* #define FRAME_GROWS_DOWNWARD */
497 /* Offset within stack frame to start allocating local variables at.
498 This is the offset to the BEGINNING of the first local allocated. */
500 #define STARTING_FRAME_OFFSET \
501 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
503 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = STARTING_FRAME_OFFSET
505 #endif /* TARGET_ELF_ABI */
506 /* ================= */
508 /* #define PUSH_ROUNDING(BYTES) */
510 /* Accumulate the outgoing argument count so we can request the right
511 DSA size and determine stack offset. */
513 #define ACCUMULATE_OUTGOING_ARGS 1
515 /* Define offset from stack pointer, to location where a parm can be
518 #define STACK_POINTER_OFFSET 148
520 /* Offset of first parameter from the argument pointer register value. */
522 #define FIRST_PARM_OFFSET(FNDECL) 0
524 /* 1 if N is a possible register number for function argument passing.
525 On the 370, no registers are used in this way. */
527 #define FUNCTION_ARG_REGNO_P(N) 0
529 /* Define a data type for recording info about an argument list during
530 the scan of that argument list. This data type should hold all
531 necessary information about the function itself and about the args
532 processed so far, enough to enable macros such as FUNCTION_ARG to
533 determine where the next arg should go. */
535 #define CUMULATIVE_ARGS int
537 /* Initialize a variable CUM of type CUMULATIVE_ARGS for a call to
538 a function whose data type is FNTYPE.
539 For a library call, FNTYPE is 0. */
541 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT) ((CUM) = 0)
543 /* Update the data in CUM to advance over an argument of mode MODE and
544 data type TYPE. (TYPE is null for libcalls where that information
545 may not be available.) */
547 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
548 ((CUM) += ((MODE) == DFmode || (MODE) == SFmode \
550 : (MODE) != BLKmode \
551 ? (GET_MODE_SIZE (MODE) + 3) / 4 \
552 : (int_size_in_bytes (TYPE) + 3) / 4))
554 /* Define where to put the arguments to a function. Value is zero to push
555 the argument on the stack, or a hard register in which to store the
558 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
560 /* For an arg passed partly in registers and partly in memory, this is the
561 number of registers used. For args passed entirely in registers or
562 entirely in memory, zero. */
564 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
566 /* Define if returning from a function call automatically pops the
567 arguments described by the number-of-args field in the call. */
569 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
571 /* The FUNCTION_VALUE macro defines how to find the value returned by a
572 function. VALTYPE is the data type of the value (as a tree).
573 If the precise function being called is known, FUNC is its FUNCTION_DECL;
574 otherwise, FUNC is NULL.
576 On the 370 the return value is in R15 or R16. However,
577 DImode (64-bit ints) scalars need to get returned on the stack,
578 with r15 pointing to the location. To accomplish this, we define
579 the RETURN_IN_MEMORY macro to be true for both blockmode (structures)
580 and the DImode scalars.
583 #define RET_REG(MODE) \
584 (((MODE) == DCmode || (MODE) == SCmode || (MODE) == TFmode || (MODE) == DFmode || (MODE) == SFmode) ? 16 : 15)
586 #define FUNCTION_VALUE(VALTYPE, FUNC) \
587 gen_rtx_REG (TYPE_MODE (VALTYPE), RET_REG (TYPE_MODE (VALTYPE)))
589 #define RETURN_IN_MEMORY(VALTYPE) \
590 ((DImode == TYPE_MODE (VALTYPE)) || (BLKmode == TYPE_MODE (VALTYPE)))
592 /* Define how to find the value returned by a library function assuming
593 the value has mode MODE. */
595 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, RET_REG (MODE))
597 /* 1 if N is a possible register number for a function value.
598 On the 370 under C/370, R15 and R16 are thus used. */
600 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 15 || (N) == 16)
602 /* This macro definition sets up a default value for `main' to return. */
604 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
607 /* Output assembler code for a block containing the constant parts of a
608 trampoline, leaving space for the variable parts.
610 On the 370, the trampoline contains these instructions:
614 L STATIC_CHAIN_REGISTER,X
620 I am confused as to why this emitting raw binary, instead of instructions ...
621 see for example, rs6000/rs000.c for an example of a different way to
622 do this ... especially since BASR should probably be substituted for BALR.
625 #define TRAMPOLINE_TEMPLATE(FILE) \
627 assemble_aligned_integer (2, GEN_INT (0x05E0)); \
628 assemble_aligned_integer (2, GEN_INT (0x5800 | STATIC_CHAIN_REGNUM << 4)); \
629 assemble_aligned_integer (2, GEN_INT (0xE00A)); \
630 assemble_aligned_integer (2, GEN_INT (0x58F0)); \
631 assemble_aligned_integer (2, GEN_INT (0xE00E)); \
632 assemble_aligned_integer (2, GEN_INT (0x07FF)); \
633 assemble_aligned_integer (2, const0_rtx); \
634 assemble_aligned_integer (2, const0_rtx); \
635 assemble_aligned_integer (2, const0_rtx); \
636 assemble_aligned_integer (2, const0_rtx); \
639 /* Length in units of the trampoline for entering a nested function. */
641 #define TRAMPOLINE_SIZE 20
643 /* Emit RTL insns to initialize the variable parts of a trampoline. */
645 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
647 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), CXT); \
648 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 16)), FNADDR); \
651 /* Define EXIT_IGNORE_STACK if, when returning from a function, the stack
652 pointer does not matter (provided there is a frame pointer). */
654 #define EXIT_IGNORE_STACK 1
656 /* Addressing modes, and classification of registers for them. */
658 /* These assume that REGNO is a hard or pseudo reg number. They give
659 nonzero only if REGNO is a hard reg of the suitable class or a pseudo
660 reg currently allocated to a suitable hard reg.
661 These definitions are NOT overridden anywhere. */
663 #define REGNO_OK_FOR_INDEX_P(REGNO) \
664 (((REGNO) > 0 && (REGNO) < 16) \
665 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
667 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P(REGNO)
669 #define REGNO_OK_FOR_DATA_P(REGNO) \
670 ((REGNO) < 16 || (unsigned) reg_renumber[REGNO] < 16)
672 #define REGNO_OK_FOR_FP_P(REGNO) \
673 ((unsigned) ((REGNO) - 16) < 4 || (unsigned) (reg_renumber[REGNO] - 16) < 4)
675 /* Now macros that check whether X is a register and also,
676 strictly, whether it is in a specified class. */
678 /* 1 if X is a data register. */
680 #define DATA_REG_P(X) (REG_P (X) && REGNO_OK_FOR_DATA_P (REGNO (X)))
682 /* 1 if X is an fp register. */
684 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
686 /* 1 if X is an address register. */
688 #define ADDRESS_REG_P(X) (REG_P (X) && REGNO_OK_FOR_BASE_P (REGNO (X)))
690 /* Maximum number of registers that can appear in a valid memory address. */
692 #define MAX_REGS_PER_ADDRESS 2
694 /* Recognize any constant value that is a valid address. */
696 #define CONSTANT_ADDRESS_P(X) \
697 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
698 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE \
699 || (GET_CODE (X) == CONST \
700 && GET_CODE (XEXP (XEXP (X, 0), 0)) == LABEL_REF) \
701 || (GET_CODE (X) == CONST \
702 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF \
703 && !SYMBOL_REF_EXTERNAL_P (XEXP (XEXP (X, 0), 0))))
705 /* Nonzero if the constant value X is a legitimate general operand.
706 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
708 #define LEGITIMATE_CONSTANT_P(X) 1
710 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
711 its validity for a certain class. We have two alternate definitions
712 for each of them. The usual definition accepts all pseudo regs; the
713 other rejects them all. The symbol REG_OK_STRICT causes the latter
714 definition to be used.
716 Most source files want to accept pseudo regs in the hope that they will
717 get allocated to the class that the insn wants them to be in.
718 Some source files that are used after register allocation
719 need to be strict. */
721 #ifndef REG_OK_STRICT
723 /* Nonzero if X is a hard reg that can be used as an index or if it is
726 #define REG_OK_FOR_INDEX_P(X) \
727 ((REGNO(X) > 0 && REGNO(X) < 16) || REGNO(X) >= 20)
729 /* Nonzero if X is a hard reg that can be used as a base reg or if it is
732 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_INDEX_P(X)
734 #else /* REG_OK_STRICT */
736 /* Nonzero if X is a hard reg that can be used as an index. */
738 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P(REGNO(X))
740 /* Nonzero if X is a hard reg that can be used as a base reg. */
742 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P(REGNO(X))
744 #endif /* REG_OK_STRICT */
746 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
747 valid memory address for an instruction.
748 The MODE argument is the machine mode for the MEM expression
749 that wants to use this address.
751 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
752 except for CONSTANT_ADDRESS_P which is actually machine-independent.
755 #define COUNT_REGS(X, REGS, FAIL) \
757 if (REG_OK_FOR_BASE_P (X)) REGS += 1; \
760 else if (GET_CODE (X) != CONST_INT || (unsigned) INTVAL (X) >= 4096) \
763 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
765 if (REG_P (X) && REG_OK_FOR_BASE_P (X)) \
767 if (GET_CODE (X) == PLUS) \
770 rtx x0 = XEXP (X, 0); \
771 rtx x1 = XEXP (X, 1); \
772 if (GET_CODE (x0) == PLUS) \
774 COUNT_REGS (XEXP (x0, 0), regs, FAIL); \
775 COUNT_REGS (XEXP (x0, 1), regs, FAIL); \
776 COUNT_REGS (x1, regs, FAIL); \
780 else if (GET_CODE (x1) == PLUS) \
782 COUNT_REGS (x0, regs, FAIL); \
783 COUNT_REGS (XEXP (x1, 0), regs, FAIL); \
784 COUNT_REGS (XEXP (x1, 1), regs, FAIL); \
790 COUNT_REGS (x0, regs, FAIL); \
791 COUNT_REGS (x1, regs, FAIL); \
799 /* The 370 has no mode dependent addresses. */
801 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
803 /* Macro: LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
804 Try machine-dependent ways of modifying an illegitimate address
805 to be legitimate. If we find one, return the new, valid address.
806 This macro is used in only one place: `memory_address' in explow.c.
809 (1) It's not obvious that this macro results in better code
810 than its omission does. For historical reasons we leave it in.
812 (2) This macro may be (???) implicated in the accidental promotion
813 or RS operand to RX operands, which bombs out any RS, SI, SS
814 instruction that was expecting a simple address. Note that
815 this occurs fairly rarely ...
817 (3) There is a bug somewhere that causes either r4 to be spilled,
818 or causes r0 to be used as a base register. Changeing the macro
819 below will make the bug move around, but will not make it go away
820 ... Note that this is a rare bug ...
824 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
826 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
827 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
828 copy_to_mode_reg (SImode, XEXP (X, 1))); \
829 if (GET_CODE (X) == PLUS && CONSTANT_ADDRESS_P (XEXP (X, 0))) \
830 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
831 copy_to_mode_reg (SImode, XEXP (X, 0))); \
832 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == MULT) \
833 (X) = gen_rtx_PLUS (SImode, XEXP (X, 1), \
834 force_operand (XEXP (X, 0), 0)); \
835 if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == MULT) \
836 (X) = gen_rtx_PLUS (SImode, XEXP (X, 0), \
837 force_operand (XEXP (X, 1), 0)); \
838 if (memory_address_p (MODE, X)) \
842 /* Specify the machine mode that this machine uses for the index in the
843 tablejump instruction. */
845 #define CASE_VECTOR_MODE SImode
847 /* Define this if the tablejump instruction expects the table to contain
848 offsets from the address of the table.
849 Do not define this if the table should contain absolute addresses. */
851 /* #define CASE_VECTOR_PC_RELATIVE */
853 /* Define this if fixuns_trunc is the same as fix_trunc. */
855 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
857 /* We use "unsigned char" as default. */
859 #define DEFAULT_SIGNED_CHAR 0
861 /* Max number of bytes we can move from memory to memory in one reasonably
866 /* Nonzero if access to memory by bytes is slow and undesirable. */
868 #define SLOW_BYTE_ACCESS 1
870 /* Define if shifts truncate the shift count which implies one can omit
871 a sign-extension or zero-extension of a shift count. */
873 /* #define SHIFT_COUNT_TRUNCATED */
875 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
876 is done just by pretending it is already truncated. */
878 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) (OUTPREC != 16)
880 /* We assume that the store-condition-codes instructions store 0 for false
881 and some other value for true. This is the value stored for true. */
883 /* #define STORE_FLAG_VALUE (-1) */
885 /* When a prototype says `char' or `short', really pass an `int'. */
887 #define PROMOTE_PROTOTYPES 1
889 /* Don't perform CSE on function addresses. */
891 #define NO_FUNCTION_CSE
893 /* Specify the machine mode that pointers have.
894 After generation of rtl, the compiler makes no further distinction
895 between pointers and any other objects of this machine mode. */
899 /* A function address in a call instruction is a byte address (for
900 indexing purposes) so give the MEM rtx a byte's mode. */
902 #define FUNCTION_MODE QImode
904 /* A C statement (sans semicolon) to update the integer variable COST
905 based on the relationship between INSN that is dependent on
906 DEP_INSN through the dependence LINK. The default is to make no
907 adjustment to COST. This can be used for example to specify to
908 the scheduler that an output- or anti-dependence does not incur
909 the same cost as a data-dependence.
911 We will want to use this to indicate that there is a cost associated
912 with the loading, followed by use of base registers ...
913 #define ADJUST_COST (INSN, LINK, DEP_INSN, COST)
916 /* Tell final.c how to eliminate redundant test instructions. */
918 /* Here we define machine-dependent flags and fields in cc_status
919 (see `conditions.h'). */
921 /* Store in cc_status the expressions that the condition codes will
922 describe after execution of an instruction whose pattern is EXP.
923 Do not alter them if the instruction would not alter the cc's.
925 On the 370, load insns do not alter the cc's. However, in some
926 cases these instructions can make it possibly invalid to use the
927 saved cc's. In those cases we clear out some or all of the saved
928 cc's so they won't be used.
930 Note that only some arith instructions set the CC. These include
931 add, subtract, complement, various shifts. Note that multiply
932 and divide do *not* set set the CC. Therefore, in the code below,
933 don't set the status for MUL, DIV, etc.
935 Note that the bitwise ops set the condition code, but not in a
936 way that we can make use of it. So we treat these as clobbering,
937 rather than setting the CC. These are clobbered in the individual
938 instruction patterns that use them. Use CC_STATUS_INIT to clobber.
941 #define NOTICE_UPDATE_CC(EXP, INSN) \
944 if (GET_CODE (exp) == PARALLEL) /* Check this */ \
945 exp = XVECEXP (exp, 0, 0); \
946 if (GET_CODE (exp) != SET) \
950 if (XEXP (exp, 0) == cc0_rtx) \
952 cc_status.value1 = XEXP (exp, 0); \
953 cc_status.value2 = XEXP (exp, 1); \
954 cc_status.flags = 0; \
958 if (cc_status.value1 \
959 && reg_mentioned_p (XEXP (exp, 0), cc_status.value1)) \
960 cc_status.value1 = 0; \
961 if (cc_status.value2 \
962 && reg_mentioned_p (XEXP (exp, 0), cc_status.value2)) \
963 cc_status.value2 = 0; \
964 switch (GET_CODE (XEXP (exp, 1))) \
966 case PLUS: case MINUS: case NEG: \
967 case NOT: case ABS: \
968 CC_STATUS_SET (XEXP (exp, 0), XEXP (exp, 1)); \
970 /* mult and div don't set any cc codes !! */ \
971 case MULT: /* case UMULT: */ case DIV: case UDIV: \
972 /* and, or and xor set the cc's the wrong way !! */ \
973 case AND: case IOR: case XOR: \
974 /* some shifts set the CC some don't. */ \
975 case ASHIFT: case ASHIFTRT: \
985 #define CC_STATUS_SET(V1, V2) \
987 cc_status.flags = 0; \
988 cc_status.value1 = (V1); \
989 cc_status.value2 = (V2); \
990 if (cc_status.value1 \
991 && reg_mentioned_p (cc_status.value1, cc_status.value2)) \
992 cc_status.value2 = 0; \
995 #define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
996 { if (cc_status.flags & CC_NO_OVERFLOW) return NO_OV; return NORMAL; }
998 /* ------------------------------------------ */
999 /* Control the assembler format that we output. */
1001 /* Define standard character escape sequences for non-ASCII targets
1004 #ifdef TARGET_EBCDIC
1005 #define TARGET_ESC 39
1006 #define TARGET_BELL 47
1007 #define TARGET_BS 22
1008 #define TARGET_TAB 5
1009 #define TARGET_NEWLINE 21
1010 #define TARGET_VT 11
1011 #define TARGET_FF 12
1012 #define TARGET_CR 13
1015 /* ======================================================== */
1018 #define TEXT_SECTION_ASM_OP "* Program text area"
1019 #define DATA_SECTION_ASM_OP "* Program data area"
1020 #define INIT_SECTION_ASM_OP "* Program initialization area"
1021 #define SHARED_SECTION_ASM_OP "* Program shared data"
1022 #define CTOR_LIST_BEGIN /* NO OP */
1023 #define CTOR_LIST_END /* NO OP */
1024 #define MAX_MVS_LABEL_SIZE 8
1026 /* How to refer to registers in assembler output. This sequence is
1027 indexed by compiler's hard-register-number (see above). */
1029 #define REGISTER_NAMES \
1030 { "0", "1", "2", "3", "4", "5", "6", "7", \
1031 "8", "9", "10", "11", "12", "13", "14", "15", \
1032 "0", "2", "4", "6" \
1035 #define ASM_FILE_START(FILE) \
1036 { fputs ("\tRMODE\tANY\n", FILE); \
1037 fputs ("\tCSECT\n", FILE); }
1039 #define ASM_FILE_END(FILE) fputs ("\tEND\n", FILE);
1040 #define ASM_COMMENT_START "*"
1041 #define ASM_APP_OFF ""
1042 #define ASM_APP_ON ""
1044 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1045 { assemble_name (FILE, NAME); fputs ("\tEQU\t*\n", FILE); }
1047 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1049 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1050 if (mvs_check_alias (NAME, temp) == 2) \
1052 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1056 /* MVS externals are limited to 8 characters, upper case only.
1057 The '_' is mapped to '@', except for MVS functions, then '#'. */
1060 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1062 char *bp, ch, temp[MAX_MVS_LABEL_SIZE + 1]; \
1063 if (!mvs_get_alias (NAME, temp)) \
1064 strcpy (temp, NAME); \
1065 if (!strcmp (temp,"main")) \
1066 strcpy (temp,"gccmain"); \
1067 if (mvs_function_check (temp)) \
1071 for (bp = temp; *bp; bp++) \
1072 *bp = (*bp == '_' ? ch : TOUPPER (*bp)); \
1073 fprintf (FILE, "%s", temp); \
1076 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
1077 sprintf (LABEL, "*%s%d", PREFIX, NUM)
1079 /* Generate case label. For HLASM we can change to the data CSECT
1080 and put the vectors out of the code body. The assembler just
1081 concatenates CSECTs with the same name. */
1083 #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE) \
1084 fprintf (FILE, "\tDS\t0F\n"); \
1085 fprintf (FILE,"\tCSECT\n"); \
1086 fprintf (FILE, "%s%d\tEQU\t*\n", PREFIX, NUM)
1088 /* Put the CSECT back to the code body */
1090 #define ASM_OUTPUT_CASE_END(FILE, NUM, TABLE) \
1091 assemble_name (FILE, mvs_function_name); \
1092 fputs ("\tCSECT\n", FILE);
1094 /* This is how to output an element of a case-vector that is absolute. */
1096 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1097 fprintf (FILE, "\tDC\tA(L%d)\n", VALUE)
1099 /* This is how to output an element of a case-vector that is relative. */
1101 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1102 fprintf (FILE, "\tDC\tA(L%d-L%d)\n", VALUE, REL)
1104 /* This is how to output an insn to push a register on the stack.
1105 It need not be very fast code.
1106 Right now, PUSH & POP are used only when profiling is enabled,
1107 and then, only to push the static chain reg and the function struct
1108 value reg, and only if those are used. Since profiling is not
1109 supported anyway, punt on this. */
1111 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \
1112 mvs_check_page (FILE, 8, 4); \
1113 fprintf (FILE, "\tS\t13,=F'4'\n\tST\t%s,%d(13)\n", \
1114 reg_names[REGNO], STACK_POINTER_OFFSET)
1116 /* This is how to output an insn to pop a register from the stack.
1117 It need not be very fast code. */
1119 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \
1120 mvs_check_page (FILE, 8, 0); \
1121 fprintf (FILE, "\tL\t%s,%d(13)\n\tLA\t13,4(13)\n", \
1122 reg_names[REGNO], STACK_POINTER_OFFSET)
1124 /* This outputs a text string. The string are chopped up to fit into
1125 an 80 byte record. Also, control and special characters, interpreted
1126 by the IBM assembler, are output numerically. */
1128 #define MVS_ASCII_TEXT_LENGTH 48
1130 #define ASM_OUTPUT_ASCII(FILE, PTR, LEN) \
1132 size_t i, limit = (LEN); \
1134 for (j = 0, i = 0; i < limit; j++, i++) \
1137 if (ISCNTRL (c) || c == '&') \
1139 if (j % MVS_ASCII_TEXT_LENGTH != 0 ) \
1140 fprintf (FILE, "'\n"); \
1142 if (c == '&') c = MAP_CHARACTER (c); \
1143 fprintf (FILE, "\tDC\tX'%X'\n", c ); \
1147 if (j % MVS_ASCII_TEXT_LENGTH == 0) \
1148 fprintf (FILE, "\tDC\tC'"); \
1150 fprintf (FILE, "%c%c", c, c); \
1152 fprintf (FILE, "%c", c); \
1153 if (j % MVS_ASCII_TEXT_LENGTH == MVS_ASCII_TEXT_LENGTH - 1) \
1154 fprintf (FILE, "'\n" ); \
1157 if (j % MVS_ASCII_TEXT_LENGTH != 0) \
1158 fprintf (FILE, "'\n"); \
1161 /* This is how to output an assembler line that says to advance the
1162 location counter to a multiple of 2**LOG bytes. */
1164 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
1168 fprintf (FILE, "\tDS\t0H\n" ); \
1170 fprintf (FILE, "\tDS\t0F\n" ); \
1173 /* The maximum length of memory that the IBM assembler will allow in one
1176 #define MAX_CHUNK 32767
1178 /* A C statement to output to the stdio stream FILE an assembler
1179 instruction to advance the location counter by SIZE bytes. Those
1180 bytes should be zero when loaded. */
1182 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
1184 unsigned HOST_WIDE_INT s; \
1186 for (s = (SIZE); s > 0; s -= MAX_CHUNK) \
1188 if (s > MAX_CHUNK) \
1192 fprintf (FILE, "\tDS\tXL%d\n", k); \
1196 /* A C statement (sans semicolon) to output to the stdio stream
1197 FILE the assembler definition of a common-label named NAME whose
1198 size is SIZE bytes. The variable ROUNDED is the size rounded up
1199 to whatever alignment the caller wants. */
1201 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1203 char temp[MAX_MVS_LABEL_SIZE + 1]; \
1204 if (mvs_check_alias(NAME, temp) == 2) \
1206 fprintf (FILE, "%s\tALIAS\tC'%s'\n", temp, NAME); \
1208 fputs ("\tENTRY\t", FILE); \
1209 assemble_name (FILE, NAME); \
1210 fputs ("\n", FILE); \
1211 fprintf (FILE, "\tDS\t0F\n"); \
1212 ASM_OUTPUT_LABEL (FILE,NAME); \
1213 ASM_OUTPUT_SKIP (FILE,SIZE); \
1216 /* A C statement (sans semicolon) to output to the stdio stream
1217 FILE the assembler definition of a local-common-label named NAME
1218 whose size is SIZE bytes. The variable ROUNDED is the size
1219 rounded up to whatever alignment the caller wants. */
1221 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1223 fprintf (FILE, "\tDS\t0F\n"); \
1224 ASM_OUTPUT_LABEL (FILE,NAME); \
1225 ASM_OUTPUT_SKIP (FILE,SIZE); \
1228 #define ASM_PN_FORMAT "%s%lu"
1230 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1231 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1232 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1234 #define PRINT_OPERAND(FILE, XV, CODE) \
1236 switch (GET_CODE (XV)) \
1238 static char curreg[4]; \
1241 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1243 strcpy (curreg, reg_names[REGNO (XV)]); \
1244 fprintf (FILE, "%s", curreg); \
1248 rtx addr = XEXP (XV, 0); \
1251 if (GET_CODE (addr) == PLUS) \
1252 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (XEXP (addr, 1))); \
1254 fprintf (FILE, "0"); \
1256 else if (CODE == 'R') \
1258 if (GET_CODE (addr) == PLUS) \
1259 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1261 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1264 output_address (XEXP (XV, 0)); \
1269 mvs_page_lit += 4; \
1270 if (SYMBOL_REF_EXTERNAL_P (XV)) fprintf (FILE, "=V("); \
1271 else fprintf (FILE, "=A("); \
1272 output_addr_const (FILE, XV); \
1273 fprintf (FILE, ")"); \
1277 fprintf (FILE, "%d", (int) (INTVAL (XV) & 0xff)); \
1278 else if (CODE == 'X') \
1279 fprintf (FILE, "%02X", (int) (INTVAL (XV) & 0xff)); \
1280 else if (CODE == 'h') \
1281 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, (INTVAL (XV) << 16) >> 16); \
1282 else if (CODE == 'H') \
1284 mvs_page_lit += 2; \
1285 fprintf (FILE, "=H'" HOST_WIDE_INT_PRINT_DEC "'", (INTVAL (XV) << 16) >> 16); \
1287 else if (CODE == 'K') \
1289 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1290 mvs_page_lit += 4; \
1291 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", (INTVAL (XV) << 16) >> 16); \
1293 else if (CODE == 'W') \
1295 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1296 mvs_page_lit += 8; \
1297 if (0 <= INTVAL (XV)) { \
1298 fprintf (FILE, "=XL8'00000000"); \
1300 fprintf (FILE, "=XL8'FFFFFFFF"); \
1302 fprintf (FILE, "%08X'", INTVAL (XV)); \
1306 mvs_page_lit += 4; \
1307 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", INTVAL (XV)); \
1310 case CONST_DOUBLE: \
1311 if (GET_MODE (XV) == DImode) \
1315 mvs_page_lit += 4; \
1316 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1318 else if (CODE == 'L') \
1320 mvs_page_lit += 4; \
1321 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1325 mvs_page_lit += 8; \
1326 fprintf (FILE, "=XL8'%08X%08X'", CONST_DOUBLE_LOW (XV), \
1327 CONST_DOUBLE_HIGH (XV)); \
1333 if (GET_MODE (XV) == SFmode) \
1335 mvs_page_lit += 4; \
1336 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1337 sizeof (buf), 0, 1); \
1338 fprintf (FILE, "=E'%s'", buf); \
1340 else if (GET_MODE (XV) == DFmode) \
1342 mvs_page_lit += 8; \
1343 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1344 sizeof (buf), 0, 1); \
1345 fprintf (FILE, "=D'%s'", buf); \
1347 else /* VOIDmode */ \
1349 mvs_page_lit += 8; \
1350 fprintf (FILE, "=XL8'%08X%08X'", \
1351 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1356 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1357 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1359 mvs_page_lit += 4; \
1360 if (SYMBOL_REF_EXTERNAL_P (XEXP (XEXP (XV, 0), 0))) \
1362 fprintf (FILE, "=V("); \
1363 ASM_OUTPUT_LABELREF (FILE, \
1364 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1365 fprintf (FILE, ")\n\tA\t%s,=F'" HOST_WIDE_INT_PRINT_DEC "'", \
1366 curreg, INTVAL (XEXP (XEXP (XV, 0), 1))); \
1370 fprintf (FILE, "=A("); \
1371 output_addr_const (FILE, XV); \
1372 fprintf (FILE, ")"); \
1377 mvs_page_lit += 4; \
1378 fprintf (FILE, "=F'"); \
1379 output_addr_const (FILE, XV); \
1380 fprintf (FILE, "'"); \
1388 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1390 rtx breg, xreg, offset, plus; \
1392 switch (GET_CODE (ADDR)) \
1395 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1401 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1403 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1404 breg = XEXP (ADDR, 1); \
1406 offset = XEXP (ADDR, 1); \
1407 plus = XEXP (ADDR, 0); \
1411 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1412 breg = XEXP (ADDR, 0); \
1414 offset = XEXP (ADDR, 0); \
1415 plus = XEXP (ADDR, 1); \
1417 if (GET_CODE (plus) == PLUS) \
1419 if (GET_CODE (XEXP (plus, 0)) == REG) \
1422 xreg = XEXP (plus, 0); \
1424 breg = XEXP (plus, 0); \
1428 offset = XEXP (plus, 0); \
1430 if (GET_CODE (XEXP (plus, 1)) == REG) \
1433 xreg = XEXP (plus, 1); \
1435 breg = XEXP (plus, 1); \
1439 offset = XEXP (plus, 1); \
1442 else if (GET_CODE (plus) == REG) \
1455 if (GET_CODE (offset) == LABEL_REF) \
1456 fprintf (FILE, "L%d", \
1457 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1459 output_addr_const (FILE, offset); \
1462 fprintf (FILE, "0"); \
1464 fprintf (FILE, "(%s,%s)", \
1465 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1467 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1470 mvs_page_lit += 4; \
1471 if (SYMBOL_REF_EXTERNAL_P (ADDR)) fprintf (FILE, "=V("); \
1472 else fprintf (FILE, "=A("); \
1473 output_addr_const (FILE, ADDR); \
1474 fprintf (FILE, ")"); \
1479 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
1481 if (strlen (NAME) + 1 > mvs_function_name_length) \
1483 if (mvs_function_name) \
1484 free (mvs_function_name); \
1485 mvs_function_name = 0; \
1487 if (!mvs_function_name) \
1489 mvs_function_name_length = strlen (NAME) * 2 + 1; \
1490 mvs_function_name = (char *) xmalloc (mvs_function_name_length); \
1492 if (!strcmp (NAME, "main")) \
1493 strcpy (mvs_function_name, "gccmain"); \
1495 strcpy (mvs_function_name, NAME); \
1496 fprintf (FILE, "\tDS\t0F\n"); \
1497 assemble_name (FILE, mvs_function_name); \
1498 fputs ("\tRMODE\tANY\n", FILE); \
1499 assemble_name (FILE, mvs_function_name); \
1500 fputs ("\tCSECT\n", FILE); \
1503 /* Output assembler code to FILE to increment profiler label # LABELNO
1504 for profiling a function entry. */
1506 #define FUNCTION_PROFILER(FILE, LABELNO) \
1507 fprintf (FILE, "Error: No profiling available.\n")
1509 #endif /* TARGET_HLASM */
1511 /* ======================================================== */
1513 #ifdef TARGET_ELF_ABI
1515 /* How to refer to registers in assembler output. This sequence is
1516 indexed by compiler's hard-register-number (see above). */
1518 #define REGISTER_NAMES \
1519 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1520 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1521 "f0", "f2", "f4", "f6" \
1524 /* Print operand XV (an rtx) in assembler syntax to file FILE.
1525 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1526 For `%' followed by punctuation, CODE is the punctuation and XV is null. */
1528 #define PRINT_OPERAND(FILE, XV, CODE) \
1530 switch (GET_CODE (XV)) \
1532 static char curreg[4]; \
1535 strcpy (curreg, reg_names[REGNO (XV) + 1]); \
1537 strcpy (curreg, reg_names[REGNO (XV)]); \
1538 fprintf (FILE, "%s", curreg); \
1542 rtx addr = XEXP (XV, 0); \
1545 if (GET_CODE (addr) == PLUS) \
1546 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (XEXP (addr, 1))); \
1548 fprintf (FILE, "0"); \
1550 else if (CODE == 'R') \
1552 if (GET_CODE (addr) == PLUS) \
1553 fprintf (FILE, "%s", reg_names[REGNO (XEXP (addr, 0))]);\
1555 fprintf (FILE, "%s", reg_names[REGNO (addr)]); \
1558 output_address (XEXP (XV, 0)); \
1563 mvs_page_lit += 4; \
1564 if (SYMBOL_REF_EXTERNAL_P (XV)) fprintf (FILE, "=V("); \
1565 else fprintf (FILE, "=A("); \
1566 output_addr_const (FILE, XV); \
1567 fprintf (FILE, ")"); \
1571 fprintf (FILE, "%d", (int) (INTVAL (XV) & 0xff)); \
1572 else if (CODE == 'X') \
1573 fprintf (FILE, "%02X", (int) (INTVAL (XV) & 0xff)); \
1574 else if (CODE == 'h') \
1575 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, (INTVAL (XV) << 16) >> 16); \
1576 else if (CODE == 'H') \
1578 mvs_page_lit += 2; \
1579 fprintf (FILE, "=H'" HOST_WIDE_INT_PRINT_DEC "'", \
1580 (INTVAL (XV) << 16) >> 16); \
1582 else if (CODE == 'K') \
1584 /* auto sign-extension of signed 16-bit to signed 32-bit */ \
1585 mvs_page_lit += 4; \
1586 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", \
1587 (INTVAL (XV) << 16) >> 16); \
1589 else if (CODE == 'W') \
1591 /* hand-built sign-extension of signed 32-bit to 64-bit */ \
1592 mvs_page_lit += 8; \
1593 if (0 <= INTVAL (XV)) { \
1594 fprintf (FILE, "=XL8'00000000"); \
1596 fprintf (FILE, "=XL8'FFFFFFFF"); \
1598 fprintf (FILE, "%08X'", INTVAL (XV)); \
1602 mvs_page_lit += 4; \
1603 fprintf (FILE, "=F'" HOST_WIDE_INT_PRINT_DEC "'", INTVAL (XV)); \
1606 case CONST_DOUBLE: \
1607 if (GET_MODE (XV) == DImode) \
1611 mvs_page_lit += 4; \
1612 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_LOW (XV)); \
1614 else if (CODE == 'L') \
1616 mvs_page_lit += 4; \
1617 fprintf (FILE, "=XL4'%08X'", CONST_DOUBLE_HIGH (XV)); \
1621 mvs_page_lit += 8; \
1622 fprintf (FILE, "=yyyyXL8'%08X%08X'", \
1623 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1629 if (GET_MODE (XV) == SFmode) \
1631 mvs_page_lit += 4; \
1632 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1633 sizeof (buf), 0, 1); \
1634 fprintf (FILE, "=E'%s'", buf); \
1636 else if (GET_MODE (XV) == DFmode) \
1638 mvs_page_lit += 8; \
1639 real_to_decimal (buf, CONST_DOUBLE_REAL_VALUE (XV), \
1640 sizeof (buf), 0, 1); \
1641 fprintf (FILE, "=D'%s'", buf); \
1643 else /* VOIDmode */ \
1645 mvs_page_lit += 8; \
1646 fprintf (FILE, "=XL8'%08X%08X'", \
1647 CONST_DOUBLE_HIGH (XV), CONST_DOUBLE_LOW (XV)); \
1652 if (GET_CODE (XEXP (XV, 0)) == PLUS \
1653 && GET_CODE (XEXP (XEXP (XV, 0), 0)) == SYMBOL_REF) \
1655 mvs_page_lit += 4; \
1656 if (SYMBOL_REF_EXTERNAL_P (XEXP (XEXP (XV, 0), 0))) \
1658 fprintf (FILE, "=V("); \
1659 ASM_OUTPUT_LABELREF (FILE, \
1660 XSTR (XEXP (XEXP (XV, 0), 0), 0)); \
1661 fprintf (FILE, ")\n\tA\t%s,=F'" HOST_WIDE_INT_PRINT_DEC "'", \
1662 curreg, INTVAL (XEXP (XEXP (XV, 0), 1))); \
1666 fprintf (FILE, "=A("); \
1667 output_addr_const (FILE, XV); \
1668 fprintf (FILE, ")"); \
1673 mvs_page_lit += 4; \
1674 fprintf (FILE, "=bogus_bad_F'"); \
1675 output_addr_const (FILE, XV); \
1676 fprintf (FILE, "'"); \
1677 /* XXX hack alert this gets gen'd in -fPIC code in relation to a tablejump */ \
1678 /* but its somehow fundamentally broken, I can't make any sense out of it */ \
1688 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1690 rtx breg, xreg, offset, plus; \
1692 switch (GET_CODE (ADDR)) \
1695 fprintf (FILE, "0(%s)", reg_names[REGNO (ADDR)]); \
1701 if (GET_CODE (XEXP (ADDR, 0)) == PLUS) \
1703 if (GET_CODE (XEXP (ADDR, 1)) == REG) \
1704 breg = XEXP (ADDR, 1); \
1706 offset = XEXP (ADDR, 1); \
1707 plus = XEXP (ADDR, 0); \
1711 if (GET_CODE (XEXP (ADDR, 0)) == REG) \
1712 breg = XEXP (ADDR, 0); \
1714 offset = XEXP (ADDR, 0); \
1715 plus = XEXP (ADDR, 1); \
1717 if (GET_CODE (plus) == PLUS) \
1719 if (GET_CODE (XEXP (plus, 0)) == REG) \
1722 xreg = XEXP (plus, 0); \
1724 breg = XEXP (plus, 0); \
1728 offset = XEXP (plus, 0); \
1730 if (GET_CODE (XEXP (plus, 1)) == REG) \
1733 xreg = XEXP (plus, 1); \
1735 breg = XEXP (plus, 1); \
1739 offset = XEXP (plus, 1); \
1742 else if (GET_CODE (plus) == REG) \
1755 if (GET_CODE (offset) == LABEL_REF) \
1756 fprintf (FILE, "L%d", \
1757 CODE_LABEL_NUMBER (XEXP (offset, 0))); \
1759 output_addr_const (FILE, offset); \
1762 fprintf (FILE, "0"); \
1764 fprintf (FILE, "(%s,%s)", \
1765 reg_names[REGNO (xreg)], reg_names[REGNO (breg)]); \
1767 fprintf (FILE, "(%s)", reg_names[REGNO (breg)]); \
1770 mvs_page_lit += 4; \
1771 if (SYMBOL_REF_EXTERNAL_P (ADDR)) fprintf (FILE, "=V("); \
1772 else fprintf (FILE, "=A("); \
1773 output_addr_const (FILE, ADDR); \
1774 fprintf (FILE, ")"); \
1779 /* Output assembler code to FILE to increment profiler label # LABELNO
1780 for profiling a function entry. */
1781 /* Make it a no-op for now, so we can at least compile glibc */
1782 #define FUNCTION_PROFILER(FILE, LABELNO) { \
1783 mvs_check_page (FILE, 24, 4); \
1784 fprintf (FILE, "\tSTM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1785 fprintf (FILE, "\tLA\tr1,1(0,0)\n"); \
1786 fprintf (FILE, "\tL\tr2,=A(.LP%d)\n", LABELNO); \
1787 fprintf (FILE, "\tA\tr1,0(r2)\n"); \
1788 fprintf (FILE, "\tST\tr1,0(r2)\n"); \
1789 fprintf (FILE, "\tLM\tr1,r2,%d(sp)\n", STACK_POINTER_OFFSET-8); \
1792 /* Don't bother to output .extern pseudo-ops. They are not needed by
1795 #undef ASM_OUTPUT_EXTERNAL
1797 #define ASM_DOUBLE "\t.double"
1799 /* #define ASM_OUTPUT_LABELREF(FILE, NAME) */ /* use gas -- defaults.h */
1801 /* let config/svr4.h define this ...
1802 * #define ASM_OUTPUT_CASE_LABEL(FILE, PREFIX, NUM, TABLE)
1803 * fprintf (FILE, "%s%d:\n", PREFIX, NUM)
1806 /* This is how to output an element of a case-vector that is absolute. */
1807 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1808 mvs_check_page (FILE, 4, 0); \
1809 fprintf (FILE, "\t.long\t.L%d\n", VALUE)
1811 /* This is how to output an element of a case-vector that is relative. */
1812 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1813 mvs_check_page (FILE, 4, 0); \
1814 fprintf (FILE, "\t.long\t.L%d-.L%d\n", VALUE, REL)
1816 /* Right now, PUSH & POP are used only when profiling is enabled,
1817 and then, only to push the static chain reg and the function struct
1818 value reg, and only if those are used by the function being profiled.
1819 We don't need this for profiling, so punt. */
1820 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO)
1821 #define ASM_OUTPUT_REG_POP(FILE, REGNO)
1824 /* Indicate that jump tables go in the text section. This is
1825 necessary when compiling PIC code. */
1826 #define JUMP_TABLES_IN_TEXT_SECTION 1
1828 /* Define macro used to output shift-double opcodes when the shift
1829 count is in %cl. Some assemblers require %cl as an argument;
1832 GAS requires the %cl argument, so override i386/unix.h. */
1834 #undef SHIFT_DOUBLE_OMITS_COUNT
1835 #define SHIFT_DOUBLE_OMITS_COUNT 0
1837 /* Implicit library calls should use memcpy, not bcopy, etc. */
1838 #define TARGET_MEM_FUNCTIONS
1840 /* Output before read-only data. */
1841 #define TEXT_SECTION_ASM_OP "\t.text"
1843 /* Output before writable (initialized) data. */
1844 #define DATA_SECTION_ASM_OP "\t.data"
1846 /* Output before writable (uninitialized) data. */
1847 #define BSS_SECTION_ASM_OP "\t.bss"
1849 /* In the past there was confusion as to what the argument to .align was
1850 in GAS. For the last several years the rule has been this: for a.out
1851 file formats that argument is LOG, and for all other file formats the
1854 However, GAS now has .p2align and .balign pseudo-ops so to remove any
1855 doubt or guess work, and since this file is used for both a.out and other
1856 file formats, we use one of them. */
1858 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1859 if ((LOG)!=0) fprintf ((FILE), "\t.balign %d\n", 1<<(LOG))
1861 /* Globalizing directive for a label. */
1862 #define GLOBAL_ASM_OP ".globl "
1864 /* This says how to output an assembler line
1865 to define a global common symbol. */
1867 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1868 ( fputs (".comm ", (FILE)), \
1869 assemble_name ((FILE), (NAME)), \
1870 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (ROUNDED)))
1872 /* This says how to output an assembler line
1873 to define a local common symbol. */
1875 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1876 ( fputs (".lcomm ", (FILE)), \
1877 assemble_name ((FILE), (NAME)), \
1878 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED"\n", (ROUNDED)))
1880 #endif /* TARGET_ELF_ABI */
1881 #endif /* ! GCC_I370_H */