1 ;; Predicate definitions for the Blackfin.
2 ;; Copyright (C) 2005, 2006 Free Software Foundation, Inc.
3 ;; Contributed by Analog Devices.
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify
8 ;; it under the terms of the GNU General Public License as published by
9 ;; the Free Software Foundation; either version 2, or (at your option)
12 ;; GCC is distributed in the hope that it will be useful,
13 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
14 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 ;; GNU General Public License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING. If not, write to
19 ;; the Free Software Foundation, 51 Franklin Street, Fifth Floor,
20 ;; Boston, MA 02110-1301, USA.
22 ;; Return nonzero iff OP is one of the integer constants 1 or 2.
23 (define_predicate "pos_scale_operand"
24 (and (match_code "const_int")
25 (match_test "INTVAL (op) == 1 || INTVAL (op) == 2")))
27 ;; Return nonzero iff OP is one of the integer constants 2 or 4.
28 (define_predicate "scale_by_operand"
29 (and (match_code "const_int")
30 (match_test "INTVAL (op) == 2 || INTVAL (op) == 4")))
32 ;; Return nonzero if OP is a constant that consists of two parts; lower
33 ;; bits all zero and upper bits all ones. In this case, we can perform
34 ;; an AND operation with a sequence of two shifts. Don't return nonzero
35 ;; if the constant would be cheap to load.
36 (define_predicate "highbits_operand"
37 (and (match_code "const_int")
38 (match_test "log2constp (-INTVAL (op)) && !CONST_7BIT_IMM_P (INTVAL (op))")))
40 ;; Return nonzero if OP is suitable as a right-hand side operand for an
42 (define_predicate "rhs_andsi3_operand"
43 (ior (match_operand 0 "register_operand")
44 (and (match_code "const_int")
45 (match_test "log2constp (~INTVAL (op)) || INTVAL (op) == 255 || INTVAL (op) == 65535"))))
47 ;; Return nonzero if OP is a register or a constant with exactly one bit
49 (define_predicate "regorlog2_operand"
50 (ior (match_operand 0 "register_operand")
51 (and (match_code "const_int")
52 (match_test "log2constp (INTVAL (op))"))))
54 ;; Return nonzero if OP is a register or an integer constant.
55 (define_predicate "reg_or_const_int_operand"
56 (ior (match_operand 0 "register_operand")
57 (match_code "const_int")))
59 ;; Like register_operand, but make sure that hard regs have a valid mode.
60 (define_predicate "valid_reg_operand"
61 (match_operand 0 "register_operand")
63 if (GET_CODE (op) == SUBREG)
65 if (REGNO (op) < FIRST_PSEUDO_REGISTER)
66 return HARD_REGNO_MODE_OK (REGNO (op), mode);
70 ;; Return nonzero if OP is a register or a 7 bit signed constant.
71 (define_predicate "reg_or_7bit_operand"
72 (ior (match_operand 0 "register_operand")
73 (and (match_code "const_int")
74 (match_test "CONST_7BIT_IMM_P (INTVAL (op))"))))
76 ;; Used for secondary reloads, this function returns 1 if OP is of the
77 ;; form (plus (fp) (const_int)).
78 (define_predicate "fp_plus_const_operand"
86 && (REGNO (op1) == FRAME_POINTER_REGNUM
87 || REGNO (op1) == STACK_POINTER_REGNUM)
88 && GET_CODE (op2) == CONST_INT);
91 ;; Returns 1 if OP is a symbolic operand, i.e. a symbol_ref or a label_ref,
92 ;; possibly with an offset.
93 (define_predicate "symbolic_operand"
94 (ior (match_code "symbol_ref,label_ref")
95 (and (match_code "const")
96 (match_test "GET_CODE (XEXP (op,0)) == PLUS
97 && (GET_CODE (XEXP (XEXP (op, 0), 0)) == SYMBOL_REF
98 || GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF)
99 && GET_CODE (XEXP (XEXP (op, 0), 1)) == CONST_INT"))))
101 ;; Returns 1 if OP is a plain constant or matched by symbolic_operand.
102 (define_predicate "symbolic_or_const_operand"
103 (ior (match_code "const_int,const_double")
104 (match_operand 0 "symbolic_operand")))
106 ;; Returns 1 if OP is a SYMBOL_REF.
107 (define_predicate "symbol_ref_operand"
108 (match_code "symbol_ref"))
110 ;; True for any non-virtual or eliminable register. Used in places where
111 ;; instantiation of such a register may cause the pattern to not be recognized.
112 (define_predicate "register_no_elim_operand"
113 (match_operand 0 "register_operand")
115 if (GET_CODE (op) == SUBREG)
116 op = SUBREG_REG (op);
117 return !(op == arg_pointer_rtx
118 || op == frame_pointer_rtx
119 || (REGNO (op) >= FIRST_PSEUDO_REGISTER
120 && REGNO (op) <= LAST_VIRTUAL_REGISTER));
123 ;; Test for an operator valid in a conditional branch
124 (define_predicate "bfin_cbranch_operator"
125 (match_code "eq,ne"))