gcc/config/avr/avr.h

   1 /* Definitions of target machine for GNU compiler,
   2    for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
   3    Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
   4    2008, 2009 Free Software Foundation, Inc.
   5    Contributed by Denis Chertykov (denisc@overta.ru)
   6
   7 This file is part of GCC.
   8
   9 GCC is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 3, or (at your option)
  12 any later version.
  13
  14 GCC is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License
  20 along with GCC; see the file COPYING3.  If not see
  21 <http://www.gnu.org/licenses/>.  */
  22
  23 /* Names to predefine in the preprocessor for this target machine.  */
  24
  25 struct base_arch_s {
  26   /* Assembler only.  */
  27   int asm_only;
  28
  29   /* Core have 'MUL*' instructions.  */
  30   int have_mul;
  31
  32   /* Core have 'CALL' and 'JMP' instructions.  */
  33   int have_jmp_call;
  34
  35   /* Core have 'MOVW' and 'LPM Rx,Z' instructions.  */
  36   int have_movw_lpmx;
  37
  38   /* Core have 'ELPM' instructions.  */
  39   int have_elpm;
  40
  41   /* Core have 'ELPM Rx,Z' instructions.  */
  42   int have_elpmx;
  43
  44   /* Core have 'EICALL' and 'EIJMP' instructions.  */
  45   int have_eijmp_eicall;
  46
  47   /* Reserved. */
  48   int reserved;
  49
  50   const char *const macro;
  51 };
  52
  53 extern const struct base_arch_s *avr_current_arch;
  54
  55 #define TARGET_CPU_CPP_BUILTINS()               \
  56   do                                            \
  57     {                                           \
  58       builtin_define_std ("AVR");               \
  59       if (avr_current_arch->macro)              \
  60         builtin_define (avr_current_arch->macro);       \
  61       if (avr_extra_arch_macro)                 \
  62         builtin_define (avr_extra_arch_macro);  \
  63       if (avr_current_arch->have_elpm)          \
  64         builtin_define ("__AVR_HAVE_RAMPZ__");  \
  65       if (avr_current_arch->have_elpm)          \
  66         builtin_define ("__AVR_HAVE_ELPM__");   \
  67       if (avr_current_arch->have_elpmx)         \
  68         builtin_define ("__AVR_HAVE_ELPMX__");  \
  69       if (avr_current_arch->have_movw_lpmx)     \
  70         {                                       \
  71           builtin_define ("__AVR_HAVE_MOVW__"); \
  72           builtin_define ("__AVR_HAVE_LPMX__"); \
  73         }                                       \
  74       if (avr_current_arch->asm_only)           \
  75         builtin_define ("__AVR_ASM_ONLY__");    \
  76       if (avr_current_arch->have_mul)           \
  77         {                                       \
  78           builtin_define ("__AVR_ENHANCED__");  \
  79           builtin_define ("__AVR_HAVE_MUL__");  \
  80         }                                       \
  81       if (avr_current_arch->have_jmp_call)      \
  82         {                                       \
  83           builtin_define ("__AVR_MEGA__");      \
  84           builtin_define ("__AVR_HAVE_JMP_CALL__");     \
  85         }                                       \
  86       if (avr_current_arch->have_eijmp_eicall)  \
  87         {                                       \
  88           builtin_define ("__AVR_HAVE_EIJMP_EICALL__"); \
  89           builtin_define ("__AVR_3_BYTE_PC__"); \
  90         }                                       \
  91       else                                      \
  92         {                                       \
  93           builtin_define ("__AVR_2_BYTE_PC__"); \
  94         }                                       \
  95       if (TARGET_NO_INTERRUPTS)                 \
  96         builtin_define ("__NO_INTERRUPTS__");   \
  97     }                                           \
  98   while (0)
  99
 100 extern const char *avr_extra_arch_macro;
 101
 102 #if !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS)
 103 extern GTY(()) section *progmem_section;
 104 #endif
 105
 106 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call && !TARGET_SHORT_CALLS)
 107 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
 108 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
 109 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
 110 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm)
 111 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
 112
 113 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
 114 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
 115
 116 #define TARGET_VERSION fprintf (stderr, " (GNU assembler syntax)");
 117
 118 #define OVERRIDE_OPTIONS avr_override_options ()
 119
 120 #define CAN_DEBUG_WITHOUT_FP
 121
 122 #define BITS_BIG_ENDIAN 0
 123 #define BYTES_BIG_ENDIAN 0
 124 #define WORDS_BIG_ENDIAN 0
 125
 126 #ifdef IN_LIBGCC2
 127 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
 128 #define UNITS_PER_WORD 4
 129 #else
 130 /* Width of a word, in units (bytes).  */
 131 #define UNITS_PER_WORD 1
 132 #endif
 133
 134 #define POINTER_SIZE 16
 135
 136
 137 /* Maximum sized of reasonable data type
 138    DImode or Dfmode ...  */
 139 #define MAX_FIXED_MODE_SIZE 32
 140
 141 #define PARM_BOUNDARY 8
 142
 143 #define FUNCTION_BOUNDARY 8
 144
 145 #define EMPTY_FIELD_BOUNDARY 8
 146
 147 /* No data type wants to be aligned rounder than this.  */
 148 #define BIGGEST_ALIGNMENT 8
 149
 150 #define MAX_OFILE_ALIGNMENT (32768 * 8)
 151
 152 #define TARGET_VTABLE_ENTRY_ALIGN 8
 153
 154 #define STRICT_ALIGNMENT 0
 155
 156 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
 157 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
 158 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
 159 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
 160 #define FLOAT_TYPE_SIZE 32
 161 #define DOUBLE_TYPE_SIZE 32
 162 #define LONG_DOUBLE_TYPE_SIZE 32
 163
 164 #define DEFAULT_SIGNED_CHAR 1
 165
 166 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
 167 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
 168
 169 #define WCHAR_TYPE_SIZE 16
 170
 171 #define FIRST_PSEUDO_REGISTER 36
 172
 173 #define FIXED_REGISTERS {\
 174   1,1,/* r0 r1 */\
 175   0,0,/* r2 r3 */\
 176   0,0,/* r4 r5 */\
 177   0,0,/* r6 r7 */\
 178   0,0,/* r8 r9 */\
 179   0,0,/* r10 r11 */\
 180   0,0,/* r12 r13 */\
 181   0,0,/* r14 r15 */\
 182   0,0,/* r16 r17 */\
 183   0,0,/* r18 r19 */\
 184   0,0,/* r20 r21 */\
 185   0,0,/* r22 r23 */\
 186   0,0,/* r24 r25 */\
 187   0,0,/* r26 r27 */\
 188   0,0,/* r28 r29 */\
 189   0,0,/* r30 r31 */\
 190   1,1,/*  STACK */\
 191   1,1 /* arg pointer */  }
 192
 193 #define CALL_USED_REGISTERS {                   \
 194   1,1,/* r0 r1 */                               \
 195     0,0,/* r2 r3 */                             \
 196     0,0,/* r4 r5 */                             \
 197     0,0,/* r6 r7 */                             \
 198     0,0,/* r8 r9 */                             \
 199     0,0,/* r10 r11 */                           \
 200     0,0,/* r12 r13 */                           \
 201     0,0,/* r14 r15 */                           \
 202     0,0,/* r16 r17 */                           \
 203     1,1,/* r18 r19 */                           \
 204     1,1,/* r20 r21 */                           \
 205     1,1,/* r22 r23 */                           \
 206     1,1,/* r24 r25 */                           \
 207     1,1,/* r26 r27 */                           \
 208     0,0,/* r28 r29 */                           \
 209     1,1,/* r30 r31 */                           \
 210     1,1,/*  STACK */                            \
 211     1,1 /* arg pointer */  }
 212
 213 #define REG_ALLOC_ORDER {                       \
 214     24,25,                                      \
 215     18,19,                                      \
 216     20,21,                                      \
 217     22,23,                                      \
 218     30,31,                                      \
 219     26,27,                                      \
 220     28,29,                                      \
 221     17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,    \
 222     0,1,                                        \
 223     32,33,34,35                                 \
 224     }
 225
 226 #define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
 227
 228
 229 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 230
 231 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
 232
 233 #define MODES_TIEABLE_P(MODE1, MODE2) 1
 234
 235 enum reg_class {
 236   NO_REGS,
 237   R0_REG,                       /* r0 */
 238   POINTER_X_REGS,               /* r26 - r27 */
 239   POINTER_Y_REGS,               /* r28 - r29 */
 240   POINTER_Z_REGS,               /* r30 - r31 */
 241   STACK_REG,                    /* STACK */
 242   BASE_POINTER_REGS,            /* r28 - r31 */
 243   POINTER_REGS,                 /* r26 - r31 */
 244   ADDW_REGS,                    /* r24 - r31 */
 245   SIMPLE_LD_REGS,               /* r16 - r23 */
 246   LD_REGS,                      /* r16 - r31 */
 247   NO_LD_REGS,                   /* r0 - r15 */
 248   GENERAL_REGS,                 /* r0 - r31 */
 249   ALL_REGS, LIM_REG_CLASSES
 250 };
 251
 252
 253 #define N_REG_CLASSES (int)LIM_REG_CLASSES
 254
 255 #define REG_CLASS_NAMES {                                       \
 256                  "NO_REGS",                                     \
 257                    "R0_REG",    /* r0 */                        \
 258                    "POINTER_X_REGS", /* r26 - r27 */            \
 259                    "POINTER_Y_REGS", /* r28 - r29 */            \
 260                    "POINTER_Z_REGS", /* r30 - r31 */            \
 261                    "STACK_REG", /* STACK */                     \
 262                    "BASE_POINTER_REGS", /* r28 - r31 */         \
 263                    "POINTER_REGS", /* r26 - r31 */              \
 264                    "ADDW_REGS", /* r24 - r31 */                 \
 265                    "SIMPLE_LD_REGS", /* r16 - r23 */            \
 266                    "LD_REGS",   /* r16 - r31 */                 \
 267                    "NO_LD_REGS", /* r0 - r15 */                 \
 268                    "GENERAL_REGS", /* r0 - r31 */               \
 269                    "ALL_REGS" }
 270
 271 #define REG_CLASS_CONTENTS {                                            \
 272   {0x00000000,0x00000000},      /* NO_REGS */                           \
 273   {0x00000001,0x00000000},      /* R0_REG */                            \
 274   {3 << REG_X,0x00000000},      /* POINTER_X_REGS, r26 - r27 */         \
 275   {3 << REG_Y,0x00000000},      /* POINTER_Y_REGS, r28 - r29 */         \
 276   {3 << REG_Z,0x00000000},      /* POINTER_Z_REGS, r30 - r31 */         \
 277   {0x00000000,0x00000003},      /* STACK_REG, STACK */                  \
 278   {(3 << REG_Y) | (3 << REG_Z),                                         \
 279      0x00000000},               /* BASE_POINTER_REGS, r28 - r31 */      \
 280   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z),                          \
 281      0x00000000},               /* POINTER_REGS, r26 - r31 */           \
 282   {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W),           \
 283      0x00000000},               /* ADDW_REGS, r24 - r31 */              \
 284   {0x00ff0000,0x00000000},      /* SIMPLE_LD_REGS r16 - r23 */          \
 285   {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16),    \
 286      0x00000000},       /* LD_REGS, r16 - r31 */                        \
 287   {0x0000ffff,0x00000000},      /* NO_LD_REGS  r0 - r15 */              \
 288   {0xffffffff,0x00000000},      /* GENERAL_REGS, r0 - r31 */            \
 289   {0xffffffff,0x00000003}       /* ALL_REGS */                          \
 290 }
 291
 292 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
 293
 294 /* The following macro defines cover classes for Integrated Register
 295    Allocator.  Cover classes is a set of non-intersected register
 296    classes covering all hard registers used for register allocation
 297    purpose.  Any move between two registers of a cover class should be
 298    cheaper than load or store of the registers.  The macro value is
 299    array of register classes with LIM_REG_CLASSES used as the end
 300    marker.  */
 301
 302 #define IRA_COVER_CLASSES               \
 303 {                                       \
 304   GENERAL_REGS, LIM_REG_CLASSES         \
 305 }
 306
 307 #define BASE_REG_CLASS (reload_completed ? BASE_POINTER_REGS : POINTER_REGS)
 308
 309 #define INDEX_REG_CLASS NO_REGS
 310
 311 #define REGNO_OK_FOR_BASE_P(r) (((r) < FIRST_PSEUDO_REGISTER            \
 312                                  && ((r) == REG_X                       \
 313                                      || (r) == REG_Y                    \
 314                                      || (r) == REG_Z                    \
 315                                      || (r) == ARG_POINTER_REGNUM))     \
 316                                 || (reg_renumber                        \
 317                                     && (reg_renumber[r] == REG_X        \
 318                                         || reg_renumber[r] == REG_Y     \
 319                                         || reg_renumber[r] == REG_Z     \
 320                                         || (reg_renumber[r]             \
 321                                             == ARG_POINTER_REGNUM))))
 322
 323 #define REGNO_OK_FOR_INDEX_P(NUM) 0
 324
 325 #define PREFERRED_RELOAD_CLASS(X, CLASS) preferred_reload_class(X,CLASS)
 326
 327 #define SMALL_REGISTER_CLASSES 1
 328
 329 #define CLASS_LIKELY_SPILLED_P(c) class_likely_spilled_p(c)
 330
 331 #define CLASS_MAX_NREGS(CLASS, MODE)   class_max_nregs (CLASS, MODE)
 332
 333 #define STACK_PUSH_CODE POST_DEC
 334
 335 #define STACK_GROWS_DOWNWARD
 336
 337 #define STARTING_FRAME_OFFSET 1
 338
 339 #define STACK_POINTER_OFFSET 1
 340
 341 #define FIRST_PARM_OFFSET(FUNDECL) 0
 342
 343 #define STACK_BOUNDARY 8
 344
 345 #define STACK_POINTER_REGNUM 32
 346
 347 #define FRAME_POINTER_REGNUM REG_Y
 348
 349 #define ARG_POINTER_REGNUM 34
 350
 351 #define STATIC_CHAIN_REGNUM 2
 352
 353 #define FRAME_POINTER_REQUIRED avr_frame_pointer_required_p()
 354
 355 /* Offset from the frame pointer register value to the top of the stack.  */
 356 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 0
 357
 358 #define ELIMINABLE_REGS {                                       \
 359       {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},               \
 360         {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}            \
 361        ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
 362
 363 #define CAN_ELIMINATE(FROM, TO) avr_can_eliminate (FROM, TO)
 364
 365 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                    \
 366   OFFSET = avr_initial_elimination_offset (FROM, TO)
 367
 368 #define RETURN_ADDR_RTX(count, x) \
 369   gen_rtx_MEM (Pmode, memory_address (Pmode, plus_constant (tem, 1)))
 370
 371 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
 372    for POST_DEC targets (PR27386).  */
 373 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
 374
 375 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0
 376
 377 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) (function_arg (&(CUM), MODE, TYPE, NAMED))
 378
 379 typedef struct avr_args {
 380   int nregs;                    /* # registers available for passing */
 381   int regno;                    /* next available register number */
 382 } CUMULATIVE_ARGS;
 383
 384 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
 385   init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
 386
 387 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)    \
 388   (function_arg_advance (&CUM, MODE, TYPE, NAMED))
 389
 390 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
 391
 392 extern int avr_reg_order[];
 393
 394 #define RET_REGISTER avr_ret_register ()
 395
 396 #define LIBCALL_VALUE(MODE)  avr_libcall_value (MODE)
 397
 398 #define FUNCTION_VALUE_REGNO_P(N) ((int) (N) == RET_REGISTER)
 399
 400 #define DEFAULT_PCC_STRUCT_RETURN 0
 401
 402 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
 403
 404 #define HAVE_POST_INCREMENT 1
 405 #define HAVE_PRE_DECREMENT 1
 406
 407 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
 408
 409 #define MAX_REGS_PER_ADDRESS 1
 410
 411 #ifdef REG_OK_STRICT
 412 #  define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
 413 {                                                       \
 414   if (legitimate_address_p (mode, operand, 1))          \
 415     goto ADDR;                                          \
 416 }
 417 #  else
 418 #  define GO_IF_LEGITIMATE_ADDRESS(mode, operand, ADDR) \
 419 {                                                       \
 420   if (legitimate_address_p (mode, operand, 0))          \
 421     goto ADDR;                                          \
 422 }
 423 #endif
 424
 425 #define REG_OK_FOR_BASE_NOSTRICT_P(X) \
 426   (REGNO (X) >= FIRST_PSEUDO_REGISTER || REG_OK_FOR_BASE_STRICT_P(X))
 427
 428 #define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
 429
 430 #ifdef REG_OK_STRICT
 431 #  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P (X)
 432 #else
 433 #  define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NOSTRICT_P (X)
 434 #endif
 435
 436 #define REG_OK_FOR_INDEX_P(X) 0
 437
 438 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)                          \
 439 {                                                                       \
 440   (X) = legitimize_address (X, OLDX, MODE);                             \
 441   if (memory_address_p (MODE, X))                                       \
 442     goto WIN;                                                           \
 443 }
 444
 445 #define XEXP_(X,Y) (X)
 446
 447 /* LEGITIMIZE_RELOAD_ADDRESS will allow register R26/27 to be used, where it
 448    is no worse than normal base pointers R28/29 and R30/31. For example:
 449    If base offset is greater than 63 bytes or for R++ or --R addressing.  */
 450
 451 #define LEGITIMIZE_RELOAD_ADDRESS(X, MODE, OPNUM, TYPE, IND_LEVELS, WIN)    \
 452 do {                                                                        \
 453   if (1&&(GET_CODE (X) == POST_INC || GET_CODE (X) == PRE_DEC))     \
 454     {                                                                       \
 455       push_reload (XEXP (X,0), XEXP (X,0), &XEXP (X,0), &XEXP (X,0),        \
 456                    POINTER_REGS, GET_MODE (X),GET_MODE (X) , 0, 0,          \
 457                    OPNUM, RELOAD_OTHER);                                    \
 458       goto WIN;                                                             \
 459     }                                                                       \
 460   if (GET_CODE (X) == PLUS                                                  \
 461       && REG_P (XEXP (X, 0))                                                \
 462       && reg_equiv_constant[REGNO (XEXP (X, 0))] == 0                       \
 463       && GET_CODE (XEXP (X, 1)) == CONST_INT                                \
 464       && INTVAL (XEXP (X, 1)) >= 1)                                         \
 465     {                                                                       \
 466       int fit = INTVAL (XEXP (X, 1)) <= (64 - GET_MODE_SIZE (MODE));        \
 467       if (fit)                                                              \
 468         {                                                                   \
 469           if (reg_equiv_address[REGNO (XEXP (X, 0))] != 0)                  \
 470             {                                                               \
 471               int regno = REGNO (XEXP (X, 0));                              \
 472               rtx mem = make_memloc (X, regno);                             \
 473               push_reload (XEXP (mem,0), NULL, &XEXP (mem,0), NULL,         \
 474                            POINTER_REGS, Pmode, VOIDmode, 0, 0,             \
 475                            1, ADDR_TYPE (TYPE));                            \
 476               push_reload (mem, NULL_RTX, &XEXP (X, 0), NULL,               \
 477                            BASE_POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0, \
 478                            OPNUM, TYPE);                                    \
 479               goto WIN;                                                     \
 480             }                                                               \
 481         }                                                                   \
 482       else if (! (frame_pointer_needed && XEXP (X,0) == frame_pointer_rtx)) \
 483         {                                                                   \
 484           push_reload (X, NULL_RTX, &X, NULL,                               \
 485                        POINTER_REGS, GET_MODE (X), VOIDmode, 0, 0,          \
 486                        OPNUM, TYPE);                                        \
 487           goto WIN;                                                         \
 488         }                                                                   \
 489     }                                                                       \
 490 } while(0)
 491
 492 #define LEGITIMATE_CONSTANT_P(X) 1
 493
 494 #define REGISTER_MOVE_COST(MODE, FROM, TO) ((FROM) == STACK_REG ? 6 \
 495                                             : (TO) == STACK_REG ? 12 \
 496                                             : 2)
 497
 498 #define MEMORY_MOVE_COST(MODE,CLASS,IN) ((MODE)==QImode ? 2 :   \
 499                                          (MODE)==HImode ? 4 :   \
 500                                          (MODE)==SImode ? 8 :   \
 501                                          (MODE)==SFmode ? 8 : 16)
 502
 503 #define BRANCH_COST(speed_p, predictable_p) 0
 504
 505 #define SLOW_BYTE_ACCESS 0
 506
 507 #define NO_FUNCTION_CSE
 508
 509 #define TEXT_SECTION_ASM_OP "\t.text"
 510
 511 #define DATA_SECTION_ASM_OP "\t.data"
 512
 513 #define BSS_SECTION_ASM_OP "\t.section .bss"
 514
 515 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
 516    There are no shared libraries on this target, and these sections are
 517    placed in the read-only program memory, so they are not writable.  */
 518
 519 #undef CTORS_SECTION_ASM_OP
 520 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
 521
 522 #undef DTORS_SECTION_ASM_OP
 523 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
 524
 525 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
 526
 527 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
 528
 529 #define SUPPORTS_INIT_PRIORITY 0
 530
 531 #define JUMP_TABLES_IN_TEXT_SECTION 0
 532
 533 #define ASM_COMMENT_START " ; "
 534
 535 #define ASM_APP_ON "/* #APP */\n"
 536
 537 #define ASM_APP_OFF "/* #NOAPP */\n"
 538
 539 /* Switch into a generic section.  */
 540 #define TARGET_ASM_NAMED_SECTION default_elf_asm_named_section
 541 #define TARGET_ASM_INIT_SECTIONS avr_asm_init_sections
 542
 543 #define ASM_OUTPUT_ASCII(FILE, P, SIZE)  gas_output_ascii (FILE,P,SIZE)
 544
 545 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
 546
 547 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)                     \
 548 do {                                                                       \
 549      fputs ("\t.comm ", (STREAM));                                         \
 550      assemble_name ((STREAM), (NAME));                                     \
 551      fprintf ((STREAM), ",%lu,1\n", (unsigned long)(SIZE));                \
 552 } while (0)
 553
 554 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED)                 \
 555   asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED))
 556
 557 #define ASM_OUTPUT_LOCAL(STREAM, NAME, SIZE, ROUNDED)                   \
 558 do {                                                                    \
 559      fputs ("\t.lcomm ", (STREAM));                                     \
 560      assemble_name ((STREAM), (NAME));                                  \
 561      fprintf ((STREAM), ",%d\n", (int)(SIZE));                          \
 562 } while (0)
 563
 564 #undef TYPE_ASM_OP
 565 #undef SIZE_ASM_OP
 566 #undef WEAK_ASM_OP
 567 #define TYPE_ASM_OP     "\t.type\t"
 568 #define SIZE_ASM_OP     "\t.size\t"
 569 #define WEAK_ASM_OP     "\t.weak\t"
 570 /* Define the strings used for the special svr4 .type and .size directives.
 571    These strings generally do not vary from one system running svr4 to
 572    another, but if a given system (e.g. m88k running svr) needs to use
 573    different pseudo-op names for these, they may be overridden in the
 574    file which includes this one.  */
 575
 576
 577 #undef TYPE_OPERAND_FMT
 578 #define TYPE_OPERAND_FMT        "@%s"
 579 /* The following macro defines the format used to output the second
 580    operand of the .type assembler directive.  Different svr4 assemblers
 581    expect various different forms for this operand.  The one given here
 582    is just a default.  You may need to override it in your machine-
 583    specific tm.h file (depending upon the particulars of your assembler).  */
 584
 585 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL)             \
 586 avr_asm_declare_function_name ((FILE), (NAME), (DECL))
 587
 588 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL)                    \
 589   do {                                                                  \
 590     if (!flag_inhibit_size_directive)                                   \
 591       ASM_OUTPUT_MEASURED_SIZE (FILE, FNAME);                           \
 592   } while (0)
 593
 594 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL)                       \
 595 do {                                                                    \
 596   ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");                     \
 597   size_directive_output = 0;                                            \
 598   if (!flag_inhibit_size_directive && DECL_SIZE (DECL))                 \
 599     {                                                                   \
 600       size_directive_output = 1;                                        \
 601       ASM_OUTPUT_SIZE_DIRECTIVE (FILE, NAME,                            \
 602                                  int_size_in_bytes (TREE_TYPE (DECL))); \
 603     }                                                                   \
 604   ASM_OUTPUT_LABEL(FILE, NAME);                                         \
 605 } while (0)
 606
 607 #undef ASM_FINISH_DECLARE_OBJECT
 608 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END)         \
 609 do {                                                                     \
 610      const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0);             \
 611      HOST_WIDE_INT size;                                                 \
 612      if (!flag_inhibit_size_directive && DECL_SIZE (DECL)                \
 613          && ! AT_END && TOP_LEVEL                                        \
 614          && DECL_INITIAL (DECL) == error_mark_node                       \
 615          && !size_directive_output)                                      \
 616        {                                                                 \
 617          size_directive_output = 1;                                      \
 618          size = int_size_in_bytes (TREE_TYPE (DECL));                    \
 619          ASM_OUTPUT_SIZE_DIRECTIVE (FILE, name, size);                   \
 620        }                                                                 \
 621    } while (0)
 622
 623
 624 #define ESCAPES \
 625 "\1\1\1\1\1\1\1\1btn\1fr\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 626 \0\0\"\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\
 627 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\\\0\0\0\
 628 \0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\0\1\
 629 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 630 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 631 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\
 632 \1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1\1"
 633 /* A table of bytes codes used by the ASM_OUTPUT_ASCII and
 634    ASM_OUTPUT_LIMITED_STRING macros.  Each byte in the table
 635    corresponds to a particular byte value [0..255].  For any
 636    given byte value, if the value in the corresponding table
 637    position is zero, the given character can be output directly.
 638    If the table value is 1, the byte must be output as a \ooo
 639    octal escape.  If the tables value is anything else, then the
 640    byte value should be output as a \ followed by the value
 641    in the table.  Note that we can use standard UN*X escape
 642    sequences for many control characters, but we don't use
 643    \a to represent BEL because some svr4 assemblers (e.g. on
 644    the i386) don't know about that.  Also, we don't use \v
 645    since some versions of gas, such as 2.2 did not accept it.  */
 646
 647 #define STRING_LIMIT    ((unsigned) 64)
 648 #define STRING_ASM_OP   "\t.string\t"
 649 /* Some svr4 assemblers have a limit on the number of characters which
 650    can appear in the operand of a .string directive.  If your assembler
 651    has such a limitation, you should define STRING_LIMIT to reflect that
 652    limit.  Note that at least some svr4 assemblers have a limit on the
 653    actual number of bytes in the double-quoted string, and that they
 654    count each character in an escape sequence as one byte.  Thus, an
 655    escape sequence like \377 would count as four bytes.
 656
 657    If your target assembler doesn't support the .string directive, you
 658    should define this to zero.  */
 659
 660 /* Globalizing directive for a label.  */
 661 #define GLOBAL_ASM_OP ".global\t"
 662
 663 #define SET_ASM_OP      "\t.set\t"
 664
 665 #define ASM_WEAKEN_LABEL(FILE, NAME)    \
 666   do                                    \
 667     {                                   \
 668       fputs ("\t.weak\t", (FILE));      \
 669       assemble_name ((FILE), (NAME));   \
 670       fputc ('\n', (FILE));             \
 671     }                                   \
 672   while (0)
 673
 674 #define SUPPORTS_WEAK 1
 675
 676 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM)        \
 677 sprintf (STRING, "*.%s%lu", PREFIX, (unsigned long)(NUM))
 678
 679 #define HAS_INIT_SECTION 1
 680
 681 #define REGISTER_NAMES {                                \
 682   "r0","r1","r2","r3","r4","r5","r6","r7",              \
 683     "r8","r9","r10","r11","r12","r13","r14","r15",      \
 684     "r16","r17","r18","r19","r20","r21","r22","r23",    \
 685     "r24","r25","r26","r27","r28","r29","r30","r31",    \
 686     "__SP_L__","__SP_H__","argL","argH"}
 687
 688 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
 689
 690 #define PRINT_OPERAND(STREAM, X, CODE) print_operand (STREAM, X, CODE)
 691
 692 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) ((CODE) == '~' || (CODE) == '!')
 693
 694 #define PRINT_OPERAND_ADDRESS(STREAM, X) print_operand_address(STREAM, X)
 695
 696 #define USER_LABEL_PREFIX ""
 697
 698 #define ASSEMBLER_DIALECT AVR_HAVE_MOVW
 699
 700 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO)      \
 701 {                                               \
 702   gcc_assert (REGNO < 32);                      \
 703   fprintf (STREAM, "\tpush\tr%d", REGNO);       \
 704 }
 705
 706 #define ASM_OUTPUT_REG_POP(STREAM, REGNO)       \
 707 {                                               \
 708   gcc_assert (REGNO < 32);                      \
 709   fprintf (STREAM, "\tpop\tr%d", REGNO);        \
 710 }
 711
 712 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)          \
 713   avr_output_addr_vec_elt(STREAM, VALUE)
 714
 715 #define ASM_OUTPUT_CASE_LABEL(STREAM, PREFIX, NUM, TABLE) \
 716   (switch_to_section (progmem_section), \
 717    (*targetm.asm_out.internal_label) (STREAM, PREFIX, NUM))
 718
 719 #define ASM_OUTPUT_SKIP(STREAM, N)              \
 720 fprintf (STREAM, "\t.skip %lu,0\n", (unsigned long)(N))
 721
 722 #define ASM_OUTPUT_ALIGN(STREAM, POWER)                 \
 723   do {                                                  \
 724       if ((POWER) > 1)                                  \
 725           fprintf (STREAM, "\t.p2align\t%d\n", POWER);  \
 726   } while (0)
 727
 728 #define CASE_VECTOR_MODE HImode
 729
 730 #undef WORD_REGISTER_OPERATIONS
 731
 732 #define MOVE_MAX 4
 733
 734 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 735
 736 #define Pmode HImode
 737
 738 #define FUNCTION_MODE HImode
 739
 740 #define DOLLARS_IN_IDENTIFIERS 0
 741
 742 #define NO_DOLLAR_IN_LABEL 1
 743
 744 #define TRAMPOLINE_TEMPLATE(FILE) \
 745   internal_error ("trampolines not supported")
 746
 747 #define TRAMPOLINE_SIZE 4
 748
 749 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT)                             \
 750 {                                                                             \
 751   emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 2)), CXT);    \
 752   emit_move_insn (gen_rtx_MEM (HImode, plus_constant ((TRAMP), 6)), FNADDR); \
 753 }
 754 /* Store in cc_status the expressions
 755    that the condition codes will describe
 756    after execution of an instruction whose pattern is EXP.
 757    Do not alter them if the instruction would not alter the cc's.  */
 758
 759 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
 760
 761 /* The add insns don't set overflow in a usable way.  */
 762 #define CC_OVERFLOW_UNUSABLE 01000
 763 /* The mov,and,or,xor insns don't set carry.  That's ok though as the
 764    Z bit is all we need when doing unsigned comparisons on the result of
 765    these insns (since they're always with 0).  However, conditions.h has
 766    CC_NO_OVERFLOW defined for this purpose.  Rename it to something more
 767    understandable.  */
 768 #define CC_NO_CARRY CC_NO_OVERFLOW
 769
 770
 771 /* Output assembler code to FILE to increment profiler label # LABELNO
 772    for profiling a function entry.  */
 773
 774 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 775   fprintf (FILE, "/* profiler %d */", (LABELNO))
 776
 777 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
 778                                           adjust_insn_length (INSN, LENGTH))
 779
 780 #define CPP_SPEC "%{posix:-D_POSIX_SOURCE}"
 781
 782 #define CC1_SPEC "%{profile:-p}"
 783
 784 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
 785     %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
 786     %{!fexceptions:-fno-exceptions}"
 787 /* A C string constant that tells the GCC driver program options to
 788    pass to `cc1plus'.  */
 789
 790 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
 791 mmcu=*:-mmcu=%*}"
 792
 793 #define LINK_SPEC "\
 794 %{mrelax:--relax\
 795          %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
 796                              %{mmcu=atmega16*:--pmem-wrap-around=16k}\
 797                              %{mmcu=atmega32*|\
 798                                mmcu=at90can32*:--pmem-wrap-around=32k}\
 799                              %{mmcu=atmega64*|\
 800                                mmcu=at90can64*|\
 801                                mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
 802 %{!mmcu*: -m avr2}\
 803 %{mmcu=at90s1200|\
 804   mmcu=attiny11|\
 805   mmcu=attiny12|\
 806   mmcu=attiny15|\
 807   mmcu=attiny28: -m avr1}\
 808 %{mmcu=attiny22|\
 809   mmcu=attiny26|\
 810   mmcu=at90s2*|\
 811   mmcu=at90s4*|\
 812   mmcu=at90s8*|\
 813   mmcu=at90c8*|\
 814   mmcu=at86rf401|\
 815   mmcu=ata6289|\
 816   mmcu=attiny13*|\
 817   mmcu=attiny2313|\
 818   mmcu=attiny24|\
 819   mmcu=attiny25|\
 820   mmcu=attiny261|\
 821   mmcu=attiny4*|\
 822   mmcu=attiny8*: -m avr2}\
 823 %{mmcu=atmega103|\
 824   mmcu=at43*|\
 825   mmcu=at76*|\
 826   mmcu=at90usb82|\
 827   mmcu=at90usb162|\
 828   mmcu=attiny16*|\
 829   mmcu=attiny32*: -m avr3}\
 830 %{mmcu=atmega8*|\
 831   mmcu=atmega4*|\
 832   mmcu=at90pwm1|\
 833   mmcu=at90pwm2|\
 834   mmcu=at90pwm2b|\
 835   mmcu=at90pwm3|\
 836   mmcu=at90pwm3b|\
 837   mmcu=at90pwm81: -m avr4}\
 838 %{mmcu=atmega16*|\
 839   mmcu=atmega32*|\
 840   mmcu=atmega406|\
 841   mmcu=atmega64*|\
 842   mmcu=atmega128*|\
 843   mmcu=at90can*|\
 844   mmcu=at90pwm216|\
 845   mmcu=at90pwm316|\
 846   mmcu=at90scr100|\
 847   mmcu=at90usb64*|\
 848   mmcu=at90usb128*|\
 849   mmcu=at94k|\
 850   mmcu=m3000*|\
 851   mmcu=m3001*: -m avr5}\
 852 %{mmcu=atmega256*:-m avr6}\
 853 %{mmcu=atmega324*|\
 854   mmcu=atmega325*|\
 855   mmcu=atmega328p|\
 856   mmcu=atmega329*|\
 857   mmcu=atmega406|\
 858   mmcu=atmega48*|\
 859   mmcu=atmega88*|\
 860   mmcu=atmega64|\
 861   mmcu=atmega644*|\
 862   mmcu=atmega645*|\
 863   mmcu=atmega649*|\
 864   mmcu=atmega128|\
 865   mmcu=atmega1284p|\
 866   mmcu=atmega162|\
 867   mmcu=atmega164*|\
 868   mmcu=atmega165*|\
 869   mmcu=atmega168*|\
 870   mmcu=atmega169*|\
 871   mmcu=atmega4hv*|\
 872   mmcu=atmega8hv*|\
 873   mmcu=atmega16hv*|\
 874   mmcu=atmega32hv*|\
 875   mmcu=attiny48|\
 876   mmcu=attiny88|\
 877   mmcu=attiny87|\
 878   mmcu=attiny167|\
 879   mmcu=attiny327|\
 880   mmcu=at90can*|\
 881   mmcu=at90pwm*|\
 882   mmcu=atmega8c1|\
 883   mmcu=atmega16c1|\
 884   mmcu=atmega32c1|\
 885   mmcu=atmega64c1|\
 886   mmcu=atmega8m1|\
 887   mmcu=atmega16m1|\
 888   mmcu=atmega32m1|\
 889   mmcu=atmega64m1|\
 890   mmcu=atmega16u4|\
 891   mmcu=atmega32u*|\
 892   mmcu=at90scr100|\
 893   mmcu=ata6289|\
 894   mmcu=at90usb*: -Tdata 0x800100}\
 895 %{mmcu=atmega640|\
 896   mmcu=atmega1280|\
 897   mmcu=atmega1281|\
 898   mmcu=atmega256*|\
 899   mmcu=atmega128rfa1: -Tdata 0x800200}\
 900 %{mmcu=m3000*|\
 901   mmcu=m3001*: -Tdata 0x801000}"
 902
 903 #define LIB_SPEC \
 904   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
 905
 906 #define LIBSTDCXX "-lgcc"
 907 /* No libstdc++ for now.  Empty string doesn't work.  */
 908
 909 #define LIBGCC_SPEC \
 910   "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
 911
 912 #define STARTFILE_SPEC "%(crt_binutils)"
 913
 914 #define ENDFILE_SPEC ""
 915
 916 #define CRT_BINUTILS_SPECS "\
 917 %{mmcu=at90s1200|mmcu=avr1:crts1200.o%s} \
 918 %{mmcu=attiny11:crttn11.o%s} \
 919 %{mmcu=attiny12:crttn12.o%s} \
 920 %{mmcu=attiny15:crttn15.o%s} \
 921 %{mmcu=attiny28:crttn28.o%s} \
 922 %{!mmcu*|mmcu=at90s8515|mmcu=avr2:crts8515.o%s} \
 923 %{mmcu=at90s2313:crts2313.o%s} \
 924 %{mmcu=at90s2323:crts2323.o%s} \
 925 %{mmcu=at90s2333:crts2333.o%s} \
 926 %{mmcu=at90s2343:crts2343.o%s} \
 927 %{mmcu=attiny22:crttn22.o%s} \
 928 %{mmcu=attiny26:crttn26.o%s} \
 929 %{mmcu=at90s4433:crts4433.o%s} \
 930 %{mmcu=at90s4414:crts4414.o%s} \
 931 %{mmcu=at90s4434:crts4434.o%s} \
 932 %{mmcu=at90c8534:crtc8534.o%s} \
 933 %{mmcu=at90s8535:crts8535.o%s} \
 934 %{mmcu=at86rf401:crt86401.o%s} \
 935 %{mmcu=attiny13:crttn13.o%s} \
 936 %{mmcu=attiny13a:crttn13a.o%s} \
 937 %{mmcu=attiny2313|mmcu=avr25:crttn2313.o%s} \
 938 %{mmcu=attiny24:crttn24.o%s} \
 939 %{mmcu=attiny44:crttn44.o%s} \
 940 %{mmcu=attiny84:crttn84.o%s} \
 941 %{mmcu=attiny25:crttn25.o%s} \
 942 %{mmcu=attiny45:crttn45.o%s} \
 943 %{mmcu=attiny85:crttn85.o%s} \
 944 %{mmcu=attiny261:crttn261.o%s} \
 945 %{mmcu=attiny461:crttn461.o%s} \
 946 %{mmcu=attiny861:crttn861.o%s} \
 947 %{mmcu=attiny43u:crttn43u.o%s} \
 948 %{mmcu=attiny87:crttn87.o%s} \
 949 %{mmcu=attiny48:crttn48.o%s} \
 950 %{mmcu=attiny88:crttn88.o%s} \
 951 %{mmcu=ata6289:crta6289.o%s} \
 952 %{mmcu=at43usb355|mmcu=avr3:crt43355.o%s} \
 953 %{mmcu=at76c711:crt76711.o%s} \
 954 %{mmcu=atmega103|mmcu=avr31:crtm103.o%s} \
 955 %{mmcu=at43usb320:crt43320.o%s} \
 956 %{mmcu=at90usb162|mmcu=avr35:crtusb162.o%s} \
 957 %{mmcu=at90usb82:crtusb82.o%s} \
 958 %{mmcu=attiny167:crttn167.o%s} \
 959 %{mmcu=attiny327:crttn327.o%s} \
 960 %{mmcu=atmega8|mmcu=avr4:crtm8.o%s} \
 961 %{mmcu=atmega48:crtm48.o%s} \
 962 %{mmcu=atmega48p:crtm48p.o%s} \
 963 %{mmcu=atmega88:crtm88.o%s} \
 964 %{mmcu=atmega88p:crtm88p.o%s} \
 965 %{mmcu=atmega8515:crtm8515.o%s} \
 966 %{mmcu=atmega8535:crtm8535.o%s} \
 967 %{mmcu=atmega8c1:crtm8c1.o%s} \
 968 %{mmcu=atmega8m1:crtm8m1.o%s} \
 969 %{mmcu=at90pwm1:crt90pwm1.o%s} \
 970 %{mmcu=at90pwm2:crt90pwm2.o%s} \
 971 %{mmcu=at90pwm2b:crt90pwm2b.o%s} \
 972 %{mmcu=at90pwm3:crt90pwm3.o%s} \
 973 %{mmcu=at90pwm3b:crt90pwm3b.o%s} \
 974 %{mmcu=at90pwm81:crt90pwm81.o%s} \
 975 %{mmcu=atmega16:crtm16.o%s} \
 976 %{mmcu=atmega161|mmcu=avr5:crtm161.o%s} \
 977 %{mmcu=atmega162:crtm162.o%s} \
 978 %{mmcu=atmega163:crtm163.o%s} \
 979 %{mmcu=atmega164p:crtm164p.o%s} \
 980 %{mmcu=atmega165:crtm165.o%s} \
 981 %{mmcu=atmega165p:crtm165p.o%s} \
 982 %{mmcu=atmega168:crtm168.o%s} \
 983 %{mmcu=atmega168p:crtm168p.o%s} \
 984 %{mmcu=atmega169:crtm169.o%s} \
 985 %{mmcu=atmega169p:crtm169p.o%s} \
 986 %{mmcu=atmega32:crtm32.o%s} \
 987 %{mmcu=atmega323:crtm323.o%s} \
 988 %{mmcu=atmega324p:crtm324p.o%s} \
 989 %{mmcu=atmega325:crtm325.o%s} \
 990 %{mmcu=atmega325p:crtm325p.o%s} \
 991 %{mmcu=atmega3250:crtm3250.o%s} \
 992 %{mmcu=atmega3250p:crtm3250p.o%s} \
 993 %{mmcu=atmega328p:crtm328p.o%s} \
 994 %{mmcu=atmega329:crtm329.o%s} \
 995 %{mmcu=atmega329p:crtm329p.o%s} \
 996 %{mmcu=atmega3290:crtm3290.o%s} \
 997 %{mmcu=atmega3290p:crtm3290p.o%s} \
 998 %{mmcu=atmega406:crtm406.o%s} \
 999 %{mmcu=atmega64:crtm64.o%s} \
1000 %{mmcu=atmega640:crtm640.o%s} \
1001 %{mmcu=atmega644:crtm644.o%s} \
1002 %{mmcu=atmega644p:crtm644p.o%s} \
1003 %{mmcu=atmega645:crtm645.o%s} \
1004 %{mmcu=atmega6450:crtm6450.o%s} \
1005 %{mmcu=atmega649:crtm649.o%s} \
1006 %{mmcu=atmega6490:crtm6490.o%s} \
1007 %{mmcu=atmega8hva:crtm8hva.o%s} \
1008 %{mmcu=atmega16hva:crtm16hva.o%s} \
1009 %{mmcu=atmega16hvb:crtm16hvb.o%s} \
1010 %{mmcu=atmega32hvb:crtm32hvb.o%s} \
1011 %{mmcu=atmega4hvd:crtm4hvd.o%s} \
1012 %{mmcu=atmega8hvd:crtm8hvd.o%s} \
1013 %{mmcu=at90can32:crtcan32.o%s} \
1014 %{mmcu=at90can64:crtcan64.o%s} \
1015 %{mmcu=at90pwm216:crt90pwm216.o%s} \
1016 %{mmcu=at90pwm316:crt90pwm316.o%s} \
1017 %{mmcu=atmega16c1:crtm16c1.o%s} \
1018 %{mmcu=atmega32c1:crtm32c1.o%s} \
1019 %{mmcu=atmega64c1:crtm64c1.o%s} \
1020 %{mmcu=atmega16m1:crtm16m1.o%s} \
1021 %{mmcu=atmega32m1:crtm32m1.o%s} \
1022 %{mmcu=atmega64m1:crtm64m1.o%s} \
1023 %{mmcu=atmega16u4:crtm16u4.o%s} \
1024 %{mmcu=atmega32u4:crtm32u4.o%s} \
1025 %{mmcu=atmega32u6:crtm32u6.o%s} \
1026 %{mmcu=at90scr100:crt90scr100.o%s} \
1027 %{mmcu=at90usb646:crtusb646.o%s} \
1028 %{mmcu=at90usb647:crtusb647.o%s} \
1029 %{mmcu=at94k:crtat94k.o%s} \
1030 %{mmcu=atmega128|mmcu=avr51:crtm128.o%s} \
1031 %{mmcu=atmega1280:crtm1280.o%s} \
1032 %{mmcu=atmega1281:crtm1281.o%s} \
1033 %{mmcu=atmega1284p:crtm1284p.o%s} \
1034 %{mmcu=at90can128:crtcan128.o%s} \
1035 %{mmcu=atmega128rfa1:crtm128rfa1.o%s} \
1036 %{mmcu=at90usb1286:crtusb1286.o%s} \
1037 %{mmcu=at90usb1287:crtusb1287.o%s} \
1038 %{mmcu=m3000f:crtm3000f.o%s} \
1039 %{mmcu=m3000s:crtm3000s.o%s} \
1040 %{mmcu=m3001b:crtm3001b.o%s} \
1041 %{mmcu=atmega2560|mmcu=avr6:crtm2560.o%s} \
1042 %{mmcu=atmega2561:crtm2561.o%s}"
1043
1044 #define EXTRA_SPECS {"crt_binutils", CRT_BINUTILS_SPECS},
1045
1046 /* This is the default without any -mmcu=* option (AT90S*).  */
1047 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
1048
1049 /* This is undefined macro for collect2 disabling */
1050 #define LINKER_NAME "ld"
1051
1052 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
1053   TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
1054
1055 /* Note that the other files fail to use these
1056    in some of the places where they should.  */
1057
1058 #if defined(__STDC__) || defined(ALMOST_STDC)
1059 #define AS2(a,b,c) #a " " #b "," #c
1060 #define AS2C(b,c) " " #b "," #c
1061 #define AS3(a,b,c,d) #a " " #b "," #c "," #d
1062 #define AS1(a,b) #a " " #b
1063 #else
1064 #define AS1(a,b) "a     b"
1065 #define AS2(a,b,c) "a   b,c"
1066 #define AS2C(b,c) " b,c"
1067 #define AS3(a,b,c,d) "a b,c,d"
1068 #endif
1069 #define OUT_AS1(a,b) output_asm_insn (AS1(a,b), operands)
1070 #define OUT_AS2(a,b,c) output_asm_insn (AS2(a,b,c), operands)
1071 #define CR_TAB "\n\t"
1072
1073 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
1074
1075 #define DWARF2_DEBUGGING_INFO 1
1076
1077 #define DWARF2_ADDR_SIZE 4
1078
1079 #define OBJECT_FORMAT_ELF
1080
1081 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
1082   avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
1083
1084 /* A C structure for machine-specific, per-function data.
1085    This is added to the cfun structure.  */
1086 struct GTY(()) machine_function
1087 {
1088   /* 'true' - if the current function is a leaf function.  */
1089   int is_leaf;
1090
1091   /* 'true' - if current function is a naked function.  */
1092   int is_naked;
1093
1094   /* 'true' - if current function is an interrupt function
1095      as specified by the "interrupt" attribute.  */
1096   int is_interrupt;
1097
1098   /* 'true' - if current function is a signal function
1099      as specified by the "signal" attribute.  */
1100   int is_signal;
1101
1102   /* 'true' - if current function is a 'task' function
1103      as specified by the "OS_task" attribute.  */
1104   int is_OS_task;
1105
1106   /* 'true' - if current function is a 'main' function
1107      as specified by the "OS_main" attribute.  */
1108   int is_OS_main;
1109 };