1 /* Definitions of target machine for GNU compiler, for DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002 Free Software Foundation, Inc.
4 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* Target CPU builtins. */
24 #define TARGET_CPU_CPP_BUILTINS() \
27 builtin_define ("__alpha"); \
28 builtin_define ("__alpha__"); \
29 builtin_assert ("cpu=alpha"); \
30 builtin_assert ("machine=alpha"); \
33 builtin_define ("__alpha_cix__"); \
34 builtin_assert ("cpu=cix"); \
38 builtin_define ("__alpha_fix__"); \
39 builtin_assert ("cpu=fix"); \
43 builtin_define ("__alpha_bwx__"); \
44 builtin_assert ("cpu=bwx"); \
48 builtin_define ("__alpha_max__"); \
49 builtin_assert ("cpu=max"); \
53 builtin_define ("__alpha_ev6__"); \
54 builtin_assert ("cpu=ev6"); \
56 else if (TARGET_CPU_EV5) \
58 builtin_define ("__alpha_ev5__"); \
59 builtin_assert ("cpu=ev5"); \
61 else /* Presumably ev4. */ \
63 builtin_define ("__alpha_ev4__"); \
64 builtin_assert ("cpu=ev4"); \
66 if (TARGET_IEEE || TARGET_IEEE_WITH_INEXACT) \
67 builtin_define ("_IEEE_FP"); \
68 if (TARGET_IEEE_WITH_INEXACT) \
69 builtin_define ("_IEEE_FP_INEXACT"); \
71 /* Macros dependent on the C dialect. */ \
72 if (preprocessing_asm_p ()) \
73 builtin_define_std ("LANGUAGE_ASSEMBLY"); \
74 else if (c_language == clk_c) \
75 builtin_define_std ("LANGUAGE_C"); \
76 else if (c_language == clk_cplusplus) \
78 builtin_define ("__LANGUAGE_C_PLUS_PLUS"); \
79 builtin_define ("__LANGUAGE_C_PLUS_PLUS__");\
81 else if (c_language == clk_objective_c) \
83 builtin_define ("__LANGUAGE_OBJECTIVE_C"); \
84 builtin_define ("__LANGUAGE_OBJECTIVE_C__");\
88 #define CPP_SPEC "%(cpp_subtarget)"
90 #ifndef CPP_SUBTARGET_SPEC
91 #define CPP_SUBTARGET_SPEC ""
94 #define WORD_SWITCH_TAKES_ARG(STR) \
95 (!strcmp (STR, "rpath") || DEFAULT_WORD_SWITCH_TAKES_ARG(STR))
97 /* Print subsidiary information on the compiler version in use. */
98 #define TARGET_VERSION
100 /* Run-time compilation parameters selecting different hardware subsets. */
102 /* Which processor to schedule for. The cpu attribute defines a list that
103 mirrors this list, so changes to alpha.md must be made at the same time. */
106 {PROCESSOR_EV4, /* 2106[46]{a,} */
107 PROCESSOR_EV5, /* 21164{a,pc,} */
108 PROCESSOR_EV6}; /* 21264 */
110 extern enum processor_type alpha_cpu;
112 enum alpha_trap_precision
114 ALPHA_TP_PROG, /* No precision (default). */
115 ALPHA_TP_FUNC, /* Trap contained within originating function. */
116 ALPHA_TP_INSN /* Instruction accuracy and code is resumption safe. */
119 enum alpha_fp_rounding_mode
121 ALPHA_FPRM_NORM, /* Normal rounding mode. */
122 ALPHA_FPRM_MINF, /* Round towards minus-infinity. */
123 ALPHA_FPRM_CHOP, /* Chopped rounding mode (towards 0). */
124 ALPHA_FPRM_DYN /* Dynamic rounding mode. */
127 enum alpha_fp_trap_mode
129 ALPHA_FPTM_N, /* Normal trap mode. */
130 ALPHA_FPTM_U, /* Underflow traps enabled. */
131 ALPHA_FPTM_SU, /* Software completion, w/underflow traps */
132 ALPHA_FPTM_SUI /* Software completion, w/underflow & inexact traps */
135 extern int target_flags;
137 extern enum alpha_trap_precision alpha_tp;
138 extern enum alpha_fp_rounding_mode alpha_fprm;
139 extern enum alpha_fp_trap_mode alpha_fptm;
140 extern int alpha_tls_size;
142 /* This means that floating-point support exists in the target implementation
143 of the Alpha architecture. This is usually the default. */
144 #define MASK_FP (1 << 0)
145 #define TARGET_FP (target_flags & MASK_FP)
147 /* This means that floating-point registers are allowed to be used. Note
148 that Alpha implementations without FP operations are required to
149 provide the FP registers. */
151 #define MASK_FPREGS (1 << 1)
152 #define TARGET_FPREGS (target_flags & MASK_FPREGS)
154 /* This means that gas is used to process the assembler file. */
156 #define MASK_GAS (1 << 2)
157 #define TARGET_GAS (target_flags & MASK_GAS)
159 /* This means that we should mark procedures as IEEE conformant. */
161 #define MASK_IEEE_CONFORMANT (1 << 3)
162 #define TARGET_IEEE_CONFORMANT (target_flags & MASK_IEEE_CONFORMANT)
164 /* This means we should be IEEE-compliant except for inexact. */
166 #define MASK_IEEE (1 << 4)
167 #define TARGET_IEEE (target_flags & MASK_IEEE)
169 /* This means we should be fully IEEE-compliant. */
171 #define MASK_IEEE_WITH_INEXACT (1 << 5)
172 #define TARGET_IEEE_WITH_INEXACT (target_flags & MASK_IEEE_WITH_INEXACT)
174 /* This means we must construct all constants rather than emitting
175 them as literal data. */
177 #define MASK_BUILD_CONSTANTS (1 << 6)
178 #define TARGET_BUILD_CONSTANTS (target_flags & MASK_BUILD_CONSTANTS)
180 /* This means we handle floating points in VAX F- (float)
181 or G- (double) Format. */
183 #define MASK_FLOAT_VAX (1 << 7)
184 #define TARGET_FLOAT_VAX (target_flags & MASK_FLOAT_VAX)
186 /* This means that the processor has byte and half word loads and stores
187 (the BWX extension). */
189 #define MASK_BWX (1 << 8)
190 #define TARGET_BWX (target_flags & MASK_BWX)
192 /* This means that the processor has the MAX extension. */
193 #define MASK_MAX (1 << 9)
194 #define TARGET_MAX (target_flags & MASK_MAX)
196 /* This means that the processor has the FIX extension. */
197 #define MASK_FIX (1 << 10)
198 #define TARGET_FIX (target_flags & MASK_FIX)
200 /* This means that the processor has the CIX extension. */
201 #define MASK_CIX (1 << 11)
202 #define TARGET_CIX (target_flags & MASK_CIX)
204 /* This means use !literal style explicit relocations. */
205 #define MASK_EXPLICIT_RELOCS (1 << 12)
206 #define TARGET_EXPLICIT_RELOCS (target_flags & MASK_EXPLICIT_RELOCS)
208 /* This means use 16-bit relocations to .sdata/.sbss. */
209 #define MASK_SMALL_DATA (1 << 13)
210 #define TARGET_SMALL_DATA (target_flags & MASK_SMALL_DATA)
212 /* This means emit thread pointer loads for kernel not user. */
213 #define MASK_TLS_KERNEL (1 << 14)
214 #define TARGET_TLS_KERNEL (target_flags & MASK_TLS_KERNEL)
216 /* This means that the processor is an EV5, EV56, or PCA56.
217 Unlike alpha_cpu this is not affected by -mtune= setting. */
218 #define MASK_CPU_EV5 (1 << 28)
219 #define TARGET_CPU_EV5 (target_flags & MASK_CPU_EV5)
221 /* Likewise for EV6. */
222 #define MASK_CPU_EV6 (1 << 29)
223 #define TARGET_CPU_EV6 (target_flags & MASK_CPU_EV6)
225 /* This means we support the .arch directive in the assembler. Only
226 defined in TARGET_CPU_DEFAULT. */
227 #define MASK_SUPPORT_ARCH (1 << 30)
228 #define TARGET_SUPPORT_ARCH (target_flags & MASK_SUPPORT_ARCH)
230 /* These are for target os support and cannot be changed at runtime. */
231 #define TARGET_ABI_WINDOWS_NT 0
232 #define TARGET_ABI_OPEN_VMS 0
233 #define TARGET_ABI_UNICOSMK 0
234 #define TARGET_ABI_OSF (!TARGET_ABI_WINDOWS_NT \
235 && !TARGET_ABI_OPEN_VMS \
236 && !TARGET_ABI_UNICOSMK)
238 #ifndef TARGET_AS_CAN_SUBTRACT_LABELS
239 #define TARGET_AS_CAN_SUBTRACT_LABELS TARGET_GAS
241 #ifndef TARGET_AS_SLASH_BEFORE_SUFFIX
242 #define TARGET_AS_SLASH_BEFORE_SUFFIX TARGET_GAS
244 #ifndef TARGET_CAN_FAULT_IN_PROLOGUE
245 #define TARGET_CAN_FAULT_IN_PROLOGUE 0
247 #ifndef TARGET_HAS_XFLOATING_LIBS
248 #define TARGET_HAS_XFLOATING_LIBS 0
250 #ifndef TARGET_PROFILING_NEEDS_GP
251 #define TARGET_PROFILING_NEEDS_GP 0
253 #ifndef TARGET_LD_BUGGY_LDGP
254 #define TARGET_LD_BUGGY_LDGP 0
256 #ifndef TARGET_FIXUP_EV5_PREFETCH
257 #define TARGET_FIXUP_EV5_PREFETCH 0
260 #define HAVE_AS_TLS 0
263 /* Macro to define tables used to set the flags.
264 This is a list in braces of pairs in braces,
265 each pair being { "NAME", VALUE }
266 where VALUE is the bits to set or minus the bits to clear.
267 An empty string NAME is used to identify the default VALUE. */
269 #define TARGET_SWITCHES \
270 { {"no-soft-float", MASK_FP, N_("Use hardware fp")}, \
271 {"soft-float", - MASK_FP, N_("Do not use hardware fp")}, \
272 {"fp-regs", MASK_FPREGS, N_("Use fp registers")}, \
273 {"no-fp-regs", - (MASK_FP|MASK_FPREGS), \
274 N_("Do not use fp registers")}, \
275 {"alpha-as", -MASK_GAS, N_("Do not assume GAS")}, \
276 {"gas", MASK_GAS, N_("Assume GAS")}, \
277 {"ieee-conformant", MASK_IEEE_CONFORMANT, \
278 N_("Request IEEE-conformant math library routines (OSF/1)")}, \
279 {"ieee", MASK_IEEE|MASK_IEEE_CONFORMANT, \
280 N_("Emit IEEE-conformant code, without inexact exceptions")}, \
281 {"ieee-with-inexact", MASK_IEEE_WITH_INEXACT|MASK_IEEE_CONFORMANT, \
282 N_("Emit IEEE-conformant code, with inexact exceptions")}, \
283 {"build-constants", MASK_BUILD_CONSTANTS, \
284 N_("Do not emit complex integer constants to read-only memory")}, \
285 {"float-vax", MASK_FLOAT_VAX, N_("Use VAX fp")}, \
286 {"float-ieee", -MASK_FLOAT_VAX, N_("Do not use VAX fp")}, \
287 {"bwx", MASK_BWX, N_("Emit code for the byte/word ISA extension")}, \
288 {"no-bwx", -MASK_BWX, ""}, \
290 N_("Emit code for the motion video ISA extension")}, \
291 {"no-max", -MASK_MAX, ""}, \
293 N_("Emit code for the fp move and sqrt ISA extension")}, \
294 {"no-fix", -MASK_FIX, ""}, \
295 {"cix", MASK_CIX, N_("Emit code for the counting ISA extension")}, \
296 {"no-cix", -MASK_CIX, ""}, \
297 {"explicit-relocs", MASK_EXPLICIT_RELOCS, \
298 N_("Emit code using explicit relocation directives")}, \
299 {"no-explicit-relocs", -MASK_EXPLICIT_RELOCS, ""}, \
300 {"small-data", MASK_SMALL_DATA, \
301 N_("Emit 16-bit relocations to the small data areas")}, \
302 {"large-data", -MASK_SMALL_DATA, \
303 N_("Emit 32-bit relocations to the small data areas")}, \
304 {"tls-kernel", MASK_TLS_KERNEL, \
305 N_("Emit rdval instead of rduniq for thread pointer")}, \
306 {"", TARGET_DEFAULT | TARGET_CPU_DEFAULT \
307 | TARGET_DEFAULT_EXPLICIT_RELOCS, ""} }
309 #define TARGET_DEFAULT MASK_FP|MASK_FPREGS
311 #ifndef TARGET_CPU_DEFAULT
312 #define TARGET_CPU_DEFAULT 0
315 #ifndef TARGET_DEFAULT_EXPLICIT_RELOCS
316 #ifdef HAVE_AS_EXPLICIT_RELOCS
317 #define TARGET_DEFAULT_EXPLICIT_RELOCS MASK_EXPLICIT_RELOCS
319 #define TARGET_DEFAULT_EXPLICIT_RELOCS 0
323 extern const char *alpha_cpu_string; /* For -mcpu= */
324 extern const char *alpha_tune_string; /* For -mtune= */
325 extern const char *alpha_fprm_string; /* For -mfp-rounding-mode=[n|m|c|d] */
326 extern const char *alpha_fptm_string; /* For -mfp-trap-mode=[n|u|su|sui] */
327 extern const char *alpha_tp_string; /* For -mtrap-precision=[p|f|i] */
328 extern const char *alpha_mlat_string; /* For -mmemory-latency= */
329 extern const char *alpha_tls_size_string; /* For -mtls-size= */
331 #define TARGET_OPTIONS \
333 {"cpu=", &alpha_cpu_string, \
334 N_("Use features of and schedule given CPU")}, \
335 {"tune=", &alpha_tune_string, \
336 N_("Schedule given CPU")}, \
337 {"fp-rounding-mode=", &alpha_fprm_string, \
338 N_("Control the generated fp rounding mode")}, \
339 {"fp-trap-mode=", &alpha_fptm_string, \
340 N_("Control the IEEE trap mode")}, \
341 {"trap-precision=", &alpha_tp_string, \
342 N_("Control the precision given to fp exceptions")}, \
343 {"memory-latency=", &alpha_mlat_string, \
344 N_("Tune expected memory latency")}, \
345 {"tls-size=", &alpha_tls_size_string, \
346 N_("Specify bit size of immediate TLS offsets")}, \
349 /* This macro defines names of additional specifications to put in the
350 specs that can be used in various specifications like CC1_SPEC. Its
351 definition is an initializer with a subgrouping for each command option.
353 Each subgrouping contains a string constant, that defines the
354 specification name, and a string constant that used by the GNU CC driver
357 Do not define this macro if it does not need to do anything. */
359 #ifndef SUBTARGET_EXTRA_SPECS
360 #define SUBTARGET_EXTRA_SPECS
363 #define EXTRA_SPECS \
364 { "cpp_subtarget", CPP_SUBTARGET_SPEC }, \
365 SUBTARGET_EXTRA_SPECS
368 /* Sometimes certain combinations of command options do not make sense
369 on a particular target machine. You can define a macro
370 `OVERRIDE_OPTIONS' to take account of this. This macro, if
371 defined, is executed once just after all the command options have
374 On the Alpha, it is used to translate target-option strings into
377 #define OVERRIDE_OPTIONS override_options ()
380 /* Define this macro to change register usage conditional on target flags.
382 On the Alpha, we use this to disable the floating-point registers when
385 #define CONDITIONAL_REGISTER_USAGE \
388 if (! TARGET_FPREGS) \
389 for (i = 32; i < 63; i++) \
390 fixed_regs[i] = call_used_regs[i] = 1; \
394 /* Show we can debug even without a frame pointer. */
395 #define CAN_DEBUG_WITHOUT_FP
397 /* target machine storage layout */
399 /* Define the size of `int'. The default is the same as the word size. */
400 #define INT_TYPE_SIZE 32
402 /* Define the size of `long long'. The default is the twice the word size. */
403 #define LONG_LONG_TYPE_SIZE 64
405 /* The two floating-point formats we support are S-floating, which is
406 4 bytes, and T-floating, which is 8 bytes. `float' is S and `double'
407 and `long double' are T. */
409 #define FLOAT_TYPE_SIZE 32
410 #define DOUBLE_TYPE_SIZE 64
411 #define LONG_DOUBLE_TYPE_SIZE 64
413 #define WCHAR_TYPE "unsigned int"
414 #define WCHAR_TYPE_SIZE 32
416 /* Define this macro if it is advisable to hold scalars in registers
417 in a wider mode than that declared by the program. In such cases,
418 the value is constrained to be within the bounds of the declared
419 type, but kept valid in the wider mode. The signedness of the
420 extension may differ from that of the type.
422 For Alpha, we always store objects in a full register. 32-bit objects
423 are always sign-extended, but smaller objects retain their signedness. */
425 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
426 if (GET_MODE_CLASS (MODE) == MODE_INT \
427 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
429 if ((MODE) == SImode) \
434 /* Define this if function arguments should also be promoted using the above
437 #define PROMOTE_FUNCTION_ARGS
439 /* Likewise, if the function return value is promoted. */
441 #define PROMOTE_FUNCTION_RETURN
443 /* Define this if most significant bit is lowest numbered
444 in instructions that operate on numbered bit-fields.
446 There are no such instructions on the Alpha, but the documentation
448 #define BITS_BIG_ENDIAN 0
450 /* Define this if most significant byte of a word is the lowest numbered.
451 This is false on the Alpha. */
452 #define BYTES_BIG_ENDIAN 0
454 /* Define this if most significant word of a multiword number is lowest
457 For Alpha we can decide arbitrarily since there are no machine instructions
458 for them. Might as well be consistent with bytes. */
459 #define WORDS_BIG_ENDIAN 0
461 /* Width of a word, in units (bytes). */
462 #define UNITS_PER_WORD 8
464 /* Width in bits of a pointer.
465 See also the macro `Pmode' defined below. */
466 #define POINTER_SIZE 64
468 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
469 #define PARM_BOUNDARY 64
471 /* Boundary (in *bits*) on which stack pointer should be aligned. */
472 #define STACK_BOUNDARY 64
474 /* Allocation boundary (in *bits*) for the code of a function. */
475 #define FUNCTION_BOUNDARY 32
477 /* Alignment of field after `int : 0' in a structure. */
478 #define EMPTY_FIELD_BOUNDARY 64
480 /* Every structure's size must be a multiple of this. */
481 #define STRUCTURE_SIZE_BOUNDARY 8
483 /* A bitfield declared as `int' forces `int' alignment for the struct. */
484 #define PCC_BITFIELD_TYPE_MATTERS 1
486 /* No data type wants to be aligned rounder than this. */
487 #define BIGGEST_ALIGNMENT 128
489 /* For atomic access to objects, must have at least 32-bit alignment
490 unless the machine has byte operations. */
491 #define MINIMUM_ATOMIC_ALIGNMENT ((unsigned int) (TARGET_BWX ? 8 : 32))
493 /* Align all constants and variables to at least a word boundary so
494 we can pick up pieces of them faster. */
495 /* ??? Only if block-move stuff knows about different source/destination
498 #define CONSTANT_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
499 #define DATA_ALIGNMENT(EXP, ALIGN) MAX ((ALIGN), BITS_PER_WORD)
502 /* Set this non-zero if move instructions will actually fail to work
503 when given unaligned data.
505 Since we get an error message when we do one, call them invalid. */
507 #define STRICT_ALIGNMENT 1
509 /* Set this non-zero if unaligned move instructions are extremely slow.
511 On the Alpha, they trap. */
513 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) 1
515 /* Standard register usage. */
517 /* Number of actual hardware registers.
518 The hardware registers are assigned numbers for the compiler
519 from 0 to just below FIRST_PSEUDO_REGISTER.
520 All registers that the compiler knows about must be given numbers,
521 even those that are not normally considered general registers.
523 We define all 32 integer registers, even though $31 is always zero,
524 and all 32 floating-point registers, even though $f31 is also
525 always zero. We do not bother defining the FP status register and
526 there are no other registers.
528 Since $31 is always zero, we will use register number 31 as the
529 argument pointer. It will never appear in the generated code
530 because we will always be eliminating it in favor of the stack
531 pointer or hardware frame pointer.
533 Likewise, we use $f31 for the frame pointer, which will always
534 be eliminated in favor of the hardware frame pointer or the
537 #define FIRST_PSEUDO_REGISTER 64
539 /* 1 for registers that have pervasive standard uses
540 and are not available for the register allocator. */
542 #define FIXED_REGISTERS \
543 {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
544 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, \
545 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
546 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
548 /* 1 for registers not available across function calls.
549 These must include the FIXED_REGISTERS and also any
550 registers that can be used without being saved.
551 The latter must include the registers where values are returned
552 and the register where structure-value addresses are passed.
553 Aside from that, you can include as many other registers as you like. */
554 #define CALL_USED_REGISTERS \
555 {1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \
556 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, \
557 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, \
558 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
560 /* List the order in which to allocate registers. Each register must be
561 listed once, even those in FIXED_REGISTERS.
563 We allocate in the following order:
564 $f10-$f15 (nonsaved floating-point register)
566 $f21-$f16 (likewise, but input args)
567 $f0 (nonsaved, but return value)
568 $f1 (nonsaved, but immediate before saved)
569 $f2-$f9 (saved floating-point registers)
570 $1-$8 (nonsaved integer registers)
573 $0 (likewise, but return value)
574 $21-$16 (likewise, but input args)
575 $27 (procedure value in OSF, nonsaved in NT)
576 $9-$14 (saved integer registers)
580 $30, $31, $f31 (stack pointer and always zero/ap & fp) */
582 #define REG_ALLOC_ORDER \
583 {42, 43, 44, 45, 46, 47, \
584 54, 55, 56, 57, 58, 59, 60, 61, 62, \
585 53, 52, 51, 50, 49, 48, \
587 34, 35, 36, 37, 38, 39, 40, 41, \
588 1, 2, 3, 4, 5, 6, 7, 8, \
592 21, 20, 19, 18, 17, 16, \
594 9, 10, 11, 12, 13, 14, \
600 /* Return number of consecutive hard regs needed starting at reg REGNO
601 to hold something of mode MODE.
602 This is ordinarily the length in words of a value of mode MODE
603 but can be less for certain modes in special long registers. */
605 #define HARD_REGNO_NREGS(REGNO, MODE) \
606 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
608 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
609 On Alpha, the integer registers can hold any mode. The floating-point
610 registers can hold 32-bit and 64-bit integers as well, but not 16-bit
613 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
614 ((REGNO) >= 32 && (REGNO) <= 62 \
615 ? GET_MODE_UNIT_SIZE (MODE) == 8 || GET_MODE_UNIT_SIZE (MODE) == 4 \
618 /* Value is 1 if MODE is a supported vector mode. */
620 #define VECTOR_MODE_SUPPORTED_P(MODE) \
622 && ((MODE) == V8QImode || (MODE) == V4HImode || (MODE) == V2SImode))
624 /* A C expression that is nonzero if a value of mode
625 MODE1 is accessible in mode MODE2 without copying.
627 This asymmetric test is true when MODE1 could be put
628 in an FP register but MODE2 could not. */
630 #define MODES_TIEABLE_P(MODE1, MODE2) \
631 (HARD_REGNO_MODE_OK (32, (MODE1)) \
632 ? HARD_REGNO_MODE_OK (32, (MODE2)) \
635 /* Specify the registers used for certain standard purposes.
636 The values of these macros are register numbers. */
638 /* Alpha pc isn't overloaded on a register that the compiler knows about. */
639 /* #define PC_REGNUM */
641 /* Register to use for pushing function arguments. */
642 #define STACK_POINTER_REGNUM 30
644 /* Base register for access to local variables of the function. */
645 #define HARD_FRAME_POINTER_REGNUM 15
647 /* Value should be nonzero if functions must have frame pointers.
648 Zero means the frame pointer need not be set up (and parms
649 may be accessed via the stack pointer) in functions that seem suitable.
650 This is computed in `reload', in reload1.c. */
651 #define FRAME_POINTER_REQUIRED 0
653 /* Base register for access to arguments of the function. */
654 #define ARG_POINTER_REGNUM 31
656 /* Base register for access to local variables of function. */
657 #define FRAME_POINTER_REGNUM 63
659 /* Register in which static-chain is passed to a function.
661 For the Alpha, this is based on an example; the calling sequence
662 doesn't seem to specify this. */
663 #define STATIC_CHAIN_REGNUM 1
665 /* The register number of the register used to address a table of
666 static data addresses in memory. */
667 #define PIC_OFFSET_TABLE_REGNUM 29
669 /* Define this macro if the register defined by `PIC_OFFSET_TABLE_REGNUM'
670 is clobbered by calls. */
671 /* ??? It is and it isn't. It's required to be valid for a given
672 function when the function returns. It isn't clobbered by
673 current_file functions. Moreover, we do not expose the ldgp
674 until after reload, so we're probably safe. */
675 /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */
677 /* Register in which address to store a structure value
678 arrives in the function. On the Alpha, the address is passed
679 as a hidden argument. */
680 #define STRUCT_VALUE 0
682 /* Define the classes of registers for register constraints in the
683 machine description. Also define ranges of constants.
685 One of the classes must always be named ALL_REGS and include all hard regs.
686 If there is more than one class, another class must be named NO_REGS
687 and contain no registers.
689 The name GENERAL_REGS must be the name of a class (or an alias for
690 another name such as ALL_REGS). This is the class of registers
691 that is allowed by "g" or "r" in a register constraint.
692 Also, registers outside this class are allocated only when
693 instructions express preferences for them.
695 The classes must be numbered in nondecreasing order; that is,
696 a larger-numbered class must never be contained completely
697 in a smaller-numbered class.
699 For any two classes, it is very desirable that there be another
700 class that represents their union. */
703 NO_REGS, R0_REG, R24_REG, R25_REG, R27_REG,
704 GENERAL_REGS, FLOAT_REGS, ALL_REGS,
708 #define N_REG_CLASSES (int) LIM_REG_CLASSES
710 /* Give names of register classes as strings for dump file. */
712 #define REG_CLASS_NAMES \
713 {"NO_REGS", "R0_REG", "R24_REG", "R25_REG", "R27_REG", \
714 "GENERAL_REGS", "FLOAT_REGS", "ALL_REGS" }
716 /* Define which registers fit in which classes.
717 This is an initializer for a vector of HARD_REG_SET
718 of length N_REG_CLASSES. */
720 #define REG_CLASS_CONTENTS \
721 { {0x00000000, 0x00000000}, /* NO_REGS */ \
722 {0x00000001, 0x00000000}, /* R0_REG */ \
723 {0x01000000, 0x00000000}, /* R24_REG */ \
724 {0x02000000, 0x00000000}, /* R25_REG */ \
725 {0x08000000, 0x00000000}, /* R27_REG */ \
726 {0xffffffff, 0x80000000}, /* GENERAL_REGS */ \
727 {0x00000000, 0x7fffffff}, /* FLOAT_REGS */ \
728 {0xffffffff, 0xffffffff} }
730 /* The same information, inverted:
731 Return the class number of the smallest class containing
732 reg number REGNO. This could be a conditional expression
733 or could index an array. */
735 #define REGNO_REG_CLASS(REGNO) \
736 ((REGNO) == 0 ? R0_REG \
737 : (REGNO) == 24 ? R24_REG \
738 : (REGNO) == 25 ? R25_REG \
739 : (REGNO) == 27 ? R27_REG \
740 : (REGNO) >= 32 && (REGNO) <= 62 ? FLOAT_REGS \
743 /* The class value for index registers, and the one for base regs. */
744 #define INDEX_REG_CLASS NO_REGS
745 #define BASE_REG_CLASS GENERAL_REGS
747 /* Get reg_class from a letter such as appears in the machine description. */
749 #define REG_CLASS_FROM_LETTER(C) \
750 ((C) == 'a' ? R24_REG \
751 : (C) == 'b' ? R25_REG \
752 : (C) == 'c' ? R27_REG \
753 : (C) == 'f' ? FLOAT_REGS \
754 : (C) == 'v' ? R0_REG \
757 /* Define this macro to change register usage conditional on target flags. */
758 /* #define CONDITIONAL_REGISTER_USAGE */
760 /* The letters I, J, K, L, M, N, O, and P in a register constraint string
761 can be used to stand for particular ranges of immediate operands.
762 This macro defines what the ranges are.
763 C is the letter, and VALUE is a constant value.
764 Return 1 if VALUE is in the range specified by C.
767 `I' is used for the range of constants most insns can contain.
768 `J' is the constant zero.
769 `K' is used for the constant in an LDA insn.
770 `L' is used for the constant in a LDAH insn.
771 `M' is used for the constants that can be AND'ed with using a ZAP insn.
772 `N' is used for complemented 8-bit constants.
773 `O' is used for negated 8-bit constants.
774 `P' is used for the constants 1, 2 and 3. */
776 #define CONST_OK_FOR_LETTER_P alpha_const_ok_for_letter_p
778 /* Similar, but for floating or large integer constants, and defining letters
779 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
781 For Alpha, `G' is the floating-point constant zero. `H' is a CONST_DOUBLE
782 that is the operand of a ZAP insn. */
784 #define CONST_DOUBLE_OK_FOR_LETTER_P alpha_const_double_ok_for_letter_p
786 /* Optional extra constraints for this machine.
788 For the Alpha, `Q' means that this is a memory operand but not a
789 reference to an unaligned location.
791 `R' is a SYMBOL_REF that has SYMBOL_REF_FLAG set or is the current
794 'S' is a 6-bit constant (valid for a shift insn).
798 'U' is a symbolic operand.
800 'W' is a vector zero. */
802 #define EXTRA_CONSTRAINT alpha_extra_constraint
804 /* Given an rtx X being reloaded into a reg required to be
805 in class CLASS, return the class of reg to actually use.
806 In general this is just CLASS; but on some machines
807 in some cases it is preferable to use a more restrictive class. */
809 #define PREFERRED_RELOAD_CLASS alpha_preferred_reload_class
811 /* Loading and storing HImode or QImode values to and from memory
812 usually requires a scratch register. The exceptions are loading
813 QImode and HImode from an aligned address to a general register
814 unless byte instructions are permitted.
815 We also cannot load an unaligned address or a paradoxical SUBREG into an
818 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS,MODE,IN) \
819 secondary_reload_class((CLASS), (MODE), (IN), 1)
821 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS,MODE,OUT) \
822 secondary_reload_class((CLASS), (MODE), (OUT), 0)
824 /* If we are copying between general and FP registers, we need a memory
825 location unless the FIX extension is available. */
827 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
828 (! TARGET_FIX && (((CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS) \
829 || ((CLASS2) == FLOAT_REGS && (CLASS1) != FLOAT_REGS)))
831 /* Specify the mode to be used for memory when a secondary memory
832 location is needed. If MODE is floating-point, use it. Otherwise,
833 widen to a word like the default. This is needed because we always
834 store integers in FP registers in quadword format. This whole
835 area is very tricky! */
836 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
837 (GET_MODE_CLASS (MODE) == MODE_FLOAT ? (MODE) \
838 : GET_MODE_SIZE (MODE) >= 4 ? (MODE) \
839 : mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (MODE), 0))
841 /* Return the maximum number of consecutive registers
842 needed to represent mode MODE in a register of class CLASS. */
844 #define CLASS_MAX_NREGS(CLASS, MODE) \
845 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
847 /* If defined, gives a class of registers that cannot be used as the
848 operand of a SUBREG that changes the mode of the object illegally. */
850 #define CLASS_CANNOT_CHANGE_MODE FLOAT_REGS
852 /* Defines illegal mode changes for CLASS_CANNOT_CHANGE_MODE. */
854 #define CLASS_CANNOT_CHANGE_MODE_P(FROM,TO) \
855 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
857 /* Define the cost of moving between registers of various classes. Moving
858 between FLOAT_REGS and anything else except float regs is expensive.
859 In fact, we make it quite expensive because we really don't want to
860 do these moves unless it is clearly worth it. Optimizations may
861 reduce the impact of not being able to allocate a pseudo to a
864 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
865 (((CLASS1) == FLOAT_REGS) == ((CLASS2) == FLOAT_REGS) \
867 : TARGET_FIX ? 3 : 4+2*alpha_memory_latency)
869 /* A C expressions returning the cost of moving data of MODE from a register to
872 On the Alpha, bump this up a bit. */
874 extern int alpha_memory_latency;
875 #define MEMORY_MOVE_COST(MODE,CLASS,IN) (2*alpha_memory_latency)
877 /* Provide the cost of a branch. Exact meaning under development. */
878 #define BRANCH_COST 5
880 /* Stack layout; function entry, exit and calling. */
882 /* Define this if pushing a word on the stack
883 makes the stack pointer a smaller address. */
884 #define STACK_GROWS_DOWNWARD
886 /* Define this if the nominal address of the stack frame
887 is at the high-address end of the local variables;
888 that is, each additional local variable allocated
889 goes at a more negative offset in the frame. */
890 /* #define FRAME_GROWS_DOWNWARD */
892 /* Offset within stack frame to start allocating local variables at.
893 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
894 first local allocated. Otherwise, it is the offset to the BEGINNING
895 of the first local allocated. */
897 #define STARTING_FRAME_OFFSET 0
899 /* If we generate an insn to push BYTES bytes,
900 this says how many the stack pointer really advances by.
901 On Alpha, don't define this because there are no push insns. */
902 /* #define PUSH_ROUNDING(BYTES) */
904 /* Define this to be nonzero if stack checking is built into the ABI. */
905 #define STACK_CHECK_BUILTIN 1
907 /* Define this if the maximum size of all the outgoing args is to be
908 accumulated and pushed during the prologue. The amount can be
909 found in the variable current_function_outgoing_args_size. */
910 #define ACCUMULATE_OUTGOING_ARGS 1
912 /* Offset of first parameter from the argument pointer register value. */
914 #define FIRST_PARM_OFFSET(FNDECL) 0
916 /* Definitions for register eliminations.
918 We have two registers that can be eliminated on the Alpha. First, the
919 frame pointer register can often be eliminated in favor of the stack
920 pointer register. Secondly, the argument pointer register can always be
921 eliminated; it is replaced with either the stack or frame pointer. */
923 /* This is an array of structures. Each structure initializes one pair
924 of eliminable registers. The "from" register number is given first,
925 followed by "to". Eliminations of the same "from" register are listed
926 in order of preference. */
928 #define ELIMINABLE_REGS \
929 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
930 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
931 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
932 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
934 /* Given FROM and TO register numbers, say whether this elimination is allowed.
935 Frame pointer elimination is automatically handled.
937 All eliminations are valid since the cases where FP can't be
938 eliminated are already handled. */
940 #define CAN_ELIMINATE(FROM, TO) 1
942 /* Round up to a multiple of 16 bytes. */
943 #define ALPHA_ROUND(X) (((X) + 15) & ~ 15)
945 /* Define the offset between two registers, one to be eliminated, and the other
946 its replacement, at the start of a routine. */
947 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
948 { if ((FROM) == FRAME_POINTER_REGNUM) \
949 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
950 + alpha_sa_size ()); \
951 else if ((FROM) == ARG_POINTER_REGNUM) \
952 (OFFSET) = (ALPHA_ROUND (current_function_outgoing_args_size) \
954 + (ALPHA_ROUND (get_frame_size () \
955 + current_function_pretend_args_size) \
956 - current_function_pretend_args_size)); \
961 /* Define this if stack space is still allocated for a parameter passed
963 /* #define REG_PARM_STACK_SPACE */
965 /* Value is the number of bytes of arguments automatically
966 popped when returning from a subroutine call.
967 FUNDECL is the declaration node of the function (as a tree),
968 FUNTYPE is the data type of the function (as a tree),
969 or for a library call it is an identifier node for the subroutine name.
970 SIZE is the number of bytes of arguments passed on the stack. */
972 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
974 /* Define how to find the value returned by a function.
975 VALTYPE is the data type of the value (as a tree).
976 If the precise function being called is known, FUNC is its FUNCTION_DECL;
977 otherwise, FUNC is 0.
979 On Alpha the value is found in $0 for integer functions and
980 $f0 for floating-point functions. */
982 #define FUNCTION_VALUE(VALTYPE, FUNC) \
983 gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \
984 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
985 || POINTER_TYPE_P (VALTYPE)) \
986 ? word_mode : TYPE_MODE (VALTYPE), \
988 && (TREE_CODE (VALTYPE) == REAL_TYPE \
989 || TREE_CODE (VALTYPE) == COMPLEX_TYPE)) \
992 /* Define how to find the value returned by a library function
993 assuming the value has mode MODE. */
995 #define LIBCALL_VALUE(MODE) \
998 && (GET_MODE_CLASS (MODE) == MODE_FLOAT \
999 || GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT) \
1002 /* The definition of this macro implies that there are cases where
1003 a scalar value cannot be returned in registers.
1005 For the Alpha, any structure or union type is returned in memory, as
1006 are integers whose size is larger than 64 bits. */
1008 #define RETURN_IN_MEMORY(TYPE) \
1009 (TYPE_MODE (TYPE) == BLKmode \
1010 || TYPE_MODE (TYPE) == TFmode \
1011 || TYPE_MODE (TYPE) == TCmode \
1012 || (TREE_CODE (TYPE) == INTEGER_TYPE && TYPE_PRECISION (TYPE) > 64))
1014 /* 1 if N is a possible register number for a function value
1015 as seen by the caller. */
1017 #define FUNCTION_VALUE_REGNO_P(N) \
1018 ((N) == 0 || (N) == 1 || (N) == 32 || (N) == 33)
1020 /* 1 if N is a possible register number for function argument passing.
1021 On Alpha, these are $16-$21 and $f16-$f21. */
1023 #define FUNCTION_ARG_REGNO_P(N) \
1024 (((N) >= 16 && (N) <= 21) || ((N) >= 16 + 32 && (N) <= 21 + 32))
1026 /* Define a data type for recording info about an argument list
1027 during the scan of that argument list. This data type should
1028 hold all necessary information about the function itself
1029 and about the args processed so far, enough to enable macros
1030 such as FUNCTION_ARG to determine where the next arg should go.
1032 On Alpha, this is a single integer, which is a number of words
1033 of arguments scanned so far.
1034 Thus 6 or more means all following args should go on the stack. */
1036 #define CUMULATIVE_ARGS int
1038 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1039 for a call to a function whose data type is FNTYPE.
1040 For a library call, FNTYPE is 0. */
1042 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) (CUM) = 0
1044 /* Define intermediate macro to compute the size (in registers) of an argument
1047 #define ALPHA_ARG_SIZE(MODE, TYPE, NAMED) \
1048 ((MODE) == TFmode || (MODE) == TCmode ? 1 \
1049 : (((MODE) == BLKmode ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \
1050 + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
1052 /* Update the data in CUM to advance over an argument
1053 of mode MODE and data type TYPE.
1054 (TYPE is null for libcalls where that information may not be available.) */
1056 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1057 if (MUST_PASS_IN_STACK (MODE, TYPE)) \
1060 (CUM) += ALPHA_ARG_SIZE (MODE, TYPE, NAMED)
1062 /* Determine where to put an argument to a function.
1063 Value is zero to push the argument on the stack,
1064 or a hard register in which to store the argument.
1066 MODE is the argument's machine mode.
1067 TYPE is the data type of the argument (as a tree).
1068 This is null for libcalls where that information may
1070 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1071 the preceding args and about the function being called.
1072 NAMED is nonzero if this argument is a named parameter
1073 (otherwise it is an extra parameter matching an ellipsis).
1075 On Alpha the first 6 words of args are normally in registers
1076 and the rest are pushed. */
1078 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1079 function_arg((CUM), (MODE), (TYPE), (NAMED))
1081 /* A C expression that indicates when an argument must be passed by
1082 reference. If nonzero for an argument, a copy of that argument is
1083 made in memory and a pointer to the argument is passed instead of
1084 the argument itself. The pointer is passed in whatever way is
1085 appropriate for passing a pointer to that type. */
1087 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1088 ((MODE) == TFmode || (MODE) == TCmode)
1090 /* Specify the padding direction of arguments.
1092 On the Alpha, we must pad upwards in order to be able to pass args in
1095 #define FUNCTION_ARG_PADDING(MODE, TYPE) upward
1097 /* For an arg passed partly in registers and partly in memory,
1098 this is the number of registers used.
1099 For args passed entirely in registers or entirely in memory, zero. */
1101 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1102 ((CUM) < 6 && 6 < (CUM) + ALPHA_ARG_SIZE (MODE, TYPE, NAMED) \
1105 /* Perform any needed actions needed for a function that is receiving a
1106 variable number of arguments.
1110 MODE and TYPE are the mode and type of the current parameter.
1112 PRETEND_SIZE is a variable that should be set to the amount of stack
1113 that must be pushed by the prolog to pretend that our caller pushed
1116 Normally, this macro will push all remaining incoming registers on the
1117 stack and set PRETEND_SIZE to the length of the registers pushed.
1119 On the Alpha, we allocate space for all 12 arg registers, but only
1120 push those that are remaining.
1122 However, if NO registers need to be saved, don't allocate any space.
1123 This is not only because we won't need the space, but because AP includes
1124 the current_pretend_args_size and we don't want to mess up any
1125 ap-relative addresses already made.
1127 If we are not to use the floating-point registers, save the integer
1128 registers where we would put the floating-point registers. This is
1129 not the most efficient way to implement varargs with just one register
1130 class, but it isn't worth doing anything more efficient in this rare
1133 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
1138 rtx tmp; int set = get_varargs_alias_set (); \
1139 tmp = gen_rtx_MEM (BLKmode, \
1140 plus_constant (virtual_incoming_args_rtx, \
1141 ((CUM) + 6)* UNITS_PER_WORD)); \
1142 set_mem_alias_set (tmp, set); \
1143 move_block_from_reg \
1145 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
1147 tmp = gen_rtx_MEM (BLKmode, \
1148 plus_constant (virtual_incoming_args_rtx, \
1149 (CUM) * UNITS_PER_WORD)); \
1150 set_mem_alias_set (tmp, set); \
1151 move_block_from_reg \
1152 (16 + (TARGET_FPREGS ? 32 : 0) + CUM, tmp, \
1153 6 - (CUM), (6 - (CUM)) * UNITS_PER_WORD); \
1155 PRETEND_SIZE = 12 * UNITS_PER_WORD; \
1159 /* We do not allow indirect calls to be optimized into sibling calls, nor
1160 can we allow a call to a function in a different compilation unit to
1161 be optimized into a sibcall. Except if the function is known not to
1162 return, in which case our caller doesn't care what the gp is. */
1163 #define FUNCTION_OK_FOR_SIBCALL(DECL) \
1165 && ((TREE_ASM_WRITTEN (DECL) && !flag_pic) \
1166 || ! TREE_PUBLIC (DECL)))
1168 /* Try to output insns to set TARGET equal to the constant C if it can be
1169 done in less than N insns. Do all computations in MODE. Returns the place
1170 where the output has been placed if it can be done and the insns have been
1171 emitted. If it would take more than N insns, zero is returned and no
1172 insns and emitted. */
1174 /* Define the information needed to generate branch and scc insns. This is
1175 stored from the compare operation. Note that we can't use "rtx" here
1176 since it hasn't been defined! */
1178 struct alpha_compare
1180 struct rtx_def *op0, *op1;
1184 extern struct alpha_compare alpha_compare;
1186 /* Make (or fake) .linkage entry for function call.
1187 IS_LOCAL is 0 if name is used in call, 1 if name is used in definition. */
1189 /* This macro defines the start of an assembly comment. */
1191 #define ASM_COMMENT_START " #"
1193 /* This macro produces the initial definition of a function. */
1195 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
1196 alpha_start_function(FILE,NAME,DECL);
1198 /* This macro closes up a function definition for the assembler. */
1200 #define ASM_DECLARE_FUNCTION_SIZE(FILE,NAME,DECL) \
1201 alpha_end_function(FILE,NAME,DECL)
1203 /* Output any profiling code before the prologue. */
1205 #define PROFILE_BEFORE_PROLOGUE 1
1207 /* Output assembler code to FILE to increment profiler label # LABELNO
1208 for profiling a function entry. Under OSF/1, profiling is enabled
1209 by simply passing -pg to the assembler and linker. */
1211 #define FUNCTION_PROFILER(FILE, LABELNO)
1213 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1214 the stack pointer does not matter. The value is tested only in
1215 functions that have frame pointers.
1216 No definition is equivalent to always zero. */
1218 #define EXIT_IGNORE_STACK 1
1220 /* Define registers used by the epilogue and return instruction. */
1222 #define EPILOGUE_USES(REGNO) ((REGNO) == 26)
1224 /* Output assembler code for a block containing the constant parts
1225 of a trampoline, leaving space for the variable parts.
1227 The trampoline should set the static chain pointer to value placed
1228 into the trampoline and should branch to the specified routine.
1229 Note that $27 has been set to the address of the trampoline, so we can
1230 use it for addressability of the two data items. */
1232 #define TRAMPOLINE_TEMPLATE(FILE) \
1234 fprintf (FILE, "\tldq $1,24($27)\n"); \
1235 fprintf (FILE, "\tldq $27,16($27)\n"); \
1236 fprintf (FILE, "\tjmp $31,($27),0\n"); \
1237 fprintf (FILE, "\tnop\n"); \
1238 fprintf (FILE, "\t.quad 0,0\n"); \
1241 /* Section in which to place the trampoline. On Alpha, instructions
1242 may only be placed in a text segment. */
1244 #define TRAMPOLINE_SECTION text_section
1246 /* Length in units of the trampoline for entering a nested function. */
1248 #define TRAMPOLINE_SIZE 32
1250 /* The alignment of a trampoline, in bits. */
1252 #define TRAMPOLINE_ALIGNMENT 64
1254 /* Emit RTL insns to initialize the variable parts of a trampoline.
1255 FNADDR is an RTX for the address of the function's pure code.
1256 CXT is an RTX for the static chain value for the function. */
1258 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1259 alpha_initialize_trampoline (TRAMP, FNADDR, CXT, 16, 24, 8)
1261 /* A C expression whose value is RTL representing the value of the return
1262 address for the frame COUNT steps up from the current frame.
1263 FRAMEADDR is the frame pointer of the COUNT frame, or the frame pointer of
1264 the COUNT-1 frame if RETURN_ADDR_IN_PREVIOUS_FRAME is defined. */
1266 #define RETURN_ADDR_RTX alpha_return_addr
1268 /* Before the prologue, RA lives in $26. */
1269 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, 26)
1270 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (26)
1272 /* Describe how we implement __builtin_eh_return. */
1273 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 16 : INVALID_REGNUM)
1274 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 28)
1275 #define EH_RETURN_HANDLER_RTX \
1276 gen_rtx_MEM (Pmode, plus_constant (stack_pointer_rtx, \
1277 current_function_outgoing_args_size))
1279 /* Addressing modes, and classification of registers for them. */
1281 /* #define HAVE_POST_INCREMENT 0 */
1282 /* #define HAVE_POST_DECREMENT 0 */
1284 /* #define HAVE_PRE_DECREMENT 0 */
1285 /* #define HAVE_PRE_INCREMENT 0 */
1287 /* Macros to check register numbers against specific register classes. */
1289 /* These assume that REGNO is a hard or pseudo reg number.
1290 They give nonzero only if REGNO is a hard reg of the suitable class
1291 or a pseudo reg currently allocated to a suitable hard reg.
1292 Since they use reg_renumber, they are safe only once reg_renumber
1293 has been allocated, which happens in local-alloc.c. */
1295 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
1296 #define REGNO_OK_FOR_BASE_P(REGNO) \
1297 ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32 \
1298 || (REGNO) == 63 || reg_renumber[REGNO] == 63)
1300 /* Maximum number of registers that can appear in a valid memory address. */
1301 #define MAX_REGS_PER_ADDRESS 1
1303 /* Recognize any constant value that is a valid address. For the Alpha,
1304 there are only constants none since we want to use LDA to load any
1305 symbolic addresses into registers. */
1307 #define CONSTANT_ADDRESS_P(X) \
1308 (GET_CODE (X) == CONST_INT \
1309 && (unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
1311 /* Include all constant integers and constant doubles, but not
1312 floating-point, except for floating-point zero. */
1314 #define LEGITIMATE_CONSTANT_P(X) \
1315 (GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1316 || (X) == CONST0_RTX (GET_MODE (X)))
1318 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1319 and check its validity for a certain class.
1320 We have two alternate definitions for each of them.
1321 The usual definition accepts all pseudo regs; the other rejects
1322 them unless they have been allocated suitable hard regs.
1323 The symbol REG_OK_STRICT causes the latter definition to be used.
1325 Most source files want to accept pseudo regs in the hope that
1326 they will get allocated to the class that the insn wants them to be in.
1327 Source files for reload pass need to be strict.
1328 After reload, it makes no difference, since pseudo regs have
1329 been eliminated by then. */
1331 /* Nonzero if X is a hard reg that can be used as an index
1332 or if it is a pseudo reg. */
1333 #define REG_OK_FOR_INDEX_P(X) 0
1335 /* Nonzero if X is a hard reg that can be used as a base reg
1336 or if it is a pseudo reg. */
1337 #define NONSTRICT_REG_OK_FOR_BASE_P(X) \
1338 (REGNO (X) < 32 || REGNO (X) == 63 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1340 /* ??? Nonzero if X is the frame pointer, or some virtual register
1341 that may eliminate to the frame pointer. These will be allowed to
1342 have offsets greater than 32K. This is done because register
1343 elimination offsets will change the hi/lo split, and if we split
1344 before reload, we will require additional instructions. */
1345 #define NONSTRICT_REG_OK_FP_BASE_P(X) \
1346 (REGNO (X) == 31 || REGNO (X) == 63 \
1347 || (REGNO (X) >= FIRST_PSEUDO_REGISTER \
1348 && REGNO (X) < LAST_VIRTUAL_REGISTER))
1350 /* Nonzero if X is a hard reg that can be used as a base reg. */
1351 #define STRICT_REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1353 #ifdef REG_OK_STRICT
1354 #define REG_OK_FOR_BASE_P(X) STRICT_REG_OK_FOR_BASE_P (X)
1356 #define REG_OK_FOR_BASE_P(X) NONSTRICT_REG_OK_FOR_BASE_P (X)
1359 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
1360 valid memory address for an instruction. */
1362 #ifdef REG_OK_STRICT
1363 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1365 if (alpha_legitimate_address_p (MODE, X, 1)) \
1369 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, WIN) \
1371 if (alpha_legitimate_address_p (MODE, X, 0)) \
1376 /* Try machine-dependent ways of modifying an illegitimate address
1377 to be legitimate. If we find one, return the new, valid address.
1378 This macro is used in only one place: `memory_address' in explow.c. */
1380 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1382 rtx new_x = alpha_legitimize_address (X, NULL_RTX, MODE); \
1390 /* Try a machine-dependent way of reloading an illegitimate address
1391 operand. If we find one, push the reload and jump to WIN. This
1392 macro is used in only one place: `find_reloads_address' in reload.c. */
1394 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
1396 rtx new_x = alpha_legitimize_reload_address (X, MODE, OPNUM, TYPE, IND_L); \
1404 /* Go to LABEL if ADDR (a legitimate address expression)
1405 has an effect that depends on the machine mode it is used for.
1406 On the Alpha this is true only for the unaligned modes. We can
1407 simplify this test since we know that the address must be valid. */
1409 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1410 { if (GET_CODE (ADDR) == AND) goto LABEL; }
1412 /* Compute the cost of an address. For the Alpha, all valid addresses are
1415 #define ADDRESS_COST(X) 0
1417 /* Machine-dependent reorg pass. */
1418 #define MACHINE_DEPENDENT_REORG(X) alpha_reorg(X)
1420 /* Specify the machine mode that this machine uses
1421 for the index in the tablejump instruction. */
1422 #define CASE_VECTOR_MODE SImode
1424 /* Define as C expression which evaluates to nonzero if the tablejump
1425 instruction expects the table to contain offsets from the address of the
1428 Do not define this if the table should contain absolute addresses.
1429 On the Alpha, the table is really GP-relative, not relative to the PC
1430 of the table, but we pretend that it is PC-relative; this should be OK,
1431 but we should try to find some better way sometime. */
1432 #define CASE_VECTOR_PC_RELATIVE 1
1434 /* Define this as 1 if `char' should by default be signed; else as 0. */
1435 #define DEFAULT_SIGNED_CHAR 1
1437 /* This flag, if defined, says the same insns that convert to a signed fixnum
1438 also convert validly to an unsigned one.
1440 We actually lie a bit here as overflow conditions are different. But
1441 they aren't being checked anyway. */
1443 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
1445 /* Max number of bytes we can move to or from memory
1446 in one reasonably fast instruction. */
1450 /* If a memory-to-memory move would take MOVE_RATIO or more simple
1451 move-instruction pairs, we will do a movstr or libcall instead.
1453 Without byte/word accesses, we want no more than four instructions;
1454 with, several single byte accesses are better. */
1456 #define MOVE_RATIO (TARGET_BWX ? 7 : 2)
1458 /* Largest number of bytes of an object that can be placed in a register.
1459 On the Alpha we have plenty of registers, so use TImode. */
1460 #define MAX_FIXED_MODE_SIZE GET_MODE_BITSIZE (TImode)
1462 /* Nonzero if access to memory by bytes is no faster than for words.
1463 Also non-zero if doing byte operations (specifically shifts) in registers
1466 On the Alpha, we want to not use the byte operation and instead use
1467 masking operations to access fields; these will save instructions. */
1469 #define SLOW_BYTE_ACCESS 1
1471 /* Define if operations between registers always perform the operation
1472 on the full register even if a narrower mode is specified. */
1473 #define WORD_REGISTER_OPERATIONS
1475 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1476 will either zero-extend or sign-extend. The value of this macro should
1477 be the code that says which one of the two operations is implicitly
1478 done, NIL if none. */
1479 #define LOAD_EXTEND_OP(MODE) ((MODE) == SImode ? SIGN_EXTEND : ZERO_EXTEND)
1481 /* Define if loading short immediate values into registers sign extends. */
1482 #define SHORT_IMMEDIATES_SIGN_EXTEND
1484 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1485 is done just by pretending it is already truncated. */
1486 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1488 /* We assume that the store-condition-codes instructions store 0 for false
1489 and some other value for true. This is the value stored for true. */
1491 #define STORE_FLAG_VALUE 1
1493 /* Define the value returned by a floating-point comparison instruction. */
1495 #define FLOAT_STORE_FLAG_VALUE(MODE) \
1496 REAL_VALUE_ATOF ((TARGET_FLOAT_VAX ? "0.5" : "2.0"), (MODE))
1498 /* Canonicalize a comparison from one we don't have to one we do have. */
1500 #define CANONICALIZE_COMPARISON(CODE,OP0,OP1) \
1502 if (((CODE) == GE || (CODE) == GT || (CODE) == GEU || (CODE) == GTU) \
1503 && (GET_CODE (OP1) == REG || (OP1) == const0_rtx)) \
1508 (CODE) = swap_condition (CODE); \
1510 if (((CODE) == LT || (CODE) == LTU) \
1511 && GET_CODE (OP1) == CONST_INT && INTVAL (OP1) == 256) \
1513 (CODE) = (CODE) == LT ? LE : LEU; \
1514 (OP1) = GEN_INT (255); \
1518 /* Specify the machine mode that pointers have.
1519 After generation of rtl, the compiler makes no further distinction
1520 between pointers and any other objects of this machine mode. */
1521 #define Pmode DImode
1523 /* Mode of a function address in a call instruction (for indexing purposes). */
1525 #define FUNCTION_MODE Pmode
1527 /* Define this if addresses of constant functions
1528 shouldn't be put through pseudo regs where they can be cse'd.
1529 Desirable on machines where ordinary constants are expensive
1530 but a CALL with constant address is cheap.
1532 We define this on the Alpha so that gen_call and gen_call_value
1533 get to see the SYMBOL_REF (for the hint field of the jsr). It will
1534 then copy it into a register, thus actually letting the address be
1537 #define NO_FUNCTION_CSE
1539 /* Define this to be nonzero if shift instructions ignore all but the low-order
1541 #define SHIFT_COUNT_TRUNCATED 1
1543 /* Compute the cost of computing a constant rtl expression RTX
1544 whose rtx-code is CODE. The body of this macro is a portion
1545 of a switch statement. If the code is computed here,
1546 return it with a return statement. Otherwise, break from the switch.
1548 If this is an 8-bit constant, return zero since it can be used
1549 nearly anywhere with no cost. If it is a valid operand for an
1550 ADD or AND, likewise return 0 if we know it will be used in that
1551 context. Otherwise, return 2 since it might be used there later.
1552 All other constants take at least two insns. */
1554 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1556 if (INTVAL (RTX) >= 0 && INTVAL (RTX) < 256) \
1558 case CONST_DOUBLE: \
1559 if ((RTX) == CONST0_RTX (GET_MODE (RTX))) \
1561 else if (((OUTER_CODE) == PLUS && add_operand (RTX, VOIDmode)) \
1562 || ((OUTER_CODE) == AND && and_operand (RTX, VOIDmode))) \
1564 else if (add_operand (RTX, VOIDmode) || and_operand (RTX, VOIDmode)) \
1567 return COSTS_N_INSNS (2); \
1571 switch (alpha_cpu) \
1573 case PROCESSOR_EV4: \
1574 return COSTS_N_INSNS (3); \
1575 case PROCESSOR_EV5: \
1576 case PROCESSOR_EV6: \
1577 return COSTS_N_INSNS (2); \
1581 /* Provide the costs of a rtl expression. This is in the body of a
1584 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1585 case PLUS: case MINUS: \
1586 if (FLOAT_MODE_P (GET_MODE (X))) \
1587 switch (alpha_cpu) \
1589 case PROCESSOR_EV4: \
1590 return COSTS_N_INSNS (6); \
1591 case PROCESSOR_EV5: \
1592 case PROCESSOR_EV6: \
1593 return COSTS_N_INSNS (4); \
1596 else if (GET_CODE (XEXP (X, 0)) == MULT \
1597 && const48_operand (XEXP (XEXP (X, 0), 1), VOIDmode)) \
1598 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1599 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1602 switch (alpha_cpu) \
1604 case PROCESSOR_EV4: \
1605 if (FLOAT_MODE_P (GET_MODE (X))) \
1606 return COSTS_N_INSNS (6); \
1607 return COSTS_N_INSNS (23); \
1608 case PROCESSOR_EV5: \
1609 if (FLOAT_MODE_P (GET_MODE (X))) \
1610 return COSTS_N_INSNS (4); \
1611 else if (GET_MODE (X) == DImode) \
1612 return COSTS_N_INSNS (12); \
1614 return COSTS_N_INSNS (8); \
1615 case PROCESSOR_EV6: \
1616 if (FLOAT_MODE_P (GET_MODE (X))) \
1617 return COSTS_N_INSNS (4); \
1619 return COSTS_N_INSNS (7); \
1623 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1624 && INTVAL (XEXP (X, 1)) <= 3) \
1626 /* ... fall through ... */ \
1627 case ASHIFTRT: case LSHIFTRT: \
1628 switch (alpha_cpu) \
1630 case PROCESSOR_EV4: \
1631 return COSTS_N_INSNS (2); \
1632 case PROCESSOR_EV5: \
1633 case PROCESSOR_EV6: \
1634 return COSTS_N_INSNS (1); \
1637 case IF_THEN_ELSE: \
1638 switch (alpha_cpu) \
1640 case PROCESSOR_EV4: \
1641 case PROCESSOR_EV6: \
1642 return COSTS_N_INSNS (2); \
1643 case PROCESSOR_EV5: \
1644 return COSTS_N_INSNS (1); \
1647 case DIV: case UDIV: case MOD: case UMOD: \
1648 switch (alpha_cpu) \
1650 case PROCESSOR_EV4: \
1651 if (GET_MODE (X) == SFmode) \
1652 return COSTS_N_INSNS (34); \
1653 else if (GET_MODE (X) == DFmode) \
1654 return COSTS_N_INSNS (63); \
1656 return COSTS_N_INSNS (70); \
1657 case PROCESSOR_EV5: \
1658 if (GET_MODE (X) == SFmode) \
1659 return COSTS_N_INSNS (15); \
1660 else if (GET_MODE (X) == DFmode) \
1661 return COSTS_N_INSNS (22); \
1663 return COSTS_N_INSNS (70); /* ??? */ \
1664 case PROCESSOR_EV6: \
1665 if (GET_MODE (X) == SFmode) \
1666 return COSTS_N_INSNS (12); \
1667 else if (GET_MODE (X) == DFmode) \
1668 return COSTS_N_INSNS (15); \
1670 return COSTS_N_INSNS (70); /* ??? */ \
1674 switch (alpha_cpu) \
1676 case PROCESSOR_EV4: \
1677 case PROCESSOR_EV6: \
1678 return COSTS_N_INSNS (3); \
1679 case PROCESSOR_EV5: \
1680 return COSTS_N_INSNS (2); \
1683 case NEG: case ABS: \
1684 if (! FLOAT_MODE_P (GET_MODE (X))) \
1686 /* ... fall through ... */ \
1687 case FLOAT: case UNSIGNED_FLOAT: case FIX: case UNSIGNED_FIX: \
1688 case FLOAT_EXTEND: case FLOAT_TRUNCATE: \
1689 switch (alpha_cpu) \
1691 case PROCESSOR_EV4: \
1692 return COSTS_N_INSNS (6); \
1693 case PROCESSOR_EV5: \
1694 case PROCESSOR_EV6: \
1695 return COSTS_N_INSNS (4); \
1699 /* Control the assembler format that we output. */
1701 /* Output to assembler file text saying following lines
1702 may contain character constants, extra white space, comments, etc. */
1703 #define ASM_APP_ON (TARGET_EXPLICIT_RELOCS ? "\t.set\tmacro\n" : "")
1705 /* Output to assembler file text saying following lines
1706 no longer contain unusual constructs. */
1707 #define ASM_APP_OFF (TARGET_EXPLICIT_RELOCS ? "\t.set\tnomacro\n" : "")
1709 #define TEXT_SECTION_ASM_OP "\t.text"
1711 /* Output before read-only data. */
1713 #define READONLY_DATA_SECTION_ASM_OP "\t.rdata"
1715 /* Output before writable data. */
1717 #define DATA_SECTION_ASM_OP "\t.data"
1719 /* How to refer to registers in assembler output.
1720 This sequence is indexed by compiler's hard-register-number (see above). */
1722 #define REGISTER_NAMES \
1723 {"$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7", "$8", \
1724 "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
1725 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", \
1726 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "AP", \
1727 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7", "$f8", \
1728 "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15", \
1729 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",\
1730 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "FP"}
1732 /* Strip name encoding when emitting labels. */
1734 #define ASM_OUTPUT_LABELREF(STREAM, NAME) \
1736 const char *name_ = NAME; \
1737 if (*name_ == '@' || *name_ == '%') \
1739 if (*name_ == '*') \
1742 fputs (user_label_prefix, STREAM); \
1743 fputs (name_, STREAM); \
1746 /* Globalizing directive for a label. */
1747 #define GLOBAL_ASM_OP "\t.globl "
1749 /* The prefix to add to user-visible assembler symbols. */
1751 #define USER_LABEL_PREFIX ""
1753 /* This is how to output an internal numbered label where
1754 PREFIX is the class of label and NUM is the number within the class. */
1756 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1757 fprintf (FILE, "$%s%d:\n", PREFIX, NUM)
1759 /* This is how to output a label for a jump table. Arguments are the same as
1760 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
1763 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
1764 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
1766 /* This is how to store into the string LABEL
1767 the symbol_ref name of an internal numbered label where
1768 PREFIX is the class of label and NUM is the number within the class.
1769 This is suitable for output with `assemble_name'. */
1771 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1772 sprintf ((LABEL), "*$%s%ld", (PREFIX), (long)(NUM))
1774 /* Check a floating-point value for validity for a particular machine mode. */
1776 #define CHECK_FLOAT_VALUE(MODE, D, OVERFLOW) \
1777 ((OVERFLOW) = check_float_value (MODE, &D, OVERFLOW))
1779 /* We use the default ASCII-output routine, except that we don't write more
1780 than 50 characters since the assembler doesn't support very long lines. */
1782 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1784 FILE *_hide_asm_out_file = (MYFILE); \
1785 const unsigned char *_hide_p = (const unsigned char *) (MYSTRING); \
1786 int _hide_thissize = (MYLENGTH); \
1787 int _size_so_far = 0; \
1789 FILE *asm_out_file = _hide_asm_out_file; \
1790 const unsigned char *p = _hide_p; \
1791 int thissize = _hide_thissize; \
1793 fprintf (asm_out_file, "\t.ascii \""); \
1795 for (i = 0; i < thissize; i++) \
1797 register int c = p[i]; \
1799 if (_size_so_far ++ > 50 && i < thissize - 4) \
1800 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1802 if (c == '\"' || c == '\\') \
1803 putc ('\\', asm_out_file); \
1804 if (c >= ' ' && c < 0177) \
1805 putc (c, asm_out_file); \
1808 fprintf (asm_out_file, "\\%o", c); \
1809 /* After an octal-escape, if a digit follows, \
1810 terminate one string constant and start another. \
1811 The VAX assembler fails to stop reading the escape \
1812 after three digits, so this is the only way we \
1813 can get it to parse the data properly. */ \
1814 if (i < thissize - 1 && ISDIGIT (p[i + 1])) \
1815 _size_so_far = 0, fprintf (asm_out_file, "\"\n\t.ascii \""); \
1818 fprintf (asm_out_file, "\"\n"); \
1823 /* This is how to output an insn to push a register on the stack.
1824 It need not be very fast code. */
1826 #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1827 fprintf (FILE, "\tsubq $30,8,$30\n\tst%s $%s%d,0($30)\n", \
1828 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1831 /* This is how to output an insn to pop a register from the stack.
1832 It need not be very fast code. */
1834 #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1835 fprintf (FILE, "\tld%s $%s%d,0($30)\n\taddq $30,8,$30\n", \
1836 (REGNO) > 32 ? "t" : "q", (REGNO) > 32 ? "f" : "", \
1839 /* This is how to output an element of a case-vector that is absolute.
1840 (Alpha does not use such vectors, but we must define this macro anyway.) */
1842 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) abort ()
1844 /* This is how to output an element of a case-vector that is relative. */
1846 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1847 fprintf (FILE, "\t.%s $L%d\n", TARGET_ABI_WINDOWS_NT ? "long" : "gprel32", \
1850 /* This is how to output an assembler line
1851 that says to advance the location counter
1852 to a multiple of 2**LOG bytes. */
1854 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1856 fprintf (FILE, "\t.align %d\n", LOG);
1858 /* This is how to advance the location counter by SIZE bytes. */
1860 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1861 fprintf (FILE, "\t.space %d\n", (SIZE))
1863 /* This says how to output an assembler line
1864 to define a global common symbol. */
1866 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1867 ( fputs ("\t.comm ", (FILE)), \
1868 assemble_name ((FILE), (NAME)), \
1869 fprintf ((FILE), ",%d\n", (SIZE)))
1871 /* This says how to output an assembler line
1872 to define a local common symbol. */
1874 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE,ROUNDED) \
1875 ( fputs ("\t.lcomm ", (FILE)), \
1876 assemble_name ((FILE), (NAME)), \
1877 fprintf ((FILE), ",%d\n", (SIZE)))
1879 /* Store in OUTPUT a string (made with alloca) containing
1880 an assembler-name for a local static variable named NAME.
1881 LABELNO is an integer which is different for each call. */
1883 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1884 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1885 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1888 /* Print operand X (an rtx) in assembler syntax to file FILE.
1889 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1890 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1892 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1894 /* Determine which codes are valid without a following integer. These must
1897 ~ Generates the name of the current function.
1899 / Generates the instruction suffix. The TRAP_SUFFIX and ROUND_SUFFIX
1900 attributes are examined to determine what is appropriate.
1902 , Generates single precision suffix for floating point
1903 instructions (s for IEEE, f for VAX)
1905 - Generates double precision suffix for floating point
1906 instructions (t for IEEE, g for VAX)
1909 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1910 ((CODE) == '/' || (CODE) == ',' || (CODE) == '-' || (CODE) == '~' \
1911 || (CODE) == '#' || (CODE) == '*' || (CODE) == '&')
1913 /* Print a memory address as an operand to reference that memory location. */
1915 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1916 print_operand_address((FILE), (ADDR))
1918 /* Define the codes that are matched by predicates in alpha.c. */
1920 #define PREDICATE_CODES \
1921 {"reg_or_0_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE, \
1923 {"reg_or_6bit_operand", {SUBREG, REG, CONST_INT}}, \
1924 {"reg_or_8bit_operand", {SUBREG, REG, CONST_INT}}, \
1925 {"reg_or_const_int_operand", {SUBREG, REG, CONST_INT}}, \
1926 {"cint8_operand", {CONST_INT}}, \
1927 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
1928 {"add_operand", {SUBREG, REG, CONST_INT}}, \
1929 {"sext_add_operand", {SUBREG, REG, CONST_INT}}, \
1930 {"const48_operand", {CONST_INT}}, \
1931 {"and_operand", {SUBREG, REG, CONST_INT}}, \
1932 {"or_operand", {SUBREG, REG, CONST_INT}}, \
1933 {"mode_mask_operand", {CONST_INT}}, \
1934 {"mul8_operand", {CONST_INT}}, \
1935 {"mode_width_operand", {CONST_INT}}, \
1936 {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \
1937 {"alpha_zero_comparison_operator", {EQ, NE, LE, LT, LEU, LTU}}, \
1938 {"alpha_swapped_comparison_operator", {EQ, GE, GT, GEU, GTU}}, \
1939 {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \
1940 {"alpha_fp_comparison_operator", {EQ, LE, LT, UNORDERED}}, \
1941 {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \
1942 {"const0_operand", {CONST_INT, CONST_DOUBLE, CONST_VECTOR}}, \
1943 {"current_file_function_operand", {SYMBOL_REF}}, \
1944 {"direct_call_operand", {SYMBOL_REF}}, \
1945 {"local_symbolic_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
1946 {"small_symbolic_operand", {SYMBOL_REF, CONST}}, \
1947 {"global_symbolic_operand", {SYMBOL_REF, CONST}}, \
1948 {"dtp16_symbolic_operand", {CONST}}, \
1949 {"dtp32_symbolic_operand", {CONST}}, \
1950 {"gotdtp_symbolic_operand", {CONST}}, \
1951 {"tp16_symbolic_operand", {CONST}}, \
1952 {"tp32_symbolic_operand", {CONST}}, \
1953 {"gottp_symbolic_operand", {CONST}}, \
1954 {"call_operand", {REG, SYMBOL_REF}}, \
1955 {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1956 CONST_VECTOR, SYMBOL_REF, CONST, LABEL_REF, HIGH}},\
1957 {"some_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \
1958 CONST_VECTOR, SYMBOL_REF, CONST, LABEL_REF, HIGH}}, \
1959 {"some_ni_operand", {SUBREG, REG, MEM}}, \
1960 {"aligned_memory_operand", {MEM}}, \
1961 {"unaligned_memory_operand", {MEM}}, \
1962 {"reg_or_unaligned_mem_operand", {SUBREG, REG, MEM}}, \
1963 {"any_memory_operand", {MEM}}, \
1964 {"hard_fp_register_operand", {SUBREG, REG}}, \
1965 {"hard_int_register_operand", {SUBREG, REG}}, \
1966 {"reg_not_elim_operand", {SUBREG, REG}}, \
1967 {"reg_no_subreg_operand", {REG}}, \
1968 {"addition_operation", {PLUS}}, \
1969 {"symbolic_operand", {SYMBOL_REF, LABEL_REF, CONST}}, \
1970 {"some_small_symbolic_operand", {SET, PARALLEL, PREFETCH, UNSPEC, \
1973 /* Define the `__builtin_va_list' type for the ABI. */
1974 #define BUILD_VA_LIST_TYPE(VALIST) \
1975 (VALIST) = alpha_build_va_list ()
1977 /* Implement `va_start' for varargs and stdarg. */
1978 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
1979 alpha_va_start (valist, nextarg)
1981 /* Implement `va_arg'. */
1982 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1983 alpha_va_arg (valist, type)
1985 /* Tell collect that the object format is ECOFF. */
1986 #define OBJECT_FORMAT_COFF
1987 #define EXTENDED_COFF
1989 /* If we use NM, pass -g to it so it only lists globals. */
1990 #define NM_FLAGS "-pg"
1992 /* Definitions for debugging. */
1994 #define SDB_DEBUGGING_INFO /* generate info for mips-tfile */
1995 #define DBX_DEBUGGING_INFO /* generate embedded stabs */
1996 #define MIPS_DEBUGGING_INFO /* MIPS specific debugging info */
1998 #ifndef PREFERRED_DEBUGGING_TYPE /* assume SDB_DEBUGGING_INFO */
1999 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
2003 /* Correct the offset of automatic variables and arguments. Note that
2004 the Alpha debug format wants all automatic variables and arguments
2005 to be in terms of two different offsets from the virtual frame pointer,
2006 which is the stack pointer before any adjustment in the function.
2007 The offset for the argument pointer is fixed for the native compiler,
2008 it is either zero (for the no arguments case) or large enough to hold
2009 all argument registers.
2010 The offset for the auto pointer is the fourth argument to the .frame
2011 directive (local_offset).
2012 To stay compatible with the native tools we use the same offsets
2013 from the virtual frame pointer and adjust the debugger arg/auto offsets
2014 accordingly. These debugger offsets are set up in output_prolog. */
2016 extern long alpha_arg_offset;
2017 extern long alpha_auto_offset;
2018 #define DEBUGGER_AUTO_OFFSET(X) \
2019 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) + alpha_auto_offset)
2020 #define DEBUGGER_ARG_OFFSET(OFFSET, X) (OFFSET + alpha_arg_offset)
2023 #define ASM_OUTPUT_SOURCE_LINE(STREAM, LINE) \
2024 alpha_output_lineno (STREAM, LINE)
2026 #define ASM_OUTPUT_SOURCE_FILENAME(STREAM, NAME) \
2027 alpha_output_filename (STREAM, NAME)
2029 /* mips-tfile.c limits us to strings of one page. We must underestimate this
2030 number, because the real length runs past this up to the next
2031 continuation point. This is really a dbxout.c bug. */
2032 #define DBX_CONTIN_LENGTH 3000
2034 /* By default, turn on GDB extensions. */
2035 #define DEFAULT_GDB_EXTENSIONS 1
2037 /* Stabs-in-ECOFF can't handle dbxout_function_end(). */
2038 #define NO_DBX_FUNCTION_END 1
2040 /* If we are smuggling stabs through the ALPHA ECOFF object
2041 format, put a comment in front of the .stab<x> operation so
2042 that the ALPHA assembler does not choke. The mips-tfile program
2043 will correctly put the stab into the object file. */
2045 #define ASM_STABS_OP ((TARGET_GAS) ? "\t.stabs\t" : " #.stabs\t")
2046 #define ASM_STABN_OP ((TARGET_GAS) ? "\t.stabn\t" : " #.stabn\t")
2047 #define ASM_STABD_OP ((TARGET_GAS) ? "\t.stabd\t" : " #.stabd\t")
2049 /* Forward references to tags are allowed. */
2050 #define SDB_ALLOW_FORWARD_REFERENCES
2052 /* Unknown tags are also allowed. */
2053 #define SDB_ALLOW_UNKNOWN_REFERENCES
2055 #define PUT_SDB_DEF(a) \
2057 fprintf (asm_out_file, "\t%s.def\t", \
2058 (TARGET_GAS) ? "" : "#"); \
2059 ASM_OUTPUT_LABELREF (asm_out_file, a); \
2060 fputc (';', asm_out_file); \
2063 #define PUT_SDB_PLAIN_DEF(a) \
2065 fprintf (asm_out_file, "\t%s.def\t.%s;", \
2066 (TARGET_GAS) ? "" : "#", (a)); \
2069 #define PUT_SDB_TYPE(a) \
2071 fprintf (asm_out_file, "\t.type\t0x%x;", (a)); \
2074 /* For block start and end, we create labels, so that
2075 later we can figure out where the correct offset is.
2076 The normal .ent/.end serve well enough for functions,
2077 so those are just commented out. */
2079 extern int sdb_label_count; /* block start/end next label # */
2081 #define PUT_SDB_BLOCK_START(LINE) \
2083 fprintf (asm_out_file, \
2084 "$Lb%d:\n\t%s.begin\t$Lb%d\t%d\n", \
2086 (TARGET_GAS) ? "" : "#", \
2089 sdb_label_count++; \
2092 #define PUT_SDB_BLOCK_END(LINE) \
2094 fprintf (asm_out_file, \
2095 "$Le%d:\n\t%s.bend\t$Le%d\t%d\n", \
2097 (TARGET_GAS) ? "" : "#", \
2100 sdb_label_count++; \
2103 #define PUT_SDB_FUNCTION_START(LINE)
2105 #define PUT_SDB_FUNCTION_END(LINE)
2107 #define PUT_SDB_EPILOGUE_END(NAME) ((void)(NAME))
2109 /* Macros for mips-tfile.c to encapsulate stabs in ECOFF, and for
2110 mips-tdump.c to print them out.
2112 These must match the corresponding definitions in gdb/mipsread.c.
2113 Unfortunately, gcc and gdb do not currently share any directories. */
2115 #define CODE_MASK 0x8F300
2116 #define MIPS_IS_STAB(sym) (((sym)->index & 0xFFF00) == CODE_MASK)
2117 #define MIPS_MARK_STAB(code) ((code)+CODE_MASK)
2118 #define MIPS_UNMARK_STAB(code) ((code)-CODE_MASK)
2120 /* Override some mips-tfile definitions. */
2122 #define SHASH_SIZE 511
2123 #define THASH_SIZE 55
2125 /* Align ecoff symbol tables to avoid OSF1/1.3 nm complaints. */
2127 #define ALIGN_SYMTABLE_OFFSET(OFFSET) (((OFFSET) + 7) & ~7)
2129 /* The system headers under Alpha systems are generally C++-aware. */
2130 #define NO_IMPLICIT_EXTERN_C
2132 /* Generate calls to memcpy, etc., not bcopy, etc. */
2133 #define TARGET_MEM_FUNCTIONS 1
2135 /* Output code to add DELTA to the first argument, and then jump to FUNCTION.
2136 Used for C++ multiple inheritance. */
2137 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
2138 alpha_output_mi_thunk_osf (FILE, THUNK_FNDECL, DELTA, FUNCTION)
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