1 /* Subroutines used for code generation on the DEC Alpha.
2 Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
26 #include "hard-reg-set.h"
28 #include "insn-config.h"
29 #include "conditions.h"
30 #include "insn-flags.h"
32 #include "insn-attr.h"
40 /* Save information from a "cmpxx" operation until the branch or scc is
43 rtx alpha_compare_op0, alpha_compare_op1;
44 int alpha_compare_fp_p;
46 /* Save the name of the current function as used by the assembler. This
47 is used by the epilogue. */
49 char *alpha_function_name;
51 /* Non-zero if inside of a function, because the Alpha asm can't
52 handle .files inside of functions. */
54 static int inside_function = FALSE;
56 /* Nonzero if the current function needs gp. */
58 int alpha_function_needs_gp;
60 extern char *version_string;
61 extern int rtx_equal_function_value_matters;
63 /* Declarations of static functions. */
64 static void alpha_set_memflags_1 PROTO((rtx, int, int, int));
65 static void add_long_const PROTO((FILE *, HOST_WIDE_INT, int, int, int));
67 /* Returns 1 if VALUE is a mask that contains full bytes of zero or ones. */
75 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
77 if ((value & 0xff) != 0 && (value & 0xff) != 0xff)
83 /* Returns 1 if OP is either the constant zero or a register. If a
84 register, it must be in the proper mode unless MODE is VOIDmode. */
87 reg_or_0_operand (op, mode)
89 enum machine_mode mode;
91 return op == const0_rtx || register_operand (op, mode);
94 /* Return 1 if OP is a constant in the range of 0-63 (for a shift) or
98 reg_or_6bit_operand (op, mode)
100 enum machine_mode mode;
102 return ((GET_CODE (op) == CONST_INT
103 && (unsigned HOST_WIDE_INT) INTVAL (op) < 64)
104 || register_operand (op, mode));
108 /* Return 1 if OP is an 8-bit constant or any register. */
111 reg_or_8bit_operand (op, mode)
113 enum machine_mode mode;
115 return ((GET_CODE (op) == CONST_INT
116 && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100)
117 || register_operand (op, mode));
120 /* Return 1 if OP is an 8-bit constant. */
123 cint8_operand (op, mode)
125 enum machine_mode mode;
127 return (GET_CODE (op) == CONST_INT
128 && (unsigned HOST_WIDE_INT) INTVAL (op) < 0x100);
131 /* Return 1 if the operand is a valid second operand to an add insn. */
134 add_operand (op, mode)
136 enum machine_mode mode;
138 if (GET_CODE (op) == CONST_INT)
139 return (CONST_OK_FOR_LETTER_P (INTVAL (op), 'K')
140 || CONST_OK_FOR_LETTER_P (INTVAL (op), 'L')
141 || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O'));
143 return register_operand (op, mode);
146 /* Return 1 if the operand is a valid second operand to a sign-extending
150 sext_add_operand (op, mode)
152 enum machine_mode mode;
154 if (GET_CODE (op) == CONST_INT)
155 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 255
156 || (unsigned HOST_WIDE_INT) (- INTVAL (op)) < 255);
158 return register_operand (op, mode);
161 /* Return 1 if OP is the constant 4 or 8. */
164 const48_operand (op, mode)
166 enum machine_mode mode;
168 return (GET_CODE (op) == CONST_INT
169 && (INTVAL (op) == 4 || INTVAL (op) == 8));
172 /* Return 1 if OP is a valid first operand to an AND insn. */
175 and_operand (op, mode)
177 enum machine_mode mode;
179 if (GET_CODE (op) == CONST_DOUBLE && GET_MODE (op) == VOIDmode)
180 return (zap_mask (CONST_DOUBLE_LOW (op))
181 && zap_mask (CONST_DOUBLE_HIGH (op)));
183 if (GET_CODE (op) == CONST_INT)
184 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100
185 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100
186 || zap_mask (INTVAL (op)));
188 return register_operand (op, mode);
191 /* Return 1 if OP is a valid first operand to an IOR or XOR insn. */
194 or_operand (op, mode)
196 enum machine_mode mode;
198 if (GET_CODE (op) == CONST_INT)
199 return ((unsigned HOST_WIDE_INT) INTVAL (op) < 0x100
200 || (unsigned HOST_WIDE_INT) ~ INTVAL (op) < 0x100);
202 return register_operand (op, mode);
205 /* Return 1 if OP is a constant that is the width, in bits, of an integral
206 mode smaller than DImode. */
209 mode_width_operand (op, mode)
211 enum machine_mode mode;
213 return (GET_CODE (op) == CONST_INT
214 && (INTVAL (op) == 8 || INTVAL (op) == 16 || INTVAL (op) == 32));
217 /* Return 1 if OP is a constant that is the width of an integral machine mode
218 smaller than an integer. */
221 mode_mask_operand (op, mode)
223 enum machine_mode mode;
225 #if HOST_BITS_PER_WIDE_INT == 32
226 if (GET_CODE (op) == CONST_DOUBLE)
227 return CONST_DOUBLE_HIGH (op) == 0 && CONST_DOUBLE_LOW (op) == -1;
230 return (GET_CODE (op) == CONST_INT
231 && (INTVAL (op) == 0xff
232 || INTVAL (op) == 0xffff
233 #if HOST_BITS_PER_WIDE_INT == 64
234 || INTVAL (op) == 0xffffffff
239 /* Return 1 if OP is a multiple of 8 less than 64. */
242 mul8_operand (op, mode)
244 enum machine_mode mode;
246 return (GET_CODE (op) == CONST_INT
247 && (unsigned HOST_WIDE_INT) INTVAL (op) < 64
248 && (INTVAL (op) & 7) == 0);
251 /* Return 1 if OP is the constant zero in floating-point. */
254 fp0_operand (op, mode)
256 enum machine_mode mode;
258 return (GET_MODE (op) == mode
259 && GET_MODE_CLASS (mode) == MODE_FLOAT && op == CONST0_RTX (mode));
262 /* Return 1 if OP is the floating-point constant zero or a register. */
265 reg_or_fp0_operand (op, mode)
267 enum machine_mode mode;
269 return fp0_operand (op, mode) || register_operand (op, mode);
272 /* Return 1 if OP is a register or a constant integer. */
276 reg_or_cint_operand (op, mode)
278 enum machine_mode mode;
280 return GET_CODE (op) == CONST_INT || register_operand (op, mode);
283 /* Return 1 if OP is something that can be reloaded into a register;
284 if it is a MEM, it need not be valid. */
287 some_operand (op, mode)
289 enum machine_mode mode;
291 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
294 switch (GET_CODE (op))
296 case REG: case MEM: case CONST_DOUBLE:
297 case CONST_INT: case LABEL_REF: case SYMBOL_REF: case CONST:
301 return some_operand (SUBREG_REG (op), VOIDmode);
307 /* Return 1 if OP is a valid operand for the source of a move insn. */
310 input_operand (op, mode)
312 enum machine_mode mode;
314 if (mode != VOIDmode && GET_MODE (op) != VOIDmode && mode != GET_MODE (op))
317 if (GET_MODE_CLASS (mode) == MODE_FLOAT && GET_MODE (op) != mode)
320 switch (GET_CODE (op))
325 /* This handles both the Windows/NT and OSF cases. */
326 return mode == ptr_mode || mode == DImode;
332 if (register_operand (op, mode))
334 /* ... fall through ... */
336 return mode != HImode && mode != QImode && general_operand (op, mode);
339 return GET_MODE_CLASS (mode) == MODE_FLOAT && op == CONST0_RTX (mode);
342 return mode == QImode || mode == HImode || add_operand (op, mode);
348 /* Return 1 if OP is a SYMBOL_REF for a function known to be in this
352 current_file_function_operand (op, mode)
354 enum machine_mode mode;
356 return (GET_CODE (op) == SYMBOL_REF
357 && ! profile_flag && ! profile_block_flag
358 && (SYMBOL_REF_FLAG (op)
359 || op == XEXP (DECL_RTL (current_function_decl), 0)));
362 /* Return 1 if OP is a valid operand for the MEM of a CALL insn. */
365 call_operand (op, mode)
367 enum machine_mode mode;
372 return (GET_CODE (op) == SYMBOL_REF
373 || (GET_CODE (op) == REG
374 && (REGNO (op) == 27 || WINDOWS_NT)));
377 /* Return 1 if OP is a valid Alpha comparison operator. Here we know which
378 comparisons are valid in which insn. */
381 alpha_comparison_operator (op, mode)
383 enum machine_mode mode;
385 enum rtx_code code = GET_CODE (op);
387 if (mode != GET_MODE (op) || GET_RTX_CLASS (code) != '<')
390 return (code == EQ || code == LE || code == LT
391 || (mode == DImode && (code == LEU || code == LTU)));
394 /* Return 1 if OP is a signed comparison operation. */
397 signed_comparison_operator (op, mode)
399 enum machine_mode mode;
401 switch (GET_CODE (op))
403 case EQ: case NE: case LE: case LT: case GE: case GT:
410 /* Return 1 if this is a divide or modulus operator. */
413 divmod_operator (op, mode)
415 enum machine_mode mode;
417 switch (GET_CODE (op))
419 case DIV: case MOD: case UDIV: case UMOD:
426 /* Return 1 if this memory address is a known aligned register plus
427 a constant. It must be a valid address. This means that we can do
428 this as an aligned reference plus some offset.
430 Take into account what reload will do.
432 We could say that out-of-range stack slots are alignable, but that would
433 complicate get_aligned_mem and it isn't worth the trouble since few
434 functions have large stack space. */
437 aligned_memory_operand (op, mode)
439 enum machine_mode mode;
441 if (GET_CODE (op) == SUBREG)
443 if (GET_MODE (op) != mode)
445 op = SUBREG_REG (op);
446 mode = GET_MODE (op);
449 if (reload_in_progress && GET_CODE (op) == REG
450 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
451 op = reg_equiv_mem[REGNO (op)];
453 if (GET_CODE (op) != MEM || GET_MODE (op) != mode
454 || ! memory_address_p (mode, XEXP (op, 0)))
459 if (GET_CODE (op) == PLUS)
462 return (GET_CODE (op) == REG
463 && (REGNO (op) == STACK_POINTER_REGNUM
464 || op == hard_frame_pointer_rtx
465 || (REGNO (op) >= FIRST_VIRTUAL_REGISTER
466 && REGNO (op) <= LAST_VIRTUAL_REGISTER)));
469 /* Similar, but return 1 if OP is a MEM which is not alignable. */
472 unaligned_memory_operand (op, mode)
474 enum machine_mode mode;
476 if (GET_CODE (op) == SUBREG)
478 if (GET_MODE (op) != mode)
480 op = SUBREG_REG (op);
481 mode = GET_MODE (op);
484 if (reload_in_progress && GET_CODE (op) == REG
485 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
486 op = reg_equiv_mem[REGNO (op)];
488 if (GET_CODE (op) != MEM || GET_MODE (op) != mode)
493 if (! memory_address_p (mode, op))
496 if (GET_CODE (op) == PLUS)
499 return (GET_CODE (op) != REG
500 || (REGNO (op) != STACK_POINTER_REGNUM
501 && op != hard_frame_pointer_rtx
502 && (REGNO (op) < FIRST_VIRTUAL_REGISTER
503 || REGNO (op) > LAST_VIRTUAL_REGISTER)));
506 /* Return 1 if OP is any memory location. During reload a pseudo matches. */
509 any_memory_operand (op, mode)
511 enum machine_mode mode;
513 return (GET_CODE (op) == MEM
514 || (GET_CODE (op) == SUBREG && GET_CODE (SUBREG_REG (op)) == REG)
515 || (reload_in_progress && GET_CODE (op) == REG
516 && REGNO (op) >= FIRST_PSEUDO_REGISTER)
517 || (reload_in_progress && GET_CODE (op) == SUBREG
518 && GET_CODE (SUBREG_REG (op)) == REG
519 && REGNO (SUBREG_REG (op)) >= FIRST_PSEUDO_REGISTER));
522 /* REF is an alignable memory location. Place an aligned SImode
523 reference into *PALIGNED_MEM and the number of bits to shift into
527 get_aligned_mem (ref, paligned_mem, pbitnum)
529 rtx *paligned_mem, *pbitnum;
532 HOST_WIDE_INT offset = 0;
534 if (GET_CODE (ref) == SUBREG)
536 offset = SUBREG_WORD (ref) * UNITS_PER_WORD;
537 if (BYTES_BIG_ENDIAN)
538 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref)))
539 - MIN (UNITS_PER_WORD,
540 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref)))));
541 ref = SUBREG_REG (ref);
544 if (GET_CODE (ref) == REG)
545 ref = reg_equiv_mem[REGNO (ref)];
547 if (reload_in_progress)
548 base = find_replacement (&XEXP (ref, 0));
550 base = XEXP (ref, 0);
552 if (GET_CODE (base) == PLUS)
553 offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
555 *paligned_mem = gen_rtx (MEM, SImode,
556 plus_constant (base, offset & ~3));
557 MEM_IN_STRUCT_P (*paligned_mem) = MEM_IN_STRUCT_P (ref);
558 MEM_VOLATILE_P (*paligned_mem) = MEM_VOLATILE_P (ref);
559 RTX_UNCHANGING_P (*paligned_mem) = RTX_UNCHANGING_P (ref);
561 *pbitnum = GEN_INT ((offset & 3) * 8);
564 /* Similar, but just get the address. Handle the two reload cases. */
567 get_unaligned_address (ref)
571 HOST_WIDE_INT offset = 0;
573 if (GET_CODE (ref) == SUBREG)
575 offset = SUBREG_WORD (ref) * UNITS_PER_WORD;
576 if (BYTES_BIG_ENDIAN)
577 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (ref)))
578 - MIN (UNITS_PER_WORD,
579 GET_MODE_SIZE (GET_MODE (SUBREG_REG (ref)))));
580 ref = SUBREG_REG (ref);
583 if (GET_CODE (ref) == REG)
584 ref = reg_equiv_mem[REGNO (ref)];
586 if (reload_in_progress)
587 base = find_replacement (&XEXP (ref, 0));
589 base = XEXP (ref, 0);
591 if (GET_CODE (base) == PLUS)
592 offset += INTVAL (XEXP (base, 1)), base = XEXP (base, 0);
594 return plus_constant (base, offset);
597 /* Subfunction of the following function. Update the flags of any MEM
598 found in part of X. */
601 alpha_set_memflags_1 (x, in_struct_p, volatile_p, unchanging_p)
603 int in_struct_p, volatile_p, unchanging_p;
607 switch (GET_CODE (x))
611 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
612 alpha_set_memflags_1 (XVECEXP (x, 0, i), in_struct_p, volatile_p,
617 alpha_set_memflags_1 (PATTERN (x), in_struct_p, volatile_p,
622 alpha_set_memflags_1 (SET_DEST (x), in_struct_p, volatile_p,
624 alpha_set_memflags_1 (SET_SRC (x), in_struct_p, volatile_p,
629 MEM_IN_STRUCT_P (x) = in_struct_p;
630 MEM_VOLATILE_P (x) = volatile_p;
631 RTX_UNCHANGING_P (x) = unchanging_p;
636 /* Given INSN, which is either an INSN or a SEQUENCE generated to
637 perform a memory operation, look for any MEMs in either a SET_DEST or
638 a SET_SRC and copy the in-struct, unchanging, and volatile flags from
639 REF into each of the MEMs found. If REF is not a MEM, don't do
643 alpha_set_memflags (insn, ref)
647 /* Note that it is always safe to get these flags, though they won't
648 be what we think if REF is not a MEM. */
649 int in_struct_p = MEM_IN_STRUCT_P (ref);
650 int volatile_p = MEM_VOLATILE_P (ref);
651 int unchanging_p = RTX_UNCHANGING_P (ref);
653 if (GET_CODE (ref) != MEM
654 || (! in_struct_p && ! volatile_p && ! unchanging_p))
657 alpha_set_memflags_1 (insn, in_struct_p, volatile_p, unchanging_p);
660 /* Try to output insns to set TARGET equal to the constant C if it can be
661 done in less than N insns. Do all computations in MODE. Returns the place
662 where the output has been placed if it can be done and the insns have been
663 emitted. If it would take more than N insns, zero is returned and no
664 insns and emitted. */
667 alpha_emit_set_const (target, mode, c, n)
669 enum machine_mode mode;
673 HOST_WIDE_INT new = c;
675 /* Use a pseudo if highly optimizing and still generating RTL. */
677 = (flag_expensive_optimizations && rtx_equal_function_value_matters
681 #if HOST_BITS_PER_WIDE_INT == 64
682 /* We are only called for SImode and DImode. If this is SImode, ensure that
683 we are sign extended to a full word. This does not make any sense when
684 cross-compiling on a narrow machine. */
687 c = (c & 0xffffffff) - 2 * (c & 0x80000000);
690 /* If this is a sign-extended 32-bit constant, we can do this in at most
691 three insns, so do it if we have enough insns left. We always have
692 a sign-extended 32-bit constant when compiling on a narrow machine.
693 Note that we cannot handle the constant 0x80000000. */
695 if ((HOST_BITS_PER_WIDE_INT != 64
696 || c >> 31 == -1 || c >> 31 == 0)
699 HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000);
700 HOST_WIDE_INT tmp1 = c - low;
702 = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
703 HOST_WIDE_INT extra = 0;
705 /* If HIGH will be interpreted as negative but the constant is
706 positive, we must adjust it to do two ldha insns. */
708 if ((high & 0x8000) != 0 && c >= 0)
712 high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
715 if (c == low || (low == 0 && extra == 0))
716 return copy_to_suggested_reg (GEN_INT (c), target, mode);
717 else if (n >= 2 + (extra != 0))
719 temp = copy_to_suggested_reg (GEN_INT (low), subtarget, mode);
722 temp = expand_binop (mode, add_optab, temp, GEN_INT (extra << 16),
723 subtarget, 0, OPTAB_WIDEN);
725 return expand_binop (mode, add_optab, temp, GEN_INT (high << 16),
726 target, 0, OPTAB_WIDEN);
730 /* If we couldn't do it that way, try some other methods. But if we have
731 no instructions left, don't bother. */
736 #if HOST_BITS_PER_WIDE_INT == 64
737 /* First, see if can load a value into the target that is the same as the
738 constant except that all bytes that are 0 are changed to be 0xff. If we
739 can, then we can do a ZAPNOT to obtain the desired constant. */
741 for (i = 0; i < 64; i += 8)
742 if ((new & ((HOST_WIDE_INT) 0xff << i)) == 0)
743 new |= (HOST_WIDE_INT) 0xff << i;
745 if ((temp = alpha_emit_set_const (subtarget, mode, new, n - 1)) != 0)
746 return expand_binop (mode, and_optab, temp, GEN_INT (c | ~ new),
747 target, 0, OPTAB_WIDEN);
750 /* Next, see if we can load a related constant and then shift and possibly
751 negate it to get the constant we want. Try this once each increasing
754 for (i = 1; i < n; i++)
756 /* First try complementing. */
757 if ((temp = alpha_emit_set_const (subtarget, mode, ~ c, i)) != 0)
758 return expand_unop (mode, one_cmpl_optab, temp, target, 0);
760 /* Next try to form a constant and do a left shift. We can do this
761 if some low-order bits are zero; the exact_log2 call below tells
762 us that information. The bits we are shifting out could be any
763 value, but here we'll just try the 0- and sign-extended forms of
764 the constant. To try to increase the chance of having the same
765 constant in more than one insn, start at the highest number of
766 bits to shift, but try all possibilities in case a ZAPNOT will
769 if ((bits = exact_log2 (c & - c)) > 0)
770 for (; bits > 0; bits--)
771 if ((temp = (alpha_emit_set_const
773 (unsigned HOST_WIDE_INT) c >> bits, i))) != 0
774 || ((temp = (alpha_emit_set_const
776 ((unsigned HOST_WIDE_INT) c) >> bits, i)))
778 return expand_binop (mode, ashl_optab, temp, GEN_INT (bits),
779 target, 0, OPTAB_WIDEN);
781 /* Now try high-order zero bits. Here we try the shifted-in bits as
782 all zero and all ones. */
784 if ((bits = HOST_BITS_PER_WIDE_INT - floor_log2 (c) - 1) > 0)
785 for (; bits > 0; bits--)
786 if ((temp = alpha_emit_set_const (subtarget, mode,
788 || ((temp = (alpha_emit_set_const
790 ((c << bits) | (((HOST_WIDE_INT) 1 << bits) - 1)),
793 return expand_binop (mode, lshr_optab, temp, GEN_INT (bits),
794 target, 0, OPTAB_WIDEN);
796 /* Now try high-order 1 bits. We get that with a sign-extension.
797 But one bit isn't enough here. */
799 if ((bits = HOST_BITS_PER_WIDE_INT - floor_log2 (~ c) - 2) > 0)
800 for (; bits > 0; bits--)
801 if ((temp = alpha_emit_set_const (subtarget, mode,
803 || ((temp = (alpha_emit_set_const
805 ((c << bits) | (((HOST_WIDE_INT) 1 << bits) - 1)),
808 return expand_binop (mode, ashr_optab, temp, GEN_INT (bits),
809 target, 0, OPTAB_WIDEN);
815 /* Adjust the cost of a scheduling dependency. Return the new cost of
816 a dependency LINK or INSN on DEP_INSN. COST is the current cost. */
819 alpha_adjust_cost (insn, link, dep_insn, cost)
827 /* If the dependence is an anti-dependence, there is no cost. For an
828 output dependence, there is sometimes a cost, but it doesn't seem
829 worth handling those few cases. */
831 if (REG_NOTE_KIND (link) != 0)
834 /* If INSN is a store insn and DEP_INSN is setting the data being stored,
835 we can sometimes lower the cost. */
837 if (recog_memoized (insn) >= 0 && get_attr_type (insn) == TYPE_ST
838 && (set = single_set (dep_insn)) != 0
839 && GET_CODE (PATTERN (insn)) == SET
840 && rtx_equal_p (SET_DEST (set), SET_SRC (PATTERN (insn))))
841 switch (get_attr_type (dep_insn))
844 /* No savings here. */
849 /* In these cases, we save one cycle. */
853 /* In all other cases, we save two cycles. */
854 return MAX (0, cost - 4);
857 /* Another case that needs adjustment is an arithmetic or logical
858 operation. It's cost is usually one cycle, but we default it to
859 two in the MD file. The only case that it is actually two is
860 for the address in loads and stores. */
862 if (recog_memoized (dep_insn) >= 0
863 && get_attr_type (dep_insn) == TYPE_IADDLOG)
864 switch (get_attr_type (insn))
874 /* The final case is when a compare feeds into an integer branch. The cost
875 is only one cycle in that case. */
877 if (recog_memoized (dep_insn) >= 0
878 && get_attr_type (dep_insn) == TYPE_ICMP
879 && recog_memoized (insn) >= 0
880 && get_attr_type (insn) == TYPE_IBR)
883 /* Otherwise, return the default cost. */
888 /* Print an operand. Recognize special options, documented below. */
891 print_operand (file, x, code)
901 /* If this operand is the constant zero, write it as "$31". */
902 if (GET_CODE (x) == REG)
903 fprintf (file, "%s", reg_names[REGNO (x)]);
904 else if (x == CONST0_RTX (GET_MODE (x)))
905 fprintf (file, "$31");
907 output_operand_lossage ("invalid %%r value");
912 /* Similar, but for floating-point. */
913 if (GET_CODE (x) == REG)
914 fprintf (file, "%s", reg_names[REGNO (x)]);
915 else if (x == CONST0_RTX (GET_MODE (x)))
916 fprintf (file, "$f31");
918 output_operand_lossage ("invalid %%R value");
923 /* Write the 1's complement of a constant. */
924 if (GET_CODE (x) != CONST_INT)
925 output_operand_lossage ("invalid %%N value");
927 fprintf (file, "%ld", ~ INTVAL (x));
931 /* Write 1 << C, for a constant C. */
932 if (GET_CODE (x) != CONST_INT)
933 output_operand_lossage ("invalid %%P value");
935 fprintf (file, "%ld", (HOST_WIDE_INT) 1 << INTVAL (x));
939 /* Write the high-order 16 bits of a constant, sign-extended. */
940 if (GET_CODE (x) != CONST_INT)
941 output_operand_lossage ("invalid %%h value");
943 fprintf (file, "%ld", INTVAL (x) >> 16);
947 /* Write the low-order 16 bits of a constant, sign-extended. */
948 if (GET_CODE (x) != CONST_INT)
949 output_operand_lossage ("invalid %%L value");
951 fprintf (file, "%ld", (INTVAL (x) & 0xffff) - 2 * (INTVAL (x) & 0x8000));
955 /* Write mask for ZAP insn. */
956 if (GET_CODE (x) == CONST_DOUBLE)
958 HOST_WIDE_INT mask = 0;
961 value = CONST_DOUBLE_LOW (x);
962 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
967 value = CONST_DOUBLE_HIGH (x);
968 for (i = 0; i < HOST_BITS_PER_WIDE_INT / HOST_BITS_PER_CHAR;
971 mask |= (1 << (i + sizeof (int)));
973 fprintf (file, "%ld", mask & 0xff);
976 else if (GET_CODE (x) == CONST_INT)
978 HOST_WIDE_INT mask = 0, value = INTVAL (x);
980 for (i = 0; i < 8; i++, value >>= 8)
984 fprintf (file, "%ld", mask);
987 output_operand_lossage ("invalid %%m value");
991 /* 'b', 'w', or 'l' as the value of the constant. */
992 if (GET_CODE (x) != CONST_INT
993 || (INTVAL (x) != 8 && INTVAL (x) != 16 && INTVAL (x) != 32))
994 output_operand_lossage ("invalid %%M value");
997 INTVAL (x) == 8 ? "b" : INTVAL (x) == 16 ? "w" : "l");
1001 /* Similar, except do it from the mask. */
1002 if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xff)
1003 fprintf (file, "b");
1004 else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffff)
1005 fprintf (file, "w");
1006 #if HOST_BITS_PER_WIDE_INT == 32
1007 else if (GET_CODE (x) == CONST_DOUBLE
1008 && CONST_DOUBLE_HIGH (x) == 0
1009 && CONST_DOUBLE_LOW (x) == -1)
1010 fprintf (file, "l");
1012 else if (GET_CODE (x) == CONST_INT && INTVAL (x) == 0xffffffff)
1013 fprintf (file, "l");
1016 output_operand_lossage ("invalid %%U value");
1020 /* Write the constant value divided by 8. */
1021 if (GET_CODE (x) != CONST_INT
1022 && (unsigned HOST_WIDE_INT) INTVAL (x) >= 64
1023 && (INTVAL (x) & 7) != 8)
1024 output_operand_lossage ("invalid %%s value");
1026 fprintf (file, "%ld", INTVAL (x) / 8);
1030 /* Same, except compute (64 - c) / 8 */
1032 if (GET_CODE (x) != CONST_INT
1033 && (unsigned HOST_WIDE_INT) INTVAL (x) >= 64
1034 && (INTVAL (x) & 7) != 8)
1035 output_operand_lossage ("invalid %%s value");
1037 fprintf (file, "%ld", (64 - INTVAL (x)) / 8);
1041 /* Write out comparison name. */
1042 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
1043 output_operand_lossage ("invalid %%C value");
1045 if (GET_CODE (x) == LEU)
1046 fprintf (file, "ule");
1047 else if (GET_CODE (x) == LTU)
1048 fprintf (file, "ult");
1050 fprintf (file, "%s", GET_RTX_NAME (GET_CODE (x)));
1054 /* Similar, but write reversed code. We can't get an unsigned code
1056 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
1057 output_operand_lossage ("invalid %%D value");
1059 fprintf (file, "%s", GET_RTX_NAME (reverse_condition (GET_CODE (x))));
1063 /* Similar to `c', but swap. We can't get unsigned here either. */
1064 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
1065 output_operand_lossage ("invalid %%D value");
1067 fprintf (file, "%s", GET_RTX_NAME (swap_condition (GET_CODE (x))));
1071 /* Similar, but reverse and swap. We can't get unsigned here either. */
1072 if (GET_RTX_CLASS (GET_CODE (x)) != '<')
1073 output_operand_lossage ("invalid %%D value");
1075 fprintf (file, "%s",
1076 GET_RTX_NAME (swap_condition (reverse_condition ((GET_CODE (x))))));
1080 /* Write the divide or modulus operator. */
1081 switch (GET_CODE (x))
1084 fprintf (file, "div%s", GET_MODE (x) == SImode ? "l" : "q");
1087 fprintf (file, "div%su", GET_MODE (x) == SImode ? "l" : "q");
1090 fprintf (file, "rem%s", GET_MODE (x) == SImode ? "l" : "q");
1093 fprintf (file, "rem%su", GET_MODE (x) == SImode ? "l" : "q");
1096 output_operand_lossage ("invalid %%E value");
1102 /* Write "_u" for unaligned access. */
1103 if (GET_CODE (x) == MEM && GET_CODE (XEXP (x, 0)) == AND)
1104 fprintf (file, "_u");
1108 if (GET_CODE (x) == REG)
1109 fprintf (file, "%s", reg_names[REGNO (x)]);
1110 else if (GET_CODE (x) == MEM)
1111 output_address (XEXP (x, 0));
1113 output_addr_const (file, x);
1117 output_operand_lossage ("invalid %%xn code");
1121 /* Do what is necessary for `va_start'. The argument is ignored;
1122 We look at the current function to determine if stdarg or varargs
1123 is used and fill in an initial va_list. A pointer to this constructor
1127 alpha_builtin_saveregs (arglist)
1130 rtx block, addr, argsize;
1131 tree fntype = TREE_TYPE (current_function_decl);
1132 int stdarg = (TYPE_ARG_TYPES (fntype) != 0
1133 && (TREE_VALUE (tree_last (TYPE_ARG_TYPES (fntype)))
1134 != void_type_node));
1136 /* Compute the current position into the args, taking into account
1137 both registers and memory. Both of these are already included in
1138 current_function_args_info. */
1140 argsize = GEN_INT (current_function_args_info * UNITS_PER_WORD);
1142 /* SETUP_INCOMING_VARARGS moves the starting address base up by 48,
1143 storing fp arg registers in the first 48 bytes, and the integer arg
1144 registers in the next 48 bytes. This is only done, however, if any
1145 integer registers need to be stored.
1147 If no integer registers need be stored, then we must subtract 48 in
1148 order to account for the integer arg registers which are counted in
1149 argsize above, but which are not actually stored on the stack. */
1151 addr = (current_function_args_info <= 5 + stdarg
1152 ? plus_constant (virtual_incoming_args_rtx, 6 * UNITS_PER_WORD)
1153 : plus_constant (virtual_incoming_args_rtx, - (6 * UNITS_PER_WORD)));
1155 /* Allocate the va_list constructor */
1156 block = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD);
1157 RTX_UNCHANGING_P (block) = 1;
1158 RTX_UNCHANGING_P (XEXP (block, 0)) = 1;
1160 /* Store the address of the first integer register in the
1161 __va_base member. */
1162 emit_move_insn (change_address (block, Pmode, XEXP (block, 0)),
1163 force_operand (addr, NULL_RTX));
1165 /* Store the argsize as the __va_offset member. */
1166 emit_move_insn (change_address (block, Pmode,
1167 plus_constant (XEXP (block, 0),
1169 force_operand (argsize, NULL_RTX));
1171 /* Return the address of the va_list constructor, but don't put it in a
1172 register. Doing so would fail when not optimizing and produce worse
1173 code when optimizing. */
1174 return XEXP (block, 0);
1177 /* This page contains routines that are used to determine what the function
1178 prologue and epilogue code will do and write them out. */
1180 /* Compute the size of the save area in the stack. */
1188 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1189 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i])
1192 /* If some registers were saved but not reg 26, reg 26 must also
1193 be saved, so leave space for it. */
1194 if (size != 0 && ! regs_ever_live[26])
1197 /* Our size must be even (multiple of 16 bytes). */
1204 /* Return 1 if this function can directly return via $26. */
1209 return (reload_completed && alpha_sa_size () == 0
1210 && get_frame_size () == 0
1211 && current_function_outgoing_args_size == 0
1212 && current_function_pretend_args_size == 0);
1215 /* Write a version stamp. Don't write anything if we are running as a
1216 cross-compiler. Otherwise, use the versions in /usr/include/stamp.h. */
1218 #if !defined(CROSS_COMPILE) && !defined(_WIN32)
1223 alpha_write_verstamp (file)
1229 fprintf (file, "\t.verstamp %d %d ", MS_STAMP, LS_STAMP);
1230 for (p = version_string; *p != ' ' && *p != 0; p++)
1231 fprintf (file, "%c", *p == '.' ? ' ' : *p);
1232 fprintf (file, "\n");
1236 /* Write code to add constant C to register number IN_REG (possibly 31)
1237 and put the result into OUT_REG. Use TEMP_REG as a scratch register;
1238 usually this will be OUT_REG, but should not be if OUT_REG is
1239 STACK_POINTER_REGNUM, since it must be updated in a single instruction.
1240 Write the code to FILE. */
1243 add_long_const (file, c, in_reg, out_reg, temp_reg)
1246 int in_reg, out_reg, temp_reg;
1248 HOST_WIDE_INT low = (c & 0xffff) - 2 * (c & 0x8000);
1249 HOST_WIDE_INT tmp1 = c - low;
1250 HOST_WIDE_INT high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
1251 HOST_WIDE_INT extra = 0;
1253 /* We don't have code to write out constants larger than 32 bits. */
1254 #if HOST_BITS_PER_LONG_INT == 64
1255 if ((unsigned HOST_WIDE_INT) c >> 32 != 0)
1259 /* If HIGH will be interpreted as negative, we must adjust it to do two
1260 ldha insns. Note that we will never be building a negative constant
1267 high = ((tmp1 >> 16) & 0xffff) - 2 * ((tmp1 >> 16) & 0x8000);
1272 int result_reg = (extra == 0 && high == 0) ? out_reg : temp_reg;
1274 if (low >= 0 && low < 255)
1275 fprintf (file, "\taddq $%d,%d,$%d\n", in_reg, low, result_reg);
1277 fprintf (file, "\tlda $%d,%d($%d)\n", result_reg, low, in_reg);
1279 in_reg = result_reg;
1284 int result_reg = (high == 0) ? out_reg : temp_reg;
1286 fprintf (file, "\tldah $%d,%d($%d)\n", result_reg, extra, in_reg);
1287 in_reg = result_reg;
1291 fprintf (file, "\tldah $%d,%d($%d)\n", out_reg, high, in_reg);
1294 /* Write function prologue. */
1297 output_prolog (file, size)
1301 HOST_WIDE_INT out_args_size
1302 = ALPHA_ROUND (current_function_outgoing_args_size);
1303 HOST_WIDE_INT sa_size = alpha_sa_size ();
1304 HOST_WIDE_INT frame_size
1305 = (out_args_size + sa_size
1306 + ALPHA_ROUND (size + current_function_pretend_args_size));
1307 HOST_WIDE_INT reg_offset = out_args_size;
1308 HOST_WIDE_INT start_reg_offset = reg_offset;
1309 HOST_WIDE_INT actual_start_reg_offset = start_reg_offset;
1310 int int_reg_save_area_size = 0;
1312 unsigned reg_mask = 0;
1315 /* Ecoff can handle multiple .file directives, so put out file and lineno.
1316 We have to do that before the .ent directive as we cannot switch
1317 files within procedures with native ecoff because line numbers are
1318 linked to procedure descriptors.
1319 Outputting the lineno helps debugging of one line functions as they
1320 would otherwise get no line number at all. Please note that we would
1321 like to put out last_linenum from final.c, but it is not accessible. */
1323 if (write_symbols == SDB_DEBUG)
1325 ASM_OUTPUT_SOURCE_FILENAME (file,
1326 DECL_SOURCE_FILE (current_function_decl));
1327 if (debug_info_level != DINFO_LEVEL_TERSE)
1328 ASM_OUTPUT_SOURCE_LINE (file,
1329 DECL_SOURCE_LINE (current_function_decl));
1332 /* The assembly language programmer's guide states that the second argument
1333 to the .ent directive, the lex_level, is ignored by the assembler,
1334 so we might as well omit it. */
1336 fprintf (file, "\t.ent ");
1337 assemble_name (file, alpha_function_name);
1338 fprintf (file, "\n");
1339 ASM_OUTPUT_LABEL (file, alpha_function_name);
1340 inside_function = TRUE;
1342 /* Set up offsets to alpha virtual arg/local debugging pointer. */
1344 alpha_auto_offset = -frame_size + current_function_pretend_args_size;
1345 alpha_arg_offset = -frame_size + 48;
1347 /* If we need a GP (we have a LDSYM insn or a CALL_INSN), load it first.
1348 Even if we are a static function, we still need to do this in case
1349 our address is taken and passed to something like qsort.
1351 We never need a GP for Windows/NT. */
1353 alpha_function_needs_gp = 0;
1354 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
1355 if ((GET_CODE (insn) == CALL_INSN)
1356 || (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
1357 && GET_CODE (PATTERN (insn)) != USE
1358 && GET_CODE (PATTERN (insn)) != CLOBBER
1359 && (get_attr_type (insn) == TYPE_LDSYM
1360 || get_attr_type (insn) == TYPE_ISUBR)))
1362 alpha_function_needs_gp = 1;
1366 if (WINDOWS_NT == 0)
1368 if (alpha_function_needs_gp)
1369 fprintf (file, "\tldgp $29,0($27)\n");
1371 /* Put a label after the GP load so we can enter the function at it. */
1372 assemble_name (file, alpha_function_name);
1373 fprintf (file, "..ng:\n");
1376 /* Adjust the stack by the frame size. If the frame size is > 4096
1377 bytes, we need to be sure we probe somewhere in the first and last
1378 4096 bytes (we can probably get away without the latter test) and
1379 every 8192 bytes in between. If the frame size is > 32768, we
1380 do this in a loop. Otherwise, we generate the explicit probe
1383 Note that we are only allowed to adjust sp once in the prologue. */
1385 if (frame_size < 32768)
1387 if (frame_size > 4096)
1391 fprintf (file, "\tstq $31,-%d($30)\n", probed);
1393 while (probed + 8192 < frame_size)
1394 fprintf (file, "\tstq $31,-%d($30)\n", probed += 8192);
1396 /* We only have to do this probe if we aren't saving registers. */
1397 if (sa_size == 0 && probed + 4096 < frame_size)
1398 fprintf (file, "\tstq $31,-%d($30)\n", frame_size);
1401 if (frame_size != 0)
1402 fprintf (file, "\tlda $30,-%d($30)\n", frame_size);
1406 /* Here we generate code to set R4 to SP + 4096 and set R5 to the
1407 number of 8192 byte blocks to probe. We then probe each block
1408 in the loop and then set SP to the proper location. If the
1409 amount remaining is > 4096, we have to do one more probe if we
1410 are not saving any registers. */
1412 HOST_WIDE_INT blocks = (frame_size + 4096) / 8192;
1413 HOST_WIDE_INT leftover = frame_size + 4096 - blocks * 8192;
1415 add_long_const (file, blocks, 31, 5, 5);
1417 fprintf (file, "\tlda $4,4096($30)\n");
1419 assemble_name (file, alpha_function_name);
1420 fprintf (file, "..sc:\n");
1422 fprintf (file, "\tstq $31,-8192($4)\n");
1423 fprintf (file, "\tsubq $5,1,$5\n");
1424 fprintf (file, "\tlda $4,-8192($4)\n");
1426 fprintf (file, "\tbne $5,");
1427 assemble_name (file, alpha_function_name);
1428 fprintf (file, "..sc\n");
1430 if (leftover > 4096 && sa_size == 0)
1431 fprintf (file, "\tstq $31,-%d($4)\n", leftover);
1433 fprintf (file, "\tlda $30,-%d($4)\n", leftover);
1436 /* Describe our frame. */
1437 fprintf (file, "\t.frame $%d,%d,$26,%d\n",
1438 (frame_pointer_needed
1439 ? HARD_FRAME_POINTER_REGNUM : STACK_POINTER_REGNUM),
1440 frame_size, current_function_pretend_args_size);
1442 /* Save register 26 if any other register needs to be saved. */
1445 reg_mask |= 1 << 26;
1446 fprintf (file, "\tstq $26,%d($30)\n", reg_offset);
1448 int_reg_save_area_size += 8;
1451 /* Now save any other used integer registers required to be saved. */
1452 for (i = 0; i < 32; i++)
1453 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i] && i != 26)
1456 fprintf (file, "\tstq $%d,%d($30)\n", i, reg_offset);
1458 int_reg_save_area_size += 8;
1461 /* Print the register mask and do floating-point saves. */
1463 fprintf (file, "\t.mask 0x%x,%d\n", reg_mask,
1464 actual_start_reg_offset - frame_size);
1466 start_reg_offset = reg_offset;
1469 for (i = 0; i < 32; i++)
1470 if (! fixed_regs[i + 32] && ! call_used_regs[i + 32]
1471 && regs_ever_live[i + 32])
1474 fprintf (file, "\tstt $f%d,%d($30)\n", i, reg_offset);
1478 /* Print the floating-point mask, if we've saved any fp register. */
1480 fprintf (file, "\t.fmask 0x%x,%d\n", reg_mask,
1481 actual_start_reg_offset - frame_size + int_reg_save_area_size);
1483 /* If we need a frame pointer, set it from the stack pointer. Note that
1484 this must always be the last instruction in the prologue. */
1485 if (frame_pointer_needed)
1486 fprintf (file, "\tbis $30,$30,$15\n");
1488 /* End the prologue and say if we used gp. */
1489 fprintf (file, "\t.prologue %d\n", alpha_function_needs_gp);
1492 /* Write function epilogue. */
1495 output_epilog (file, size)
1499 rtx insn = get_last_insn ();
1500 HOST_WIDE_INT out_args_size
1501 = ALPHA_ROUND (current_function_outgoing_args_size);
1502 HOST_WIDE_INT sa_size = alpha_sa_size ();
1503 HOST_WIDE_INT frame_size
1504 = (out_args_size + sa_size
1505 + ALPHA_ROUND (size + current_function_pretend_args_size));
1506 HOST_WIDE_INT reg_offset = out_args_size;
1507 HOST_WIDE_INT frame_size_from_reg_save = frame_size - reg_offset;
1509 = frame_pointer_needed && regs_ever_live[HARD_FRAME_POINTER_REGNUM];
1512 /* If the last insn was a BARRIER, we don't have to write anything except
1513 the .end pseudo-op. */
1514 if (GET_CODE (insn) == NOTE)
1515 insn = prev_nonnote_insn (insn);
1516 if (insn == 0 || GET_CODE (insn) != BARRIER)
1520 /* If we have a frame pointer, restore SP from it. */
1521 if (frame_pointer_needed)
1522 fprintf (file, "\tbis $15,$15,$30\n");
1524 /* Restore all the registers, starting with the return address
1528 fprintf (file, "\tldq $26,%d($30)\n", reg_offset);
1532 /* Now restore any other used integer registers that that we saved,
1533 except for FP if it is being used as FP, since it must be
1536 for (i = 0; i < 32; i++)
1537 if (! fixed_regs[i] && ! call_used_regs[i] && regs_ever_live[i]
1540 if (i == HARD_FRAME_POINTER_REGNUM && frame_pointer_needed)
1541 fp_offset = reg_offset;
1543 fprintf (file, "\tldq $%d,%d($30)\n", i, reg_offset);
1547 for (i = 0; i < 32; i++)
1548 if (! fixed_regs[i + 32] && ! call_used_regs[i + 32]
1549 && regs_ever_live[i + 32])
1551 fprintf (file, "\tldt $f%d,%d($30)\n", i, reg_offset);
1555 /* If the stack size is large and we have a frame pointer, compute the
1556 size of the stack into a register because the old FP restore, stack
1557 pointer adjust, and return are required to be consecutive
1559 if (frame_size > 32767 && restore_fp)
1560 add_long_const (file, frame_size, 31, 1, 1);
1562 /* If we needed a frame pointer and we have to restore it, do it
1563 now. This must be done in one instruction immediately
1564 before the SP update. */
1565 if (restore_fp && fp_offset)
1566 fprintf (file, "\tldq $15,%d($30)\n", fp_offset);
1568 /* Now update the stack pointer, if needed. Only one instruction must
1569 modify the stack pointer. It must be the last instruction in the
1570 sequence and must be an ADDQ or LDA instruction. If the frame
1571 pointer was loaded above, we may only put one instruction here. */
1573 if (frame_size > 32768 && restore_fp)
1574 fprintf (file, "\taddq $1,$30,$30\n");
1576 add_long_const (file, frame_size, 30, 30, 1);
1578 /* Finally return to the caller. */
1579 fprintf (file, "\tret $31,($26),1\n");
1582 /* End the function. */
1583 fprintf (file, "\t.end ");
1584 assemble_name (file, alpha_function_name);
1585 fprintf (file, "\n");
1586 inside_function = FALSE;
1588 /* Show that we know this function if it is called again. */
1589 SYMBOL_REF_FLAG (XEXP (DECL_RTL (current_function_decl), 0)) = 1;
1592 /* Debugging support. */
1596 /* Count the number of sdb related labels are generated (to find block
1597 start and end boundaries). */
1599 int sdb_label_count = 0;
1601 /* Next label # for each statement. */
1603 static int sym_lineno = 0;
1605 /* Count the number of .file directives, so that .loc is up to date. */
1607 static int num_source_filenames = 0;
1609 /* Name of the file containing the current function. */
1611 static char *current_function_file = "";
1613 /* Offsets to alpha virtual arg/local debugging pointers. */
1615 long alpha_arg_offset;
1616 long alpha_auto_offset;
1618 /* Emit a new filename to a stream. */
1621 alpha_output_filename (stream, name)
1625 static int first_time = TRUE;
1626 char ltext_label_name[100];
1631 ++num_source_filenames;
1632 current_function_file = name;
1633 fprintf (stream, "\t.file\t%d ", num_source_filenames);
1634 output_quoted_string (stream, name);
1635 fprintf (stream, "\n");
1636 if (!TARGET_GAS && write_symbols == DBX_DEBUG)
1637 fprintf (stream, "\t#@stabs\n");
1640 else if (!TARGET_GAS && write_symbols == DBX_DEBUG)
1642 ASM_GENERATE_INTERNAL_LABEL (ltext_label_name, "Ltext", 0);
1643 fprintf (stream, "%s ", ASM_STABS_OP);
1644 output_quoted_string (stream, name);
1645 fprintf (stream, ",%d,0,0,%s\n", N_SOL, <ext_label_name[1]);
1648 else if (name != current_function_file
1649 && strcmp (name, current_function_file) != 0)
1651 if (inside_function && ! TARGET_GAS)
1652 fprintf (stream, "\t#.file\t%d ", num_source_filenames);
1655 ++num_source_filenames;
1656 current_function_file = name;
1657 fprintf (stream, "\t.file\t%d ", num_source_filenames);
1660 output_quoted_string (stream, name);
1661 fprintf (stream, "\n");
1665 /* Emit a linenumber to a stream. */
1668 alpha_output_lineno (stream, line)
1672 if (! TARGET_GAS && write_symbols == DBX_DEBUG)
1674 /* mips-tfile doesn't understand .stabd directives. */
1676 fprintf (stream, "$LM%d:\n\t%s %d,0,%d,$LM%d\n",
1677 sym_lineno, ASM_STABN_OP, N_SLINE, line, sym_lineno);
1680 fprintf (stream, "\n\t.loc\t%d %d\n", num_source_filenames, line);