1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
24 #include "coretypes.h"
28 #include "insn-config.h"
30 #include "hard-reg-set.h"
32 #include "basic-block.h"
37 #include "diagnostic-core.h"
40 #include "addresses.h"
44 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
46 #define regno_save_mode \
47 (this_target_reload->x_regno_save_mode)
48 #define cached_reg_save_code \
49 (this_target_reload->x_cached_reg_save_code)
50 #define cached_reg_restore_code \
51 (this_target_reload->x_cached_reg_restore_code)
53 /* For each hard register, a place on the stack where it can be saved,
57 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
59 /* The number of elements in the subsequent array. */
60 static int save_slots_num;
62 /* Allocated slots so far. */
63 static rtx save_slots[FIRST_PSEUDO_REGISTER];
65 /* Set of hard regs currently residing in save area (during insn scan). */
67 static HARD_REG_SET hard_regs_saved;
69 /* Number of registers currently in hard_regs_saved. */
71 static int n_regs_saved;
73 /* Computed by mark_referenced_regs, all regs referenced in a given
75 static HARD_REG_SET referenced_regs;
78 typedef void refmarker_fn (rtx *loc, enum machine_mode mode, int hardregno,
81 static int reg_save_code (int, enum machine_mode);
82 static int reg_restore_code (int, enum machine_mode);
84 struct saved_hard_reg;
85 static void initiate_saved_hard_regs (void);
86 static struct saved_hard_reg *new_saved_hard_reg (int, int);
87 static void finish_saved_hard_regs (void);
88 static int saved_hard_reg_compare_func (const void *, const void *);
90 static void mark_set_regs (rtx, const_rtx, void *);
91 static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg);
92 static refmarker_fn mark_reg_as_referenced;
93 static refmarker_fn replace_reg_with_saved_mem;
94 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
96 static int insert_restore (struct insn_chain *, int, int, int,
98 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
100 static void add_stored_regs (rtx, const_rtx, void *);
104 static GTY(()) rtx savepat;
105 static GTY(()) rtx restpat;
106 static GTY(()) rtx test_reg;
107 static GTY(()) rtx test_mem;
108 static GTY(()) rtx saveinsn;
109 static GTY(()) rtx restinsn;
111 /* Return the INSN_CODE used to save register REG in mode MODE. */
113 reg_save_code (int reg, enum machine_mode mode)
116 if (cached_reg_save_code[reg][mode])
117 return cached_reg_save_code[reg][mode];
118 if (!HARD_REGNO_MODE_OK (reg, mode))
120 /* Depending on how HARD_REGNO_MODE_OK is defined, range propagation
121 might deduce here that reg >= FIRST_PSEUDO_REGISTER. So the assert
122 below silences a warning. */
123 gcc_assert (reg < FIRST_PSEUDO_REGISTER);
124 cached_reg_save_code[reg][mode] = -1;
125 cached_reg_restore_code[reg][mode] = -1;
129 /* Update the register number and modes of the register
130 and memory operand. */
131 SET_REGNO_RAW (test_reg, reg);
132 PUT_MODE (test_reg, mode);
133 PUT_MODE (test_mem, mode);
135 /* Force re-recognition of the modified insns. */
136 INSN_CODE (saveinsn) = -1;
137 INSN_CODE (restinsn) = -1;
139 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn);
140 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn);
142 /* Now extract both insns and see if we can meet their
144 ok = (cached_reg_save_code[reg][mode] != -1
145 && cached_reg_restore_code[reg][mode] != -1);
148 extract_insn (saveinsn);
149 ok = constrain_operands (1);
150 extract_insn (restinsn);
151 ok &= constrain_operands (1);
156 cached_reg_save_code[reg][mode] = -1;
157 cached_reg_restore_code[reg][mode] = -1;
159 gcc_assert (cached_reg_save_code[reg][mode]);
160 return cached_reg_save_code[reg][mode];
163 /* Return the INSN_CODE used to restore register REG in mode MODE. */
165 reg_restore_code (int reg, enum machine_mode mode)
167 if (cached_reg_restore_code[reg][mode])
168 return cached_reg_restore_code[reg][mode];
169 /* Populate our cache. */
170 reg_save_code (reg, mode);
171 return cached_reg_restore_code[reg][mode];
174 /* Initialize for caller-save.
176 Look at all the hard registers that are used by a call and for which
177 reginfo.c has not already excluded from being used across a call.
179 Ensure that we can find a mode to save the register and that there is a
180 simple insn to save and restore the register. This latter check avoids
181 problems that would occur if we tried to save the MQ register of some
182 machines directly into memory. */
185 init_caller_save (void)
192 if (caller_save_initialized_p)
195 caller_save_initialized_p = true;
197 CLEAR_HARD_REG_SET (no_caller_save_reg_set);
198 /* First find all the registers that we need to deal with and all
199 the modes that they can have. If we can't find a mode to use,
200 we can't have the register live over calls. */
202 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
204 if (call_used_regs[i]
205 && !TEST_HARD_REG_BIT (call_fixed_reg_set, i))
207 for (j = 1; j <= MOVE_MAX_WORDS; j++)
209 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
211 if (regno_save_mode[i][j] == VOIDmode && j == 1)
213 SET_HARD_REG_BIT (call_fixed_reg_set, i);
218 regno_save_mode[i][1] = VOIDmode;
221 /* The following code tries to approximate the conditions under which
222 we can easily save and restore a register without scratch registers or
223 other complexities. It will usually work, except under conditions where
224 the validity of an insn operand is dependent on the address offset.
225 No such cases are currently known.
227 We first find a typical offset from some BASE_REG_CLASS register.
228 This address is chosen by finding the first register in the class
229 and by finding the smallest power of two that is a valid offset from
230 that register in every mode we will use to save registers. */
232 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
233 if (TEST_HARD_REG_BIT
235 [(int) base_reg_class (regno_save_mode[i][1], PLUS, CONST_INT)], i))
238 gcc_assert (i < FIRST_PSEUDO_REGISTER);
240 addr_reg = gen_rtx_REG (Pmode, i);
242 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
244 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset));
246 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
247 if (regno_save_mode[i][1] != VOIDmode
248 && ! strict_memory_address_p (regno_save_mode[i][1], address))
251 if (i == FIRST_PSEUDO_REGISTER)
255 /* If we didn't find a valid address, we must use register indirect. */
259 /* Next we try to form an insn to save and restore the register. We
260 see if such an insn is recognized and meets its constraints.
262 To avoid lots of unnecessary RTL allocation, we construct all the RTL
263 once, then modify the memory and register operands in-place. */
265 test_reg = gen_rtx_REG (VOIDmode, 0);
266 test_mem = gen_rtx_MEM (VOIDmode, address);
267 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg);
268 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem);
270 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, savepat, 0, -1, 0);
271 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, restpat, 0, -1, 0);
273 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
274 for (j = 1; j <= MOVE_MAX_WORDS; j++)
275 if (reg_save_code (i,regno_save_mode[i][j]) == -1)
277 regno_save_mode[i][j] = VOIDmode;
280 SET_HARD_REG_BIT (call_fixed_reg_set, i);
281 if (call_used_regs[i])
282 SET_HARD_REG_BIT (no_caller_save_reg_set, i);
289 /* Initialize save areas by showing that we haven't allocated any yet. */
292 init_save_areas (void)
296 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
297 for (j = 1; j <= MOVE_MAX_WORDS; j++)
298 regno_save_mem[i][j] = 0;
303 /* The structure represents a hard register which should be saved
304 through the call. It is used when the integrated register
305 allocator (IRA) is used and sharing save slots is on. */
306 struct saved_hard_reg
308 /* Order number starting with 0. */
310 /* The hard regno. */
312 /* Execution frequency of all calls through which given hard
313 register should be saved. */
315 /* Stack slot reserved to save the hard register through calls. */
317 /* True if it is first hard register in the chain of hard registers
318 sharing the same stack slot. */
320 /* Order number of the next hard register structure with the same
321 slot in the chain. -1 represents end of the chain. */
325 /* Map: hard register number to the corresponding structure. */
326 static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER];
328 /* The number of all structures representing hard registers should be
329 saved, in order words, the number of used elements in the following
331 static int saved_regs_num;
333 /* Pointers to all the structures. Index is the order number of the
334 corresponding structure. */
335 static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER];
337 /* First called function for work with saved hard registers. */
339 initiate_saved_hard_regs (void)
344 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
345 hard_reg_map[i] = NULL;
348 /* Allocate and return new saved hard register with given REGNO and
350 static struct saved_hard_reg *
351 new_saved_hard_reg (int regno, int call_freq)
353 struct saved_hard_reg *saved_reg;
356 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg));
357 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg;
358 saved_reg->num = saved_regs_num++;
359 saved_reg->hard_regno = regno;
360 saved_reg->call_freq = call_freq;
361 saved_reg->first_p = FALSE;
362 saved_reg->next = -1;
366 /* Free memory allocated for the saved hard registers. */
368 finish_saved_hard_regs (void)
372 for (i = 0; i < saved_regs_num; i++)
373 free (all_saved_regs[i]);
376 /* The function is used to sort the saved hard register structures
377 according their frequency. */
379 saved_hard_reg_compare_func (const void *v1p, const void *v2p)
381 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p;
382 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p;
384 if (flag_omit_frame_pointer)
386 if (p1->call_freq - p2->call_freq != 0)
387 return p1->call_freq - p2->call_freq;
389 else if (p2->call_freq - p1->call_freq != 0)
390 return p2->call_freq - p1->call_freq;
392 return p1->num - p2->num;
395 /* Allocate save areas for any hard registers that might need saving.
396 We take a conservative approach here and look for call-clobbered hard
397 registers that are assigned to pseudos that cross calls. This may
398 overestimate slightly (especially if some of these registers are later
399 used as spill registers), but it should not be significant.
401 For IRA we use priority coloring to decrease stack slots needed for
402 saving hard registers through calls. We build conflicts for them
407 In the fallback case we should iterate backwards across all possible
408 modes for the save, choosing the largest available one instead of
409 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
411 We do not try to use "move multiple" instructions that exist
412 on some machines (such as the 68k moveml). It could be a win to try
413 and use them when possible. The hard part is doing it in a way that is
414 machine independent since they might be saving non-consecutive
415 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
418 setup_save_areas (void)
422 HARD_REG_SET hard_regs_used;
424 /* Allocate space in the save area for the largest multi-register
425 pseudos first, then work backwards to single register
428 /* Find and record all call-used hard-registers in this function. */
429 CLEAR_HARD_REG_SET (hard_regs_used);
430 for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
431 if (reg_renumber[i] >= 0 && REG_N_CALLS_CROSSED (i) > 0)
433 unsigned int regno = reg_renumber[i];
434 unsigned int endregno
435 = end_hard_regno (GET_MODE (regno_reg_rtx[i]), regno);
436 for (r = regno; r < endregno; r++)
437 if (call_used_regs[r])
438 SET_HARD_REG_BIT (hard_regs_used, r);
441 if (optimize && flag_ira_share_save_slots)
444 struct insn_chain *chain, *next;
445 char *saved_reg_conflicts;
448 struct saved_hard_reg *saved_reg, *saved_reg2, *saved_reg3;
449 int call_saved_regs_num;
450 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER];
451 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;
452 reg_set_iterator rsi;
454 int prev_save_slots_num;
455 rtx prev_save_slots[FIRST_PSEUDO_REGISTER];
457 initiate_saved_hard_regs ();
458 /* Create hard reg saved regs. */
459 for (chain = reload_insn_chain; chain != 0; chain = next)
464 || find_reg_note (insn, REG_NORETURN, NULL))
466 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));
467 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
468 &chain->live_throughout);
469 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
471 /* Record all registers set in this call insn. These don't
472 need to be saved. N.B. the call insn might set a subreg
473 of a multi-hard-reg pseudo; then the pseudo is considered
474 live during the call, but the subreg that is set
476 CLEAR_HARD_REG_SET (this_insn_sets);
477 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
478 /* Sibcalls are considered to set the return value. */
479 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
480 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
482 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
483 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
484 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
485 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
486 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
488 if (hard_reg_map[regno] != NULL)
489 hard_reg_map[regno]->call_freq += freq;
491 saved_reg = new_saved_hard_reg (regno, freq);
493 /* Look through all live pseudos, mark their hard registers. */
494 EXECUTE_IF_SET_IN_REG_SET
495 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
497 int r = reg_renumber[regno];
503 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
504 for (; r < bound; r++)
505 if (TEST_HARD_REG_BIT (used_regs, r))
507 if (hard_reg_map[r] != NULL)
508 hard_reg_map[r]->call_freq += freq;
510 saved_reg = new_saved_hard_reg (r, freq);
511 SET_HARD_REG_BIT (hard_regs_to_save, r);
515 /* Find saved hard register conflicts. */
516 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num);
517 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num);
518 for (chain = reload_insn_chain; chain != 0; chain = next)
520 call_saved_regs_num = 0;
524 || find_reg_note (insn, REG_NORETURN, NULL))
526 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
527 &chain->live_throughout);
528 COPY_HARD_REG_SET (used_regs, call_used_reg_set);
530 /* Record all registers set in this call insn. These don't
531 need to be saved. N.B. the call insn might set a subreg
532 of a multi-hard-reg pseudo; then the pseudo is considered
533 live during the call, but the subreg that is set
535 CLEAR_HARD_REG_SET (this_insn_sets);
536 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
537 /* Sibcalls are considered to set the return value,
538 compare df-scan.c:df_get_call_refs. */
539 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
540 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
542 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
543 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
544 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
545 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
546 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
548 gcc_assert (hard_reg_map[regno] != NULL);
549 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno];
551 /* Look through all live pseudos, mark their hard registers. */
552 EXECUTE_IF_SET_IN_REG_SET
553 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
555 int r = reg_renumber[regno];
561 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
562 for (; r < bound; r++)
563 if (TEST_HARD_REG_BIT (used_regs, r))
564 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r];
566 for (i = 0; i < call_saved_regs_num; i++)
568 saved_reg = call_saved_regs[i];
569 for (j = 0; j < call_saved_regs_num; j++)
572 saved_reg2 = call_saved_regs[j];
573 saved_reg_conflicts[saved_reg->num * saved_regs_num
575 = saved_reg_conflicts[saved_reg2->num * saved_regs_num
581 /* Sort saved hard regs. */
582 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *),
583 saved_hard_reg_compare_func);
584 /* Initiate slots available from the previous reload
586 prev_save_slots_num = save_slots_num;
587 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx));
589 /* Allocate stack slots for the saved hard registers. */
590 for (i = 0; i < saved_regs_num; i++)
592 saved_reg = all_saved_regs[i];
593 regno = saved_reg->hard_regno;
594 for (j = 0; j < i; j++)
596 saved_reg2 = all_saved_regs[j];
597 if (! saved_reg2->first_p)
599 slot = saved_reg2->slot;
600 for (k = j; k >= 0; k = next_k)
602 saved_reg3 = all_saved_regs[k];
603 next_k = saved_reg3->next;
604 if (saved_reg_conflicts[saved_reg->num * saved_regs_num
609 && (GET_MODE_SIZE (regno_save_mode[regno][1])
610 <= GET_MODE_SIZE (regno_save_mode
611 [saved_reg2->hard_regno][1])))
615 (slot, regno_save_mode[saved_reg->hard_regno][1], 0);
616 regno_save_mem[regno][1] = saved_reg->slot;
617 saved_reg->next = saved_reg2->next;
618 saved_reg2->next = i;
619 if (dump_file != NULL)
620 fprintf (dump_file, "%d uses slot of %d\n",
621 regno, saved_reg2->hard_regno);
627 saved_reg->first_p = TRUE;
628 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++)
630 slot = prev_save_slots[j];
631 if (slot == NULL_RTX)
633 if (GET_MODE_SIZE (regno_save_mode[regno][1])
634 <= GET_MODE_SIZE (GET_MODE (slot))
635 && best_slot_num < 0)
637 if (GET_MODE (slot) == regno_save_mode[regno][1])
640 if (best_slot_num >= 0)
642 saved_reg->slot = prev_save_slots[best_slot_num];
646 regno_save_mode[saved_reg->hard_regno][1], 0);
647 if (dump_file != NULL)
649 "%d uses a slot from prev iteration\n", regno);
650 prev_save_slots[best_slot_num] = NULL_RTX;
651 if (best_slot_num + 1 == prev_save_slots_num)
652 prev_save_slots_num--;
657 = assign_stack_local_1
658 (regno_save_mode[regno][1],
659 GET_MODE_SIZE (regno_save_mode[regno][1]), 0, true);
660 if (dump_file != NULL)
661 fprintf (dump_file, "%d uses a new slot\n", regno);
663 regno_save_mem[regno][1] = saved_reg->slot;
664 save_slots[save_slots_num++] = saved_reg->slot;
667 free (saved_reg_conflicts);
668 finish_saved_hard_regs ();
672 /* Now run through all the call-used hard-registers and allocate
673 space for them in the caller-save area. Try to allocate space
674 in a manner which allows multi-register saves/restores to be done. */
676 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
677 for (j = MOVE_MAX_WORDS; j > 0; j--)
681 /* If no mode exists for this size, try another. Also break out
682 if we have already saved this hard register. */
683 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
686 /* See if any register in this group has been saved. */
687 for (k = 0; k < j; k++)
688 if (regno_save_mem[i + k][1])
696 for (k = 0; k < j; k++)
697 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
705 /* We have found an acceptable mode to store in. Since
706 hard register is always saved in the widest mode
707 available, the mode may be wider than necessary, it is
708 OK to reduce the alignment of spill space. We will
709 verify that it is equal to or greater than required
710 when we restore and save the hard register in
711 insert_restore and insert_save. */
713 = assign_stack_local_1 (regno_save_mode[i][j],
714 GET_MODE_SIZE (regno_save_mode[i][j]),
717 /* Setup single word save area just in case... */
718 for (k = 0; k < j; k++)
719 /* This should not depend on WORDS_BIG_ENDIAN.
720 The order of words in regs is the same as in memory. */
721 regno_save_mem[i + k][1]
722 = adjust_address_nv (regno_save_mem[i][j],
723 regno_save_mode[i + k][1],
728 /* Now loop again and set the alias set of any save areas we made to
729 the alias set used to represent frame objects. */
730 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
731 for (j = MOVE_MAX_WORDS; j > 0; j--)
732 if (regno_save_mem[i][j] != 0)
733 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
738 /* Find the places where hard regs are live across calls and save them. */
741 save_call_clobbered_regs (void)
743 struct insn_chain *chain, *next, *last = NULL;
744 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER];
746 /* Computed in mark_set_regs, holds all registers set by the current
748 HARD_REG_SET this_insn_sets;
750 CLEAR_HARD_REG_SET (hard_regs_saved);
753 for (chain = reload_insn_chain; chain != 0; chain = next)
755 rtx insn = chain->insn;
756 enum rtx_code code = GET_CODE (insn);
760 gcc_assert (!chain->is_caller_save_insn);
762 if (NONDEBUG_INSN_P (insn))
764 /* If some registers have been saved, see if INSN references
765 any of them. We must restore them before the insn if so. */
770 HARD_REG_SET this_insn_sets;
772 if (code == JUMP_INSN)
773 /* Restore all registers if this is a JUMP_INSN. */
774 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
777 CLEAR_HARD_REG_SET (referenced_regs);
778 mark_referenced_regs (&PATTERN (insn),
779 mark_reg_as_referenced, NULL);
780 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
783 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
784 if (TEST_HARD_REG_BIT (referenced_regs, regno))
785 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS,
787 /* If a saved register is set after the call, this means we no
788 longer should restore it. This can happen when parts of a
789 multi-word pseudo do not conflict with other pseudos, so
790 IRA may allocate the same hard register for both. One may
791 be live across the call, while the other is set
793 CLEAR_HARD_REG_SET (this_insn_sets);
794 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
795 AND_COMPL_HARD_REG_SET (hard_regs_saved, this_insn_sets);
798 if (code == CALL_INSN
799 && ! SIBLING_CALL_P (insn)
800 && ! find_reg_note (insn, REG_NORETURN, NULL))
803 HARD_REG_SET hard_regs_to_save;
804 reg_set_iterator rsi;
806 /* Use the register life information in CHAIN to compute which
807 regs are live during the call. */
808 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
809 &chain->live_throughout);
810 /* Save hard registers always in the widest mode available. */
811 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
812 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
813 save_mode [regno] = regno_save_mode [regno][1];
815 save_mode [regno] = VOIDmode;
817 /* Look through all live pseudos, mark their hard registers
818 and choose proper mode for saving. */
819 EXECUTE_IF_SET_IN_REG_SET
820 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
822 int r = reg_renumber[regno];
824 enum machine_mode mode;
828 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
829 mode = HARD_REGNO_CALLER_SAVE_MODE
830 (r, nregs, PSEUDO_REGNO_MODE (regno));
831 if (GET_MODE_BITSIZE (mode)
832 > GET_MODE_BITSIZE (save_mode[r]))
835 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
838 /* Record all registers set in this call insn. These don't need
839 to be saved. N.B. the call insn might set a subreg of a
840 multi-hard-reg pseudo; then the pseudo is considered live
841 during the call, but the subreg that is set isn't. */
842 CLEAR_HARD_REG_SET (this_insn_sets);
843 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
845 /* Compute which hard regs must be saved before this call. */
846 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
847 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
848 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
849 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set);
851 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
852 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
853 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
855 /* Must recompute n_regs_saved. */
857 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
858 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
863 else if (DEBUG_INSN_P (insn) && n_regs_saved)
864 mark_referenced_regs (&PATTERN (insn),
865 replace_reg_with_saved_mem,
868 if (chain->next == 0 || chain->next->block != chain->block)
871 /* At the end of the basic block, we must restore any registers that
872 remain saved. If the last insn in the block is a JUMP_INSN, put
873 the restore before the insn, otherwise, put it after the insn. */
876 && DEBUG_INSN_P (insn)
878 && last->block == chain->block)
881 basic_block bb = BLOCK_FOR_INSN (insn);
883 /* When adding hard reg restores after a DEBUG_INSN, move
884 all notes between last real insn and this DEBUG_INSN after
885 the DEBUG_INSN, otherwise we could get code
886 -g/-g0 differences. */
887 for (ins = PREV_INSN (insn); ins != last->insn; ins = prev)
889 prev = PREV_INSN (ins);
892 NEXT_INSN (prev) = NEXT_INSN (ins);
893 PREV_INSN (NEXT_INSN (ins)) = prev;
894 PREV_INSN (ins) = insn;
895 NEXT_INSN (ins) = NEXT_INSN (insn);
896 NEXT_INSN (insn) = ins;
898 PREV_INSN (NEXT_INSN (ins)) = ins;
899 if (BB_END (bb) == insn)
903 gcc_assert (DEBUG_INSN_P (ins));
909 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
910 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
911 regno += insert_restore (chain, JUMP_P (insn),
912 regno, MOVE_MAX_WORDS, save_mode);
917 /* Here from note_stores, or directly from save_call_clobbered_regs, when
918 an insn stores a value in a register.
919 Set the proper bit or bits in this_insn_sets. All pseudos that have
920 been assigned hard regs have had their register number changed already,
921 so we can ignore pseudos. */
923 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data)
925 int regno, endregno, i;
926 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data;
928 if (GET_CODE (reg) == SUBREG)
930 rtx inner = SUBREG_REG (reg);
931 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
933 regno = subreg_regno (reg);
934 endregno = regno + subreg_nregs (reg);
937 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
940 endregno = END_HARD_REGNO (reg);
945 for (i = regno; i < endregno; i++)
946 SET_HARD_REG_BIT (*this_insn_sets, i);
949 /* Here from note_stores when an insn stores a value in a register.
950 Set the proper bit or bits in the passed regset. All pseudos that have
951 been assigned hard regs have had their register number changed already,
952 so we can ignore pseudos. */
954 add_stored_regs (rtx reg, const_rtx setter, void *data)
956 int regno, endregno, i;
957 enum machine_mode mode = GET_MODE (reg);
960 if (GET_CODE (setter) == CLOBBER)
963 if (GET_CODE (reg) == SUBREG
964 && REG_P (SUBREG_REG (reg))
965 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER)
967 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
968 GET_MODE (SUBREG_REG (reg)),
971 regno = REGNO (SUBREG_REG (reg)) + offset;
972 endregno = regno + subreg_nregs (reg);
976 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
979 regno = REGNO (reg) + offset;
980 endregno = end_hard_regno (mode, regno);
983 for (i = regno; i < endregno; i++)
984 SET_REGNO_REG_SET ((regset) data, i);
987 /* Walk X and record all referenced registers in REFERENCED_REGS. */
989 mark_referenced_regs (rtx *loc, refmarker_fn *mark, void *arg)
991 enum rtx_code code = GET_CODE (*loc);
996 mark_referenced_regs (&SET_SRC (*loc), mark, arg);
997 if (code == SET || code == CLOBBER)
999 loc = &SET_DEST (*loc);
1000 code = GET_CODE (*loc);
1001 if ((code == REG && REGNO (*loc) < FIRST_PSEUDO_REGISTER)
1002 || code == PC || code == CC0
1003 || (code == SUBREG && REG_P (SUBREG_REG (*loc))
1004 && REGNO (SUBREG_REG (*loc)) < FIRST_PSEUDO_REGISTER
1005 /* If we're setting only part of a multi-word register,
1006 we shall mark it as referenced, because the words
1007 that are not being set should be restored. */
1008 && ((GET_MODE_SIZE (GET_MODE (*loc))
1009 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc))))
1010 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc)))
1011 <= UNITS_PER_WORD))))
1014 if (code == MEM || code == SUBREG)
1016 loc = &XEXP (*loc, 0);
1017 code = GET_CODE (*loc);
1022 int regno = REGNO (*loc);
1023 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
1024 : reg_renumber[regno]);
1027 mark (loc, GET_MODE (*loc), hardregno, arg);
1029 /* ??? Will we ever end up with an equiv expression in a debug
1030 insn, that would have required restoring a reg, or will
1031 reload take care of it for us? */
1033 /* If this is a pseudo that did not get a hard register, scan its
1034 memory location, since it might involve the use of another
1035 register, which might be saved. */
1036 else if (reg_equiv_mem[regno] != 0)
1037 mark_referenced_regs (&XEXP (reg_equiv_mem[regno], 0), mark, arg);
1038 else if (reg_equiv_address[regno] != 0)
1039 mark_referenced_regs (®_equiv_address[regno], mark, arg);
1043 fmt = GET_RTX_FORMAT (code);
1044 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1047 mark_referenced_regs (&XEXP (*loc, i), mark, arg);
1048 else if (fmt[i] == 'E')
1049 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--)
1050 mark_referenced_regs (&XVECEXP (*loc, i, j), mark, arg);
1054 /* Parameter function for mark_referenced_regs() that adds registers
1055 present in the insn and in equivalent mems and addresses to
1059 mark_reg_as_referenced (rtx *loc ATTRIBUTE_UNUSED,
1060 enum machine_mode mode,
1062 void *arg ATTRIBUTE_UNUSED)
1064 add_to_hard_reg_set (&referenced_regs, mode, hardregno);
1067 /* Parameter function for mark_referenced_regs() that replaces
1068 registers referenced in a debug_insn that would have been restored,
1069 should it be a non-debug_insn, with their save locations. */
1072 replace_reg_with_saved_mem (rtx *loc,
1073 enum machine_mode mode,
1077 unsigned int i, nregs = hard_regno_nregs [regno][mode];
1079 enum machine_mode *save_mode = (enum machine_mode *)arg;
1081 for (i = 0; i < nregs; i++)
1082 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1085 /* If none of the registers in the range would need restoring, we're
1091 if (!TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1095 && regno_save_mem[regno][nregs])
1097 mem = copy_rtx (regno_save_mem[regno][nregs]);
1099 if (nregs == (unsigned int) hard_regno_nregs[regno][save_mode[regno]])
1100 mem = adjust_address_nv (mem, save_mode[regno], 0);
1102 if (GET_MODE (mem) != mode)
1104 /* This is gen_lowpart_if_possible(), but without validating
1105 the newly-formed address. */
1108 if (WORDS_BIG_ENDIAN)
1109 offset = (MAX (GET_MODE_SIZE (GET_MODE (mem)), UNITS_PER_WORD)
1110 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1111 if (BYTES_BIG_ENDIAN)
1112 /* Adjust the address so that the address-after-the-data is
1114 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1115 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (mem))));
1117 mem = adjust_address_nv (mem, mode, offset);
1122 mem = gen_rtx_CONCATN (mode, rtvec_alloc (nregs));
1123 for (i = 0; i < nregs; i++)
1124 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1126 gcc_assert (regno_save_mem[regno + i][1]);
1127 XVECEXP (mem, 0, i) = copy_rtx (regno_save_mem[regno + i][1]);
1131 gcc_assert (save_mode[regno] != VOIDmode);
1132 XVECEXP (mem, 0, i) = gen_rtx_REG (save_mode [regno],
1137 gcc_assert (GET_MODE (mem) == mode);
1142 /* Insert a sequence of insns to restore. Place these insns in front of
1143 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1144 the maximum number of registers which should be restored during this call.
1145 It should never be less than 1 since we only work with entire registers.
1147 Note that we have verified in init_caller_save that we can do this
1148 with a simple SET, so use it. Set INSN_CODE to what we save there
1149 since the address might not be valid so the insn might not be recognized.
1150 These insns will be reloaded and have register elimination done by
1151 find_reload, so we need not worry about that here.
1153 Return the extra number of registers saved. */
1156 insert_restore (struct insn_chain *chain, int before_p, int regno,
1157 int maxrestore, enum machine_mode *save_mode)
1162 unsigned int numregs = 0;
1163 struct insn_chain *new_chain;
1166 /* A common failure mode if register status is not correct in the
1167 RTL is for this routine to be called with a REGNO we didn't
1168 expect to save. That will cause us to write an insn with a (nil)
1169 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1170 later, check for this common case here instead. This will remove
1171 one step in debugging such problems. */
1172 gcc_assert (regno_save_mem[regno][1]);
1174 /* Get the pattern to emit and update our status.
1176 See if we can restore `maxrestore' registers at once. Work
1177 backwards to the single register case. */
1178 for (i = maxrestore; i > 0; i--)
1183 if (regno_save_mem[regno][i] == 0)
1186 for (j = 0; j < i; j++)
1187 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
1192 /* Must do this one restore at a time. */
1200 mem = regno_save_mem [regno][numregs];
1201 if (save_mode [regno] != VOIDmode
1202 && save_mode [regno] != GET_MODE (mem)
1203 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1204 /* Check that insn to restore REGNO in save_mode[regno] is
1206 && reg_save_code (regno, save_mode[regno]) >= 0)
1207 mem = adjust_address_nv (mem, save_mode[regno], 0);
1209 mem = copy_rtx (mem);
1211 /* Verify that the alignment of spill space is equal to or greater
1213 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1214 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1216 pat = gen_rtx_SET (VOIDmode,
1217 gen_rtx_REG (GET_MODE (mem),
1219 code = reg_restore_code (regno, GET_MODE (mem));
1220 new_chain = insert_one_insn (chain, before_p, code, pat);
1222 /* Clear status for all registers we restored. */
1223 for (k = 0; k < i; k++)
1225 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
1226 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1230 /* Tell our callers how many extra registers we saved/restored. */
1234 /* Like insert_restore above, but save registers instead. */
1237 insert_save (struct insn_chain *chain, int before_p, int regno,
1238 HARD_REG_SET (*to_save), enum machine_mode *save_mode)
1244 unsigned int numregs = 0;
1245 struct insn_chain *new_chain;
1248 /* A common failure mode if register status is not correct in the
1249 RTL is for this routine to be called with a REGNO we didn't
1250 expect to save. That will cause us to write an insn with a (nil)
1251 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1252 later, check for this common case here. This will remove one
1253 step in debugging such problems. */
1254 gcc_assert (regno_save_mem[regno][1]);
1256 /* Get the pattern to emit and update our status.
1258 See if we can save several registers with a single instruction.
1259 Work backwards to the single register case. */
1260 for (i = MOVE_MAX_WORDS; i > 0; i--)
1264 if (regno_save_mem[regno][i] == 0)
1267 for (j = 0; j < i; j++)
1268 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
1273 /* Must do this one save at a time. */
1281 mem = regno_save_mem [regno][numregs];
1282 if (save_mode [regno] != VOIDmode
1283 && save_mode [regno] != GET_MODE (mem)
1284 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1285 /* Check that insn to save REGNO in save_mode[regno] is
1287 && reg_save_code (regno, save_mode[regno]) >= 0)
1288 mem = adjust_address_nv (mem, save_mode[regno], 0);
1290 mem = copy_rtx (mem);
1292 /* Verify that the alignment of spill space is equal to or greater
1294 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1295 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1297 pat = gen_rtx_SET (VOIDmode, mem,
1298 gen_rtx_REG (GET_MODE (mem),
1300 code = reg_save_code (regno, GET_MODE (mem));
1301 new_chain = insert_one_insn (chain, before_p, code, pat);
1303 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1304 for (k = 0; k < numregs; k++)
1306 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
1307 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1311 /* Tell our callers how many extra registers we saved/restored. */
1315 /* A for_each_rtx callback used by add_used_regs. Add the hard-register
1316 equivalent of each REG to regset DATA. */
1319 add_used_regs_1 (rtx *loc, void *data)
1326 live = (regset) data;
1330 if (!HARD_REGISTER_NUM_P (regno))
1331 regno = reg_renumber[regno];
1333 for (i = hard_regno_nregs[regno][GET_MODE (x)] - 1; i >= 0; i--)
1334 SET_REGNO_REG_SET (live, regno + i);
1339 /* A note_uses callback used by insert_one_insn. Add the hard-register
1340 equivalent of each REG to regset DATA. */
1343 add_used_regs (rtx *loc, void *data)
1345 for_each_rtx (loc, add_used_regs_1, data);
1348 /* Emit a new caller-save insn and set the code. */
1349 static struct insn_chain *
1350 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
1352 rtx insn = chain->insn;
1353 struct insn_chain *new_chain;
1356 /* If INSN references CC0, put our insns in front of the insn that sets
1357 CC0. This is always safe, since the only way we could be passed an
1358 insn that references CC0 is for a restore, and doing a restore earlier
1359 isn't a problem. We do, however, assume here that CALL_INSNs don't
1360 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1362 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn))
1364 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
1365 chain = chain->prev, insn = chain->insn;
1368 new_chain = new_insn_chain ();
1373 new_chain->prev = chain->prev;
1374 if (new_chain->prev != 0)
1375 new_chain->prev->next = new_chain;
1377 reload_insn_chain = new_chain;
1379 chain->prev = new_chain;
1380 new_chain->next = chain;
1381 new_chain->insn = emit_insn_before (pat, insn);
1382 /* ??? It would be nice if we could exclude the already / still saved
1383 registers from the live sets. */
1384 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1385 note_uses (&PATTERN (chain->insn), add_used_regs,
1386 &new_chain->live_throughout);
1387 /* If CHAIN->INSN is a call, then the registers which contain
1388 the arguments to the function are live in the new insn. */
1389 if (CALL_P (chain->insn))
1390 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn);
1392 link = XEXP (link, 1))
1393 note_uses (&XEXP (link, 0), add_used_regs,
1394 &new_chain->live_throughout);
1396 CLEAR_REG_SET (&new_chain->dead_or_set);
1397 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block)))
1398 BB_HEAD (BASIC_BLOCK (chain->block)) = new_chain->insn;
1402 new_chain->next = chain->next;
1403 if (new_chain->next != 0)
1404 new_chain->next->prev = new_chain;
1405 chain->next = new_chain;
1406 new_chain->prev = chain;
1407 new_chain->insn = emit_insn_after (pat, insn);
1408 /* ??? It would be nice if we could exclude the already / still saved
1409 registers from the live sets, and observe REG_UNUSED notes. */
1410 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1411 /* Registers that are set in CHAIN->INSN live in the new insn.
1412 (Unless there is a REG_UNUSED note for them, but we don't
1413 look for them here.) */
1414 note_stores (PATTERN (chain->insn), add_stored_regs,
1415 &new_chain->live_throughout);
1416 CLEAR_REG_SET (&new_chain->dead_or_set);
1417 if (chain->insn == BB_END (BASIC_BLOCK (chain->block)))
1418 BB_END (BASIC_BLOCK (chain->block)) = new_chain->insn;
1420 new_chain->block = chain->block;
1421 new_chain->is_caller_save_insn = 1;
1423 INSN_CODE (new_chain->insn) = code;
1426 #include "gt-caller-save.h"